更新硬件SDK

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/README.md

@@ -0,0 +1,10 @@
+# proejct_legacy 项目集合
+
+* example 模板项目,最基本的demo, 演示入口函数和启动task, 启动后定时打印日志
+* example_xxx xxx功能demo代码
+* cloud_speaker 云喇叭项目参考代码
+
+
+
+* **本目录下的项目为历史遗产项目，使用平台原始接口开发；后续不再维护**
+* **请参考project目录下的项目集合进行项目开发**

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/RTE_Device.h

@@ -0,0 +1,349 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/audio_extern.h

@@ -0,0 +1,39 @@
+#ifndef __AUDIO_EXTERN_H__
+#define __AUDIO_EXTERN_H__
+extern const unsigned char audio0[];
+extern const unsigned char audio1[];
+extern const unsigned char audio10[];
+extern const unsigned char audio100[];
+extern const unsigned char audio1000[];
+extern const unsigned char audio10000[];
+extern const unsigned char audio2[];
+extern const unsigned char audio3[];
+extern const unsigned char audio4[];
+extern const unsigned char audio5[];
+extern const unsigned char audio6[];
+extern const unsigned char audio7[];
+extern const unsigned char audio8[];
+extern const unsigned char audio9[];
+extern const unsigned char audiodot[];
+extern const unsigned char audioshoukuanchenggong[];
+extern const unsigned char audioyuan[];
+extern const unsigned char audiozhifubao[];
+extern const int audio0Size;
+extern const int audio1Size;
+extern const int audio10Size;
+extern const int audio100Size;
+extern const int audio1000Size;
+extern const int audio10000Size;
+extern const int audio2Size;
+extern const int audio3Size;
+extern const int audio4Size;
+extern const int audio5Size;
+extern const int audio6Size;
+extern const int audio7Size;
+extern const int audio8Size;
+extern const int audio9Size;
+extern const int audiodotSize;
+extern const int audioshoukuanchenggongSize;
+extern const int audioyuanSize;
+extern const int audiozhifubaoSize;
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/audio_task.h

@@ -0,0 +1,40 @@
+#ifndef __AUDIO_TASK__
+#define __AUDIO_TASK__
+#include "queue.h"
+#include "audio_play.h"
+typedef struct
+{
+    uint32_t priority;
+    uint32_t playType;
+    union
+    {
+        struct
+        {
+            char *data;
+            uint8_t len;
+        } tts;
+        struct
+        {
+            audio_play_info_t *info;
+            uint8_t count;
+        } file;
+    } message;
+    void * userParam;
+} audioQueueData;
+
+typedef enum
+{
+    MONEY_PLAY = 0,
+    PAD_PLAY,
+    SYS_PLAY
+} AUDIO_PLAY_PRIORITY;
+
+typedef enum
+{
+    TTS_PLAY = 0,
+    FILE_PLAY,
+} AUDIO_PLAY_TYPE;
+
+
+void audio_task_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/charge_management.h

@@ -0,0 +1,5 @@
+#ifndef __CHARGE_MAN_H
+#define __CHARGE_MAN_H
+uint16_t getVbat();
+void charge_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/fdb_init.h

@@ -0,0 +1,4 @@
+#ifndef __FDB_INIT_H
+#define __FDB_INIT_H
+void fdb_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/key_pad.h

@@ -0,0 +1,4 @@
+#ifndef __KEY_INIT_H
+#define __KEY_INIT_H
+void key_pad_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/led_task.h

@@ -0,0 +1,17 @@
+#ifndef __LED_TASK_H_
+#define __LED_TASK_H_
+
+#define LED_GREEN_PAD 44
+#define LED_GREEN_PORT 1
+#define LED_GREEN_PIN 8
+
+#define LED_RED_PAD 47
+#define LED_RED_PORT 1
+#define LED_RED_PIN 11
+
+#define LED_BLUE_PAD 41
+#define LED_BLUE_PORT 1
+#define LED_BLUE_PIN 7
+
+void led_task_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/inc/mqttStatus.h

@@ -0,0 +1,5 @@
+#ifndef __MQTT_STATUS_H_
+#define __MQTT_STATUS_H_
+bool getNetStatus();
+bool getServerStatus();
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/audio_task.c

@@ -0,0 +1,238 @@
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "common_api.h"
+#include "audio_task.h"
+#include "timers.h"
+#include "portmacro.h"
+#include "audio_play.h"
+#include "ivTTS.h"
+#include "slpman.h"
+#include "gpio.h"
+#include "pad.h"
+#define WAIT_PLAY_FLAG (0x1)
+#include "common_api.h"
+#include "bsp_custom.h"
+#include "ostask.h"
+#include DEBUG_LOG_HEADER_FILE
+#include "plat_config.h"
+#include "audio_play.h"
+#include "audio_ll_drv.h"
+#include "FreeRTOS.h"
+#include "timers.h"
+#include "slpman.h"
+#include "osasys.h"
+#include "version.h"
+#include "ivTTS.h"
+#include "audio_extern.h"
+#include "led_task.h"
+extern BOOL g_green_led_status;
+extern BOOL g_red_led_status;
+extern BOOL g_blue_led_status;
+extern const unsigned char audiopoweron[];
+static osEventFlagsId_t waitAudioPlayDone = NULL;
+QueueHandle_t audioQueueHandle = NULL;
+static uint8_t audio_sleep_handler = 0xff;
+static TimerHandle_t delay_timer;
+void before_sleep(void *pdata, slpManLpState state)
+{
+    slpManAONIOLatchEn(true);
+}
+/**
+  \brief definition of restore callback(called after sleep)
+ */
+void after_sleep(void *pdata, slpManLpState state)
+{
+    GpioPinConfig_t gpio_config;
+    gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    gpio_config.misc.initOutput = 0;
+    GPIO_pinConfig(0, 12, &gpio_config);
+    gpio_config.misc.initOutput = 0;
+    GPIO_pinConfig(1, 9, &gpio_config);
+
+
+    PadConfig_t padConfig;
+	PAD_getDefaultConfig(&padConfig);
+	padConfig.mux = PAD_MUX_ALT0;
+	PAD_setPinConfig(LED_GREEN_PAD, &padConfig);
+	PAD_setPinConfig(LED_RED_PAD, &padConfig);
+	PAD_setPinConfig(LED_BLUE_PAD, &padConfig);
+
+	gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    if (!getNetStatus())
+	{
+        gpio_config.misc.initOutput = g_green_led_status ? 0 : 1;
+        GPIO_pinConfig(LED_GREEN_PORT, LED_GREEN_PIN, &gpio_config);
+        gpio_config.misc.initOutput = 0;
+        GPIO_pinConfig(LED_RED_PORT, LED_RED_PIN, &gpio_config);
+        GPIO_pinConfig(LED_BLUE_PORT, LED_BLUE_PIN, &gpio_config);
+	}
+	else if ((usb_portmon_vbuspad_level() == 1))
+	{
+        gpio_config.misc.initOutput = 1;
+        GPIO_pinConfig(LED_RED_PORT, LED_RED_PIN, &gpio_config);
+        gpio_config.misc.initOutput = 0;
+        GPIO_pinConfig(LED_GREEN_PORT, LED_GREEN_PIN, &gpio_config);
+        GPIO_pinConfig(LED_BLUE_PORT, LED_BLUE_PIN, &gpio_config);
+	}
+	else if (getNetStatus() && !getServerStatus())
+	{
+        gpio_config.misc.initOutput = 1;
+        GPIO_pinConfig(LED_BLUE_PORT, LED_BLUE_PIN, &gpio_config);
+        gpio_config.misc.initOutput = 0;
+        GPIO_pinConfig(LED_RED_PORT, LED_RED_PIN, &gpio_config);
+        GPIO_pinConfig(LED_GREEN_PORT, LED_GREEN_PIN, &gpio_config);
+	}
+	else if (getServerStatus())
+	{
+        gpio_config.misc.initOutput = 1;
+        GPIO_pinConfig(LED_BLUE_PORT, LED_BLUE_PIN, &gpio_config);
+        gpio_config.misc.initOutput = 0;
+        GPIO_pinConfig(LED_RED_PORT, LED_RED_PIN, &gpio_config);
+        GPIO_pinConfig(LED_GREEN_PORT, LED_GREEN_PIN, &gpio_config);
+	}
+}
+void audio_data_cb(uint8_t *data, uint32_t len, uint8_t bits, uint8_t channels)
+{
+    //这里可以对音频数据进行软件音量缩放，或者直接清空来静音
+    //软件音量缩放参考HAL_I2sSrcAdjustVolumn
+    int value = 4;
+    int ret = am_kv_get("volume", &value, 1);
+    if(ret > 0)
+    {
+        DBG("AUDIO GET VOLUME SUCCESS %d", value);
+        HAL_I2sSrcAdjustVolumn(data, len, value);
+    }
+    else
+    {
+        DBG("AUDIO GET VOLUME FAIL %d", value);
+        HAL_I2sSrcAdjustVolumn(data, len, 4);
+    }
+    DBG("%x,%d,%d,%d", data, len, bits, channels);
+}
+void app_pa_on(uint32_t arg)
+{
+    GPIO_pinWrite(1, 1 << 9, 1 << 9);
+}
+void audio_event_cb(uint32_t event, void *param)
+{
+    DBG("%d", event);
+    switch (event)
+    {
+    case MULTIMEDIA_CB_AUDIO_DECODE_START:
+        slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP1_STATE);
+        GPIO_pinWrite(0, 1 << 12, 1 << 12);
+        audio_play_write_blank_raw(0, 6);
+        break;
+    case MULTIMEDIA_CB_AUDIO_OUTPUT_START:
+        xTimerStart(delay_timer, 200);
+        break;
+    case MULTIMEDIA_CB_TTS_INIT:
+        if (4 == sizeof("你好"))
+        {
+            audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_GBK);
+        }
+        else
+        {
+            audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_UTF8);
+        }
+        break;
+    case MULTIMEDIA_CB_AUDIO_DONE:
+        xTimerStop(delay_timer, 0);
+        DBG("audio play done, result = %d!", audio_play_get_last_error(0));
+        GPIO_pinWrite(1, 1 << 9, 0);
+        GPIO_pinWrite(0, 1 << 12, 0);
+        slpManPlatVoteEnableSleep(audio_sleep_handler, SLP_SLP1_STATE);
+        osEventFlagsSet(waitAudioPlayDone, WAIT_PLAY_FLAG);
+        break;
+    }
+}
+
+void audio_task(void *param)
+{
+    audioQueueData audioQueueRecv = {0};
+    uint32_t result = 0;
+    while (1)
+    {
+        if (xQueueReceive(audioQueueHandle, &audioQueueRecv, portMAX_DELAY))
+        {
+            DBG("this is play priority %d", audioQueueRecv.priority);
+            DBG("this is play playType %d", audioQueueRecv.playType);
+            if (audioQueueRecv.priority == MONEY_PLAY)
+            {
+                
+                if (audioQueueRecv.playType == TTS_PLAY)
+                {
+                    audio_play_tts_text(0, audioQueueRecv.message.tts.data, audioQueueRecv.message.tts.len);
+                }
+                else if (audioQueueRecv.playType == FILE_PLAY)
+                {
+                    audio_play_multi_files(0, audioQueueRecv.message.file.info, audioQueueRecv.message.file.count);
+                }
+            }
+            else if (audioQueueRecv.priority == PAD_PLAY)
+            {
+            }
+            result = osEventFlagsWait(waitAudioPlayDone, WAIT_PLAY_FLAG, osFlagsWaitAll, 20000);
+            DBG("this is play wait result %d", result);
+            if (audioQueueRecv.playType == TTS_PLAY) {
+                DBG("free tts data");
+                free(audioQueueRecv.message.tts.data);
+            }
+            else if(audioQueueRecv.playType == FILE_PLAY)
+            {
+                free(audioQueueRecv.message.file.info);
+                DBG("free file data");
+            }
+        }
+    }
+    vTaskDelete(NULL);
+}
+
+void audio_task_init(void)
+{
+    GpioPinConfig_t gpio_config;
+    gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    gpio_config.misc.initOutput = 0;
+    GPIO_pinConfig(0, 12, &gpio_config);
+
+    PadConfig_t config;
+    PAD_getDefaultConfig(&config);
+    config.mux = PAD_MUX_ALT0;
+    PAD_setPinConfig(45, &config);
+
+    GPIO_pinConfig(1, 9, &gpio_config);
+    slpManRegisterUsrdefinedBackupCb(before_sleep, NULL);
+    slpManRegisterUsrdefinedRestoreCb(after_sleep, NULL);
+    ivCStrA sdk_id = AISOUND_SDK_USERID;
+    slpManSetPmuSleepMode(true, SLP_SLP1_STATE, false);
+    slpManApplyPlatVoteHandle("audio", &audio_sleep_handler);
+
+    slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP2_STATE);
+    delay_timer = xTimerCreate(NULL, 200, 0, 0, app_pa_on);
+
+    audio_play_global_init(audio_event_cb, audio_data_cb, NULL);
+    audio_play_tts_set_resource(ivtts_16k_lite, sdk_id);
+    //现在使用ES7149/ES7148，用如下配置，如果不是，请根据实际情况配置，bus_id直接写0
+    // Audio_CodecI2SInit(0, I2S_MODE_I2S, I2S_FRAME_SIZE_16_16);
+
+    //如下配置可使用TM8211
+    Audio_CodecI2SInit(0, I2S_MODE_MSB, I2S_FRAME_SIZE_16_16);
+    if (waitAudioPlayDone == NULL)
+    {
+        waitAudioPlayDone = osEventFlagsNew(NULL);
+    }
+    audioQueueHandle = xQueueCreate(100, sizeof(audioQueueData));
+    audioQueueData powerOn = {0};
+    powerOn.playType = TTS_PLAY;
+    powerOn.priority = MONEY_PLAY;
+    char str[] = "正在开机"; 
+    powerOn.message.tts.data = malloc(sizeof(str));
+    memcpy(powerOn.message.tts.data, str, sizeof(str));
+    powerOn.message.tts.len = sizeof(str);
+    if (pdTRUE != xQueueSend(audioQueueHandle, &powerOn, 0))
+    {
+        DBG("start send audio fail");
+    }
+    xTaskCreate(audio_task, " ", 2048, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/charge_management.c

@@ -0,0 +1,57 @@
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "cmsis_os2.h"
+#include "adc.h"
+#include "common_api.h"
+#include "plat_config.h"
+#include "charge_management.h"
+#define VBAT_FLAG (0x1)
+static osEventFlagsId_t getVbatFlag = NULL;
+volatile static uint32_t vbatChannelResult = 0;
+volatile static uint16_t vbat = 0;
+
+uint16_t getVbat()
+{
+    return vbat;
+}
+static void ADC_VbatChannelCallback(uint32_t result)
+{
+    vbatChannelResult = result;
+    osEventFlagsSet(getVbatFlag, VBAT_FLAG);
+}
+
+static void charge_task(void *param)
+{
+    AdcConfig_t adcConfig;
+    ADC_getDefaultConfig(&adcConfig);
+    adcConfig.channelConfig.vbatResDiv = ADC_VBAT_RESDIV_RATIO_3OVER16;
+    uint32_t result = 0;
+    while (1)
+    {
+        ADC_channelInit(ADC_CHANNEL_VBAT, ADC_USER_PLAT, &adcConfig, ADC_VbatChannelCallback);
+        ADC_startConversion(ADC_CHANNEL_VBAT, ADC_USER_PLAT);
+        result = osEventFlagsWait(getVbatFlag, VBAT_FLAG, osFlagsWaitAll, 3000);
+        if (result == VBAT_FLAG)
+        {
+            vbat = (HAL_ADC_CalibrateRawCode(vbatChannelResult) * 16 / 3 + 500) / 1000;
+            DBG("get vbat result %d", vbat);
+        }
+        else
+        {
+            DBG("get vbat timeout");
+        }
+        ADC_channelDeInit(ADC_CHANNEL_VBAT, ADC_USER_PLAT);
+        osDelay(60000); // 60S获取一次当前电量
+    }
+    vTaskDelete(NULL);
+}
+
+void charge_init()
+{
+    if (getVbatFlag == NULL)
+    {
+        getVbatFlag = osEventFlagsNew(NULL);
+    }
+    xTaskCreate(charge_task, "", 256, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/example_main.c

@@ -0,0 +1,652 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "bsp.h"
+#include "bsp_custom.h"
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "cmisim.h"
+#include "cmips.h"
+#include "slpman.h"
+#include "cJSON.h"
+#include "MQTTClient.h"
+#include "audio_task.h"
+#include "audioFile.h"
+#include "audio_play.h"
+#include "math.h"
+#include "charge_management.h"
+#include "key_pad.h"
+#include "am_kv.h"
+#include "led_task.h"
+#include "plat_config.h"
+#include "fdb_init.h"
+#include "cmimm.h"
+extern QueueHandle_t audioQueueHandle;
+
+#define MQTT_HOST    	"lbsmqtt.airm2m.com"   				// MQTT服务器的地址和端口号
+#define MQTT_PORT		 1884
+#define CLIENT_ID    	"123456789"          
+#define USERNAME    	"username"                 
+#define PASSWORD    	"password"   
+
+const static char mqtt_sub_topic[] = "/sub/topic/money";    //订阅的主题
+const static char mqtt_pub_topic[] = "/pub/topic/message";  //发布的主题
+static char mqtt_send_payload[] = "hello mqtt_test!!!";
+
+#define QMSG_ID_BASE               (0x160) 
+#define QMSG_ID_NW_IPV4_READY      (QMSG_ID_BASE)
+#define QMSG_ID_NW_IPV6_READY      (QMSG_ID_BASE + 1)
+#define QMSG_ID_NW_IPV4_6_READY    (QMSG_ID_BASE + 2)
+#define QMSG_ID_NW_DISCONNECT      (QMSG_ID_BASE + 3)
+#define QMSG_ID_SOCK_SENDPKG       (QMSG_ID_BASE + 4)
+#define QMSG_ID_SOCK_RECVPKG       (QMSG_ID_BASE + 5)
+
+
+#define APP_EVENT_QUEUE_SIZE    (10)
+static QueueHandle_t            psEventQueueHandle;
+static bool netStatus = false;
+static bool serverStatus = false;
+
+bool getNetStatus()
+{
+    return netStatus;
+}
+bool getServerStatus()
+{
+    return serverStatus;
+}
+static void sendQueueMsg(UINT32 msgId, UINT32 xTickstoWait){
+    eventCallbackMessage_t *queueMsg = NULL;
+    queueMsg = malloc(sizeof(eventCallbackMessage_t));
+    queueMsg->messageId = msgId;
+    if (psEventQueueHandle){
+        if (pdTRUE != xQueueSend(psEventQueueHandle, &queueMsg, xTickstoWait)){
+            DBG("xQueueSend error");
+        }
+    }
+}
+int fomatMoney(int num, audioQueueData *data, int *index, BOOL flag)
+{
+     uint32_t  audioArray[10][2] = 
+     {
+         {audio0,   sizeof(audio0)},
+         {audio1,   sizeof(audio1)},
+         {audio2,   sizeof(audio2)},
+         {audio3,   sizeof(audio3)},
+         {audio4,   sizeof(audio4)},
+         {audio5,   sizeof(audio5)},
+         {audio6,   sizeof(audio6)},
+         {audio7,   sizeof(audio7)},
+         {audio8,   sizeof(audio8)},
+         {audio9,   sizeof(audio9)}
+    };
+    int thousand = (num - num % 1000) / 1000;
+    int hundred = ((num % 1000) - ((num % 1000) % 100)) / 100;
+    int ten = ((num % 100) - ((num % 100) % 10)) / 10;
+    int unit = num % 10;
+    if (thousand == 0)
+    {
+        thousand = -1;
+        if (hundred == 0)
+        {
+            hundred = -1;
+            if (ten == 0)
+            {
+                ten = -1;
+                if (unit == 0)
+                {
+                    unit = -1;
+                }
+            }
+        }
+    }
+    if (unit == 0)
+    {
+        unit = -1;
+        if (ten == 0)
+        {
+            ten = -1;
+            if (hundred == 0)
+            {
+                hundred = -1;
+                if (thousand == 0)
+                {
+                    thousand = -1;
+                }
+            }
+        }
+    }
+    if (ten == 0 && hundred == 0)
+    {
+        ten = -1;
+    }
+    if (thousand != -1)
+    {
+        if (flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audioArray[thousand][0];
+            data->message.file.info[*index].rom_data_len = audioArray[thousand][1];
+        }
+        *index += 1;
+        if (flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audio1000;
+            data->message.file.info[*index].rom_data_len = sizeof(audio1000);
+        }
+        *index += 1;
+    }
+    if (hundred != -1)
+    {
+        if(flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audioArray[hundred][0];
+            data->message.file.info[*index].rom_data_len = audioArray[hundred][1];
+        }
+        *index += 1;
+        if(flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audio100;
+            data->message.file.info[*index].rom_data_len = sizeof(audio100);
+        }
+        *index += 1;
+    }
+    if (ten != -1)
+    {
+        if (!(ten == 1 && hundred == -1 && thousand == -1))
+        {
+            if(flag)
+            {
+                data->message.file.info[*index].path = NULL; 
+                data->message.file.info[*index].address = audioArray[ten][0];
+                data->message.file.info[*index].rom_data_len = audioArray[ten][1];
+            }
+            *index += 1;
+        }
+        DBG("333  %d\r\n", *index);
+        if (ten != 0)
+        {
+            if(flag)
+            {
+                data->message.file.info[*index].path = NULL; 
+                data->message.file.info[*index].address = audio10;
+                data->message.file.info[*index].rom_data_len = sizeof(audio10);
+            }
+            *index += 1;
+        }
+    }
+    if (unit != -1)
+    {
+        if(flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audioArray[unit][0];
+            data->message.file.info[*index].rom_data_len = audioArray[unit][1];
+        }
+        *index += 1;
+    }
+    return 0;
+}
+static int strToFile(char *money, audioQueueData *data, int *index, bool flag)
+{
+    if (flag)
+    {
+        data->message.file.info[*index].address  = audiozhifubao;
+        data->message.file.info[*index].rom_data_len  = sizeof(audiozhifubao);
+    }
+    *index += 1;
+     uint32_t  audioArray[10][2] = 
+     {
+         {audio0, sizeof(audio0)},
+         {audio1, sizeof(audio1)},
+         {audio2, sizeof(audio2)},
+         {audio3, sizeof(audio3)},
+         {audio4, sizeof(audio4)},
+         {audio5, sizeof(audio5)},
+         {audio6, sizeof(audio6)},
+         {audio7, sizeof(audio7)},
+         {audio8, sizeof(audio8)},
+         {audio9, sizeof(audio9)}
+    };
+    int count = 0;
+    int integer = 0;
+    char *str = NULL;
+    char intStr[8] = {0};
+    char decStr[3] = {0};
+    str = strstr(money, ".");
+    if (str != NULL)
+    {
+        memcpy(intStr, money, str - money);
+        str = str + 1;
+        memcpy(decStr, str, 2);
+        integer = atoi(intStr);
+    }
+    else
+    {
+        integer = atoi(money);
+    }
+    if (integer >= 10000)
+    {
+        int filecount = fomatMoney(integer / 10000, data, index, flag);
+        //TODO 待处理两万
+        if (flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audio10000;
+            data->message.file.info[*index].rom_data_len = sizeof(audio10000);
+        }
+        *index += 1;
+        if (((integer % 10000) < 1000) && ((integer % 10000) != 0))
+        {
+            if (flag)
+            {
+                data->message.file.info[*index].path = NULL; 
+                data->message.file.info[*index].address = audioArray[0][0];
+                data->message.file.info[*index].rom_data_len = audioArray[0][1];
+            }
+            *index += 1;
+        }
+    }
+    if ((integer % 10000) > 0)
+    {
+        int filecount = fomatMoney(integer % 10000, data, index, flag);
+        //TODO 待处理两千
+        // if()
+        // if (flag)
+        // {
+        //     data->message.file.info[*index].path = NULL; 
+        //     data->message.file.info[*index].address = audioK;
+        //     data->message.file.info[*index].rom_data_len = sizeof(audioK);
+        // }
+        // *index += 1;
+        // count += filecount;
+    }
+    if (*index == 1)
+    {
+        if (flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audioArray[0][0];
+            data->message.file.info[*index].rom_data_len = audioArray[0][1];
+        }
+        *index += 1;
+    }
+    int decial = atoi(decStr);
+    if (decial > 0)
+    {
+        if (flag)
+        {
+            data->message.file.info[*index].path = NULL; 
+            data->message.file.info[*index].address = audiodot;
+            data->message.file.info[*index].rom_data_len = sizeof(audiodot);
+        }
+        *index += 1;
+        if (decial > 10)
+        {
+            int ten = decial / 10;
+            int unit = decial % 10;
+            if (ten != 0 && unit != 0)
+            {
+                if (flag)
+                {
+                    data->message.file.info[*index].path = NULL; 
+                    data->message.file.info[*index].address = audioArray[ten][0];
+                    data->message.file.info[*index].rom_data_len = audioArray[0][1];
+                }
+                *index += 1;
+                if(flag)
+                {
+                    data->message.file.info[*index].path = NULL; 
+                    data->message.file.info[*index].address = audioArray[unit][0];
+                    data->message.file.info[*index].rom_data_len = audioArray[0][1];
+                }
+                *index += 1;
+            }
+            else if(ten == 0 && unit!=0)
+            {
+                if (flag)
+                {
+                    data->message.file.info[*index].path = NULL; 
+                    data->message.file.info[*index].address = audioArray[0][0];
+                    data->message.file.info[*index].rom_data_len = audioArray[0][1];
+                }
+                *index += 1;
+                if(flag)
+                {
+                    data->message.file.info[*index].path = NULL; 
+                    data->message.file.info[*index].address = audioArray[unit][0];
+                    data->message.file.info[*index].rom_data_len = audioArray[0][1];
+                }
+                *index += 1;
+            }
+            else if(ten !=0 && unit == 0)
+            {
+                if (flag)
+                {
+                    data->message.file.info[*index].path = NULL; 
+                    data->message.file.info[*index].address = audioArray[0][0];
+                    data->message.file.info[*index].rom_data_len = audioArray[0][1];
+                }
+                *index += 1;
+            }
+        }
+        else
+        {
+            if (flag)
+            {
+                data->message.file.info[*index].path = NULL; 
+                data->message.file.info[*index].address = audioArray[decial][0];
+                data->message.file.info[*index].rom_data_len = audioArray[decial][1];
+            }
+            *index += 1;
+        }
+    }
+    if (flag)
+    {
+        data->message.file.info[*index].path = NULL; 
+        data->message.file.info[*index].address = audioyuan;
+        data->message.file.info[*index].rom_data_len = sizeof(audioyuan);
+    }
+    *index += 1;
+    return count;
+}
+
+static INT32 mqttPSUrcCallback(PsEventID eventID, void *param, UINT32 paramLen){
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    UINT8 rssi = 0;
+    NmAtiNetInfoInd *netif = NULL;
+
+    switch(eventID){
+        case PS_URC_ID_SIM_READY:{
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            break;
+        }
+        case PS_URC_ID_MM_SIGQ:{
+            CmiMmCesqInd *pMmCesqInd = (CmiMmCesqInd *)param;
+            rssi = mmGetCsqRssiFromCesq(pMmCesqInd->rsrp, pMmCesqInd->rsrq, pMmCesqInd->rssiCompensation);
+            DBG("RSSI signal=%d", rssi);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:{
+            DBG("Default bearer activated");
+            netStatus = true;
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:{
+            DBG("Default bearer Deactivated");
+            sendQueueMsg(QMSG_ID_NW_DISCONNECT, 0);
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:{
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:{
+            netif = (NmAtiNetInfoInd *)param;
+            if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED){
+                serverStatus = true;
+                netStatus = true;
+                DBG("netif acivated");
+                sendQueueMsg(QMSG_ID_NW_IPV4_READY, 0);
+            }else if (netif->netifInfo.netStatus == NM_NETIF_OOS){
+                DBG("PSIF network OOS");
+            }else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED ||
+                     netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL){
+                serverStatus = false;
+                netStatus = false;
+                DBG("PSIF network deactive");
+            }
+            break;
+        }
+        default:
+            break;
+    }
+    return 0;
+}
+void messageArrived(MessageData* data)
+{
+    if (memcmp(mqtt_sub_topic, data->topicName->lenstring.data, strlen(mqtt_sub_topic)) == 0)
+    {
+        cJSON *boss = NULL;
+        DBG("mqtt Message arrived on topic %.*s: %.*s\n", data->topicName->lenstring.len, data->topicName->lenstring.data, data->message->payloadlen, data->message->payload);
+        boss = cJSON_Parse((const char *)data->message->payload);
+        if (boss == NULL){
+            DBG("cjson parse fail");
+        }
+        else
+        {
+            DBG("cjson parse success");
+            cJSON *money = cJSON_GetObjectItem(boss, "money");
+            if(money == NULL)
+            {
+                DBG("Missing amount field %d", money);
+                return 0;
+            }
+            if (cJSON_IsString(money))
+            {
+                audioQueueData moneyPlay = {0};
+                moneyPlay.priority = MONEY_PLAY;
+                moneyPlay.playType = FILE_PLAY;
+                char* str = strstr(money->valuestring, ".");
+                //判断金额长度是否大于8个，也就是千万级别的金额，如果是，则播报收款成功，如果不是，则播报对应金额，这里并未对金额字段做合法性判断
+                if (str != NULL)
+                {
+                    if((str - money->valuestring) > 8)
+                    {
+                        moneyPlay.message.file.info = (audio_play_info_t *)calloc(1, sizeof(audio_play_info_t));
+                        moneyPlay.message.file.info->address = audioshoukuanchenggong;
+                        moneyPlay.message.file.info->rom_data_len = audioshoukuanchenggongSize;
+                        moneyPlay.message.file.count = 1;
+                    }
+                    else
+                    {
+                        //调用strToFile来将金额格式化为对应的文件播报数据，需要调用两次，第一次获取需要malloc的空间，第二次将文件数据放进空间里
+                        int index = 0;
+                        strToFile(money->valuestring, &moneyPlay, &index, false);
+                        moneyPlay.message.file.info = (audio_play_info_t *)calloc(index, sizeof(audio_play_info_t));
+                        index = 0;
+                        strToFile(money->valuestring, &moneyPlay, &index, true);
+                        moneyPlay.message.file.count = index;
+                    }
+                }
+                else
+                {
+                    if(strlen(money->valuestring) > 8)
+                    {
+                        moneyPlay.message.file.info = (audio_play_info_t *)calloc(1, sizeof(audio_play_info_t));
+                        moneyPlay.message.file.info->address = audioshoukuanchenggong;
+                        moneyPlay.message.file.info->rom_data_len = audioshoukuanchenggongSize;
+                        moneyPlay.message.file.count = 1;
+                    }
+                    else
+                    {
+                        str++;
+                        if(strlen(str) > 2)
+                        {
+                            moneyPlay.message.file.info = (audio_play_info_t *)calloc(1, sizeof(audio_play_info_t));
+                            moneyPlay.message.file.info->address = audioshoukuanchenggong;
+                            moneyPlay.message.file.info->rom_data_len = audioshoukuanchenggongSize;
+                            moneyPlay.message.file.count = 1;
+                        }
+                        else
+                        {
+                            //调用strToFile来将金额格式化为对应的文件播报数据，需要调用两次，第一次获取需要malloc的空间，第二次将文件数据放进空间里
+                            int index = 0;
+                            strToFile(money->valuestring, &moneyPlay, &index, false);
+                            moneyPlay.message.file.info = (audio_play_info_t *)calloc(index, sizeof(audio_play_info_t));
+                            index = 0;
+                            strToFile(money->valuestring, &moneyPlay, &index, true);
+                            moneyPlay.message.file.count = index;
+                        }
+                    }
+                }
+                if (pdTRUE != xQueueSend(audioQueueHandle, &moneyPlay, 0)){
+                    DBG("mqttsub xQueueSend error");
+                }
+            }
+            else
+            {
+                DBG("money data is invalid %d", cJSON_IsString(money));
+            }
+        }
+        cJSON_Delete(boss);
+    }
+}
+
+static void mqtt_demo(void){
+	int rc = 0;
+    MQTTClient mqttClient = {0};
+    Network mqttNetwork = {0};
+
+    MQTTMessage message = {0};
+    MQTTPacket_connectData connectData = MQTTPacket_connectData_initializer;
+    connectData.MQTTVersion = 4;
+    int ret = 0;
+    char str[32] = {0};
+    char clientId[17] = {0};
+    char username[17] = {0};
+    char password[17] = {0};
+    ret = am_kv_get("clientId", str, 17);           //从数据库中读取clientId，如果没读到，则用默认的
+    if(ret > 0 )
+    {
+        memcpy(clientId, str, 17);
+        connectData.clientID.cstring = clientId;
+    }
+    else
+    {
+        connectData.clientID.cstring = CLIENT_ID;
+    }
+    memset(str, 0, 32);
+    ret = am_kv_get("username", str, 17);           //从数据库中读取username，如果没读到，则用默认的
+    if(ret > 0 )
+    {
+        memcpy(username, str, 17);
+        connectData.username.cstring = username;
+    }
+    else
+    {
+        connectData.username.cstring = USERNAME;
+    }
+    memset(str, 0, 32);
+    ret = am_kv_get("password", str, 17);           //从数据库中读取password，如果没读到，则用默认的
+    if(ret > 0 )
+    {
+        memcpy(password, str, 17);
+        connectData.password.cstring = password;
+    }
+    else
+    {
+        connectData.password.cstring = PASSWORD;
+    }
+    memset(str, 0, 32);
+    DBG("test clientid %s", clientId);
+    DBG("test username %s", username);
+    DBG("test password %s", password);
+    
+    connectData.keepAliveInterval = 120;
+
+    mqtt_connect(&mqttClient, &mqttNetwork, MQTT_HOST, MQTT_PORT, &connectData);
+
+    if ((rc = MQTTSubscribe(&mqttClient, mqtt_sub_topic, 0, messageArrived)) != 0)
+        {
+        DBG("mqtt Return code from MQTT subscribe is %d\n", rc);
+            serverStatus = false;
+        }
+        else
+        {
+            serverStatus = true;
+            audioQueueData welcome = {0};
+            welcome.playType = TTS_PLAY;
+            welcome.priority = MONEY_PLAY;
+            char str[] = "服务器连接成功"; 
+            welcome.message.tts.data = malloc(sizeof(str));
+            memcpy(welcome.message.tts.data, str, sizeof(str));
+            welcome.message.tts.len = sizeof(str);
+            if (pdTRUE != xQueueSend(audioQueueHandle, &welcome, 0)){
+                DBG("mqttsub xQueueSend error");
+            }
+        }
+    
+    while(1){
+        int len = strlen(mqtt_send_payload);
+        message.qos = 1;
+		message.retained = 0;
+        message.payload = mqtt_send_payload;
+        message.payloadlen = len;
+        DBG("mqtt_demo send data");
+        MQTTPublish(&mqttClient, mqtt_pub_topic, &message);
+#if !defined(MQTT_TASK)
+		if ((rc = MQTTYield(&mqttClient, 1000)) != 0)
+			DBG("mqtt_demo Return code from yield is %d\n", rc);
+#endif
+        osDelay(60000);
+    }
+}
+
+
+static void mqttclient_task(void *param){
+    eventCallbackMessage_t *queueItem = NULL;
+    psEventQueueHandle = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(eventCallbackMessage_t*));
+    if (psEventQueueHandle == NULL){
+        DBG("psEventQueue create error!");
+        return;
+    }
+    registerPSEventCallback(PS_GROUP_ALL_MASK, mqttPSUrcCallback);
+    while(1){
+        if (xQueueReceive(psEventQueueHandle, &queueItem, portMAX_DELAY)){
+            switch(queueItem->messageId){
+                case QMSG_ID_NW_IPV4_READY:
+                case QMSG_ID_NW_IPV6_READY:
+                case QMSG_ID_NW_IPV4_6_READY:
+					mqtt_demo();
+                    break;
+                case QMSG_ID_NW_DISCONNECT:
+                    break;
+                default:
+                    break;
+            }
+            free(queueItem);
+        }
+    }
+	vTaskDelete(NULL);
+}
+
+static void mqttclient_task_init(void){
+	xTaskCreate(mqttclient_task, "", 4096, NULL, 20, NULL);
+}
+extern void usb_data_init(void);
+INIT_HW_EXPORT(usb_data_init, "1");
+INIT_DRV_EXPORT(fdb_init, "2");
+INIT_TASK_EXPORT(mqttclient_task_init, "2");
+INIT_TASK_EXPORT(audio_task_init, "2");
+INIT_TASK_EXPORT(key_pad_init, "2");
+INIT_TASK_EXPORT(charge_init, "2");
+INIT_TASK_EXPORT(led_task_init, "2");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/fdb_init.c

@@ -0,0 +1,32 @@
+#include "common_api.h"
+void fdb_init(void)
+{
+    am_kv_init();
+    char value[2];
+    int ret = am_kv_get("flag", &value, 2);
+    //读取kv数据库用户是否初始化过，如果没有，则写入一个flag和需要初始化的值，表示用户已初始化；如果用户初始化过，则不做任何操作
+    DBG("get value result %d", ret);
+    if (ret > 0)
+    {
+        DBG("get value %s", value);
+        if(memcmp("1", value, strlen("1")))
+        {
+            DBG("need init");
+            ret = am_kv_set("flag", "1", 2);
+            DBG("init result1 %d", ret);
+            int volume = 4;
+            ret = am_kv_set("volume", &volume, 1);
+        }
+        else
+        {
+            DBG("no need init");
+        }
+    }
+    else
+    {
+        ret = am_kv_set("flag", "1", 2);
+        int volume = 4;
+        ret = am_kv_set("volume", &volume, 1);
+        DBG("init result2 %d", ret);
+    }
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/key_pad.c

@@ -0,0 +1,313 @@
+#include "gpio.h"
+#include "pad.h"
+#include "slpman.h"
+#include "apmu_external.h"
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "timers.h"
+#include "pwrkey.h"
+#include "queue.h"
+#include "charge_management.h"
+#include "audio_task.h"
+#include "audio_extern.h"
+#define KEY1_MESSAGE 0x1
+#define KEY2_MESSAGE 0x2
+#define PWR_MESSAGE 0x3
+static QueueHandle_t padKeyEventQueueHandle;
+typedef struct
+{
+    uint32_t messageId;
+} padkeyQueueMsg_t;
+TimerHandle_t timerHandlePowerOff = NULL;
+TimerHandle_t timerHandlePower = NULL;
+extern QueueHandle_t audioQueueHandle;
+TimerCallbackFunction_t timerCb(TimerHandle_t xTimer)
+{
+    if (timerHandlePower == xTimer)
+    {
+        xTimerStart(timerHandlePowerOff, 3000);
+        audioQueueData audioQueueSend = {0};
+        audioQueueSend.playType = TTS_PLAY;
+        audioQueueSend.priority = MONEY_PLAY;
+        char str[] = "正在关机";
+        audioQueueSend.message.tts.data = malloc(sizeof(str));
+        memcpy(audioQueueSend.message.tts.data, str, sizeof(str));
+        audioQueueSend.message.tts.len = sizeof(str);
+        if (pdTRUE != xQueueSend(audioQueueHandle, &audioQueueSend, 0))
+        {
+            DBG("power off send audio fail");
+        }
+        DBG("power long press");
+    }
+    else if (timerHandlePowerOff == xTimer)
+    {
+        DBG("poweroff");
+        uniLogFlushOut();
+        pwrKeyStartPowerOff();
+    }
+}
+
+void pwrkeyStatusCb(pwrKeyPressStatus status)
+{
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    uint32_t msgId = PWR_MESSAGE;
+    switch (status)
+    {
+    case PWRKEY_RELEASE:
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+        portYIELD_FROM_ISR(pdTRUE);
+        break;
+    case PWRKEY_PRESS:
+        if (pdTRUE != xTimerStartFromISR(timerHandlePower, &xHigherPriorityTaskWoken))
+        {
+        }
+        portYIELD_FROM_ISR(pdTRUE);
+        break;
+    case PWRKEY_LONGPRESS:
+        break;
+    case PWRKEY_REPEAT:
+        break;
+    default:
+        break;
+    }
+}
+#define BUTTON_GPIO_INSTANCE 1
+#define BUTTON_GPIO_PIN 10
+static void GPIO_ISR()
+{
+    uint32_t msgId = KEY1_MESSAGE;
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    // Save current irq mask and diable whole port interrupts to get rid of interrupt overflow
+    uint16_t portIrqMask = GPIO_saveAndSetIrqMask(BUTTON_GPIO_INSTANCE);
+
+    if (GPIO_getInterruptFlags(BUTTON_GPIO_INSTANCE) & (1 << BUTTON_GPIO_PIN))
+    {
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+        GPIO_clearInterruptFlags(BUTTON_GPIO_INSTANCE, 1 << BUTTON_GPIO_PIN);
+    }
+
+    GPIO_restoreIrqMask(BUTTON_GPIO_INSTANCE, portIrqMask);
+    portYIELD_FROM_ISR(pdTRUE);
+}
+
+static void pad3IsrCb()
+{
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    uint8_t status = slpManGetWakeupPinValue();
+    uint32_t msgId = KEY2_MESSAGE;
+    if ((status & 0x8) == 0) //按下
+    {
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+    }
+    portYIELD_FROM_ISR(pdTRUE);
+}
+
+void padkeyIsrCb(int num)
+{
+    switch (num)
+    {
+    case 3:
+        pad3IsrCb();
+        break;
+    default:
+        break;
+    }
+}
+
+static void padKeyTask(void *arg)
+{
+    uint32_t msgId = 0;
+    int volume = 4;
+    int ret = 0;
+    while (1)
+    {
+        if (xQueueReceive(padKeyEventQueueHandle, &msgId, portMAX_DELAY))
+        {
+            switch (msgId)
+            {
+            case KEY1_MESSAGE:
+            {
+                audioQueueData volPlus = {0};
+                volPlus.playType = TTS_PLAY;
+                volPlus.priority = MONEY_PLAY;
+                volume = 4;
+                ret = am_kv_get("volume", &volume, 1);
+                if (ret > 0)
+                {
+                    if (volume < 7)
+                    {
+                        volume++;
+                        if (volume > 7)
+                        {
+                            volume = 7;
+                        }
+                        am_kv_set("volume", &volume, 1);
+                    }
+                    if (volume == 7)
+                    {
+                        char str[] = "音量最大";
+                        volPlus.message.tts.data = malloc(sizeof(str));
+                        memcpy(volPlus.message.tts.data, str, sizeof(str));
+                        volPlus.message.tts.len = sizeof(str);
+                    }
+                    else
+                    {
+                        char str[] = "音量加";
+                        volPlus.message.tts.data = malloc(sizeof(str));
+                        memcpy(volPlus.message.tts.data, str, sizeof(str));
+                        volPlus.message.tts.len = sizeof(str);
+                    }
+                }
+                else
+                {
+                    char str[] = "音量加";
+                    volPlus.message.tts.data = malloc(sizeof(str));
+                    memcpy(volPlus.message.tts.data, str, sizeof(str));
+                    volPlus.message.tts.len = sizeof(str);
+                }
+                if (pdTRUE != xQueueSend(audioQueueHandle, &volPlus, 0))
+                {
+                    DBG("key1 off send audio fail");
+                }
+                break;
+            }
+            case KEY2_MESSAGE:
+            {
+                audioQueueData volMinus = {0};
+                volMinus.playType = TTS_PLAY;
+                volMinus.priority = MONEY_PLAY;
+                volume = 4;
+                ret = am_kv_get("volume", &volume, 1);
+                if (ret > 0)
+                {
+                    if (volume > 1)
+                    {
+                        volume--;
+                        if (volume < 1)
+                        {
+                            volume = 1;
+                        }
+                        am_kv_set("volume", &volume, 1);
+                    }
+                    if (volume == 1)
+                    {
+                        char str[] = "音量最小";
+                        volMinus.message.tts.data = malloc(sizeof(str));
+                        memcpy(volMinus.message.tts.data, str, sizeof(str));
+                        volMinus.message.tts.len = sizeof(str);
+                    }
+                    else
+                    {
+                        char str[] = "音量减";
+                        volMinus.message.tts.data = malloc(sizeof(str));
+                        memcpy(volMinus.message.tts.data, str, sizeof(str));
+                        volMinus.message.tts.len = sizeof(str);
+                    }
+                }
+                else
+                {
+                    char str[] = "音量减";
+                    volMinus.message.tts.data = malloc(sizeof(str));
+                    memcpy(volMinus.message.tts.data, str, sizeof(str));
+                    volMinus.message.tts.len = sizeof(str);
+                }
+                if (pdTRUE != xQueueSend(audioQueueHandle, &volMinus, 0))
+                {
+                    DBG("key1 off send audio fail");
+                }
+                break;
+            }
+            case PWR_MESSAGE:
+            {
+                if (pdFALSE != xTimerIsTimerActive(timerHandlePower))
+                {
+                    xTimerStop(timerHandlePower, 5000);
+                    uint16_t vbat = getVbat();
+                    audioQueueData currentPower = {0};
+                    currentPower.priority = MONEY_PLAY;
+                    currentPower.playType = TTS_PLAY;
+                    if (vbat > 4000)
+                    {
+                        char str[] = "当前电量高";
+                        currentPower.message.tts.data = malloc(sizeof(str));
+                        memcpy(currentPower.message.tts.data, str, sizeof(str));
+                        currentPower.message.tts.len = sizeof(str);
+                    }
+                    else if (vbat > 3700 && vbat < 4000)
+                    {
+                        char str[] = "当前电量中";
+                        currentPower.message.tts.data = malloc(sizeof(str));
+                        memcpy(currentPower.message.tts.data, str, sizeof(str));
+                        currentPower.message.tts.len = sizeof(str);
+                    }
+                    else
+                    {
+                        char str[] = "当前电量低";
+                        currentPower.message.tts.data = malloc(sizeof(str));
+                        memcpy(currentPower.message.tts.data, str, sizeof(str));
+                        currentPower.message.tts.len = sizeof(str);
+                    }
+                    if (pdTRUE != xQueueSend(audioQueueHandle, &currentPower, 0))
+                    {
+                        DBG("power off send audio fail");
+                    }
+                }
+                break;
+            }
+            default:
+                break;
+            }
+        }
+    }
+    vTaskDelete(NULL);
+}
+
+void key_pad_init(void)
+{
+    if (timerHandlePower == NULL)
+    {
+        timerHandlePower = xTimerCreate("test", 3000, false, NULL, timerCb);
+    }
+    if (timerHandlePowerOff == NULL)
+    {
+        timerHandlePowerOff = xTimerCreate("test", 2000, false, NULL, timerCb);
+    }
+
+    padKeyEventQueueHandle = xQueueCreate(6, sizeof(padkeyQueueMsg_t));
+
+    APmuWakeupPadSettings_t wakeupPadSetting;
+    wakeupPadSetting.negEdgeEn = true;
+    wakeupPadSetting.posEdgeEn = false;
+    wakeupPadSetting.pullDownEn = false;
+    wakeupPadSetting.pullUpEn = true;
+    apmuSetWakeupPadCfg(WAKEUP_PAD_3, true, &wakeupPadSetting); // enable wakeup pad 3
+    NVIC_EnableIRQ(PadWakeup3_IRQn);
+
+    set_pad_wakeup_callback(padkeyIsrCb);
+    pwrKeyDly_t pwrKeyDlyCfg;
+    pwrKeyDlyCfg.longPressTimeout = 3000;
+    pwrKeyDlyCfg.repeatTimeout = 3000;
+    pwrKeyInit(PWRKEY_WAKEUP_LOWACTIVE_MODE, true, pwrKeyDlyCfg, pwrkeyStatusCb);
+
+    //目前云喇叭开发板上的key1用的是gpio，所以暂时作为gpio中断来使用，agpio休眠时仅可保持电平，不可用于中断,后续设计改为wakeup pad
+    PadConfig_t padConfig;
+    PAD_getDefaultConfig(&padConfig);
+    padConfig.mux = PAD_MUX_ALT0;
+    PAD_setPinConfig(46, &padConfig);
+    XIC_SetVector(PXIC1_GPIO_IRQn, GPIO_ISR);
+    XIC_EnableIRQ(PXIC1_GPIO_IRQn);
+    GpioPinConfig_t config;
+    config.pinDirection = GPIO_DIRECTION_INPUT;
+    config.misc.interruptConfig = GPIO_INTERRUPT_RISING_EDGE;
+    GPIO_pinConfig(BUTTON_GPIO_INSTANCE, BUTTON_GPIO_PIN, &config);
+    xTaskCreate(padKeyTask, "", 256, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/led_task.c

@@ -0,0 +1,117 @@
+
+#include "gpio.h"
+#include "pad.h"
+#include "slpman.h"
+#include "apmu_external.h"
+#include "common_api.h"
+#include "charge_management.h"
+#include "mqttStatus.h"
+#include "led_task.h"
+BOOL g_green_led_status = false;
+BOOL g_red_led_status = false;
+BOOL g_blue_led_status = false;
+#define GREEN_CTRL(level)                                                          \
+	do                                                                             \
+	{                                                                              \
+		GPIO_pinWrite(LED_GREEN_PORT, 1 << LED_GREEN_PIN, level << LED_GREEN_PIN); \
+	} while (0);
+#define RED_CTRL(level)                                                      \
+	do                                                                       \
+	{                                                                        \
+		GPIO_pinWrite(LED_RED_PORT, 1 << LED_RED_PIN, level << LED_RED_PIN); \
+	} while (0);
+#define BLUE_CTRL(level)                                                        \
+	do                                                                          \
+	{                                                                           \
+		GPIO_pinWrite(LED_BLUE_PORT, 1 << LED_BLUE_PIN, level << LED_BLUE_PIN); \
+	} while (0);
+
+static void led_task(void *param)
+{
+	DBG("entry this func");
+	slpManAONIOPowerOn();
+	PadConfig_t padConfig;
+	PAD_getDefaultConfig(&padConfig);
+	padConfig.mux = PAD_MUX_ALT0;
+	PAD_setPinConfig(LED_GREEN_PAD, &padConfig);
+	PAD_setPinConfig(LED_RED_PAD, &padConfig);
+	PAD_setPinConfig(LED_BLUE_PAD, &padConfig);
+	GpioPinConfig_t gpioConfig;
+	gpioConfig.pinDirection = GPIO_DIRECTION_OUTPUT;
+	gpioConfig.misc.initOutput = 0;
+
+	uint8_t ledHandler = 0xff;
+	slpManApplyPlatVoteHandle("ledSLP1Vote",&ledHandler); 
+	GPIO_pinConfig(LED_GREEN_PORT, LED_GREEN_PIN, &gpioConfig);
+	GPIO_pinConfig(LED_RED_PORT, LED_RED_PIN, &gpioConfig);
+	GPIO_pinConfig(LED_BLUE_PORT, LED_BLUE_PIN, &gpioConfig);
+	while (1)
+	{
+
+		if (!getNetStatus())
+		{
+			slpManPlatVoteDisableSleep(ledHandler, SLP_SLP1_STATE);
+			GREEN_CTRL(1);
+			BLUE_CTRL(0);
+			RED_CTRL(0);
+			g_green_led_status = true;
+			g_red_led_status = false;
+			g_blue_led_status = false;
+			slpManPlatVoteEnableSleep(ledHandler, SLP_SLP1_STATE);
+			
+			vTaskDelay(500);
+			
+			slpManPlatVoteDisableSleep(ledHandler, SLP_SLP1_STATE);
+			GREEN_CTRL(0);
+			BLUE_CTRL(0);
+			RED_CTRL(0);
+			g_green_led_status = false;
+			g_red_led_status = false;
+			g_blue_led_status = false;
+			slpManPlatVoteEnableSleep(ledHandler, SLP_SLP1_STATE);
+			vTaskDelay(500);
+		}
+		else if ((usb_portmon_vbuspad_level() == 1))
+		{
+			slpManPlatVoteDisableSleep(ledHandler, SLP_SLP1_STATE);
+			GREEN_CTRL(0);
+			BLUE_CTRL(0);
+			RED_CTRL(1);
+			g_green_led_status = false;
+			g_red_led_status = true;
+			g_blue_led_status = false;
+			slpManPlatVoteEnableSleep(ledHandler, SLP_SLP1_STATE);
+			vTaskDelay(500);
+		}
+		else if (getNetStatus() && !getServerStatus())
+		{
+			slpManPlatVoteDisableSleep(ledHandler, SLP_SLP1_STATE);
+			GREEN_CTRL(0);
+			BLUE_CTRL(1);
+			RED_CTRL(0);
+			g_green_led_status = false;
+			g_red_led_status = false;
+			g_blue_led_status = true;
+			slpManPlatVoteEnableSleep(ledHandler, SLP_SLP1_STATE);
+			vTaskDelay(1000);
+		}
+		else if (getServerStatus())
+		{
+			slpManPlatVoteDisableSleep(ledHandler, SLP_SLP1_STATE);
+			GREEN_CTRL(0);
+			BLUE_CTRL(1);
+			RED_CTRL(0);
+			g_green_led_status = false;
+			g_red_led_status = false;
+			g_blue_led_status = true;
+			slpManPlatVoteEnableSleep(ledHandler, SLP_SLP1_STATE);
+			vTaskDelay(1000);
+		}
+	}
+	vTaskDelete(NULL);
+}
+
+void led_task_init(void)
+{
+	xTaskCreate(led_task, "", 256, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/src/usb_data.c

@@ -0,0 +1,107 @@
+#include "commontypedef.h"
+#include "common_api.h"
+#include "cms_api.h"
+#include "ps_lib_api.h"
+static void usb_serial_input_dummy_cb(uint8_t channel, uint8_t *input, uint32_t len)
+{
+	DBG("usb serial get %d byte, test mode, send back", len);
+    DBG("usb serial get %s", input);
+
+    if (strcmp("AT+CLIENTID?\r\n", (char*)input) == 0)
+    {
+        char clientId[32] = {0};
+        int ret = am_kv_get("clientId", clientId, 16);
+        if(ret > 0 )
+        {
+           usb_serial_output(channel, clientId, strlen(clientId));
+        }
+        else
+        {
+            usb_serial_output(channel, "OK", strlen("OK"));
+        }
+    }
+    else if (strstr((char*)input, "AT+CLIENTID=") != NULL)
+    {
+        char *flag = NULL;
+        flag = strstr((char*)input, "=");
+        if(flag != NULL)
+        {
+            flag++;
+            char *flag2 = NULL;
+            flag2 = strstr(flag, "\r\n");
+            if (flag2 != NULL)
+            {
+                int ret = am_kv_set("clientId", flag, strlen(flag) - 2);
+                usb_serial_output(channel, "OK", strlen("OK"));
+            }
+            
+        }
+    }
+    else if (strcmp("AT+USERNAME?\r\n", (char*)input) == 0)
+    {
+        int ret = 0;
+        char name[32] = {0};
+        ret = am_kv_get("username", name, 31);
+        if (ret > 0)
+        {
+            usb_serial_output(channel, name, strlen(name));
+        }
+        else
+        {
+            usb_serial_output(channel, "OK", strlen("OK"));
+        }
+    }
+    else if (strstr((char*)input, "AT+USERNAME=")  != NULL)
+    {
+        char *flag = NULL;
+        flag = strstr((char*)input, "=");
+        if(flag != NULL)
+        {
+            flag++;
+            char *flag2 = NULL;
+            flag2 = strstr(flag, "\r\n");
+            if (flag2 != NULL)
+            {
+                int ret = am_kv_set("username", flag, strlen(flag) - 2);
+                usb_serial_output(channel, "OK", strlen("OK"));
+            }
+            
+        }
+    }
+    else if (strcmp("AT+PASSWORD?\r\n", (char*)input) == 0)
+    {
+        int ret = 0;
+        char name[32] = {0};
+        ret = am_kv_get("password", name, 31);
+        if (ret > 0)
+        {
+            usb_serial_output(channel, name, strlen(name));
+        }
+        else
+        {
+            usb_serial_output(channel, "OK", strlen("OK"));
+        }
+    }
+    else if (strstr((char*)input, "AT+PASSWORD=") != NULL)
+    {
+        char *flag = NULL;
+        flag = strstr((char*)input, "=");
+        if(flag != NULL)
+        {
+            flag++;
+            char *flag2 = NULL;
+            flag2 = strstr(flag, "\r\n");
+            if (flag2 != NULL)
+            {
+                int ret = am_kv_set("password", flag, strlen(flag) - 2);
+                usb_serial_output(channel, "OK", strlen("OK"));
+            }
+            
+        }
+    }
+}
+void usb_data_init(void)
+{
+	DBG("this hw demo1");
+	set_usb_serial_input_callback(usb_serial_input_dummy_cb);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/cloud_speaker/xmake.lua

@@ -0,0 +1,34 @@
+local TARGET_NAME = "cloud_speaker"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+includes(SDK_TOP .. "/thirdparty/audio_decoder")
+target(TARGET_NAME)
+    local LIB_DIR = "$(buildir)/mqttclient/"
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    add_deps("audio_decoder")
+    add_defines("MQTT_TASK",{public = true})
+
+    includes(SDK_TOP .. "/thirdparty/mqtt")
+    add_deps("mqtt")
+    includes(SDK_TOP .. "/thirdparty/cJSON")
+    -- --加入代码和头文件
+    add_includedirs(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src",{public = true})
+    add_files(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src/*.c",{public = true})
+    add_includedirs(SDK_TOP .. "/PLAT/core/tts/include/16k_lite_ver",{public = true})
+    --加入自己代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    add_includedirs("../../thirdparty/fal/inc",{public = true})
+    add_includedirs("../../thirdparty/flashdb/inc",{public = true})
+    add_includedirs("../../thirdparty/am_kv/inc",{public = true})
+    add_files("../../thirdparty/fal/src/*.c",{public = true})
+    add_files("../../thirdparty/flashdb/src/*.c",{public = true})
+    add_files("../../thirdparty/am_kv/src/*.c",{public = true})
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    LIB_USER = LIB_USER .. SDK_TOP .. "/PLAT/core/lib/libaisound50_16K_lite_beta.a "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/README.md

@@ -0,0 +1,4 @@
+# 说明
+
+* Air780E\Air600E\Air600EAC 云喇叭开发板测试程序
+* 在xmake.lua中打开不同的宏控来测试对应开发板的硬件功能

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/inc/audio_task.h

@@ -0,0 +1,40 @@
+#ifndef __AUDIO_TASK__
+#define __AUDIO_TASK__
+#include "queue.h"
+#include "audio_play.h"
+typedef struct
+{
+    uint32_t priority;
+    uint32_t playType;
+    union
+    {
+        struct
+        {
+            char *data;
+            uint8_t len;
+        } tts;
+        struct
+        {
+            audio_play_info_t *info;
+            uint8_t count;
+        } file;
+    } message;
+    void * userParam;
+} audioQueueData;
+
+typedef enum
+{
+    MONEY_PLAY = 0,
+    PAD_PLAY,
+    SYS_PLAY
+} AUDIO_PLAY_PRIORITY;
+
+typedef enum
+{
+    TTS_PLAY = 0,
+    FILE_PLAY,
+} AUDIO_PLAY_TYPE;
+
+
+void audio_task_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/inc/key_test.h

@@ -0,0 +1,4 @@
+#ifndef __KEY_TEST_H__
+#define __KEY_TEST_H__
+void key_pad_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/inc/led_test.h

@@ -0,0 +1,4 @@
+#ifndef __LED_TEST_H__
+#define __LED_TEST_H__
+void led_task_init(void);
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/src/audio_task.c

@@ -0,0 +1,184 @@
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "common_api.h"
+#include "audio_task.h"
+#include "timers.h"
+#include "portmacro.h"
+#include "audio_play.h"
+#include "ivTTS.h"
+#include "slpman.h"
+#include "gpio.h"
+#include "pad.h"
+#define WAIT_PLAY_FLAG (0x1)
+#include "common_api.h"
+#include "bsp_custom.h"
+#include "ostask.h"
+#include DEBUG_LOG_HEADER_FILE
+#include "plat_config.h"
+#include "audio_play.h"
+#include "audio_ll_drv.h"
+#include "FreeRTOS.h"
+#include "timers.h"
+#include "slpman.h"
+#include "osasys.h"
+#include "version.h"
+#include "ivTTS.h"
+extern const unsigned char audiopoweron[];
+static osEventFlagsId_t waitAudioPlayDone = NULL;
+QueueHandle_t audioQueueHandle = NULL;
+static uint8_t audio_sleep_handler = 0xff;
+static TimerHandle_t delay_timer;
+void audio_data_cb(uint8_t *data, uint32_t len, uint8_t bits, uint8_t channels)
+{
+    //这里可以对音频数据进行软件音量缩放，或者直接清空来静音
+    //软件音量缩放参考HAL_I2sSrcAdjustVolumn
+    DBG("%x,%d,%d,%d", data, len, bits, channels);
+}
+void app_pa_on(uint32_t arg)
+{
+#if defined(EVB_AIR600EAC_CLOUD_SPEAK) || (EVB_AIR600E_CLOUD_SPEAK)
+    GPIO_pinWrite(0, 1 << 10, 1 << 10);
+#elif defined(EVB_AIR780E_CLOUD_SPEAK)
+    GPIO_pinWrite(1, 1 << 9, 1 << 9);
+#endif
+}
+void audio_event_cb(uint32_t event, void *param)
+{
+    //	PadConfig_t pad_config;
+    //	GpioPinConfig_t gpio_config;
+
+    DBG("%d", event);
+    switch (event)
+    {
+    case MULTIMEDIA_CB_AUDIO_DECODE_START:
+        slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP1_STATE);
+        GPIO_pinWrite(0, 1 << 12, 1 << 12);
+        audio_play_write_blank_raw(0, 6);
+        break;
+    case MULTIMEDIA_CB_AUDIO_OUTPUT_START:
+        xTimerStart(delay_timer, 200);
+        break;
+    case MULTIMEDIA_CB_TTS_INIT:
+        if (4 == sizeof("你好"))
+        {
+            audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_GBK);
+        }
+        else
+        {
+            audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_UTF8);
+        }
+        break;
+    case MULTIMEDIA_CB_AUDIO_DONE:
+        xTimerStop(delay_timer, 0);
+        DBG("audio play done, result = %d!", audio_play_get_last_error(0));
+
+#if defined(EVB_AIR600EAC_CLOUD_SPEAK) || (EVB_AIR600E_CLOUD_SPEAK)
+        GPIO_pinWrite(0, 1 << 10, 0);
+#elif defined(EVB_AIR780E_CLOUD_SPEAK)
+        GPIO_pinWrite(1, 1 << 9, 0);
+#endif
+        GPIO_pinWrite(0, 1 << 12, 0);
+        slpManPlatVoteEnableSleep(audio_sleep_handler, SLP_SLP1_STATE);
+        osEventFlagsSet(waitAudioPlayDone, WAIT_PLAY_FLAG);
+        break;
+    }
+}
+
+void audio_task(void *param)
+{
+    audioQueueData audioQueueRecv = {0};
+    uint32_t result = 0;
+    while (1)
+    {
+        if (xQueueReceive(audioQueueHandle, &audioQueueRecv, portMAX_DELAY))
+        {
+            DBG("this is play priority %d", audioQueueRecv.priority);
+            DBG("this is play playType %d", audioQueueRecv.playType);
+            if (audioQueueRecv.priority == MONEY_PLAY)
+            {
+
+                if (audioQueueRecv.playType == TTS_PLAY)
+                {
+                    audio_play_tts_text(0, audioQueueRecv.message.tts.data, audioQueueRecv.message.tts.len);
+                }
+                else if (audioQueueRecv.playType == FILE_PLAY)
+                {
+                    audio_play_multi_files(0, audioQueueRecv.message.file.info, audioQueueRecv.message.file.count);
+                }
+            }
+            else if (audioQueueRecv.priority == PAD_PLAY)
+            {
+            }
+            result = osEventFlagsWait(waitAudioPlayDone, WAIT_PLAY_FLAG, osFlagsWaitAll, 20000);
+            if (audioQueueRecv.playType == TTS_PLAY)
+            {
+                DBG("free tts data");
+                free(audioQueueRecv.message.tts.data);
+            }
+            else if (audioQueueRecv.playType == FILE_PLAY)
+            {
+                free(audioQueueRecv.message.file.info);
+                DBG("free file data");
+            }
+        }
+    }
+    vTaskDelete(NULL);
+}
+
+void audio_task_init(void)
+{
+    PadConfig_t pad_config;
+    GpioPinConfig_t gpio_config;
+    PAD_getDefaultConfig(&pad_config);
+    pad_config.mux = PAD_MUX_ALT4;
+    pad_config.pullSelect = PAD_PULL_INTERNAL;
+    pad_config.pullDownEnable = PAD_PULL_DOWN_ENABLE;
+    PAD_setPinConfig(11, &pad_config); // SWCLK0 = GPIO12
+    gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    gpio_config.misc.initOutput = 0;
+    GPIO_pinConfig(0, 12, &gpio_config);
+    pad_config.mux = PAD_MUX_ALT0;
+#if defined(EVB_AIR600EAC_CLOUD_SPEAK) || (EVB_AIR600E_CLOUD_SPEAK)
+    PAD_setPinConfig(25, &pad_config); // PAD25 = GPIO10
+    GPIO_pinConfig(0, 10, &gpio_config);
+#elif defined(EVB_AIR780E_CLOUD_SPEAK)
+    PAD_setPinConfig(45, &pad_config);
+    GPIO_pinConfig(1, 9, &gpio_config);
+#endif
+
+    ivCStrA sdk_id = AISOUND_SDK_USERID;
+    slpManSetPmuSleepMode(true, SLP_SLP1_STATE, false);
+    slpManApplyPlatVoteHandle("audio", &audio_sleep_handler);
+
+    slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP2_STATE);
+    delay_timer = xTimerCreate(NULL, 200, 0, 0, app_pa_on);
+
+    audio_play_global_init(audio_event_cb, audio_data_cb, NULL);
+    audio_play_tts_set_resource(ivtts_16k_lite, sdk_id);
+//现在使用ES7149/ES7148，用如下配置，如果不是，请根据实际情况配置，bus_id直接写0
+#if defined(EVB_AIR600EAC_CLOUD_SPEAK)
+    Audio_CodecI2SInit(0, I2S_MODE_I2S, I2S_FRAME_SIZE_16_16);
+//如下配置可使用TM8211
+#elif defined(EVB_AIR780E_CLOUD_SPEAK) || (EVB_AIR600E_CLOUD_SPEAK)
+    Audio_CodecI2SInit(0, I2S_MODE_MSB, I2S_FRAME_SIZE_16_16);
+#endif
+
+    if (waitAudioPlayDone == NULL)
+    {
+        waitAudioPlayDone = osEventFlagsNew(NULL);
+    }
+    audioQueueHandle = xQueueCreate(100, sizeof(audioQueueData));
+    audioQueueData powerOn = {0};
+    powerOn.playType = TTS_PLAY;
+    powerOn.priority = MONEY_PLAY;
+    char str[] = "正在开机";
+    powerOn.message.tts.data = malloc(sizeof(str));
+    memcpy(powerOn.message.tts.data, str, sizeof(str));
+    powerOn.message.tts.len = sizeof(str);
+    if (pdTRUE != xQueueSend(audioQueueHandle, &powerOn, 0))
+    {
+        DBG("start send audio fail");
+    }
+    xTaskCreate(audio_task, " ", 2048, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/src/example_main.c

@@ -0,0 +1,123 @@
+#include "FreeRTOS.h"
+#include "queue.h"
+#include "task.h"
+#include "ps_event_callback.h"
+#include "networkmgr.h"
+#include "cmips.h"
+#include "audio_task.h"
+#include "bsp_common.h"
+#include "common_api.h"
+#include "key_test.h"
+#include "led_test.h"
+#include "cmimm.h"
+// static QueueHandle_t            psEventQueueHandle;
+extern QueueHandle_t            audioQueueHandle;
+
+static INT32 PSUrcCallback(PsEventID eventID, void *param, UINT32 paramLen){
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    UINT8 rssi = 0;
+    NmAtiNetInfoInd *netif = NULL;
+
+    switch(eventID){
+        case PS_URC_ID_SIM_READY:{
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            audioQueueData simReady = {0};
+            simReady.playType = TTS_PLAY;
+            simReady.priority = MONEY_PLAY;
+            char str[] = "流量卡已就绪"; 
+            simReady.message.tts.data = malloc(sizeof(str));
+            memcpy(simReady.message.tts.data, str, sizeof(str));
+            simReady.message.tts.len = sizeof(str);
+            if (pdTRUE != xQueueSend(audioQueueHandle, &simReady, 0))
+            {
+                DBG("start send audio fail");
+            }
+            break;
+        }
+        case PS_URC_ID_SIM_REMOVED:{
+            audioQueueData simReady = {0};
+            simReady.playType = TTS_PLAY;
+            simReady.priority = MONEY_PLAY;
+            char str[] = "流量卡未插入"; 
+            simReady.message.tts.data = malloc(sizeof(str));
+            memcpy(simReady.message.tts.data, str, sizeof(str));
+            simReady.message.tts.len = sizeof(str);
+            if (pdTRUE != xQueueSend(audioQueueHandle, &simReady, 0))
+            {
+                DBG("start send audio fail");
+            }
+            break;
+        }
+        case PS_URC_ID_MM_SIGQ:{
+            CmiMmCesqInd *pMmCesqInd = (CmiMmCesqInd *)param;
+            rssi = mmGetCsqRssiFromCesq(pMmCesqInd->rsrp, pMmCesqInd->rsrq, pMmCesqInd->rssiCompensation);
+            DBG("RSSI signal=%d", rssi);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:{
+            DBG("Default bearer activated");
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:{
+            DBG("Default bearer Deactivated");
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:{
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:{
+            netif = (NmAtiNetInfoInd *)param;
+            audioQueueData netStatusAudio = {0};
+            netStatusAudio.playType = TTS_PLAY;
+            netStatusAudio.priority = MONEY_PLAY;
+            if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED){
+                DBG("netif acivated");
+                char str[] = "网络注册成功"; 
+                netStatusAudio.message.tts.data = malloc(sizeof(str));
+                memcpy(netStatusAudio.message.tts.data, str, sizeof(str));
+                netStatusAudio.message.tts.len = sizeof(str);
+            }else if (netif->netifInfo.netStatus == NM_NETIF_OOS){
+                DBG("PSIF network OOS");
+                 //网络注册失败
+            }else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED ||   
+                     netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL){         
+                char str[] = "网络注册失败"; 
+                netStatusAudio.message.tts.data = malloc(sizeof(str));
+                memcpy(netStatusAudio.message.tts.data, str, sizeof(str));
+                netStatusAudio.message.tts.len = sizeof(str);  
+                DBG("PSIF network deactive");
+            }
+            if (pdTRUE != xQueueSend(audioQueueHandle, &netStatusAudio, 0))
+            {
+                DBG("start send audio fail");
+            }
+            break;
+        }
+        default:
+            break;
+    }
+    return 0;
+}
+
+
+static void ps_callback_task(void)
+{
+    registerPSEventCallback(PS_GROUP_ALL_MASK, PSUrcCallback);
+    while (1){
+        vTaskDelay(10000);
+    }
+    vTaskDelay(NULL);
+}
+
+static void demo_task(void *param)
+{
+    xTaskCreate(ps_callback_task, " ", 256, NULL, 20, NULL);
+}
+INIT_DRV_EXPORT(audio_task_init, "1");
+INIT_TASK_EXPORT(demo_task, "2");
+INIT_TASK_EXPORT(key_pad_init, "2");
+INIT_TASK_EXPORT(led_task_init, "2");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/src/key_test.c

@@ -0,0 +1,275 @@
+
+#include "gpio.h"
+#include "pad.h"
+#include "slpman.h"
+#include "apmu_external.h"
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "timers.h"
+#include "pwrkey.h"
+#include "queue.h"
+#include "audio_task.h"
+
+#if defined(EVB_AIR780E_CLOUD_SPEAK)
+#define BUTTON_GPIO_INSTANCE 1
+#define BUTTON_GPIO_PIN 10
+#elif defined(EVB_AIR600E_CLOUD_SPEAK) || (EVB_AIR600EAC_CLOUD_SPEAK)
+#define BUTTON_GPIO_INSTANCE 1
+#define BUTTON_GPIO_PIN 8
+#endif
+
+#define KEY1_MESSAGE 0x1
+#define KEY2_MESSAGE 0x2
+#define PWR_MESSAGE 0x3
+static QueueHandle_t padKeyEventQueueHandle;
+typedef struct
+{
+    uint32_t messageId;
+} padkeyQueueMsg_t;
+TimerHandle_t timerHandlePowerOff = NULL;
+TimerHandle_t timerHandlePower = NULL;
+extern QueueHandle_t audioQueueHandle;
+TimerCallbackFunction_t timerCb(TimerHandle_t xTimer)
+{
+    if (timerHandlePower == xTimer)
+    {
+        xTimerStart(timerHandlePowerOff, 3000);
+        audioQueueData audioQueueSend = {0};
+        audioQueueSend.playType = TTS_PLAY;
+        audioQueueSend.priority = MONEY_PLAY;
+        char str[] = "正在关机";
+        audioQueueSend.message.tts.data = malloc(sizeof(str));
+        memcpy(audioQueueSend.message.tts.data, str, sizeof(str));
+        audioQueueSend.message.tts.len = sizeof(str);
+        if (pdTRUE != xQueueSend(audioQueueHandle, &audioQueueSend, 0))
+        {
+            DBG("power off send audio fail");
+        }
+        DBG("power long press");
+    }
+    else if (timerHandlePowerOff == xTimer)
+    {
+        DBG("poweroff");
+        uniLogFlushOut();
+        pwrKeyStartPowerOff();
+    }
+}
+
+void pwrkeyStatusCb(pwrKeyPressStatus status)
+{
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    uint32_t msgId = PWR_MESSAGE;
+    switch (status)
+    {
+    case PWRKEY_RELEASE:
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+        portYIELD_FROM_ISR(pdTRUE);
+        break;
+    case PWRKEY_PRESS:
+        if (pdTRUE != xTimerStartFromISR(timerHandlePower, &xHigherPriorityTaskWoken))
+        {
+        }
+        portYIELD_FROM_ISR(pdTRUE);
+        break;
+    case PWRKEY_LONGPRESS:
+        break;
+    case PWRKEY_REPEAT:
+        break;
+    default:
+        break;
+    }
+}
+
+static void GPIO_ISR()
+{
+    uint32_t msgId = KEY1_MESSAGE;
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    // Save current irq mask and diable whole port interrupts to get rid of interrupt overflow
+    uint16_t portIrqMask = GPIO_saveAndSetIrqMask(BUTTON_GPIO_INSTANCE);
+
+    if (GPIO_getInterruptFlags(BUTTON_GPIO_INSTANCE) & (1 << BUTTON_GPIO_PIN))
+    {
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+        GPIO_clearInterruptFlags(BUTTON_GPIO_INSTANCE, 1 << BUTTON_GPIO_PIN);
+    }
+
+    GPIO_restoreIrqMask(BUTTON_GPIO_INSTANCE, portIrqMask);
+    portYIELD_FROM_ISR(pdTRUE);
+}
+#if defined(EVB_AIR780E_CLOUD_SPEAK)
+static void pad3IsrCb()
+{
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    uint8_t status = slpManGetWakeupPinValue();
+    uint32_t msgId = KEY2_MESSAGE;
+    if ((status & 0x8) == 0) //按下
+    {
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+    }
+    portYIELD_FROM_ISR(pdTRUE);
+}
+#elif defined(EVB_AIR600E_CLOUD_SPEAK) || (EVB_AIR600EAC_CLOUD_SPEAK)
+static void pad5IsrCb()
+{
+    BaseType_t xHigherPriorityTaskWoken;
+    xHigherPriorityTaskWoken = pdFALSE;
+    uint8_t status = slpManGetWakeupPinValue();
+    uint32_t msgId = KEY2_MESSAGE;
+    DBG("TEST LOG STATUS %d", status);
+    if ((status & 0x20) == 0) //按下
+    {
+        if (pdTRUE != xQueueSendFromISR(padKeyEventQueueHandle, &msgId, &xHigherPriorityTaskWoken))
+        {
+        }
+    }
+    portYIELD_FROM_ISR(pdTRUE);
+}
+#endif
+void padkeyIsrCb(int num)
+{
+    switch (num)
+    {
+#if defined(EVB_AIR780E_CLOUD_SPEAK)
+    case 3:
+        pad3IsrCb();
+        break;
+#elif defined(EVB_AIR600E_CLOUD_SPEAK) || (EVB_AIR600EAC_CLOUD_SPEAK)
+    case 5:
+        pad5IsrCb();
+        break;
+#endif
+    default:
+        break;
+    }
+}
+
+static void padKeyTask(void *arg)
+{
+    uint32_t msgId = 0;
+    while (1)
+    {
+        if (xQueueReceive(padKeyEventQueueHandle, &msgId, portMAX_DELAY))
+        {
+            switch (msgId)
+            {
+            case KEY1_MESSAGE:
+            {
+                audioQueueData key1 = {0};
+                key1.playType = TTS_PLAY;
+                key1.priority = MONEY_PLAY;
+                char str[] = "按键一";
+                key1.message.tts.data = malloc(sizeof(str));
+                memcpy(key1.message.tts.data, str, sizeof(str));
+                key1.message.tts.len = sizeof(str);
+                if (pdTRUE != xQueueSend(audioQueueHandle, &key1, 0))
+                {
+                    DBG("key1 off send audio fail");
+                }
+                break;
+            }
+            case KEY2_MESSAGE:
+            {
+                audioQueueData key2 = {0};
+                key2.playType = TTS_PLAY;
+                key2.priority = MONEY_PLAY;
+                char str[] = "按键二";
+                key2.message.tts.data = malloc(sizeof(str));
+                memcpy(key2.message.tts.data, str, sizeof(str));
+                key2.message.tts.len = sizeof(str);
+                if (pdTRUE != xQueueSend(audioQueueHandle, &key2, 0))
+                {
+                    DBG("key1 off send audio fail");
+                }
+                break;
+            }
+            case PWR_MESSAGE:
+            {
+                if (pdFALSE != xTimerIsTimerActive(timerHandlePower))
+                {
+                    xTimerStop(timerHandlePower, 5000);
+                    audioQueueData pwr = {0};
+                    pwr.priority = MONEY_PLAY;
+                    pwr.playType = TTS_PLAY;
+                    char str[] = "开关按下";
+                    pwr.message.tts.data = malloc(sizeof(str));
+                    memcpy(pwr.message.tts.data, str, sizeof(str));
+                    pwr.message.tts.len = sizeof(str);
+                    if (pdTRUE != xQueueSend(audioQueueHandle, &pwr, 0))
+                    {
+                        DBG("power off send audio fail");
+                    }
+                }
+                break;
+            }
+            default:
+                break;
+            }
+        }
+    }
+    vTaskDelete(NULL);
+}
+
+void key_pad_init(void)
+{
+    if (timerHandlePower == NULL)
+    {
+        timerHandlePower = xTimerCreate("test", 3000, false, NULL, timerCb);
+    }
+    if (timerHandlePowerOff == NULL)
+    {
+        timerHandlePowerOff = xTimerCreate("test", 2000, false, NULL, timerCb);
+    }
+
+    padKeyEventQueueHandle = xQueueCreate(6, sizeof(padkeyQueueMsg_t));
+
+#if defined(EVB_AIR780E_CLOUD_SPEAK)
+    APmuWakeupPadSettings_t wakeupPadSetting;
+    wakeupPadSetting.negEdgeEn = true;
+    wakeupPadSetting.posEdgeEn = false;
+    wakeupPadSetting.pullDownEn = false;
+    wakeupPadSetting.pullUpEn = true;
+    apmuSetWakeupPadCfg(WAKEUP_PAD_3, true, &wakeupPadSetting); // enable wakeup pad 3
+    NVIC_EnableIRQ(PadWakeup3_IRQn);
+#elif defined(EVB_AIR600E_CLOUD_SPEAK) || (EVB_AIR600EAC_CLOUD_SPEAK)
+    APmuWakeupPadSettings_t wakeupPadSetting;
+    wakeupPadSetting.negEdgeEn = true;
+    wakeupPadSetting.posEdgeEn = false;
+    wakeupPadSetting.pullDownEn = false;
+    wakeupPadSetting.pullUpEn = true;
+    apmuSetWakeupPadCfg(WAKEUP_PAD_5, true, &wakeupPadSetting); // enable wakeup pad 5
+    NVIC_EnableIRQ(PadWakeup5_IRQn);
+#endif
+
+    set_pad_wakeup_callback(padkeyIsrCb);
+    pwrKeyDly_t pwrKeyDlyCfg;
+    pwrKeyDlyCfg.longPressTimeout = 3000;
+    pwrKeyDlyCfg.repeatTimeout = 3000;
+    pwrKeyInit(PWRKEY_WAKEUP_LOWACTIVE_MODE, true, pwrKeyDlyCfg, pwrkeyStatusCb);
+
+    //目前云喇叭开发板上的key1用的是gpio，所以暂时作为gpio中断来使用，后续设计改为wakeup pad
+    PadConfig_t padConfig;
+    PAD_getDefaultConfig(&padConfig);
+    padConfig.mux = PAD_MUX_ALT0;
+#if defined(EVB_AIR780E_CLOUD_SPEAK)
+    PAD_setPinConfig(46, &padConfig);
+#elif defined(EVB_AIR600E_CLOUD_SPEAK) || (EVB_AIR600EAC_CLOUD_SPEAK)
+    PAD_setPinConfig(44, &padConfig);
+#endif
+    
+    XIC_SetVector(PXIC1_GPIO_IRQn, GPIO_ISR);
+    XIC_EnableIRQ(PXIC1_GPIO_IRQn);
+    GpioPinConfig_t config;
+    config.pinDirection = GPIO_DIRECTION_INPUT;
+    config.misc.interruptConfig = GPIO_INTERRUPT_RISING_EDGE;
+    GPIO_pinConfig(BUTTON_GPIO_INSTANCE, BUTTON_GPIO_PIN, &config);
+    xTaskCreate(padKeyTask, "", 256, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/src/led_test.c

@@ -0,0 +1,104 @@
+
+#include "gpio.h"
+#include "pad.h"
+#include "slpman.h"
+#include "apmu_external.h"
+#include "common_api.h"
+/*
+      600E      600EAC       780E
+LED1 GPIO26     GPIO26      GPIO27
+LED2 GPIO27     GPIO27      GPIO24
+LED3 GPIO20     GPIO20      GPIO23
+*/
+
+#if defined(EVB_AIR600EAC_CLOUD_SPEAK) || (EVB_AIR600E_CLOUD_SPEAK)
+#define LED1_PAD 46
+#define LED1_PORT 1
+#define LED1_PIN 10
+
+#define LED2_PAD 47
+#define LED2_PORT 1
+#define LED2_PIN 11
+
+#define LED3_PAD 40
+#define LED3_PORT 1
+#define LED3_PIN 4
+
+#elif defined(EVB_AIR780E_CLOUD_SPEAK)
+#define LED1_PAD 47
+#define LED1_PORT 1
+#define LED1_PIN 11
+
+#define LED2_PAD 44
+#define LED2_PORT 1
+#define LED2_PIN 8
+
+#define LED3_PAD 41
+#define LED3_PORT 1
+#define LED3_PIN 7
+
+#endif
+#define LED1_CTRL(level)                                            \
+    do                                                              \
+    {                                                               \
+        GPIO_pinWrite(LED1_PORT, 1 << LED1_PIN, level << LED1_PIN); \
+    } while (0);
+#define LED2_CTRL(level)                                            \
+    do                                                              \
+    {                                                               \
+        GPIO_pinWrite(LED2_PORT, 1 << LED2_PIN, level << LED2_PIN); \
+    } while (0);
+#define LED3_CTRL(level)                                            \
+    do                                                              \
+    {                                                               \
+        GPIO_pinWrite(LED3_PORT, 1 << LED3_PIN, level << LED3_PIN); \
+    } while (0);
+
+static void led_task(void *param)
+{
+    DBG("entry this func");
+    slpManAONIOPowerOn();
+    /*600E/600EAC开发板gpio20复用wakeup3，如果想用于io，则需要禁用wakeup3*/
+#if defined(EVB_AIR600EAC_CLOUD_SPEAK) || (EVB_AIR600E_CLOUD_SPEAK)
+    APmuWakeupPadSettings_t padSetting;
+    padSetting.negEdgeEn = false;
+    padSetting.posEdgeEn = false;
+    padSetting.pullDownEn = false;
+    padSetting.pullUpEn = false;
+    apmuSetWakeupPadCfg(WAKEUP_PAD_3, false, &padSetting);
+#endif
+    PadConfig_t padConfig;
+    PAD_getDefaultConfig(&padConfig);
+    padConfig.mux = PAD_MUX_ALT0;
+    PAD_setPinConfig(LED1_PAD, &padConfig);
+    PAD_setPinConfig(LED2_PAD, &padConfig);
+    PAD_setPinConfig(LED3_PAD, &padConfig);
+    GpioPinConfig_t gpioConfig;
+    gpioConfig.pinDirection = GPIO_DIRECTION_OUTPUT;
+    gpioConfig.misc.initOutput = 0;
+
+    GPIO_pinConfig(LED1_PORT, LED1_PIN, &gpioConfig);
+    GPIO_pinConfig(LED2_PORT, LED2_PIN, &gpioConfig);
+    GPIO_pinConfig(LED3_PORT, LED3_PIN, &gpioConfig);
+    while (1)
+    {
+        LED1_CTRL(1);
+        LED2_CTRL(0);
+        LED3_CTRL(0);
+        vTaskDelay(100);
+        LED1_CTRL(0);
+        LED2_CTRL(1);
+        LED3_CTRL(0);
+        vTaskDelay(100);
+        LED1_CTRL(0);
+        LED2_CTRL(0);
+        LED3_CTRL(1);
+        vTaskDelay(100);
+    }
+    vTaskDelete(NULL);
+}
+
+void led_task_init(void)
+{
+    xTaskCreate(led_task, "", 256, NULL, 20, NULL);
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/evb_test/xmake.lua

@@ -0,0 +1,23 @@
+local TARGET_NAME = "evb_test"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+includes(SDK_TOP .. "/thirdparty/audio_decoder")
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    add_deps("audio_decoder")
+    -- --加入代码和头文件
+    add_includedirs(SDK_TOP .. "/PLAT/core/tts/include/16k_lite_ver",{public = true})
+    --加入自己代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+    
+    add_defines("EVB_AIR780E_CLOUD_SPEAK",{public = true})
+    -- add_defines("EVB_AIR600E_CLOUD_SPEAK",{public = true})
+    -- add_defines("EVB_AIR600EAC_CLOUD_SPEAK",{public = true})
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    LIB_USER = LIB_USER .. SDK_TOP .. "/PLAT/core/lib/libaisound50_16K_lite_beta.a "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example/inc/RTE_Device.h

@@ -0,0 +1,349 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example/src/example_main.c

@@ -0,0 +1,101 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+static void usb_serial_input_dummy_cb(uint8_t channel, uint8_t *input, uint32_t len)
+{
+	DBG("usb serial get %dbyte, test mode, send back", len);
+	usb_serial_output(channel, input, len);
+}
+
+
+static void hw_demoA_init(void)
+{
+	DBG("this hw demo1");
+	set_usb_serial_input_callback(usb_serial_input_dummy_cb);
+}
+
+static void hw_demoB_init(void)
+{
+	DBG("this hw demo2");
+}
+
+static void dr_demoC_init(void)
+{
+	DBG("this dr demo1");
+}
+
+static void dr_demoD_init(void)
+{
+	DBG("this dr demo2");
+}
+
+static void task1(void *param)
+{
+	char sn[64];
+	memset(sn, 0, sizeof(sn));
+	soc_get_sn(sn, sizeof(sn));
+	DBG("%s", sn);
+	while(1)
+	{
+		vTaskDelay(1000);
+		DBG("utc %u", soc_get_utc());
+	}
+	vTaskDelete(NULL);
+}
+
+static void task2(void *param)
+{
+	while(1)
+	{
+		vTaskDelay(1000);
+		DBG("utc ms %llu", soc_get_utc_ms());
+	}
+	vTaskDelete(NULL);
+}
+
+static void task_demoE_init(void)
+{
+	xTaskCreate(task1, "", 256, NULL, 20, NULL);
+}
+
+static void task_demoF_init(void)
+{
+	xTaskCreate(task2, "", 256, NULL, 20, NULL);
+}
+
+//启动hw_demoA_init，启动位置硬件初始1级
+INIT_HW_EXPORT(hw_demoA_init, "1");
+//启动hw_demoB_init，启动位置硬件初始2级
+INIT_HW_EXPORT(hw_demoB_init, "2");
+//启动dr_demoC_init，启动位置驱动1级
+INIT_DRV_EXPORT(dr_demoC_init, "1");
+//启动dr_demoD_init，启动位置驱动2级
+INIT_DRV_EXPORT(dr_demoD_init, "2");
+//启动task_demoE_init，启动位置任务1级
+INIT_TASK_EXPORT(task_demoE_init, "1");
+//启动task_demoF_init，启动位置任务2级
+INIT_TASK_EXPORT(task_demoF_init, "2");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example/xmake.lua

@@ -0,0 +1,21 @@
+local TARGET_NAME = "example"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/include/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/include/amr_10_data.h

@@ -0,0 +1,46 @@
+const unsigned char amr_10_data[] =
+{
+   0x23, 0x21, 0x41, 0x4D, 0x52, 0x0A, 0x3C, 0xD1, 0xEB, 0x45, 0x38, 0x17, 0x4B, 0xC7, 0xEC, 
+   0xAC, 0x4E, 0xCF, 0xE5, 0x37, 0x62, 0x13, 0x80, 0x00, 0x2C, 0x5C, 0xA3, 0xDA, 0x63, 0x3C, 0x00, 
+   0x05, 0x44, 0xD4, 0xDE, 0xA5, 0x9C, 0xB0, 0x3C, 0x91, 0xBB, 0x0D, 0x95, 0x72, 0xFB, 0x9F, 0x8F, 
+   0x1D, 0xD0, 0xFB, 0xDA, 0x41, 0x8C, 0x4D, 0x7E, 0x6C, 0xAE, 0x61, 0x27, 0xEB, 0xD7, 0x6B, 0x58, 
+   0x7A, 0x96, 0xFD, 0x47, 0x4B, 0x45, 0xE0, 0x3C, 0xB9, 0xEA, 0xB7, 0xC0, 0xB6, 0x32, 0x07, 0x1E, 
+   0x0D, 0xC4, 0x6A, 0xAA, 0x9C, 0x80, 0x4F, 0xFA, 0xA7, 0x72, 0x90, 0x8E, 0x0C, 0x8B, 0x69, 0xD7, 
+   0x4B, 0x15, 0xB1, 0x77, 0x55, 0x6F, 0x80, 0x3C, 0xB9, 0xE8, 0xB3, 0xBA, 0xEB, 0xDC, 0x4F, 0x5E, 
+   0x1D, 0xC1, 0x0A, 0xA2, 0xD4, 0x1E, 0x7C, 0xED, 0xDE, 0x0D, 0x02, 0xE1, 0x3C, 0x74, 0xB8, 0x78, 
+   0xD5, 0x8E, 0x22, 0x6E, 0xB5, 0x11, 0x50, 0x3C, 0xC3, 0xE0, 0xB9, 0xC8, 0x28, 0x60, 0x83, 0x5E, 
+   0x16, 0xE1, 0x8F, 0xB6, 0x8D, 0x90, 0xD5, 0xA9, 0x98, 0xDE, 0xFD, 0xD5, 0xE6, 0xF4, 0x07, 0x85, 
+   0xDB, 0x97, 0xEC, 0x3A, 0xB2, 0xD6, 0xB0, 0x3C, 0xB9, 0xE4, 0xB5, 0xC2, 0x40, 0x66, 0x1A, 0x1E, 
+   0x0A, 0xC0, 0x2A, 0xEA, 0x49, 0xE3, 0x97, 0xFD, 0x61, 0x04, 0x95, 0xC8, 0xD1, 0x7D, 0x00, 0xBC, 
+   0xCB, 0x39, 0xE0, 0x10, 0x58, 0x8F, 0x90, 0x3C, 0xB9, 0xDA, 0xB9, 0xB9, 0xE4, 0x5C, 0x18, 0x7E, 
+   0x16, 0xF1, 0xBF, 0x34, 0x87, 0x59, 0x0F, 0x82, 0xA5, 0xA6, 0x03, 0x11, 0x99, 0xCD, 0xEF, 0x5E, 
+   0xA9, 0xEE, 0x5F, 0xA8, 0xD0, 0x1F, 0xA0, 0x3C, 0xC3, 0xE4, 0xB5, 0xC1, 0x20, 0x10, 0x09, 0x5E, 
+   0x1B, 0x6E, 0xEA, 0x93, 0x46, 0x05, 0xC7, 0xD3, 0x95, 0x92, 0x31, 0xB4, 0xEF, 0xCD, 0x04, 0x10, 
+   0xF7, 0x4A, 0x64, 0x74, 0x9A, 0xC5, 0x90, 0x3C, 0xB5, 0xE0, 0xBD, 0xC5, 0xD0, 0x6C, 0x02, 0xDE, 
+   0x05, 0x81, 0x3A, 0x9C, 0xD8, 0xDB, 0x2C, 0xC5, 0x02, 0xC6, 0xAD, 0xE4, 0xA1, 0x4D, 0x37, 0x75, 
+   0x63, 0x43, 0xA0, 0xFB, 0x2C, 0x4A, 0xF0, 0x3C, 0x01, 0xB5, 0x10, 0x99, 0x72, 0x8C, 0x52, 0x9E, 
+   0x1E, 0x8B, 0x9A, 0x06, 0x5E, 0xB6, 0xA8, 0xC3, 0x98, 0x92, 0xB7, 0xD9, 0x4F, 0x87, 0x4D, 0x15, 
+   0x54, 0x0F, 0xC5, 0x1E, 0x4B, 0xED, 0xC0, 0x3C, 0x42, 0x1D, 0x3C, 0xF9, 0x81, 0x94, 0x7A, 0x5E, 
+   0x16, 0x90, 0xCA, 0x15, 0x46, 0x59, 0xE0, 0xFC, 0x73, 0xB4, 0x02, 0xC6, 0xB5, 0xC0, 0xC0, 0xA2, 
+   0x22, 0x5B, 0x7B, 0x75, 0x08, 0x90, 0xA0, 0x3C, 0x04, 0xA6, 0xB3, 0xA1, 0x81, 0x83, 0xEA, 0x9E, 
+   0x0F, 0x84, 0xDA, 0xB9, 0xC6, 0xA2, 0x91, 0xC1, 0x5F, 0x9F, 0xCB, 0x86, 0xD2, 0x3D, 0x3D, 0x6C, 
+   0x55, 0x03, 0xC6, 0xB8, 0x47, 0xAB, 0xD0, 0x3C, 0x1E, 0x26, 0x98, 0xF9, 0x83, 0x42, 0xD7, 0x1E, 
+   0x0D, 0x2A, 0xCF, 0x99, 0x68, 0xD3, 0xE2, 0x90, 0x0F, 0x9E, 0x65, 0x97, 0x73, 0xD9, 0x8B, 0x25, 
+   0xAE, 0xB4, 0x80, 0xAE, 0x8E, 0x81, 0x20, 0x3C, 0x0E, 0xB3, 0x07, 0xA1, 0x84, 0xBB, 0xF0, 0xFE, 
+   0x1E, 0xD5, 0x5A, 0xC0, 0x96, 0x36, 0xE4, 0xC0, 0x3B, 0xBC, 0x27, 0x93, 0x39, 0x69, 0x1F, 0xFB, 
+   0x18, 0x68, 0x44, 0x8A, 0x7F, 0x16, 0xD0, 0x3C, 0x26, 0x18, 0xB1, 0xA1, 0x81, 0x6B, 0x86, 0xDE, 
+   0x93, 0x3F, 0x1F, 0xF3, 0x71, 0x38, 0x82, 0x86, 0x22, 0xA3, 0x07, 0x6A, 0x16, 0xEE, 0x0D, 0x09, 
+   0x71, 0x49, 0x2F, 0x86, 0x28, 0x0B, 0x90, 0x3C, 0x1E, 0x1A, 0xAE, 0xA0, 0x7D, 0xBF, 0xC2, 0x3E, 
+   0x0C, 0x7D, 0x1B, 0x3B, 0xB1, 0x18, 0x65, 0x40, 0x25, 0x7E, 0x97, 0x04, 0x6E, 0x01, 0x4D, 0xC8, 
+   0xC2, 0xA4, 0xEA, 0x00, 0xEF, 0x57, 0xD0, 0x3C, 0x26, 0x13, 0x0D, 0x98, 0x72, 0xCD, 0xE0, 0x9E, 
+   0x19, 0x2A, 0xDA, 0x83, 0x1D, 0xB1, 0x36, 0xEA, 0x13, 0x34, 0xBA, 0x6B, 0x28, 0xBD, 0x4B, 0x7E, 
+   0xC2, 0xFE, 0xE1, 0xB9, 0x66, 0x80, 0x00, 0x3C, 0x20, 0x38, 0x88, 0x38, 0x64, 0x81, 0xE1, 0xDF, 
+   0x0A, 0xD4, 0x2C, 0x01, 0xC7, 0xE8, 0x35, 0x32, 0xAB, 0x83, 0x39, 0xCC, 0x97, 0x4A, 0x64, 0x53, 
+   0xD1, 0xE5, 0x73, 0xFA, 0x09, 0x9F, 0xA0, 0x3C, 0xF3, 0x7A, 0x91, 0xF8, 0x4A, 0x2A, 0x5A, 0x5E, 
+   0x14, 0x7D, 0x8A, 0xE4, 0xE3, 0xD2, 0x19, 0xF6, 0xC0, 0x22, 0xA7, 0xF4, 0x4B, 0x31, 0x04, 0x04, 
+   0x32, 0xF2, 0x5A, 0xED, 0x99, 0x6F, 0x80, 0x3C, 0x1E, 0x3C, 0x7B, 0x28, 0x19, 0xC0, 0x5A, 0x0D, 
+   0x32, 0xD5, 0x1A, 0x9F, 0xCA, 0xF3, 0xD5, 0xCC, 0x0B, 0xC8, 0x96, 0xDF, 0x7C, 0xE0, 0x5E, 0x61, 
+   0x26, 0xBF, 0x98, 0x25, 0xB9, 0x4B, 0x20, 0x3C, 0x1C, 0x41, 0x1C, 0x30, 0x13, 0x92, 0x08, 0x81, 
+   0xD9, 0x82, 0x8B, 0xA7, 0x57, 0x29, 0xD4, 0x47, 0x7F, 0x1A, 0x9C, 0x33, 0x50, 0xE0, 0xC9, 0x2B, 
+   0x66, 0x77, 0x00, 0x36, 0xA1, 0xE4, 0x20, 
+};

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/include/amr_2_data.h

@@ -0,0 +1,28 @@
+const unsigned char amr_2_data[] =
+{
+   0x23, 0x21, 0x41, 0x4D, 0x52, 0x0A, 0x3C, 0x9B, 0x36, 0x1C, 0x60, 0xB4, 0x01, 0xE7, 0xEE, 
+   0xCE, 0x4B, 0xBF, 0xF6, 0x74, 0x72, 0x62, 0x80, 0x00, 0x37, 0xCF, 0xCE, 0xF2, 0xE1, 0xE4, 0x00, 
+   0x02, 0x3C, 0xBB, 0x5F, 0xB3, 0x49, 0xA0, 0x3C, 0x6A, 0x72, 0x20, 0x10, 0x18, 0x43, 0xE2, 0xCF, 
+   0x17, 0x80, 0xDC, 0xCE, 0xF0, 0xB1, 0xEA, 0x14, 0x32, 0x4F, 0x4B, 0xDB, 0x09, 0xB0, 0x89, 0xC0, 
+   0x47, 0x8D, 0x68, 0x8E, 0xD1, 0xF2, 0xE0, 0x3C, 0x8A, 0xF1, 0x91, 0x58, 0x12, 0xAB, 0xF4, 0xBE, 
+   0x0B, 0x2A, 0x9A, 0x3A, 0xDE, 0x72, 0xF2, 0xE1, 0x2B, 0x21, 0xB4, 0xFB, 0x8C, 0xB0, 0x3B, 0x30, 
+   0x6E, 0xC0, 0x6C, 0x83, 0xE1, 0xDE, 0x10, 0x3C, 0x40, 0x71, 0x88, 0x08, 0x18, 0x03, 0xE1, 0x7E, 
+   0x09, 0x80, 0xDA, 0x69, 0x34, 0x33, 0x5D, 0xC3, 0x78, 0xC9, 0x25, 0xC3, 0x90, 0x46, 0x5C, 0x54, 
+   0x10, 0xE0, 0x05, 0x60, 0xB8, 0x93, 0xA0, 0x3C, 0x42, 0x67, 0x95, 0x08, 0x18, 0x3E, 0x79, 0xFE, 
+   0x07, 0x86, 0x5A, 0xFC, 0xB8, 0x84, 0x56, 0xDA, 0xC3, 0x64, 0x16, 0x1C, 0x4A, 0x26, 0x14, 0x61, 
+   0xF8, 0x7D, 0x8C, 0xEE, 0x1E, 0x46, 0x40, 0x3C, 0x26, 0x69, 0x9B, 0x00, 0x1B, 0x10, 0xF3, 0x1E, 
+   0x09, 0x98, 0x4A, 0x3B, 0x34, 0x2E, 0x1B, 0xC1, 0x10, 0x8C, 0xE3, 0x1F, 0xA6, 0xFD, 0xE7, 0x8D, 
+   0x7F, 0x16, 0xC5, 0xC3, 0xE2, 0x61, 0xD0, 0x3C, 0x44, 0x62, 0x16, 0x00, 0x35, 0x19, 0x68, 0x1E, 
+   0x19, 0x8D, 0x2A, 0xF2, 0x4A, 0xB4, 0x97, 0xF7, 0xA3, 0x8D, 0x86, 0xE0, 0x24, 0x00, 0x68, 0x8F, 
+   0x13, 0x24, 0x61, 0xB3, 0x50, 0xF3, 0xC0, 0x3C, 0x44, 0x52, 0x15, 0x00, 0x63, 0x80, 0x5B, 0x9E, 
+   0x0D, 0x92, 0x4F, 0xBC, 0x8A, 0xB7, 0x71, 0xCC, 0x2C, 0x0C, 0x00, 0x6C, 0xAF, 0x5A, 0x6A, 0xAB, 
+   0x71, 0xF3, 0x41, 0x87, 0x12, 0xCB, 0xC0, 0x3C, 0x1A, 0x55, 0x95, 0x60, 0x6D, 0xEE, 0x52, 0xDE, 
+   0x0B, 0xB2, 0x0A, 0xD2, 0x38, 0x73, 0x4A, 0xCA, 0x9F, 0x94, 0x03, 0x94, 0x44, 0x60, 0x42, 0x6D, 
+   0x13, 0xEA, 0x63, 0xEA, 0xFC, 0x8E, 0x70, 0x3C, 0xE0, 0x62, 0x1B, 0x58, 0xDD, 0x4E, 0x12, 0xCB, 
+   0x5C, 0x69, 0x1F, 0x1B, 0x4C, 0xEB, 0x57, 0xF2, 0x73, 0x9A, 0xF8, 0x7A, 0xA7, 0x5D, 0x79, 0xF2, 
+   0xC0, 0x7F, 0xE6, 0x02, 0x52, 0x14, 0x30, 0x3C, 0x1A, 0x53, 0x7F, 0x89, 0xB5, 0xD7, 0x48, 0x3C, 
+   0x27, 0x8B, 0x18, 0x65, 0x35, 0xB9, 0x65, 0x10, 0x9C, 0x17, 0x03, 0xF6, 0xB9, 0x1D, 0x85, 0x75, 
+   0x8E, 0x87, 0x90, 0xAD, 0x17, 0x1C, 0x10, 0x3C, 0xE0, 0x4B, 0x63, 0x51, 0x4E, 0x44, 0x18, 0x18, 
+   0x01, 0x34, 0xE8, 0xD1, 0x1A, 0x6F, 0xA2, 0x7E, 0xAD, 0xD9, 0x95, 0x8E, 0x9B, 0x0C, 0xA6, 0x33, 
+   0x08, 0x45, 0x49, 0x36, 0xF3, 0xEF, 0x20, 
+};

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/include/amr_alipay_data.h

@@ -0,0 +1,104 @@
+const unsigned char amr_alipay_data[] =
+{
+   0x23, 0x21, 0x41, 0x4D, 0x52, 0x0A, 0x3C, 0x71, 0xC7, 0x43, 0xD9, 0x06, 0xA3, 0x81, 0xAC, 
+   0xAC, 0x4B, 0xBF, 0xC5, 0x65, 0x62, 0x27, 0xC0, 0x00, 0x7B, 0x97, 0xE2, 0x73, 0xAA, 0x6C, 0x00, 
+   0x07, 0x3E, 0xFA, 0xC1, 0x76, 0x0C, 0x60, 0x3C, 0x55, 0xE8, 0xFF, 0xD4, 0xCF, 0x2E, 0x1E, 0x5E, 
+   0x04, 0x03, 0x18, 0x4B, 0x71, 0x95, 0xD6, 0xCB, 0xF6, 0x88, 0xBE, 0x63, 0x3A, 0x0C, 0x6A, 0xA7, 
+   0x05, 0x35, 0x43, 0x28, 0x53, 0xEE, 0xF0, 0x3C, 0xB5, 0xDA, 0xB1, 0xCB, 0x30, 0x53, 0x23, 0x9E, 
+   0x0A, 0x67, 0x8F, 0xE2, 0x78, 0x01, 0x1C, 0xB4, 0x81, 0x57, 0xEB, 0xFF, 0x84, 0x0B, 0x10, 0x70, 
+   0xA0, 0x41, 0x60, 0x2A, 0xD5, 0x03, 0x00, 0x3C, 0xF3, 0xB6, 0xB5, 0xC7, 0x7D, 0x8C, 0x1B, 0x5E, 
+   0x16, 0x48, 0x07, 0x94, 0xB5, 0xB0, 0xEA, 0x3F, 0xC7, 0x6A, 0xE5, 0xE0, 0xC3, 0x8B, 0x5C, 0x0F, 
+   0xE0, 0xFB, 0xA6, 0x3A, 0xB6, 0x7F, 0x20, 0x3C, 0x2E, 0x0E, 0x88, 0xB8, 0x01, 0xAC, 0x16, 0x7E, 
+   0x12, 0x0A, 0x59, 0x56, 0x9D, 0xBF, 0x05, 0xA4, 0x7A, 0xF7, 0xAD, 0x38, 0x31, 0x59, 0xD5, 0x9C, 
+   0x40, 0x57, 0xF8, 0x96, 0xC5, 0x13, 0x00, 0x3C, 0x24, 0xB8, 0x95, 0xB8, 0x01, 0xE7, 0xC3, 0x1E, 
+   0x06, 0x1B, 0x52, 0xF8, 0xBD, 0x44, 0x94, 0xD2, 0xA7, 0x0C, 0x96, 0x79, 0xCF, 0x80, 0xD5, 0x43, 
+   0x9F, 0x90, 0x5F, 0xF2, 0x87, 0xEB, 0x70, 0x3C, 0x2C, 0xAD, 0x29, 0x28, 0x01, 0x85, 0x0C, 0xFE, 
+   0x0C, 0x18, 0x0B, 0xE9, 0x6D, 0x9B, 0x60, 0xEC, 0xD3, 0x66, 0xD1, 0x88, 0x11, 0xF9, 0x3C, 0x94, 
+   0xD8, 0xC0, 0xF0, 0x13, 0x22, 0x7E, 0x30, 0x3C, 0x2C, 0xAC, 0x9A, 0xB0, 0xAA, 0x76, 0x11, 0xDC, 
+   0x22, 0x0F, 0xBB, 0x59, 0x0B, 0xEC, 0xF5, 0xFC, 0x9E, 0x59, 0x10, 0xD1, 0x53, 0x42, 0xA4, 0x69, 
+   0x27, 0xBC, 0x1A, 0xBB, 0x6D, 0x53, 0xF0, 0x3C, 0x2F, 0x9F, 0x1D, 0x8C, 0x2F, 0xBA, 0x00, 0x6B, 
+   0x55, 0x4F, 0x2F, 0xD9, 0x15, 0xAF, 0x5B, 0x44, 0x33, 0xFF, 0x89, 0xA8, 0xBE, 0xB0, 0x42, 0x66, 
+   0x25, 0x23, 0xB6, 0xF9, 0x61, 0x46, 0x40, 0x3C, 0xB5, 0x13, 0x34, 0xA4, 0x42, 0x30, 0x09, 0x45, 
+   0xBA, 0x5F, 0x3A, 0xDF, 0x82, 0xF6, 0x44, 0xE8, 0x95, 0x75, 0x5B, 0x3C, 0xAB, 0x3D, 0xC9, 0xF2, 
+   0xA6, 0x8F, 0xC7, 0xA1, 0xEE, 0xEA, 0xC0, 0x3C, 0xF3, 0x3E, 0x59, 0x41, 0x54, 0xF2, 0x10, 0xBE, 
+   0x02, 0x01, 0x77, 0x37, 0x99, 0xEE, 0xDB, 0x86, 0xB2, 0xF7, 0x6B, 0x82, 0x7E, 0xF9, 0xA0, 0xBE, 
+   0x53, 0xF9, 0x96, 0x90, 0xBF, 0x0F, 0xE0, 0x3C, 0x37, 0x7A, 0x02, 0x50, 0x00, 0x82, 0x74, 0x54, 
+   0xAA, 0x18, 0xCF, 0xF3, 0x94, 0xEF, 0x4E, 0xA8, 0x28, 0x8E, 0x14, 0x1C, 0xBF, 0xDE, 0x94, 0xA1, 
+   0xE3, 0x64, 0x7C, 0x59, 0x35, 0x1E, 0xF0, 0x3C, 0x1C, 0x44, 0x0D, 0xE8, 0x01, 0xBB, 0xE1, 0xD8, 
+   0x62, 0x34, 0x5F, 0xD5, 0xCF, 0xEB, 0x91, 0x8A, 0x0E, 0x7B, 0x5D, 0x82, 0x0D, 0xC1, 0xFD, 0x75, 
+   0x9E, 0x6D, 0x34, 0x57, 0x5E, 0xD0, 0x10, 0x3C, 0x24, 0x1D, 0xBE, 0x38, 0x06, 0xE1, 0x85, 0x12, 
+   0xCC, 0xEF, 0x5F, 0xBD, 0x1F, 0x57, 0x3D, 0x9F, 0x97, 0x64, 0x29, 0xBC, 0x8E, 0x9B, 0xF9, 0xE1, 
+   0x91, 0xDC, 0xF2, 0xBF, 0xB2, 0x2A, 0xC0, 0x3C, 0x06, 0x19, 0x9F, 0x51, 0x5C, 0xFB, 0x44, 0x70, 
+   0x6C, 0xBF, 0x4B, 0xFE, 0x42, 0xF9, 0x8F, 0x46, 0x1B, 0x10, 0x8B, 0xD1, 0xD1, 0xA6, 0xD9, 0x48, 
+   0x20, 0x7F, 0x6E, 0xB4, 0xF1, 0xD5, 0x80, 0x3C, 0x0C, 0x02, 0x64, 0x98, 0x35, 0x84, 0x11, 0xA0, 
+   0xD3, 0x00, 0x9F, 0xA0, 0x58, 0xA1, 0x49, 0xBD, 0x9B, 0x78, 0x76, 0x56, 0x19, 0x0C, 0xE2, 0x8E, 
+   0xC9, 0x0E, 0x14, 0x9A, 0x13, 0x60, 0x30, 0x3C, 0x20, 0x6E, 0x40, 0x68, 0x33, 0x11, 0x67, 0xFE, 
+   0x31, 0xF1, 0xD4, 0xF4, 0x37, 0xE4, 0x25, 0x23, 0xC8, 0x7B, 0xCB, 0x5C, 0xC3, 0xE1, 0xF7, 0xFE, 
+   0xCD, 0x7F, 0xCF, 0x72, 0x4E, 0xFF, 0x10, 0x3C, 0x4F, 0x7E, 0x0E, 0xE8, 0x67, 0xC6, 0xA5, 0xDE, 
+   0x14, 0xDE, 0xEF, 0xC7, 0x2B, 0x8C, 0x52, 0xDD, 0x16, 0x2E, 0xD8, 0x38, 0x00, 0x34, 0x59, 0xF6, 
+   0xD3, 0x87, 0xCA, 0xA0, 0x17, 0x76, 0x10, 0x3C, 0x44, 0xEA, 0x0B, 0x00, 0x7B, 0xC5, 0xF0, 0x1E, 
+   0x31, 0x8C, 0x48, 0xA0, 0x83, 0xE7, 0x4C, 0x2C, 0xCC, 0x12, 0x37, 0xA6, 0x04, 0x28, 0xA0, 0x65, 
+   0x30, 0x31, 0x42, 0x2A, 0xA3, 0x82, 0x60, 0x3C, 0x42, 0x4A, 0x13, 0x61, 0x80, 0x81, 0xF0, 0x9E, 
+   0x05, 0x86, 0xAF, 0x63, 0xCA, 0x35, 0x15, 0xDD, 0x56, 0xE3, 0xE3, 0x04, 0xA4, 0xCD, 0x23, 0x86, 
+   0x03, 0xAE, 0x71, 0xDB, 0xF7, 0xF8, 0xD0, 0x3C, 0x44, 0x4C, 0x11, 0x01, 0x86, 0xBE, 0x3D, 0xCF, 
+   0x11, 0x98, 0x8C, 0xCB, 0xF0, 0xA0, 0x0F, 0x11, 0xF0, 0x82, 0x40, 0x34, 0xFE, 0x30, 0x4C, 0x46, 
+   0x9C, 0x74, 0x14, 0x76, 0x34, 0x78, 0x50, 0x3C, 0x21, 0x7A, 0x16, 0xE9, 0x9B, 0xCC, 0x79, 0x7E, 
+   0x01, 0x92, 0xAF, 0xC0, 0x3C, 0x69, 0xC3, 0xF7, 0x7A, 0xFD, 0xCC, 0x53, 0x13, 0xC1, 0x52, 0x19, 
+   0xAB, 0xF7, 0x99, 0xC4, 0xB8, 0x4E, 0x50, 0x3C, 0x0E, 0x13, 0x87, 0x51, 0x9F, 0xAD, 0x68, 0xE9, 
+   0x77, 0x84, 0x42, 0x47, 0x21, 0xEC, 0xFB, 0x1B, 0x52, 0xCC, 0x72, 0x75, 0x56, 0x4E, 0xD8, 0xD2, 
+   0xB9, 0x3D, 0xD7, 0x63, 0x27, 0x15, 0xF0, 0x3C, 0x06, 0x14, 0x7D, 0x79, 0x9E, 0x76, 0x1E, 0x6D, 
+   0x32, 0x73, 0x7A, 0xE1, 0x4F, 0x99, 0xDB, 0xC5, 0x2D, 0x2F, 0xC6, 0x75, 0xD6, 0x27, 0x0C, 0x07, 
+   0xE0, 0x1C, 0x9D, 0x28, 0xE6, 0xD4, 0x70, 0x3C, 0x05, 0xFE, 0xAD, 0xA9, 0x9D, 0xBB, 0x1F, 0x9E, 
+   0x13, 0x9B, 0xE7, 0x82, 0x13, 0xE8, 0xED, 0x03, 0xEB, 0x0E, 0x1D, 0x36, 0xFA, 0x50, 0x9C, 0xE4, 
+   0xEC, 0x30, 0x00, 0xB2, 0x0D, 0xA6, 0x70, 0x3C, 0xE1, 0xDD, 0x06, 0xC2, 0xF3, 0x70, 0x0A, 0x76, 
+   0x88, 0x90, 0xAF, 0x8F, 0x4D, 0xB1, 0x07, 0x8F, 0x36, 0xA7, 0x6A, 0x83, 0x13, 0x18, 0x81, 0xC8, 
+   0x44, 0x4B, 0x63, 0x66, 0xD4, 0x6C, 0xF0, 0x3C, 0x53, 0xE5, 0x06, 0xC5, 0x52, 0x02, 0x1D, 0x1E, 
+   0x03, 0xA8, 0x0A, 0xDE, 0x13, 0xCB, 0xD0, 0x56, 0xBF, 0xB6, 0xC1, 0xE1, 0x78, 0xC8, 0x8F, 0xAC, 
+   0xD8, 0x7E, 0x8D, 0x38, 0x93, 0x9B, 0x30, 0x3C, 0xD1, 0xCD, 0x07, 0xD5, 0x64, 0xFA, 0xB9, 0x1E, 
+   0x02, 0xC1, 0x39, 0x0E, 0x1C, 0x03, 0x85, 0xE6, 0x4B, 0x87, 0x3B, 0x87, 0x79, 0x62, 0x5E, 0xD3, 
+   0x0E, 0xFA, 0x6E, 0xF9, 0x20, 0x32, 0xB0, 0x3C, 0xF3, 0xE6, 0xB4, 0xBE, 0xA2, 0x6A, 0x10, 0xFE, 
+   0x07, 0x1F, 0x97, 0xA8, 0x8F, 0x25, 0xA8, 0x36, 0x10, 0x8C, 0x81, 0x78, 0xDB, 0x31, 0xFD, 0xAA, 
+   0xC1, 0x3E, 0xEE, 0xA4, 0x2C, 0xA1, 0xC0, 0x3C, 0x28, 0x0E, 0x18, 0x48, 0x0C, 0x69, 0x17, 0x9E, 
+   0x17, 0x94, 0x73, 0xBD, 0xEC, 0x18, 0x07, 0xF6, 0xCB, 0xC2, 0xFD, 0x35, 0x82, 0x77, 0xD1, 0xF1, 
+   0xB7, 0x85, 0x90, 0x44, 0x4C, 0xD8, 0xA0, 0x3C, 0x46, 0x6D, 0x90, 0xE8, 0x19, 0x82, 0x79, 0xFA, 
+   0x4D, 0x81, 0xD9, 0xB9, 0x39, 0x3D, 0x28, 0x80, 0xC0, 0x2C, 0x5D, 0x9C, 0x0C, 0x5D, 0x66, 0x38, 
+   0xD0, 0x94, 0xBE, 0xEE, 0x18, 0xB3, 0x90, 0x3C, 0x35, 0x7A, 0x02, 0x50, 0x19, 0x91, 0x68, 0x89, 
+   0x77, 0x80, 0x1A, 0x3F, 0x26, 0x94, 0xBD, 0xE5, 0x4A, 0x83, 0x97, 0x9E, 0x9D, 0x93, 0x68, 0x3A, 
+   0x48, 0x9C, 0x5E, 0x54, 0xE0, 0x48, 0xB0, 0x3C, 0x30, 0x41, 0xAE, 0x58, 0x18, 0x4F, 0xE0, 0x58, 
+   0x66, 0xD5, 0x9E, 0x92, 0x53, 0x1C, 0x43, 0xF2, 0x8C, 0x6D, 0x03, 0x3B, 0xE0, 0x03, 0x0F, 0x00, 
+   0x84, 0x6A, 0x7A, 0x10, 0x26, 0x61, 0xE0, 0x3C, 0x1C, 0x44, 0x02, 0x50, 0x18, 0x04, 0x1F, 0xAB, 
+   0x54, 0x7F, 0xDF, 0xE8, 0xE7, 0xA8, 0x25, 0x93, 0x4A, 0x66, 0x8C, 0xFA, 0x0C, 0x34, 0xCF, 0xFC, 
+   0x05, 0x09, 0x80, 0xCB, 0x91, 0x39, 0xF0, 0x3C, 0x24, 0x54, 0x09, 0x10, 0x12, 0xE0, 0x01, 0xE1, 
+   0xF9, 0x85, 0xDB, 0x11, 0xA1, 0x5F, 0x52, 0x6C, 0xD3, 0xEC, 0x45, 0x77, 0x44, 0xB5, 0x64, 0x78, 
+   0x44, 0x6F, 0x89, 0x81, 0xE3, 0xAA, 0x30, 0x3C, 0x8A, 0xEB, 0x93, 0x65, 0x66, 0xD8, 0x2B, 0x87, 
+   0x91, 0x9A, 0xA3, 0x06, 0xFC, 0xB7, 0xD4, 0x3A, 0xA5, 0xDB, 0x74, 0x2F, 0x4C, 0x09, 0x70, 0x32, 
+   0xE8, 0x72, 0x63, 0xD7, 0x3D, 0x49, 0xD0, 0x3C, 0x28, 0x6C, 0x0F, 0x13, 0xF3, 0x28, 0x1D, 0xFA, 
+   0x54, 0x97, 0x7C, 0x62, 0x1A, 0x77, 0xBF, 0x35, 0xC0, 0x08, 0x68, 0xBC, 0xA1, 0x93, 0xA5, 0x44, 
+   0x6B, 0xE0, 0x4D, 0x3A, 0x71, 0x74, 0xA0, 0x3C, 0x8B, 0x2D, 0x8D, 0x55, 0xE1, 0xF4, 0x30, 0x96, 
+   0x9B, 0x87, 0x49, 0x7E, 0x1D, 0x0F, 0x01, 0x31, 0x4C, 0x8F, 0x1C, 0x19, 0x76, 0x58, 0x66, 0x57, 
+   0xEE, 0x02, 0x93, 0x2C, 0x37, 0xCF, 0x30, 0x3C, 0x68, 0x72, 0x21, 0x1C, 0x03, 0xAA, 0x01, 0xBE, 
+   0x01, 0x81, 0x4A, 0x71, 0xAF, 0xDB, 0x64, 0x4F, 0xD3, 0x31, 0x58, 0x2B, 0x71, 0x24, 0x8D, 0xD8, 
+   0x1B, 0x59, 0x12, 0x2C, 0x9C, 0x65, 0x80, 0x3C, 0xE4, 0x71, 0x93, 0x54, 0x34, 0x9A, 0x74, 0xDE, 
+   0x01, 0x88, 0xDF, 0xE7, 0x56, 0xBC, 0x18, 0xFE, 0xC8, 0xE2, 0xC9, 0x0B, 0x3E, 0x7A, 0xA2, 0x02, 
+   0xEC, 0x71, 0x3F, 0xDD, 0x9F, 0x09, 0x80, 0x3C, 0xF2, 0x5B, 0x7B, 0x18, 0x67, 0x8C, 0x3D, 0x1E, 
+   0x05, 0x6F, 0x5A, 0x1D, 0x0F, 0x96, 0xCA, 0x36, 0xDE, 0x18, 0x74, 0x7C, 0x16, 0xE0, 0x34, 0x9B, 
+   0x0F, 0x0B, 0x14, 0x5C, 0x92, 0x94, 0x90, 0x3C, 0xE0, 0x63, 0x88, 0x62, 0xEB, 0x3E, 0x20, 0x9E, 
+   0x07, 0x39, 0x3F, 0x9A, 0x24, 0xC9, 0x94, 0xD5, 0xA9, 0xEC, 0x1C, 0xC5, 0x22, 0x2E, 0xF5, 0x9E, 
+   0x9F, 0x03, 0x6E, 0xF7, 0xDC, 0x76, 0x20, 0x3C, 0x16, 0x62, 0x2D, 0x20, 0xD5, 0x96, 0x25, 0xDE, 
+   0x11, 0xA5, 0xB8, 0xE7, 0x13, 0x1A, 0xBF, 0x07, 0x8A, 0x59, 0xD4, 0x66, 0x7E, 0x64, 0xD4, 0xD1, 
+   0x92, 0x1B, 0xD4, 0xD5, 0x8C, 0x9E, 0x60, 0x3C, 0xE0, 0x68, 0x28, 0x0B, 0xAD, 0xDC, 0x12, 0x5E, 
+   0x05, 0xF4, 0x1A, 0xDF, 0x18, 0x00, 0xFC, 0x8B, 0x69, 0x18, 0xA1, 0x42, 0xC7, 0x9C, 0x17, 0x86, 
+   0x67, 0x40, 0x20, 0x47, 0xB7, 0x7B, 0x80, 0x3C, 0xD8, 0x56, 0x30, 0x49, 0xE3, 0x08, 0x5B, 0xDE, 
+   0x05, 0xA5, 0xA8, 0x08, 0x1D, 0x5D, 0xA4, 0x46, 0x1B, 0x0E, 0x29, 0x54, 0x2F, 0xE6, 0xF3, 0x03, 
+   0xDC, 0x04, 0x21, 0x18, 0x8D, 0x31, 0xE0, 0x3C, 0xE0, 0x5D, 0x64, 0x11, 0xF8, 0xB6, 0x1E, 0x9C, 
+   0x2B, 0xA5, 0xC8, 0x09, 0xE6, 0xB5, 0x5A, 0xF4, 0xED, 0x0A, 0xE2, 0x92, 0x2C, 0x4E, 0x9C, 0xCB, 
+   0xE0, 0x3A, 0x32, 0x4F, 0x8F, 0x57, 0x70, 0x3C, 0x1A, 0x47, 0x71, 0x1E, 0x00, 0xC4, 0x1E, 0xDE, 
+   0x00, 0xF5, 0x39, 0x1A, 0x94, 0xE7, 0xCB, 0xB2, 0x88, 0xF1, 0x38, 0x3E, 0x83, 0xE0, 0x6E, 0x01, 
+   0x9F, 0xE8, 0x37, 0xFD, 0x00, 0x74, 0x80, 0x3C, 0x08, 0x47, 0x6D, 0x14, 0xAE, 0xE0, 0x07, 0x8D, 
+   0x33, 0xAA, 0x47, 0x51, 0xE9, 0x90, 0x6C, 0x1C, 0x04, 0x5E, 0x81, 0xEF, 0x97, 0xA6, 0xD7, 0x09, 
+   0x50, 0xC5, 0x43, 0xAB, 0xF1, 0x78, 0xE0, 0x3C, 0x0C, 0x08, 0x4A, 0x1C, 0x20, 0xC6, 0x43, 0x01, 
+   0x6C, 0x28, 0xBA, 0x4E, 0x42, 0xCE, 0x89, 0x0A, 0xB7, 0x9E, 0x6D, 0x72, 0x13, 0xFF, 0xA1, 0xAB, 
+   0xF0, 0x73, 0xF8, 0x90, 0x98, 0x0C, 0xD0, 0x3C, 0x06, 0x1A, 0x85, 0x84, 0x8A, 0x12, 0x01, 0xC5, 
+   0x00, 0xAD, 0xDA, 0x09, 0x2B, 0xF9, 0xC9, 0xD6, 0xBC, 0xED, 0xC0, 0x7F, 0xFF, 0x80, 0x10, 0xC5, 
+   0xC0, 0xE5, 0xD1, 0xE7, 0xA0, 0x06, 0xD0, 
+};

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/include/amr_yuan_data.h

@@ -0,0 +1,52 @@
+const unsigned char amr_yuan_data[] =
+{
+   0x23, 0x21, 0x41, 0x4D, 0x52, 0x0A, 0x3C, 0x02, 0x2E, 0x27, 0x42, 0xC1, 0x79, 0xC3, 0xC8, 
+   0xAC, 0x64, 0xB8, 0xE4, 0x32, 0x33, 0x67, 0x00, 0x00, 0x24, 0xBD, 0x98, 0x4C, 0x9A, 0x40, 0x00, 
+   0x07, 0x46, 0x9C, 0x17, 0xFD, 0x55, 0xE0, 0x3C, 0x0C, 0x07, 0xA2, 0xC8, 0xD5, 0x3F, 0xDB, 0xE5, 
+   0xA6, 0x96, 0xD6, 0xC6, 0xAC, 0x0F, 0xCF, 0x22, 0x3A, 0xCD, 0x5D, 0xF4, 0xB2, 0x1E, 0xDB, 0xF7, 
+   0xFE, 0xF3, 0xB3, 0xC9, 0x1A, 0x13, 0x50, 0x3C, 0x04, 0x1E, 0xEB, 0x99, 0x81, 0x6B, 0xF9, 0xA9, 
+   0x67, 0x80, 0x07, 0xF9, 0x6C, 0x73, 0xE1, 0x1F, 0xF6, 0x50, 0x6A, 0x6B, 0x17, 0x60, 0x06, 0x21, 
+   0x7C, 0x32, 0x18, 0x98, 0x1B, 0x5B, 0xF0, 0x3C, 0x06, 0x14, 0xC1, 0xD1, 0x81, 0x2F, 0xFB, 0xCF, 
+   0x11, 0x26, 0x34, 0xEB, 0xAD, 0x87, 0x8B, 0xE3, 0x6A, 0xC9, 0xEA, 0xF7, 0x45, 0xB7, 0x3C, 0x5A, 
+   0x76, 0xA1, 0xCD, 0x1E, 0xDB, 0x48, 0x90, 0x3C, 0x06, 0x13, 0x3C, 0xB0, 0x7C, 0xEF, 0xF3, 0xDE, 
+   0x0B, 0x2E, 0xC7, 0x86, 0xE9, 0x21, 0xA7, 0x0C, 0x55, 0x94, 0x57, 0x92, 0xFB, 0x2D, 0x30, 0x86, 
+   0xA9, 0x4A, 0x36, 0x81, 0xB6, 0x30, 0x60, 0x3C, 0x28, 0x11, 0x14, 0xB8, 0x7B, 0xE3, 0xCB, 0xFE, 
+   0x39, 0x2E, 0x48, 0xEA, 0xB4, 0xE1, 0xFE, 0xEC, 0xC4, 0x3B, 0x69, 0x0E, 0x7D, 0x35, 0x91, 0x20, 
+   0x3D, 0x03, 0x66, 0x35, 0x3B, 0x61, 0xE0, 0x3C, 0x1E, 0x3E, 0x99, 0x41, 0x82, 0x57, 0x79, 0x9E, 
+   0x96, 0xD5, 0x57, 0xFB, 0xD3, 0xAD, 0x54, 0x87, 0x58, 0x06, 0x5E, 0xEA, 0x55, 0xA9, 0x04, 0x8E, 
+   0xDF, 0xB2, 0x11, 0x11, 0x89, 0xB3, 0xF0, 0x3C, 0x48, 0x3D, 0x20, 0x31, 0x87, 0xAF, 0x68, 0x9E, 
+   0x95, 0x84, 0x88, 0x4B, 0x34, 0xDE, 0x2A, 0xDF, 0xD8, 0xCB, 0x8E, 0x12, 0x2F, 0x79, 0x38, 0x04, 
+   0xAE, 0x64, 0x18, 0xFC, 0xA2, 0xC9, 0x40, 0x3C, 0x4E, 0x53, 0x76, 0x21, 0x98, 0x0F, 0xE2, 0x5F, 
+   0x25, 0x84, 0x36, 0xB6, 0x70, 0x45, 0x76, 0xB3, 0xC0, 0x06, 0x18, 0xB9, 0xB0, 0xE2, 0x02, 0x29, 
+   0xCE, 0x39, 0x17, 0x49, 0x41, 0x78, 0xA0, 0x3C, 0x54, 0x53, 0x5D, 0x19, 0x98, 0x63, 0xE3, 0xDE, 
+   0x0F, 0x80, 0x18, 0x1C, 0xEC, 0xD1, 0xBB, 0xD5, 0xA2, 0xA3, 0x84, 0x9A, 0x78, 0x21, 0xD6, 0x8E, 
+   0xC1, 0x51, 0xD4, 0x45, 0x68, 0x97, 0x30, 0x3C, 0x54, 0x67, 0x71, 0x21, 0x98, 0x4F, 0xF0, 0xFE, 
+   0x1F, 0x2A, 0xB8, 0x59, 0x30, 0x4F, 0x43, 0xFD, 0x50, 0x4D, 0xC0, 0x99, 0xB9, 0xFD, 0xA8, 0xCE, 
+   0x36, 0x87, 0x54, 0x3D, 0xEC, 0x8C, 0x00, 0x3C, 0x54, 0x5C, 0x63, 0x11, 0x98, 0x05, 0xE1, 0xFE, 
+   0x1F, 0x81, 0xB8, 0x32, 0x96, 0x43, 0x83, 0xD7, 0xD6, 0xA4, 0xD1, 0x41, 0x4C, 0x6D, 0x1B, 0xCB, 
+   0x93, 0x90, 0x24, 0xAE, 0x2B, 0xCD, 0xD0, 0x3C, 0x54, 0x5D, 0x67, 0x41, 0x98, 0x07, 0xE1, 0x7E, 
+   0x1F, 0x83, 0x48, 0x64, 0xDB, 0x58, 0x86, 0x3A, 0xCD, 0x4B, 0xA1, 0x5F, 0x9F, 0x1E, 0x84, 0x6B, 
+   0xA6, 0x24, 0x02, 0x0B, 0x72, 0x31, 0x20, 0x3C, 0x42, 0x5D, 0x67, 0x11, 0x98, 0x13, 0xE0, 0xDE, 
+   0x1F, 0x81, 0xAA, 0x91, 0xDA, 0x0D, 0x90, 0xFB, 0x22, 0x5A, 0xC8, 0xFF, 0xC4, 0xD8, 0x8E, 0x57, 
+   0xFB, 0xA0, 0x46, 0x60, 0xD6, 0xB0, 0xA0, 0x3C, 0x44, 0x41, 0x67, 0x19, 0x87, 0xF7, 0x68, 0x9E, 
+   0x05, 0x2A, 0x1A, 0xEB, 0x9F, 0x45, 0xB5, 0x97, 0x5F, 0xFD, 0xD2, 0x8E, 0x0F, 0xD2, 0x0F, 0x8E, 
+   0xC0, 0x36, 0xB8, 0x1B, 0xF8, 0x52, 0xA0, 0x3C, 0xE1, 0x78, 0x79, 0x11, 0x86, 0x54, 0x1E, 0x5E, 
+   0x12, 0xD9, 0xCA, 0xDA, 0xC5, 0x44, 0xFA, 0xF7, 0x0E, 0xE7, 0x7D, 0x62, 0x26, 0x08, 0x24, 0x02, 
+   0x74, 0x16, 0xB4, 0xD4, 0xBA, 0xCF, 0x20, 0x3C, 0x10, 0x12, 0x32, 0x49, 0x2B, 0x66, 0x07, 0x8F, 
+   0x11, 0x76, 0x4C, 0x24, 0x82, 0x93, 0xD1, 0x3B, 0xDC, 0x3A, 0xF2, 0x3D, 0x47, 0x19, 0x91, 0xC3, 
+   0xCB, 0x93, 0x67, 0xE8, 0x4E, 0x82, 0xD0, 0x3C, 0x0E, 0x0E, 0x38, 0x30, 0x72, 0xF3, 0xA4, 0x01, 
+   0xFE, 0x7F, 0x7A, 0x63, 0x3D, 0xE4, 0xAE, 0xC4, 0xFF, 0x88, 0x95, 0xC9, 0x9F, 0x3D, 0xBB, 0x5B, 
+   0x65, 0x27, 0x8F, 0x69, 0x00, 0x10, 0x10, 0x3C, 0x0C, 0x08, 0x3A, 0x48, 0x64, 0xFF, 0xF8, 0x45, 
+   0xBA, 0x7F, 0xBA, 0xC4, 0xB5, 0x09, 0xE3, 0xC1, 0x6E, 0x27, 0x58, 0x01, 0x6D, 0x3B, 0xEE, 0x1C, 
+   0xA3, 0x7A, 0xA0, 0x17, 0x80, 0xAD, 0x00, 0x3C, 0x0C, 0x0E, 0x42, 0x40, 0x61, 0x09, 0xE0, 0x23, 
+   0xC9, 0x2A, 0xFA, 0x31, 0xC3, 0xF4, 0x4F, 0x22, 0x1A, 0x07, 0x70, 0xCB, 0x1B, 0xF2, 0x55, 0xEA, 
+   0x82, 0x72, 0x19, 0x4B, 0x2E, 0xD3, 0xF0, 0x3C, 0x12, 0x09, 0x89, 0x40, 0x1F, 0xD7, 0x9F, 0xE5, 
+   0xAA, 0xD5, 0x6A, 0x0C, 0x6B, 0xA3, 0xC5, 0xFC, 0x74, 0xFD, 0x72, 0x74, 0xAF, 0x86, 0x1F, 0x15, 
+   0xA8, 0x63, 0xB0, 0x65, 0x11, 0x54, 0x10, 0x3C, 0x0C, 0x06, 0x2D, 0x42, 0xB9, 0xEE, 0x19, 0xA0, 
+   0xF8, 0xF6, 0xDA, 0x94, 0x53, 0x37, 0x3A, 0xC9, 0xC7, 0xA3, 0x22, 0x78, 0x9A, 0xAB, 0xF2, 0x20, 
+   0x55, 0x7B, 0xD2, 0x84, 0x13, 0x54, 0x80, 0x3C, 0x24, 0x08, 0xDC, 0x38, 0x18, 0xA4, 0x09, 0x81, 
+   0x87, 0x04, 0x5B, 0x6E, 0xE4, 0x5A, 0x53, 0x6C, 0x1F, 0xF1, 0x52, 0xF4, 0xB1, 0xF9, 0x8C, 0x11, 
+   0xBB, 0xCE, 0x90, 0xDD, 0x36, 0x93, 0xC0, 0x3C, 0x08, 0x88, 0x58, 0x3D, 0x56, 0x24, 0x01, 0x81, 
+   0x10, 0x9C, 0x96, 0x2E, 0x55, 0xCD, 0x55, 0xAD, 0xA3, 0xA6, 0xF2, 0x37, 0x3A, 0x53, 0x4A, 0xF5, 
+   0xC5, 0xFC, 0x90, 0x1F, 0x1A, 0x99, 0x20, 
+};

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/include/audio_alipay_data.h

@@ -0,0 +1,104 @@
+const unsigned char audio_alipay_data[] =
+{
+   0x23, 0x21, 0x41, 0x4D, 0x52, 0x0A, 0x3C, 0x71, 0xC7, 0x43, 0xD9, 0x06, 0xA3, 0x81, 0xAC, 
+   0xAC, 0x4B, 0xBF, 0xC5, 0x65, 0x62, 0x27, 0xC0, 0x00, 0x7B, 0x97, 0xE2, 0x73, 0xAA, 0x6C, 0x00, 
+   0x07, 0x3E, 0xFA, 0xC1, 0x76, 0x0C, 0x60, 0x3C, 0x55, 0xE8, 0xFF, 0xD4, 0xCF, 0x2E, 0x1E, 0x5E, 
+   0x04, 0x03, 0x18, 0x4B, 0x71, 0x95, 0xD6, 0xCB, 0xF6, 0x88, 0xBE, 0x63, 0x3A, 0x0C, 0x6A, 0xA7, 
+   0x05, 0x35, 0x43, 0x28, 0x53, 0xEE, 0xF0, 0x3C, 0xB5, 0xDA, 0xB1, 0xCB, 0x30, 0x53, 0x23, 0x9E, 
+   0x0A, 0x67, 0x8F, 0xE2, 0x78, 0x01, 0x1C, 0xB4, 0x81, 0x57, 0xEB, 0xFF, 0x84, 0x0B, 0x10, 0x70, 
+   0xA0, 0x41, 0x60, 0x2A, 0xD5, 0x03, 0x00, 0x3C, 0xF3, 0xB6, 0xB5, 0xC7, 0x7D, 0x8C, 0x1B, 0x5E, 
+   0x16, 0x48, 0x07, 0x94, 0xB5, 0xB0, 0xEA, 0x3F, 0xC7, 0x6A, 0xE5, 0xE0, 0xC3, 0x8B, 0x5C, 0x0F, 
+   0xE0, 0xFB, 0xA6, 0x3A, 0xB6, 0x7F, 0x20, 0x3C, 0x2E, 0x0E, 0x88, 0xB8, 0x01, 0xAC, 0x16, 0x7E, 
+   0x12, 0x0A, 0x59, 0x56, 0x9D, 0xBF, 0x05, 0xA4, 0x7A, 0xF7, 0xAD, 0x38, 0x31, 0x59, 0xD5, 0x9C, 
+   0x40, 0x57, 0xF8, 0x96, 0xC5, 0x13, 0x00, 0x3C, 0x24, 0xB8, 0x95, 0xB8, 0x01, 0xE7, 0xC3, 0x1E, 
+   0x06, 0x1B, 0x52, 0xF8, 0xBD, 0x44, 0x94, 0xD2, 0xA7, 0x0C, 0x96, 0x79, 0xCF, 0x80, 0xD5, 0x43, 
+   0x9F, 0x90, 0x5F, 0xF2, 0x87, 0xEB, 0x70, 0x3C, 0x2C, 0xAD, 0x29, 0x28, 0x01, 0x85, 0x0C, 0xFE, 
+   0x0C, 0x18, 0x0B, 0xE9, 0x6D, 0x9B, 0x60, 0xEC, 0xD3, 0x66, 0xD1, 0x88, 0x11, 0xF9, 0x3C, 0x94, 
+   0xD8, 0xC0, 0xF0, 0x13, 0x22, 0x7E, 0x30, 0x3C, 0x2C, 0xAC, 0x9A, 0xB0, 0xAA, 0x76, 0x11, 0xDC, 
+   0x22, 0x0F, 0xBB, 0x59, 0x0B, 0xEC, 0xF5, 0xFC, 0x9E, 0x59, 0x10, 0xD1, 0x53, 0x42, 0xA4, 0x69, 
+   0x27, 0xBC, 0x1A, 0xBB, 0x6D, 0x53, 0xF0, 0x3C, 0x2F, 0x9F, 0x1D, 0x8C, 0x2F, 0xBA, 0x00, 0x6B, 
+   0x55, 0x4F, 0x2F, 0xD9, 0x15, 0xAF, 0x5B, 0x44, 0x33, 0xFF, 0x89, 0xA8, 0xBE, 0xB0, 0x42, 0x66, 
+   0x25, 0x23, 0xB6, 0xF9, 0x61, 0x46, 0x40, 0x3C, 0xB5, 0x13, 0x34, 0xA4, 0x42, 0x30, 0x09, 0x45, 
+   0xBA, 0x5F, 0x3A, 0xDF, 0x82, 0xF6, 0x44, 0xE8, 0x95, 0x75, 0x5B, 0x3C, 0xAB, 0x3D, 0xC9, 0xF2, 
+   0xA6, 0x8F, 0xC7, 0xA1, 0xEE, 0xEA, 0xC0, 0x3C, 0xF3, 0x3E, 0x59, 0x41, 0x54, 0xF2, 0x10, 0xBE, 
+   0x02, 0x01, 0x77, 0x37, 0x99, 0xEE, 0xDB, 0x86, 0xB2, 0xF7, 0x6B, 0x82, 0x7E, 0xF9, 0xA0, 0xBE, 
+   0x53, 0xF9, 0x96, 0x90, 0xBF, 0x0F, 0xE0, 0x3C, 0x37, 0x7A, 0x02, 0x50, 0x00, 0x82, 0x74, 0x54, 
+   0xAA, 0x18, 0xCF, 0xF3, 0x94, 0xEF, 0x4E, 0xA8, 0x28, 0x8E, 0x14, 0x1C, 0xBF, 0xDE, 0x94, 0xA1, 
+   0xE3, 0x64, 0x7C, 0x59, 0x35, 0x1E, 0xF0, 0x3C, 0x1C, 0x44, 0x0D, 0xE8, 0x01, 0xBB, 0xE1, 0xD8, 
+   0x62, 0x34, 0x5F, 0xD5, 0xCF, 0xEB, 0x91, 0x8A, 0x0E, 0x7B, 0x5D, 0x82, 0x0D, 0xC1, 0xFD, 0x75, 
+   0x9E, 0x6D, 0x34, 0x57, 0x5E, 0xD0, 0x10, 0x3C, 0x24, 0x1D, 0xBE, 0x38, 0x06, 0xE1, 0x85, 0x12, 
+   0xCC, 0xEF, 0x5F, 0xBD, 0x1F, 0x57, 0x3D, 0x9F, 0x97, 0x64, 0x29, 0xBC, 0x8E, 0x9B, 0xF9, 0xE1, 
+   0x91, 0xDC, 0xF2, 0xBF, 0xB2, 0x2A, 0xC0, 0x3C, 0x06, 0x19, 0x9F, 0x51, 0x5C, 0xFB, 0x44, 0x70, 
+   0x6C, 0xBF, 0x4B, 0xFE, 0x42, 0xF9, 0x8F, 0x46, 0x1B, 0x10, 0x8B, 0xD1, 0xD1, 0xA6, 0xD9, 0x48, 
+   0x20, 0x7F, 0x6E, 0xB4, 0xF1, 0xD5, 0x80, 0x3C, 0x0C, 0x02, 0x64, 0x98, 0x35, 0x84, 0x11, 0xA0, 
+   0xD3, 0x00, 0x9F, 0xA0, 0x58, 0xA1, 0x49, 0xBD, 0x9B, 0x78, 0x76, 0x56, 0x19, 0x0C, 0xE2, 0x8E, 
+   0xC9, 0x0E, 0x14, 0x9A, 0x13, 0x60, 0x30, 0x3C, 0x20, 0x6E, 0x40, 0x68, 0x33, 0x11, 0x67, 0xFE, 
+   0x31, 0xF1, 0xD4, 0xF4, 0x37, 0xE4, 0x25, 0x23, 0xC8, 0x7B, 0xCB, 0x5C, 0xC3, 0xE1, 0xF7, 0xFE, 
+   0xCD, 0x7F, 0xCF, 0x72, 0x4E, 0xFF, 0x10, 0x3C, 0x4F, 0x7E, 0x0E, 0xE8, 0x67, 0xC6, 0xA5, 0xDE, 
+   0x14, 0xDE, 0xEF, 0xC7, 0x2B, 0x8C, 0x52, 0xDD, 0x16, 0x2E, 0xD8, 0x38, 0x00, 0x34, 0x59, 0xF6, 
+   0xD3, 0x87, 0xCA, 0xA0, 0x17, 0x76, 0x10, 0x3C, 0x44, 0xEA, 0x0B, 0x00, 0x7B, 0xC5, 0xF0, 0x1E, 
+   0x31, 0x8C, 0x48, 0xA0, 0x83, 0xE7, 0x4C, 0x2C, 0xCC, 0x12, 0x37, 0xA6, 0x04, 0x28, 0xA0, 0x65, 
+   0x30, 0x31, 0x42, 0x2A, 0xA3, 0x82, 0x60, 0x3C, 0x42, 0x4A, 0x13, 0x61, 0x80, 0x81, 0xF0, 0x9E, 
+   0x05, 0x86, 0xAF, 0x63, 0xCA, 0x35, 0x15, 0xDD, 0x56, 0xE3, 0xE3, 0x04, 0xA4, 0xCD, 0x23, 0x86, 
+   0x03, 0xAE, 0x71, 0xDB, 0xF7, 0xF8, 0xD0, 0x3C, 0x44, 0x4C, 0x11, 0x01, 0x86, 0xBE, 0x3D, 0xCF, 
+   0x11, 0x98, 0x8C, 0xCB, 0xF0, 0xA0, 0x0F, 0x11, 0xF0, 0x82, 0x40, 0x34, 0xFE, 0x30, 0x4C, 0x46, 
+   0x9C, 0x74, 0x14, 0x76, 0x34, 0x78, 0x50, 0x3C, 0x21, 0x7A, 0x16, 0xE9, 0x9B, 0xCC, 0x79, 0x7E, 
+   0x01, 0x92, 0xAF, 0xC0, 0x3C, 0x69, 0xC3, 0xF7, 0x7A, 0xFD, 0xCC, 0x53, 0x13, 0xC1, 0x52, 0x19, 
+   0xAB, 0xF7, 0x99, 0xC4, 0xB8, 0x4E, 0x50, 0x3C, 0x0E, 0x13, 0x87, 0x51, 0x9F, 0xAD, 0x68, 0xE9, 
+   0x77, 0x84, 0x42, 0x47, 0x21, 0xEC, 0xFB, 0x1B, 0x52, 0xCC, 0x72, 0x75, 0x56, 0x4E, 0xD8, 0xD2, 
+   0xB9, 0x3D, 0xD7, 0x63, 0x27, 0x15, 0xF0, 0x3C, 0x06, 0x14, 0x7D, 0x79, 0x9E, 0x76, 0x1E, 0x6D, 
+   0x32, 0x73, 0x7A, 0xE1, 0x4F, 0x99, 0xDB, 0xC5, 0x2D, 0x2F, 0xC6, 0x75, 0xD6, 0x27, 0x0C, 0x07, 
+   0xE0, 0x1C, 0x9D, 0x28, 0xE6, 0xD4, 0x70, 0x3C, 0x05, 0xFE, 0xAD, 0xA9, 0x9D, 0xBB, 0x1F, 0x9E, 
+   0x13, 0x9B, 0xE7, 0x82, 0x13, 0xE8, 0xED, 0x03, 0xEB, 0x0E, 0x1D, 0x36, 0xFA, 0x50, 0x9C, 0xE4, 
+   0xEC, 0x30, 0x00, 0xB2, 0x0D, 0xA6, 0x70, 0x3C, 0xE1, 0xDD, 0x06, 0xC2, 0xF3, 0x70, 0x0A, 0x76, 
+   0x88, 0x90, 0xAF, 0x8F, 0x4D, 0xB1, 0x07, 0x8F, 0x36, 0xA7, 0x6A, 0x83, 0x13, 0x18, 0x81, 0xC8, 
+   0x44, 0x4B, 0x63, 0x66, 0xD4, 0x6C, 0xF0, 0x3C, 0x53, 0xE5, 0x06, 0xC5, 0x52, 0x02, 0x1D, 0x1E, 
+   0x03, 0xA8, 0x0A, 0xDE, 0x13, 0xCB, 0xD0, 0x56, 0xBF, 0xB6, 0xC1, 0xE1, 0x78, 0xC8, 0x8F, 0xAC, 
+   0xD8, 0x7E, 0x8D, 0x38, 0x93, 0x9B, 0x30, 0x3C, 0xD1, 0xCD, 0x07, 0xD5, 0x64, 0xFA, 0xB9, 0x1E, 
+   0x02, 0xC1, 0x39, 0x0E, 0x1C, 0x03, 0x85, 0xE6, 0x4B, 0x87, 0x3B, 0x87, 0x79, 0x62, 0x5E, 0xD3, 
+   0x0E, 0xFA, 0x6E, 0xF9, 0x20, 0x32, 0xB0, 0x3C, 0xF3, 0xE6, 0xB4, 0xBE, 0xA2, 0x6A, 0x10, 0xFE, 
+   0x07, 0x1F, 0x97, 0xA8, 0x8F, 0x25, 0xA8, 0x36, 0x10, 0x8C, 0x81, 0x78, 0xDB, 0x31, 0xFD, 0xAA, 
+   0xC1, 0x3E, 0xEE, 0xA4, 0x2C, 0xA1, 0xC0, 0x3C, 0x28, 0x0E, 0x18, 0x48, 0x0C, 0x69, 0x17, 0x9E, 
+   0x17, 0x94, 0x73, 0xBD, 0xEC, 0x18, 0x07, 0xF6, 0xCB, 0xC2, 0xFD, 0x35, 0x82, 0x77, 0xD1, 0xF1, 
+   0xB7, 0x85, 0x90, 0x44, 0x4C, 0xD8, 0xA0, 0x3C, 0x46, 0x6D, 0x90, 0xE8, 0x19, 0x82, 0x79, 0xFA, 
+   0x4D, 0x81, 0xD9, 0xB9, 0x39, 0x3D, 0x28, 0x80, 0xC0, 0x2C, 0x5D, 0x9C, 0x0C, 0x5D, 0x66, 0x38, 
+   0xD0, 0x94, 0xBE, 0xEE, 0x18, 0xB3, 0x90, 0x3C, 0x35, 0x7A, 0x02, 0x50, 0x19, 0x91, 0x68, 0x89, 
+   0x77, 0x80, 0x1A, 0x3F, 0x26, 0x94, 0xBD, 0xE5, 0x4A, 0x83, 0x97, 0x9E, 0x9D, 0x93, 0x68, 0x3A, 
+   0x48, 0x9C, 0x5E, 0x54, 0xE0, 0x48, 0xB0, 0x3C, 0x30, 0x41, 0xAE, 0x58, 0x18, 0x4F, 0xE0, 0x58, 
+   0x66, 0xD5, 0x9E, 0x92, 0x53, 0x1C, 0x43, 0xF2, 0x8C, 0x6D, 0x03, 0x3B, 0xE0, 0x03, 0x0F, 0x00, 
+   0x84, 0x6A, 0x7A, 0x10, 0x26, 0x61, 0xE0, 0x3C, 0x1C, 0x44, 0x02, 0x50, 0x18, 0x04, 0x1F, 0xAB, 
+   0x54, 0x7F, 0xDF, 0xE8, 0xE7, 0xA8, 0x25, 0x93, 0x4A, 0x66, 0x8C, 0xFA, 0x0C, 0x34, 0xCF, 0xFC, 
+   0x05, 0x09, 0x80, 0xCB, 0x91, 0x39, 0xF0, 0x3C, 0x24, 0x54, 0x09, 0x10, 0x12, 0xE0, 0x01, 0xE1, 
+   0xF9, 0x85, 0xDB, 0x11, 0xA1, 0x5F, 0x52, 0x6C, 0xD3, 0xEC, 0x45, 0x77, 0x44, 0xB5, 0x64, 0x78, 
+   0x44, 0x6F, 0x89, 0x81, 0xE3, 0xAA, 0x30, 0x3C, 0x8A, 0xEB, 0x93, 0x65, 0x66, 0xD8, 0x2B, 0x87, 
+   0x91, 0x9A, 0xA3, 0x06, 0xFC, 0xB7, 0xD4, 0x3A, 0xA5, 0xDB, 0x74, 0x2F, 0x4C, 0x09, 0x70, 0x32, 
+   0xE8, 0x72, 0x63, 0xD7, 0x3D, 0x49, 0xD0, 0x3C, 0x28, 0x6C, 0x0F, 0x13, 0xF3, 0x28, 0x1D, 0xFA, 
+   0x54, 0x97, 0x7C, 0x62, 0x1A, 0x77, 0xBF, 0x35, 0xC0, 0x08, 0x68, 0xBC, 0xA1, 0x93, 0xA5, 0x44, 
+   0x6B, 0xE0, 0x4D, 0x3A, 0x71, 0x74, 0xA0, 0x3C, 0x8B, 0x2D, 0x8D, 0x55, 0xE1, 0xF4, 0x30, 0x96, 
+   0x9B, 0x87, 0x49, 0x7E, 0x1D, 0x0F, 0x01, 0x31, 0x4C, 0x8F, 0x1C, 0x19, 0x76, 0x58, 0x66, 0x57, 
+   0xEE, 0x02, 0x93, 0x2C, 0x37, 0xCF, 0x30, 0x3C, 0x68, 0x72, 0x21, 0x1C, 0x03, 0xAA, 0x01, 0xBE, 
+   0x01, 0x81, 0x4A, 0x71, 0xAF, 0xDB, 0x64, 0x4F, 0xD3, 0x31, 0x58, 0x2B, 0x71, 0x24, 0x8D, 0xD8, 
+   0x1B, 0x59, 0x12, 0x2C, 0x9C, 0x65, 0x80, 0x3C, 0xE4, 0x71, 0x93, 0x54, 0x34, 0x9A, 0x74, 0xDE, 
+   0x01, 0x88, 0xDF, 0xE7, 0x56, 0xBC, 0x18, 0xFE, 0xC8, 0xE2, 0xC9, 0x0B, 0x3E, 0x7A, 0xA2, 0x02, 
+   0xEC, 0x71, 0x3F, 0xDD, 0x9F, 0x09, 0x80, 0x3C, 0xF2, 0x5B, 0x7B, 0x18, 0x67, 0x8C, 0x3D, 0x1E, 
+   0x05, 0x6F, 0x5A, 0x1D, 0x0F, 0x96, 0xCA, 0x36, 0xDE, 0x18, 0x74, 0x7C, 0x16, 0xE0, 0x34, 0x9B, 
+   0x0F, 0x0B, 0x14, 0x5C, 0x92, 0x94, 0x90, 0x3C, 0xE0, 0x63, 0x88, 0x62, 0xEB, 0x3E, 0x20, 0x9E, 
+   0x07, 0x39, 0x3F, 0x9A, 0x24, 0xC9, 0x94, 0xD5, 0xA9, 0xEC, 0x1C, 0xC5, 0x22, 0x2E, 0xF5, 0x9E, 
+   0x9F, 0x03, 0x6E, 0xF7, 0xDC, 0x76, 0x20, 0x3C, 0x16, 0x62, 0x2D, 0x20, 0xD5, 0x96, 0x25, 0xDE, 
+   0x11, 0xA5, 0xB8, 0xE7, 0x13, 0x1A, 0xBF, 0x07, 0x8A, 0x59, 0xD4, 0x66, 0x7E, 0x64, 0xD4, 0xD1, 
+   0x92, 0x1B, 0xD4, 0xD5, 0x8C, 0x9E, 0x60, 0x3C, 0xE0, 0x68, 0x28, 0x0B, 0xAD, 0xDC, 0x12, 0x5E, 
+   0x05, 0xF4, 0x1A, 0xDF, 0x18, 0x00, 0xFC, 0x8B, 0x69, 0x18, 0xA1, 0x42, 0xC7, 0x9C, 0x17, 0x86, 
+   0x67, 0x40, 0x20, 0x47, 0xB7, 0x7B, 0x80, 0x3C, 0xD8, 0x56, 0x30, 0x49, 0xE3, 0x08, 0x5B, 0xDE, 
+   0x05, 0xA5, 0xA8, 0x08, 0x1D, 0x5D, 0xA4, 0x46, 0x1B, 0x0E, 0x29, 0x54, 0x2F, 0xE6, 0xF3, 0x03, 
+   0xDC, 0x04, 0x21, 0x18, 0x8D, 0x31, 0xE0, 0x3C, 0xE0, 0x5D, 0x64, 0x11, 0xF8, 0xB6, 0x1E, 0x9C, 
+   0x2B, 0xA5, 0xC8, 0x09, 0xE6, 0xB5, 0x5A, 0xF4, 0xED, 0x0A, 0xE2, 0x92, 0x2C, 0x4E, 0x9C, 0xCB, 
+   0xE0, 0x3A, 0x32, 0x4F, 0x8F, 0x57, 0x70, 0x3C, 0x1A, 0x47, 0x71, 0x1E, 0x00, 0xC4, 0x1E, 0xDE, 
+   0x00, 0xF5, 0x39, 0x1A, 0x94, 0xE7, 0xCB, 0xB2, 0x88, 0xF1, 0x38, 0x3E, 0x83, 0xE0, 0x6E, 0x01, 
+   0x9F, 0xE8, 0x37, 0xFD, 0x00, 0x74, 0x80, 0x3C, 0x08, 0x47, 0x6D, 0x14, 0xAE, 0xE0, 0x07, 0x8D, 
+   0x33, 0xAA, 0x47, 0x51, 0xE9, 0x90, 0x6C, 0x1C, 0x04, 0x5E, 0x81, 0xEF, 0x97, 0xA6, 0xD7, 0x09, 
+   0x50, 0xC5, 0x43, 0xAB, 0xF1, 0x78, 0xE0, 0x3C, 0x0C, 0x08, 0x4A, 0x1C, 0x20, 0xC6, 0x43, 0x01, 
+   0x6C, 0x28, 0xBA, 0x4E, 0x42, 0xCE, 0x89, 0x0A, 0xB7, 0x9E, 0x6D, 0x72, 0x13, 0xFF, 0xA1, 0xAB, 
+   0xF0, 0x73, 0xF8, 0x90, 0x98, 0x0C, 0xD0, 0x3C, 0x06, 0x1A, 0x85, 0x84, 0x8A, 0x12, 0x01, 0xC5, 
+   0x00, 0xAD, 0xDA, 0x09, 0x2B, 0xF9, 0xC9, 0xD6, 0xBC, 0xED, 0xC0, 0x7F, 0xFF, 0x80, 0x10, 0xC5, 
+   0xC0, 0xE5, 0xD1, 0xE7, 0xA0, 0x06, 0xD0, 
+};

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/src/audio_example_main.c

@@ -0,0 +1,195 @@
+//demo用于AIR600EAC云喇叭开发
+#include "common_api.h"
+#include "bsp_custom.h"
+#include "ostask.h"
+#include DEBUG_LOG_HEADER_FILE
+#include "plat_config.h"
+#include "audio_play.h"
+#include "audio_ll_drv.h"
+#include "FreeRTOS.h"
+#include "timers.h"
+#include "slpman.h"
+#include "osasys.h"
+#include "version.h"
+#include "ivTTS.h"
+#include "amr_alipay_data.h"
+#include "amr_2_data.h"
+#include "amr_10_data.h"
+#include "amr_yuan_data.h"
+#include "power_audio.h"
+#include "driver_gpio.h"
+#include "cms_api.h"
+#include "apmu_external.h"
+//AIR780E+TM8211开发板配置
+#define CODEC_PWR_PIN HAL_GPIO_12
+#define CODEC_PWR_PIN_ALT_FUN	4
+#define PA_PWR_PIN HAL_GPIO_25
+#define PA_PWR_PIN_ALT_FUN	0
+#define LED2_PIN	HAL_GPIO_24
+#define LED2_PIN_ALT_FUN	0
+#define LED3_PIN	HAL_GPIO_23
+#define LED3_PIN_ALT_FUN	0
+#define LED4_PIN	HAL_GPIO_27
+#define LED4_PIN_ALT_FUN	0
+#define CHARGE_EN_PIN	HAL_GPIO_2
+#define CHARGE_EN_PIN_ALT_FUN	0
+
+//AIR600EAC开发板配置
+//#define CODEC_PWR_PIN HAL_GPIO_12
+//#define CODEC_PWR_PIN_ALT_FUN	4
+//#define PA_PWR_PIN HAL_GPIO_10
+//#define PA_PWR_PIN_ALT_FUN	0
+//#define CODEC_PWR_PIN HAL_GPIO_12
+//#define CODEC_PWR_PIN_ALT_FUN	4
+//#define PA_PWR_PIN HAL_GPIO_10
+//#define PA_PWR_PIN_ALT_FUN	0
+//#define LED2_PIN	HAL_GPIO_26
+//#define LED2_PIN_ALT_FUN	0
+//#define LED3_PIN	HAL_GPIO_27
+//#define LED3_PIN_ALT_FUN	0
+//#define LED4_PIN	HAL_GPIO_20
+//#define LED4_PIN_ALT_FUN	0
+//#define CHARGE_EN_PIN	HAL_GPIO_NONE
+//#define CHARGE_EN_PIN_ALT_FUN	0
+
+
+
+extern void downloadFile();
+static HANDLE g_s_delay_timer;
+void before_sleep(void *pdata, slpManLpState state)
+{
+//	GPIO_Output(LED2_PIN, 0);
+}
+/**
+  \brief definition of restore callback(called after sleep)
+ */
+void after_sleep(void *pdata, slpManLpState state)
+{
+//	GPIO_Output(LED2_PIN, 1);
+//	DBG("!");
+//	GPIO_ConfigWithPullEC618(CODEC_PWR_PIN, 0, 0, CODEC_PWR_PIN_ALT_FUN);
+//	GPIO_ConfigWithPullEC618(PA_PWR_PIN, 0, 0, PA_PWR_PIN_ALT_FUN);
+//	GpioPinConfig_t gpio_config;
+//    gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+//    gpio_config.misc.initOutput = 0;
+//    GPIO_pinConfig(0, 12, &gpio_config);
+//    gpio_config.misc.initOutput = 0;
+//    GPIO_pinConfig(0, 10, &gpio_config);
+}
+
+void app_pa_on(uint32_t arg)
+{
+	GPIO_Output(PA_PWR_PIN, 1);
+}
+
+void audio_event_cb(uint32_t event, void *param)
+{
+//	PadConfig_t pad_config;
+//	GpioPinConfig_t gpio_config;
+
+	DBG("%d", event);
+	switch(event)
+	{
+	case MULTIMEDIA_CB_AUDIO_DECODE_START:
+		GPIO_Output(CODEC_PWR_PIN, 1);
+		audio_play_write_blank_raw(0, 6);
+		break;
+	case MULTIMEDIA_CB_AUDIO_OUTPUT_START:
+		xTimerStart(g_s_delay_timer, 150);
+		break;
+	case MULTIMEDIA_CB_TTS_INIT:
+		if (4 == sizeof("你好"))
+		{
+			audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_GBK);
+		}
+		else
+		{
+			audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_UTF8);
+		}
+		break;
+	case MULTIMEDIA_CB_AUDIO_DONE:
+		xTimerStop(g_s_delay_timer, 0);
+		DBG("audio play done, result=%d!", audio_play_get_last_error(0));
+		GPIO_Output(PA_PWR_PIN, 0);
+		GPIO_Output(CODEC_PWR_PIN, 0);
+		break;
+	}
+}
+
+void audio_data_cb(uint8_t *data, uint32_t len, uint8_t bits, uint8_t channels)
+{
+	//这里可以对音频数据进行软件音量缩放，或者直接清空来静音
+	//软件音量缩放参考HAL_I2sSrcAdjustVolumn
+	//DBG("%x,%d,%d,%d", data, len, bits, channels);
+}
+
+
+static void demo_task(void *arg)
+{
+	ivCStrA sdk_id = AISOUND_SDK_USERID;
+	char tts_string[] = "支付宝到账123456.7元";
+	audio_play_info_t info[5];
+//	slpManRegisterUsrdefinedBackupCb(before_sleep, NULL);
+//	slpManRegisterUsrdefinedRestoreCb(after_sleep, NULL);
+	GPIO_ConfigWithPullEC618(CODEC_PWR_PIN, 0, 0, CODEC_PWR_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(PA_PWR_PIN, 0, 0, PA_PWR_PIN_ALT_FUN);
+	downloadFile();
+    g_s_delay_timer = xTimerCreate(NULL, 200, 0, 0, app_pa_on);
+
+    audio_play_global_init(audio_event_cb, audio_data_cb, NULL);
+    audio_play_tts_set_resource(ivtts_16k_lite, sdk_id);
+    //使用ES7149/ES7148，用如下配置，如果不是，请根据实际情况配置，bus_id直接写0
+//    Audio_CodecI2SInit(0, I2S_MODE_I2S, I2S_FRAME_SIZE_16_16);
+//	如下配置可使用TM8211
+    Audio_CodecI2SInit(0, I2S_MODE_MSB, I2S_FRAME_SIZE_16_16);
+	memset(info, 0, sizeof(info));
+	info[0].path = "test1.mp3";
+	info[1].path = "test2.mp3";
+	info[2].path = "test3.mp3";
+	info[3].path = "test4.mp3";
+	audio_play_multi_files(0, info, 4);
+	vTaskDelay(9000);
+//	require_lowpower_state(0);
+    while(1)
+    {
+
+
+    	info[0].path = NULL;
+    	info[0].address = (uint32_t)amr_alipay_data;
+    	info[0].rom_data_len = sizeof(amr_alipay_data);
+    	info[1].path = NULL;
+    	info[1].address = (uint32_t)amr_2_data;
+    	info[1].rom_data_len = sizeof(amr_2_data);
+    	info[2].path = NULL;
+    	info[2].address = (uint32_t)amr_10_data;
+    	info[2].rom_data_len = sizeof(amr_10_data);
+    	info[3].path = NULL;
+    	info[3].address = (uint32_t)amr_2_data;
+    	info[3].rom_data_len = sizeof(amr_2_data);
+    	info[4].path = NULL;
+    	info[4].address = (uint32_t)amr_yuan_data;
+    	info[4].rom_data_len = sizeof(amr_yuan_data);
+    	audio_play_multi_files(0, info, 5);
+    	vTaskDelay(10000);
+    	audio_play_tts_text(0, tts_string, sizeof(tts_string));
+    	vTaskDelay(10000);
+
+//    	info[0].path = NULL;
+//    	info[0].address = (uint32_t)Fqdqwer;
+//    	info[0].rom_data_len = sizeof(Fqdqwer);
+//    	audio_play_multi_files(0, info, 1);
+//    	vTaskDelay(20000);
+    }
+}
+
+static void test_audio_demo_init(void)
+{
+	GPIO_GlobalInit(NULL);
+	GPIO_ConfigWithPullEC618(LED2_PIN, 0, 0, LED2_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(LED3_PIN, 0, 0, LED3_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(LED4_PIN, 0, 0, LED4_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(CHARGE_EN_PIN, 0, 0, CHARGE_EN_PIN_ALT_FUN);
+	xTaskCreate(demo_task, "test", 1024, NULL, 20, NULL);
+}
+
+INIT_TASK_EXPORT(test_audio_demo_init, "1");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/src/mp3Download.c

@@ -0,0 +1,881 @@
+#include "bsp.h"
+#include "bsp_custom.h"
+#include "osasys.h"
+#include "ostask.h"
+#include "cmsis_os2.h"
+#include "queue.h"
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "cmisim.h"
+#include "cmips.h"
+#include "sockets.h"
+#include "networkmgr.h"
+#include "netdb.h"
+#include "slpman.h"
+#include "time.h"
+// #include "MQTTClient.h"
+#include "plat_config.h"
+#include "hal_i2s.h"
+
+// Download mp3 info the area of flash which is file system area
+const uint8_t batteryCharging[] = {
+    0xFF,0xF3,0x28,0xC4,0x00,0x0D,0x10,0x02,0xC4,0xF7,0x40,0x10,0x00,0x98,0x1A,0x80,
+    0x01,0x80,0x48,0x3D,0xAD,0x10,0xDE,0x7C,0x42,0x20,0x28,0xA5,0xA2,0xAD,0x88,0x0B,
+    0x68,0x7E,0xBE,0x40,0x10,0x2E,0x20,0x89,0xC5,0x76,0xD2,0x18,0x08,0x9A,0x0F,0x80,
+    0xC5,0x04,0xC0,0x30,0x8F,0x2E,0x84,0x75,0x20,0x9D,0xB4,0x67,0xFF,0x41,0xFF,0xFC,
+    0xBA,0xD5,0xCA,0x7D,0x3D,0x60,0xC1,0xD4,0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x81,0xFA,
+    0xC0,0x01,0x83,0x28,0x00,0x99,0x85,0xB4,0x2D,0x99,0xC7,0xAB,0xBB,0x9A,0x72,0x66,
+    0x7C,0x4D,0xCB,0x5C,0xF5,0x17,0x99,0x8A,0x02,0x11,0x1C,0x4A,0x22,0x24,0x08,0x04,
+    0x16,0x6B,0x94,0x82,0xC9,0x28,0x83,0xE5,0xAB,0x27,0xFF,0xB3,0x25,0x0C,0x9F,0xFF,
+    0xFD,0x9F,0x12,0xDB,0xFF,0xFF,0xF2,0x9F,0x92,0xF5,0x54,0xE6,0x25,0xE1,0xF2,0x19,
+    0xFF,0xF3,0x28,0xC4,0x07,0x0C,0x78,0xD2,0xBC,0x01,0xD3,0x78,0x01,0x14,0x02,0x34,
+    0x21,0x29,0x22,0x5E,0x4D,0x9A,0xE6,0x2C,0xE1,0x86,0x00,0xEA,0x0A,0x5D,0x44,0xB9,
+    0xA4,0x6A,0xE2,0xDE,0xB0,0x4E,0xF0,0x83,0xA5,0x19,0xA5,0x81,0x1A,0xB5,0xA3,0x7A,
+    0x91,0x56,0xB2,0xEE,0x13,0xBF,0xB8,0xCA,0x96,0xF1,0xF8,0x1A,0xFF,0xFF,0x1F,0x80,
+    0xA5,0xF5,0x2D,0x4B,0x3C,0x5A,0x16,0x80,0xFF,0xF3,0x28,0xC4,0x10,0x11,0x21,0x6E,
+    0xD6,0x5E,0x6B,0x54,0x94,0x3B,0x9B,0xB9,0x61,0xF4,0x10,0x75,0x71,0xF8,0x25,0xCB,
+    0x6A,0xF4,0x4D,0x5D,0xC0,0xC9,0x05,0xB8,0xBA,0x95,0x66,0x2C,0xA4,0x96,0x87,0x0C,
+    0x83,0x77,0x33,0xFD,0x88,0x55,0x3F,0xF3,0x4F,0xFF,0xCE,0x24,0x3D,0xFE,0x67,0xFF,
+    0xFF,0xFC,0x44,0xEB,0x32,0x27,0x7D,0x67,0x7E,0x9A,0x72,0x31,0x20,0x6A,0x49,0x24,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0D,0xE1,0x6E,0xE6,0x5F,0x4C,0x38,0x02,0x10,0x01,0x9D,
+    0x3B,0x35,0xF5,0x9B,0xA7,0x66,0x43,0x49,0x6F,0xC8,0x66,0xCE,0xC5,0xF3,0xD3,0x37,
+    0x31,0xC0,0xC0,0xAC,0x81,0xE9,0xF5,0x11,0x48,0x17,0xFF,0xC5,0x43,0x2B,0xFF,0x94,
+    0x1B,0x9F,0xFF,0xDF,0xFF,0x41,0xD0,0xE7,0xFF,0x9C,0xFF,0xEB,0x11,0xF9,0x6A,0xC7,
+    0xF2,0xD7,0x25,0x18,0x10,0x17,0x95,0x0A,0xFF,0xF3,0x28,0xC4,0x09,0x0E,0x90,0xF2,
+    0xA0,0x01,0x9A,0x58,0x00,0x83,0x7C,0x1C,0x93,0x05,0x02,0x19,0x38,0x49,0x52,0xC1,
+    0xD4,0xB8,0x72,0x83,0xF1,0xAB,0x4E,0x89,0xC7,0x61,0x63,0xED,0x8C,0x87,0x2A,0xE8,
+    0xFB,0xFE,0x4C,0xEF,0xE5,0x16,0x55,0x4D,0xD7,0xA8,0xBF,0x64,0xFF,0x7A,0x8E,0xFE,
+    0x18,0xFF,0xA8,0x30,0x73,0xE4,0x6A,0xC3,0xFB,0x9E,0x3F,0xCA,0xBE,0xAC,0x9F,0x24,
+    0xFF,0xF3,0x28,0xC4,0x09,0x0F,0x0A,0x4A,0xC4,0x01,0x99,0x50,0x00,0xB7,0x10,0x33,
+    0x08,0x7E,0x4E,0x75,0x97,0x80,0x5D,0x0F,0x4F,0x08,0x14,0xF4,0x38,0xA1,0x0A,0x22,
+    0x12,0x35,0x82,0x06,0xDE,0xBF,0xC6,0x4D,0xAD,0xFF,0xF2,0xFD,0x5F,0xFF,0xFF,0xF7,
+    0x53,0x9B,0xD3,0xA1,0xE7,0xE7,0xB7,0x2D,0xFF,0x4F,0xDD,0xBF,0xE4,0x69,0x28,0xF5,
+    0xD5,0xFF,0x65,0x98,0x90,0x12,0x44,0x0C,0xFF,0xF3,0x28,0xC4,0x07,0x0E,0xF2,0x5A,
+    0xC0,0x01,0xD4,0x68,0x00,0x43,0x11,0xC9,0x1C,0xD2,0xEA,0xD0,0x52,0xA8,0x4E,0x13,
+    0x81,0xA9,0x82,0x00,0x83,0xFE,0xA5,0x92,0x63,0x8C,0xF7,0xFE,0x81,0x82,0x5F,0xFA,
+    0x90,0x30,0x7F,0xFE,0x9A,0x3F,0xFA,0xD3,0x33,0x3D,0xFD,0xD0,0x42,0xA2,0x93,0x76,
+    0xFD,0x32,0xF9,0x05,0xFF,0xD5,0xBF,0xFF,0xA8,0xC5,0xFD,0x48,0x4C,0x0D,0x0B,0x40,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x89,0xAA,0xD0,0x00,0x6B,0xC4,0x94,0xC8,0x00,0xC2,
+    0x23,0xD7,0xFF,0x78,0x0F,0x18,0x0B,0xE1,0xE0,0x26,0x62,0x03,0x16,0xB9,0xA5,0x21,
+    0xBF,0x7F,0x3B,0x1B,0x12,0xB6,0x48,0xDF,0xFD,0xD3,0xF3,0xA2,0x9B,0xFF,0xAF,0xFF,
+    0xFF,0xFF,0xD1,0xA7,0x91,0x03,0x98,0x1A,0x0E,0x50,0x55,0xE4,0xD3,0xB5,0x1A,0x10,
+    0x94,0x2A,0xFD,0x64,0xE0,0x07,0x81,0xA3,0xFF,0xF3,0x28,0xC4,0x06,0x0D,0x18,0x96,
+    0xC8,0x00,0x6E,0x12,0x4C,0x17,0x35,0x3A,0x64,0xD9,0x7F,0xFD,0x49,0xF9,0x03,0xAD,
+    0x11,0x04,0x4F,0x05,0x9B,0x8D,0xB6,0x2C,0x1A,0x10,0x86,0x50,0xA1,0x14,0xCC,0x24,
+    0x2C,0x05,0x74,0xF7,0xFF,0xFE,0xE2,0x24,0x09,0x24,0x55,0x81,0x24,0x1E,0x0D,0x08,
+    0x7F,0xA7,0xFD,0x55,0x37,0xFB,0x65,0xB6,0xD9,0x68,0x00,0x7B,0x06,0xA5,0x0E,0xA1,
+    0xFF,0xF3,0x28,0xC4,0x0C,0x0C,0xD0,0x6E,0xED,0xBE,0x0B,0xD8,0x2A,0x1B,0xAD,0x62,
+    0xE2,0x9A,0x5B,0x0A,0x49,0xC9,0x9F,0x77,0xF7,0xE2,0x84,0x0A,0x5E,0x75,0x2D,0xB1,
+    0xCC,0x76,0xF5,0xB7,0x69,0xC0,0x27,0x2E,0x04,0x8E,0x90,0xA1,0xAB,0xBA,0x2C,0x71,
+    0xE8,0xAA,0xCF,0xFA,0x55,0xFF,0x8C,0xD8,0xD8,0x08,0x4A,0x89,0xA3,0xAC,0xC0,0xB0,
+    0xDC,0x12,0xC6,0x10,0x1E,0x53,0x49,0x48,0xFF,0xF3,0x28,0xC4,0x13,0x0F,0x91,0xAE,
+    0xC8,0x00,0x58,0xC4,0x94,0xF7,0x9C,0xCF,0xA7,0x3F,0xFF,0xFF,0xFF,0xE7,0xA6,0xF9,
+    0xEA,0xF7,0x20,0x76,0x72,0x33,0xAB,0x39,0x4B,0xA2,0xD2,0x72,0x30,0x73,0x28,0x41,
+    0x9E,0x1B,0x32,0xE2,0x1D,0x60,0xE4,0x85,0x64,0xF5,0x85,0xC0,0x82,0x76,0x14,0x87,
+    0xD5,0xF5,0xA8,0xE0,0xDD,0xE1,0xC3,0xA5,0x75,0xA8,0xCD,0x8A,0x6D,0xD8,0xAB,0x3C,
+    0xFF,0xF3,0x28,0xC4,0x0F,0x0B,0xE0,0x8E,0xCC,0x00,0x16,0x1E,0x4C,0x87,0x72,0x87,
+    0x84,0x11,0x59,0x4D,0x7F,0x4C,0x3C,0x52,0x38,0xC7,0xBB,0x57,0x20,0xFE,0xB1,0x1F,
+    0x03,0x93,0x5A,0x43,0x4B,0x3B,0x46,0xAF,0xE2,0x22,0xA1,0xAF,0xF9,0x65,0x09,0x78,
+    0x47,0xF2,0xA2,0x24,0x70,0x15,0xE1,0xCB,0x96,0xCE,0xD9,0xC7,0xF5,0x4B,0x19,0x41,
+    0x08,0xFA,0x2F,0x38,0xD0,0xF5,0x6F,0xD7,0xFF,0xF3,0x28,0xC4,0x1A,0x0C,0xB0,0xDA,
+    0xCC,0xCA,0x96,0x14,0x70,0xEE,0xEA,0x3B,0xC7,0x84,0x51,0x31,0xDA,0x24,0x7E,0x02,
+    0x64,0xA6,0xFD,0x8F,0x24,0x7F,0x13,0xBB,0xFF,0xFF,0xFF,0xFF,0xFE,0x4D,0x01,0x8F,
+    0xDF,0x5F,0x7E,0x00,0x1F,0x81,0xFA,0xCD,0xD5,0x07,0x09,0xF8,0xBA,0xB5,0xF5,0x6F,
+    0xB6,0xC1,0x69,0x3D,0x9F,0xC5,0xF6,0xFF,0xE4,0x7C,0xC7,0x28,0xBF,0x69,0x30,0x1D,
+    0xFF,0xF3,0x28,0xC4,0x22,0x0D,0x40,0xD6,0xEA,0x5E,0x6B,0xDA,0x70,0x20,0xB2,0x5D,
+    0x4F,0xF3,0x23,0xDE,0x77,0xFF,0xFF,0xFF,0xFF,0xFF,0x06,0x8F,0x56,0x59,0xBE,0x14,
+    0xD0,0x00,0xD6,0x9F,0xFE,0x38,0x03,0x81,0x7F,0xB2,0x85,0x62,0xF0,0x47,0x04,0x00,
+    0xD5,0xE9,0x75,0x8F,0xA1,0x29,0x8F,0x3D,0xEF,0xE7,0xE2,0xAD,0xC5,0xF8,0x2C,0x97,
+    0xE3,0xEB,0x31,0x7C,0x14,0xC1,0xC4,0x74,0xFF,0xF3,0x28,0xC4,0x28,0x0D,0x38,0xAE,
+    0xD2,0x5E,0x1C,0xDE,0x4C,0xA5,0x4D,0xC2,0xFE,0xC7,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,
+    0xFF,0x2A,0x10,0x17,0x1B,0x72,0xDA,0x00,0x02,0x81,0xD5,0x01,0xC5,0x60,0x82,0x88,
+    0x4C,0x4D,0xB9,0xB7,0xAD,0xFF,0xE1,0x29,0x40,0xB1,0xE7,0x4C,0xCC,0xEE,0x78,0xE2,
+    0x04,0x09,0x06,0x8F,0xE0,0x55,0xA4,0x42,0x87,0x36,0x08,0x9D,0xE7,0xBF,0xFF,0xFF,
+    0xFF,0xF3,0x28,0xC4,0x2E,0x0C,0xC0,0x9A,0xDE,0x5E,0x13,0xD8,0x4E,0xFF,0xFF,0xFF,
+    0xFF,0xEA,0x24,0x82,0xDF,0xA2,0x33,0xC2,0x96,0x20,0xA1,0xC8,0x80,0x96,0xC0,0x78,
+    0x66,0x01,0x79,0x10,0x57,0x64,0xAA,0x99,0x16,0x43,0x2E,0x87,0xAA,0x6B,0xEB,0x45,
+    0x4A,0x08,0x85,0xC3,0x57,0xFF,0xFB,0x4D,0x69,0xA6,0x8D,0x48,0x9B,0x7F,0xFF,0xE7,
+    0xBC,0x8D,0x47,0x01,0xB4,0x02,0xAD,0xD2,0xFF,0xF3,0x28,0xC4,0x36,0x0B,0xE8,0xF2,
+    0x90,0x38,0xA4,0xCE,0x70,0x48,0x79,0x86,0xB0,0xA8,0x19,0xBD,0x32,0xA0,0x52,0x61,
+    0x8C,0x12,0x53,0x05,0x87,0xA9,0x58,0x68,0x2A,0x09,0xB9,0x43,0xCA,0x87,0x4E,0xB7,
+    0xFB,0x38,0x57,0xA3,0xFF,0xFF,0xFF,0x4B,0x7A,0x3F,0xFE,0xBA,0x7F,0x52,0x4C,0x41,
+    0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0x41,0x0B,0xA8,0x46,0x40,0x1E,0x4E,0x30,0x24,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0x4D,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0x88,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0xC3,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+    0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,0xAA,
+};
+
+const uint8_t rebooting[]={
+    
+    0xFF,0xF3,0x28,0xC4,0x00,0x0B,0xE0,0x06,0xB1,0x4D,0x40,0x10,0x00,0xE4,0x02,0x0E,
+    0x0A,0x70,0x3F,0x0F,0x94,0x38,0x27,0x3E,0x0F,0xBC,0x10,0x58,0x60,0xBB,0xC8,0x14,
+    0x38,0x27,0x86,0x14,0x70,0xBE,0xA7,0x17,0xF2,0xEF,0xDD,0xFE,0x20,0x70,0x20,0xEF,
+    0x2E,0x0F,0x94,0x07,0xDF,0x5B,0xFF,0xD6,0x0F,0x9F,0xFF,0xFE,0x95,0xAF,0xEE,0xA5,
+    0x4C,0x96,0xE2,0x38,0x13,0x80,0x35,0xC2,0xFF,0xF3,0x28,0xC4,0x0B,0x0F,0xF1,0xEE,
+    0xDC,0x01,0x91,0x50,0x00,0x35,0x76,0x70,0x43,0x3D,0xD1,0x49,0xE6,0x67,0x93,0xE0,
+    0xBA,0x16,0x8E,0xFD,0x3D,0x0D,0x5F,0xFF,0xD1,0x13,0xFF,0xFB,0x1A,0xF5,0x57,0x69,
+    0x9C,0xF6,0x57,0x2F,0x5D,0x4E,0x3B,0xD7,0xCF,0x72,0x32,0x76,0x4A,0x13,0x0F,0x80,
+    0x5C,0x9A,0xD7,0xFE,0x7D,0x49,0x29,0xEC,0x14,0xA9,0x20,0x7F,0xA7,0xF5,0xD6,0x66,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x89,0x62,0xC8,0xCB,0xD3,0x80,0x00,0x66,0x39,0x40,
+    0x42,0x41,0x26,0x87,0xBA,0x42,0x20,0x82,0x0B,0x36,0x4E,0xC6,0x88,0x97,0x41,0xA4,
+    0x1D,0x31,0x78,0xDB,0x6B,0x75,0x18,0x18,0x13,0xDF,0xFE,0xA7,0x45,0xBF,0xAF,0xBA,
+    0x4E,0xEF,0xFB,0xBA,0x73,0x5F,0xE4,0x7F,0x13,0x3F,0xEB,0x77,0xFF,0xFF,0x9E,0x77,
+    0xCA,0xAA,0x1E,0xF1,0xF2,0x0B,0x7F,0xF8,0xFF,0xF3,0x28,0xC4,0x06,0x0E,0xB8,0xDA,
+    0xE6,0x5E,0x3B,0xCA,0x70,0xFF,0x81,0xF4,0xA9,0xA5,0xC4,0x60,0x05,0x5D,0x8E,0xA6,
+    0x63,0xFD,0x50,0xCD,0x99,0x3D,0x7E,0x7B,0x53,0x42,0x1B,0x17,0xFF,0xFF,0x50,0x6F,
+    0xFD,0x04,0x07,0x02,0xAE,0xD2,0x20,0x04,0x44,0x46,0xFB,0x96,0xE4,0x71,0x00,0x17,
+    0xFF,0xA3,0xFF,0xFF,0x80,0x1B,0xFA,0x5C,0x3C,0x3B,0x20,0x26,0x03,0x92,0x49,0x24,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x81,0x06,0xBD,0xBF,0x53,0x38,0x00,0x00,0x7D,0x04,
+    0x10,0x51,0x98,0xEB,0x0F,0x58,0x06,0xE8,0x45,0xCD,0x0F,0x9E,0x49,0x2B,0x27,0x59,
+    0x40,0x47,0x41,0x70,0xC1,0x92,0x5F,0xDE,0x60,0xD8,0x96,0xFE,0x8B,0x1E,0x24,0x77,
+    0xD0,0xF6,0x28,0x26,0x24,0x48,0xC2,0x37,0xFF,0x12,0xFF,0xF1,0xFD,0x1D,0xBF,0xFE,
+    0x25,0xE6,0x5A,0x88,0xEB,0x4F,0xD0,0xE1,0xFF,0xF3,0x28,0xC4,0x07,0x0E,0x7A,0x4E,
+    0xAC,0x01,0x98,0x10,0x00,0x62,0x30,0xDC,0xCD,0x90,0xF0,0xDA,0x90,0xF7,0x7A,0x3A,
+    0xB1,0x5D,0x87,0x21,0x1F,0xF9,0x14,0xE7,0xE7,0xF6,0xA3,0x75,0xFF,0xFF,0x7F,0xFF,
+    0xCE,0x77,0x57,0x9F,0xFF,0xFF,0x79,0x08,0xCE,0x46,0xFF,0xFF,0xFF,0x9C,0xE2,0x0E,
+    0x03,0xE3,0x8C,0x1F,0xFF,0xFC,0xBF,0xD4,0xFE,0x2C,0xC8,0x70,0x90,0x08,0x20,0xCB,
+    0xFF,0xF3,0x28,0xC4,0x08,0x0E,0x21,0xC2,0xD4,0x01,0x90,0x68,0x00,0x04,0x40,0x2F,
+    0xA9,0x11,0x3D,0x51,0x50,0xC0,0x2C,0x59,0x01,0xA5,0x61,0x58,0x00,0xAC,0x50,0x67,
+    0x48,0x6D,0x4D,0x84,0x8A,0x4E,0x0E,0x81,0xE6,0xAF,0x6D,0x0E,0xE8,0xFF,0xFE,0x83,
+    0xFF,0xED,0x54,0xEA,0x5E,0x83,0xB2,0xBF,0xFF,0x43,0x97,0x0F,0x2E,0xAA,0x0C,0xBF,
+    0x87,0xF7,0x74,0x86,0x60,0xF6,0x3C,0x59,0xFF,0xF3,0x28,0xC4,0x0A,0x0E,0x59,0x72,
+    0xE0,0xCB,0xCD,0x50,0x02,0x4A,0xF3,0xA3,0x8C,0x59,0x0F,0x23,0x67,0x7A,0xC7,0x84,
+    0x22,0xD0,0x0C,0x02,0x11,0x37,0xCC,0x30,0x54,0x25,0x1E,0xB7,0xF3,0x18,0xEF,0xF5,
+    0xB2,0x7F,0xDD,0x7E,0x8C,0xA7,0x98,0x61,0x30,0x70,0x4F,0x0F,0x1A,0x54,0xDE,0x05,
+    0x2C,0xC6,0xC5,0xBD,0x35,0x2B,0x67,0x87,0xF3,0x02,0xE0,0xC7,0x86,0xDC,0x4F,0x23,
+    0xFF,0xF3,0x28,0xC4,0x0B,0x0D,0x11,0x7A,0xDC,0xCB,0x50,0x50,0x00,0xD3,0x4C,0x98,
+    0x16,0x60,0x8E,0x49,0x93,0x55,0x7B,0x9A,0x16,0xC0,0x12,0x05,0x51,0xC7,0xF9,0x85,
+    0xC8,0x4D,0x4F,0xFF,0xFF,0xFF,0xFF,0xAC,0xE3,0x90,0xEE,0x79,0x43,0x41,0x23,0xD5,
+    0x13,0x2B,0xC8,0x78,0xB5,0x1A,0xD5,0xDE,0x5F,0x53,0xF6,0x22,0x60,0x90,0x4B,0xCD,
+    0x5B,0xB6,0xEA,0xA7,0x7D,0xB7,0xD7,0x3F,0xFF,0xF3,0x28,0xC4,0x11,0x11,0x61,0xFA,
+    0xB4,0x01,0x98,0x90,0x00,0x03,0x78,0x18,0x4E,0x4C,0x9E,0x74,0xDE,0x3A,0x45,0xC2,
+    0x68,0xFF,0x7D,0x07,0xDF,0xFF,0xA9,0x2A,0x97,0xFF,0xFA,0x29,0x52,0x1C,0x9F,0xD6,
+    0xFA,0xDF,0x3D,0x2F,0x15,0x90,0x75,0xA9,0xD7,0xAF,0xFB,0xFE,0x6A,0x55,0x4D,0x03,
+    0x23,0xE0,0x57,0xDC,0x05,0x09,0xA7,0xFF,0xAA,0xA5,0xAA,0x91,0x66,0x77,0xA6,0x3F,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x41,0xB6,0xD0,0x01,0x82,0x28,0x00,0xB1,0xA3,0x45,
+    0x76,0x61,0xC8,0x45,0xD5,0x3C,0xE4,0x9E,0x63,0x7F,0xA6,0xF7,0xED,0x35,0x6C,0xE2,
+    0x68,0xA2,0xF8,0xB9,0x42,0x25,0x0A,0x04,0x9A,0x10,0x63,0x28,0xAC,0xCF,0x9D,0xC9,
+    0x9D,0x4C,0x82,0x86,0x15,0x30,0xE4,0x91,0x3D,0x4F,0xFB,0x77,0x7F,0xFF,0xEB,0x16,
+    0xFE,0x36,0x74,0x54,0xA5,0x98,0x6B,0xB9,0xFF,0xF3,0x28,0xC4,0x08,0x0B,0xF1,0x16,
+    0xB0,0x01,0xC6,0x30,0x00,0x4F,0xB5,0xCD,0xDB,0x28,0xE2,0xD0,0x98,0xDD,0x8B,0xDF,
+    0xF6,0xED,0x8F,0xD9,0x3F,0x39,0xEC,0xF0,0xD0,0xED,0x07,0xA7,0xC8,0x13,0x1E,0x64,
+    0x93,0x97,0x63,0xC8,0xE1,0xC7,0x88,0x81,0xA0,0xED,0xCB,0xD5,0xA9,0xFF,0xFD,0x54,
+    0x89,0xC0,0x40,0x9B,0x9D,0xC6,0xC8,0x59,0x3D,0x6A,0xC7,0x5C,0x1E,0x09,0xF6,0x68,
+    0xFF,0xF3,0x28,0xC4,0x13,0x0C,0x68,0xF6,0xB0,0x00,0xC3,0xCC,0x71,0xFA,0xB9,0xB8,
+    0x2D,0x87,0x02,0x9D,0xFB,0xCD,0xAE,0x28,0x86,0x30,0x4C,0xF4,0xC5,0x3E,0x54,0xB8,
+    0xBD,0xB8,0x26,0x94,0x3F,0xF5,0xAF,0x30,0x49,0x22,0xE6,0x12,0xF1,0xB3,0x03,0x00,
+    0xFE,0xFF,0x2D,0xC7,0x12,0x54,0x0E,0x52,0x04,0xDF,0xBB,0x17,0xAB,0x2D,0x10,0xEB,
+    0x11,0x19,0xD6,0xA5,0xFE,0x4C,0xB1,0x60,0xFF,0xF3,0x28,0xC4,0x1C,0x0C,0x98,0xBE,
+    0xBD,0x90,0xCE,0x18,0x4C,0x36,0x3B,0x19,0x42,0x7A,0xE9,0xB9,0xC9,0xCD,0x72,0x65,
+    0xC5,0xAB,0x6B,0xB4,0x3F,0x30,0xE7,0x5E,0xF7,0x07,0x32,0x95,0x03,0x32,0x3B,0xC0,
+    0xFF,0xFF,0xDD,0xC8,0x2D,0x35,0x43,0x2E,0x5E,0x04,0x80,0x86,0x71,0x94,0xE8,0xB6,
+    0x05,0xD8,0x6A,0x14,0x71,0xFB,0xD5,0x94,0xF2,0xBD,0x39,0x16,0x99,0xAE,0xAD,0x90,
+    0xFF,0xF3,0x28,0xC4,0x24,0x0C,0xE0,0xC6,0xC5,0x90,0xC3,0xC6,0x71,0x8A,0x64,0xA4,
+    0xDA,0xAB,0x1B,0x06,0x31,0x25,0x6D,0xBB,0xB5,0xB1,0x00,0x1F,0xB5,0xFD,0xE1,0xBD,
+    0x63,0x52,0x1F,0x33,0x39,0x3D,0xAD,0x04,0xC6,0x86,0x07,0x9E,0xFC,0x2F,0xD7,0x88,
+    0x0F,0x48,0x37,0x95,0x31,0xF1,0xF3,0x44,0xF2,0x75,0x52,0xFA,0x2C,0xE6,0x0F,0x2D,
+    0xC2,0xDD,0xA8,0xD5,0x9E,0xF8,0x18,0xF7,0xFF,0xF3,0x28,0xC4,0x2B,0x0C,0xA0,0x82,
+    0xA8,0x00,0xCE,0x9E,0x48,0xB0,0x97,0xDE,0x2B,0x38,0x18,0x7E,0x95,0xFF,0xEF,0xEE,
+    0xAF,0x9B,0x04,0x94,0xD0,0x2C,0x52,0xE3,0xDB,0x35,0x61,0x4F,0xFF,0xFF,0xFF,0xFF,
+    0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF4,0x44,0xB4,0xE7,0x56,0xFF,0xFF,0xF4,0x4D,0x73,
+    0x9C,0xE7,0x74,0x21,0x0F,0xE4,0x64,0xFF,0x5E,0x4A,0xD1,0x9F,0x3F,0xC8,0x74,0x00,
+    0xFF,0xF3,0x28,0xC4,0x33,0x0D,0x23,0x0A,0xB4,0x00,0x78,0x44,0xB8,0x10,0x45,0xFF,
+    0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xE4,0xD9,0x54,0xAB,0x90,0x9F,0xA6,0xE9,0xE5,0xD9,
+    0xAC,0x88,0xCC,0x45,0x29,0x8E,0xE1,0x0C,0xA2,0xDD,0x0E,0xD5,0x7A,0x21,0x24,0x44,
+    0x45,0x51,0x34,0x7A,0xCA,0x8F,0x04,0x98,0xE6,0x52,0x89,0x07,0x04,0x7A,0xFA,0xC8,
+    0x0C,0x60,0x30,0x85,0x74,0xDD,0x91,0xE7,0xFF,0xF3,0x28,0xC4,0x39,0x0B,0xAB,0x0E,
+    0xC0,0x00,0x08,0x04,0xB9,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFD,0x7F,0xFF,
+    0x4B,0x39,0xBF,0xFF,0xAF,0x5E,0xCD,0x4C,0xDA,0x19,0x8E,0xA4,0x08,0xAA,0xC1,0x48,
+    0xB5,0xD7,0x4F,0x7B,0x53,0x98,0xAD,0x04,0xA8,0x61,0xD9,0x22,0xB5,0xD5,0x7F,0x01,
+    0xC7,0xC3,0xA9,0xC5,0x8C,0xBC,0x21,0x2D,0xC8,0x5B,0xC1,0x5C,0x2A,0x4C,0x65,0x4B,
+    0xFF,0xF3,0x28,0xC4,0x45,0x0C,0x8A,0xFA,0xC4,0x00,0x10,0x44,0xB8,0xE6,0xA8,0x8F,
+    0x00,0x67,0x3F,0xFF,0xFF,0xFF,0xFF,0xFD,0x0B,0x10,0x31,0xFF,0xFE,0xE8,0x5C,0x1A,
+    0x7A,0xD5,0xF1,0xC0,0x94,0xEA,0x8F,0x00,0xE7,0x47,0x0A,0x80,0x08,0x85,0x28,0x79,
+    0x9C,0x67,0x22,0x7D,0x5D,0x13,0x51,0xD8,0xEF,0xFF,0xFF,0xFF,0xFF,0xFE,0x93,0xA0,
+    0xD8,0x22,0xEF,0xF7,0xFA,0x50,0x5C,0xE0,0xFF,0xF3,0x28,0xC4,0x4D,0x09,0x90,0x56,
+    0xDC,0xCA,0x13,0xDE,0x26,0x98,0x77,0xF5,0xEB,0x81,0x01,0xE6,0x8C,0x01,0x09,0x40,
+    0x6B,0x2C,0x8F,0xD7,0x4C,0xA2,0xC6,0x38,0x59,0x06,0xB5,0xC9,0x4E,0xA9,0x1F,0x64,
+    0x76,0xFF,0xFF,0xFF,0xFF,0xFF,0xE9,0x40,0x99,0x22,0xA8,0xFF,0xF2,0x2F,0x26,0x2C,
+    0x11,0x41,0x9F,0xB6,0xFA,0x95,0x40,0x79,0xFE,0x2D,0x0B,0x6D,0xCA,0x2C,0x9B,0xA7,
+    0xFF,0xF3,0x28,0xC4,0x61,0x0A,0x80,0x5A,0xCC,0x00,0x3B,0xDE,0x24,0x0B,0xF0,0xBD,
+    0x3C,0x53,0xA0,0xA3,0x40,0x17,0x12,0x16,0x89,0x3C,0xDF,0xFF,0xFF,0xFF,0xFF,0xFF,
+    0xFF,0xFF,0xFF,0xFF,0xFF,0xCA,0xCA,0x02,0xFF,0x47,0xF2,0x2A,0xD4,0x48,0x2A,0x64,
+    0xEF,0xFC,0xEA,0x15,0x06,0x02,0x00,0xD6,0x3A,0x0A,0x83,0x11,0x44,0x4F,0x8C,0x32,
+    0x90,0x39,0x85,0x74,0xC0,0x43,0xD4,0x0A,0xFF,0xF3,0x28,0xC4,0x72,0x0B,0x10,0x66,
+    0xC8,0xCA,0x2B,0xD8,0x28,0xF7,0x27,0xB0,0x23,0x99,0x72,0xBA,0xBF,0xFF,0xFF,0xFF,
+    0xFF,0x85,0x45,0x04,0x8F,0xFF,0xFD,0x62,0x84,0xBF,0x5D,0x51,0x65,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0x80,0x0C,0x11,0xDA,0xB8,0x2A,0x79,0x44,0x94,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0x8A,0x0A,0xE0,0x5A,
+    0x40,0x44,0x1B,0xDE,0x24,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0x99,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+};
+
+const uint8_t serverConnecting[] = {
+    
+    0xFF,0xF3,0x28,0xC4,0x00,0x0B,0xE0,0x02,0xE6,0x37,0x40,0x10,0x02,0x89,0x12,0x56,
+    0xAF,0xE8,0x27,0xC1,0x73,0xE2,0x70,0x39,0xF2,0x05,0x0E,0x02,0x00,0xF8,0x3E,0x1F,
+    0xA8,0xE1,0x05,0x4F,0x97,0x5B,0xF7,0x1C,0xFE,0x53,0xAF,0x89,0xFF,0x5F,0xF5,0x9F,
+    0x28,0xEE,0x43,0xF8,0x63,0x87,0xFF,0xE5,0xDE,0x73,0x77,0xF9,0x75,0xAF,0xED,0x42,
+    0xB4,0xD3,0x0B,0x56,0x05,0xB0,0xCE,0x41,0xFF,0xF3,0x28,0xC4,0x0B,0x0E,0xC1,0xF2,
+    0xE0,0x01,0x90,0x38,0x00,0xDC,0x91,0xC2,0xE6,0x79,0xB3,0x59,0x63,0xE2,0x5E,0x22,
+    0x03,0x7F,0xD9,0xFB,0xFF,0xFF,0xFF,0x45,0xB3,0xFA,0x8D,0xD9,0x3A,0x88,0x8E,0xDB,
+    0xA9,0xA6,0x9E,0xAC,0xFF,0xF9,0x2F,0x39,0x8D,0x24,0xC2,0x07,0x81,0x4D,0xA9,0xAA,
+    0xF9,0xCE,0x77,0x7B,0xE8,0x03,0x32,0xA5,0x62,0xED,0xAD,0xBB,0x01,0xFD,0xC9,0x9E,
+    0xFF,0xF3,0x28,0xC4,0x0B,0x0F,0x89,0xE3,0x22,0x5F,0xC5,0x38,0x02,0x34,0x38,0x06,
+    0x35,0x58,0xB5,0xB3,0xC7,0x00,0x60,0x94,0x77,0xFF,0x1C,0x34,0xDF,0xFE,0xC7,0xB3,
+    0x7F,0xE6,0x2D,0x8D,0xB7,0xD5,0x63,0xE3,0xCA,0x35,0x22,0x8F,0xFD,0xDA,0x69,0xBF,
+    0xF9,0x8A,0xC3,0xA4,0x5B,0xCC,0x80,0x80,0xAE,0xE5,0xFA,0x2B,0x7F,0xED,0x7F,0xCA,
+    0x2A,0xFD,0x75,0x31,0xB1,0x38,0x1E,0xD8,0xFF,0xF3,0x28,0xC4,0x07,0x0E,0xC1,0x5A,
+    0xBC,0x00,0xA4,0x84,0x94,0x18,0xB6,0x60,0x34,0xC4,0x88,0x26,0x83,0x54,0xEF,0x91,
+    0xC2,0x78,0x00,0x98,0x26,0x08,0x32,0xFF,0xE9,0x95,0xCD,0x7F,0xF9,0xD0,0xDF,0xFA,
+    0x33,0xFF,0xA2,0x10,0x38,0x18,0x00,0x10,0xA6,0xF0,0x40,0x16,0x1F,0xEB,0x58,0x2B,
+    0xF5,0xCF,0x72,0x84,0x8B,0x1E,0xD6,0x4C,0x11,0x1A,0x80,0xB0,0x1F,0xED,0x37,0xFC,
+    0xFF,0xF3,0x28,0xC4,0x07,0x0F,0x01,0x86,0xD6,0x5E,0x6A,0x04,0x94,0x01,0xF6,0x4D,
+    0x59,0xC1,0x24,0x02,0xE4,0xBA,0x39,0x4C,0xBD,0x9F,0xFE,0x4A,0x05,0x40,0xD4,0x77,
+    0xFD,0xF6,0x90,0x5A,0x34,0xAF,0xCF,0xC8,0xB3,0x4A,0x5F,0xF5,0x60,0xC0,0x42,0x9F,
+    0xD1,0x9E,0xEA,0x53,0x2B,0x75,0xF4,0x7A,0x0A,0x7F,0x8B,0x7E,0x5B,0xF0,0x55,0xDF,
+    0x22,0x1A,0x1A,0x01,0xEE,0xFF,0xFF,0xFF,0xFF,0xF3,0x28,0xC4,0x06,0x0E,0xA0,0xC2,
+    0xDE,0x5F,0x46,0x18,0x00,0x1C,0x01,0xFF,0xF9,0xEB,0x4B,0xEC,0x0C,0x02,0xDF,0x46,
+    0x95,0x1E,0x0C,0x30,0xA3,0xB7,0x12,0x14,0x11,0x11,0x08,0xCD,0xCE,0x9B,0xFB,0x98,
+    0x70,0x38,0xD6,0x01,0x08,0x40,0xA1,0xD2,0x6D,0x52,0x97,0x5C,0xA0,0x20,0x88,0x62,
+    0xA7,0x56,0xCC,0xBA,0xDE,0xD2,0x9F,0xFF,0xF9,0x2A,0xA5,0xE8,0x12,0x11,0x08,0xC0,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x39,0x6E,0xE0,0x01,0x8D,0x68,0x00,0xC0,0x13,0xC1,
+    0x90,0x07,0x89,0xA1,0x1A,0x64,0x4A,0x14,0x23,0x50,0x1A,0x62,0xC0,0x25,0x89,0x44,
+    0xD3,0x40,0xB1,0xD6,0x22,0xD4,0x98,0x82,0x12,0xE8,0x2B,0x9E,0xD2,0xB5,0x6D,0xFF,
+    0xFF,0xAF,0xFA,0x1C,0xC0,0xDF,0xD0,0x36,0x7F,0xD3,0x45,0x94,0x59,0xFF,0xD1,0xD1,
+    0x02,0xCA,0x13,0x8E,0x8B,0x6D,0x14,0x01,0xFF,0xF3,0x28,0xC4,0x08,0x0D,0x99,0x77,
+    0x26,0x5F,0xCD,0x28,0x02,0xFB,0xA5,0x9B,0x85,0x38,0xF1,0x35,0xFE,0x80,0xF4,0x25,
+    0x92,0x7F,0x9C,0xE1,0x30,0x08,0x5B,0xFA,0x87,0xC6,0xB7,0xFF,0xFE,0x88,0xCE,0x5F,
+    0xD4,0xEE,0x47,0x31,0x8C,0x67,0x90,0x84,0x30,0xA8,0x93,0xF5,0x19,0x73,0xDF,0x2E,
+    0x2B,0xFF,0xFD,0x6A,0xFD,0x13,0xA9,0x13,0x81,0x60,0x14,0xC8,0xF5,0x50,0x33,0x16,
+    0xFF,0xF3,0x28,0xC4,0x0C,0x0D,0x21,0x86,0xD0,0x00,0x6C,0x04,0x94,0x78,0x68,0x65,
+    0x44,0xBF,0x33,0x0F,0xCC,0x2C,0xF0,0x8F,0x93,0x65,0x5B,0xA6,0x6A,0x8F,0xFB,0x14,
+    0xBF,0xCE,0x9F,0xF4,0x2F,0xF4,0x21,0x45,0x2B,0x59,0x64,0x08,0x00,0x1C,0x44,0x0A,
+    0xD2,0x5E,0x79,0xFB,0x7E,0xAA,0x28,0x62,0x2A,0x96,0x20,0x3D,0x50,0xA8,0x98,0x17,
+    0x84,0x30,0x2E,0x94,0x4D,0xF1,0x37,0x06,0xFF,0xF3,0x28,0xC4,0x12,0x0C,0x78,0xAE,
+    0xD1,0x94,0x3B,0xC4,0x4C,0x13,0x7C,0x23,0xA7,0x0F,0x87,0x6D,0x27,0x29,0x05,0x15,
+    0xBF,0x85,0x12,0xEE,0xAF,0x67,0xAC,0x35,0xD4,0x0D,0x1E,0xC2,0x41,0xD0,0x6B,0xD9,
+    0xD6,0xDF,0xFF,0xFB,0x13,0xFA,0xA3,0x98,0x02,0x62,0x07,0x92,0xF6,0xC3,0x75,0x29,
+    0x12,0x30,0xC8,0x44,0x50,0x1A,0x73,0x4A,0x94,0x5D,0xED,0x26,0x12,0x89,0x67,0x2C,
+    0xFF,0xF3,0x28,0xC4,0x1B,0x0C,0xF8,0x7A,0xB4,0x00,0x9E,0x30,0x48,0xEC,0x6B,0xC9,
+    0xF4,0x9C,0xEE,0xFF,0xFE,0xAE,0x36,0xD9,0x7E,0x0F,0xFD,0xAF,0xFF,0xD3,0x22,0x59,
+    0x6E,0xFF,0xFE,0xE0,0x64,0x34,0x18,0xE9,0xC2,0x4C,0x06,0xF0,0x34,0x51,0xDA,0xD6,
+    0x20,0x80,0xBE,0x03,0xE8,0x00,0xE8,0xA4,0xCF,0x5D,0x22,0xC7,0xAD,0x5D,0xA1,0x67,
+    0x28,0x95,0x41,0x1C,0x4E,0xEF,0xD9,0xFF,0xFF,0xF3,0x28,0xC4,0x22,0x0B,0x28,0x66,
+    0xC8,0xCA,0x03,0xDE,0x28,0xFF,0xF4,0x3D,0x00,0x40,0x88,0x5A,0x85,0xA3,0xFF,0x45,
+    0xFC,0x95,0x01,0x90,0x21,0x0F,0x94,0x52,0x72,0x34,0x07,0x68,0x5C,0x99,0xBB,0xCB,
+    0xA6,0x20,0x14,0x0B,0x19,0x6A,0xAC,0x8D,0x30,0x6F,0xA2,0x9F,0xD9,0xBE,0xAD,0xFA,
+    0xFF,0xFF,0xFF,0xFF,0xFB,0xDF,0xD0,0xE4,0xE6,0x02,0x14,0x40,0xF8,0xB8,0x88,0x59,
+    0xFF,0xF3,0x28,0xC4,0x30,0x0C,0xE1,0xC6,0xC4,0x00,0x94,0x04,0x94,0xDF,0xF5,0x54,
+    0x85,0x15,0xD0,0xE9,0x96,0x80,0x05,0x14,0x01,0xD6,0x81,0x99,0x80,0x27,0xC1,0xDC,
+    0x15,0xD0,0xE2,0x56,0xB0,0x06,0x82,0xE1,0x20,0xB6,0x71,0x51,0xA1,0xC4,0xDF,0x53,
+    0x4D,0x67,0xE7,0x50,0xEF,0x9D,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE,0xF4,0x74,0x62,
+    0xB0,0x61,0x4F,0x6F,0xFF,0xA9,0x10,0x27,0xFF,0xF3,0x28,0xC4,0x37,0x0D,0x31,0xCB,
+    0x06,0x5E,0x6A,0x84,0x96,0x1D,0xDA,0xED,0x86,0xDB,0x01,0xF7,0xA4,0x1D,0x83,0x91,
+    0x7F,0xB9,0x73,0x52,0x98,0xAC,0x5C,0x17,0x5F,0xFC,0xC9,0x23,0x10,0xC8,0x8C,0x9C,
+    0x4E,0x07,0x0F,0xEF,0x98,0x07,0xC1,0xF3,0xFD,0x05,0x0E,0x7F,0xFF,0xD2,0xC7,0x7F,
+    0xFD,0xBF,0xFA,0x3F,0xFE,0x53,0x1A,0x41,0xFD,0xEF,0x99,0x65,0x2B,0x7E,0x0C,0x30,
+    0xFF,0xF3,0x28,0xC4,0x3D,0x0D,0x30,0x7A,0xEE,0x5E,0x6E,0x10,0x4A,0x16,0x0B,0x0E,
+    0x8B,0x76,0xB6,0xF1,0xFC,0x47,0x72,0xDC,0xA5,0x7B,0xCB,0xB7,0xCB,0xE8,0xF6,0xFF,
+    0xBF,0xFF,0xFF,0xFF,0xFE,0xEC,0xBD,0xAE,0xA8,0xCB,0x53,0xE8,0x3A,0x45,0x7B,0xAF,
+    0xFF,0x3D,0xC8,0xD6,0xAD,0xEC,0xE7,0x64,0xDC,0x94,0x66,0xA3,0x6A,0x62,0xF5,0x4D,
+    0xA4,0xCE,0x20,0x2A,0xEC,0xA7,0x45,0x77,0xFF,0xF3,0x28,0xC4,0x43,0x13,0x1B,0x12,
+    0xA4,0x00,0xC0,0x8A,0xB9,0x21,0xE8,0x2C,0x38,0xC3,0x42,0x83,0xA7,0x93,0x4A,0xFF,
+    0xFF,0xCF,0xFF,0x09,0xB9,0x6B,0x8E,0x14,0x61,0xC9,0x0B,0xD5,0xD7,0x88,0x4E,0x53,
+    0x90,0x30,0xC6,0x2E,0x0B,0x03,0x0E,0xCC,0xE9,0xF9,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+    0xC9,0xFF,0xC8,0xDF,0xC8,0x42,0x1E,0xAE,0x76,0x46,0xFF,0xFF,0xFD,0xE8,0xEA,0x17,
+    0xFF,0xF3,0x28,0xC4,0x31,0x0D,0x2A,0x42,0xBC,0x00,0xC1,0xC4,0xB8,0xFF,0xFF,0xFC,
+    0x95,0xFC,0xFA,0x96,0x91,0x64,0x10,0x10,0x01,0x48,0xA4,0xC1,0x5C,0xD4,0xC8,0xD8,
+    0xF5,0x9E,0x16,0xA0,0x0B,0xB4,0x85,0xDF,0xF4,0x06,0xD3,0x7F,0xEA,0xFF,0xE9,0xFF,
+    0xD7,0xFF,0xA9,0x9F,0xF4,0x38,0x87,0xB9,0xE9,0x9E,0x11,0x2B,0xFF,0xE5,0xFE,0x5F,
+    0xEB,0x3F,0xFF,0xFF,0xF5,0xAA,0xFA,0x8C,0xFF,0xF3,0x28,0xC4,0x37,0x0D,0x09,0xEA,
+    0xBC,0x00,0xA4,0xCE,0x98,0x8C,0x4D,0x89,0xA0,0xF8,0x00,0x59,0x50,0x7C,0xA5,0x66,
+    0x53,0x22,0xEF,0x99,0x81,0x58,0x3E,0xC4,0xF6,0xC9,0x7A,0x88,0x61,0x11,0x6F,0xFF,
+    0xFF,0xD7,0xFF,0xFF,0xF9,0x5B,0xFF,0x56,0xF5,0x2E,0x84,0x0A,0x06,0x6B,0x9C,0xB2,
+    0xBF,0x43,0xE9,0xA1,0x01,0xDA,0xAA,0xFA,0x0D,0x8B,0x80,0xF3,0x04,0x8D,0x29,0x37,
+    0xFF,0xF3,0x28,0xC4,0x3D,0x0C,0xD1,0xBE,0xBC,0x00,0xA4,0x0A,0x94,0x0D,0xD0,0x85,
+    0x59,0xDE,0x39,0xD4,0xC6,0x8E,0x52,0x02,0xA1,0x50,0xE9,0xEB,0xD3,0xEE,0xD4,0xAA,
+    0x7F,0x5F,0xD1,0x9C,0xFF,0x39,0xF4,0x7C,0x93,0x1F,0x44,0xAA,0x1D,0xC8,0xFA,0x1C,
+    0x3B,0xF3,0xAD,0xD1,0xCE,0xBE,0x2F,0x5B,0x2E,0x8B,0x91,0x22,0x2C,0x4A,0xA3,0xE6,
+    0x15,0x14,0x5A,0x07,0x01,0x89,0x17,0x49,0xFF,0xF3,0x28,0xC4,0x44,0x0B,0xF8,0x96,
+    0xA8,0x00,0x3E,0x10,0x4C,0x6D,0x4B,0x56,0x5F,0x9B,0xBE,0xE5,0xBD,0x24,0x75,0x05,
+    0x04,0x02,0x43,0x01,0x15,0x7B,0x89,0x0F,0x84,0x6A,0x6C,0xDE,0x74,0x95,0x66,0xA1,
+    0xD4,0x8C,0xD0,0xD6,0x01,0xCA,0x65,0xC4,0x89,0x3E,0x38,0x60,0x5C,0x00,0x7D,0x81,
+    0x75,0x18,0x38,0x25,0x0E,0xD4,0x28,0xC7,0x28,0xA9,0x18,0x12,0xC4,0xFF,0xEF,0xF7,
+    0xFF,0xF3,0x28,0xC4,0x4F,0x14,0x19,0x4E,0xA4,0x00,0x7A,0x06,0x70,0xB9,0x6A,0x41,
+    0xFF,0xC7,0xFE,0xBC,0x15,0x0D,0x9C,0x03,0x68,0x85,0x19,0x02,0x34,0x42,0x42,0xEC,
+    0x5B,0x70,0x61,0x97,0xCA,0xBF,0xFB,0x19,0xA1,0x52,0xDE,0x9A,0xC4,0xA0,0x18,0x70,
+    0x95,0x91,0x0E,0x04,0x0D,0xA1,0x26,0xC0,0x44,0x9C,0x64,0x08,0xD3,0xBE,0xE5,0xFF,
+    0x5E,0x7A,0x5A,0xF0,0xD7,0xFE,0xBA,0xEC,0xFF,0xF3,0x28,0xC4,0x39,0x0D,0xE0,0xE2,
+    0xC0,0xCA,0x4A,0x46,0x70,0xA4,0xC5,0x70,0x0E,0x88,0x33,0x4B,0x99,0xD6,0x97,0xCB,
+    0x59,0xE9,0x8B,0x08,0x0A,0xA4,0x24,0xB8,0x8D,0x76,0x92,0x35,0xE1,0xC1,0x36,0x05,
+    0xDB,0x62,0xB8,0x0B,0x32,0x3D,0x6A,0x3A,0xF3,0x70,0x51,0xE5,0xA6,0x42,0x80,0x40,
+    0xAD,0x3A,0x2A,0xFA,0xC3,0x1E,0x02,0xEA,0x06,0xF0,0x40,0x13,0x14,0xDA,0x49,0xD3,
+    0xFF,0xF3,0x28,0xC4,0x3C,0x0B,0x90,0xA6,0xBC,0x00,0x96,0x58,0x4C,0x92,0x73,0x14,
+    0x23,0x50,0x85,0x78,0xFE,0x4E,0x7B,0xD2,0x21,0xAA,0xE4,0x31,0xC2,0xBA,0x2F,0xA5,
+    0x69,0xC6,0xA4,0x64,0x81,0x8A,0xC1,0x9A,0xE7,0x22,0x5A,0x80,0x03,0xC0,0x3F,0x5F,
+    0x87,0xD4,0x89,0x96,0xE4,0xD0,0xDC,0x1D,0x63,0xAB,0xAE,0x41,0x50,0xD8,0x10,0x93,
+    0x10,0x13,0x89,0x93,0x88,0x08,0x62,0x7F,0xFF,0xF3,0x28,0xC4,0x48,0x0A,0xA0,0x9E,
+    0xB4,0x00,0x9E,0x5E,0x4C,0x0B,0x2D,0x61,0xB0,0xA4,0x0C,0x38,0xB9,0x79,0x65,0x8A,
+    0x36,0x79,0x4A,0x4C,0xD9,0xA7,0x82,0x08,0x8A,0x6D,0x3C,0x02,0x14,0x12,0xB7,0x6C,
+    0x00,0x1B,0x01,0xFC,0xBC,0x0E,0x10,0x5A,0xDF,0xBE,0x90,0x23,0xE2,0x71,0xFA,0x41,
+    0x44,0x0E,0x34,0x8B,0xA8,0xB3,0xD7,0xEC,0x47,0x78,0xB3,0xB3,0x78,0x17,0xDF,0xF0,
+    0xFF,0xF3,0x28,0xC4,0x58,0x0C,0xC0,0xAA,0xA8,0xF0,0xCE,0x58,0x4D,0x18,0x16,0x7F,
+    0x07,0xFD,0x9F,0xFF,0xFF,0xFF,0xFF,0xFE,0x2B,0xFF,0xF6,0xAE,0x11,0xFC,0xE1,0x14,
+    0x04,0xA0,0xD8,0x90,0x7F,0xF2,0xAF,0x56,0xBB,0x2A,0x30,0xC9,0x8E,0x53,0xC3,0x50,
+    0x15,0x4D,0x6A,0x6F,0xF6,0xA8,0x63,0xB8,0x24,0x5A,0xFA,0xCE,0x42,0xD0,0x90,0x0C,
+    0x40,0x94,0x3F,0xBE,0x54,0x50,0x4B,0x58,0xFF,0xF3,0x28,0xC4,0x60,0x0D,0x40,0xC6,
+    0xEA,0x5E,0x6B,0x5E,0x72,0xE5,0x04,0x47,0x81,0xFE,0x3F,0xF3,0xCF,0xE5,0x0D,0x20,
+    0x28,0x11,0xA9,0xCA,0xB0,0x46,0x63,0x71,0x38,0xDC,0x2D,0x83,0x9B,0x6E,0x11,0x4A,
+    0x9D,0x0E,0x14,0xB3,0x96,0x79,0xD7,0x6B,0x3F,0x9F,0x33,0x95,0x08,0xD4,0x2F,0x3D,
+    0x48,0x2C,0x16,0x0D,0x33,0xF6,0xE3,0x8B,0x35,0x17,0xD6,0x64,0xC2,0x00,0x02,0x10,
+    0xFF,0xF3,0x28,0xC4,0x66,0x0B,0xB8,0xC2,0xA8,0x00,0x96,0x98,0x4D,0x0F,0x09,0x50,
+    0x5A,0x5C,0x88,0x2C,0xA1,0xC8,0x3B,0xDE,0x23,0x65,0x42,0x31,0xC4,0xD7,0x69,0x65,
+    0x4F,0x18,0x68,0xB9,0x99,0x12,0xC3,0xB4,0xF7,0x27,0x41,0xC2,0x0A,0xE0,0x24,0x44,
+    0xB2,0x49,0xD6,0x92,0x0A,0x32,0x65,0xD2,0x7B,0x3A,0xD9,0x5F,0xEE,0xC8,0x27,0x5B,
+    0x24,0xBF,0xF7,0x64,0xFE,0x8D,0x66,0x3F,0xFF,0xF3,0x28,0xC4,0x72,0x0C,0xE8,0xDA,
+    0xAC,0x29,0x59,0x48,0x00,0x14,0x48,0x94,0xEF,0xDE,0x5D,0x07,0xD4,0x11,0x11,0x67,
+    0xBC,0xE7,0x97,0x28,0xE4,0x05,0x42,0xE2,0xF3,0xA2,0x5F,0xFF,0x01,0xA4,0xCA,0x96,
+    0x52,0x0D,0x89,0x45,0xA0,0x50,0x28,0xB4,0x0A,0x2D,0xB6,0xDB,0x2C,0x60,0x0C,0xB7,
+    0x6D,0xDC,0x71,0x5D,0x8E,0x4F,0xDD,0xC9,0xFE,0x77,0xA7,0xDA,0xD9,0xD0,0xC4,0xFF,
+    0xFF,0xF3,0x28,0xC4,0x79,0x16,0x71,0x3A,0x78,0x13,0x9B,0x68,0x00,0xFC,0xAE,0x21,
+    0xFF,0x3F,0x23,0x21,0xD1,0x48,0xC4,0x4F,0x6F,0xB9,0x11,0x5A,0xCE,0xA7,0x12,0x14,
+    0x60,0xE8,0x30,0x06,0x21,0xFE,0xFC,0x84,0x53,0xB9,0x09,0x38,0xB9,0x62,0x66,0x17,
+    0xB2,0xA9,0x8E,0x3C,0x82,0xD6,0x6C,0x9B,0x6A,0x4C,0x8C,0xD8,0x7C,0xEC,0x07,0x51,
+    0x70,0x41,0x70,0xE5,0xD8,0xE2,0x6E,0xF1,0xFF,0xF3,0x28,0xC4,0x5A,0x18,0x2B,0x22,
+    0xEE,0x5F,0x82,0x28,0x02,0x70,0x71,0x41,0x10,0x40,0xF8,0x25,0x1B,0x6D,0xB6,0xC3,
+    0x6D,0xB6,0xD5,0xD1,0xE2,0x5C,0xD2,0xBA,0xD1,0x74,0x84,0xAA,0x5E,0xDB,0xF4,0xFF,
+    0x2A,0x2A,0xF7,0xF5,0xF5,0x92,0xFB,0x77,0x7B,0xFD,0x4A,0xBA,0x3E,0x67,0x42,0x33,
+    0x59,0x32,0xCE,0xE5,0x65,0x63,0xAA,0x80,0xE6,0x50,0xE5,0x05,0x81,0x91,0x55,0x8E,
+    0xFF,0xF3,0x28,0xC4,0x34,0x16,0xC3,0x13,0x0E,0x5F,0xC2,0x28,0x03,0xA6,0x17,0x62,
+    0x21,0x99,0x4C,0xA5,0xB9,0x81,0x0E,0x2A,0x2A,0x61,0x53,0x15,0xC5,0x81,0x14,0x84,
+    0x15,0x0D,0x71,0x76,0x52,0x32,0xCC,0x95,0xB7,0xFF,0xA2,0xA3,0xEA,0xAA,0x47,0x2A,
+    0xA3,0xA0,0xB6,0xE6,0x1A,0x39,0x76,0xDB,0x6D,0xAC,0x8D,0x81,0xD0,0x4E,0x51,0xDE,
+    0x13,0xC2,0x1D,0x0D,0x49,0x43,0x6A,0x59,0xFF,0xF3,0x28,0xC4,0x14,0x0E,0x00,0x5F,
+    0x0E,0x5E,0x08,0xC6,0x2A,0xE5,0x97,0x41,0x15,0x80,0x50,0xB7,0xFA,0x75,0xCE,0xCD,
+    0x56,0x89,0x87,0xFB,0x16,0xB0,0x63,0xA6,0xB7,0x88,0x48,0x93,0x7F,0xEF,0xB6,0xE4,
+    0xB8,0x68,0xAB,0x82,0x5F,0xFF,0xF9,0xE2,0xE8,0xFD,0xEB,0xBF,0xF9,0x46,0xD1,0xF0,
+    0x31,0x0A,0x89,0x9C,0xCA,0x20,0x68,0x65,0xEA,0x5C,0x85,0xA4,0x09,0x10,0x94,0x9B,
+    0xFF,0xF3,0x28,0xC4,0x17,0x0F,0xB2,0x56,0xC0,0x00,0xC3,0x44,0xB8,0x2F,0xE8,0x2F,
+    0xE8,0x59,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x4F,0xF4,0x6B,0x23,0x1C,0xEB,
+    0x29,0xD0,0x89,0xCE,0xFF,0xDE,0xEF,0x46,0xAC,0xE0,0xC2,0xB8,0x44,0x61,0x1F,0xFF,
+    0x2F,0x8D,0x53,0xD4,0x41,0xFF,0xFF,0xFA,0x8E,0x02,0x01,0x01,0x46,0x81,0x6B,0x52,
+    0xB5,0xB5,0xDE,0x5F,0xF0,0x32,0x84,0xFC,0xFF,0xF3,0x28,0xC4,0x13,0x0C,0xC1,0xEE,
+    0xC8,0x00,0xC3,0x44,0x98,0x64,0xA0,0x5C,0x2E,0x17,0x11,0x4B,0xFF,0xFF,0xFF,0xFF,
+    0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE,0x8D,0x94,0xA5,0x65,0x12,0x59,0x61,0x6A,0xAA,
+    0xEA,0x96,0x0D,0x21,0x29,0x81,0x01,0xE7,0xF8,0xED,0xE9,0xE5,0xF6,0x35,0xB6,0x32,
+    0xE8,0x32,0xD6,0x42,0xB9,0x68,0xDF,0x6E,0x7E,0xCD,0x06,0x5D,0x46,0x6F,0xFF,0xFF,
+    0xFF,0xF3,0x28,0xC4,0x1B,0x0B,0xC0,0x5E,0xCC,0xCB,0x4F,0x10,0x02,0xFF,0xFF,0xFF,
+    0x4B,0x54,0x6C,0x4E,0x18,0x68,0xA5,0xAF,0x30,0xD6,0x23,0x59,0x00,0x12,0xFF,0xFF,
+    0xE9,0x82,0x9A,0x96,0xDA,0xA7,0xE4,0x62,0x78,0x56,0x88,0x9E,0x80,0x69,0x9F,0x38,
+    0x90,0x80,0xE1,0x64,0xA0,0x83,0xEA,0x89,0x64,0xD8,0x5A,0x0E,0x9C,0xE7,0xAE,0xFA,
+    0x2F,0xAD,0x67,0x23,0xFF,0xA3,0xAF,0xFF,0xFF,0xF3,0x28,0xC4,0x27,0x15,0xEA,0xA6,
+    0x8C,0x01,0x98,0x38,0x01,0xFF,0x9A,0xBE,0x94,0xFE,0xC9,0x44,0x38,0xE0,0x5A,0x22,
+    0xBE,0x93,0x9C,0x77,0xFF,0x07,0x25,0x87,0x0A,0xCD,0x38,0xB9,0x54,0x07,0xC7,0x1A,
+    0x44,0x74,0x6A,0x50,0x75,0x0E,0x52,0x85,0xCE,0xFF,0xF3,0x9B,0xD3,0x41,0xE2,0x8F,
+    0x77,0xFF,0x0A,0x9C,0x68,0x22,0x00,0x6B,0x80,0xC0,0x7C,0x07,0xEC,0x71,0x22,0x56,
+    0xFF,0xF3,0x28,0xC4,0x0A,0x0A,0x58,0x65,0xDC,0x7F,0xC6,0x08,0x00,0x0A,0x01,0x48,
+    0xD4,0x58,0x91,0x2B,0x05,0x00,0xA4,0x69,0x14,0x58,0xEA,0x2A,0xFD,0x47,0xB9,0x6A,
+    0x7F,0xFF,0xFF,0xC4,0xBF,0xFF,0xFF,0xFF,0xAC,0xEF,0xF9,0xD2,0xB5,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0x1B,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0x56,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0x91,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,
+    0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x4C,0x41,0x4D,0x45,0x33,0x2E,0x39,0x39,0x2E,0x35,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,
+    0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0xFF,0xF3,0x28,0xC4,0xC4,0x00,0x00,0x03,0x48,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+};
+
+const uint8_t serverConnectSucceed[] = {
+    
+    0xFF,0xF3,0x28,0xC4,0x00,0x0B,0x00,0x02,0xB5,0x6F,0x41,0x10,0x02,0x59,0x52,0x10,
+    0x13,0x83,0xEE,0x58,0xA2,0x8C,0xAC,0x81,0x7B,0x16,0x17,0x88,0x2A,0xCA,0x19,0x53,
+    0x8F,0xEA,0x1A,0x3C,0xFF,0x1A,0x2B,0x13,0xBD,0x73,0x3D,0xEB,0x07,0xE5,0x2A,0xFF,
+    0xCF,0xFF,0xBD,0x1A,0x7F,0xFD,0x4E,0xFF,0x90,0x9E,0x95,0x55,0xBB,0x5D,0xA0,0x8E,
+    0xF7,0x74,0x4B,0x3F,0x3B,0x75,0x2F,0x6B,0xFF,0xF3,0x28,0xC4,0x0F,0x0E,0xB1,0x5E,
+    0xC4,0x01,0x82,0x10,0x00,0x23,0x33,0x13,0x42,0x90,0x1A,0xD1,0x20,0xA8,0x93,0x9E,
+    0x56,0x77,0x3A,0x59,0x5F,0x9D,0x79,0x61,0x85,0x17,0xB6,0x70,0xE3,0xA7,0xDE,0x69,
+    0xDB,0x5A,0x52,0x89,0x6A,0x2E,0x04,0x62,0x77,0x20,0x54,0x73,0xFF,0xD7,0xA3,0xDF,
+    0xA1,0xFF,0xE7,0xFC,0x73,0x70,0x15,0x63,0x8C,0xB9,0xA8,0xD9,0xE7,0xE5,0xF0,0xE5,
+    0xFF,0xF3,0x28,0xC4,0x0F,0x0E,0xE8,0xCE,0xC0,0x01,0xCF,0x30,0x00,0x05,0x42,0x01,
+    0xE7,0xA5,0x31,0xE0,0x05,0xA7,0xFE,0xF7,0x32,0x41,0x21,0xF9,0xE7,0xD4,0x6B,0x4E,
+    0x32,0x4D,0x50,0x68,0x55,0xBA,0xD9,0x0D,0x2B,0x44,0xCB,0x8D,0x4B,0x3E,0x49,0x2B,
+    0x1A,0x64,0x51,0xBD,0x5E,0xEF,0xD5,0xFD,0x7F,0x5A,0xA0,0x04,0x92,0x88,0x20,0x1F,
+    0xBA,0x9C,0x7C,0x00,0xBC,0x62,0x34,0x9A,0xFF,0xF3,0x28,0xC4,0x0E,0x10,0x78,0xA2,
+    0xBD,0x94,0x6E,0x5E,0x4C,0x95,0xF1,0xA5,0xA5,0x9A,0x88,0x08,0x91,0x39,0xF3,0x16,
+    0x01,0x5B,0x65,0x2C,0xB0,0x62,0xF6,0xE2,0xD8,0x1A,0x67,0x1A,0x6D,0x5D,0x09,0x89,
+    0xC9,0x72,0x6B,0x02,0x20,0x91,0xA7,0xCA,0x80,0x80,0xC0,0xC2,0xCB,0x0F,0xA1,0xE8,
+    0x5F,0xFF,0x7F,0xFF,0xFF,0xFF,0xA7,0xC5,0xD7,0x41,0x10,0x23,0xFA,0x0C,0xC6,0xC0,
+    0xFF,0xF3,0x28,0xC4,0x07,0x0E,0x80,0xB2,0xB4,0xCA,0x56,0x5E,0x4C,0x12,0x4A,0xA0,
+    0x79,0xAC,0xEA,0x04,0xB7,0xBE,0x53,0xAE,0x91,0x01,0xE7,0x26,0x26,0xB2,0x8F,0x8A,
+    0x41,0x19,0x7D,0x5B,0x0D,0x64,0xA4,0x6E,0x08,0xF8,0x99,0xC6,0x81,0x67,0xA9,0x23,
+    0x29,0x44,0xB4,0xE9,0xFC,0x77,0xC1,0xAF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xE9,
+    0x0C,0x08,0xC0,0x06,0x50,0x00,0xB2,0x81,0xFF,0xF3,0x28,0xC4,0x08,0x0F,0x30,0xC2,
+    0xE2,0x5E,0x0E,0x0E,0x4E,0xF7,0x8A,0xE3,0x4A,0x4A,0xF0,0x71,0xE3,0x9C,0xD7,0x39,
+    0xFB,0xB9,0x0D,0x02,0x41,0x27,0xE8,0x70,0xF0,0x16,0x18,0xFC,0x78,0xE8,0xA8,0x68,
+    0x37,0x77,0x40,0x20,0xD0,0xB7,0xFF,0xFF,0xFF,0xFF,0xFD,0x56,0x38,0xCB,0x3F,0xA4,
+    0x24,0x3C,0x22,0x0E,0xC2,0xA4,0x8A,0x0B,0x8B,0xA1,0x24,0x28,0x5A,0x76,0x80,0x2D,
+    0xFF,0xF3,0x28,0xC4,0x06,0x0E,0x20,0x92,0xD5,0xBE,0x13,0xDE,0x4E,0xA0,0x7D,0x41,
+    0x93,0xE3,0x8F,0x91,0x5B,0xAF,0x4F,0x8C,0x65,0xE3,0x7A,0x24,0x8C,0xC4,0xFE,0x97,
+    0xAE,0xE0,0x5E,0x6C,0x1C,0x61,0x48,0xEA,0x92,0xD5,0x02,0x62,0x71,0xA8,0x94,0x75,
+    0xFF,0xFF,0xFF,0xFF,0xFC,0xD8,0x33,0xE9,0xFA,0x3A,0x56,0x93,0xD7,0x3D,0x31,0x65,
+    0x10,0x03,0xA4,0x97,0xFE,0x00,0xFA,0x34,0xFF,0xF3,0x28,0xC4,0x08,0x0C,0xF8,0xD6,
+    0xD6,0x58,0x6B,0xF0,0x71,0x11,0x61,0x03,0x01,0x34,0x63,0x57,0x70,0xF7,0x4B,0x35,
+    0xB9,0x05,0x40,0x5E,0x99,0x57,0xD7,0xFF,0x3D,0x80,0xE4,0x50,0x02,0xA8,0xDA,0x53,
+    0x8F,0x72,0x93,0x0E,0xDC,0xA2,0x76,0xDD,0xFB,0x12,0x9B,0xF8,0x7E,0xB9,0x5D,0xE4,
+    0x76,0xB6,0x17,0x2B,0x92,0xDB,0x40,0xA0,0x01,0xC7,0xF1,0x66,0x96,0x40,0x05,0x34,
+    0xFF,0xF3,0x28,0xC4,0x0F,0x0F,0x70,0xE7,0x02,0x5E,0x45,0x12,0x72,0xD1,0xF4,0x16,
+    0x78,0x83,0x81,0x88,0x44,0x0D,0x8F,0x17,0x9F,0xEA,0x20,0x05,0xB3,0x55,0x9E,0x86,
+    0x6C,0xFF,0x13,0x41,0x50,0x32,0xC0,0xA5,0x84,0x49,0xBB,0x5B,0x3C,0x4C,0xD3,0x3A,
+    0x03,0x58,0x11,0x1A,0xC2,0xE0,0xF9,0xFF,0xFF,0xFF,0xFE,0x42,0x19,0x36,0xCD,0xDA,
+    0xED,0xB6,0xDA,0x81,0xC1,0x39,0x72,0x81,0xFF,0xF3,0x28,0xC4,0x0C,0x0D,0x11,0x27,
+    0x02,0x5E,0x11,0x84,0x72,0x01,0x1D,0x1F,0x5A,0xF8,0xE6,0xA3,0xD1,0x6D,0xFE,0xAB,
+    0x83,0x0E,0x96,0xF8,0x63,0x3F,0xF4,0x35,0x17,0xFA,0xFF,0x94,0x29,0x9F,0xE7,0x79,
+    0xBF,0xF8,0xDF,0xF1,0x70,0xD2,0x2F,0xB9,0x7A,0x19,0xFF,0xFF,0xE5,0x2A,0xED,0x0F,
+    0x92,0xE4,0x16,0xE8,0x0B,0x3F,0xFF,0xFD,0x7F,0xFF,0xFF,0xFF,0xFD,0x3F,0xEB,0x4B,
+    0xFF,0xF3,0x28,0xC4,0x12,0x10,0xD3,0x16,0xB4,0x00,0x08,0x4A,0xB9,0xEF,0x54,0x91,
+    0xBF,0x57,0x23,0x32,0x96,0x8C,0xFA,0x9C,0x84,0x6E,0xC7,0x9E,0x46,0x1A,0x3F,0x44,
+    0x53,0xA3,0x10,0x92,0x1E,0x74,0x64,0x64,0x6B,0x1E,0x4A,0x10,0x8D,0xD0,0xEA,0x66,
+    0x39,0xC0,0x71,0x61,0x46,0x71,0x30,0x3C,0x8A,0x26,0x10,0x61,0x11,0x69,0xEA,0xF5,
+    0xFF,0xCC,0x67,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF3,0x28,0xC4,0x09,0x0D,0xA3,0x12,
+    0xC8,0x00,0x08,0x4A,0xB9,0xFF,0xFF,0xFF,0xFF,0xAF,0xFF,0xDF,0x6A,0xB1,0x2A,0x8C,
+    0x55,0xD3,0xEC,0xAF,0x22,0xF7,0x57,0x65,0x6A,0x88,0x87,0xC4,0xC0,0x48,0xB8,0x98,
+    0xA4,0x82,0x8D,0xED,0xA3,0xF4,0x96,0x82,0xC9,0xF4,0x3A,0xD0,0x78,0xB2,0x8F,0x65,
+    0x48,0x99,0x1A,0x3D,0x01,0x97,0xFF,0xD4,0xBD,0x05,0x80,0xF8,0x07,0x97,0xBE,0xE7,
+    0xFF,0xF3,0x28,0xC4,0x0D,0x0C,0xE2,0x6E,0xD4,0xCA,0x58,0x44,0xB8,0xF7,0xFF,0xFF,
+    0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xEA,0xF3,0x53,0xB2,0xB5,0x9F,0xFE,0xF5,
+    0xDC,0x8F,0x45,0x6E,0xEC,0xEC,0xA8,0x83,0x20,0x14,0x48,0xF6,0x7F,0x6F,0x26,0x5A,
+    0x45,0x84,0x81,0x9A,0xFF,0xD7,0xE3,0x8D,0x5A,0x7A,0xD5,0xD0,0x98,0x52,0x6A,0x15,
+    0x35,0xE8,0x78,0x4A,0x39,0xE6,0xA8,0xE0,0xFF,0xF3,0x28,0xC4,0x14,0x0D,0x09,0xD2,
+    0xC0,0x00,0xC9,0xC4,0x94,0x38,0x19,0xFF,0xCC,0xFF,0xA3,0xB7,0xFF,0xFF,0xFF,0xFF,
+    0xFF,0xFF,0xFF,0xFD,0xA3,0xB0,0x18,0x7A,0xAA,0xAB,0x16,0x4B,0x83,0x54,0x8B,0x82,
+    0x2B,0x62,0xFF,0xFF,0xF4,0x55,0xAD,0x2A,0x9C,0x10,0xA4,0xEF,0xE6,0x5C,0xEB,0x63,
+    0xAC,0xDE,0xCA,0xF9,0xCC,0xF1,0xC4,0xFA,0xDC,0x98,0x2B,0xC9,0x82,0x5F,0xEB,0xFF,
+    0xFF,0xF3,0x28,0xC4,0x1A,0x0C,0xB0,0x62,0xB8,0x00,0x06,0x1E,0x28,0xFF,0xFF,0x36,
+    0x28,0x16,0xA8,0xDA,0x9A,0xC2,0x28,0xBD,0x96,0x47,0x0B,0x04,0x81,0xD0,0xE1,0x62,
+    0x34,0xE8,0xB1,0x17,0xE9,0xA5,0xF8,0x6D,0xA3,0x9C,0x8E,0xA6,0xB2,0x69,0xF5,0x2B,
+    0x3A,0xE1,0x42,0x1B,0x81,0xCC,0x71,0x5C,0x06,0x17,0x0B,0x96,0x7E,0x05,0x11,0x7F,
+    0xFF,0xFF,0xFF,0xB9,0xE2,0x04,0x52,0xA0,0xFF,0xF3,0x28,0xC4,0x22,0x0B,0xD8,0x5A,
+    0xC0,0x00,0x06,0x1E,0x24,0xC9,0xC0,0x19,0xF4,0x10,0x5A,0x7B,0x56,0xE0,0x89,0x78,
+    0x38,0x82,0x6A,0xFF,0xFD,0x37,0x9D,0x65,0xC0,0x18,0xC7,0x03,0xC3,0x7C,0xCB,0x27,
+    0x83,0x44,0x9F,0x07,0x51,0x0A,0xA5,0xA1,0xDA,0x50,0x48,0xF7,0xFF,0xFF,0xFF,0xFF,
+    0xFF,0x86,0x85,0xC7,0x99,0x4B,0x3F,0xD3,0x1E,0x1A,0x34,0x6C,0x7B,0x7F,0xA2,0x89,
+    0xFF,0xF3,0x28,0xC4,0x2D,0x0A,0xF0,0x5E,0xC4,0x01,0x4F,0x10,0x00,0x41,0x19,0x4B,
+    0xB3,0x7A,0x1A,0x6A,0x3F,0x2D,0x15,0x16,0x58,0x37,0x24,0x32,0x4C,0xEC,0xB4,0x48,
+    0xA4,0xF2,0x41,0xE2,0x61,0x20,0x60,0x21,0x09,0x4D,0x07,0xC3,0x57,0x74,0x67,0x5E,
+    0x72,0xFF,0xFF,0xE9,0x7F,0xFF,0x9F,0xFA,0xFF,0xFF,0x79,0xE7,0x98,0x68,0xD4,0xB5,
+    0x7A,0x1C,0x36,0x2B,0xFF,0x2C,0x44,0xF3,0xFF,0xF3,0x28,0xC4,0x3C,0x16,0xA2,0x96,
+    0x9C,0x01,0x98,0x38,0x00,0x07,0x09,0xBB,0x0D,0xC4,0x71,0x39,0x02,0x28,0xAD,0x34,
+    0xD3,0x7A,0x58,0xB3,0xB1,0xBF,0x9A,0xAD,0x38,0x68,0x38,0x61,0x77,0xE7,0x84,0x47,
+    0x84,0x42,0x59,0x6A,0xE4,0xDD,0x77,0x7F,0x4B,0x25,0xDF,0x64,0x90,0x12,0xB1,0x99,
+    0xC6,0xBB,0x26,0x65,0xEE,0x85,0xD3,0x3D,0xCA,0x06,0x58,0xF3,0xEE,0xE2,0x40,0x0B,
+    0xFF,0xF3,0x28,0xC4,0x1C,0x13,0x12,0x5A,0xA8,0x01,0x98,0x50,0x00,0x8D,0xDB,0xF8,
+    0x96,0x21,0xE4,0xFF,0xF9,0xE6,0x13,0xFF,0xFE,0x93,0xCD,0x52,0x7F,0xFF,0xE7,0x98,
+    0xAE,0x48,0x6F,0xFF,0xFE,0x50,0x92,0x40,0x48,0x37,0x20,0x24,0x26,0xDF,0xFF,0x7F,
+    0xFC,0x90,0x90,0x78,0x3C,0x24,0x1E,0x38,0x54,0xD7,0xFF,0xFF,0x42,0x6A,0xFF,0xFD,
+    0xFF,0xB3,0x89,0x7A,0xC7,0x86,0x16,0x64,0xFF,0xF3,0x28,0xC4,0x0A,0x0E,0x99,0xDE,
+    0xD4,0x01,0x98,0x38,0x00,0x95,0x02,0xE1,0x49,0xDA,0xB5,0x20,0x12,0x86,0x8B,0x42,
+    0x8C,0x78,0x1F,0x1D,0x07,0xA2,0xF5,0x2F,0x35,0x4C,0xA2,0x0B,0x69,0xFD,0xBD,0xFF,
+    0xFF,0xD7,0xFF,0xFF,0xFE,0x8A,0x69,0xC6,0x3D,0x34,0xA6,0xDD,0xA8,0xEA,0x5D,0x95,
+    0xBB,0x56,0xCD,0x56,0x25,0x55,0xFF,0xFF,0xD6,0x52,0xA1,0x1C,0x11,0x62,0x83,0x79,
+    0xFF,0xF3,0x28,0xC4,0x0A,0x0E,0x81,0xBA,0xC8,0x01,0xD8,0x38,0x00,0x6F,0x51,0xE2,
+    0xA9,0x60,0xD8,0xCD,0x34,0xBA,0x9B,0x29,0x28,0xC0,0xAC,0x63,0xFA,0x01,0x20,0x45,
+    0x1B,0xC5,0x2F,0xF5,0x29,0xFA,0x9F,0xFD,0xFF,0x4F,0xFF,0xFF,0xFF,0xA2,0xA1,0x86,
+    0x68,0x36,0x1E,0x67,0xC9,0x03,0x78,0x89,0xBA,0x10,0x97,0x96,0xE8,0x1A,0x6B,0x35,
+    0x9B,0x6D,0x85,0xD8,0x01,0xF7,0x52,0x20,0xFF,0xF3,0x28,0xC4,0x0B,0x0D,0x38,0xA7,
+    0x26,0x5E,0x54,0x16,0x4E,0x15,0x01,0xA0,0x9F,0x4B,0x54,0x81,0x1E,0x34,0x3A,0xD6,
+    0xA4,0x18,0x95,0x13,0x2F,0xE1,0x25,0xCB,0x4F,0xC5,0xF2,0x8D,0x07,0x1F,0x22,0xEC,
+    0x35,0xAF,0xDF,0xFF,0xFD,0x75,0x83,0x46,0xDC,0xF9,0xD3,0xD6,0x9E,0x6F,0xD2,0xFF,
+    0xFF,0xCF,0x38,0x9C,0xF8,0x70,0x63,0x84,0xDC,0x39,0x5C,0x3F,0x97,0x30,0xBB,0x65,
+    0xFF,0xF3,0x28,0xC4,0x11,0x0C,0x90,0x96,0xB4,0x01,0x5A,0x40,0x00,0x81,0x25,0xEC,
+    0x73,0x98,0x63,0x72,0xDC,0x3B,0x24,0x05,0xA4,0x26,0xFB,0x48,0xA9,0xC1,0x5E,0x22,
+    0x24,0xF8,0xB1,0xE7,0x7F,0xFF,0xFD,0xA2,0x22,0x4D,0x2C,0x1D,0x6D,0x83,0xAA,0x1B,
+    0xED,0xF8,0x6D,0x8D,0x47,0xF7,0x97,0xF8,0x02,0x10,0x70,0x4F,0x0C,0x3D,0xFF,0x16,
+    0xBD,0x6E,0x33,0xCF,0x0C,0x1C,0xEA,0x02,0xFF,0xF3,0x28,0xC4,0x19,0x12,0xC3,0x16,
+    0xB4,0xCB,0x99,0x28,0x01,0x93,0x91,0x4E,0xC2,0x22,0xA8,0x23,0xEA,0xF3,0xD8,0xCA,
+    0x86,0x4F,0x77,0xBF,0x47,0xA5,0xFF,0xFF,0xFF,0xFF,0xFF,0x45,0x35,0xBB,0xB9,0xD4,
+    0x78,0xA7,0xFF,0xD7,0xFD,0x53,0xE4,0x33,0x48,0x55,0x27,0xFF,0xFF,0x7D,0xFA,0x76,
+    0x8E,0x13,0x31,0xE8,0x73,0x0E,0x08,0xFA,0x17,0x59,0x70,0x36,0x00,0x04,0x40,0x7C,
+    0xFF,0xF3,0x28,0xC4,0x09,0x0C,0xA1,0xD6,0xB8,0x01,0xCD,0x10,0x00,0x11,0xB3,0x72,
+    0xFA,0x69,0xB7,0xAD,0x3F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xEB,0xDE,
+    0x9A,0x38,0xCF,0x45,0x7A,0x87,0xB8,0xB3,0xCB,0x1D,0x0A,0x34,0xE8,0xC2,0x5B,0xBF,
+    0x2B,0xAD,0xC8,0x52,0x90,0x99,0x2A,0xFA,0xD2,0x5A,0xCC,0x89,0xA0,0x1E,0x00,0x0D,
+    0xF0,0xD2,0x6C,0x59,0x22,0x24,0x96,0x87,0xFF,0xF3,0x28,0xC4,0x11,0x0C,0x91,0x9A,
+    0xB8,0x00,0xA2,0x84,0x94,0x4E,0x42,0xA0,0x18,0x0D,0x83,0x43,0x15,0xFF,0x22,0x10,
+    0x8D,0xFF,0x45,0xFF,0xEA,0xFF,0xFF,0xFF,0xFF,0xFA,0x28,0x00,0x85,0xE2,0xA4,0x0E,
+    0x2E,0xA3,0x45,0x3F,0xEA,0x52,0xAA,0xFA,0x9F,0x51,0x98,0x88,0x01,0xA9,0x54,0x1C,
+    0xC4,0xD4,0xB7,0xD2,0x7B,0x11,0x20,0x3D,0x9C,0xAE,0xB7,0xFA,0xAA,0x1C,0xB3,0x4F,
+    0xFF,0xF3,0x28,0xC4,0x19,0x0D,0x01,0xFE,0xB8,0x00,0xA4,0xCE,0x98,0xFE,0x7F,0xFF,
+    0xCC,0xFF,0xEA,0xFF,0xFA,0x0F,0x9F,0xFE,0xE2,0x30,0x09,0x09,0xDF,0xFB,0x31,0xAD,
+    0xFF,0x43,0x9C,0xBF,0xB9,0xB6,0x76,0x13,0x3C,0x3F,0xF3,0xFF,0xC0,0x3C,0x08,0xDF,
+    0x37,0x02,0x6A,0x22,0x5D,0x96,0xFD,0x7A,0xA5,0xA0,0x78,0x8F,0x67,0x6B,0x9E,0xFE,
+    0xCA,0x49,0xAC,0xF8,0x6B,0xF7,0x7F,0x5E,0xFF,0xF3,0x28,0xC4,0x20,0x0C,0x68,0xA2,
+    0xDD,0x94,0x0B,0x56,0x4C,0x2A,0x1D,0x42,0xC5,0x06,0xBD,0xAF,0x62,0x87,0x0D,0x0F,
+    0x87,0x3C,0x2E,0x60,0xF9,0xC1,0x05,0x8E,0x41,0x7D,0x45,0x82,0x87,0x8D,0x86,0x8C,
+    0xF8,0x8C,0x78,0xEF,0xF7,0x6F,0xFC,0x2E,0x16,0x0C,0xC1,0x32,0x65,0x0A,0x88,0x80,
+    0xA0,0xB1,0xD0,0xA0,0xF0,0x90,0x50,0x0A,0x12,0x11,0x09,0x00,0x58,0x59,0xE1,0xA0,
+    0xFF,0xF3,0x28,0xC4,0x29,0x0B,0xF0,0x06,0xC8,0x00,0x00,0x46,0x00,0xA8,0x08,0x90,
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+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
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+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,
+    
+};
+
+void downloadFile()
+{
+	uint32_t status;
+	OSAFILE fp = OsaFopen("test1.mp3", "r");
+	if (fp)
+	{
+		OsaFclose(fp);
+		return;
+	}
+    // Create file 
+    OSAFILE fp1 = OsaFopen("test1.mp3", "wb+");//BatteryCharging.mp3
+
+    // Write mp3 data into file
+    status = OsaFwrite((uint8_t *)batteryCharging, sizeof(batteryCharging), 1, fp1);
+    if (status == 0)
+    {
+        while (1);
+    }
+
+    // After writing, close it
+    OsaFclose(fp1);
+
+
+    // Create file 
+    fp1 = OsaFopen("test2.mp3", "wb+");//BatteryCharging.mp3
+
+    // Write mp3 data into file
+    status = OsaFwrite((uint8_t *)rebooting, sizeof(rebooting), 1, fp1);
+    if (status == 0)
+    {
+        while (1);
+    }
+
+    // After writing, close it
+    OsaFclose(fp1);
+
+
+    // Create file
+    fp1 = OsaFopen("test3.mp3", "wb+");//BatteryCharging.mp3
+
+    // Write mp3 data into file
+    status = OsaFwrite((uint8_t *)serverConnecting, sizeof(serverConnecting), 1, fp1);
+    if (status == 0)
+    {
+        while (1);
+    }
+
+    // After writing, close it
+    OsaFclose(fp1);
+
+    // Create file
+    fp1 = OsaFopen("test4.mp3", "wb+");//BatteryCharging.mp3
+
+    // Write mp3 data into file
+    status = OsaFwrite((uint8_t *)serverConnectSucceed, sizeof(serverConnectSucceed), 1, fp1);
+    if (status == 0)
+    {
+        while (1);
+    }
+
+    // After writing, close it
+    OsaFclose(fp1);
+}
+
+
+
+
+
+
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_audio/xmake.lua

@@ -0,0 +1,23 @@
+local TARGET_NAME = "example_audio"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+includes(SDK_TOP .. "/thirdparty/audio_decoder")
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    add_deps("audio_decoder")
+    --加入代码和头文件
+    add_includedirs("/include",{public = true})
+    add_includedirs(SDK_TOP .. "/PLAT/core/tts/include/16k_lite_ver",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    LIB_USER = LIB_USER .. SDK_TOP .. "/PLAT/core/lib/libaisound50_16K_lite_beta.a "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_crypto/README.md

@@ -0,0 +1,8 @@
+目前demo中aes和des测试需要到仓库根目录下将下面宏控代码添加进xmake.lua
+
+add_defines("MBEDTLS_CIPHER_MODE_CBC",{public = true})
+add_defines("MBEDTLS_CIPHER_MODE_CFB",{public = true})
+add_defines("MBEDTLS_CIPHER_MODE_CTR",{public = true})
+add_defines("MBEDTLS_CIPHER_MODE_OFB",{public = true})
+add_defines("MBEDTLS_CIPHER_MODE_XTS",{public = true}) 
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_crypto/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_crypto/xmake.lua

@@ -0,0 +1,26 @@
+local TARGET_NAME = "example_crypto"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+    -- add_defines("MBEDTLS_TCPIP_LWIP",{public = true})
+    -- 按需链接mbedtls
+    -- add_defines("MBEDTLS_CONFIG_FILE=\"config_ec_ssl_comm.h\"")
+    -- add_files(SDK_TOP .. "PLAT/middleware/thirdparty/mbedtls/library/*.c")
+    -- 按需编译httpclient
+    -- add_files(SDK_TOP .. "PLAT/middleware/thirdparty/httpclient/*.c")
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_dev_sim/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_dev_sim/src/dev_sim_example_main.c

@@ -0,0 +1,264 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "ps_lib_api.h"
+#include "ps_sim_if.h"
+#include "cmisim.h"
+
+#define CCID_LEN 24
+#define IMEI_LEN 18
+#define IMSI_LEN 18
+static void usb_serial_input_dummy_cb(uint8_t channel, uint8_t *input, uint32_t len)
+{
+	DBG("dev_sim_example usb serial get %dbyte, test mode, send back", len);
+	usb_serial_output(channel, input, len);
+}
+
+static void hw_demoA_init(void)
+{
+	DBG("dev_sim_example this hw demo1");
+	set_usb_serial_input_callback(usb_serial_input_dummy_cb);
+}
+
+static void hw_demoB_init(void)
+{
+	DBG("dev_sim_example this hw demo2");
+}
+
+static void dr_demoC_init(void)
+{
+	DBG("dev_sim_example this dr demo1");
+}
+
+static void dr_demoD_init(void)
+{
+	DBG("dev_sim_example this dr demo2");
+}
+
+
+
+/**
+  \fn          CmsRetId appGetImeiNumSync(CHAR* imei)
+  \brief       Send cmi request to get IMEI
+  \param[out]  CHAR* imei point to the stored result
+  \returns     CmsRetId
+*/
+
+
+/**
+  \fn          BOOL appGetSNNumSync(CHAR* sn)
+  \brief       Send cmi request to get sn num
+  \param[out]  CHAR* sn point to the stored result
+  \returns     true---success false---fail
+*/
+
+/**
+  \fn          BOOL appSetSNNumSync(CHAR* sn, UINT8 len)
+  \brief       Send cmi request to set sn num
+  \param[in]   CHAR* sn point to sn num
+  \param[in]   len SN num length with max length 32 bytes
+  \returns     true---success false---fail
+*/
+static void task1(void *param)
+{
+	while (1)
+	{
+		//测试获取IMEI号
+		CHAR imei[IMEI_LEN + 1] = {0};
+		if (sizeof(imei) < 18)
+		{
+			DBG("dev_sim_example get imei fail!!! not enough buf size");
+		}
+		else
+		{
+			CmsRetId ret = appGetImeiNumSync(imei);
+			if (CMS_RET_SUCC == ret)
+			{
+				DBG("dev_sim_example get imei success %s", imei);
+			}
+			else
+			{
+				DBG("dev_sim_example get imei fail");
+			}
+		}
+		// 测试获取SN号
+		CHAR sn[34] = {0};
+		if (sizeof(sn) < 32)
+		{
+			DBG("dev_sim_example get sn fail!!! not enough buf size");
+		}
+		else
+		{
+			BOOL ret = appGetSNNumSync(sn);
+			if (ret)
+			{
+				DBG("dev_sim_example get sn success %s", sn);
+			}
+			else
+			{
+				DBG("dev_sim_example get sn fail");
+			}
+		}
+
+		//测试写SN号的功能，有需要可打开
+		/* char *snstr = "12345678910111213";
+		BOOL ret = appSetSNNumSync(snstr, strlen(snstr));
+		if (ret)
+		{
+			BOOL ret = appGetSNNumSync(sn);
+			if (ret)
+			{
+				char * retstr = strstr(snstr, sn);
+				if (retstr != NULL)
+				{
+					DBG("dev_sim_example set sn success %s", retstr);
+				}
+				else
+				{
+					DBG("dev_sim_example set sn fail1");
+				}
+
+			}
+			else
+			{
+				DBG("dev_sim_example set sn fail2");
+			}
+		}
+		else
+		{
+			DBG("dev_sim_example set sn fail");
+		} */
+		osDelay(5000);
+	}
+	vTaskDelete(NULL);
+}
+
+
+
+
+/**
+  \fn          CmiRcCode simGetPinStateSync(UINT8 *pPinState)
+  \brief       get SIM PIN state
+  \param[out]  pPinState    CmiSimPinState
+  \returns     CmiRcCode    MtErrorResultCode
+*/
+
+/**
+  \fn          CmsRetId appGetIccidNumSync(CHAR* pIccid)
+  \brief       get USIM iccid number
+  \param[out]  *iccid  Pointer to stored USIM ICCID(max len 20 bytes) result
+  \returns     CmsRetId
+*/
+
+/**
+  \fn          CmsRetId appGetImsiNumSync(CHAR* pImsi)
+  \brief       get IMSI number
+  \param[out]  *imsi  Pointer to stored IMSI(max length 16 bytes) result
+  \returns     CmsRetId
+*/
+static void task2(void *param)
+{
+	DBG("dev_sim_example this task demo2");
+	while (1)
+	{
+		CHAR tmp[CCID_LEN + 1] = {0};
+		CHAR iccid[CCID_LEN + 1] = {0};
+		CHAR imsi[IMSI_LEN + 1] = {0};
+		UINT8 pinState;
+		CmiRcCode result = simGetPinStateSync(&pinState);
+		DBG("dev_sim_example sim get status result %d, %d", result, pinState);
+		if (CME_SUCC == result)
+		{
+			switch (pinState)
+			{
+			case CMI_SIM_PIN_STATE_READY:
+				DBG("dev_sim_example sim ready");
+				appGetIccidNumSync(iccid);
+				appGetImsiNumSync(imsi);
+				if (strcmp(tmp, iccid) != 0)
+				{
+					DBG("dev_sim_example get iccid %s", iccid);
+				}
+				if (strcmp(tmp, imsi) != 0)
+				{
+					DBG("dev_sim_example get imsi %s", imsi);
+				}
+				break;
+			case CMI_SIM_PIN_STATE_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_PIN2_REQUIRED:
+			case CMI_SIM_PIN_STATE_PH_NET_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_PH_NETSUB_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_PH_SP_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_PH_CORP_PIN_REQUIRED:
+				DBG("dev_sim_example sim pin");
+				break;
+
+			case CMI_SIM_PIN_STATE_UNBLOCK_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_UNBLOCK_PIN2_REQUIRED:
+			case CMI_SIM_PIN_STATE_UNBLOCK_PH_NET_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_UNBLOCK_PH_NETSUB_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_UNBLOCK_PH_SP_PIN_REQUIRED:
+			case CMI_SIM_PIN_STATE_UNBLOCK_PH_CORP_PIN_REQUIRED:
+				DBG("dev_sim_example sim puk");
+				break;
+			default:
+				DBG("dev_sim_example other status %d", pinState);
+				break;
+			}
+		}
+		else if(CME_SIM_NOT_INSERT == result)
+		{
+			DBG("dev_sim_example sim not insert");
+		}
+		else
+		{
+			DBG("dev_sim_example other result %d", result);
+		}
+		osDelay(1000);
+	}
+	vTaskDelete(NULL);
+}
+
+static void task_demoE_init(void)
+{
+	xTaskCreate(task1, "", 256, NULL, 20, NULL);
+}
+
+static void task_demoF_init(void)
+{
+	xTaskCreate(task2, "", 256, NULL, 20, NULL);
+}
+
+//启动hw_demoA_init，启动位置硬件初始1级
+INIT_HW_EXPORT(hw_demoA_init, "1");
+//启动hw_demoB_init，启动位置硬件初始2级
+INIT_HW_EXPORT(hw_demoB_init, "2");
+//启动dr_demoC_init，启动位置驱动1级
+INIT_DRV_EXPORT(dr_demoC_init, "1");
+// 启动dr_demoD_init，启动位置驱动2级
+INIT_DRV_EXPORT(dr_demoD_init, "2");
+//启动task_demoE_init，启动位置任务1级
+INIT_TASK_EXPORT(task_demoE_init, "1");
+//启动task_demoF_init，启动位置任务2级
+INIT_TASK_EXPORT(task_demoF_init, "2");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_dev_sim/xmake.lua

@@ -0,0 +1,27 @@
+local TARGET_NAME = "example_dev_sim"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    -- 按需链接mbedtls
+    -- add_defines("MBEDTLS_CONFIG_FILE=\"config_ec_ssl_comm.h\"")
+    -- add_files(SDK_TOP .. "PLAT/middleware/thirdparty/mbedtls/library/*.c")
+    -- 按需编译httpclient
+    -- add_files(SDK_TOP .. "PLAT/middleware/thirdparty/httpclient/*.c")
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fdb/README.md

@@ -0,0 +1,3 @@
+# 说明
+
+* fdb kv数据库,掉电不丢,刷机不丢,全清Flash才丢

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fdb/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fdb/src/example_main.c

@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+#include "am_kv.h"
+
+static void fdb_demo(void *param)
+{
+	int ret = 0;
+	char value[256];
+
+	vTaskDelay(3000);
+
+	DBG("am_kv demo");
+	
+
+	// 设置一个key-value
+	// key 最大长度是 255, 建议不超过64
+	// value 最大长度是 4096 - 1
+
+	// 设置方式1, \0结尾的数据,直接来
+	ret = am_kv_set("my123", "123", strlen("123"));
+	DBG("kv_set my123 ret %d", ret);
+	memset(value, 0x21, 32);
+	ret = am_kv_set("my456", value, 32);
+	DBG("kv_set my456 ret %d", ret);
+
+	// am_kv_get("my123", value, 255);
+	// am_kv_get("my456", value, 255);
+	
+	// 同理, 获取value也有两种, fdb_kv_get 和 fdb_kv_get_blob
+	ret = am_kv_get("my123", value, 255); // 注意留一个字节放0x00
+	DBG("kv_get ret %d", ret);
+	if (ret > 0) {
+		value[ret] = 0x00;
+		DBG("fdb read value %s", value);
+		// 写进入的值应该等于写出的值
+		if (memcmp("123", value, strlen("123"))) {
+			DBG("fdb value NOT match");
+		}
+	}
+	else {
+		// 前面的逻辑写入字符串"123", 获取时肯定大于0,除非底层出错了
+		DBG("fdb read failed");
+	}
+
+	vTaskDelay(1000);
+	// 清空整个fdb数据, 慎用
+	// 这里只是演示有这个API, 并非使用后要调用该API
+	//am_kv_clear();
+	
+	// 演示结束, task退出.
+	vTaskDelete(NULL);
+}
+
+static void task_demo_fdb_init(void)
+{
+	xTaskCreate(fdb_demo, "fdb", 4*1024, NULL, 20, NULL);
+	// xTaskCreate(fdb_demo2, "fdb", 8*1024, NULL, 20, NULL);
+}
+
+static void dr_fdb_init(void)
+{
+	int ret = 0;
+	ret = am_kv_init();
+	DBG("am_kv_init ret %d", ret);
+}
+
+//启动hw_demoA_init，启动位置硬件初始1级
+// INIT_HW_EXPORT(hw_demoA_init, "1");
+//启动hw_demoB_init，启动位置硬件初始2级
+// INIT_HW_EXPORT(hw_demoB_init, "2");
+// 启动dr_demoC_init，启动位置驱动1级
+// INIT_DRV_EXPORT(dr_demo_fdb_init, "1");
+//启动dr_demoD_init，启动位置驱动2级
+INIT_DRV_EXPORT(dr_fdb_init, "2");
+//启动task_demoE_init，启动位置任务1级
+// INIT_TASK_EXPORT(task_demoE_init, "1");
+//启动task_demoF_init，启动位置任务2级
+INIT_TASK_EXPORT(task_demo_fdb_init, "2");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fdb/xmake.lua

@@ -0,0 +1,25 @@
+local TARGET_NAME = "example_fdb"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    
+    add_includedirs("../../thirdparty/fal/inc",{public = true})
+    add_includedirs("../../thirdparty/flashdb/inc",{public = true})
+    add_includedirs("../../thirdparty/am_kv/inc",{public = true})
+    add_files("../../thirdparty/fal/src/*.c",{public = true})
+    add_files("../../thirdparty/flashdb/src/*.c",{public = true})
+    add_files("../../thirdparty/am_kv/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_filesystem/README.md

@@ -0,0 +1,66 @@
+# 文件系统API说明
+
+## 概述
+
+* 文件系统的主体是littlefs, 总空间288k, 可用100k左右.
+* 有多套API, 各有特色, 但不应该混用
+
+## Osa文件API
+
+位于 `osasys.h`, 只有少量函数, 与posix API 类似. 不涉及目录操作
+
+```c
+OSAFILE OsaFopen(const char *fileName, const char* mode);
+INT32 OsaFtell(OSAFILE fp);
+INT32 OsaFclose(OSAFILE fp);
+UINT32 OsaFread(void *buf, UINT32 size, UINT32 count, OSAFILE fp);
+UINT32 OsaFwrite(void *buf, UINT32 size, UINT32 count, OSAFILE fp);
+INT32 OsaFseek(OSAFILE fp, INT32 offset, UINT8 seekType);
+UINT32 OsaFremove(const char *fileName);
+```
+
+通用调用逻辑:
+```c
+#define BUFF_SIZE (512)
+char buff[BUFF_SIZE];
+UINT32 rlen = 0;
+OSAFILE fp = OsaFopen("fs_test", "r");
+if (fp) { // 若成功, 必不为NULL
+    // 读写数据
+    while ((rlen = OsaFread(buff, BUFF_SIZE, 1, fp)) > 0) {
+        // 处理读取到的数据
+    }
+    OsaFclose(fp);
+}
+```
+
+## LiffteFs 文件API
+
+在原始的lifftefs上, 封装成 `lfs_port.h`
+
+注意: 
+
+* 不要调用 `LFS_init` `LFS_deinit` , 底层会自行处理
+* API 均以 `LFS_` 开头, 为同步阻塞且线程安全的函数. 与原生lifftefs的API基本上一一对应
+
+通用调用逻辑:
+```c
+#define BUFF_SIZE (512)
+char buff[BUFF_SIZE];
+UINT32 rlen = 0;
+int ret = 0;
+lfs_file_t *file = malloc(sizeof(lfs_file_t));
+if (file == NULL) {
+    // 内存分配出错
+    return -1;
+}
+ret = LFS_fileOpen(file, "fs_test", LFS_O_RDONLY);
+if (ret == LFS_ERR_OK) { // 若成功, 必不为NULL
+    // 读写数据
+    while ((rlen = LFS_fileRead(file, buff, BUFF_SIZE)) > 0) {
+        // 处理读取到的数据
+    }
+    LFS_fileClose(file);
+}
+free(file); // 注意释放内存
+```

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_filesystem/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_filesystem/src/example_fs_lfs.c

@@ -0,0 +1,185 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+LFS_xxx 系列函数, 分文件函数和文件夹, 还有几个文件系统相关的函数.
+**注意**: 不要调用 LFS_init LFS_deinit LFS_format 函数!!!
+*/
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+#include "lfs_port.h"
+#include "rng.h"
+
+// 演示文件操作, LFS_XXX 文件函数
+void exmaple_fs_lfs_file(void) {
+    lfs_file_t fp = {0}; // 注意, 如果需要跨函数使用, lfs_file_t需要malloc
+    uint8_t *buff = NULL;
+    const char* filepath = "lfs_test.txt";
+    struct lfs_info info = {0};
+    char tmp[100];
+    int ret = 0;
+
+    DBG("check file exists? %s", filepath);
+    // 通过获取大小, 判断文件是否存在, 存在就删除之
+    if (LFS_stat(filepath, &info) == LFS_ERR_OK) {
+        if (info.size > 0) {
+            DBG("remove %s", filepath);
+            LFS_remove(filepath);
+        }
+    }
+
+    //----------------------------------------------
+    //            文件写入演示
+    //----------------------------------------------
+    // 开始写入文件
+    DBG("test lfs file write");
+    ret = LFS_fileOpen(&fp, filepath, LFS_O_CREAT | LFS_O_RDWR | LFS_O_TRUNC);
+    if (ret != LFS_ERR_OK) {
+        DBG("file open failed %d", ret);
+        return;
+    }
+    // 产生随机数据, 模拟业务写入
+    DBG("call malloc and rngGenRandom");
+    buff = malloc(24 * 100);
+    if (buff == NULL) {
+        DBG("out of memory ?");
+        LFS_fileClose(&fp);
+        goto exit;
+    }
+    for (size_t i = 0; i < 100; i++)
+    {
+        rngGenRandom(buff + i*24);
+    }
+
+    // 按块写入数据
+    DBG("call LFS_fileWrite");
+    for (size_t i = 0; i < 24; i++)
+    {
+        ret = LFS_fileWrite(&fp, (const void*)(buff + i * 100), 100);
+        if (ret != 100) {
+            DBG("fail to write ret %d", ret);
+            LFS_fileClose(&fp);
+            goto exit;
+        }
+    }
+    // 为保证正确性, 关闭前可先执行sync操作
+    LFS_fileSync(&fp);
+    // 关闭文件
+    LFS_fileClose(&fp);
+
+    //----------------------------------------------
+    //            文件读取演示
+    //----------------------------------------------
+    // 读取文件
+    ret = LFS_fileOpen(&fp, filepath, LFS_O_RDONLY);
+    if (ret != LFS_ERR_OK) {
+        DBG("file open failed %d", ret);
+        goto exit;
+    }
+    for (size_t i = 0; i < 24; i++)
+    {
+        ret = LFS_fileRead(&fp, tmp, 100);
+        if (ret != 100) {
+            DBG("fail to write ret %d", ret);
+            LFS_fileClose(&fp);
+            goto exit;
+        }
+        if (memcmp(tmp, buff + i * 100, 100) != 0) {
+            DBG("file data NOT match");
+        }
+    }
+    // 直接定位 offset=100的位置, 重新读取
+    LFS_fileSeek(&fp, 100, LFS_SEEK_SET);
+    ret = LFS_fileRead(&fp, tmp, 100);
+    if (memcmp(tmp, buff + 100, 100) != 0) {
+        DBG("file data NOT match at offset 100");
+    }
+    ret = LFS_fileTell(&fp);
+    if (ret != 200) {
+        // 按前面的逻辑, 先设置到100, 然后读取100, 当前偏移量应该是200
+        DBG("file seek NOT match at offset 200");
+    }
+    
+    // 关闭句柄
+    LFS_fileClose(&fp);
+
+    //----------------------------------------------
+    //            文件截断演示
+    //----------------------------------------------
+    // LFS_fileTruncate需要以读写方式打开文件,否则会崩
+    ret = LFS_fileOpen(&fp, filepath, LFS_O_RDWR);
+
+    // 缩减文件到300字节
+    LFS_fileTruncate(&fp, 300);
+    ret = LFS_fileSize(&fp);
+    if (ret != 300) {
+        // 裁剪后文件大小应该是300
+        DBG("file size NOT 300, but %d", ret);
+    }
+    LFS_fileClose(&fp);
+
+
+    //----------------------------------------------
+    //            文件改名演示
+    //----------------------------------------------
+    // 文件还在, 测试改名
+    LFS_remove("newpath");
+    LFS_rename(filepath, "newpath");
+    // 读取文件, 老路径应该得到文件大小不大于0
+    info.size  = 0;
+    LFS_stat(filepath, &info);
+    if (info.size > 0) {
+        DBG("file shall not exist");
+    }
+    // 读取文件, 新路径应该得到文件大小等于300
+    info.size  = 0;
+    LFS_stat("newpath", &info);
+    if (info.size != 300) {
+        DBG("file shall 300 byte but %d", info.size);
+    }
+
+    LFS_remove(filepath);
+    LFS_remove("newpath");
+
+    //------------------------------------------------------
+    // 演示完毕, 清理资源
+    exit:
+        if (buff != NULL) {
+            free(buff);
+        }
+        DBG("file example exited");
+        return;
+}
+
+
+// 演示文件操作, LFS_XXX 文件夹函数
+void exmaple_fs_lfs_dir(void) {
+    // TODO
+}
+
+void exmaple_fs_lfs_main(void) {
+    exmaple_fs_lfs_file();
+    vTaskDelay(1000);
+    exmaple_fs_lfs_dir();
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_filesystem/src/example_fs_osa.c

@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+本demo使用OsaXXX系列API进行演示.
+
+提示: 底层文件系统是基于lifftefs, 具有掉电不丢数据的特性.
+
+在写入新数据时, 若文件路径已经存在, 在打开该文件进行写操作时,原有数据并不会马上被清除.
+
+该特性, 在极端情况下, 会出现2倍的flash空间消耗. 所以, 下面是覆写文件时的建议
+
+1. 若该文件重要, 那按常规写法进行, 且重要文件应保持小体积.
+2. 若该文件不重要, 那应该先执行 OsaRemove, 然后在OsaFopen
+
+*/
+
+// 标准include
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+// 引入osa文件API
+#include "osasys.h"
+
+// 引入随机数API
+#include "rng.h"
+
+
+#define FILE_NAME "test.txt"
+#define BUFF_SIZE (24)
+
+// 这个buff的用途是存放file write的随机数据, 与 file read的数据进行对比
+// buff size选24是因为rngGenRandom固定24字节
+static uint8_t tmpbuff[BUFF_SIZE];
+
+static void exmaple_file_write(void) {
+    //----------------------------------------------
+    //            文件写入演示
+    //----------------------------------------------
+	// 可选, 先移除现有文件, 详情看本文件头部的提示
+	// OsaRemove(FILE_NAME);
+
+	// OsaFopen的用法用fopen一致, 支持 rb/wb/wb+/a/a+等操作
+	OSAFILE fp = OsaFopen(FILE_NAME, "wb+");
+	if (fp == NULL) {
+		DBG("open file for write, failed");
+		return;
+	}
+	// 随机数生成器, 注意其输入是24字节的数组.
+	rngGenRandom(tmpbuff);
+
+	// 写入数据, 与 fwrite 一个样, 返回值写入的块数量(1), 而非字节数
+	uint32_t ret = OsaFwrite(tmpbuff, BUFF_SIZE, 1, fp);
+	if (ret != 1) {
+		DBG("fail to write, excpt 1 but %d", BUFF_SIZE, ret);
+	}
+	// 操作完成后,务必关闭文件句柄
+	OsaFclose(fp);
+
+	return;
+}
+
+static void exmaple_file_read(void) {
+    //----------------------------------------------
+    //            文件读取演示
+    //----------------------------------------------
+	// OsaFopen的用法用fopen一致, 支持 rb/wb/wb+/a/a+等操作
+	OSAFILE fp = OsaFopen(FILE_NAME, "rb");
+	if (fp == NULL) {
+		DBG("open file for read, failed");
+		return;
+	}
+	
+	char buff[BUFF_SIZE];
+	// 读取数据, 与 fread 一个样, 返回值是块数量(1), 而非字节数
+	uint32_t ret = OsaFread(buff, BUFF_SIZE, 1, fp);
+	if (ret != 1) {
+		DBG("fail to read, excpt %d but %d", BUFF_SIZE, ret);
+	}
+	// 与 fwrite的数据进行对比, 理应一致
+	if (memcmp(buff, tmpbuff, BUFF_SIZE)) {
+		DBG("file content NOT match!!");
+	}
+	// 最后务必关闭文件句柄
+	OsaFclose(fp);
+
+	return;
+}
+
+void exmaple_fs_osa_main(void) {
+	vTaskDelay(1000);
+	exmaple_file_write();
+	vTaskDelay(1000);
+	exmaple_file_read();
+}

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_filesystem/src/filesystem_main.c

@@ -0,0 +1,81 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+// 本文件为入口函数
+// 具体演示在 example_fs_osa.c 和 example_fs_lfs.c
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+extern void exmaple_fs_osa_main(void);
+extern void exmaple_fs_lfs_main(void);
+
+static void usb_serial_input_dummy_cb(uint8_t channel, uint8_t *input, uint32_t len)
+{
+	DBG("usb serial get %dbyte, test mode, send back", len);
+	usb_serial_output(channel, input, len);
+}
+
+static void hw_demoA_init(void)
+{
+	DBG("this hw demo1");
+	set_usb_serial_input_callback(usb_serial_input_dummy_cb);
+}
+
+
+static void fs_example(void *param)
+{
+	vTaskDelay(1500);
+	exmaple_fs_osa_main();
+	vTaskDelay(500);
+	exmaple_fs_lfs_main();
+	while(1)
+	{
+		vTaskDelay(1000);
+		DBG("fs demo is done");
+	}
+	vTaskDelete(NULL);
+}
+
+static void task_demoE_init(void)
+{
+	xTaskCreate(fs_example, "", 8*1024, NULL, 20, NULL);
+}
+
+// static void task_demoF_init(void)
+// {
+// 	xTaskCreate(task2, "", 256, NULL, 20, NULL);
+// }
+
+//启动hw_demoA_init，启动位置硬件初始1级
+INIT_HW_EXPORT(hw_demoA_init, "1");
+//启动hw_demoB_init，启动位置硬件初始2级
+// INIT_HW_EXPORT(hw_demoB_init, "2");
+//启动dr_demoC_init，启动位置驱动1级
+// INIT_DRV_EXPORT(dr_demoC_init, "1");
+//启动dr_demoD_init，启动位置驱动2级
+// INIT_DRV_EXPORT(dr_demoD_init, "2");
+//启动task_demoE_init，启动位置任务1级
+INIT_TASK_EXPORT(task_demoE_init, "1");
+//启动task_demoF_init，启动位置任务2级
+// INIT_TASK_EXPORT(task_demoF_init, "2");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_filesystem/xmake.lua

@@ -0,0 +1,20 @@
+local TARGET_NAME = "example_filesystem"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fota/README.md

@@ -0,0 +1,9 @@
+Fota CSDK样例使用说明
+1、差分包生成
+差分包使用移芯提供的FotaToolkit进行生成，具体使用说明见FotaToolkit使用指南。
+2、本样例通过url请求升级包的方式测试fota升级，升级成功标志除升级接口正确返回外，还可通过升级前后不同的打印内容来辅助判断升级成功。
+旧版本down start打印前面的打印为AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA,新版本down start打印前面的打印为BBBBBBBBBBBBBBBBBBBBBB
+BBBBBBBBBBBB。用户可以直接运行build.bat fota，将编译生成的固件下载进入模块。同时打开EPAT监测输出日志，发现用户第一次下载升级包
+校验ok,模块升级成功后重启打印日志中down start前AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA已经替换为BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB
+BBB。第二次再次请求升级包由于不匹配会提示升级包校验错误，不予升级。
+3、用户也可以自行生成差分包放入测试服务器，只需要修改fota_test_task函数中url为自己的差分包地址即可。

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fota/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fota/inc/example_main.h

@@ -0,0 +1,75 @@
+
+typedef enum
+{
+	AM_FOTA_SETFLAG = 2,
+	AM_FOTA_INPROGRESS = 1,
+	AM_FOTA_SUCCEED = 0,
+	AM_FOTA_FAIL = -1
+}amFotaSta;
+typedef enum
+{
+    AM_FOTA_SUCCESS=0,             //下载成功
+    AM_FOTA_COMPLETED=100,         //下载完成
+    AM_FOTA_DOMAIN_NOT_EXIST=1001, //下载地址不存在
+    AM_FOTA_DOMAIN_TIMEOUT,        //下载地址访问超时
+    AM_FOTA_DOMAIN_UNKNOWN,        //下载地址格式错误
+    AM_FOTA_SERVER_CONN_FAIL,      //服务器连接失败
+    AM_FOTA_AUTH_FAILED,           //授权失败
+    AM_FOTA_FILE_NOT_EXIST,        //文件不存在
+    AM_FOTA_FILE_SIZE_INVALID,     //文件大小不可用
+    AM_FOTA_FILE_GET_ERR,          //文件获取错误
+    AM_FOTA_FILE_CHECK_ERR,        //升级包校验错误
+    AM_FOTA_INTERNAL_ERR,          //内部错误
+    AM_FOTA_NOT_INPROGRESS,        //下载中断
+    AM_FOTA_NO_MEMORY,             //内存不足
+    AM_FOTA_FILE_SIZE_TOO_LARGE,   //文件太大
+    AM_FOTA_PARAM_SIZE_INVALID,    //无效参数
+} AM_FOTARes;
+typedef void (* amFotaProgressCB_t)(amFotaSta sta, int progress, char* buff, int len);
+typedef enum
+{
+	AM_FOTA_DWNLD_MOD_FTP,
+	AM_FOTA_DWNLD_MOD_HTTP
+}amFotaDwnldMod;
+typedef void* amFotaImgProcCtxPtr;
+
+#define OPENAT_OTA_HEAD 0x7e
+#define OPENAT_OTA_APP_HEAD 0X7c
+#define OPENAT_OTA_CORE_HEAD 0x7d
+#define OPENAT_OTA_HEAD_LEN (5)
+#define OPENAT_OTA_FILE_MAX (20)
+
+typedef enum
+{
+	OPENAT_OTA_FILE_NULL,
+	OPENAT_OTA_FILE_RFBIN,
+	OPENAT_OTA_FILE_APP,
+	OPENAT_OTA_FILE_CORE,
+	
+} E_OPENAT_OTA_FILE_TYPE;
+
+typedef struct
+{
+	unsigned char head[OPENAT_OTA_HEAD_LEN];
+	unsigned int readLen;
+	unsigned int fileNum;
+} T_OPENAT_OTA_HEAD_CTX;
+
+typedef struct
+{
+	E_OPENAT_OTA_FILE_TYPE type;
+	unsigned char head[OPENAT_OTA_HEAD_LEN];
+	unsigned int readLen;
+	unsigned int size;
+} T_OPENAT_OTA_FILE_CTX;
+
+typedef struct
+{
+
+	T_OPENAT_OTA_HEAD_CTX head;
+	T_OPENAT_OTA_FILE_CTX file[OPENAT_OTA_FILE_MAX];
+	unsigned int readLen;
+	unsigned int fileCur;
+}openat_otaCtx;
+
+static openat_otaCtx g_s_otaCtx = {0};

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_fota/xmake.lua

@@ -0,0 +1,23 @@
+local TARGET_NAME = "example_fota"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    includes(SDK_TOP .. "/thirdparty/httpclient")
+    add_deps("httpclient")
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_gpio/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_gpio/inc/example_main.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __EXAMPLE_MAIN_H__
+#define __EXAMPLE_MAIN_H__
+
+
+#define GET_GPIO_PORT(gpioId) (gpioId/16)
+#define GET_GPIO_PIN(gpioId) (gpioId%16)
+
+#define LED_GPIO_ADDR 40
+#define LED_GPIO_PORT 1
+#define LED_GPIO_PIN 4
+
+typedef struct
+{
+    uint8_t gpioId;
+    uint8_t pinAddr;
+    PadMux_e mux;
+    PadPullUp_e pullUpEnable;
+    PadPullDown_e pullDownEnable;
+} GpioPinMap_t;
+
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_gpio/src/example_main.c

@@ -0,0 +1,246 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "slpman.h"
+#include "pad.h"
+#include "gpio.h"
+#include "example_main.h"
+
+
+//1：IDLE模式下，GPIO输出、输入、中断测试
+//2：自动SLEEP1模式下，以AGPIOWU0（GPIO20）为例，演示如何在SLEEP1以及唤醒状态下，以最低功耗的方式，控制指示灯的闪烁
+static uint8_t sTestMode = 1;
+
+static bool sLedGpioHigh = false;
+
+static GpioPinMap_t allGpioMap[] =
+{
+	{0, 15, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{1, 16, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{2, 17, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{3, 18, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{4, 19, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{5, 20, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{6, 21, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{7, 22, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{8, 23, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{9, 24, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{10, 25, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{11, 26, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{12, 11, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{13, 12, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	// {14, 13, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //一直为高电平3.3V，此脚被uart0 tx输出日志占用，因为二次开发休眠状态下必须预留一路uart用来输出日志，所以此处不再调试GPIO功能
+	// {15, 14, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //一直为高电平3.3V，此脚被uart0 rx输出日志占用，因为二次开发休眠状态下必须预留一路uart用来输出日志，所以此处不再调试GPIO功能
+	{16, 31, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{17, 32, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{18, 33, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{19, 34, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{20, 40, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //外接指示灯，输出高时异常只有2.0V，输出低时正常为0V；断开指示灯和电阻，输出高时3.3V正常，输出低时0V正常；
+	{21, 41, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{22, 42, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //外接按键，输出高时正常3.3V，输出低时异常为2.0V；断开按键和电阻，输出高时3.3V正常，输出低时0V正常；
+	// {23, 43, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //Air600E没有引出
+	{24, 44, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{25, 45, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, 
+	{26, 46, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, 
+	{27, 47, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, 
+	{28, 48, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, 
+	{29, 35, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{30, 36, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+	{31, 37, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
+};
+
+void before_sleep(void *pdata, slpManLpState state)
+{
+	DBG("entry");
+	slpManAONIOLatchEn(true);
+}
+
+
+void after_sleep(void *pdata, slpManLpState state)
+{
+	DBG("entry");	
+
+	PadConfig_t padConfig;
+    PAD_getDefaultConfig(&padConfig);
+
+    padConfig.mux = PAD_MUX_ALT0;
+    PAD_setPinConfig(LED_GPIO_ADDR, &padConfig); 
+
+    // LED pin config
+    GpioPinConfig_t config;
+    config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    config.misc.initOutput = sLedGpioHigh ? 1 : 0;
+
+    GPIO_pinConfig(LED_GPIO_PORT, LED_GPIO_PIN, &config); 
+}
+
+
+static void task_gpio_test(void *param)
+{
+	uint8_t i = 0;
+
+	DBG("enter");	
+
+    while(1)
+    {
+		//IDLE模式下，GPIO输出、输入、中断测试
+		if (1 == sTestMode)		
+		{			
+			slpManSetPmuSleepMode(true, SLP_IDLE_STATE, false);			
+
+			while(1)
+			{
+				
+				for (i=0; i<sizeof(allGpioMap)/sizeof(allGpioMap[0]); i++)
+				{
+					GPIO_pinWrite(GET_GPIO_PORT(allGpioMap[i].gpioId), 1 << GET_GPIO_PIN(allGpioMap[i].gpioId), 1 << GET_GPIO_PIN(allGpioMap[i].gpioId));
+				}
+				DBG("high");
+				vTaskDelay(1000);
+
+				for (i=0; i<sizeof(allGpioMap)/sizeof(allGpioMap[0]); i++)
+				{
+					GPIO_pinWrite(GET_GPIO_PORT(allGpioMap[i].gpioId), 1 << GET_GPIO_PIN(allGpioMap[i].gpioId), 0);
+				}
+				DBG("low");
+				vTaskDelay(1000);
+			}
+		}
+		else if (2 == sTestMode)		
+		{		
+			uint8_t slpmanLedHandler = 0xff;	
+			slpManRet_t ret;
+			GpioPinConfig_t gpio_config;
+
+			slpManRegisterUsrdefinedBackupCb(before_sleep, NULL);
+			slpManRegisterUsrdefinedRestoreCb(after_sleep, NULL);
+
+			slpManSetPmuSleepMode(true, SLP_SLP1_STATE, false);	
+			slpManAONIOLatchEn(true);
+
+			slpManApplyPlatVoteHandle("ledSLP1Vote",&slpmanLedHandler); 
+			
+			uint32_t startTick;
+			//AGPIOWU0(GPIO20)控制指示灯，亮1秒，灭1秒
+			while(1)
+			{
+				ret = slpManPlatVoteDisableSleep(slpmanLedHandler, SLP_SLP1_STATE);
+            	EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
+				
+				gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+				gpio_config.misc.initOutput = 1;
+				GPIO_pinConfig(LED_GPIO_PORT, LED_GPIO_PIN, &gpio_config);
+				sLedGpioHigh = true;
+
+				ret = slpManPlatVoteEnableSleep(slpmanLedHandler, SLP_SLP1_STATE);
+                EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
+
+				startTick = xTaskGetTickCount();
+				vTaskDelay(1000);
+				DBG("retain high tick %d",xTaskGetTickCount()-startTick);
+
+
+
+				ret = slpManPlatVoteDisableSleep(slpmanLedHandler, SLP_SLP1_STATE);
+            	EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
+
+				gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+				gpio_config.misc.initOutput = 0;
+				GPIO_pinConfig(LED_GPIO_PORT, LED_GPIO_PIN, &gpio_config);
+				sLedGpioHigh = false;
+
+				ret = slpManPlatVoteEnableSleep(slpmanLedHandler, SLP_SLP1_STATE);
+                EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
+
+				startTick = xTaskGetTickCount();
+				vTaskDelay(1000);
+				DBG("retain low tick %d",xTaskGetTickCount()-startTick);
+			}
+		}
+    }
+}
+
+
+static void task_gpio_test_init(void)
+{
+	xTaskCreate(task_gpio_test, "task_gpio_test", 256, NULL, 20, NULL);
+}
+
+static void all_gpio_init_output(bool wakeup)
+{
+	if (!wakeup)
+	{
+		*(uint32_t *)0x4D020170 = 0x1;
+		slpManAONIOPowerOn();    
+		slpManAONIOVoltSet(IOVOLT_3_30V);
+		slpManNormalIOVoltSet(IOVOLT_3_30V);
+	}	
+
+	PadConfig_t pad_config;
+	GpioPinConfig_t gpio_config;
+	PAD_getDefaultConfig(&pad_config);
+
+	uint8_t i = 0;
+	for (i=0; i<sizeof(allGpioMap)/sizeof(allGpioMap[0]); i++)
+	{
+		pad_config.mux = allGpioMap[i].mux;
+		pad_config.pullUpEnable = allGpioMap[i].pullUpEnable;
+		pad_config.pullDownEnable = allGpioMap[i].pullDownEnable;
+		PAD_setPinConfig(allGpioMap[i].pinAddr, &pad_config);
+		gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+		gpio_config.misc.initOutput = 0;
+		GPIO_pinConfig(GET_GPIO_PORT(allGpioMap[i].gpioId), GET_GPIO_PIN(allGpioMap[i].gpioId), &gpio_config);
+	}
+}
+
+
+void wakeup_pad_init(void)
+{
+    APmuWakeupPadSettings_t wakeupPadSetting;
+    wakeupPadSetting.negEdgeEn = false;
+    wakeupPadSetting.posEdgeEn = false;
+    wakeupPadSetting.pullDownEn = false;
+    wakeupPadSetting.pullUpEn = false;
+
+    apmuSetWakeupPadCfg(WAKEUP_PAD_3, false, &wakeupPadSetting);
+    apmuSetWakeupPadCfg(WAKEUP_PAD_4, false, &wakeupPadSetting);
+    apmuSetWakeupPadCfg(WAKEUP_PAD_5, false, &wakeupPadSetting);
+
+	NVIC_DisableIRQ(PadWakeup3_IRQn);
+	NVIC_DisableIRQ(PadWakeup4_IRQn);
+	NVIC_DisableIRQ(PadWakeup5_IRQn);
+}
+
+static void gpio_init(void)
+{
+	wakeup_pad_init();
+	all_gpio_init_output(false);
+}
+
+//启动gpio_init，启动位置硬件初始1级
+INIT_HW_EXPORT(gpio_init, "1");
+//启动task_gpio_test，启动位置任务2级
+INIT_TASK_EXPORT(task_gpio_test_init, "2");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_gpio/xmake.lua

@@ -0,0 +1,21 @@
+local TARGET_NAME = "example_gpio"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_https/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_https/src/example_main.c

@@ -0,0 +1,274 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "sockets.h"
+#include "networkmgr.h"
+#include "netdb.h"
+#include "slpman.h"
+#include "time.h"
+#include "HTTPClient.h"
+#include "plat_config.h"
+#include "semphr.h"
+typedef struct
+{
+	ip_addr_t remote_ip;
+	ip_addr_t local_ip;
+	void *wait_link_sem;
+	void *wait_dns_sem;
+	void *heart_timer;
+	void *pa_delay_timer;
+	int socket_id;
+	uint8_t is_link_up;
+	uint8_t ipv4_cid;
+	uint8_t ipv6_cid;
+}demo_ctrl_t;
+
+//ciphersuite: TLS-RSA-WITH-AES-128-CBC-SHA  msglen = 2609
+//support session ticket/fragment
+#define TEST_SERVER_NAME        "https://www.howsmyssl.com:443/a/check"
+
+#define TEST_HOST "https://www.howsmyssl.com:443"
+#define HTTP_RECV_BUF_SIZE      (1501)
+#define HTTP_HEAD_BUF_SIZE      (800)
+
+static demo_ctrl_t g_s_demo;
+static HttpClientContext        gHttpClient = {0};
+
+static const char *testCaCrt = \
+{
+    \
+    "-----BEGIN CERTIFICATE-----\r\n"
+    "MIIDSjCCAjKgAwIBAgIQRK+wgNajJ7qJMDmGLvhAazANBgkqhkiG9w0BAQUFADA/\r\n" \
+    "MSQwIgYDVQQKExtEaWdpdGFsIFNpZ25hdHVyZSBUcnVzdCBDby4xFzAVBgNVBAMT\r\n" \
+    "DkRTVCBSb290IENBIFgzMB4XDTAwMDkzMDIxMTIxOVoXDTIxMDkzMDE0MDExNVow\r\n" \
+    "PzEkMCIGA1UEChMbRGlnaXRhbCBTaWduYXR1cmUgVHJ1c3QgQ28uMRcwFQYDVQQD\r\n" \
+    "Ew5EU1QgUm9vdCBDQSBYMzCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEB\r\n" \
+    "AN+v6ZdQCINXtMxiZfaQguzH0yxrMMpb7NnDfcdAwRgUi+DoM3ZJKuM/IUmTrE4O\r\n" \
+    "rz5Iy2Xu/NMhD2XSKtkyj4zl93ewEnu1lcCJo6m67XMuegwGMoOifooUMM0RoOEq\r\n" \
+    "OLl5CjH9UL2AZd+3UWODyOKIYepLYYHsUmu5ouJLGiifSKOeDNoJjj4XLh7dIN9b\r\n" \
+    "xiqKqy69cK3FCxolkHRyxXtqqzTWMIn/5WgTe1QLyNau7Fqckh49ZLOMxt+/yUFw\r\n" \
+    "7BZy1SbsOFU5Q9D8/RhcQPGX69Wam40dutolucbY38EVAjqr2m7xPi71XAicPNaD\r\n" \
+    "aeQQmxkqtilX4+U9m5/wAl0CAwEAAaNCMEAwDwYDVR0TAQH/BAUwAwEB/zAOBgNV\r\n" \
+    "HQ8BAf8EBAMCAQYwHQYDVR0OBBYEFMSnsaR7LHH62+FLkHX/xBVghYkQMA0GCSqG\r\n" \
+    "SIb3DQEBBQUAA4IBAQCjGiybFwBcqR7uKGY3Or+Dxz9LwwmglSBd49lZRNI+DT69\r\n" \
+    "ikugdB/OEIKcdBodfpga3csTS7MgROSR6cz8faXbauX+5v3gTt23ADq1cEmv8uXr\r\n" \
+    "AvHRAosZy5Q6XkjEGB5YGV8eAlrwDPGxrancWYaLbumR9YbK+rlmM6pZW87ipxZz\r\n" \
+    "R8srzJmwN0jP41ZL9c8PDHIyh8bwRLtTcm1D9SZImlJnt1ir/md2cXjbDaJWFBM5\r\n" \
+    "JDGFoqgCWjBH4d1QB7wCCZAA62RjYJsWvIjJEubSfZGL+T0yjWW06XyxV3bqxbYo\r\n" \
+    "Ob8VZRzI9neWagqNdwvYkQsEjgfbKbYK7p2CNTUQ\r\n" \
+    "-----END CERTIFICATE-----"
+};
+
+static INT32 ps_callback(PsEventID eventID, void *param, UINT32 paramLen)
+{
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    NmAtiNetInfoInd *net_info = NULL;
+
+    switch(eventID)
+    {
+        case PS_URC_ID_SIM_READY:
+        {
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:
+        {
+        	DBG("Default bearer activated");
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:
+        {
+        	DBG("Default bearer Deactivated");
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:
+        {
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:
+        {
+            net_info = (NmAtiNetInfoInd *)param;
+			DBG("%d,%d,%d,%d", net_info->indCause, net_info->netifInfo.netStatus, net_info->netifInfo.ipv4Cid, net_info->netifInfo.ipv6Cid);
+			switch(net_info->indCause)
+			{
+			case NM_STATUS_CHANGE_LINK_UP:
+			case NM_STATUS_CHANGE_LINK_UP_IPV4:
+			case NM_STATUS_CHANGE_LINK_UP_IPV6:
+			case NM_STATUS_CHANGE_RA_SUCCESS:
+				DBG("network ready");
+				if (!g_s_demo.is_link_up)
+				{
+					g_s_demo.is_link_up = 1;
+					xSemaphoreGive(g_s_demo.wait_link_sem);
+				}
+				break;
+			default:
+				g_s_demo.is_link_up = 0;
+				DBG("network not ready");
+				break;
+			}
+
+			if (NM_NETIF_ACTIVATED == net_info->netifInfo.netStatus)
+			{
+				g_s_demo.ipv4_cid = net_info->netifInfo.ipv4Cid;
+				g_s_demo.ipv6_cid = net_info->netifInfo.ipv6Cid;
+				g_s_demo.local_ip.type = IPADDR_TYPE_V4;
+				g_s_demo.local_ip.u_addr.ip4 = net_info->netifInfo.ipv4Info.ipv4Addr;
+			}
+            break;
+        }
+        default:
+            break;
+
+    }
+    return 0;
+}
+
+/**
+  \fn      INT32 httpGetData(CHAR *getUrl, CHAR *buf, UINT32 len)
+  \brief
+  \return
+*/
+static INT32 httpGetData(CHAR *getUrl, CHAR *buf, UINT32 len)
+{
+    HTTPResult result = HTTP_INTERNAL;
+    HttpClientData    clientData = {0};
+    UINT32 count = 0;
+    uint16_t headerLen = 0;
+
+    EC_ASSERT(buf != NULL,0,0,0);
+
+    clientData.headerBuf = malloc(HTTP_HEAD_BUF_SIZE);
+    clientData.headerBufLen = HTTP_HEAD_BUF_SIZE;
+    clientData.respBuf = buf;
+    clientData.respBufLen = len;
+
+    result = httpSendRequest(&gHttpClient, getUrl, HTTP_GET, &clientData);
+    DBG("send request result=%d", result);
+    if (result != HTTP_OK)
+        goto exit;
+    do {
+    	DBG("recvResponse loop.");
+        memset(clientData.headerBuf, 0, clientData.headerBufLen);
+        memset(clientData.respBuf, 0, clientData.respBufLen);
+        result = httpRecvResponse(&gHttpClient, &clientData);
+        if(result == HTTP_OK || result == HTTP_MOREDATA){
+            headerLen = strlen(clientData.headerBuf);
+            if(headerLen > 0)
+            {
+            	DBG("total content length=%d", clientData.recvContentLength);
+            }
+
+            if(clientData.blockContentLen > 0)
+            {
+            	DBG("response content:{%s}", (uint8_t*)clientData.respBuf);
+            }
+            count += clientData.blockContentLen;
+            DBG("has recv=%d", count);
+        }
+    } while (result == HTTP_MOREDATA || result == HTTP_CONN);
+
+    DBG("result=%d", result);
+    if (gHttpClient.httpResponseCode < 200 || gHttpClient.httpResponseCode > 404)
+    {
+    	DBG("invalid http response code=%d",gHttpClient.httpResponseCode);
+    } else if (count == 0 || count != clientData.recvContentLength) {
+    	DBG("data not receive complete");
+    } else {
+    	DBG("receive success");
+    }
+exit:
+    free(clientData.headerBuf);
+    return result;
+}
+
+static void task_test_https(void *param)
+{
+	BSP_SetPlatConfigItemValue(PLAT_CONFIG_ITEM_FAULT_ACTION, 0);//死机不重启而是打印信息
+	char *recvBuf = malloc(HTTP_RECV_BUF_SIZE);
+	HTTPResult result = HTTP_INTERNAL;
+	uint8_t test_sleep_handler;
+	slpManSetPmuSleepMode(true, SLP_HIB_STATE, false);
+	slpManApplyPlatVoteHandle("test", &test_sleep_handler);
+	slpManPlatVoteDisableSleep(test_sleep_handler, SLP_SLP2_STATE);
+
+    g_s_demo.wait_link_sem = xSemaphoreCreateBinary();
+
+    registerPSEventCallback(PS_GROUP_ALL_MASK, ps_callback);
+    gHttpClient.caCert= (char*)testCaCrt;
+    gHttpClient.caCertLen= strlen(testCaCrt)+1;
+    gHttpClient.timeout_s = 2;
+    gHttpClient.timeout_r = 20;
+    gHttpClient.seclevel = 1;
+    gHttpClient.ciphersuite[0] = 0xFFFF;
+    gHttpClient.ignore = 1;
+    xSemaphoreTake(g_s_demo.wait_link_sem, portMAX_DELAY);
+    result = httpConnect(&gHttpClient, TEST_HOST);
+    if (result == HTTP_OK)
+    {
+        httpGetData(TEST_SERVER_NAME, recvBuf, HTTP_RECV_BUF_SIZE);
+        httpClose(&gHttpClient);
+    }
+    else
+    {
+        DBG("http client connect error");
+    }
+
+    while(1)
+    {
+        vTaskDelay(300000);
+        if (!g_s_demo.is_link_up)
+        {
+        	xSemaphoreTake(g_s_demo.wait_link_sem, portMAX_DELAY);
+        }
+        result = httpConnect(&gHttpClient, TEST_HOST);
+        if (result == HTTP_OK)
+        {
+            httpGetData(TEST_SERVER_NAME, recvBuf, HTTP_RECV_BUF_SIZE);
+            httpClose(&gHttpClient);
+        }
+        else
+        {
+            DBG("http client connect error");
+        }
+    }
+
+	vTaskDelete(NULL);
+}
+
+static void task_demo_https(void)
+{
+	xTaskCreate(task_test_https, "ntp", 2048, NULL, 20, NULL);
+}
+//启动task_demoF_init，启动位置任务2级
+INIT_TASK_EXPORT(task_demo_https, "1");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_https/xmake.lua

@@ -0,0 +1,23 @@
+local TARGET_NAME = "example_https"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    --使用第三方的httpclient
+    includes(SDK_TOP .. "/thirdparty/httpclient")
+    add_deps("httpclient")
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_linksdk/README.md

@@ -0,0 +1,23 @@
+### example_sysdep_api_test.c
+
+linksdk自带的适配接口测试代码，用于测试接口适配是否有问题
+
+
+
+### example_mqtt_basic.c
+
+linksdk自带的连接阿里云服务器mqtt基础功能测试demo
+
+
+
+
+
+### 在xmake.lua中通过如下两行代码来切换编译demo
+
+```lua
+add_files("/src/example_sysdep_api_test.c",{public = true})
+-- add_files("/src/example_mqtt_basic.c",{public = true})
+```
+
+
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_linksdk/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_linksdk/src/example_mqtt_basic.c

@@ -0,0 +1,379 @@
+/*
+ * 这个例程适用于`Linux`这类支持task的POSIX设备, 它演示了用SDK配置MQTT参数并建立连接, 之后创建2个线程
+ *
+ * + 一个线程用于保活长连接
+ * + 一个线程用于接收消息, 并在有消息到达时进入默认的数据回调, 在连接状态变化时进入事件回调
+ *
+ * 需要用户关注或修改的部分, 已经用 TODO 在注释中标明
+ *
+ */
+#include <stdio.h>
+#include <string.h>
+#include "bsp_common.h"
+#include "aiot_state_api.h"
+#include "aiot_sysdep_api.h"
+#include "aiot_mqtt_api.h"
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "cmsis_os2.h"
+#include "ps_event_callback.h"
+#include "cmips.h"
+#include "networkmgr.h"
+#include "cmimm.h"
+/* TODO: 替换为自己设备的三元组 */
+char *product_key       = "${YourProductKey}";
+char *device_name       = "${YourDeviceName}";
+char *device_secret     = "${YourDeviceSecret}";
+
+/*
+    TODO: 替换为自己实例的接入点
+
+    对于企业实例, 或者2021年07月30日之后（含当日）开通的物联网平台服务下公共实例
+    mqtt_host的格式为"${YourInstanceId}.mqtt.iothub.aliyuncs.com"
+    其中${YourInstanceId}: 请替换为您企业/公共实例的Id
+
+    对于2021年07月30日之前（不含当日）开通的物联网平台服务下公共实例
+    需要将mqtt_host修改为: mqtt_host = "${YourProductKey}.iot-as-mqtt.${YourRegionId}.aliyuncs.com"
+    其中, ${YourProductKey}：请替换为设备所属产品的ProductKey。可登录物联网平台控制台，在对应实例的设备详情页获取。
+    ${YourRegionId}：请替换为您的物联网平台设备所在地域代码, 比如cn-shanghai等
+    该情况下完整mqtt_host举例: a1TTmBPIChA.iot-as-mqtt.cn-shanghai.aliyuncs.com
+
+    详情请见: https://help.aliyun.com/document_detail/147356.html
+*/
+char  *mqtt_host = "${YourInstanceId}.mqtt.iothub.aliyuncs.com";
+
+/* 位于portfiles/aiot_port文件夹下的系统适配函数集合 */
+extern aiot_sysdep_portfile_t g_aiot_sysdep_portfile;
+
+/* 位于external/ali_ca_cert.c中的服务器证书 */
+extern const char *ali_ca_cert;
+
+static TaskHandle_t g_mqtt_process_thread = NULL;
+static TaskHandle_t g_mqtt_recv_thread = NULL;
+static uint8_t g_mqtt_process_thread_running = 0;
+static uint8_t g_mqtt_recv_thread_running = 0;
+static osEventFlagsId_t waitNetSuccessFlag = NULL;
+#define NETSTATUS_NORMAL (0x1)
+
+
+static INT32 mqttPSUrcCallback(PsEventID eventID, void *param, UINT32 paramLen){
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    UINT8 rssi = 0;
+    NmAtiNetInfoInd *netif = NULL;
+
+    switch(eventID){
+        case PS_URC_ID_SIM_READY:{
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            break;
+        }
+        case PS_URC_ID_MM_SIGQ:{
+            CmiMmCesqInd *pMmCesqInd = (CmiMmCesqInd *)param;
+            rssi = mmGetCsqRssiFromCesq(pMmCesqInd->rsrp, pMmCesqInd->rsrq, pMmCesqInd->rssiCompensation);
+            DBG("RSSI signal=%d", rssi);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:{
+            DBG("Default bearer activated");
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:{
+            DBG("Default bearer Deactivated");
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:{
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:{
+            netif = (NmAtiNetInfoInd *)param;
+            if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED){
+                DBG("netif acivated");
+                osEventFlagsSet(waitNetSuccessFlag, NETSTATUS_NORMAL);
+            }else if (netif->netifInfo.netStatus == NM_NETIF_OOS){
+                DBG("PSIF network OOS");
+            }else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED ||
+                     netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL){
+                DBG("PSIF network deactive");
+            }
+            break;
+        }
+        default:
+            break;
+    }
+    return 0;
+}
+
+
+/* TODO: 如果要关闭日志, 就把这个函数实现为空, 如果要减少日志, 可根据code选择不打印
+ *
+ * 例如: [1577589489.033][LK-0317] mqtt_basic_demo&gb80sFmX7yX
+ *
+ * 上面这条日志的code就是0317(十六进制), code值的定义见core/aiot_state_api.h
+ *
+ */
+
+/* 日志回调函数, SDK的日志会从这里输出 */
+int32_t demo_state_logcb(int32_t code, char *message)
+{
+    DBG("linksdk message: %s", message);
+    return 0;
+}
+
+/* MQTT事件回调函数, 当网络连接/重连/断开时被触发, 事件定义见core/aiot_mqtt_api.h */
+void demo_mqtt_event_handler(void *handle, const aiot_mqtt_event_t *event, void *userdata)
+{
+    switch (event->type) {
+        /* SDK因为用户调用了aiot_mqtt_connect()接口, 与mqtt服务器建立连接已成功 */
+        case AIOT_MQTTEVT_CONNECT: {
+            DBG("AIOT_MQTTEVT_CONNECT\n");
+            /* TODO: 处理SDK建连成功, 不可以在这里调用耗时较长的阻塞函数 */
+        }
+        break;
+
+        /* SDK因为网络状况被动断连后, 自动发起重连已成功 */
+        case AIOT_MQTTEVT_RECONNECT: {
+            DBG("AIOT_MQTTEVT_RECONNECT\n");
+            /* TODO: 处理SDK重连成功, 不可以在这里调用耗时较长的阻塞函数 */
+        }
+        break;
+
+        /* SDK因为网络的状况而被动断开了连接, network是底层读写失败, heartbeat是没有按预期得到服务端心跳应答 */
+        case AIOT_MQTTEVT_DISCONNECT: {
+            char *cause = (event->data.disconnect == AIOT_MQTTDISCONNEVT_NETWORK_DISCONNECT) ? ("network disconnect") :
+                          ("heartbeat disconnect");
+            DBG("AIOT_MQTTEVT_DISCONNECT: %s\n", cause);
+            /* TODO: 处理SDK被动断连, 不可以在这里调用耗时较长的阻塞函数 */
+        }
+        break;
+
+        default: {
+
+        }
+    }
+}
+
+/* MQTT默认消息处理回调, 当SDK从服务器收到MQTT消息时, 且无对应用户回调处理时被调用 */
+void demo_mqtt_default_recv_handler(void *handle, const aiot_mqtt_recv_t *packet, void *userdata)
+{
+    switch (packet->type) {
+        case AIOT_MQTTRECV_HEARTBEAT_RESPONSE: {
+            DBG("heartbeat response\n");
+            /* TODO: 处理服务器对心跳的回应, 一般不处理 */
+        }
+        break;
+
+        case AIOT_MQTTRECV_SUB_ACK: {
+            DBG("suback, res: -0x%04X, packet id: %d, max qos: %d\n",
+                   -packet->data.sub_ack.res, packet->data.sub_ack.packet_id, packet->data.sub_ack.max_qos);
+            /* TODO: 处理服务器对订阅请求的回应, 一般不处理 */
+        }
+        break;
+
+        case AIOT_MQTTRECV_PUB: {
+            DBG("pub, qos: %d, topic: %.*s\n", packet->data.pub.qos, packet->data.pub.topic_len, packet->data.pub.topic);
+            DBG("pub, payload: %.*s\n", packet->data.pub.payload_len, packet->data.pub.payload);
+            /* TODO: 处理服务器下发的业务报文 */
+        }
+        break;
+
+        case AIOT_MQTTRECV_PUB_ACK: {
+            DBG("puback, packet id: %d\n", packet->data.pub_ack.packet_id);
+            /* TODO: 处理服务器对QoS1上报消息的回应, 一般不处理 */
+        }
+        break;
+
+        default: {
+
+        }
+    }
+}
+
+/* 执行aiot_mqtt_process的线程, 包含心跳发送和QoS1消息重发 */
+void *demo_mqtt_process_thread(void *args)
+{
+    int32_t res = STATE_SUCCESS;
+
+    while (g_mqtt_process_thread_running) {
+        res = aiot_mqtt_process(args);
+        if (res == STATE_USER_INPUT_EXEC_DISABLED) {
+            break;
+        }
+        osDelay(1);
+    }
+    vTaskDelete(NULL);
+    return NULL;
+}
+
+/* 执行aiot_mqtt_recv的线程, 包含网络自动重连和从服务器收取MQTT消息 */
+void *demo_mqtt_recv_thread(void *args)
+{
+    int32_t res = STATE_SUCCESS;
+
+    while (g_mqtt_recv_thread_running) {
+        res = aiot_mqtt_recv(args);
+        if (res < STATE_SUCCESS) {
+            if (res == STATE_USER_INPUT_EXEC_DISABLED) {
+                break;
+            }
+            osDelay(1);
+        }
+    }
+    vTaskDelete(NULL);
+    return NULL;
+}
+
+int linksdk_mqtt_task(void *param)
+{
+    registerPSEventCallback(PS_GROUP_ALL_MASK, mqttPSUrcCallback);
+    waitNetSuccessFlag = osEventFlagsNew(NULL);
+    if(waitNetSuccessFlag == NULL)
+    {
+        DBG("create eventFlag failed");
+        vTaskDelete(NULL);
+        return -1;
+    }
+    osEventFlagsWait(waitNetSuccessFlag, NETSTATUS_NORMAL, osFlagsWaitAll, osWaitForever);
+    int32_t     res = STATE_SUCCESS;
+    void       *mqtt_handle = NULL;
+    uint16_t    port = 443;      /* 无论设备是否使用TLS连接阿里云平台, 目的端口都是443 */
+    aiot_sysdep_network_cred_t cred; /* 安全凭据结构体, 如果要用TLS, 这个结构体中配置CA证书等参数 */
+
+    /* 配置SDK的底层依赖 */
+    aiot_sysdep_set_portfile(&g_aiot_sysdep_portfile);
+    /* 配置SDK的日志输出 */
+    aiot_state_set_logcb(demo_state_logcb);
+
+    /* 创建SDK的安全凭据, 用于建立TLS连接 */
+    memset(&cred, 0, sizeof(aiot_sysdep_network_cred_t));
+    cred.option = AIOT_SYSDEP_NETWORK_CRED_SVRCERT_CA;  /* 使用RSA证书校验MQTT服务端 */
+    cred.max_tls_fragment = 16384; /* 最大的分片长度为16K, 其它可选值还有4K, 2K, 1K, 0.5K */
+    cred.sni_enabled = 1;                               /* TLS建连时, 支持Server Name Indicator */
+    cred.x509_server_cert = ali_ca_cert;                 /* 用来验证MQTT服务端的RSA根证书 */
+    cred.x509_server_cert_len = strlen(ali_ca_cert);     /* 用来验证MQTT服务端的RSA根证书长度 */
+
+    /* 创建1个MQTT客户端实例并内部初始化默认参数 */
+    mqtt_handle = aiot_mqtt_init();
+    if (mqtt_handle == NULL) {
+        DBG("aiot_mqtt_init failed\n");
+        vTaskDelete(NULL);
+        return -1;
+    }
+
+    /* TODO: 如果以下代码不被注释, 则例程会用TCP而不是TLS连接云平台 */
+    
+    /* {
+        memset(&cred, 0, sizeof(aiot_sysdep_network_cred_t));
+        cred.option = AIOT_SYSDEP_NETWORK_CRED_NONE;
+    } */
+   
+
+    /* 配置MQTT服务器地址 */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_HOST, (void *)mqtt_host);
+    /* 配置MQTT服务器端口 */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_PORT, (void *)&port);
+    /* 配置设备productKey */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_PRODUCT_KEY, (void *)product_key);
+    /* 配置设备deviceName */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_DEVICE_NAME, (void *)device_name);
+    /* 配置设备deviceSecret */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_DEVICE_SECRET, (void *)device_secret);
+    /* 配置网络连接的安全凭据, 上面已经创建好了 */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_NETWORK_CRED, (void *)&cred);
+    /* 配置MQTT默认消息接收回调函数 */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_RECV_HANDLER, (void *)demo_mqtt_default_recv_handler);
+    /* 配置MQTT事件回调函数 */
+    aiot_mqtt_setopt(mqtt_handle, AIOT_MQTTOPT_EVENT_HANDLER, (void *)demo_mqtt_event_handler);
+
+    /* 与服务器建立MQTT连接 */
+    res = aiot_mqtt_connect(mqtt_handle);
+    if (res < STATE_SUCCESS) {
+        /* 尝试建立连接失败, 销毁MQTT实例, 回收资源 */
+        aiot_mqtt_deinit(&mqtt_handle);
+        DBG("aiot_mqtt_connect failed: -0x%04X\n\r\n", -res);
+        DBG("please check variables like mqtt_host, produt_key, device_name, device_secret in demo\r\n");
+        vTaskDelete(NULL);
+        return -1;
+    }
+
+    /* MQTT 订阅topic功能示例, 请根据自己的业务需求进行使用 */
+    /* {
+        char *sub_topic = "/sys/${YourProductKey}/${YourDeviceName}/thing/event/+/post_reply";
+        res = aiot_mqtt_sub(mqtt_handle, sub_topic, NULL, 1, NULL);
+        if (res < 0) {
+            DBG("aiot_mqtt_sub failed, res: -0x%04X\n", -res);
+            vTaskDelete(NULL);
+            return -1;
+        }
+    } */
+
+    /* MQTT 发布消息功能示例, 请根据自己的业务需求进行使用 */
+    /* {
+        char *pub_topic = "/sys/${YourProductKey}/${YourDeviceName}/thing/event/property/post";
+        char *pub_payload = "{\"id\":\"1\",\"version\":\"1.0\",\"params\":{\"LightSwitch\":0}}";
+        res = aiot_mqtt_pub(mqtt_handle, pub_topic, (uint8_t *)pub_payload, (uint32_t)strlen(pub_payload), 0);
+        if (res < 0) {
+            DBG("aiot_mqtt_sub failed, res: -0x%04X\n", -res);
+            vTaskDelete(NULL);
+            return -1;
+        }
+    } */
+
+    /* 创建一个单独的线程, 专用于执行aiot_mqtt_process, 它会自动发送心跳保活, 以及重发QoS1的未应答报文 */
+    g_mqtt_process_thread_running = 1;
+    xTaskCreate(demo_mqtt_process_thread, "", 4096, mqtt_handle, 20, &g_mqtt_process_thread);
+    if (g_mqtt_process_thread == NULL) {
+        DBG("task_create demo_mqtt_process_thread failed: %d\n", res);
+        vTaskDelete(NULL);
+        return -1;
+    }
+
+    /* 创建一个单独的线程用于执行aiot_mqtt_recv, 它会循环收取服务器下发的MQTT消息, 并在断线时自动重连 */
+    g_mqtt_recv_thread_running = 1;
+     xTaskCreate(demo_mqtt_recv_thread, "", 4096, mqtt_handle, 20, &g_mqtt_recv_thread);
+    if (g_mqtt_recv_thread == NULL) {
+        DBG("task_create demo_mqtt_recv_thread failed: %d\n", res);
+        vTaskDelete(NULL);
+        return -1;
+    }
+
+    /* 主循环进入休眠 */
+    while (1) {
+        osDelay(1);
+    }
+
+    /* 断开MQTT连接, 一般不会运行到这里 */
+    g_mqtt_process_thread_running = 0;
+    g_mqtt_recv_thread_running = 0;
+    osDelay(1);
+
+    res = aiot_mqtt_disconnect(mqtt_handle);
+    if (res < STATE_SUCCESS) {
+        aiot_mqtt_deinit(&mqtt_handle);
+        DBG("aiot_mqtt_disconnect failed: -0x%04X\n", -res);
+        vTaskDelete(NULL);
+        return -1;
+    }
+
+    /* 销毁MQTT实例, 一般不会运行到这里 */
+    res = aiot_mqtt_deinit(&mqtt_handle);
+    if (res < STATE_SUCCESS) {
+        DBG("aiot_mqtt_deinit failed: -0x%04X\n", -res);
+        vTaskDelete(NULL);
+        return -1;
+    }
+    vTaskDelete(NULL);
+    return 0;
+}
+
+
+
+static void task_demo_init(void)
+{
+	xTaskCreate(linksdk_mqtt_task, "", 4096, NULL, 20, NULL);
+}
+
+INIT_TASK_EXPORT(task_demo_init, "1");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_linksdk/src/example_sysdep_api_test.c

@@ -0,0 +1,852 @@
+/***************
+	demo_sysdep_api_test
+****************/
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "plat_config.h"
+/*
+ * 这个例程用于用户在移植后验证是否移植成功的。
+ * 通过一系列的测试case，验证移植的相关接口是否正常工作；
+ *  + 正常结束后会输出TEST SUCCESS，其它会输出TEST ERROR + ERRORCODE
+ *  + 如遇长时间卡住也为测试失败
+ *
+ * 该测试工具会使用多线程/多任务的能力，在RTOS下使用需要自行适配任务创建。
+ * 需要用户关注或修改的部分, 已经用 TODO 在注释中标明
+ *
+ */
+
+#include "aiot_sysdep_api.h"
+#include "aiot_state_api.h"
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+
+/* 定义入口函数类型 */
+typedef void *(*TASK_FUNC)(void* argv);
+/* 定义适配任务创建函数*/
+void task_start(TASK_FUNC entry,void* argv);
+/*>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> TODO START >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
+/*
+ * TODO: task_start功能实现，创建任务，并执行任务，待任务结束后自行退出
+ * @param[in] entry  任务函数入口
+ * @param[in] argv   任务函数参数
+ */
+#include<pthread.h>
+void task_start(TASK_FUNC entry,void* argv)
+{
+    pthread_t id;
+    //pthread_create(&id, NULL, (void*(*)(void *))entry, argv);
+    
+}
+/*TODO: 堆最大空间，单位字节 */
+#define HEAP_MAX    ( 20 * 1024 )
+/*<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< TODO END <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
+
+/**
+ * 系统接口测试结果
+ */
+typedef enum {
+    TEST_SUCCESS,
+    TEST_ERR_RANDOM,
+    TEST_ERR_MALLOC,
+    TEST_ERR_HEAP,
+    TEST_ERR_SLEEP,
+    TEST_ERR_MUTEX,
+    TEST_ERR_NETWORK,
+    TEST_ERR_GENERIC,
+} sysdep_test_result_t;
+
+static const char *result_string[] = {
+    "TEST_SUCCESS", 
+    "TEST_ERR_RANDOM",
+    "TEST_ERR_MALLOC",
+    "TEST_ERR_HEAP", 
+    "TEST_ERR_SLEEP",
+    "TEST_ERR_MUTEX",
+    "TEST_ERR_NETWORK",
+    "TEST_ERR_GENERIC",
+};
+
+typedef struct {
+    aiot_sysdep_portfile_t *sysdep;
+    void* user_data;
+    char* name;
+} task_handler_input_t;
+
+/**
+ * sysdep测试入口原型定义
+ */
+typedef sysdep_test_result_t (*sysdep_test_func)(aiot_sysdep_portfile_t* sysdep);
+
+typedef struct
+{
+    uint32_t total_size;//堆总大小
+} heap_cfg_t;
+
+typedef struct
+{
+    uint16_t count;
+    /* 最大重复次数 */
+    uint16_t repeat_cnt_max;
+} random_cfg_t;
+
+typedef struct
+{
+    uint64_t sleep_ms;
+    uint8_t  sleep_end;
+} time_cfg_t;
+
+typedef struct
+{
+    void* mutex;
+    int32_t  value;
+    uint32_t timeout_ms;
+} mutex_cfg_t;
+
+typedef struct
+{
+    char*       host;
+    uint16_t    port;
+    uint32_t    connect_timeout_ms;
+    uint32_t    recv_timeout_ms;
+    int32_t     recv_buf_len;
+    uint32_t    send_timeout_ms;
+    uint32_t    cycle_test_times;
+} network_cfg_t;
+
+/**
+ * 随机生成随机数列表，重复出现次数不高于指定值
+ */
+static sysdep_test_result_t random_repeat_test(aiot_sysdep_portfile_t* sysdep, random_cfg_t* rd)
+{
+    typedef  uint8_t random_value_t;
+    random_value_t *random_values = NULL;
+    int count = 0;
+    random_value_t temp = 0;
+    sysdep_test_result_t ret = TEST_SUCCESS;
+    /* 差值 */
+    int diff = 0;
+    /* 递变标志 */
+    int flag = 0;
+
+    random_values = sysdep->core_sysdep_malloc(sizeof(random_value_t) * rd->count, NULL);
+    if(random_values == NULL){
+        DBG("[linksdk]\r\nmalloc fail");
+        ret = TEST_ERR_MALLOC;
+        goto end;
+    }
+    memset(random_values, 0, sizeof(random_value_t) * rd->count);
+
+    /* 生成随机数，并统计重复次数 计算差值*/
+    for(count = 0; count < rd->count; count++) {
+        sysdep->core_sysdep_rand((uint8_t*)&temp, sizeof(random_value_t));
+        temp %= rd->count;
+        
+        /* 检测是否为规律递变 */
+        if(count == 1 ){
+            diff = random_values[count] - random_values[count - 1];
+        }else if (count >= 2){
+            if(diff == random_values[count] - random_values[count - 1]){
+                flag++;
+            }
+        }
+        
+        if(random_values[temp] <= rd->repeat_cnt_max) {
+            random_values[temp]++;
+        }
+        else {
+            DBG("[linksdk]randowm value [%d] times [%d] over max counter [%d]", temp, random_values[temp], rd->repeat_cnt_max);
+            ret = TEST_ERR_RANDOM;
+            goto end;
+        }
+    }
+    /* 规律递变则返回错误 */
+    if(rd->count >= 3 && flag >= rd->count - 2){
+        DBG("[linksdk]random value error");
+        ret = TEST_ERR_RANDOM;
+        goto end;
+    }
+    ret = TEST_SUCCESS;
+end:
+    if(random_values != NULL){
+        sysdep->core_sysdep_free(random_values);
+    }
+    return ret;
+}
+
+/**
+ * 随机数测试入口
+ */
+sysdep_test_result_t random_test(aiot_sysdep_portfile_t* sysdep)
+{
+    random_cfg_t rd;
+    /* 随机数接口要求生成的随机数按字节随机 */
+    rd.count = 256;
+    /* 随机数重复次数不能超过该值 */
+    rd.repeat_cnt_max = 10;
+    return random_repeat_test(sysdep, &rd);
+}
+
+static sysdep_test_result_t heap_malloc_max_test(aiot_sysdep_portfile_t* sysdep, heap_cfg_t* hp)
+{
+    /**
+     * 最大空间申请、释放
+     */
+    uint32_t user_malloc_max = hp->total_size - 100;
+    void * ptr = sysdep->core_sysdep_malloc(user_malloc_max, "");
+    if(ptr == NULL) {
+        DBG("[linksdk]malloc error");
+        return TEST_ERR_MALLOC;
+    }
+    /* 空间读写测试 */
+    uint8_t read_value;
+    for(int i = 0; i < user_malloc_max; i++) {
+        ((uint8_t*)ptr)[i] = (uint8_t)i;
+        read_value = ((uint8_t*)ptr)[i];
+        if(read_value != (uint8_t)i) {
+            sysdep->core_sysdep_free(ptr);
+            DBG("[linksdk]heap read and write fail");
+            return TEST_ERR_MALLOC;
+        }
+    }
+    sysdep->core_sysdep_free(ptr);
+    return TEST_SUCCESS;
+}
+
+/**
+ *  堆回收测试
+ */
+static sysdep_test_result_t heap_recycle_test(aiot_sysdep_portfile_t* sysdep, heap_cfg_t* hp)
+{
+    /* 待申请的堆空间大小 */
+    const uint32_t size_list[]= {1,2,4,8,16,32,64,128,256,512,1024,10*1024};
+    /* 存储堆指针 */
+    void* malloc_list[sizeof(size_list) / sizeof(uint32_t)] = {NULL};
+    int malloc_list_size = sizeof(size_list) / sizeof(uint32_t);
+    /* 申请空间 */
+    int malloc_cnt = 0;
+    int i = 0;
+    for(i = 0; i < malloc_list_size; i++) {
+        malloc_list[i] = sysdep->core_sysdep_malloc(size_list[i], "");
+        if(malloc_list[i] == NULL) {
+            break;
+        }
+    }
+    malloc_cnt = i;
+    /**
+     * 非相邻空间释放
+     */
+    for(i = 0; i < malloc_cnt; i+=2) {
+        sysdep->core_sysdep_free(malloc_list[i]);
+    }
+    for(i = 1; i < malloc_cnt; i+=2) {
+        sysdep->core_sysdep_free(malloc_list[i]);
+    }
+    /**
+     * 最后申请最大空间
+     */
+    return heap_malloc_max_test(sysdep, hp);
+}
+
+/**
+ * 堆测试入口
+ */
+
+sysdep_test_result_t heap_test(aiot_sysdep_portfile_t* sysdep)
+{
+    sysdep_test_result_t ret = TEST_SUCCESS;
+    heap_cfg_t hp;
+    hp.total_size = HEAP_MAX;
+    ret = heap_malloc_max_test(sysdep,&hp);
+    if(ret != TEST_SUCCESS) {
+        return ret;
+    }
+    return heap_recycle_test(sysdep, &hp);
+}
+
+static sysdep_test_result_t network_tcp_test(aiot_sysdep_portfile_t* sysdep, network_cfg_t* cfg)
+{
+    void* network_hd = sysdep->core_sysdep_network_init();
+    core_sysdep_socket_type_t type = CORE_SYSDEP_SOCKET_TCP_CLIENT;
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_SOCKET_TYPE, &type);
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_HOST, cfg->host);
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_PORT, (void*)&cfg->port);
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_CONNECT_TIMEOUT_MS, &cfg->connect_timeout_ms);
+
+    /**
+     * 建连测试
+    */
+    if(0 != sysdep->core_sysdep_network_establish(network_hd)) {
+        DBG("[linksdk]network establish test error:%d", TEST_ERR_NETWORK);
+        return TEST_ERR_NETWORK;
+    }
+
+    /**
+     * 接收等待超时测试
+    */
+    char* buf = sysdep->core_sysdep_malloc(cfg->recv_buf_len + 1, "");
+    if(buf == NULL){
+        DBG("[linksdk]malloc fail");
+        return TEST_ERR_MALLOC;
+    }
+    uint64_t start = sysdep->core_sysdep_time();
+    sysdep->core_sysdep_network_recv(network_hd, (uint8_t*)buf, cfg->recv_buf_len, cfg->recv_timeout_ms, NULL);
+    uint64_t stop = sysdep->core_sysdep_time();
+    if(stop - start < cfg->recv_timeout_ms) {
+        DBG("[linksdk]network receive test error:%d, start [%ld], end [%ld]", TEST_ERR_NETWORK, start, stop);
+        return TEST_ERR_NETWORK;
+    }
+
+    /**
+     * 通过Http Get请求来验证TCP是否工作正常
+    */
+    char* http_get = "GET / HTTP/1.1\r\n"\
+                     "Host: www.aliyun.com\r\n"\
+                     "Connection: keep-alive\r\n"\
+                     "User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10_15_7) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/96.0.4664.110 Safari/537.36\r\n"\
+                     "Origin: https://www.aliyun.com\r\n"\
+                     "Accept: text/html,application/xhtml+xml,application/xml;q=0.9,image/avif,image/webp,image/apng,*/*;q=0.8,application/signed-exchange;v=b3;q=0.9\r\n"\
+                     "\r\n";
+                     
+    int32_t send_len = strlen(http_get);
+    int32_t send_result = sysdep->core_sysdep_network_send(network_hd, (uint8_t*)http_get, send_len, cfg->send_timeout_ms, NULL);
+    if(send_result != send_len) {
+        DBG("[linksdk]network send length test error:%d, send [%d], result [%d]", TEST_ERR_NETWORK, send_len, send_result);
+        return TEST_ERR_NETWORK;
+    }
+
+    int32_t buf_len = 0;
+    uint8_t byte_read;
+    int32_t content_len = 0;
+    int32_t ret;
+    char* str_ptr = NULL;
+    char* target_str = "Content-Length:";
+    int state = 0;
+    while(1) {
+        ret = sysdep->core_sysdep_network_recv(network_hd, (uint8_t*)&byte_read, 1, cfg->recv_timeout_ms, NULL);
+        /* 需支持按字节读取 */
+        if(ret == 1) {
+            if(state == 0) {
+                /* 提取一行 */
+                buf[buf_len++] = byte_read;
+                if(byte_read != '\n') {
+                    continue;
+                }
+                buf[buf_len] = '\0';
+                /*空行表示header结束*/
+                if(buf_len == 2 && buf[0] == '\r' && buf[1] == '\n') {
+                    state = 1;
+                    buf_len = 0;
+                    continue;
+                }
+                /*搜索应答长度*/
+                str_ptr = strstr(buf,target_str);
+                if(str_ptr == NULL) {
+                    buf_len = 0;
+                    continue;
+                }
+                str_ptr += strlen(target_str);
+                if(str_ptr >= &buf[buf_len]) {
+                    buf_len = 0;
+                    continue;
+                }
+                if( 1 == sscanf(str_ptr,"%d",&content_len)) {
+                    buf_len = 0;
+                }
+            } else {
+                buf[buf_len++] = byte_read;
+            }
+        }
+        else {
+            break;
+        }
+    }
+    sysdep->core_sysdep_network_deinit(&network_hd);
+    sysdep->core_sysdep_free(buf);
+    buf = NULL;
+    if(network_hd != NULL){
+        DBG("[linksdk]network deinit error");
+        return TEST_ERR_NETWORK;
+    }
+    /* http的正文长度校验 */
+    if(buf_len == 0 || buf_len != content_len) {
+        DBG("[linksdk][NETWORK_TEST.RECV] test error:%d, send [%d], result [%d]", TEST_ERR_NETWORK, buf_len, content_len);
+        return TEST_ERR_NETWORK;
+    } else {
+        DBG("[linksdk][NETWORK_TEST.RECV] test success");
+        return TEST_SUCCESS;
+    }
+}
+
+sysdep_test_result_t network_tcp_cycle_test(aiot_sysdep_portfile_t* sysdep, network_cfg_t* cfg)
+{
+    void* network_hd =  NULL;
+    int count = cfg->cycle_test_times;
+    while(count-- > 0) {
+        network_hd = sysdep->core_sysdep_network_init();
+        if(network_hd == NULL) {
+            DBG("[linksdk]network tcp init test error");
+            return TEST_ERR_NETWORK;
+        }
+        core_sysdep_socket_type_t type = CORE_SYSDEP_SOCKET_TCP_CLIENT;
+        sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_SOCKET_TYPE, &type);
+        sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_HOST, cfg->host);
+        sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_PORT, (void*)&cfg->port);
+        sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_CONNECT_TIMEOUT_MS, &cfg->connect_timeout_ms);
+
+        if(0 != sysdep->core_sysdep_network_establish(network_hd)) {
+            DBG("[linksdk]network tcp establish test error:%d", TEST_ERR_NETWORK);
+            return TEST_ERR_NETWORK;
+        }
+        sysdep->core_sysdep_network_deinit(&network_hd);
+    }
+    if( TEST_SUCCESS != heap_test(sysdep) ) {
+        DBG("[linksdk]network deinit then heap test error:%d", TEST_ERR_NETWORK);
+        return TEST_ERR_NETWORK;
+    } else {
+        return TEST_SUCCESS;
+    }
+}
+
+static sysdep_test_result_t network_tcp_send_length_test(aiot_sysdep_portfile_t* sysdep, network_cfg_t* cfg)
+{
+    sysdep_test_result_t ret = TEST_SUCCESS;
+    void* network_hd = sysdep->core_sysdep_network_init();
+
+    core_sysdep_socket_type_t type = CORE_SYSDEP_SOCKET_TCP_CLIENT;
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_SOCKET_TYPE, &type);
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_HOST, cfg->host);
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_PORT, (void*)&cfg->port);
+    sysdep->core_sysdep_network_setopt(network_hd, CORE_SYSDEP_NETWORK_CONNECT_TIMEOUT_MS, &cfg->connect_timeout_ms);
+
+    /**
+     * 建连测试
+    */
+    if(0 != sysdep->core_sysdep_network_establish(network_hd)) {
+        DBG("[linksdk]network establish test error:%d", TEST_ERR_NETWORK);
+        return TEST_ERR_NETWORK;
+    }
+    /**
+     * 通过Http Get请求来验证TCP发送接口是否具备长包发送能力
+    */
+    const char* http_get = "GET / HTTP/1.1\r\n"\
+                     "Host: www.aliyun.com\r\n"\
+                     "Connection: keep-alive\r\n"\
+                     "User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10_15_7) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/96.0.4664.110 Safari/537.36\r\n"\
+                     "Origin: https://www.aliyun.com\r\n"\
+                     "Accept: text/html,application/xhtml+xml,application/xml;q=0.9,image/avif,image/webp,image/apng,*/*;q=0.8,application/signed-exchange;v=b3;q=0.9\r\n"\
+                     "\r\n"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,"\
+                     "invalid test append data,invalid test append data,invalid test append data,invalid test append data,";
+                                 
+    int32_t send_len = strlen(http_get);
+    int32_t send_result = sysdep->core_sysdep_network_send(network_hd, (uint8_t*)http_get, send_len, cfg->send_timeout_ms, NULL);
+    if(send_result != send_len) {
+        DBG("[linksdk]network send length test error:%d, send [%d], result [%d]", TEST_ERR_NETWORK, send_len, send_result);
+        ret = TEST_ERR_NETWORK;
+    }
+    sysdep->core_sysdep_network_deinit(&network_hd);
+    return ret;
+}
+
+
+sysdep_test_result_t network_test(aiot_sysdep_portfile_t* sysdep)
+{
+    sysdep_test_result_t ret;
+    sysdep->core_sysdep_sleep(100);
+
+    network_cfg_t cfg;
+    cfg.host = "www.aliyun.com";
+    cfg.port = 80;
+    cfg.connect_timeout_ms = 5000;
+    cfg.recv_timeout_ms = 5000;
+    cfg.recv_buf_len = 1024;
+    cfg.send_timeout_ms = 5000;
+    cfg.cycle_test_times = 10;
+
+    ret = network_tcp_test(sysdep, &cfg);
+    if(ret != TEST_SUCCESS) {
+        return ret;
+    }
+
+    ret = network_tcp_send_length_test(sysdep,&cfg);
+    if(ret != TEST_SUCCESS){
+        return ret;
+    }
+    ret = network_tcp_cycle_test(sysdep, &cfg);
+    return ret;
+}
+
+static void enter_sleep(void* user_data)
+{
+    task_handler_input_t* user = (task_handler_input_t*)user_data;
+    time_cfg_t* tm = user->user_data;
+
+    DBG("[linksdk]%s enter wanna sleep: %ldms", user->name, tm->sleep_ms);
+    user->sysdep->core_sysdep_sleep(tm->sleep_ms);
+
+    tm->sleep_end = 1;
+    vTaskDelete(NULL);
+    return 0;
+}
+
+sysdep_test_result_t time_sleep_test(aiot_sysdep_portfile_t* sysdep)
+{
+    uint64_t start,stop;
+    time_cfg_t time_cfg;
+    sysdep_test_result_t ret= TEST_SUCCESS;
+    time_cfg_t* sleep1 = NULL;
+    time_cfg_t* sleep2 = NULL;
+    task_handler_input_t input1;
+    task_handler_input_t input2;
+    int64_t wait_total;
+    uint64_t temp;
+
+    time_cfg.sleep_ms = 10 * 1000;
+    DBG("[linksdk]sleep %ldms test",time_cfg.sleep_ms);
+    start = sysdep->core_sysdep_time();
+    sysdep->core_sysdep_sleep(time_cfg.sleep_ms);
+    stop = sysdep->core_sysdep_time();
+    DBG("[linksdk]sleep start %ld stop %ld ms test",start,stop);
+    /* 睡眠异常 */
+    if((stop - start) * 1.1 < time_cfg.sleep_ms) {
+        DBG("[linksdk]sleep test error: %d",TEST_ERR_SLEEP);
+        ret = TEST_ERR_SLEEP;
+        goto end;
+    }
+
+    /* 睡眠时间超过10% */
+    if(stop - start > (uint64_t)(time_cfg.sleep_ms * 1.1)) {
+        DBG("[linksdk]sleep test error: %d",TEST_ERR_SLEEP);
+        ret = TEST_ERR_SLEEP;
+        goto end;
+    }
+
+    /**
+     * 并发睡眠测试，两个并发睡眠消耗的时间应小于两次睡眠时间之和
+    */
+    sleep1 = sysdep->core_sysdep_malloc(sizeof(time_cfg_t),"");
+    sleep2 = sysdep->core_sysdep_malloc(sizeof(time_cfg_t),"");
+    if(sleep1 == NULL || sleep2 == NULL){
+        ret = TEST_ERR_SLEEP;
+        goto end;
+    }
+
+    sleep1->sleep_ms = 10 * 1000;
+    sleep1->sleep_end = 0;
+    sleep2->sleep_ms = 10 * 1000;
+    sleep2->sleep_end = 0;
+
+    input1.name = "sleep_test_task_1";
+    input1.sysdep = sysdep;
+    input1.user_data = sleep1;
+
+    input2.name = "sleep_test_task_2";
+    input2.sysdep = sysdep;
+    input2.user_data = sleep2;
+
+    start = sysdep->core_sysdep_time();
+ 
+    xTaskCreate(enter_sleep, "", 1024, &input1, 20, NULL);
+    xTaskCreate(enter_sleep, "", 1024, &input2, 20, NULL);
+
+    /**
+     * 等待睡眠结束
+    */
+    wait_total = sleep1->sleep_ms + sleep2->sleep_ms + 100;
+    while((sleep1->sleep_end == 0 || sleep2->sleep_end == 0) && wait_total-- > 0) {
+        sysdep->core_sysdep_sleep(1);
+    }
+
+    /**
+     * 检查所有线程是否都退出
+    */
+    while (sleep1->sleep_end == 0 || sleep2->sleep_end == 0){
+        sysdep->core_sysdep_sleep(1);
+    }
+
+    /* 两个线程应该在规定时间内退出 */
+    if(wait_total < 0) {
+        DBG("[linksdk]concurrent sleep test error: wait sleep timeout fail");
+        ret = TEST_ERR_SLEEP;
+        goto end;
+    }
+
+    /* 总睡眠时间应小于各睡眠时间之和 */
+    stop = sysdep->core_sysdep_time();
+    temp = sleep1->sleep_ms + sleep2->sleep_ms;
+    if(stop - start >= temp) {
+        DBG("[linksdk]sleep %ldms start:[%ld] stop:[%ld]\r\n unexpected ", sleep1->sleep_ms, start, stop);
+        ret = TEST_ERR_SLEEP;
+    }
+    else {
+        DBG("[linksdk]sleep %ldms start:[%ld] stop:[%ld] expected ", sleep1->sleep_ms, start, stop);
+        ret = TEST_SUCCESS;
+    }
+end:
+    if(sleep1 != NULL)
+        sysdep->core_sysdep_free(sleep1);
+    if(sleep2 != NULL)
+        sysdep->core_sysdep_free(sleep2);
+    return ret;
+}
+
+static void mutex_synchronize_test(void* user_data)
+{
+    task_handler_input_t* input = (task_handler_input_t*)user_data;
+    mutex_cfg_t* cfg = input->user_data;
+    while(1) {
+        input->sysdep->core_sysdep_mutex_lock(cfg->mutex);
+        if(cfg->value < 0) {
+            input->sysdep->core_sysdep_mutex_unlock(cfg->mutex);
+            break;
+        }
+        cfg->value++;
+        input->sysdep->core_sysdep_mutex_unlock(cfg->mutex);
+        input->sysdep->core_sysdep_sleep(cfg->timeout_ms);
+    }
+    vTaskDelete(NULL);
+    return NULL;
+}
+
+/**
+ * 互斥锁测试
+*/
+sysdep_test_result_t mutex_test(aiot_sysdep_portfile_t* sysdep)
+{
+    sysdep_test_result_t ret;
+    void* mutex = NULL;
+    mutex_cfg_t *mutex_cfg_2 = NULL;
+    task_handler_input_t *input_1 = NULL;
+    task_handler_input_t *input_2 = NULL;
+    int32_t wait_ms = 3000;
+    /**
+     * 互斥锁申请释放及内存泄漏测试
+    */
+    for(int i = 0; i < 1000; i++) {
+        mutex = sysdep->core_sysdep_mutex_init();
+        sysdep->core_sysdep_mutex_lock(mutex);
+        sysdep->core_sysdep_mutex_unlock(mutex);
+        sysdep->core_sysdep_mutex_deinit(&mutex);
+    }
+    if( TEST_SUCCESS != heap_test(sysdep)) {
+        DBG("[linksdk][MUTEX_TEST.CYCLE] test failed\r\n");
+        return ret = TEST_ERR_MUTEX;
+    }
+
+    /**
+     * 互斥锁功能测试
+    */
+    mutex_cfg_t *mutex_cfg_1 = sysdep->core_sysdep_malloc(sizeof(mutex_cfg_t), "");
+    if(mutex_cfg_1 == NULL) {
+        DBG("[linksdk]mutex test but malloc fail");
+        ret = TEST_ERR_MUTEX;
+        goto end;
+    }
+    mutex_cfg_1->mutex = sysdep->core_sysdep_mutex_init();
+    if(mutex_cfg_1->mutex == NULL) {
+        ret = TEST_ERR_MALLOC;
+        DBG("[linksdk][MUTEX_TEST]malloc fail:%d", ret);
+        goto end;
+    }
+    input_1 = sysdep->core_sysdep_malloc(sizeof(task_handler_input_t), "");
+    if(input_1 == NULL){
+        DBG("[linksdk]mutex test but malloc fail");
+        ret = TEST_ERR_MALLOC;
+        goto end;
+    }
+    input_1->name = "mutex_test_task1";
+    input_1->sysdep = sysdep;
+    input_1->user_data = mutex_cfg_1;
+    mutex_cfg_1->timeout_ms = 100;
+    mutex_cfg_1->value = 0;
+    xTaskCreate(mutex_synchronize_test, "", 1024, input_1, 20, NULL);
+
+    mutex_cfg_2 = sysdep->core_sysdep_malloc(sizeof(mutex_cfg_t), "");
+    if(mutex_cfg_2 == NULL) {
+        ret = TEST_ERR_MALLOC;
+        DBG("[linksdk][MUTEX_TEST]malloc fail:%d", ret);
+        goto end;
+    }
+    mutex_cfg_2->mutex = sysdep->core_sysdep_mutex_init();
+    if(mutex_cfg_2->mutex == NULL) {
+        ret = TEST_ERR_MALLOC;
+        DBG("[linksdk][MUTEX_TEST]malloc fail:%d", ret);
+        goto end;
+    }
+    input_2 = sysdep->core_sysdep_malloc(sizeof(task_handler_input_t), "");
+    input_2->name = "mutex_test_task2";
+    input_2->sysdep = sysdep;
+    input_2->user_data = mutex_cfg_2;
+    mutex_cfg_2->timeout_ms = 100;
+    mutex_cfg_2->value = 0;
+    xTaskCreate(mutex_synchronize_test, "", 1024, input_2, 20, NULL);
+
+    sysdep->core_sysdep_sleep(wait_ms);
+    /**
+     * 对mutex_cfg_1->mutex加锁，mutex_test_task1会被锁住，mutex_cfg_1->value应该不会发生变化
+    */
+    int32_t v1,v2;
+    DBG("[linksdk]mutex lock task1, unlock task2 %d ms", wait_ms);
+    sysdep->core_sysdep_mutex_lock(mutex_cfg_1->mutex);
+
+    v1 = mutex_cfg_1->value;
+    v2 = mutex_cfg_2->value;
+
+    sysdep->core_sysdep_sleep(wait_ms);
+
+    int32_t v1_,v2_;
+    v1_ = mutex_cfg_1->value;
+    v2_ = mutex_cfg_2->value;
+    DBG("[linksdk]task1 value [%d --> %d], task2 value [%d --> %d] ", v1, v1_, v2, v2_);
+    if(v1 != v1_ || v2 == v2_) {
+        DBG("[linksdk]mutex test failed ");
+        ret = TEST_ERR_MUTEX;
+        goto end;
+    }
+    sysdep->core_sysdep_mutex_unlock(mutex_cfg_1->mutex);
+
+
+    /**
+     * 对mutex_cfg_2->mutex加锁，mutex_test_task2会被锁住，mutex_cfg_2->value应该不会发生变化
+    */
+    DBG("[linksdk]unlock task1, lock task2 %d ms", wait_ms);
+    sysdep->core_sysdep_mutex_lock(mutex_cfg_2->mutex);
+    v1 = mutex_cfg_1->value;
+    v2 = mutex_cfg_2->value;
+
+    sysdep->core_sysdep_sleep(wait_ms);
+
+    v1_ = mutex_cfg_1->value;
+    v2_ = mutex_cfg_2->value;
+
+    DBG("[linksdk]task1 value [%d --> %d], task2 value [%d --> %d] ", v1, v1_, v2, v2_);
+    if(v1 == v1_ || v2 != v2_) {
+        DBG("[linksdk]mutex test failed");
+        ret = TEST_ERR_MUTEX;
+        goto end;
+    }
+    sysdep->core_sysdep_mutex_unlock(mutex_cfg_2->mutex);
+
+    /**
+     * mutex_cfg_2->mutex不加锁，mutex_cfg_1->mutex不加锁，对应value应该正常变化
+    */
+    DBG("[linksdk]unlock task1, lock task2 %d ms\r\n", wait_ms);
+    v1 = mutex_cfg_1->value;
+    v2 = mutex_cfg_2->value;
+    sysdep->core_sysdep_sleep(wait_ms);
+    v1_ = mutex_cfg_1->value;
+    v2_ = mutex_cfg_2->value;
+    DBG("[linksdk]task1 value [%d --> %d], task2 value [%d --> %d]\r\n", v1, v1_, v2, v2_);
+    if(v1 == v1_ || v2 == v2_) {
+        DBG("[linksdk][MUTEX_TEST.UNLOCK] test failed \r\n");
+        ret = TEST_ERR_MUTEX;
+        goto end;
+    }
+end:
+    /**
+     * 线程退出，回归
+    */
+    if(mutex_cfg_1 != NULL) {
+        mutex_cfg_1->value = -10;
+        sysdep->core_sysdep_sleep(500);
+        if(mutex_cfg_1->mutex != NULL){
+            sysdep->core_sysdep_mutex_deinit(&(mutex_cfg_1->mutex));
+        }
+
+        sysdep->core_sysdep_free(mutex_cfg_1);
+    }
+    
+    if(mutex_cfg_2 != NULL){
+        mutex_cfg_2->value = -10;
+        sysdep->core_sysdep_sleep(500);
+        if(mutex_cfg_2->mutex != NULL){
+            sysdep->core_sysdep_mutex_deinit(&(mutex_cfg_2->mutex));
+        }
+        sysdep->core_sysdep_free(mutex_cfg_2);
+    }
+
+    if(input_1 != NULL){
+        sysdep->core_sysdep_free(input_1);
+    }
+    if(input_2 != NULL){
+        sysdep->core_sysdep_free(input_2);
+    }
+
+    return TEST_SUCCESS;
+}
+
+typedef struct {
+    char*            name;
+    sysdep_test_func func;
+} sysdep_test_suite;
+
+/**
+ * 测试项列表
+ */
+sysdep_test_suite test_list[]= {
+    {"RANDOM_TEST ", random_test},
+    {"HEAP_TEST   ", heap_test},
+    {"TIME_TEST   ", time_sleep_test},
+    {"NETWORK_TEST", network_test},
+    {"MUTEX_TEST  ", mutex_test},
+};
+
+/**
+ * sysdep的接口实现，包含系统时间、内存管理、网络、锁、随机数、等接口实现
+ */
+extern aiot_sysdep_portfile_t g_aiot_sysdep_portfile;
+
+static void demo_sysdep_api_test(void *param)
+{
+    vTaskDelay(1000);
+    aiot_sysdep_portfile_t *sysdep = &g_aiot_sysdep_portfile;
+    int32_t size = sizeof(test_list) / sizeof(test_list[0]);
+    sysdep_test_result_t ret = TEST_SUCCESS;
+    aiot_sysdep_set_portfile(&g_aiot_sysdep_portfile);
+    DBG("[linksdk]TOTAL TEST START");
+    for(int32_t i = 0; i < size; i++) {
+        DBG("[linksdk]TEST [%d/%d] [%s] .....................................[START]", i + 1, size, test_list[i].name);
+        ret = (test_list[i].func)(sysdep);
+        if(TEST_SUCCESS != ret) {
+            DBG("[linksdk]TEST [%d/%d] [%s] .....................................[FAILED] [%s]", i + 1, size, test_list[i].name, result_string[ret]);
+            break;
+        } else {
+            DBG("[linksdk]TEST [%d/%d] [%s] .....................................[SUCCESS]", i + 1, size, test_list[i].name);
+        }
+    }
+    if(ret == TEST_SUCCESS) {
+        DBG("[linksdk]TOTAL TEST SUCCESS");
+    } else {
+        DBG("[linksdk]TOTAL TEST FAILED %s", result_string[ret]);
+    }
+    vTaskDelete(NULL);
+}
+
+static void task_demo_init(void)
+{
+	xTaskCreate(demo_sysdep_api_test, "", 4096, NULL, 20, NULL);
+}
+
+INIT_TASK_EXPORT(task_demo_init, "1");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_linksdk/xmake.lua

@@ -0,0 +1,26 @@
+local TARGET_NAME = "example_linksdk"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    --使用第三方的linksdk
+    includes(SDK_TOP .. "/thirdparty/linksdk")
+    add_deps("linksdk")
+    --加入代码和头文件
+    add_includedirs("/inc",
+                    SDK_TOP .. "/thirdparty/linksdk/core",{public = true})
+    add_files("/src/example_sysdep_api_test.c",{public = true})
+    -- add_files("/src/example_mqtt_basic.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接c 
+
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_lowpower/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_lowpower/src/example_main.c

@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "cms_api.h"
+#include "slpman.h"
+#include "driver_gpio.h"
+
+//AIR780E+TM8211开发板配置
+#define CODEC_PWR_PIN HAL_GPIO_12
+#define CODEC_PWR_PIN_ALT_FUN	4
+#define PA_PWR_PIN HAL_GPIO_25
+#define PA_PWR_PIN_ALT_FUN	0
+
+
+#define LED2_PIN	HAL_GPIO_24
+#define LED2_PIN_ALT_FUN	0
+#define LED3_PIN	HAL_GPIO_23
+#define LED3_PIN_ALT_FUN	0
+#define LED4_PIN	HAL_GPIO_27
+#define LED4_PIN_ALT_FUN	0
+#define CHARGE_EN_PIN	HAL_GPIO_2
+#define CHARGE_EN_PIN_ALT_FUN	0
+//AIR600EAC开发板配置
+
+
+static void usb_serial_input_dummy_cb(uint8_t channel, uint8_t *input, uint32_t len)
+{
+	DBG("usb serial get %dbyte, test mode, send back", len);
+	usb_serial_output(channel, input, len);
+}
+
+
+static void hw_demoA_init(void)
+{
+	DBG("this hw demo1");
+	set_usb_serial_input_callback(usb_serial_input_dummy_cb);
+	GPIO_GlobalInit(NULL);
+	GPIO_ConfigWithPullEC618(CODEC_PWR_PIN, 0, 0, CODEC_PWR_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(PA_PWR_PIN, 0, 0, PA_PWR_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(LED2_PIN, 0, 0, LED2_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(LED3_PIN, 0, 0, LED3_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(LED4_PIN, 0, 0, LED4_PIN_ALT_FUN);
+	GPIO_ConfigWithPullEC618(CHARGE_EN_PIN, 0, 0, CHARGE_EN_PIN_ALT_FUN);
+}
+
+//启动hw_demoA_init，启动位置硬件初始1级
+INIT_HW_EXPORT(hw_demoA_init, "1");
+
+static void demo_task(void *param)
+{
+	soc_require_lowpower_state(0);
+	while(1)
+	{
+		soc_require_lowpower_state(0);
+		vTaskDelay(30000);
+		soc_require_lowpower_state(1);
+		vTaskDelay(30000);
+		soc_require_lowpower_state(2);
+		vTaskDelay(30000);
+	}
+}
+
+static void test_audio_demo_init(void)
+{
+	xTaskCreate(demo_task, "test", 1024, NULL, 20, NULL);
+}
+
+INIT_TASK_EXPORT(test_audio_demo_init, "1");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_lowpower/xmake.lua

@@ -0,0 +1,21 @@
+local TARGET_NAME = "example_lowpower"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_mqttclient/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_mqttclient/src/mqttclient_main.c

@@ -0,0 +1,197 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "bsp.h"
+#include "bsp_custom.h"
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "cmisim.h"
+#include "cmips.h"
+#include "slpman.h"
+
+#include "MQTTClient.h"
+#include "cmimm.h"
+
+
+#define MQTT_HOST    	"120.55.137.106"   				// MQTT服务器的地址和端口号
+#define MQTT_PORT		1884
+#define CLIENT_ID    	"123456789"          
+#define USERNAME    	"username"                 
+#define PASSWORD    	"password"   
+
+static char mqtt_sub_topic[] = "test_topic";
+static char mqtt_pub_topic[] = "test_topic";
+static char mqtt_send_payload[] = "hello mqtt_test!!!";
+
+#define QMSG_ID_BASE               (0x160) 
+#define QMSG_ID_NW_IPV4_READY      (QMSG_ID_BASE)
+#define QMSG_ID_NW_IPV6_READY      (QMSG_ID_BASE + 1)
+#define QMSG_ID_NW_IPV4_6_READY    (QMSG_ID_BASE + 2)
+#define QMSG_ID_NW_DISCONNECT      (QMSG_ID_BASE + 3)
+#define QMSG_ID_SOCK_SENDPKG       (QMSG_ID_BASE + 4)
+#define QMSG_ID_SOCK_RECVPKG       (QMSG_ID_BASE + 5)
+
+
+#define APP_EVENT_QUEUE_SIZE    (10)
+static QueueHandle_t            psEventQueueHandle;
+
+static void sendQueueMsg(UINT32 msgId, UINT32 xTickstoWait){
+    eventCallbackMessage_t *queueMsg = NULL;
+    queueMsg = malloc(sizeof(eventCallbackMessage_t));
+    queueMsg->messageId = msgId;
+    if (psEventQueueHandle){
+        if (pdTRUE != xQueueSend(psEventQueueHandle, &queueMsg, xTickstoWait)){
+            DBG("xQueueSend error");
+        }
+    }
+}
+
+static INT32 mqttPSUrcCallback(PsEventID eventID, void *param, UINT32 paramLen){
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    UINT8 rssi = 0;
+    NmAtiNetInfoInd *netif = NULL;
+
+    switch(eventID){
+        case PS_URC_ID_SIM_READY:{
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            break;
+        }
+        case PS_URC_ID_MM_SIGQ:{
+            CmiMmCesqInd *pMmCesqInd = (CmiMmCesqInd *)param;
+            rssi = mmGetCsqRssiFromCesq(pMmCesqInd->rsrp, pMmCesqInd->rsrq, pMmCesqInd->rssiCompensation);
+            DBG("RSSI signal=%d", rssi);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:{
+            DBG("Default bearer activated");
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:{
+            DBG("Default bearer Deactivated");
+            sendQueueMsg(QMSG_ID_NW_DISCONNECT, 0);
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:{
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:{
+            netif = (NmAtiNetInfoInd *)param;
+            if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED){
+                DBG("netif acivated");
+                sendQueueMsg(QMSG_ID_NW_IPV4_READY, 0);
+            }else if (netif->netifInfo.netStatus == NM_NETIF_OOS){
+                DBG("PSIF network OOS");
+            }else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED ||
+                     netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL){
+                DBG("PSIF network deactive");
+            }
+            break;
+        }
+        default:
+            break;
+    }
+    return 0;
+}
+
+void messageArrived(MessageData* data)
+{
+	DBG("mqtt Message arrived on topic %.*s: %.*s\n", data->topicName->lenstring.len, data->topicName->lenstring.data,
+		data->message->payloadlen, data->message->payload);
+}
+
+static void mqtt_demo(void){
+	int rc = 0;
+    static MQTTClient mqttClient;
+    static Network n = {0};
+    MQTTMessage message;
+    MQTTPacket_connectData connectData = MQTTPacket_connectData_initializer;
+    connectData.MQTTVersion = 4;
+    connectData.clientID.cstring = CLIENT_ID;
+    connectData.username.cstring = USERNAME;
+    connectData.password.cstring = PASSWORD;
+    connectData.keepAliveInterval = 120;
+    
+    //mqtts的话自行配置Network,详情查看Network结构体
+    // n.isMqtts = TRUE;
+    // n.timeout_r = 20;
+    // n.seclevel = 1;
+    // n.ciphersuite[0] = 0xFFFF;
+    // n.ignore = 1;
+
+    if ((rc = mqtt_connect(&mqttClient, &n,MQTT_HOST, MQTT_PORT, &connectData)) != 0)
+        DBG("mqtt Return code from MQTT mqtt_connect is %d\n", rc);
+    
+    if ((rc = MQTTSubscribe(&mqttClient, mqtt_sub_topic, 0, messageArrived)) != 0)
+        DBG("mqtt Return code from MQTT subscribe is %d\n", rc);
+    while(1){
+        int len = strlen(mqtt_send_payload);
+        message.qos = 1;
+		message.retained = 0;
+        message.payload = mqtt_send_payload;
+        message.payloadlen = len;
+        DBG("mqtt_demo send data");
+        MQTTPublish(&mqttClient, mqtt_pub_topic, &message);
+        osDelay(5000);
+    }
+}
+
+
+static void mqttclient_task(void *param){
+    eventCallbackMessage_t *queueItem = NULL;
+    psEventQueueHandle = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(eventCallbackMessage_t*));
+    if (psEventQueueHandle == NULL){
+        DBG("psEventQueue create error!");
+        return;
+    }
+    registerPSEventCallback(PS_GROUP_ALL_MASK, mqttPSUrcCallback);
+    while(1){
+        if (xQueueReceive(psEventQueueHandle, &queueItem, portMAX_DELAY)){
+            switch(queueItem->messageId){
+                case QMSG_ID_NW_IPV4_READY:
+                case QMSG_ID_NW_IPV6_READY:
+                case QMSG_ID_NW_IPV4_6_READY:
+					mqtt_demo();
+                    break;
+                case QMSG_ID_NW_DISCONNECT:
+                    break;
+                default:
+                    break;
+            }
+            free(queueItem);
+        }
+    }
+	vTaskDelete(NULL);
+}
+
+static void mqttclient_task_init(void){
+	xTaskCreate(mqttclient_task, "", 4096, NULL, 20, NULL);
+}
+
+INIT_TASK_EXPORT(mqttclient_task_init, "2");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_mqttclient/xmake.lua

@@ -0,0 +1,28 @@
+local TARGET_NAME = "example_mqttclient"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    add_defines("MQTT_TASK",{public = true})
+
+    includes(SDK_TOP .. "/thirdparty/mqtt")
+    add_deps("mqtt")
+    
+    -- --加入代码和头文件
+    add_includedirs(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src",{public = true})
+    add_files(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src/*.c",{public = true})
+
+    --加入自己代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_ntp/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_ntp/src/example_main.c

@@ -0,0 +1,161 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "sockets.h"
+#include "networkmgr.h"
+#include "netdb.h"
+#include "slpman.h"
+#include "time.h"
+#include "sntp.h"
+#include "plat_config.h"
+#include "semphr.h"
+typedef struct
+{
+	ip_addr_t remote_ip;
+	ip_addr_t local_ip;
+	void *wait_link_sem;
+	void *wait_dns_sem;
+	void *heart_timer;
+	void *pa_delay_timer;
+	int socket_id;
+	uint8_t is_link_up;
+	uint8_t ipv4_cid;
+	uint8_t ipv6_cid;
+}demo_ctrl_t;
+
+static demo_ctrl_t g_s_demo;
+
+static INT32 ps_callback(PsEventID eventID, void *param, UINT32 paramLen)
+{
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    NmAtiNetInfoInd *net_info = NULL;
+
+    switch(eventID)
+    {
+        case PS_URC_ID_SIM_READY:
+        {
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:
+        {
+        	DBG("Default bearer activated");
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:
+        {
+        	DBG("Default bearer Deactivated");
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:
+        {
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:
+        {
+            net_info = (NmAtiNetInfoInd *)param;
+			DBG("%d,%d,%d,%d", net_info->indCause, net_info->netifInfo.netStatus, net_info->netifInfo.ipv4Cid, net_info->netifInfo.ipv6Cid);
+			switch(net_info->indCause)
+			{
+			case NM_STATUS_CHANGE_LINK_UP:
+			case NM_STATUS_CHANGE_LINK_UP_IPV4:
+			case NM_STATUS_CHANGE_LINK_UP_IPV6:
+			case NM_STATUS_CHANGE_RA_SUCCESS:
+				DBG("network ready");
+				if (!g_s_demo.is_link_up)
+				{
+					g_s_demo.is_link_up = 1;
+					xSemaphoreGive(g_s_demo.wait_link_sem);
+				}
+				break;
+			default:
+				g_s_demo.is_link_up = 0;
+				DBG("network not ready");
+				break;
+			}
+
+			if (NM_NETIF_ACTIVATED == net_info->netifInfo.netStatus)
+			{
+				g_s_demo.ipv4_cid = net_info->netifInfo.ipv4Cid;
+				g_s_demo.ipv6_cid = net_info->netifInfo.ipv6Cid;
+				g_s_demo.local_ip.type = IPADDR_TYPE_V4;
+				g_s_demo.local_ip.u_addr.ip4 = net_info->netifInfo.ipv4Info.ipv4Addr;
+			}
+            break;
+        }
+        default:
+            break;
+
+    }
+    return 0;
+}
+
+static int32_t ntp_callback(void *data, void *param)
+{
+	sntp_result_t *result = (sntp_result_t *)data;
+	DBG("%d,%d,%d", result->succ, result->sec, result->us);
+	return 0;
+}
+
+static void task_test_ntp(void *param)
+{
+	uint8_t ntp_sleep_handler;
+	slpManSetPmuSleepMode(true, SLP_HIB_STATE, false);
+	slpManApplyPlatVoteHandle("ntp", &ntp_sleep_handler);
+	slpManPlatVoteDisableSleep(ntp_sleep_handler, SLP_SLP2_STATE);
+
+    g_s_demo.wait_link_sem = xSemaphoreCreateBinary();
+
+    registerPSEventCallback(PS_GROUP_ALL_MASK, ps_callback);
+
+    xSemaphoreTake(g_s_demo.wait_link_sem, portMAX_DELAY);
+    SntpInit("ntp1.aliyun.com", SNTP_DEFAULT_PORT, 1, g_s_demo.ipv4_cid, ntp_callback, NULL);
+    while(1)
+    {
+        vTaskDelay(300000);
+        if (!g_s_demo.is_link_up)
+        {
+        	xSemaphoreTake(g_s_demo.wait_link_sem, portMAX_DELAY);
+        }
+        SntpInit("ntp1.aliyun.com", SNTP_DEFAULT_PORT, 1, g_s_demo.ipv4_cid, ntp_callback, NULL);
+    }
+
+	vTaskDelete(NULL);
+}
+
+static void task_demo_ntp(void)
+{
+	xTaskCreate(task_test_ntp, "ntp", 1024, NULL, 20, NULL);
+}
+//启动task_demoF_init，启动位置任务2级
+INIT_TASK_EXPORT(task_demo_ntp, "1");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_ntp/xmake.lua

@@ -0,0 +1,23 @@
+local TARGET_NAME = "example_ntp"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    --使用第三方的ntp
+    includes(SDK_TOP .. "/thirdparty/sntp")
+    add_deps("sntp")
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_timer/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_timer/src/example_main.c

@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "timer.h"
+#include "bsp.h"
+
+
+#define TIMER_INSTANCE                   (1)
+
+/** \brief TIMER clock id for clock configuration */
+#define TIMER_CLOCK_ID                   (FCLK_TIMER1)
+
+/** \brief TIMER clock source select */
+#define TIMER_CLOCK_SOURCE               (FCLK_TIMER1_SEL_26M)
+
+/** \brief TIMER instance IRQ number */
+#define TIMER_INSTANCE_IRQ               (PXIC0_TIMER1_IRQn)
+
+
+/// @brief 定时器中断服务函数
+void Timer_ISR()
+{
+    if (TIMER_getInterruptFlags(TIMER_INSTANCE) & TIMER_MATCH0_INTERRUPT_FLAG)
+    {
+        DBG("timer demo interrupt is running");
+        TIMER_clearInterruptFlags(TIMER_INSTANCE, TIMER_MATCH0_INTERRUPT_FLAG);
+    }
+}
+static void Timer_Init(void *param)
+{
+	TIMER_driverInit();//定时器内部初始化
+	CLOCK_setClockSrc(TIMER_CLOCK_ID, TIMER_CLOCK_SOURCE);//选择定时器时钟来源
+    CLOCK_setClockDiv(TIMER_CLOCK_ID, 1);//设置时钟分频
+	TimerConfig_t timer1_config;
+	TIMER_getDefaultConfig(&timer1_config);
+	timer1_config.reloadOption=TIMER_RELOAD_ON_MATCH0;//重装通道选项 可以选择MATCH0，MATCH1，MATCH2
+	timer1_config.match0=0xc65d40;//重装值 500ms ,定时器频率为26MHZ，13000000=0xc65d40
+	TIMER_init(TIMER_INSTANCE, &timer1_config);
+	TIMER_interruptConfig(TIMER_INSTANCE, TIMER_MATCH0_SELECT, TIMER_INTERRUPT_LEVEL);//中断配置
+    TIMER_interruptConfig(TIMER_INSTANCE, TIMER_MATCH1_SELECT, TIMER_INTERRUPT_DISABLED);
+    TIMER_interruptConfig(TIMER_INSTANCE, TIMER_MATCH2_SELECT, TIMER_INTERRUPT_DISABLED);
+	XIC_SetVector(TIMER_INSTANCE_IRQ, Timer_ISR);
+    XIC_EnableIRQ(TIMER_INSTANCE_IRQ);
+	TIMER_start(TIMER_INSTANCE);
+	while (1)
+	{
+		DBG("timer demo is running");
+		vTaskDelay(500);
+	}
+	
+}
+
+void Timer_task_init(void)
+{
+	xTaskCreate(Timer_Init,"timer_demo",1*1024,NULL,3,NULL);
+}
+
+INIT_TASK_EXPORT(Timer_task_init,"1");

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_timer/xmake.lua

@@ -0,0 +1,20 @@
+local TARGET_NAME = "example_timer"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_yunlabayashi/inc/RTE_Device.h

@@ -0,0 +1,349 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_yunlabayashi/inc/yulabayanshi.h

@@ -0,0 +1,74 @@
+#ifndef _YULABAYANSHI_H
+#define _UNLABAYANSHI_H
+
+#include "string.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "timers.h"
+#include "bsp.h"
+#include "bsp_custom.h"
+#include "common_api.h"
+
+#include "portmacro.h"
+#include "audio_play.h"
+#include "ivTTS.h"
+#include "ostask.h"
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "cmisim.h"
+#include "cmips.h"
+#include "slpman.h"
+#include "gpio.h"
+#include "pad.h"
+#define WAIT_PLAY_FLAG (0x1)
+#include DEBUG_LOG_HEADER_FILE
+#include "plat_config.h"
+#include "audio_play.h"
+#include "audio_ll_drv.h"
+#include "osasys.h"
+#include "version.h"
+#include "ivTTS.h"
+
+
+#include "MQTTClient.h"
+#include "HTTPClient.h"
+#define HOST "lbsmqtt.airm2m.com"
+#define PORT 1883
+#define client_id "60561eae30594a88bd432627a36240d9"
+#define User "username"  
+#define Password "password" 
+#include "osasys.h"
+typedef struct
+{
+    uint32_t priority;
+    uint32_t playType;
+    union
+    {
+        struct
+        {
+            char *data;
+            uint8_t len;
+        } tts;
+        struct
+        {
+            audio_play_info_t *info;
+            uint8_t count;
+        } file;
+    } message;
+    void * userParam;
+} audioQueueData;
+
+typedef enum
+{
+    MONEY_PLAY = 0,
+    PAD_PLAY,
+    SYS_PLAY
+} AUDIO_PLAY_PRIORITY;
+
+typedef enum
+{
+    TTS_PLAY = 0,
+    FILE_PLAY,
+} AUDI;
+#endif

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_yunlabayashi/src/yulabayashi.c

@@ -0,0 +1,411 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "yulabayanshi.h"
+
+char mqtt_subTopic[40];
+static char subTopic[]="test20220929/";
+static HttpClientContext AirM2mhttpClient;
+static QueueHandle_t networkQue;
+
+#define HTTP_RECV_BUF_SIZE      (1501)
+#define HTTP_HEAD_BUF_SIZE      (800)
+#define QMSG_ID_BASE               (0x160) 
+#define QMSG_ID_NW_IPV4_READY      (QMSG_ID_BASE)
+#define QMSG_ID_NW_IPV6_READY      (QMSG_ID_BASE + 1)
+#define QMSG_ID_NW_IPV4_6_READY    (QMSG_ID_BASE + 2)
+#define QMSG_ID_NW_DISCONNECT      (QMSG_ID_BASE + 3)
+#define QMSG_ID_SOCK_SENDPKG       (QMSG_ID_BASE + 4)
+#define QMSG_ID_SOCK_RECVPKG       (QMSG_ID_BASE + 5)
+
+/*-------------------------------------------------audio define-----------------------------------------------*/
+extern const unsigned char audiopoweron[];
+extern const int poweron_count;
+static osEventFlagsId_t waitAudioPlayDone = NULL;
+QueueHandle_t audioQueueHandle = NULL;
+static uint8_t audio_sleep_handler = 0xff;
+static TimerHandle_t delay_timer;
+
+/*-------------------------------------------------audio define-----------------------------------------------*/
+
+/*-------------------------------------------------FILE-----------------------------------------------*/
+#define FILE_NAME "audio.amr"
+#define FILE_NAME_SIZE (20)
+
+static void http_audio_File(void *buf, UINT32 BUFF_SIZE)
+{
+    OsaFremove(FILE_NAME);
+    OSAFILE fp = OsaFopen(FILE_NAME, "wb+");
+    if (fp == NULL)
+    {
+        DBG("open file for write, failed");
+        return;
+    }
+    uint32_t ret = OsaFwrite(buf, BUFF_SIZE, 1, fp);
+    if (ret != 1)
+    {
+        DBG("fail to write, excpt 1 but %d", BUFF_SIZE, ret);
+    }
+    OsaFclose(fp);
+    return;
+}
+
+/*-------------------------------------------------FILE-----------------------------------------------*/
+
+/*------------------------------------------------audio-----------------------------------------------*/
+
+void audio_data_cb(uint8_t *data, uint32_t len, uint8_t bits, uint8_t channels)
+{
+    //这里可以对音频数据进行软件音量缩放，或者直接清空来静音
+    //软件音量缩放参考HAL_I2sSrcAdjustVolumn
+    // int value = 1;
+    // int ret = am_kv_get("volume", &value, 1);
+    // if(ret > 0)
+    // {
+    //     DBG("AUDIO GET VOLUME SUCCESS %d", value);
+    //     HAL_I2sSrcAdjustVolumn(data, len, value);
+    // }
+    // else
+    // {
+    //     DBG("AUDIO GET VOLUME FAIL %d", value);
+    //     HAL_I2sSrcAdjustVolumn(data, len, 1);
+    // }
+    DBG("%x,%d,%d,%d", data, len, bits, channels);
+}
+void app_pa_on(uint32_t arg)
+{
+    GPIO_pinWrite(1, 1 << 9, 1 << 9);
+}
+void audio_event_cb(uint32_t event, void *param)
+{
+    //	PadConfig_t pad_config;
+    //	GpioPinConfig_t gpio_config;
+        uint8_t status = usb_portmon_vbuspad_level();
+    DBG("%d", event);
+    switch (event)
+    {
+    case MULTIMEDIA_CB_AUDIO_DECODE_START:
+        slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP1_STATE);
+        GPIO_pinWrite(0, 1 << 12, 1 << 12);
+        audio_play_write_blank_raw(0, 6);
+        break;
+    case MULTIMEDIA_CB_AUDIO_OUTPUT_START:
+        xTimerStart(delay_timer, 200);
+        break;
+    case MULTIMEDIA_CB_TTS_INIT:
+        if (4 == sizeof("你好"))
+        {
+            audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_GBK);
+        }
+        else
+        {
+            audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_UTF8);
+        }
+        break;
+    case MULTIMEDIA_CB_AUDIO_DONE:
+        xTimerStop(delay_timer, 0);
+        DBG("audio play done!");
+        GPIO_pinWrite(1, 1 << 9, 0);
+        GPIO_pinWrite(0, 1 << 12, 0);
+        slpManPlatVoteEnableSleep(audio_sleep_handler, SLP_SLP1_STATE);
+        osEventFlagsSet(waitAudioPlayDone, WAIT_PLAY_FLAG);
+        break;
+    }
+}
+void audio_task(void *param)
+{
+    audioQueueData audioQueueRecv = {0};
+    uint32_t result = 0;
+    while (1)
+    {
+        if (xQueueReceive(audioQueueHandle, &audioQueueRecv, portMAX_DELAY))
+        {
+            // audio_play_tts_text(0, audioQueueRecv.data, sizeof(audioQueueRecv.data));
+            DBG("this is play priority %d", audioQueueRecv.priority);
+            DBG("this is play playType %d", audioQueueRecv.playType);
+            if (audioQueueRecv.priority == MONEY_PLAY)
+            {
+                
+                if (audioQueueRecv.playType == TTS_PLAY)
+                {
+                    // DBG("TEST data address %d", sizeof(audioQueueRecv.message.data));
+                    audio_play_tts_text(0, audioQueueRecv.message.tts.data, audioQueueRecv.message.tts.len);
+                }
+                else if (audioQueueRecv.playType == FILE_PLAY)
+                {
+                    DBG("TEST address 2 %p", audioQueueRecv.message.file.info);
+                    audio_play_multi_files(0, audioQueueRecv.message.file.info, audioQueueRecv.message.file.count);
+                }
+            }
+            else if (audioQueueRecv.priority == PAD_PLAY)
+            {
+            }
+            result = osEventFlagsWait(waitAudioPlayDone, WAIT_PLAY_FLAG, osFlagsWaitAll, 20000);
+            if (audioQueueRecv.playType == TTS_PLAY) {
+                DBG("FREE MY AUDIO TTS");
+                free(audioQueueRecv.message.tts.data);
+            }
+            else if(audioQueueRecv.playType == FILE_PLAY)
+            {
+                free(audioQueueRecv.message.file.info);
+                DBG("FREE MY AUDIO FILE");
+            }
+            // volume++;
+            
+        }
+    }
+    vTaskDelete(NULL);
+}
+
+void audio_task_init(void)
+{
+    GpioPinConfig_t gpio_config;
+    gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    gpio_config.misc.initOutput = 0;
+    GPIO_pinConfig(0, 12, &gpio_config);
+
+    PadConfig_t config;
+    PAD_getDefaultConfig(&config);
+    config.mux = PAD_MUX_ALT0;
+    PAD_setPinConfig(45, &config);
+
+    GPIO_pinConfig(1, 9, &gpio_config);
+
+    ivCStrA sdk_id = AISOUND_SDK_USERID;
+    slpManSetPmuSleepMode(true, SLP_SLP1_STATE, false);
+    slpManApplyPlatVoteHandle("audio", &audio_sleep_handler);
+
+    slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP2_STATE);
+    delay_timer = xTimerCreate(NULL, 200, 0, 0, app_pa_on);
+
+    audio_play_global_init(audio_event_cb, audio_data_cb, NULL);
+    audio_play_tts_set_resource(ivtts_16k_lite, sdk_id);
+    //现在使用ES7149/ES7148，用如下配置，如果不是，请根据实际情况配置，bus_id直接写0
+    // Audio_CodecI2SInit(0, I2S_MODE_I2S, I2S_FRAME_SIZE_16_16);
+    //如下配置可使用TM8211
+
+    Audio_CodecI2SInit(0, I2S_MODE_MSB, I2S_FRAME_SIZE_16_16);
+    if (waitAudioPlayDone == NULL)
+    {
+        waitAudioPlayDone = osEventFlagsNew(NULL);
+    }
+    audioQueueHandle = xQueueCreate(100, sizeof(audioQueueData));
+    audioQueueData powerOn = {0};
+    powerOn.playType = TTS_PLAY;
+    powerOn.priority = MONEY_PLAY;
+    char str[] = "正在开机"; 
+    powerOn.message.tts.data = malloc(sizeof(str));
+    memcpy(powerOn.message.tts.data, str, sizeof(str));
+    powerOn.message.tts.len = sizeof(str);
+    if (pdTRUE != xQueueSend(audioQueueHandle, &powerOn, 0))
+    {
+        DBG("start send audio fail");
+    }
+    xTaskCreate(audio_task, " ", 2048, NULL, 20, NULL);
+}
+/*------------------------------------------------audio-----------------------------------------------*/
+/*------------------------------------------------http------------------------------------------------*/
+HTTPResult AirM2mGethttp(CHAR *getUrl, CHAR *buf, UINT32 len)
+{
+    HttpClientData    clientData = {0};
+    HTTPResult result=HTTP_INTERNAL;
+    //AirM2mhttpClient.timeout_r=20;
+    // AirM2mhttpClient.timeout_s=2;
+    clientData.headerBuf = malloc(HTTP_HEAD_BUF_SIZE);
+    clientData.headerBufLen = HTTP_HEAD_BUF_SIZE;
+    clientData.respBuf = buf;
+    clientData.respBufLen = len;
+    result=httpGet(&AirM2mhttpClient,getUrl,&clientData,20);
+    return result;
+}
+/*------------------------------------------------http------------------------------------------------*/
+/*------------------------------------------------MQTT------------------------------------------------*/
+void messageArrived(MessageData *data)
+{
+    audioQueueData audiodata = {0};
+    HTTPResult result;
+    CHAR url[200];
+    char *p = (char *)data->message->payload;
+    memcpy(url, p + 5, p[4] + 1);
+    for (size_t i = 0; i < p[4]; i++)
+    {
+        /* code */
+        DBG("my test mqtt url %c", url[i]);
+    }
+    if (p[0] == 0)
+    {
+        audiodata.playType = TTS_PLAY;
+        audiodata.priority = MONEY_PLAY;
+        audiodata.message.tts.data = malloc(sizeof(url));
+        memcpy(audiodata.message.tts.data, url, sizeof(url));
+        audiodata.message.tts.len = sizeof(url);
+        if (pdTRUE != xQueueSend(audioQueueHandle, &audiodata, 0))
+        {
+            DBG("start send audio fail");
+        }
+    }
+    else
+    {
+        char *recvBuf = malloc(HTTP_RECV_BUF_SIZE);
+        result = AirM2mGethttp(url,recvBuf, HTTP_RECV_BUF_SIZE);
+        if (result == HTTP_OK)
+        {
+            DBG("http chengong");
+            DBG("http ceshi %s", recvBuf);
+            http_audio_File(recvBuf, sizeof(recvBuf));
+            audiodata.priority = MONEY_PLAY;
+            audiodata.playType = FILE_PLAY;
+            audiodata.message.file.info=(audio_play_info_t *)calloc(1, sizeof(audio_play_info_t));
+            audiodata.message.file.info->path = FILE_NAME;
+            audiodata.message.file.count = 1;
+            if (pdTRUE != xQueueSend(audioQueueHandle, &audiodata, 0))
+            {
+                DBG("start send audio fail");
+            }
+        }
+    }
+}
+
+static void mqtt_demo(void){
+	int rc = 0;
+    MQTTClient mqttClient;
+    static Network n = {0};
+    MQTTPacket_connectData connectData = MQTTPacket_connectData_initializer;
+    connectData.MQTTVersion = 4;
+    connectData.clientID.cstring = client_id;
+    connectData.username.cstring = User;
+    connectData.password.cstring = Password;
+    connectData.keepAliveInterval = 120;
+    if ((rc = mqtt_connect(&mqttClient, &n,HOST, PORT, &connectData)) != 0)
+        DBG("mqtt Return code from MQTT mqtt_connect is %d\n", rc);
+    
+    if ((rc = MQTTSubscribe(&mqttClient, mqtt_subTopic, 0, messageArrived)) != 0)
+        DBG("mqtt Return code from MQTT subscribe is %d\n", rc);
+    while (1)
+    {
+        osDelay(5000);
+    }
+    
+   
+}
+
+static void sendQueueMsg(UINT32 msgId, UINT32 xTickstoWait)
+{
+    eventCallbackMessage_t *queueMsg = NULL;
+    queueMsg = malloc(sizeof(eventCallbackMessage_t));
+    queueMsg->messageId = msgId;
+    if (networkQue)
+    {
+        if (pdTRUE != xQueueSend(networkQue, &queueMsg, xTickstoWait))
+        {
+            DBG("xQueueSend error");
+        }
+    }
+}
+static INT32 Networkcall(PsEventID eventId, void *param, UINT32 paramLen)
+{
+    NmAtiNetInfoInd *netif = NULL;
+    switch (eventId)
+    {
+    case PS_URC_ID_PS_NETINFO:
+    {
+        netif = (NmAtiNetInfoInd *)param;
+        if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED)
+        {
+            DBG("netif acivated");
+            sendQueueMsg(QMSG_ID_NW_IPV4_READY, 0);
+        }
+        else if (netif->netifInfo.netStatus == NM_NETIF_OOS)
+        {
+            DBG("PSIF network OOS");
+        }
+        else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED || netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL)
+        {
+            DBG("PSIF network deactive");
+        }
+        break;
+    }
+
+    case PS_URC_ID_PS_BEARER_DEACTED:
+    {
+        DBG("Default bearer Deactivated");
+        sendQueueMsg(QMSG_ID_NW_DISCONNECT, 0);
+        break;
+    }
+    default:
+        break;
+    }
+    return 0;
+}
+
+static void MQTT_Task(void *param)
+{
+    CHAR imei[20] = {0};
+    CmsRetId ack = appGetImeiNumSync(imei);
+    if (CMS_RET_SUCC == ack)
+    {
+        DBG("GetImei_succeed %s", imei);
+        sprintf(mqtt_subTopic, "%s%s", subTopic, imei);
+        DBG("Get_Mqtt_subTopic %s", mqtt_subTopic);
+    }
+    else
+    {
+        DBG("GetImei_Fail");
+    }
+    eventCallbackMessage_t *quItem = NULL;
+    networkQue = xQueueCreate(10, sizeof(eventCallbackMessage_t *));
+    if (networkQue == NULL)
+    {
+        DBG("xQueueCreate_Fail");
+        return;
+    }
+    registerPSEventCallback(PS_GROUP_ALL_MASK, Networkcall);
+    while (1)
+    {
+        if (xQueueReceive(networkQue, &quItem, portMAX_DELAY))
+        {
+            switch (quItem->messageId)
+            {
+            case QMSG_ID_NW_IPV4_READY:
+            case QMSG_ID_NW_IPV6_READY:
+            case QMSG_ID_NW_IPV4_6_READY:
+                mqtt_demo();
+                break;
+            case QMSG_ID_NW_DISCONNECT:
+                break;
+            default:
+                break;
+            }
+            free(quItem);
+        }
+    }
+    vTaskDelete(NULL);
+}
+
+static void mqttclient_task_init(void){
+	xTaskCreate(MQTT_Task, "", 4096, NULL, 20, NULL);
+}
+
+/*------------------------------------------------MQTT------------------------------------------------*/
+
+INIT_TASK_EXPORT(mqttclient_task_init, "2");
+INIT_TASK_EXPORT(audio_task_init, "3");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/example_yunlabayashi/xmake.lua

@@ -0,0 +1,34 @@
+local TARGET_NAME = "example_yunlabayashi"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+includes(SDK_TOP .. "/thirdparty/audio_decoder")
+target(TARGET_NAME)
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    add_defines("MQTT_TASK",{public = true})
+
+    includes(SDK_TOP .. "/thirdparty/mqtt")
+    add_deps("mqtt")
+    
+    -- --加入代码和头文件
+    add_includedirs(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src",{public = true})
+    add_files(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src/*.c",{public = true})
+    --加入代码和头文件
+     includes(SDK_TOP .. "/thirdparty/httpclient")
+    add_deps("httpclient")
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+    add_deps("audio_decoder")
+    --加入代码和头文件
+    add_includedirs("/include",{public = true})
+    add_includedirs(SDK_TOP .. "/PLAT/core/tts/include/16k_lite_ver",{public = true})
+    --路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
+    -- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
+    -- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    LIB_USER = LIB_USER .. SDK_TOP .. "/PLAT/core/lib/libaisound50_16K_lite_beta.a "
+    --甚至可以加入自己的库
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/targets/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/targets/xmake.lua

@@ -0,0 +1,42 @@
+local TARGET_NAME = "targets"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target("target1")
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/target1/*.c",{public = true})
+
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. "libtarget1.a "
+target_end()
+
+target("target2")
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/target2/*.c",{public = true})
+
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. "libtarget2.a "
+target_end()
+
+target("target3")
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    --加入代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/target3/*.c",{public = true})
+
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. "libtarget3.a "
+target_end()
+
+target(TARGET_NAME)
+    set_kind("phony")
+    add_deps("target1", "target2", "target3")
+    set_targetdir(LIB_DIR)
+target_end()

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/web_led/inc/RTE_Device.h

@@ -0,0 +1,350 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+#define RTE_UART1_CTS_PIN_EN            1
+#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/web_led/src/mqttclient_main.c

@@ -0,0 +1,345 @@
+/*
+ * Copyright (c) 2022 OpenLuat & AirM2M
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "bsp.h"
+#include "bsp_custom.h"
+#include "common_api.h"
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "ps_event_callback.h"
+#include "ps_lib_api.h"
+#include "cmisim.h"
+#include "cmips.h"
+#include "slpman.h"
+
+#include "MQTTClient.h"
+
+#include "cJSON.h"
+#include "gpio.h"
+#include "cmimm.h"
+
+
+char g_mqtt_MQTT_HOST[192];    //    	"120.55.137.106"   				// MQTT服务器的地址和端口号
+uint32_t g_mqtt_MQTT_PORT = 1883;
+char g_mqtt_CLIENT_ID[192];
+char g_mqtt_USERNAME[192];
+char g_mqtt_PASSWORD[192];
+
+char g_mqtt_sub_topic[256];
+char g_mqtt_pub_topic[256];
+
+#define NETLED_ID 27
+#define NETLED_PAD (NETLED_ID / 16)
+#define NETLED_MARK (NETLED_ID % 16)
+//char g_mqtt_send_payload[] = "hello mqtt_test!!!";
+
+#define QMSG_ID_BASE               (0x160) 
+#define QMSG_ID_NW_IPV4_READY      (QMSG_ID_BASE)
+#define QMSG_ID_NW_IPV6_READY      (QMSG_ID_BASE + 1)
+#define QMSG_ID_NW_IPV4_6_READY    (QMSG_ID_BASE + 2)
+#define QMSG_ID_NW_DISCONNECT      (QMSG_ID_BASE + 3)
+#define QMSG_ID_SOCK_SENDPKG       (QMSG_ID_BASE + 4)
+#define QMSG_ID_SOCK_RECVPKG       (QMSG_ID_BASE + 5)
+
+
+#define APP_EVENT_QUEUE_SIZE    (10)
+static QueueHandle_t            psEventQueueHandle;
+static QueueHandle_t            psMqttPubQueue;
+
+int mqtt_uplink(void* payload, size_t len, int qos, int retained);
+
+static void sendQueueMsg(UINT32 msgId, UINT32 xTickstoWait){
+    eventCallbackMessage_t *queueMsg = NULL;
+    queueMsg = malloc(sizeof(eventCallbackMessage_t));
+    queueMsg->messageId = msgId;
+    if (psEventQueueHandle){
+        if (pdTRUE != xQueueSend(psEventQueueHandle, &queueMsg, xTickstoWait)){
+            DBG("xQueueSend error");
+        }
+    }
+}
+
+static INT32 mqttPSUrcCallback(PsEventID eventID, void *param, UINT32 paramLen){
+    CmiSimImsiStr *imsi = NULL;
+    CmiPsCeregInd *creg = NULL;
+    UINT8 rssi = 0;
+    NmAtiNetInfoInd *netif = NULL;
+
+    switch(eventID){
+        case PS_URC_ID_SIM_READY:{
+            imsi = (CmiSimImsiStr *)param;
+            DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
+            break;
+        }
+        case PS_URC_ID_MM_SIGQ:{
+            CmiMmCesqInd *pMmCesqInd = (CmiMmCesqInd *)param;
+            rssi = mmGetCsqRssiFromCesq(pMmCesqInd->rsrp, pMmCesqInd->rsrq, pMmCesqInd->rssiCompensation);
+            DBG("RSSI signal=%d", rssi);
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_ACTED:{
+            DBG("Default bearer activated");
+            break;
+        }
+        case PS_URC_ID_PS_BEARER_DEACTED:{
+            DBG("Default bearer Deactivated");
+            sendQueueMsg(QMSG_ID_NW_DISCONNECT, 0);
+            break;
+        }
+        case PS_URC_ID_PS_CEREG_CHANGED:{
+            creg = (CmiPsCeregInd *)param;
+            DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
+            break;
+        }
+        case PS_URC_ID_PS_NETINFO:{
+            netif = (NmAtiNetInfoInd *)param;
+            if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED){
+                DBG("netif acivated");
+                sendQueueMsg(QMSG_ID_NW_IPV4_READY, 0);
+            }else if (netif->netifInfo.netStatus == NM_NETIF_OOS){
+                DBG("PSIF network OOS");
+            }else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED ||
+                     netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL){
+                DBG("PSIF network deactive");
+            }
+            break;
+        }
+        default:
+            break;
+    }
+    return 0;
+}
+
+// 下行信息处理函数
+void messageArrived(MessageData* data)
+{
+    cJSON* dtop = NULL;
+    cJSON* utop = cJSON_CreateObject();
+    char* payload = data->message->payload;
+    size_t payloadlen = data->message->payloadlen;
+	DBG("mqtt Message arrived on topic %.*s: %.*s\n", data->topicName->lenstring.len, data->topicName->lenstring.data,
+		data->message->payloadlen, data->message->payload);
+    if (data->message->payloadlen < 2) {
+        return;
+    }
+    if (payload[0] == '{' && payload[payloadlen - 1] == '}') {
+        // 是json数据, 开始处理
+        dtop = cJSON_ParseWithLength(payload, payloadlen);
+        if (dtop != NULL) {
+            // 最基本的命令, netled 控制
+            cJSON* netled = cJSON_GetObjectItem(dtop, "netled");
+            if (netled != NULL) {
+                if (netled->type == cJSON_False) {
+                    DBG("NETLED Off");
+                    GPIO_pinWrite(NETLED_PAD, 1 << NETLED_MARK , 0);
+                    cJSON_AddBoolToObject(utop, "netled", 0);
+                }
+                else if (netled->type == cJSON_True) {
+                    DBG("NETLED On");
+                    GPIO_pinWrite(NETLED_PAD, 1 << NETLED_MARK, 1 << NETLED_MARK);
+                    cJSON_AddBoolToObject(utop, "netled", 1);
+                }
+            }
+
+            // TODO 进阶gpio控制
+
+            // TODO uart透传,考虑演示一下
+
+            // ADC 读取, 演示一下
+
+            // PWM 输出, 演示一下
+
+            // 结束处理.
+        }
+    }
+
+    // cJSON的数据可不会自动回收,要注意清理
+    if (dtop != NULL) {
+        cJSON_Delete(dtop);
+    }
+
+    // Print返回的数据也需要清理的
+    char* resp = cJSON_Print(utop);
+    if (resp) {
+        DBG("mqtt resp %s", resp);
+        mqtt_uplink(resp, strlen(resp), 1, 0);
+        cJSON_free(resp);
+    }
+}
+
+// 上行数据, 中断函数不可调用
+int mqtt_uplink(void* payload, size_t len, int qos, int retained) {
+    MQTTMessage *message = malloc(sizeof(MQTTMessage));
+    
+    message->qos = qos;
+	message->retained = retained;
+    message->payload = malloc(len);
+    if (message->payload == NULL) {
+        return -1;
+    }
+    memcpy(message->payload, payload, len);
+    message->payloadlen = len;
+    xQueueSend(psMqttPubQueue, &message, 0);
+    return 0;
+}
+
+static uint8_t mqtt_ready = 0;
+
+static void mqtt_demo(void){
+	int rc = 0;
+    MQTTClient mqttClient;
+    Network mqttNetwork = {0};
+    MQTTMessage *message;
+    char imei[20] = {0};
+
+    // TODO 支持重连
+    if (mqtt_ready) {
+        DBG("mqtt is ready");
+        return;
+    }
+    mqtt_ready = 1;
+    
+    // 获取IMEI作为识别码
+    appGetImeiNumSync(imei);
+
+    // 配置mqtt各种参数
+    // TODO 换成合宙或者fdb可配置?
+    memcpy(g_mqtt_MQTT_HOST, "broker-cn.emqx.io", strlen("broker-cn.emqx.io") + 1);
+    g_mqtt_MQTT_PORT = 1883;
+    memcpy(g_mqtt_CLIENT_ID, imei, strlen(imei) + 1);
+    memcpy(g_mqtt_USERNAME, imei, strlen(imei) + 1);
+    memcpy(g_mqtt_PASSWORD, "LuatOS", strlen("LuatOS") + 1);
+
+    sprintf(g_mqtt_sub_topic, "/webled/%s/down", imei);
+    sprintf(g_mqtt_pub_topic, "/webled/%s/up", imei);
+
+    // 打印一下上下行的topic,方便调试
+    DBG("uplink %s", g_mqtt_pub_topic);
+    DBG("downlink %s", g_mqtt_sub_topic);
+
+    // 开始连接
+    MQTTPacket_connectData connectData = MQTTPacket_connectData_initializer;
+    connectData.MQTTVersion = 4;
+    connectData.clientID.cstring = g_mqtt_CLIENT_ID;
+    connectData.username.cstring = g_mqtt_USERNAME;
+    connectData.password.cstring = g_mqtt_PASSWORD;
+    connectData.keepAliveInterval = 120;
+
+    // 一直重试, 直至成功
+    while (1) {
+        DBG("mqtt connect ...");
+        rc = mqtt_connect(&mqttClient, &mqttNetwork, g_mqtt_MQTT_HOST, g_mqtt_MQTT_PORT, &connectData);
+        if (MQTTIsConnected(&mqttClient)) {
+            DBG("mqtt connect ok");
+            break;
+        }
+        DBG("mqtt connect fail, wait 10s");
+        osDelay(15*1000);
+    }
+    
+    // 连接成功了, 稍微等一下
+    osDelay(1000); // 暂时定位1秒,后续改短^_^
+
+    // 上报上线通知
+    mqtt_uplink("{\"hi\":\"LuatOS\"}", strlen("{\"hi\":\"LuatOS\"}"), 1, 0);
+
+    // 订阅下行topic. TODO 遇到过失败的情况
+    if ((rc = MQTTSubscribe(&mqttClient, g_mqtt_sub_topic, 0, messageArrived)) != 0) {
+        // 订阅失败, 其实问题挺大的
+        DBG("mqtt Return code from MQTT subscribe is %d", rc);
+    }
+
+    // 剩下的就是等着上行数据. 至于下行数据, MqttTask会处理好
+    while(1){
+        // 接收queue信息, 然后上行
+        if (xQueueReceive(psMqttPubQueue, &message, 15000)){
+            MQTTPublish(&mqttClient, g_mqtt_pub_topic, message);
+            free(message->payload);
+            free(message);
+        }
+        
+#if !defined(MQTT_TASK)
+		if ((rc = MQTTYield(&mqttClient, 1000)) != 0)
+			DBG("mqtt_demo Return code from yield is %d\n", rc);
+#endif
+        osDelay(10);
+    }
+}
+
+
+static void mqttclient_task(void *param){
+    eventCallbackMessage_t *queueItem = NULL;
+    psEventQueueHandle = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(eventCallbackMessage_t*));
+    if (psEventQueueHandle == NULL){
+        DBG("psEventQueue create error!");
+        return;
+    }
+    psMqttPubQueue = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(MQTTMessage*));
+    if (psMqttPubQueue == NULL){
+        DBG("psMqttPubQueue create error!");
+        return;
+    }
+    registerPSEventCallback(PS_GROUP_ALL_MASK, mqttPSUrcCallback);
+    while(1){
+        if (xQueueReceive(psEventQueueHandle, &queueItem, portMAX_DELAY)){
+            switch(queueItem->messageId){
+                case QMSG_ID_NW_IPV4_READY:
+                case QMSG_ID_NW_IPV6_READY:
+                case QMSG_ID_NW_IPV4_6_READY:
+					mqtt_demo();
+                    break;
+                case QMSG_ID_NW_DISCONNECT:
+                    break;
+                default:
+                    break;
+            }
+            free(queueItem);
+        }
+    }
+	vTaskDelete(NULL);
+}
+
+static void mqttclient_task_init(void){
+
+    //------------------------------------------------------
+    // netled作为开发板的唯一可视GPIO, 默认初始化之
+    slpManAONIOPowerOn();
+
+    PadConfig_t padConfig = {0};
+    PAD_getDefaultConfig(&padConfig);
+
+    padConfig.mux = PAD_MUX_ALT0;
+    PAD_setPinConfig(NETLED_ID, &padConfig);
+    PAD_setPinPullConfig(NETLED_ID, PAD_INTERNAL_PULL_DOWN);
+    GpioPinConfig_t config = {0};
+    config.pinDirection = GPIO_DIRECTION_OUTPUT;
+    config.misc.initOutput = 0;
+
+    GPIO_pinConfig(NETLED_PAD, NETLED_MARK, &config);
+    //------------------------------------------------------
+
+    // 启动mqtt任务
+	xTaskCreate(mqttclient_task, "mqtt", 4096, NULL, 20, NULL);
+}
+
+INIT_TASK_EXPORT(mqttclient_task_init, "2");
+

sdk/合宙/air780e/csdk/luatos-soc-2022/project_legacy/web_led/xmake.lua

@@ -0,0 +1,31 @@
+local TARGET_NAME = "web_led"
+local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
+local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
+
+target(TARGET_NAME)
+    local LIB_DIR = "$(buildir)/mqttclient/"
+    set_kind("static")
+    set_targetdir(LIB_DIR)
+    
+    add_defines("MQTT_TASK",{public = true})
+
+    includes(SDK_TOP .. "/thirdparty/mqtt")
+    add_deps("mqtt")
+    
+    -- --加入代码和头文件
+    add_includedirs(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src",{public = true})
+    add_files(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src/*.c",{public = true})
+    add_includedirs(SDK_TOP .. "thirdparty/cjson")
+    add_files(SDK_TOP .. "/thirdparty/cJSON/*.c",{public = true})
+
+    --加入自己代码和头文件
+    add_includedirs("/inc",{public = true})
+    add_files("/src/*.c",{public = true})
+
+    --可以继续增加add_includedirs和add_files
+
+    --自动链接
+    LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
+    
+    --甚至可以加入自己的库
+target_end()