mirror of
https://gitee.com/beecue/fastbee.git
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更新硬件SDK
This commit is contained in:
@@ -0,0 +1,350 @@
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#ifndef __RTE_DEVICE_H
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#define __RTE_DEVICE_H
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#include "ec618.h"
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/* Peripheral IO Mode Select, Must Configure First !!!
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Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
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*/
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#define POLLING_MODE 0x1
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#define DMA_MODE 0x2
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#define IRQ_MODE 0x3
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#define UNILOG_MODE 0x4
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#define RTE_UART0_TX_IO_MODE UNILOG_MODE
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#define RTE_UART0_RX_IO_MODE IRQ_MODE
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#define USART0_RX_TRIG_LVL (30)
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#define RTE_UART1_TX_IO_MODE DMA_MODE
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#define RTE_UART1_RX_IO_MODE DMA_MODE
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#define RTE_UART2_TX_IO_MODE POLLING_MODE
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#define RTE_UART2_RX_IO_MODE DMA_MODE
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#define RTE_SPI0_IO_MODE POLLING_MODE
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#define RTE_SPI1_IO_MODE POLLING_MODE
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#define RTE_I2C0_IO_MODE POLLING_MODE
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#define RTE_I2C1_IO_MODE POLLING_MODE
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// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
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// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
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#define RTE_I2C0 1
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// { PAD_PIN28}, // 0 : gpio13 / 2 : I2C0 SCL
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// { PAD_PIN27}, // 0 : gpio12 / 2 : I2C0 SDA
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#define RTE_I2C0_SCL_BIT 28 // AUDIO use 28
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#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
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#define RTE_I2C0_SDA_BIT 27 // AUDIO use 27
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#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_I2C0_DMA_TX_EN 0
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#define RTE_I2C0_DMA_TX_REQID DMA_REQUEST_I2C0_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_I2C0_DMA_RX_EN 0
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#define RTE_I2C0_DMA_RX_REQID DMA_REQUEST_I2C0_RX
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// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
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// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
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#define RTE_I2C1 1
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// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
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// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
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#define RTE_I2C1_SCL_BIT 20
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#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
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#define RTE_I2C1_SDA_BIT 19
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#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_I2C1_DMA_TX_EN 1
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#define RTE_I2C1_DMA_TX_REQID DMA_REQUEST_I2C1_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_I2C1_DMA_RX_EN 1
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#define RTE_I2C1_DMA_RX_REQID DMA_REQUEST_I2C1_RX
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// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
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// Configuration settings for Driver_USART0 in component ::Drivers:USART
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#define RTE_UART0_CTS_PIN_EN 0
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#define RTE_UART0_RTS_PIN_EN 0
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// { PAD_PIN27}, // 0 : gpio12 / 3 : UART0 RTSn
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// { PAD_PIN28}, // 0 : gpio13 / 3 : UART0 CTSn
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// { PAD_PIN29}, // 0 : gpio14 / 3 : UART0 RXD
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// { PAD_PIN30}, // 0 : gpio15 / 3 : UART0 TXD
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#define RTE_UART0_RTS_BIT 27
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#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
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#define RTE_UART0_CTS_BIT 28
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#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
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#define RTE_UART0_RX_BIT 29
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#define RTE_UART0_RX_FUNC PAD_MUX_ALT3
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#define RTE_UART0_TX_BIT 30
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#define RTE_UART0_TX_FUNC PAD_MUX_ALT3
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
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// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
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// Configuration settings for Driver_USART1 in component ::Drivers:USART
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#define RTE_UART1_CTS_PIN_EN 1
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#define RTE_UART1_RTS_PIN_EN 1
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// { PAD_PIN31}, // 0 : gpio16 / 1 : UART1 RTS
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// { PAD_PIN32}, // 0 : gpio17 / 1 : UART1 CTS
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// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
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// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
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#define RTE_UART1_RTS_BIT 31
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#define RTE_UART1_RTS_FUNC PAD_MUX_ALT1
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#define RTE_UART1_CTS_BIT 32
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#define RTE_UART1_CTS_FUNC PAD_MUX_ALT1
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#define RTE_UART1_RX_BIT 33
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#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
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#define RTE_UART1_TX_BIT 34
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#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
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// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
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// Configuration settings for Driver_USART2 in component ::Drivers:USART
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#define RTE_UART2_CTS_PIN_EN 0
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#define RTE_UART2_RTS_PIN_EN 0
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// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
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// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
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#define RTE_UART2_RX_BIT 25
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#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
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#define RTE_UART2_TX_BIT 26
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#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
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// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
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// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
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#define RTE_SPI0 1
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// { PAD_PIN21}, // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
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// { PAD_PIN22}, // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
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// { PAD_PIN23}, // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
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// { PAD_PIN24}, // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
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#define RTE_SPI0_SSN_BIT 21
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#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT2
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#define RTE_SPI0_MOSI_BIT 22
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#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT2
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#define RTE_SPI0_MISO_BIT 23
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#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT2
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#define RTE_SPI0_SCLK_BIT 24
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#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT2
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#define RTE_SPI0_SSN_GPIO_INSTANCE 1
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#define RTE_SPI0_SSN_GPIO_INDEX 0
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
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// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
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// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
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#define RTE_SPI1 1
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// { PAD_PIN13}, // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
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// { PAD_PIN14}, // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
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// { PAD_PIN15}, // 0 : gpio4 / 1 : UART0 RXD / 3 : SPI1 MISO
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// { PAD_PIN16}, // 0 : gpio5 / 1 : UART0 TXD / 3 : SPI1 SCLK
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#define RTE_SPI1_SSN_BIT 13
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#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT3
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#define RTE_SPI1_MOSI_BIT 14
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#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT3
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#define RTE_SPI1_MISO_BIT 15
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#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT3
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#define RTE_SPI1_SCLK_BIT 16
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#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT3
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#define RTE_SPI1_SSN_GPIO_INSTANCE 0
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#define RTE_SPI1_SSN_GPIO_INDEX 2
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// DMA
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// Tx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
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// Rx
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// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
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#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
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// PWM0 Controller [Driver_PWM0]
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// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
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#define RTE_PWM 1
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#define EFUSE_INIT_MODE POLLING_MODE
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#define L2CTLS_INIT_MODE POLLING_MODE
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#define FLASH_BARE_RW_MODE 1
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#define RTE_UART0 1
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#define RTE_UART1 1
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#define RTE_UART2 1
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/* to enable external thermal */
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#define EXTERNAL_NTC_EXIST 0
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#if (RTE_UART1 == 1)
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#define UART1_DTR_PAD_INDEX 26 // GPIO11
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#define UART1_DTR_GPIO_INSTANCE 0
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#define UART1_DTR_GPIO_PIN 11
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#define UART1_RI_PAD_INDEX 44 // AONIO 4 = GPIO24
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#define UART1_RI_GPIO_INSTANCE 1
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#define UART1_RI_GPIO_PIN 8
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#define UART1_RI_PWM_INSTANCE 1
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#define UART1_RI_PWM_CLK_ID FCLK_TIMER1
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#define UART1_RI_PWM_CLK_SEL FCLK_TIMER1_SEL_26M
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#define UART1_DCD_PAD_INDEX 45 // AONIO 5 = GPIO25
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#define UART1_DCD_GPIO_INSTANCE 1
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#define UART1_DCD_GPIO_PIN 9
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#endif
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#if (RTE_UART2 == 1)
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#define UART2_DTR_PAD_INDEX 25 // GPIO10
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#define UART2_DTR_GPIO_INSTANCE 0
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#define UART2_DTR_GPIO_PIN 10
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#define UART2_RI_PAD_INDEX 43 // AONIO 3 = GPIO23
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#define UART2_RI_GPIO_INSTANCE 1
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#define UART2_RI_GPIO_PIN 7
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#define UART2_RI_PWM_INSTANCE 0
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#define UART2_RI_PWM_CLK_ID FCLK_TIMER0
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#define UART2_RI_PWM_CLK_SEL FCLK_TIMER0_SEL_26M
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#define UART2_DCD_PAD_INDEX 47 // AONIO 7 = GPIO27
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#define UART2_DCD_GPIO_INSTANCE 1
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#define UART2_DCD_GPIO_PIN 11
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#endif
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#define NETLIGHT_PAD_INDEX 46 // AONIO 6 = GPIO26
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#define NETLIGHT_PAD_ALT_FUNC PAD_MUX_ALT5
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#define NETLIGHT_PWM_INSTANCE 3
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//USIM1 OPTION1
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#define USIM1_URST_OP1_PAD_INDEX 19 // GPIO4
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#define USIM1_URST_OP1_GPIO_INSTANCE 0
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#define USIM1_URST_OP1_GPIO_PIN 4
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#define USIM1_UCLK_OP1_PAD_INDEX 20 // GPIO5
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#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
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#define USIM1_UCLK_OP1_GPIO_PIN 5
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#define USIM1_UIO_OP1_PAD_INDEX 21 // GPIO6
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#define USIM1_UIO_OP1_GPIO_INSTANCE 0
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#define USIM1_UIO_OP1_GPIO_PIN 6
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//USIM1 OPTION2
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#define USIM1_UIO_OP2_PAD_INDEX 27 // GPIO12
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#define USIM1_UIO_OP2_GPIO_INSTANCE 0
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#define USIM1_UIO_OP2_GPIO_PIN 12
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#define USIM1_URST_OP2_PAD_INDEX 28 // GPIO13
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#define USIM1_URST_OP2_GPIO_INSTANCE 0
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#define USIM1_URST_OP2_GPIO_PIN 13
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#define USIM1_UCLK_OP2_PAD_INDEX 29 // GPIO14
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#define USIM1_UCLK_OP2_GPIO_INSTANCE 0
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#define USIM1_UCLK_OP2_GPIO_PIN 14
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//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
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#define AONIO_6_PAD_INDEX 46 // AONIO 6 = GPIO26
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#define AONIO_6_GPIO_INSTANCE 1
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#define AONIO_6_GPIO_PIN 10
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#define RTE_CSPI0 0
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#define RTE_CSPI0_MCLK_PAD_ADDR 39
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#define RTE_CSPI0_MCLK_FUNC PAD_MUX_ALT1
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#define RTE_CSPI0_PCLK_PAD_ADDR 35
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#define RTE_CSPI0_PCLK_FUNC PAD_MUX_ALT1
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#define RTE_CSPI0_CS_PAD_ADDR 36
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#define RTE_CSPI0_CS_FUNC PAD_MUX_ALT1
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#define RTE_CSPI0_SDO0_PAD_ADDR 37
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#define RTE_CSPI0_SDO0_FUNC PAD_MUX_ALT1
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#define RTE_CSPI0_SDO1_PAD_ADDR 38
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#define RTE_CSPI0_SDO1_FUNC PAD_MUX_ALT1
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// DMA CSPI0 Request ID
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#define RTE_CSPI0_DMA_RX_REQID DMA_REQUEST_I2S0_RX
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// CSPI1 Configuration
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#define RTE_CSPI1 1
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#define RTE_CSPI1_MCLK_PAD_ADDR 18
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#define RTE_CSPI1_MCLK_FUNC PAD_MUX_ALT1
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#define RTE_CSPI1_PCLK_PAD_ADDR 19
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#define RTE_CSPI1_PCLK_FUNC PAD_MUX_ALT1
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#define RTE_CSPI1_CS_PAD_ADDR 20
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#define RTE_CSPI1_CS_FUNC PAD_MUX_ALT1
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#define RTE_CSPI1_SDO0_PAD_ADDR 21
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#define RTE_CSPI1_SDO0_FUNC PAD_MUX_ALT1
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#define RTE_CSPI1_SDO1_PAD_ADDR 22
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#define RTE_CSPI1_SDO1_FUNC PAD_MUX_ALT1
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// DMA CSPI1 Request ID
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#define RTE_CSPI1_DMA_RX_REQID DMA_REQUEST_I2S1_RX
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#endif /* __RTE_DEVICE_H */
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@@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2022 OpenLuat & AirM2M
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||||
*
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||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*/
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#ifndef __EXAMPLE_MAIN_H__
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#define __EXAMPLE_MAIN_H__
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#define GET_GPIO_PORT(gpioId) (gpioId/16)
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#define GET_GPIO_PIN(gpioId) (gpioId%16)
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#define LED_GPIO_ADDR 40
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#define LED_GPIO_PORT 1
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#define LED_GPIO_PIN 4
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typedef struct
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{
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uint8_t gpioId;
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uint8_t pinAddr;
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PadMux_e mux;
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PadPullUp_e pullUpEnable;
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PadPullDown_e pullDownEnable;
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} GpioPinMap_t;
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#endif
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@@ -0,0 +1,246 @@
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/*
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* Copyright (c) 2022 OpenLuat & AirM2M
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "common_api.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "slpman.h"
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#include "pad.h"
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#include "gpio.h"
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#include "example_main.h"
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//1:IDLE模式下,GPIO输出、输入、中断测试
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//2:自动SLEEP1模式下,以AGPIOWU0(GPIO20)为例,演示如何在SLEEP1以及唤醒状态下,以最低功耗的方式,控制指示灯的闪烁
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static uint8_t sTestMode = 1;
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static bool sLedGpioHigh = false;
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static GpioPinMap_t allGpioMap[] =
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{
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{0, 15, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{1, 16, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{2, 17, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{3, 18, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{4, 19, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{5, 20, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{6, 21, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{7, 22, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{8, 23, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{9, 24, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{10, 25, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{11, 26, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{12, 11, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{13, 12, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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// {14, 13, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //一直为高电平3.3V,此脚被uart0 tx输出日志占用,因为二次开发休眠状态下必须预留一路uart用来输出日志,所以此处不再调试GPIO功能
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// {15, 14, PAD_MUX_ALT4, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //一直为高电平3.3V,此脚被uart0 rx输出日志占用,因为二次开发休眠状态下必须预留一路uart用来输出日志,所以此处不再调试GPIO功能
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{16, 31, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{17, 32, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{18, 33, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{19, 34, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{20, 40, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //外接指示灯,输出高时异常只有2.0V,输出低时正常为0V;断开指示灯和电阻,输出高时3.3V正常,输出低时0V正常;
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{21, 41, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{22, 42, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //外接按键,输出高时正常3.3V,输出低时异常为2.0V;断开按键和电阻,输出高时3.3V正常,输出低时0V正常;
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// {23, 43, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE}, //Air600E没有引出
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{24, 44, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{25, 45, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{26, 46, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{27, 47, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{28, 48, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{29, 35, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{30, 36, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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{31, 37, PAD_MUX_ALT0, PAD_PULL_UP_DISABLE, PAD_PULL_DOWN_DISABLE},
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};
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void before_sleep(void *pdata, slpManLpState state)
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{
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DBG("entry");
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slpManAONIOLatchEn(true);
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}
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void after_sleep(void *pdata, slpManLpState state)
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{
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DBG("entry");
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PadConfig_t padConfig;
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PAD_getDefaultConfig(&padConfig);
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padConfig.mux = PAD_MUX_ALT0;
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PAD_setPinConfig(LED_GPIO_ADDR, &padConfig);
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// LED pin config
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GpioPinConfig_t config;
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config.pinDirection = GPIO_DIRECTION_OUTPUT;
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config.misc.initOutput = sLedGpioHigh ? 1 : 0;
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GPIO_pinConfig(LED_GPIO_PORT, LED_GPIO_PIN, &config);
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}
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static void task_gpio_test(void *param)
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{
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uint8_t i = 0;
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DBG("enter");
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while(1)
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{
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//IDLE模式下,GPIO输出、输入、中断测试
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if (1 == sTestMode)
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{
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slpManSetPmuSleepMode(true, SLP_IDLE_STATE, false);
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while(1)
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{
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for (i=0; i<sizeof(allGpioMap)/sizeof(allGpioMap[0]); i++)
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{
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GPIO_pinWrite(GET_GPIO_PORT(allGpioMap[i].gpioId), 1 << GET_GPIO_PIN(allGpioMap[i].gpioId), 1 << GET_GPIO_PIN(allGpioMap[i].gpioId));
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}
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DBG("high");
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vTaskDelay(1000);
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for (i=0; i<sizeof(allGpioMap)/sizeof(allGpioMap[0]); i++)
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{
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GPIO_pinWrite(GET_GPIO_PORT(allGpioMap[i].gpioId), 1 << GET_GPIO_PIN(allGpioMap[i].gpioId), 0);
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}
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DBG("low");
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vTaskDelay(1000);
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}
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}
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else if (2 == sTestMode)
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{
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uint8_t slpmanLedHandler = 0xff;
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slpManRet_t ret;
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GpioPinConfig_t gpio_config;
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slpManRegisterUsrdefinedBackupCb(before_sleep, NULL);
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slpManRegisterUsrdefinedRestoreCb(after_sleep, NULL);
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slpManSetPmuSleepMode(true, SLP_SLP1_STATE, false);
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slpManAONIOLatchEn(true);
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slpManApplyPlatVoteHandle("ledSLP1Vote",&slpmanLedHandler);
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uint32_t startTick;
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//AGPIOWU0(GPIO20)控制指示灯,亮1秒,灭1秒
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while(1)
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{
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ret = slpManPlatVoteDisableSleep(slpmanLedHandler, SLP_SLP1_STATE);
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EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
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gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
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gpio_config.misc.initOutput = 1;
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GPIO_pinConfig(LED_GPIO_PORT, LED_GPIO_PIN, &gpio_config);
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sLedGpioHigh = true;
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ret = slpManPlatVoteEnableSleep(slpmanLedHandler, SLP_SLP1_STATE);
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EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
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startTick = xTaskGetTickCount();
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vTaskDelay(1000);
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DBG("retain high tick %d",xTaskGetTickCount()-startTick);
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ret = slpManPlatVoteDisableSleep(slpmanLedHandler, SLP_SLP1_STATE);
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EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
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gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
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gpio_config.misc.initOutput = 0;
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GPIO_pinConfig(LED_GPIO_PORT, LED_GPIO_PIN, &gpio_config);
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sLedGpioHigh = false;
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ret = slpManPlatVoteEnableSleep(slpmanLedHandler, SLP_SLP1_STATE);
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EC_ASSERT(ret == RET_TRUE, ret, 0, 0);
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startTick = xTaskGetTickCount();
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vTaskDelay(1000);
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DBG("retain low tick %d",xTaskGetTickCount()-startTick);
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}
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}
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}
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}
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static void task_gpio_test_init(void)
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{
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xTaskCreate(task_gpio_test, "task_gpio_test", 256, NULL, 20, NULL);
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}
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static void all_gpio_init_output(bool wakeup)
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{
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if (!wakeup)
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{
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*(uint32_t *)0x4D020170 = 0x1;
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slpManAONIOPowerOn();
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slpManAONIOVoltSet(IOVOLT_3_30V);
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slpManNormalIOVoltSet(IOVOLT_3_30V);
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}
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PadConfig_t pad_config;
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GpioPinConfig_t gpio_config;
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PAD_getDefaultConfig(&pad_config);
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uint8_t i = 0;
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for (i=0; i<sizeof(allGpioMap)/sizeof(allGpioMap[0]); i++)
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{
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pad_config.mux = allGpioMap[i].mux;
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pad_config.pullUpEnable = allGpioMap[i].pullUpEnable;
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pad_config.pullDownEnable = allGpioMap[i].pullDownEnable;
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PAD_setPinConfig(allGpioMap[i].pinAddr, &pad_config);
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gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
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gpio_config.misc.initOutput = 0;
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GPIO_pinConfig(GET_GPIO_PORT(allGpioMap[i].gpioId), GET_GPIO_PIN(allGpioMap[i].gpioId), &gpio_config);
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}
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}
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void wakeup_pad_init(void)
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{
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APmuWakeupPadSettings_t wakeupPadSetting;
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wakeupPadSetting.negEdgeEn = false;
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wakeupPadSetting.posEdgeEn = false;
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wakeupPadSetting.pullDownEn = false;
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wakeupPadSetting.pullUpEn = false;
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apmuSetWakeupPadCfg(WAKEUP_PAD_3, false, &wakeupPadSetting);
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apmuSetWakeupPadCfg(WAKEUP_PAD_4, false, &wakeupPadSetting);
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apmuSetWakeupPadCfg(WAKEUP_PAD_5, false, &wakeupPadSetting);
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NVIC_DisableIRQ(PadWakeup3_IRQn);
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NVIC_DisableIRQ(PadWakeup4_IRQn);
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NVIC_DisableIRQ(PadWakeup5_IRQn);
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}
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static void gpio_init(void)
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{
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wakeup_pad_init();
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all_gpio_init_output(false);
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}
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//启动gpio_init,启动位置硬件初始1级
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INIT_HW_EXPORT(gpio_init, "1");
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//启动task_gpio_test,启动位置任务2级
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INIT_TASK_EXPORT(task_gpio_test_init, "2");
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@@ -0,0 +1,21 @@
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local TARGET_NAME = "example_gpio"
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local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
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local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
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target(TARGET_NAME)
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set_kind("static")
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set_targetdir(LIB_DIR)
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--加入代码和头文件
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add_includedirs("/inc",{public = true})
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add_files("/src/*.c",{public = true})
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--路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
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-- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
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-- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
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--可以继续增加add_includedirs和add_files
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--自动链接
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LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
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--甚至可以加入自己的库
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target_end()
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Reference in New Issue
Block a user