更新硬件SDK

This commit is contained in:
kerwincui
2023-03-04 03:44:56 +08:00
parent dcdf6e1b7c
commit e39d3d2f03
1900 changed files with 663153 additions and 0 deletions

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#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
#include "ec618.h"
/* Peripheral IO Mode Select, Must Configure First !!!
Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
*/
#define POLLING_MODE 0x1
#define DMA_MODE 0x2
#define IRQ_MODE 0x3
#define UNILOG_MODE 0x4
#define RTE_UART0_TX_IO_MODE UNILOG_MODE
#define RTE_UART0_RX_IO_MODE IRQ_MODE
#define USART0_RX_TRIG_LVL (30)
#define RTE_UART1_TX_IO_MODE DMA_MODE
#define RTE_UART1_RX_IO_MODE DMA_MODE
#define RTE_UART2_TX_IO_MODE POLLING_MODE
#define RTE_UART2_RX_IO_MODE DMA_MODE
#define RTE_SPI0_IO_MODE POLLING_MODE
#define RTE_SPI1_IO_MODE POLLING_MODE
#define RTE_I2C0_IO_MODE POLLING_MODE
#define RTE_I2C1_IO_MODE POLLING_MODE
// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
#define RTE_I2C0 1
// { PAD_PIN28}, // 0 : gpio13 / 2 : I2C0 SCL
// { PAD_PIN27}, // 0 : gpio12 / 2 : I2C0 SDA
#define RTE_I2C0_SCL_BIT 28 // AUDIO use 28
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 27 // AUDIO use 27
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C0_DMA_TX_EN 0
#define RTE_I2C0_DMA_TX_REQID DMA_REQUEST_I2C0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C0_DMA_RX_EN 0
#define RTE_I2C0_DMA_RX_REQID DMA_REQUEST_I2C0_RX
// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
#define RTE_I2C1 1
// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
#define RTE_I2C1_SCL_BIT 20
#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C1_SDA_BIT 19
#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C1_DMA_TX_EN 1
#define RTE_I2C1_DMA_TX_REQID DMA_REQUEST_I2C1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C1_DMA_RX_EN 1
#define RTE_I2C1_DMA_RX_REQID DMA_REQUEST_I2C1_RX
// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
// Configuration settings for Driver_USART0 in component ::Drivers:USART
#define RTE_UART0_CTS_PIN_EN 0
#define RTE_UART0_RTS_PIN_EN 0
// { PAD_PIN27}, // 0 : gpio12 / 3 : UART0 RTSn
// { PAD_PIN28}, // 0 : gpio13 / 3 : UART0 CTSn
// { PAD_PIN29}, // 0 : gpio14 / 3 : UART0 RXD
// { PAD_PIN30}, // 0 : gpio15 / 3 : UART0 TXD
#define RTE_UART0_RTS_BIT 27
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_CTS_BIT 28
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_RX_BIT 29
#define RTE_UART0_RX_FUNC PAD_MUX_ALT3
#define RTE_UART0_TX_BIT 30
#define RTE_UART0_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
// Configuration settings for Driver_USART1 in component ::Drivers:USART
#define RTE_UART1_CTS_PIN_EN 1
#define RTE_UART1_RTS_PIN_EN 1
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART1 RTS
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART1 CTS
// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 31
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT1
#define RTE_UART1_CTS_BIT 32
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT1
#define RTE_UART1_RX_BIT 33
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 34
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
// Configuration settings for Driver_USART2 in component ::Drivers:USART
#define RTE_UART2_CTS_PIN_EN 0
#define RTE_UART2_RTS_PIN_EN 0
// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
#define RTE_UART2_RX_BIT 25
#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
#define RTE_UART2_TX_BIT 26
#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
#define RTE_SPI0 1
// { PAD_PIN21}, // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
// { PAD_PIN22}, // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
// { PAD_PIN23}, // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
// { PAD_PIN24}, // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
#define RTE_SPI0_SSN_BIT 21
#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT2
#define RTE_SPI0_MOSI_BIT 22
#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT2
#define RTE_SPI0_MISO_BIT 23
#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT2
#define RTE_SPI0_SCLK_BIT 24
#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT2
#define RTE_SPI0_SSN_GPIO_INSTANCE 1
#define RTE_SPI0_SSN_GPIO_INDEX 0
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
#define RTE_SPI1 1
// { PAD_PIN13}, // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
// { PAD_PIN14}, // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
// { PAD_PIN15}, // 0 : gpio4 / 1 : UART0 RXD / 3 : SPI1 MISO
// { PAD_PIN16}, // 0 : gpio5 / 1 : UART0 TXD / 3 : SPI1 SCLK
#define RTE_SPI1_SSN_BIT 13
#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT3
#define RTE_SPI1_MOSI_BIT 14
#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT3
#define RTE_SPI1_MISO_BIT 15
#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT3
#define RTE_SPI1_SCLK_BIT 16
#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT3
#define RTE_SPI1_SSN_GPIO_INSTANCE 0
#define RTE_SPI1_SSN_GPIO_INDEX 2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
// PWM0 Controller [Driver_PWM0]
// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
#define RTE_PWM 1
#define EFUSE_INIT_MODE POLLING_MODE
#define L2CTLS_INIT_MODE POLLING_MODE
#define FLASH_BARE_RW_MODE 1
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1
/* to enable external thermal */
#define EXTERNAL_NTC_EXIST 0
#if (RTE_UART1 == 1)
#define UART1_DTR_PAD_INDEX 26 // GPIO11
#define UART1_DTR_GPIO_INSTANCE 0
#define UART1_DTR_GPIO_PIN 11
#define UART1_RI_PAD_INDEX 44 // AONIO 4 = GPIO24
#define UART1_RI_GPIO_INSTANCE 1
#define UART1_RI_GPIO_PIN 8
#define UART1_RI_PWM_INSTANCE 1
#define UART1_RI_PWM_CLK_ID FCLK_TIMER1
#define UART1_RI_PWM_CLK_SEL FCLK_TIMER1_SEL_26M
#define UART1_DCD_PAD_INDEX 45 // AONIO 5 = GPIO25
#define UART1_DCD_GPIO_INSTANCE 1
#define UART1_DCD_GPIO_PIN 9
#endif
#if (RTE_UART2 == 1)
#define UART2_DTR_PAD_INDEX 25 // GPIO10
#define UART2_DTR_GPIO_INSTANCE 0
#define UART2_DTR_GPIO_PIN 10
#define UART2_RI_PAD_INDEX 43 // AONIO 3 = GPIO23
#define UART2_RI_GPIO_INSTANCE 1
#define UART2_RI_GPIO_PIN 7
#define UART2_RI_PWM_INSTANCE 0
#define UART2_RI_PWM_CLK_ID FCLK_TIMER0
#define UART2_RI_PWM_CLK_SEL FCLK_TIMER0_SEL_26M
#define UART2_DCD_PAD_INDEX 47 // AONIO 7 = GPIO27
#define UART2_DCD_GPIO_INSTANCE 1
#define UART2_DCD_GPIO_PIN 11
#endif
#define NETLIGHT_PAD_INDEX 46 // AONIO 6 = GPIO26
#define NETLIGHT_PAD_ALT_FUNC PAD_MUX_ALT5
#define NETLIGHT_PWM_INSTANCE 3
//USIM1 OPTION1
#define USIM1_URST_OP1_PAD_INDEX 19 // GPIO4
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 4
#define USIM1_UCLK_OP1_PAD_INDEX 20 // GPIO5
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 5
#define USIM1_UIO_OP1_PAD_INDEX 21 // GPIO6
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 6
//USIM1 OPTION2
#define USIM1_UIO_OP2_PAD_INDEX 27 // GPIO12
#define USIM1_UIO_OP2_GPIO_INSTANCE 0
#define USIM1_UIO_OP2_GPIO_PIN 12
#define USIM1_URST_OP2_PAD_INDEX 28 // GPIO13
#define USIM1_URST_OP2_GPIO_INSTANCE 0
#define USIM1_URST_OP2_GPIO_PIN 13
#define USIM1_UCLK_OP2_PAD_INDEX 29 // GPIO14
#define USIM1_UCLK_OP2_GPIO_INSTANCE 0
#define USIM1_UCLK_OP2_GPIO_PIN 14
//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
#define AONIO_6_PAD_INDEX 46 // AONIO 6 = GPIO26
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 10
#define RTE_CSPI0 0
#define RTE_CSPI0_MCLK_PAD_ADDR 39
#define RTE_CSPI0_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_PCLK_PAD_ADDR 35
#define RTE_CSPI0_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_CS_PAD_ADDR 36
#define RTE_CSPI0_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_SDO0_PAD_ADDR 37
#define RTE_CSPI0_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_SDO1_PAD_ADDR 38
#define RTE_CSPI0_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI0 Request ID
#define RTE_CSPI0_DMA_RX_REQID DMA_REQUEST_I2S0_RX
// CSPI1 Configuration
#define RTE_CSPI1 1
#define RTE_CSPI1_MCLK_PAD_ADDR 18
#define RTE_CSPI1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_PCLK_PAD_ADDR 19
#define RTE_CSPI1_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_CS_PAD_ADDR 20
#define RTE_CSPI1_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO0_PAD_ADDR 21
#define RTE_CSPI1_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO1_PAD_ADDR 22
#define RTE_CSPI1_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI1 Request ID
#define RTE_CSPI1_DMA_RX_REQID DMA_REQUEST_I2S1_RX
#endif /* __RTE_DEVICE_H */

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#ifndef _YULABAYANSHI_H
#define _UNLABAYANSHI_H
#include "string.h"
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
#include "timers.h"
#include "bsp.h"
#include "bsp_custom.h"
#include "common_api.h"
#include "portmacro.h"
#include "audio_play.h"
#include "ivTTS.h"
#include "ostask.h"
#include "ps_event_callback.h"
#include "ps_lib_api.h"
#include "cmisim.h"
#include "cmips.h"
#include "slpman.h"
#include "gpio.h"
#include "pad.h"
#define WAIT_PLAY_FLAG (0x1)
#include DEBUG_LOG_HEADER_FILE
#include "plat_config.h"
#include "audio_play.h"
#include "audio_ll_drv.h"
#include "osasys.h"
#include "version.h"
#include "ivTTS.h"
#include "MQTTClient.h"
#include "HTTPClient.h"
#define HOST "lbsmqtt.airm2m.com"
#define PORT 1883
#define client_id "60561eae30594a88bd432627a36240d9"
#define User "username"
#define Password "password"
#include "osasys.h"
typedef struct
{
uint32_t priority;
uint32_t playType;
union
{
struct
{
char *data;
uint8_t len;
} tts;
struct
{
audio_play_info_t *info;
uint8_t count;
} file;
} message;
void * userParam;
} audioQueueData;
typedef enum
{
MONEY_PLAY = 0,
PAD_PLAY,
SYS_PLAY
} AUDIO_PLAY_PRIORITY;
typedef enum
{
TTS_PLAY = 0,
FILE_PLAY,
} AUDI;
#endif

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/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "yulabayanshi.h"
char mqtt_subTopic[40];
static char subTopic[]="test20220929/";
static HttpClientContext AirM2mhttpClient;
static QueueHandle_t networkQue;
#define HTTP_RECV_BUF_SIZE (1501)
#define HTTP_HEAD_BUF_SIZE (800)
#define QMSG_ID_BASE (0x160)
#define QMSG_ID_NW_IPV4_READY (QMSG_ID_BASE)
#define QMSG_ID_NW_IPV6_READY (QMSG_ID_BASE + 1)
#define QMSG_ID_NW_IPV4_6_READY (QMSG_ID_BASE + 2)
#define QMSG_ID_NW_DISCONNECT (QMSG_ID_BASE + 3)
#define QMSG_ID_SOCK_SENDPKG (QMSG_ID_BASE + 4)
#define QMSG_ID_SOCK_RECVPKG (QMSG_ID_BASE + 5)
/*-------------------------------------------------audio define-----------------------------------------------*/
extern const unsigned char audiopoweron[];
extern const int poweron_count;
static osEventFlagsId_t waitAudioPlayDone = NULL;
QueueHandle_t audioQueueHandle = NULL;
static uint8_t audio_sleep_handler = 0xff;
static TimerHandle_t delay_timer;
/*-------------------------------------------------audio define-----------------------------------------------*/
/*-------------------------------------------------FILE-----------------------------------------------*/
#define FILE_NAME "audio.amr"
#define FILE_NAME_SIZE (20)
static void http_audio_File(void *buf, UINT32 BUFF_SIZE)
{
OsaFremove(FILE_NAME);
OSAFILE fp = OsaFopen(FILE_NAME, "wb+");
if (fp == NULL)
{
DBG("open file for write, failed");
return;
}
uint32_t ret = OsaFwrite(buf, BUFF_SIZE, 1, fp);
if (ret != 1)
{
DBG("fail to write, excpt 1 but %d", BUFF_SIZE, ret);
}
OsaFclose(fp);
return;
}
/*-------------------------------------------------FILE-----------------------------------------------*/
/*------------------------------------------------audio-----------------------------------------------*/
void audio_data_cb(uint8_t *data, uint32_t len, uint8_t bits, uint8_t channels)
{
//这里可以对音频数据进行软件音量缩放,或者直接清空来静音
//软件音量缩放参考HAL_I2sSrcAdjustVolumn
// int value = 1;
// int ret = am_kv_get("volume", &value, 1);
// if(ret > 0)
// {
// DBG("AUDIO GET VOLUME SUCCESS %d", value);
// HAL_I2sSrcAdjustVolumn(data, len, value);
// }
// else
// {
// DBG("AUDIO GET VOLUME FAIL %d", value);
// HAL_I2sSrcAdjustVolumn(data, len, 1);
// }
DBG("%x,%d,%d,%d", data, len, bits, channels);
}
void app_pa_on(uint32_t arg)
{
GPIO_pinWrite(1, 1 << 9, 1 << 9);
}
void audio_event_cb(uint32_t event, void *param)
{
// PadConfig_t pad_config;
// GpioPinConfig_t gpio_config;
uint8_t status = usb_portmon_vbuspad_level();
DBG("%d", event);
switch (event)
{
case MULTIMEDIA_CB_AUDIO_DECODE_START:
slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP1_STATE);
GPIO_pinWrite(0, 1 << 12, 1 << 12);
audio_play_write_blank_raw(0, 6);
break;
case MULTIMEDIA_CB_AUDIO_OUTPUT_START:
xTimerStart(delay_timer, 200);
break;
case MULTIMEDIA_CB_TTS_INIT:
if (4 == sizeof("你好"))
{
audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_GBK);
}
else
{
audio_play_tts_set_param(0, ivTTS_PARAM_INPUT_CODEPAGE, ivTTS_CODEPAGE_UTF8);
}
break;
case MULTIMEDIA_CB_AUDIO_DONE:
xTimerStop(delay_timer, 0);
DBG("audio play done!");
GPIO_pinWrite(1, 1 << 9, 0);
GPIO_pinWrite(0, 1 << 12, 0);
slpManPlatVoteEnableSleep(audio_sleep_handler, SLP_SLP1_STATE);
osEventFlagsSet(waitAudioPlayDone, WAIT_PLAY_FLAG);
break;
}
}
void audio_task(void *param)
{
audioQueueData audioQueueRecv = {0};
uint32_t result = 0;
while (1)
{
if (xQueueReceive(audioQueueHandle, &audioQueueRecv, portMAX_DELAY))
{
// audio_play_tts_text(0, audioQueueRecv.data, sizeof(audioQueueRecv.data));
DBG("this is play priority %d", audioQueueRecv.priority);
DBG("this is play playType %d", audioQueueRecv.playType);
if (audioQueueRecv.priority == MONEY_PLAY)
{
if (audioQueueRecv.playType == TTS_PLAY)
{
// DBG("TEST data address %d", sizeof(audioQueueRecv.message.data));
audio_play_tts_text(0, audioQueueRecv.message.tts.data, audioQueueRecv.message.tts.len);
}
else if (audioQueueRecv.playType == FILE_PLAY)
{
DBG("TEST address 2 %p", audioQueueRecv.message.file.info);
audio_play_multi_files(0, audioQueueRecv.message.file.info, audioQueueRecv.message.file.count);
}
}
else if (audioQueueRecv.priority == PAD_PLAY)
{
}
result = osEventFlagsWait(waitAudioPlayDone, WAIT_PLAY_FLAG, osFlagsWaitAll, 20000);
if (audioQueueRecv.playType == TTS_PLAY) {
DBG("FREE MY AUDIO TTS");
free(audioQueueRecv.message.tts.data);
}
else if(audioQueueRecv.playType == FILE_PLAY)
{
free(audioQueueRecv.message.file.info);
DBG("FREE MY AUDIO FILE");
}
// volume++;
}
}
vTaskDelete(NULL);
}
void audio_task_init(void)
{
GpioPinConfig_t gpio_config;
gpio_config.pinDirection = GPIO_DIRECTION_OUTPUT;
gpio_config.misc.initOutput = 0;
GPIO_pinConfig(0, 12, &gpio_config);
PadConfig_t config;
PAD_getDefaultConfig(&config);
config.mux = PAD_MUX_ALT0;
PAD_setPinConfig(45, &config);
GPIO_pinConfig(1, 9, &gpio_config);
ivCStrA sdk_id = AISOUND_SDK_USERID;
slpManSetPmuSleepMode(true, SLP_SLP1_STATE, false);
slpManApplyPlatVoteHandle("audio", &audio_sleep_handler);
slpManPlatVoteDisableSleep(audio_sleep_handler, SLP_SLP2_STATE);
delay_timer = xTimerCreate(NULL, 200, 0, 0, app_pa_on);
audio_play_global_init(audio_event_cb, audio_data_cb, NULL);
audio_play_tts_set_resource(ivtts_16k_lite, sdk_id);
//现在使用ES7149/ES7148用如下配置如果不是请根据实际情况配置bus_id直接写0
// Audio_CodecI2SInit(0, I2S_MODE_I2S, I2S_FRAME_SIZE_16_16);
//如下配置可使用TM8211
Audio_CodecI2SInit(0, I2S_MODE_MSB, I2S_FRAME_SIZE_16_16);
if (waitAudioPlayDone == NULL)
{
waitAudioPlayDone = osEventFlagsNew(NULL);
}
audioQueueHandle = xQueueCreate(100, sizeof(audioQueueData));
audioQueueData powerOn = {0};
powerOn.playType = TTS_PLAY;
powerOn.priority = MONEY_PLAY;
char str[] = "正在开机";
powerOn.message.tts.data = malloc(sizeof(str));
memcpy(powerOn.message.tts.data, str, sizeof(str));
powerOn.message.tts.len = sizeof(str);
if (pdTRUE != xQueueSend(audioQueueHandle, &powerOn, 0))
{
DBG("start send audio fail");
}
xTaskCreate(audio_task, " ", 2048, NULL, 20, NULL);
}
/*------------------------------------------------audio-----------------------------------------------*/
/*------------------------------------------------http------------------------------------------------*/
HTTPResult AirM2mGethttp(CHAR *getUrl, CHAR *buf, UINT32 len)
{
HttpClientData clientData = {0};
HTTPResult result=HTTP_INTERNAL;
//AirM2mhttpClient.timeout_r=20;
// AirM2mhttpClient.timeout_s=2;
clientData.headerBuf = malloc(HTTP_HEAD_BUF_SIZE);
clientData.headerBufLen = HTTP_HEAD_BUF_SIZE;
clientData.respBuf = buf;
clientData.respBufLen = len;
result=httpGet(&AirM2mhttpClient,getUrl,&clientData,20);
return result;
}
/*------------------------------------------------http------------------------------------------------*/
/*------------------------------------------------MQTT------------------------------------------------*/
void messageArrived(MessageData *data)
{
audioQueueData audiodata = {0};
HTTPResult result;
CHAR url[200];
char *p = (char *)data->message->payload;
memcpy(url, p + 5, p[4] + 1);
for (size_t i = 0; i < p[4]; i++)
{
/* code */
DBG("my test mqtt url %c", url[i]);
}
if (p[0] == 0)
{
audiodata.playType = TTS_PLAY;
audiodata.priority = MONEY_PLAY;
audiodata.message.tts.data = malloc(sizeof(url));
memcpy(audiodata.message.tts.data, url, sizeof(url));
audiodata.message.tts.len = sizeof(url);
if (pdTRUE != xQueueSend(audioQueueHandle, &audiodata, 0))
{
DBG("start send audio fail");
}
}
else
{
char *recvBuf = malloc(HTTP_RECV_BUF_SIZE);
result = AirM2mGethttp(url,recvBuf, HTTP_RECV_BUF_SIZE);
if (result == HTTP_OK)
{
DBG("http chengong");
DBG("http ceshi %s", recvBuf);
http_audio_File(recvBuf, sizeof(recvBuf));
audiodata.priority = MONEY_PLAY;
audiodata.playType = FILE_PLAY;
audiodata.message.file.info=(audio_play_info_t *)calloc(1, sizeof(audio_play_info_t));
audiodata.message.file.info->path = FILE_NAME;
audiodata.message.file.count = 1;
if (pdTRUE != xQueueSend(audioQueueHandle, &audiodata, 0))
{
DBG("start send audio fail");
}
}
}
}
static void mqtt_demo(void){
int rc = 0;
MQTTClient mqttClient;
static Network n = {0};
MQTTPacket_connectData connectData = MQTTPacket_connectData_initializer;
connectData.MQTTVersion = 4;
connectData.clientID.cstring = client_id;
connectData.username.cstring = User;
connectData.password.cstring = Password;
connectData.keepAliveInterval = 120;
if ((rc = mqtt_connect(&mqttClient, &n,HOST, PORT, &connectData)) != 0)
DBG("mqtt Return code from MQTT mqtt_connect is %d\n", rc);
if ((rc = MQTTSubscribe(&mqttClient, mqtt_subTopic, 0, messageArrived)) != 0)
DBG("mqtt Return code from MQTT subscribe is %d\n", rc);
while (1)
{
osDelay(5000);
}
}
static void sendQueueMsg(UINT32 msgId, UINT32 xTickstoWait)
{
eventCallbackMessage_t *queueMsg = NULL;
queueMsg = malloc(sizeof(eventCallbackMessage_t));
queueMsg->messageId = msgId;
if (networkQue)
{
if (pdTRUE != xQueueSend(networkQue, &queueMsg, xTickstoWait))
{
DBG("xQueueSend error");
}
}
}
static INT32 Networkcall(PsEventID eventId, void *param, UINT32 paramLen)
{
NmAtiNetInfoInd *netif = NULL;
switch (eventId)
{
case PS_URC_ID_PS_NETINFO:
{
netif = (NmAtiNetInfoInd *)param;
if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED)
{
DBG("netif acivated");
sendQueueMsg(QMSG_ID_NW_IPV4_READY, 0);
}
else if (netif->netifInfo.netStatus == NM_NETIF_OOS)
{
DBG("PSIF network OOS");
}
else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED || netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL)
{
DBG("PSIF network deactive");
}
break;
}
case PS_URC_ID_PS_BEARER_DEACTED:
{
DBG("Default bearer Deactivated");
sendQueueMsg(QMSG_ID_NW_DISCONNECT, 0);
break;
}
default:
break;
}
return 0;
}
static void MQTT_Task(void *param)
{
CHAR imei[20] = {0};
CmsRetId ack = appGetImeiNumSync(imei);
if (CMS_RET_SUCC == ack)
{
DBG("GetImei_succeed %s", imei);
sprintf(mqtt_subTopic, "%s%s", subTopic, imei);
DBG("Get_Mqtt_subTopic %s", mqtt_subTopic);
}
else
{
DBG("GetImei_Fail");
}
eventCallbackMessage_t *quItem = NULL;
networkQue = xQueueCreate(10, sizeof(eventCallbackMessage_t *));
if (networkQue == NULL)
{
DBG("xQueueCreate_Fail");
return;
}
registerPSEventCallback(PS_GROUP_ALL_MASK, Networkcall);
while (1)
{
if (xQueueReceive(networkQue, &quItem, portMAX_DELAY))
{
switch (quItem->messageId)
{
case QMSG_ID_NW_IPV4_READY:
case QMSG_ID_NW_IPV6_READY:
case QMSG_ID_NW_IPV4_6_READY:
mqtt_demo();
break;
case QMSG_ID_NW_DISCONNECT:
break;
default:
break;
}
free(quItem);
}
}
vTaskDelete(NULL);
}
static void mqttclient_task_init(void){
xTaskCreate(MQTT_Task, "", 4096, NULL, 20, NULL);
}
/*------------------------------------------------MQTT------------------------------------------------*/
INIT_TASK_EXPORT(mqttclient_task_init, "2");
INIT_TASK_EXPORT(audio_task_init, "3");

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@@ -0,0 +1,34 @@
local TARGET_NAME = "example_yunlabayashi"
local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
includes(SDK_TOP .. "/thirdparty/audio_decoder")
target(TARGET_NAME)
set_kind("static")
set_targetdir(LIB_DIR)
add_defines("MQTT_TASK",{public = true})
includes(SDK_TOP .. "/thirdparty/mqtt")
add_deps("mqtt")
-- --加入代码和头文件
add_includedirs(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src",{public = true})
add_files(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src/*.c",{public = true})
--加入代码和头文件
includes(SDK_TOP .. "/thirdparty/httpclient")
add_deps("httpclient")
add_includedirs("/inc",{public = true})
add_files("/src/*.c",{public = true})
add_deps("audio_decoder")
--加入代码和头文件
add_includedirs("/include",{public = true})
add_includedirs(SDK_TOP .. "/PLAT/core/tts/include/16k_lite_ver",{public = true})
--路径可以随便写,可以加任意路径的代码,下面代码等效上方代码
-- add_includedirs(SDK_TOP .. "project/" .. TARGET_NAME .. "/inc",{public = true})
-- add_files(SDK_TOP .. "project/" .. TARGET_NAME .. "/src/*.c",{public = true})
--可以继续增加add_includedirs和add_files
--自动链接
LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
LIB_USER = LIB_USER .. SDK_TOP .. "/PLAT/core/lib/libaisound50_16K_lite_beta.a "
--甚至可以加入自己的库
target_end()