更新硬件SDK

This commit is contained in:
kerwincui
2023-03-04 03:44:56 +08:00
parent dcdf6e1b7c
commit e39d3d2f03
1900 changed files with 663153 additions and 0 deletions

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#ifndef __RTE_DEVICE_H
#define __RTE_DEVICE_H
#include "ec618.h"
/* Peripheral IO Mode Select, Must Configure First !!!
Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
*/
#define POLLING_MODE 0x1
#define DMA_MODE 0x2
#define IRQ_MODE 0x3
#define UNILOG_MODE 0x4
#define RTE_UART0_TX_IO_MODE UNILOG_MODE
#define RTE_UART0_RX_IO_MODE IRQ_MODE
#define USART0_RX_TRIG_LVL (30)
#define RTE_UART1_TX_IO_MODE DMA_MODE
#define RTE_UART1_RX_IO_MODE DMA_MODE
#define RTE_UART2_TX_IO_MODE POLLING_MODE
#define RTE_UART2_RX_IO_MODE DMA_MODE
#define RTE_SPI0_IO_MODE POLLING_MODE
#define RTE_SPI1_IO_MODE POLLING_MODE
#define RTE_I2C0_IO_MODE POLLING_MODE
#define RTE_I2C1_IO_MODE POLLING_MODE
// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
#define RTE_I2C0 1
// { PAD_PIN28}, // 0 : gpio13 / 2 : I2C0 SCL
// { PAD_PIN27}, // 0 : gpio12 / 2 : I2C0 SDA
#define RTE_I2C0_SCL_BIT 28 // AUDIO use 28
#define RTE_I2C0_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C0_SDA_BIT 27 // AUDIO use 27
#define RTE_I2C0_SDA_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C0_DMA_TX_EN 0
#define RTE_I2C0_DMA_TX_REQID DMA_REQUEST_I2C0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C0_DMA_RX_EN 0
#define RTE_I2C0_DMA_RX_REQID DMA_REQUEST_I2C0_RX
// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
#define RTE_I2C1 1
// { PAD_PIN20}, // 0 : gpio5 / 2 : I2C1 SCL
// { PAD_PIN19}, // 0 : gpio4 / 2 : I2C1 SDA
#define RTE_I2C1_SCL_BIT 20
#define RTE_I2C1_SCL_FUNC PAD_MUX_ALT2
#define RTE_I2C1_SDA_BIT 19
#define RTE_I2C1_SDA_FUNC PAD_MUX_ALT2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C1_DMA_TX_EN 1
#define RTE_I2C1_DMA_TX_REQID DMA_REQUEST_I2C1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_I2C1_DMA_RX_EN 1
#define RTE_I2C1_DMA_RX_REQID DMA_REQUEST_I2C1_RX
// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
// Configuration settings for Driver_USART0 in component ::Drivers:USART
#define RTE_UART0_CTS_PIN_EN 0
#define RTE_UART0_RTS_PIN_EN 0
// { PAD_PIN27}, // 0 : gpio12 / 3 : UART0 RTSn
// { PAD_PIN28}, // 0 : gpio13 / 3 : UART0 CTSn
// { PAD_PIN29}, // 0 : gpio14 / 3 : UART0 RXD
// { PAD_PIN30}, // 0 : gpio15 / 3 : UART0 TXD
#define RTE_UART0_RTS_BIT 27
#define RTE_UART0_RTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_CTS_BIT 28
#define RTE_UART0_CTS_FUNC PAD_MUX_ALT3
#define RTE_UART0_RX_BIT 29
#define RTE_UART0_RX_FUNC PAD_MUX_ALT3
#define RTE_UART0_TX_BIT 30
#define RTE_UART0_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_TX_REQID DMA_REQUEST_USART0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART0_DMA_RX_REQID DMA_REQUEST_USART0_RX
// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
// Configuration settings for Driver_USART1 in component ::Drivers:USART
#define RTE_UART1_CTS_PIN_EN 1
#define RTE_UART1_RTS_PIN_EN 1
// { PAD_PIN31}, // 0 : gpio16 / 1 : UART1 RTS
// { PAD_PIN32}, // 0 : gpio17 / 1 : UART1 CTS
// { PAD_PIN33}, // 0 : gpio18 / 1 : UART1 RXD
// { PAD_PIN34}, // 0 : gpio19 / 1 : UART1 TXD
#define RTE_UART1_RTS_BIT 31
#define RTE_UART1_RTS_FUNC PAD_MUX_ALT1
#define RTE_UART1_CTS_BIT 32
#define RTE_UART1_CTS_FUNC PAD_MUX_ALT1
#define RTE_UART1_RX_BIT 33
#define RTE_UART1_RX_FUNC PAD_MUX_ALT1
#define RTE_UART1_TX_BIT 34
#define RTE_UART1_TX_FUNC PAD_MUX_ALT1
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_TX_REQID DMA_REQUEST_USART1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART1_DMA_RX_REQID DMA_REQUEST_USART1_RX
// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
// Configuration settings for Driver_USART2 in component ::Drivers:USART
#define RTE_UART2_CTS_PIN_EN 0
#define RTE_UART2_RTS_PIN_EN 0
// { PAD_PIN25}, // 0 : gpio10 / 3 : UART2 RXD
// { PAD_PIN26}, // 0 : gpio11 / 3 : UART2 TXD
#define RTE_UART2_RX_BIT 25
#define RTE_UART2_RX_FUNC PAD_MUX_ALT3
#define RTE_UART2_TX_BIT 26
#define RTE_UART2_TX_FUNC PAD_MUX_ALT3
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_TX_REQID DMA_REQUEST_USART2_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_UART2_DMA_RX_REQID DMA_REQUEST_USART2_RX
// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
#define RTE_SPI0 1
// { PAD_PIN21}, // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
// { PAD_PIN22}, // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
// { PAD_PIN23}, // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
// { PAD_PIN24}, // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
#define RTE_SPI0_SSN_BIT 21
#define RTE_SPI0_SSN_FUNC PAD_MUX_ALT2
#define RTE_SPI0_MOSI_BIT 22
#define RTE_SPI0_MOSI_FUNC PAD_MUX_ALT2
#define RTE_SPI0_MISO_BIT 23
#define RTE_SPI0_MISO_FUNC PAD_MUX_ALT2
#define RTE_SPI0_SCLK_BIT 24
#define RTE_SPI0_SCLK_FUNC PAD_MUX_ALT2
#define RTE_SPI0_SSN_GPIO_INSTANCE 1
#define RTE_SPI0_SSN_GPIO_INDEX 0
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_TX_REQID DMA_REQUEST_SPI0_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI0_DMA_RX_REQID DMA_REQUEST_SPI0_RX
// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
#define RTE_SPI1 1
// { PAD_PIN13}, // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
// { PAD_PIN14}, // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
// { PAD_PIN15}, // 0 : gpio4 / 1 : UART0 RXD / 3 : SPI1 MISO
// { PAD_PIN16}, // 0 : gpio5 / 1 : UART0 TXD / 3 : SPI1 SCLK
#define RTE_SPI1_SSN_BIT 13
#define RTE_SPI1_SSN_FUNC PAD_MUX_ALT3
#define RTE_SPI1_MOSI_BIT 14
#define RTE_SPI1_MOSI_FUNC PAD_MUX_ALT3
#define RTE_SPI1_MISO_BIT 15
#define RTE_SPI1_MISO_FUNC PAD_MUX_ALT3
#define RTE_SPI1_SCLK_BIT 16
#define RTE_SPI1_SCLK_FUNC PAD_MUX_ALT3
#define RTE_SPI1_SSN_GPIO_INSTANCE 0
#define RTE_SPI1_SSN_GPIO_INDEX 2
// DMA
// Tx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_TX_REQID DMA_REQUEST_SPI1_TX
// Rx
// Channel <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
#define RTE_SPI1_DMA_RX_REQID DMA_REQUEST_SPI1_RX
// PWM0 Controller [Driver_PWM0]
// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
#define RTE_PWM 1
#define EFUSE_INIT_MODE POLLING_MODE
#define L2CTLS_INIT_MODE POLLING_MODE
#define FLASH_BARE_RW_MODE 1
#define RTE_UART0 1
#define RTE_UART1 1
#define RTE_UART2 1
/* to enable external thermal */
#define EXTERNAL_NTC_EXIST 0
#if (RTE_UART1 == 1)
#define UART1_DTR_PAD_INDEX 26 // GPIO11
#define UART1_DTR_GPIO_INSTANCE 0
#define UART1_DTR_GPIO_PIN 11
#define UART1_RI_PAD_INDEX 44 // AONIO 4 = GPIO24
#define UART1_RI_GPIO_INSTANCE 1
#define UART1_RI_GPIO_PIN 8
#define UART1_RI_PWM_INSTANCE 1
#define UART1_RI_PWM_CLK_ID FCLK_TIMER1
#define UART1_RI_PWM_CLK_SEL FCLK_TIMER1_SEL_26M
#define UART1_DCD_PAD_INDEX 45 // AONIO 5 = GPIO25
#define UART1_DCD_GPIO_INSTANCE 1
#define UART1_DCD_GPIO_PIN 9
#endif
#if (RTE_UART2 == 1)
#define UART2_DTR_PAD_INDEX 25 // GPIO10
#define UART2_DTR_GPIO_INSTANCE 0
#define UART2_DTR_GPIO_PIN 10
#define UART2_RI_PAD_INDEX 43 // AONIO 3 = GPIO23
#define UART2_RI_GPIO_INSTANCE 1
#define UART2_RI_GPIO_PIN 7
#define UART2_RI_PWM_INSTANCE 0
#define UART2_RI_PWM_CLK_ID FCLK_TIMER0
#define UART2_RI_PWM_CLK_SEL FCLK_TIMER0_SEL_26M
#define UART2_DCD_PAD_INDEX 47 // AONIO 7 = GPIO27
#define UART2_DCD_GPIO_INSTANCE 1
#define UART2_DCD_GPIO_PIN 11
#endif
#define NETLIGHT_PAD_INDEX 46 // AONIO 6 = GPIO26
#define NETLIGHT_PAD_ALT_FUNC PAD_MUX_ALT5
#define NETLIGHT_PWM_INSTANCE 3
//USIM1 OPTION1
#define USIM1_URST_OP1_PAD_INDEX 19 // GPIO4
#define USIM1_URST_OP1_GPIO_INSTANCE 0
#define USIM1_URST_OP1_GPIO_PIN 4
#define USIM1_UCLK_OP1_PAD_INDEX 20 // GPIO5
#define USIM1_UCLK_OP1_GPIO_INSTANCE 0
#define USIM1_UCLK_OP1_GPIO_PIN 5
#define USIM1_UIO_OP1_PAD_INDEX 21 // GPIO6
#define USIM1_UIO_OP1_GPIO_INSTANCE 0
#define USIM1_UIO_OP1_GPIO_PIN 6
//USIM1 OPTION2
#define USIM1_UIO_OP2_PAD_INDEX 27 // GPIO12
#define USIM1_UIO_OP2_GPIO_INSTANCE 0
#define USIM1_UIO_OP2_GPIO_PIN 12
#define USIM1_URST_OP2_PAD_INDEX 28 // GPIO13
#define USIM1_URST_OP2_GPIO_INSTANCE 0
#define USIM1_URST_OP2_GPIO_PIN 13
#define USIM1_UCLK_OP2_PAD_INDEX 29 // GPIO14
#define USIM1_UCLK_OP2_GPIO_INSTANCE 0
#define USIM1_UCLK_OP2_GPIO_PIN 14
//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
#define AONIO_6_PAD_INDEX 46 // AONIO 6 = GPIO26
#define AONIO_6_GPIO_INSTANCE 1
#define AONIO_6_GPIO_PIN 10
#define RTE_CSPI0 0
#define RTE_CSPI0_MCLK_PAD_ADDR 39
#define RTE_CSPI0_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_PCLK_PAD_ADDR 35
#define RTE_CSPI0_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_CS_PAD_ADDR 36
#define RTE_CSPI0_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_SDO0_PAD_ADDR 37
#define RTE_CSPI0_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI0_SDO1_PAD_ADDR 38
#define RTE_CSPI0_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI0 Request ID
#define RTE_CSPI0_DMA_RX_REQID DMA_REQUEST_I2S0_RX
// CSPI1 Configuration
#define RTE_CSPI1 1
#define RTE_CSPI1_MCLK_PAD_ADDR 18
#define RTE_CSPI1_MCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_PCLK_PAD_ADDR 19
#define RTE_CSPI1_PCLK_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_CS_PAD_ADDR 20
#define RTE_CSPI1_CS_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO0_PAD_ADDR 21
#define RTE_CSPI1_SDO0_FUNC PAD_MUX_ALT1
#define RTE_CSPI1_SDO1_PAD_ADDR 22
#define RTE_CSPI1_SDO1_FUNC PAD_MUX_ALT1
// DMA CSPI1 Request ID
#define RTE_CSPI1_DMA_RX_REQID DMA_REQUEST_I2S1_RX
#endif /* __RTE_DEVICE_H */

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/*
* Copyright (c) 2022 OpenLuat & AirM2M
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "bsp.h"
#include "bsp_custom.h"
#include "common_api.h"
#include "FreeRTOS.h"
#include "task.h"
#include "queue.h"
#include "ps_event_callback.h"
#include "ps_lib_api.h"
#include "cmisim.h"
#include "cmips.h"
#include "slpman.h"
#include "MQTTClient.h"
#include "cJSON.h"
#include "gpio.h"
#include "cmimm.h"
char g_mqtt_MQTT_HOST[192]; // "120.55.137.106" // MQTT服务器的地址和端口号
uint32_t g_mqtt_MQTT_PORT = 1883;
char g_mqtt_CLIENT_ID[192];
char g_mqtt_USERNAME[192];
char g_mqtt_PASSWORD[192];
char g_mqtt_sub_topic[256];
char g_mqtt_pub_topic[256];
#define NETLED_ID 27
#define NETLED_PAD (NETLED_ID / 16)
#define NETLED_MARK (NETLED_ID % 16)
//char g_mqtt_send_payload[] = "hello mqtt_test!!!";
#define QMSG_ID_BASE (0x160)
#define QMSG_ID_NW_IPV4_READY (QMSG_ID_BASE)
#define QMSG_ID_NW_IPV6_READY (QMSG_ID_BASE + 1)
#define QMSG_ID_NW_IPV4_6_READY (QMSG_ID_BASE + 2)
#define QMSG_ID_NW_DISCONNECT (QMSG_ID_BASE + 3)
#define QMSG_ID_SOCK_SENDPKG (QMSG_ID_BASE + 4)
#define QMSG_ID_SOCK_RECVPKG (QMSG_ID_BASE + 5)
#define APP_EVENT_QUEUE_SIZE (10)
static QueueHandle_t psEventQueueHandle;
static QueueHandle_t psMqttPubQueue;
int mqtt_uplink(void* payload, size_t len, int qos, int retained);
static void sendQueueMsg(UINT32 msgId, UINT32 xTickstoWait){
eventCallbackMessage_t *queueMsg = NULL;
queueMsg = malloc(sizeof(eventCallbackMessage_t));
queueMsg->messageId = msgId;
if (psEventQueueHandle){
if (pdTRUE != xQueueSend(psEventQueueHandle, &queueMsg, xTickstoWait)){
DBG("xQueueSend error");
}
}
}
static INT32 mqttPSUrcCallback(PsEventID eventID, void *param, UINT32 paramLen){
CmiSimImsiStr *imsi = NULL;
CmiPsCeregInd *creg = NULL;
UINT8 rssi = 0;
NmAtiNetInfoInd *netif = NULL;
switch(eventID){
case PS_URC_ID_SIM_READY:{
imsi = (CmiSimImsiStr *)param;
DBG("SIM ready(imsi=%s len=%d)", imsi->contents, imsi->length);
break;
}
case PS_URC_ID_MM_SIGQ:{
CmiMmCesqInd *pMmCesqInd = (CmiMmCesqInd *)param;
rssi = mmGetCsqRssiFromCesq(pMmCesqInd->rsrp, pMmCesqInd->rsrq, pMmCesqInd->rssiCompensation);
DBG("RSSI signal=%d", rssi);
break;
}
case PS_URC_ID_PS_BEARER_ACTED:{
DBG("Default bearer activated");
break;
}
case PS_URC_ID_PS_BEARER_DEACTED:{
DBG("Default bearer Deactivated");
sendQueueMsg(QMSG_ID_NW_DISCONNECT, 0);
break;
}
case PS_URC_ID_PS_CEREG_CHANGED:{
creg = (CmiPsCeregInd *)param;
DBG("CREG message act:%d celId:%d locPresent:%d state:%d", creg->act, creg->celId, creg->locPresent, creg->state);
break;
}
case PS_URC_ID_PS_NETINFO:{
netif = (NmAtiNetInfoInd *)param;
if (netif->netifInfo.netStatus == NM_NETIF_ACTIVATED){
DBG("netif acivated");
sendQueueMsg(QMSG_ID_NW_IPV4_READY, 0);
}else if (netif->netifInfo.netStatus == NM_NETIF_OOS){
DBG("PSIF network OOS");
}else if (netif->netifInfo.netStatus == NM_NO_NETIF_OR_DEACTIVATED ||
netif->netifInfo.netStatus == NM_NO_NETIF_NOT_DIAL){
DBG("PSIF network deactive");
}
break;
}
default:
break;
}
return 0;
}
// 下行信息处理函数
void messageArrived(MessageData* data)
{
cJSON* dtop = NULL;
cJSON* utop = cJSON_CreateObject();
char* payload = data->message->payload;
size_t payloadlen = data->message->payloadlen;
DBG("mqtt Message arrived on topic %.*s: %.*s\n", data->topicName->lenstring.len, data->topicName->lenstring.data,
data->message->payloadlen, data->message->payload);
if (data->message->payloadlen < 2) {
return;
}
if (payload[0] == '{' && payload[payloadlen - 1] == '}') {
// 是json数据, 开始处理
dtop = cJSON_ParseWithLength(payload, payloadlen);
if (dtop != NULL) {
// 最基本的命令, netled 控制
cJSON* netled = cJSON_GetObjectItem(dtop, "netled");
if (netled != NULL) {
if (netled->type == cJSON_False) {
DBG("NETLED Off");
GPIO_pinWrite(NETLED_PAD, 1 << NETLED_MARK , 0);
cJSON_AddBoolToObject(utop, "netled", 0);
}
else if (netled->type == cJSON_True) {
DBG("NETLED On");
GPIO_pinWrite(NETLED_PAD, 1 << NETLED_MARK, 1 << NETLED_MARK);
cJSON_AddBoolToObject(utop, "netled", 1);
}
}
// TODO 进阶gpio控制
// TODO uart透传,考虑演示一下
// ADC 读取, 演示一下
// PWM 输出, 演示一下
// 结束处理.
}
}
// cJSON的数据可不会自动回收,要注意清理
if (dtop != NULL) {
cJSON_Delete(dtop);
}
// Print返回的数据也需要清理的
char* resp = cJSON_Print(utop);
if (resp) {
DBG("mqtt resp %s", resp);
mqtt_uplink(resp, strlen(resp), 1, 0);
cJSON_free(resp);
}
}
// 上行数据, 中断函数不可调用
int mqtt_uplink(void* payload, size_t len, int qos, int retained) {
MQTTMessage *message = malloc(sizeof(MQTTMessage));
message->qos = qos;
message->retained = retained;
message->payload = malloc(len);
if (message->payload == NULL) {
return -1;
}
memcpy(message->payload, payload, len);
message->payloadlen = len;
xQueueSend(psMqttPubQueue, &message, 0);
return 0;
}
static uint8_t mqtt_ready = 0;
static void mqtt_demo(void){
int rc = 0;
MQTTClient mqttClient;
Network mqttNetwork = {0};
MQTTMessage *message;
char imei[20] = {0};
// TODO 支持重连
if (mqtt_ready) {
DBG("mqtt is ready");
return;
}
mqtt_ready = 1;
// 获取IMEI作为识别码
appGetImeiNumSync(imei);
// 配置mqtt各种参数
// TODO 换成合宙或者fdb可配置?
memcpy(g_mqtt_MQTT_HOST, "broker-cn.emqx.io", strlen("broker-cn.emqx.io") + 1);
g_mqtt_MQTT_PORT = 1883;
memcpy(g_mqtt_CLIENT_ID, imei, strlen(imei) + 1);
memcpy(g_mqtt_USERNAME, imei, strlen(imei) + 1);
memcpy(g_mqtt_PASSWORD, "LuatOS", strlen("LuatOS") + 1);
sprintf(g_mqtt_sub_topic, "/webled/%s/down", imei);
sprintf(g_mqtt_pub_topic, "/webled/%s/up", imei);
// 打印一下上下行的topic,方便调试
DBG("uplink %s", g_mqtt_pub_topic);
DBG("downlink %s", g_mqtt_sub_topic);
// 开始连接
MQTTPacket_connectData connectData = MQTTPacket_connectData_initializer;
connectData.MQTTVersion = 4;
connectData.clientID.cstring = g_mqtt_CLIENT_ID;
connectData.username.cstring = g_mqtt_USERNAME;
connectData.password.cstring = g_mqtt_PASSWORD;
connectData.keepAliveInterval = 120;
// 一直重试, 直至成功
while (1) {
DBG("mqtt connect ...");
rc = mqtt_connect(&mqttClient, &mqttNetwork, g_mqtt_MQTT_HOST, g_mqtt_MQTT_PORT, &connectData);
if (MQTTIsConnected(&mqttClient)) {
DBG("mqtt connect ok");
break;
}
DBG("mqtt connect fail, wait 10s");
osDelay(15*1000);
}
// 连接成功了, 稍微等一下
osDelay(1000); // 暂时定位1秒,后续改短^_^
// 上报上线通知
mqtt_uplink("{\"hi\":\"LuatOS\"}", strlen("{\"hi\":\"LuatOS\"}"), 1, 0);
// 订阅下行topic. TODO 遇到过失败的情况
if ((rc = MQTTSubscribe(&mqttClient, g_mqtt_sub_topic, 0, messageArrived)) != 0) {
// 订阅失败, 其实问题挺大的
DBG("mqtt Return code from MQTT subscribe is %d", rc);
}
// 剩下的就是等着上行数据. 至于下行数据, MqttTask会处理好
while(1){
// 接收queue信息, 然后上行
if (xQueueReceive(psMqttPubQueue, &message, 15000)){
MQTTPublish(&mqttClient, g_mqtt_pub_topic, message);
free(message->payload);
free(message);
}
#if !defined(MQTT_TASK)
if ((rc = MQTTYield(&mqttClient, 1000)) != 0)
DBG("mqtt_demo Return code from yield is %d\n", rc);
#endif
osDelay(10);
}
}
static void mqttclient_task(void *param){
eventCallbackMessage_t *queueItem = NULL;
psEventQueueHandle = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(eventCallbackMessage_t*));
if (psEventQueueHandle == NULL){
DBG("psEventQueue create error!");
return;
}
psMqttPubQueue = xQueueCreate(APP_EVENT_QUEUE_SIZE, sizeof(MQTTMessage*));
if (psMqttPubQueue == NULL){
DBG("psMqttPubQueue create error!");
return;
}
registerPSEventCallback(PS_GROUP_ALL_MASK, mqttPSUrcCallback);
while(1){
if (xQueueReceive(psEventQueueHandle, &queueItem, portMAX_DELAY)){
switch(queueItem->messageId){
case QMSG_ID_NW_IPV4_READY:
case QMSG_ID_NW_IPV6_READY:
case QMSG_ID_NW_IPV4_6_READY:
mqtt_demo();
break;
case QMSG_ID_NW_DISCONNECT:
break;
default:
break;
}
free(queueItem);
}
}
vTaskDelete(NULL);
}
static void mqttclient_task_init(void){
//------------------------------------------------------
// netled作为开发板的唯一可视GPIO, 默认初始化之
slpManAONIOPowerOn();
PadConfig_t padConfig = {0};
PAD_getDefaultConfig(&padConfig);
padConfig.mux = PAD_MUX_ALT0;
PAD_setPinConfig(NETLED_ID, &padConfig);
PAD_setPinPullConfig(NETLED_ID, PAD_INTERNAL_PULL_DOWN);
GpioPinConfig_t config = {0};
config.pinDirection = GPIO_DIRECTION_OUTPUT;
config.misc.initOutput = 0;
GPIO_pinConfig(NETLED_PAD, NETLED_MARK, &config);
//------------------------------------------------------
// 启动mqtt任务
xTaskCreate(mqttclient_task, "mqtt", 4096, NULL, 20, NULL);
}
INIT_TASK_EXPORT(mqttclient_task_init, "2");

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@@ -0,0 +1,31 @@
local TARGET_NAME = "web_led"
local LIB_DIR = "$(buildir)/".. TARGET_NAME .. "/"
local LIB_NAME = "lib" .. TARGET_NAME .. ".a "
target(TARGET_NAME)
local LIB_DIR = "$(buildir)/mqttclient/"
set_kind("static")
set_targetdir(LIB_DIR)
add_defines("MQTT_TASK",{public = true})
includes(SDK_TOP .. "/thirdparty/mqtt")
add_deps("mqtt")
-- --加入代码和头文件
add_includedirs(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src",{public = true})
add_files(SDK_TOP .. "/thirdparty/mqtt/MQTTClient-C/src/*.c",{public = true})
add_includedirs(SDK_TOP .. "thirdparty/cjson")
add_files(SDK_TOP .. "/thirdparty/cJSON/*.c",{public = true})
--加入自己代码和头文件
add_includedirs("/inc",{public = true})
add_files("/src/*.c",{public = true})
--可以继续增加add_includedirs和add_files
--自动链接
LIB_USER = LIB_USER .. SDK_TOP .. LIB_DIR .. LIB_NAME .. " "
--甚至可以加入自己的库
target_end()