更新硬件SDK

sdk/合宙/air780e/csdk/wu_mei/inc/RTE_Device.h

@@ -0,0 +1,349 @@
+#ifndef __RTE_DEVICE_H
+#define __RTE_DEVICE_H
+
+#include "ec618.h"
+
+/*  Peripheral IO Mode Select, Must Configure First !!!
+    Note, when receiver works in DMA_MODE, interrupt is also enabled to transfer tailing bytes.
+*/
+
+#define POLLING_MODE            0x1
+#define DMA_MODE                0x2
+#define IRQ_MODE                0x3
+#define UNILOG_MODE             0x4
+
+#define RTE_UART0_TX_IO_MODE    UNILOG_MODE
+#define RTE_UART0_RX_IO_MODE    IRQ_MODE
+#define USART0_RX_TRIG_LVL      (30)
+
+#define RTE_UART1_TX_IO_MODE    DMA_MODE
+#define RTE_UART1_RX_IO_MODE    DMA_MODE
+
+#define RTE_UART2_TX_IO_MODE    POLLING_MODE
+#define RTE_UART2_RX_IO_MODE    DMA_MODE
+
+#define RTE_SPI0_IO_MODE        POLLING_MODE
+
+#define RTE_SPI1_IO_MODE        POLLING_MODE
+
+#define RTE_I2C0_IO_MODE        POLLING_MODE
+#define RTE_I2C1_IO_MODE        POLLING_MODE
+
+
+// I2C0 (Inter-integrated Circuit Interface) [Driver_I2C0]
+// Configuration settings for Driver_I2C0 in component ::Drivers:I2C
+#define RTE_I2C0                        1
+
+// { PAD_PIN28},  // 0 : gpio13 / 2 : I2C0 SCL
+// { PAD_PIN27},  // 0 : gpio12 / 2 : I2C0 SDA
+#define RTE_I2C0_SCL_BIT                28			// AUDIO use 28
+#define RTE_I2C0_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C0_SDA_BIT                27			// AUDIO use 27
+#define RTE_I2C0_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_TX_EN              0
+#define RTE_I2C0_DMA_TX_REQID           DMA_REQUEST_I2C0_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C0_DMA_RX_EN              0
+#define RTE_I2C0_DMA_RX_REQID           DMA_REQUEST_I2C0_RX
+
+// I2C1 (Inter-integrated Circuit Interface) [Driver_I2C1]
+// Configuration settings for Driver_I2C1 in component ::Drivers:I2C
+#define RTE_I2C1                        1
+
+// { PAD_PIN20},  // 0 : gpio5  / 2 : I2C1 SCL
+// { PAD_PIN19},  // 0 : gpio4  / 2 : I2C1 SDA
+#define RTE_I2C1_SCL_BIT                20
+#define RTE_I2C1_SCL_FUNC               PAD_MUX_ALT2
+
+#define RTE_I2C1_SDA_BIT                19
+#define RTE_I2C1_SDA_FUNC               PAD_MUX_ALT2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_TX_EN              1
+#define RTE_I2C1_DMA_TX_REQID           DMA_REQUEST_I2C1_TX
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_I2C1_DMA_RX_EN              1
+#define RTE_I2C1_DMA_RX_REQID           DMA_REQUEST_I2C1_RX
+
+
+// UART0 (Universal asynchronous receiver transmitter) [Driver_USART0]
+// Configuration settings for Driver_USART0 in component ::Drivers:USART
+#define RTE_UART0_CTS_PIN_EN            0
+#define RTE_UART0_RTS_PIN_EN            0
+
+// { PAD_PIN27},  // 0 : gpio12 / 3 : UART0 RTSn
+// { PAD_PIN28},  // 0 : gpio13 / 3 : UART0 CTSn
+// { PAD_PIN29},  // 0 : gpio14 / 3 : UART0 RXD
+// { PAD_PIN30},  // 0 : gpio15 / 3 : UART0 TXD
+#define RTE_UART0_RTS_BIT               27
+#define RTE_UART0_RTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_CTS_BIT               28
+#define RTE_UART0_CTS_FUNC              PAD_MUX_ALT3
+
+#define RTE_UART0_RX_BIT                29
+#define RTE_UART0_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART0_TX_BIT                30
+#define RTE_UART0_TX_FUNC               PAD_MUX_ALT3
+
+// DMA
+//  Tx
+//    Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_TX_REQID          DMA_REQUEST_USART0_TX
+//  Rx
+//    Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART0_DMA_RX_REQID          DMA_REQUEST_USART0_RX
+
+// UART1 (Universal asynchronous receiver transmitter) [Driver_USART1]
+// Configuration settings for Driver_USART1 in component ::Drivers:USART
+//#define RTE_UART1_CTS_PIN_EN            1
+//#define RTE_UART1_RTS_PIN_EN            1
+
+// { PAD_PIN31},  // 0 : gpio16  / 1 : UART1 RTS
+// { PAD_PIN32},  // 0 : gpio17  / 1 : UART1 CTS
+// { PAD_PIN33},  // 0 : gpio18  / 1 : UART1 RXD
+// { PAD_PIN34},  // 0 : gpio19  / 1 : UART1 TXD
+#define RTE_UART1_RTS_BIT               31
+#define RTE_UART1_RTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_CTS_BIT               32
+#define RTE_UART1_CTS_FUNC              PAD_MUX_ALT1
+
+#define RTE_UART1_RX_BIT                33
+#define RTE_UART1_RX_FUNC               PAD_MUX_ALT1
+
+#define RTE_UART1_TX_BIT                34
+#define RTE_UART1_TX_FUNC               PAD_MUX_ALT1
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_TX_REQID          DMA_REQUEST_USART1_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART1_DMA_RX_REQID          DMA_REQUEST_USART1_RX
+
+// UART2 (Universal asynchronous receiver transmitter) [Driver_USART2]
+// Configuration settings for Driver_USART2 in component ::Drivers:USART
+#define RTE_UART2_CTS_PIN_EN            0
+#define RTE_UART2_RTS_PIN_EN            0
+
+// { PAD_PIN25},  // 0 : gpio10 / 3 : UART2 RXD
+// { PAD_PIN26},  // 0 : gpio11 / 3 : UART2 TXD
+#define RTE_UART2_RX_BIT                25
+#define RTE_UART2_RX_FUNC               PAD_MUX_ALT3
+
+#define RTE_UART2_TX_BIT                26
+#define RTE_UART2_TX_FUNC               PAD_MUX_ALT3
+
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_TX_REQID          DMA_REQUEST_USART2_TX
+//   Rx
+//     Channel    <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_UART2_DMA_RX_REQID          DMA_REQUEST_USART2_RX
+
+// SPI0 (Serial Peripheral Interface) [Driver_SPI0]
+// Configuration settings for Driver_SPI0 in component ::Drivers:SPI
+#define RTE_SPI0                        1
+
+// { PAD_PIN21},  // 0 : gpio16 / 1 : UART1 RTS / 2 : SPI0 SSn
+// { PAD_PIN22},  // 0 : gpio11 / 1 : UART1 CTS / 2 : SPI0 MOSI
+// { PAD_PIN23},  // 0 : gpio14 / 1 : UART1 RXD / 2 : SPI0 MISO
+// { PAD_PIN24},  // 0 : gpio15 / 1 : UART1 TXD / 2 : SPI0 SCLK
+#define RTE_SPI0_SSN_BIT                21
+#define RTE_SPI0_SSN_FUNC               PAD_MUX_ALT2
+
+#define RTE_SPI0_MOSI_BIT               22
+#define RTE_SPI0_MOSI_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_MISO_BIT               23
+#define RTE_SPI0_MISO_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SCLK_BIT               24
+#define RTE_SPI0_SCLK_FUNC              PAD_MUX_ALT2
+
+#define RTE_SPI0_SSN_GPIO_INSTANCE      1
+#define RTE_SPI0_SSN_GPIO_INDEX         0
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_TX_REQID           DMA_REQUEST_SPI0_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI0_DMA_RX_REQID           DMA_REQUEST_SPI0_RX
+
+// SPI1 (Serial Peripheral Interface) [Driver_SPI1]
+// Configuration settings for Driver_SPI1 in component ::Drivers:SPI
+#define RTE_SPI1                        1
+
+// { PAD_PIN13},  // 0 : gpio2 / 1 : UART0 RTSn / 3 : SPI1 SSn
+// { PAD_PIN14},  // 0 : gpio3 / 1 : UART0 CTSn / 3 : SPI1 MOSI
+// { PAD_PIN15},  // 0 : gpio4 / 1 : UART0 RXD  / 3 : SPI1 MISO
+// { PAD_PIN16},  // 0 : gpio5 / 1 : UART0 TXD  / 3 : SPI1 SCLK
+#define RTE_SPI1_SSN_BIT                13
+#define RTE_SPI1_SSN_FUNC               PAD_MUX_ALT3
+
+#define RTE_SPI1_MOSI_BIT               14
+#define RTE_SPI1_MOSI_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_MISO_BIT               15
+#define RTE_SPI1_MISO_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SCLK_BIT               16
+#define RTE_SPI1_SCLK_FUNC              PAD_MUX_ALT3
+
+#define RTE_SPI1_SSN_GPIO_INSTANCE      0
+#define RTE_SPI1_SSN_GPIO_INDEX         2
+
+// DMA
+//   Tx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_TX_REQID           DMA_REQUEST_SPI1_TX
+
+//   Rx
+//     Channel     <0=>0 <1=>1 <2=>2 <3=>3 <4=>4 <5=>5 <6=>6 <7=>7
+#define RTE_SPI1_DMA_RX_REQID           DMA_REQUEST_SPI1_RX
+
+
+// PWM0 Controller [Driver_PWM0]
+// Configuration settings for Driver_PWM0 in component ::Drivers:PWM
+#define RTE_PWM                         1
+
+#define EFUSE_INIT_MODE POLLING_MODE
+#define L2CTLS_INIT_MODE POLLING_MODE
+
+#define FLASH_BARE_RW_MODE 1
+
+
+
+
+#define RTE_UART0                       1
+#define RTE_UART1                       1
+#define RTE_UART2                       1
+/* to enable external thermal */
+#define EXTERNAL_NTC_EXIST              0
+
+
+#if (RTE_UART1 == 1)
+#define UART1_DTR_PAD_INDEX             26     // GPIO11
+#define UART1_DTR_GPIO_INSTANCE         0
+#define UART1_DTR_GPIO_PIN              11
+
+#define UART1_RI_PAD_INDEX              44     // AONIO 4 = GPIO24
+#define UART1_RI_GPIO_INSTANCE          1
+#define UART1_RI_GPIO_PIN               8
+#define UART1_RI_PWM_INSTANCE           1
+#define UART1_RI_PWM_CLK_ID             FCLK_TIMER1
+#define UART1_RI_PWM_CLK_SEL            FCLK_TIMER1_SEL_26M
+
+#define UART1_DCD_PAD_INDEX             45     // AONIO 5 = GPIO25
+#define UART1_DCD_GPIO_INSTANCE         1
+#define UART1_DCD_GPIO_PIN              9
+#endif
+
+#if (RTE_UART2 == 1)
+#define UART2_DTR_PAD_INDEX             25     // GPIO10
+#define UART2_DTR_GPIO_INSTANCE         0
+#define UART2_DTR_GPIO_PIN              10
+
+#define UART2_RI_PAD_INDEX              43     // AONIO 3 = GPIO23
+#define UART2_RI_GPIO_INSTANCE          1
+#define UART2_RI_GPIO_PIN               7
+#define UART2_RI_PWM_INSTANCE           0
+#define UART2_RI_PWM_CLK_ID             FCLK_TIMER0
+#define UART2_RI_PWM_CLK_SEL            FCLK_TIMER0_SEL_26M
+
+#define UART2_DCD_PAD_INDEX             47     // AONIO 7 = GPIO27
+#define UART2_DCD_GPIO_INSTANCE         1
+#define UART2_DCD_GPIO_PIN              11
+#endif
+
+
+#define NETLIGHT_PAD_INDEX              46     // AONIO 6 = GPIO26
+#define NETLIGHT_PAD_ALT_FUNC           PAD_MUX_ALT5
+#define NETLIGHT_PWM_INSTANCE           3
+
+//USIM1 OPTION1
+#define USIM1_URST_OP1_PAD_INDEX             19     // GPIO4
+#define USIM1_URST_OP1_GPIO_INSTANCE         0
+#define USIM1_URST_OP1_GPIO_PIN              4
+#define USIM1_UCLK_OP1_PAD_INDEX             20     // GPIO5
+#define USIM1_UCLK_OP1_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP1_GPIO_PIN              5
+#define USIM1_UIO_OP1_PAD_INDEX              21     // GPIO6
+#define USIM1_UIO_OP1_GPIO_INSTANCE          0
+#define USIM1_UIO_OP1_GPIO_PIN               6
+
+//USIM1 OPTION2
+#define USIM1_UIO_OP2_PAD_INDEX              27     // GPIO12
+#define USIM1_UIO_OP2_GPIO_INSTANCE          0
+#define USIM1_UIO_OP2_GPIO_PIN               12
+#define USIM1_URST_OP2_PAD_INDEX             28     // GPIO13
+#define USIM1_URST_OP2_GPIO_INSTANCE         0
+#define USIM1_URST_OP2_GPIO_PIN              13
+#define USIM1_UCLK_OP2_PAD_INDEX             29     // GPIO14
+#define USIM1_UCLK_OP2_GPIO_INSTANCE         0
+#define USIM1_UCLK_OP2_GPIO_PIN              14
+
+//USIM1 clock latched by AONIO, for example, use AONIO-6 test on EVB
+#define AONIO_6_PAD_INDEX        46     // AONIO 6 = GPIO26
+#define AONIO_6_GPIO_INSTANCE    1
+#define AONIO_6_GPIO_PIN         10
+
+#define RTE_CSPI0                       0
+
+#define RTE_CSPI0_MCLK_PAD_ADDR         39
+#define RTE_CSPI0_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_PCLK_PAD_ADDR         35
+#define RTE_CSPI0_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_CS_PAD_ADDR           36
+#define RTE_CSPI0_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO0_PAD_ADDR         37
+#define RTE_CSPI0_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI0_SDO1_PAD_ADDR         38
+#define RTE_CSPI0_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI0 Request ID
+#define RTE_CSPI0_DMA_RX_REQID          DMA_REQUEST_I2S0_RX
+
+// CSPI1 Configuration
+#define RTE_CSPI1                       1
+
+#define RTE_CSPI1_MCLK_PAD_ADDR         18
+#define RTE_CSPI1_MCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_PCLK_PAD_ADDR         19
+#define RTE_CSPI1_PCLK_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_CS_PAD_ADDR           20
+#define RTE_CSPI1_CS_FUNC               PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO0_PAD_ADDR         21
+#define RTE_CSPI1_SDO0_FUNC             PAD_MUX_ALT1
+
+#define RTE_CSPI1_SDO1_PAD_ADDR         22
+#define RTE_CSPI1_SDO1_FUNC             PAD_MUX_ALT1
+
+// DMA CSPI1 Request ID
+#define RTE_CSPI1_DMA_RX_REQID          DMA_REQUEST_I2S1_RX
+
+#endif  /* __RTE_DEVICE_H */

sdk/合宙/air780e/csdk/wu_mei/inc/app.h

@@ -0,0 +1,22 @@
+#pragma once
+
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-23
+
+Description: <20><><EFBFBD><EFBFBD>app <20>Խӿ<D4BD><D3BF><EFBFBD>
+
+**************************************************************************/
+
+//const char* pstrVersion = "0.1";
+//const char* pstrUserId = "1";
+
+const char* getFunctionData(char* pGetDataBuffer, int nLength, const char* pstrRecvMessage);
+const char* getPropertyData(char* pGetDataBuffer, int nLength, const char* pstrRecvMessage);
+const char* getInformationData(char* pGetDataBuffer, int nLength, const char* pstrRecvMessage);
+const char* getEventData(char* pGetDataBuffer, int nLength, const char* pstrRecvMessage);

sdk/合宙/air780e/csdk/wu_mei/inc/base64.h

@@ -0,0 +1,38 @@
+/**
+ * \file base64.h
+ *
+ * \brief RFC 1521 base64 encoding/decoding
+ */
+/*
+ *  Copyright The Mbed TLS Contributors
+ *  SPDX-License-Identifier: Apache-2.0
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may
+ *  not use this file except in compliance with the License.
+ *  You may obtain a copy of the License at
+ *
+ *  http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *  See the License for the specific language governing permissions and
+ *  limitations under the License.
+ */
+#ifndef MBEDTLS_BASE64_H
+#define MBEDTLS_BASE64_H
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int32_t iBase64Encode(const uint8_t *pcInputData, int32_t iInputLength, uint8_t *pucOutputData);
+int32_t iBase64Decode(const uint8_t *pcInputData, int32_t iInputLength, uint8_t *pucOutputData);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* base64.h */

sdk/合宙/air780e/csdk/wu_mei/inc/comAuth.h

@@ -0,0 +1,52 @@
+#pragma once
+
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-20
+
+Description: <20><><EFBFBD><EFBFBD>csdk <20><>֤
+
+**************************************************************************/
+char* getComAuthUser();
+char* getComAuthPassword();
+char* getComAuthClientId();
+char* getComAuthIp();
+/*û<>з<EFBFBD><D0B7><EFBFBD>ֵ <20><><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>0 ʧ<><CAA7> 1<>ɹ<EFBFBD>*/
+typedef void(*pComAuthResultFunction)(unsigned char );
+
+/*
+*Summary:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><D6A4>ʼ<EFBFBD><CABC>
+*Parameters:
+* pstrEncryptionMode <20><><EFBFBD><EFBFBD>ģʽ
+* pstrProductId <20><>ƷID
+* pstrDeviceId <20>豸ID
+* pstrUserId <20>û<EFBFBD>ID
+* pstrUse <20>û<EFBFBD>
+* pstrPassword <20><><EFBFBD><EFBFBD>
+* nTimeout <20><><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1> <20><>Ϊ<EFBFBD><CEAA>λ
+* pstrIp ip
+* pstrDeviceAuthorizationCode <20>豸<EFBFBD><E8B1B8>֤code
+* pstrProductPassword <20><>Ʒ<EFBFBD><C6B7><EFBFBD><EFBFBD>
+* callback <20>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
+*Return:
+*/
+void ComAuthInit(
+	const char* pstrEncryptionMode, 
+	const int nProductId,
+	const char* pstrDeviceId, 
+	const char* pstrUserId, 
+	const char* pstrUser, 
+	const char* pstrPassword, 
+	unsigned int nTimeout, 
+	const char* pstrIp, 
+	const char* pstrDeviceAuthorizationCode, 
+	const char* pstrProductPassword, 
+	void* callback
+);
+
+

sdk/合宙/air780e/csdk/wu_mei/inc/comInteraction.h

@@ -0,0 +1,84 @@
+#pragma once
+
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-19
+
+Description: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+
+**************************************************************************/
+
+typedef void(*fnCallbackSendData)(const char* pstrTopic, const char* pstrMessage, unsigned char nQs);
+typedef const char* (*fnCallbackGetMessage)(char* pGetDataBuffer, int nLength, const char* pstrRecvMessage);
+/*
+*Summary:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
+*Parameters:
+* pstrProductId <20><>ƷID
+* pstrDeviceNum <20>豸<EFBFBD><E8B1B8><EFBFBD><EFBFBD> IMEI
+* callbackSendData <20><><EFBFBD>ݷ<EFBFBD><DDB7>ͺ<EFBFBD><CDBA><EFBFBD>
+* callbackPropertyData <20><>Ʒ<EFBFBD><C6B7>ȡ
+*Return:
+*/
+void comInteractionInit(
+	const int nProductId,
+	const char* pstrDeviceNum,
+	void* callbackSendData,
+	void* callbackPropertyData,
+	void* callbackFunctionData,
+	void* callbackEventData,
+	void* callbackDeviceInformationData);
+/*
+*Summary:<3A><>ʱ<EFBFBD><CAB1>ʼ<EFBFBD><CABC>
+*Parameters:
+*Return:
+*/
+void comInteractionDelayInit();
+
+/*
+*Summary:<3A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Է<EFBFBD><D4B7><EFBFBD>
+*Parameters:
+* nTime <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 0ֹͣ<CDA3><D6B9>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
+*Return:
+*/
+void setPropertyPush(unsigned int nTime);
+
+/*
+*Summary:<3A><><EFBFBD>ù<EFBFBD><C3B9>ܷ<EFBFBD><DCB7><EFBFBD>
+*Parameters:
+* nTime <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 0ֹͣ<CDA3><D6B9>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
+*Return:
+*/
+void setFunctionPush(unsigned int nTime);
+
+/*
+*Summary:<3A><><EFBFBD><EFBFBD><EFBFBD>¼<EFBFBD><C2BC><EFBFBD><EFBFBD><EFBFBD>
+*Parameters:
+* nTime <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, 0ֹͣ<CDA3><D6B9>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
+*Return:
+*/
+void setEventPush(unsigned int nTime);
+
+/*
+*Summary:<3A><>ȡҪ<C8A1><D2AA><EFBFBD>ĵ<EFBFBD><C4B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+*Parameters:
+*Return: <20><><EFBFBD><EFBFBD><EFBFBD>ڲ<EFBFBD><DAB2>ַ<EFBFBD><D6B7><EFBFBD> <20>ѷָ<D1B7><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɶ<EFBFBD><C9B6><EFBFBD>
+*/
+const char* getSubscriberAll();
+
+/*
+*Summary:<3A><><EFBFBD>ݻص<DDBB><D8B5><EFBFBD><EFBFBD><EFBFBD>
+*Parameters:
+* pstrTopic <20><><EFBFBD><EFBFBD>
+* pstrmessage <20><>Ϣ
+*Return:
+*/
+void onRecvData(const char* pstrTopic, const char* pstrmessage);
+
+void triggerPropertyPush();
+void triggerFunctionPush();
+void triggerEventPush();

sdk/合宙/air780e/csdk/wu_mei/inc/header.h

@@ -0,0 +1,15 @@
+#pragma once
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD>
+
+Date: 2022-11-19
+
+Description: <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD>
+
+**************************************************************************/
+#include "common_api.h"
+#include "luat_debug.h"
+#include "luat_rtos.h"

sdk/合宙/air780e/csdk/wu_mei/inc/optocoupler.h

@@ -0,0 +1,18 @@
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-19
+
+Description: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD>
+
+**************************************************************************/
+#include "luat_gpio.h"
+#include "platform_define.h"
+
+void optocouplerInit();
+
+unsigned char getOptocoupler(unsigned char nIndex);

sdk/合宙/air780e/csdk/wu_mei/inc/relay.h

@@ -0,0 +1,35 @@
+#pragma once
+
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-19
+
+Description: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>̵<EFBFBD><CCB5><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD>
+
+**************************************************************************/
+#include "luat_gpio.h"
+#include "platform_define.h"
+
+
+/*
+*Summary:<3A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
+*Parameters:
+*Return:
+*/
+void relayInit();
+
+/*
+*Summary:<3A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+*Parameters:
+*	nRelayIndex:<3A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>
+*   nValue <20><><EFBFBD><EFBFBD>ֵ
+*Return: 0 ʧ<><CAA7> 1<>ɹ<EFBFBD>
+*/
+unsigned char relayControl(unsigned char nRelayIndex, unsigned char nValue);
+
+unsigned char relayGetValue(unsigned char nRelayIndex);

sdk/合宙/air780e/csdk/wu_mei/inc/uart.h

@@ -0,0 +1,18 @@
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-12-01
+
+Description: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD>
+
+**************************************************************************/
+#include "luat_uart.h"
+
+void uartInit();
+void uartSend(unsigned char nUartId, unsigned char* pnData, unsigned int nLength);
+unsigned char* getUartBuffer(unsigned char nUartId);
+unsigned int getUartRxLength(unsigned char nUartId);

sdk/合宙/air780e/csdk/wu_mei/inc/wuMeiLed.h

@@ -0,0 +1,33 @@
+#pragma once
+
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-23
+
+Description: <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Led 
+
+**************************************************************************/
+#include "luat_gpio.h"
+#include "platform_define.h"
+
+
+/*
+*Summary:<3A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>
+*Parameters:
+*Return:
+*/
+void ledInit();
+
+/*
+*Summary:<3A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+*Parameters:
+*	nledIndex:<3A>̵<EFBFBD><CCB5><EFBFBD><EFBFBD><EFBFBD>
+*   nValue <20><><EFBFBD><EFBFBD>ֵ
+*Return: 0 ʧ<><CAA7> 1<>ɹ<EFBFBD>
+*/
+unsigned char ledControl(unsigned char nledIndex, unsigned char nValue);

sdk/合宙/air780e/csdk/wu_mei/inc/wuMeiMqtt.h

@@ -0,0 +1,16 @@
+#pragma once
+
+#include "header.h"
+/**************************************************************************
+
+Copyright: <20><><EFBFBD>˽<EFBFBD>
+
+Author: <20><><EFBFBD>˽<EFBFBD> 1066950103@qq.com
+
+Date: 2022-11-23
+
+Description: mqtt <20><><EFBFBD><EFBFBD>
+
+**************************************************************************/
+
+void wuMeiMqttConnectPool(unsigned char nNetStatus);