mirror of
https://gitee.com/beecue/fastbee.git
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添加智能灯固件代码
This commit is contained in:
kerwincui
@@ -0,0 +1,2 @@
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idf_component_register(SRC_DIRS "."
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INCLUDE_DIRS "include" )
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19
firmware/esp-idf/wumei-smart-firmware/components/bus/Kconfig
Normal file
19
firmware/esp-idf/wumei-smart-firmware/components/bus/Kconfig
Normal file
@@ -0,0 +1,19 @@
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menu "Bus Options"
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menu "I2C Bus Options"
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config I2C_BUS_DYNAMIC_CONFIG
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bool "enable dynamic configuration"
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default y
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help
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If enable, i2c_bus will dynamically check configs and re-install i2c driver before each transfer,
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hence multiple devices with different configs on a single bus can be supported.
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config I2C_MS_TO_WAIT
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int "mutex block time"
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default 200
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range 50 5000
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help
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task block time when try to take the bus, unit:milliseconds
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endmenu
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endmenu
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@@ -0,0 +1,7 @@
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#
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# "main" pseudo-component makefile.
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#
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# (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.)
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COMPONENT_ADD_INCLUDEDIRS := include
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COMPONENT_SRCDIRS := .
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487
firmware/esp-idf/wumei-smart-firmware/components/bus/i2c_bus.c
Normal file
487
firmware/esp-idf/wumei-smart-firmware/components/bus/i2c_bus.c
Normal file
@@ -0,0 +1,487 @@
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// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdio.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "esp_log.h"
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#include "i2c_bus.h"
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#define I2C_ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
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#define I2C_ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
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#define I2C_BUS_FLG_DEFAULT (0)
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#define I2C_BUS_MASTER_BUF_LEN (0)
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#define I2C_BUS_MS_TO_WAIT CONFIG_I2C_MS_TO_WAIT
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#define I2C_BUS_TICKS_TO_WAIT (I2C_BUS_MS_TO_WAIT/portTICK_RATE_MS)
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#define I2C_BUS_MUTEX_TICKS_TO_WAIT (I2C_BUS_MS_TO_WAIT/portTICK_RATE_MS)
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typedef struct {
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i2c_port_t i2c_port; /*!<I2C port number */
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bool is_init; /*if bus is initialized*/
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i2c_config_t conf_active; /*!<I2C active configuration */
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SemaphoreHandle_t mutex; /* mutex to achive thread-safe*/
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int32_t ref_counter; /*reference count*/
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} i2c_bus_t;
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typedef struct {
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uint8_t dev_addr; /*device address*/
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i2c_config_t conf; /*!<I2C active configuration */
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i2c_bus_t *i2c_bus; /*!<I2C bus*/
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} i2c_bus_device_t;
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static const char *TAG = "i2c_bus";
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static i2c_bus_t s_i2c_bus[I2C_NUM_MAX];
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#define I2C_BUS_CHECK(a, str, ret) if(!(a)) { \
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ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
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return (ret); \
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}
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#define I2C_BUS_CHECK_GOTO(a, str, lable) if(!(a)) { \
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ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
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goto lable; \
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}
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#define I2C_BUS_INIT_CHECK(is_init, ret) if(!is_init) { \
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ESP_LOGE(TAG,"%s:%d (%s):i2c_bus has not inited", __FILE__, __LINE__, __FUNCTION__); \
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return (ret); \
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}
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#define I2C_BUS_MUTEX_TAKE(mutex, ret) if (!xSemaphoreTake(mutex, I2C_BUS_MUTEX_TICKS_TO_WAIT)) { \
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ESP_LOGE(TAG, "i2c_bus take mutex timeout, max wait = %d ms", I2C_BUS_MUTEX_TICKS_TO_WAIT); \
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return (ret); \
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}
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#define I2C_BUS_MUTEX_TAKE_MAX_DELAY(mutex, ret) if (!xSemaphoreTake(mutex, portMAX_DELAY)) { \
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ESP_LOGE(TAG, "i2c_bus take mutex timeout, max wait = %d ms", portMAX_DELAY); \
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return (ret); \
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}
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#define I2C_BUS_MUTEX_GIVE(mutex, ret) if (!xSemaphoreGive(mutex)) { \
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ESP_LOGE(TAG, "i2c_bus give mutex failed"); \
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return (ret); \
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}
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static esp_err_t i2c_driver_reinit(i2c_port_t port, const i2c_config_t *conf);
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static esp_err_t i2c_driver_deinit(i2c_port_t port);
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static esp_err_t i2c_bus_write_reg8(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, const uint8_t *data);
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static esp_err_t i2c_bus_read_reg8(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, uint8_t *data);
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inline static bool i2c_config_compare(i2c_port_t port, const i2c_config_t *conf);
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/**************************************** Public Functions (Application level)*********************************************/
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i2c_bus_handle_t i2c_bus_create(i2c_port_t port, const i2c_config_t *conf)
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{
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I2C_BUS_CHECK(port < I2C_NUM_MAX, "I2C port error", NULL);
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I2C_BUS_CHECK(conf != NULL, "pointer = NULL error", NULL);
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I2C_BUS_CHECK(conf->mode == I2C_MODE_MASTER, "i2c_bus only supports master mode", NULL);
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if (s_i2c_bus[port].is_init) {
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/**if i2c_bus has been inited and configs not changed, return the handle directly**/
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if (i2c_config_compare(port, conf)) {
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ESP_LOGW(TAG, "i2c%d has been inited, return handle directly, ref_counter=%d", port, s_i2c_bus[port].ref_counter);
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return (i2c_bus_handle_t)&s_i2c_bus[port];
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}
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} else {
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s_i2c_bus[port].mutex = xSemaphoreCreateMutex();
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I2C_BUS_CHECK(s_i2c_bus[port].mutex != NULL, "i2c_bus xSemaphoreCreateMutex failed", NULL);
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s_i2c_bus[port].ref_counter = 0;
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}
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esp_err_t ret = i2c_driver_reinit(port, conf);
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I2C_BUS_CHECK(ret == ESP_OK, "init error", NULL);
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s_i2c_bus[port].conf_active = *conf;
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s_i2c_bus[port].i2c_port = port;
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return (i2c_bus_handle_t)&s_i2c_bus[port];
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}
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esp_err_t i2c_bus_delete(i2c_bus_handle_t *p_bus)
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{
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I2C_BUS_CHECK(p_bus != NULL && *p_bus != NULL, "pointer = NULL error", ESP_ERR_INVALID_ARG);
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i2c_bus_t *i2c_bus = (i2c_bus_t *)(*p_bus);
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I2C_BUS_INIT_CHECK(i2c_bus->is_init, ESP_FAIL);
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I2C_BUS_MUTEX_TAKE_MAX_DELAY(i2c_bus->mutex, ESP_ERR_TIMEOUT);
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/** if ref_counter == 0, de-init the bus**/
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if ((i2c_bus->ref_counter) > 0) {
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ESP_LOGW(TAG, "i2c%d is also handled by others ref_counter=%u, won't be de-inited", i2c_bus->i2c_port, i2c_bus->ref_counter);
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return ESP_OK;
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}
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esp_err_t ret = i2c_driver_deinit(i2c_bus->i2c_port);
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I2C_BUS_CHECK(ret == ESP_OK, "deinit error", ret);
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vSemaphoreDelete(i2c_bus->mutex);
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*p_bus = NULL;
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return ESP_OK;
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}
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uint8_t i2c_bus_scan(i2c_bus_handle_t bus_handle, uint8_t *buf, uint8_t num)
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{
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I2C_BUS_CHECK(bus_handle != NULL, "Handle error", 0);
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i2c_bus_t *i2c_bus = (i2c_bus_t *)bus_handle;
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I2C_BUS_INIT_CHECK(i2c_bus->is_init, 0);
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uint8_t device_count = 0;
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I2C_BUS_MUTEX_TAKE_MAX_DELAY(i2c_bus->mutex, 0);
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for (uint8_t dev_address = 1; dev_address < 127; dev_address++) {
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, (dev_address << 1) | I2C_MASTER_WRITE, I2C_ACK_CHECK_EN);
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i2c_master_stop(cmd);
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esp_err_t ret = i2c_master_cmd_begin(i2c_bus->i2c_port, cmd, I2C_BUS_TICKS_TO_WAIT);
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if (ret == ESP_OK) {
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ESP_LOGI(TAG, "found i2c device address = 0x%02x", dev_address);
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if (buf != NULL && device_count < num) {
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*(buf + device_count) = dev_address;
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}
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device_count++;
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}
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i2c_cmd_link_delete(cmd);
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}
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I2C_BUS_MUTEX_GIVE(i2c_bus->mutex, 0);
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return device_count;
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}
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uint32_t i2c_bus_get_current_clk_speed(i2c_bus_handle_t bus_handle)
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{
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I2C_BUS_CHECK(bus_handle != NULL, "Null Bus Handle", 0);
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i2c_bus_t *i2c_bus = (i2c_bus_t *)bus_handle;
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I2C_BUS_INIT_CHECK(i2c_bus->is_init, 0);
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return i2c_bus->conf_active.master.clk_speed;
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}
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uint8_t i2c_bus_get_created_device_num(i2c_bus_handle_t bus_handle)
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{
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I2C_BUS_CHECK(bus_handle != NULL, "Null Bus Handle", 0);
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i2c_bus_t *i2c_bus = (i2c_bus_t *)bus_handle;
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I2C_BUS_INIT_CHECK(i2c_bus->is_init, 0);
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return i2c_bus->ref_counter;
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}
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i2c_bus_device_handle_t i2c_bus_device_create(i2c_bus_handle_t bus_handle, uint8_t dev_addr, uint32_t clk_speed)
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{
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I2C_BUS_CHECK(bus_handle != NULL, "Null Bus Handle", NULL);
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I2C_BUS_CHECK(clk_speed <= 400000, "clk_speed must <= 400000", NULL);
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i2c_bus_t *i2c_bus = (i2c_bus_t *)bus_handle;
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I2C_BUS_INIT_CHECK(i2c_bus->is_init, NULL);
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i2c_bus_device_t *i2c_device = calloc(1, sizeof(i2c_bus_device_t));
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I2C_BUS_CHECK(i2c_device != NULL, "calloc memory failed", NULL);
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I2C_BUS_MUTEX_TAKE_MAX_DELAY(i2c_bus->mutex, NULL);
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i2c_device->dev_addr = dev_addr;
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i2c_device->conf = i2c_bus->conf_active;
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/*if clk_speed == 0, current active clock speed will be used, else set a specified value*/
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if (clk_speed != 0) {
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i2c_device->conf.master.clk_speed = clk_speed;
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}
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i2c_device->i2c_bus = i2c_bus;
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i2c_bus->ref_counter++;
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I2C_BUS_MUTEX_GIVE(i2c_bus->mutex, NULL);
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return (i2c_bus_device_handle_t)i2c_device;
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}
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esp_err_t i2c_bus_device_delete(i2c_bus_device_handle_t *p_dev_handle)
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{
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I2C_BUS_CHECK(p_dev_handle != NULL && *p_dev_handle != NULL, "Null Device Handle", ESP_ERR_INVALID_ARG);
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i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)(*p_dev_handle);
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I2C_BUS_MUTEX_TAKE_MAX_DELAY(i2c_device->i2c_bus->mutex, ESP_ERR_TIMEOUT);
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i2c_device->i2c_bus->ref_counter--;
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I2C_BUS_MUTEX_GIVE(i2c_device->i2c_bus->mutex, ESP_FAIL);
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free(i2c_device);
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*p_dev_handle = NULL;
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return ESP_OK;
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}
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uint8_t i2c_bus_device_get_address(i2c_bus_device_handle_t dev_handle)
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{
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I2C_BUS_CHECK(dev_handle != NULL, "device handle error", NULL_I2C_DEV_ADDR);
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i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)dev_handle;
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return i2c_device->dev_addr;
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}
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esp_err_t i2c_bus_read_bytes(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, uint8_t *data)
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{
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return i2c_bus_read_reg8(dev_handle, mem_address, data_len, data);
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}
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esp_err_t i2c_bus_read_byte(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t *data)
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{
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return i2c_bus_read_reg8(dev_handle, mem_address, 1, data);
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}
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esp_err_t i2c_bus_read_bit(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_num, uint8_t *data)
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{
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uint8_t byte = 0;
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esp_err_t ret = i2c_bus_read_reg8(dev_handle, mem_address, 1, &byte);
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*data = byte & (1 << bit_num);
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*data = (*data != 0) ? 1 : 0;
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return ret;
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}
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esp_err_t i2c_bus_read_bits(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_start, uint8_t length, uint8_t *data)
|
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{
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uint8_t byte = 0;
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esp_err_t ret = i2c_bus_read_byte(dev_handle, mem_address, &byte);
|
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|
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if (ret != ESP_OK) {
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return ret;
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}
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uint8_t mask = ((1 << length) - 1) << (bit_start - length + 1);
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byte &= mask;
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byte >>= (bit_start - length + 1);
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*data = byte;
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return ret;
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}
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esp_err_t i2c_bus_write_byte(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t data)
|
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{
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return i2c_bus_write_reg8(dev_handle, mem_address, 1, &data);
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}
|
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esp_err_t i2c_bus_write_bytes(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, const uint8_t *data)
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{
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return i2c_bus_write_reg8(dev_handle, mem_address, data_len, data);
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}
|
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|
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esp_err_t i2c_bus_write_bit(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_num, uint8_t data)
|
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{
|
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uint8_t byte = 0;
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esp_err_t ret = i2c_bus_read_byte(dev_handle, mem_address, &byte);
|
||||
|
||||
if (ret != ESP_OK) {
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return ret;
|
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}
|
||||
|
||||
byte = (data != 0) ? (byte | (1 << bit_num)) : (byte & ~(1 << bit_num));
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||||
return i2c_bus_write_byte(dev_handle, mem_address, byte);
|
||||
}
|
||||
|
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esp_err_t i2c_bus_write_bits(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_start, uint8_t length, uint8_t data)
|
||||
{
|
||||
uint8_t byte = 0;
|
||||
esp_err_t ret = i2c_bus_read_byte(dev_handle, mem_address, &byte);
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
uint8_t mask = ((1 << length) - 1) << (bit_start - length + 1);
|
||||
data <<= (bit_start - length + 1); // shift data into correct position
|
||||
data &= mask; // zero all non-important bits in data
|
||||
byte &= ~(mask); // zero all important bits in existing byte
|
||||
byte |= data; // combine data with existing byte
|
||||
return i2c_bus_write_byte(dev_handle, mem_address, byte);
|
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}
|
||||
|
||||
/**
|
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* @brief I2C master send queued commands.
|
||||
* This function will trigger sending all queued commands.
|
||||
* The task will be blocked until all the commands have been sent out.
|
||||
* If I2C_BUS_DYNAMIC_CONFIG enable, i2c_bus will dynamically check configs and re-install i2c driver before each transfer,
|
||||
* hence multiple devices with different configs on a single bus can be supported.
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param cmd_handle I2C command handler
|
||||
* @param ticks_to_wait maximum wait ticks.
|
||||
* @param conf pointer to I2C parameter settings
|
||||
* @return esp_err_t
|
||||
*/
|
||||
inline static esp_err_t i2c_master_cmd_begin_with_conf(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait, const i2c_config_t *conf)
|
||||
{
|
||||
esp_err_t ret;
|
||||
#ifdef CONFIG_I2C_BUS_DYNAMIC_CONFIG
|
||||
/*if configs changed, i2c driver will reinit with new configuration*/
|
||||
if (conf != NULL && false == i2c_config_compare(i2c_num, conf)) {
|
||||
ret = i2c_driver_reinit(i2c_num, conf);
|
||||
I2C_BUS_CHECK(ret == ESP_OK, "reinit error", ret);
|
||||
s_i2c_bus[i2c_num].conf_active = *conf;
|
||||
}
|
||||
#endif
|
||||
ret = i2c_master_cmd_begin(i2c_num, cmd_handle, ticks_to_wait);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**************************************** Public Functions (Low level)*********************************************/
|
||||
|
||||
esp_err_t i2c_bus_cmd_begin(i2c_bus_device_handle_t dev_handle, i2c_cmd_handle_t cmd)
|
||||
{
|
||||
I2C_BUS_CHECK(dev_handle != NULL, "device handle error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(cmd != NULL, "I2C command error", ESP_ERR_INVALID_ARG);
|
||||
i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)dev_handle;
|
||||
I2C_BUS_INIT_CHECK(i2c_device->i2c_bus->is_init, ESP_ERR_INVALID_STATE);
|
||||
I2C_BUS_MUTEX_TAKE(i2c_device->i2c_bus->mutex, ESP_ERR_TIMEOUT);
|
||||
esp_err_t ret = i2c_master_cmd_begin_with_conf(i2c_device->i2c_bus->i2c_port, cmd, I2C_BUS_TICKS_TO_WAIT, &i2c_device->conf);
|
||||
I2C_BUS_MUTEX_GIVE(i2c_device->i2c_bus->mutex, ESP_FAIL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t i2c_bus_read_reg8(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, uint8_t *data)
|
||||
{
|
||||
I2C_BUS_CHECK(dev_handle != NULL, "device handle error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(data != NULL, "data pointer error", ESP_ERR_INVALID_ARG);
|
||||
i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)dev_handle;
|
||||
I2C_BUS_INIT_CHECK(i2c_device->i2c_bus->is_init, ESP_ERR_INVALID_STATE);
|
||||
I2C_BUS_MUTEX_TAKE(i2c_device->i2c_bus->mutex, ESP_ERR_TIMEOUT);
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
|
||||
if (mem_address != NULL_I2C_MEM_ADDR) {
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, (i2c_device->dev_addr << 1) | I2C_MASTER_WRITE, I2C_ACK_CHECK_EN);
|
||||
i2c_master_write_byte(cmd, mem_address, I2C_ACK_CHECK_EN);
|
||||
}
|
||||
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, (i2c_device->dev_addr << 1) | I2C_MASTER_READ, I2C_ACK_CHECK_EN);
|
||||
i2c_master_read(cmd, data, data_len, I2C_MASTER_LAST_NACK);
|
||||
i2c_master_stop(cmd);
|
||||
esp_err_t ret = i2c_master_cmd_begin_with_conf(i2c_device->i2c_bus->i2c_port, cmd, I2C_BUS_TICKS_TO_WAIT, &i2c_device->conf);
|
||||
i2c_cmd_link_delete(cmd);
|
||||
I2C_BUS_MUTEX_GIVE(i2c_device->i2c_bus->mutex, ESP_FAIL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
esp_err_t i2c_bus_read_reg16(i2c_bus_device_handle_t dev_handle, uint16_t mem_address, size_t data_len, uint8_t *data)
|
||||
{
|
||||
I2C_BUS_CHECK(dev_handle != NULL, "device handle error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(data != NULL, "data pointer error", ESP_ERR_INVALID_ARG);
|
||||
i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)dev_handle;
|
||||
I2C_BUS_INIT_CHECK(i2c_device->i2c_bus->is_init, ESP_ERR_INVALID_STATE);
|
||||
uint8_t memAddress8[2];
|
||||
memAddress8[0] = (uint8_t)((mem_address >> 8) & 0x00FF);
|
||||
memAddress8[1] = (uint8_t)(mem_address & 0x00FF);
|
||||
I2C_BUS_MUTEX_TAKE(i2c_device->i2c_bus->mutex, ESP_ERR_TIMEOUT);
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
|
||||
if (mem_address != NULL_I2C_MEM_ADDR) {
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, (i2c_device->dev_addr << 1) | I2C_MASTER_WRITE, I2C_ACK_CHECK_EN);
|
||||
i2c_master_write(cmd, memAddress8, 2, I2C_ACK_CHECK_EN);
|
||||
}
|
||||
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, (i2c_device->dev_addr << 1) | I2C_MASTER_READ, I2C_ACK_CHECK_EN);
|
||||
i2c_master_read(cmd, data, data_len, I2C_MASTER_LAST_NACK);
|
||||
i2c_master_stop(cmd);
|
||||
esp_err_t ret = i2c_master_cmd_begin_with_conf(i2c_device->i2c_bus->i2c_port, cmd, I2C_BUS_TICKS_TO_WAIT, &i2c_device->conf);
|
||||
i2c_cmd_link_delete(cmd);
|
||||
I2C_BUS_MUTEX_GIVE(i2c_device->i2c_bus->mutex, ESP_FAIL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static esp_err_t i2c_bus_write_reg8(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, const uint8_t *data)
|
||||
{
|
||||
I2C_BUS_CHECK(dev_handle != NULL, "device handle error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(data != NULL, "data pointer error", ESP_ERR_INVALID_ARG);
|
||||
i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)dev_handle;
|
||||
I2C_BUS_INIT_CHECK(i2c_device->i2c_bus->is_init, ESP_ERR_INVALID_STATE);
|
||||
I2C_BUS_MUTEX_TAKE(i2c_device->i2c_bus->mutex, ESP_ERR_TIMEOUT);
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, (i2c_device->dev_addr << 1) | I2C_MASTER_WRITE, I2C_ACK_CHECK_EN);
|
||||
|
||||
if (mem_address != NULL_I2C_MEM_ADDR) {
|
||||
i2c_master_write_byte(cmd, mem_address, I2C_ACK_CHECK_EN);
|
||||
}
|
||||
|
||||
i2c_master_write(cmd, (uint8_t *)data, data_len, I2C_ACK_CHECK_EN);
|
||||
i2c_master_stop(cmd);
|
||||
esp_err_t ret = i2c_master_cmd_begin_with_conf(i2c_device->i2c_bus->i2c_port, cmd, I2C_BUS_TICKS_TO_WAIT, &i2c_device->conf);
|
||||
i2c_cmd_link_delete(cmd);
|
||||
I2C_BUS_MUTEX_GIVE(i2c_device->i2c_bus->mutex, ESP_FAIL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
esp_err_t i2c_bus_write_reg16(i2c_bus_device_handle_t dev_handle, uint16_t mem_address, size_t data_len, const uint8_t *data)
|
||||
{
|
||||
I2C_BUS_CHECK(dev_handle != NULL, "device handle error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(data != NULL, "data pointer error", ESP_ERR_INVALID_ARG);
|
||||
i2c_bus_device_t *i2c_device = (i2c_bus_device_t *)dev_handle;
|
||||
I2C_BUS_INIT_CHECK(i2c_device->i2c_bus->is_init, ESP_ERR_INVALID_STATE);
|
||||
uint8_t memAddress8[2];
|
||||
memAddress8[0] = (uint8_t)((mem_address >> 8) & 0x00FF);
|
||||
memAddress8[1] = (uint8_t)(mem_address & 0x00FF);
|
||||
I2C_BUS_MUTEX_TAKE(i2c_device->i2c_bus->mutex, ESP_ERR_TIMEOUT);
|
||||
i2c_cmd_handle_t cmd = i2c_cmd_link_create();
|
||||
i2c_master_start(cmd);
|
||||
i2c_master_write_byte(cmd, (i2c_device->dev_addr << 1) | I2C_MASTER_WRITE, I2C_ACK_CHECK_EN);
|
||||
|
||||
if (mem_address != NULL_I2C_MEM_ADDR) {
|
||||
i2c_master_write(cmd, memAddress8, 2, I2C_ACK_CHECK_EN);
|
||||
}
|
||||
|
||||
i2c_master_write(cmd, (uint8_t *)data, data_len, I2C_ACK_CHECK_EN);
|
||||
i2c_master_stop(cmd);
|
||||
esp_err_t ret = i2c_master_cmd_begin_with_conf(i2c_device->i2c_bus->i2c_port, cmd, I2C_BUS_TICKS_TO_WAIT, &i2c_device->conf);
|
||||
i2c_cmd_link_delete(cmd);
|
||||
I2C_BUS_MUTEX_GIVE(i2c_device->i2c_bus->mutex, ESP_FAIL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**************************************** Private Functions*********************************************/
|
||||
static esp_err_t i2c_driver_reinit(i2c_port_t port, const i2c_config_t *conf)
|
||||
{
|
||||
I2C_BUS_CHECK(port < I2C_NUM_MAX, "i2c port error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(conf != NULL, "pointer = NULL error", ESP_ERR_INVALID_ARG);
|
||||
|
||||
if (s_i2c_bus[port].is_init) {
|
||||
i2c_driver_delete(port);
|
||||
s_i2c_bus[port].is_init = false;
|
||||
ESP_LOGI(TAG, "i2c%d bus deinited", port);
|
||||
}
|
||||
|
||||
esp_err_t ret = i2c_param_config(port, conf);
|
||||
I2C_BUS_CHECK(ret == ESP_OK, "i2c param config failed", ret);
|
||||
ret = i2c_driver_install(port, conf->mode, I2C_BUS_MASTER_BUF_LEN, I2C_BUS_MASTER_BUF_LEN, I2C_BUS_FLG_DEFAULT);
|
||||
I2C_BUS_CHECK(ret == ESP_OK, "i2c driver install failed", ret);
|
||||
s_i2c_bus[port].is_init = true;
|
||||
ESP_LOGI(TAG, "i2c%d bus inited", port);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t i2c_driver_deinit(i2c_port_t port)
|
||||
{
|
||||
I2C_BUS_CHECK(port < I2C_NUM_MAX, "i2c port error", ESP_ERR_INVALID_ARG);
|
||||
I2C_BUS_CHECK(s_i2c_bus[port].is_init == true, "i2c not inited", ESP_ERR_INVALID_STATE);
|
||||
i2c_driver_delete(port); //always return ESP_OK
|
||||
s_i2c_bus[port].is_init = false;
|
||||
ESP_LOGI(TAG,"i2c%d bus deinited",port);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief compare with active i2c_bus configuration
|
||||
*
|
||||
* @param port choose which i2c_port's configuration will be compared
|
||||
* @param conf new configuration
|
||||
* @return true new configuration is equal to active configuration
|
||||
* @return false new configuration is not equal to active configuration
|
||||
*/
|
||||
inline static bool i2c_config_compare(i2c_port_t port, const i2c_config_t *conf)
|
||||
{
|
||||
if (s_i2c_bus[port].conf_active.master.clk_speed == conf->master.clk_speed
|
||||
&& s_i2c_bus[port].conf_active.sda_io_num == conf->sda_io_num
|
||||
&& s_i2c_bus[port].conf_active.scl_io_num == conf->scl_io_num
|
||||
&& s_i2c_bus[port].conf_active.scl_pullup_en == conf->scl_pullup_en
|
||||
&& s_i2c_bus[port].conf_active.sda_pullup_en == conf->sda_pullup_en) {
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
@@ -0,0 +1,599 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "sdkconfig.h"
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
#include "freertos/queue.h"
|
||||
#include "esp_heap_caps.h"
|
||||
#include "esp32/rom/lldesc.h"
|
||||
#include "soc/dport_access.h"
|
||||
#include "soc/dport_reg.h"
|
||||
#include "soc/i2s_struct.h"
|
||||
#include "hal/gpio_ll.h"
|
||||
#include "esp_log.h"
|
||||
#include "i2s_lcd_driver.h"
|
||||
|
||||
static const char *TAG = "ESP32_I2S_LCD";
|
||||
|
||||
#define I2S_CHECK(a, str, ret) if (!(a)) { \
|
||||
ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
|
||||
return (ret); \
|
||||
}
|
||||
|
||||
#define LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE (4000) // 4-byte aligned
|
||||
#define LCD_DATA_MAX_WIDTH (24) /*!< Maximum width of LCD data bus */
|
||||
|
||||
typedef struct {
|
||||
uint32_t dma_buffer_size;
|
||||
uint32_t dma_half_buffer_size;
|
||||
uint32_t dma_node_buffer_size;
|
||||
uint32_t dma_node_cnt;
|
||||
uint32_t dma_half_node_cnt;
|
||||
lldesc_t *dma;
|
||||
uint8_t *dma_buffer;
|
||||
QueueHandle_t event_queue;
|
||||
uint8_t width;
|
||||
bool swap_data;
|
||||
} lcd_obj_t;
|
||||
|
||||
typedef struct {
|
||||
lcd_obj_t lcd;
|
||||
intr_handle_t lcd_cam_intr_handle;
|
||||
i2s_dev_t *i2s_dev;
|
||||
} lcd_cam_obj_t;
|
||||
|
||||
typedef struct {
|
||||
void (*i2s_write_data_func)(lcd_cam_obj_t *lcd_cam_obj, uint8_t *data, size_t len);
|
||||
int rs_io_num;
|
||||
lcd_cam_obj_t *lcd_cam_obj;
|
||||
SemaphoreHandle_t mutex;
|
||||
} i2s_lcd_driver_t;
|
||||
|
||||
static void IRAM_ATTR i2s_isr(void *arg)
|
||||
{
|
||||
BaseType_t HPTaskAwoken = pdFALSE;
|
||||
lcd_cam_obj_t *lcd_cam_obj = (lcd_cam_obj_t *)arg;
|
||||
i2s_dev_t *i2s_dev = lcd_cam_obj->i2s_dev;
|
||||
|
||||
typeof(i2s_dev->int_st) status = i2s_dev->int_st;
|
||||
i2s_dev->int_clr.val = status.val;
|
||||
if (status.val == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (status.out_eof) {
|
||||
xQueueSendFromISR(lcd_cam_obj->lcd.event_queue, (void *)&status.val, &HPTaskAwoken);
|
||||
}
|
||||
|
||||
if (HPTaskAwoken == pdTRUE) {
|
||||
portYIELD_FROM_ISR();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void lcd_dma_set_int(lcd_cam_obj_t *lcd_cam_obj)
|
||||
{
|
||||
// Generate a data DMA linked list
|
||||
for (int x = 0; x < lcd_cam_obj->lcd.dma_node_cnt; x++) {
|
||||
lcd_cam_obj->lcd.dma[x].size = lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
lcd_cam_obj->lcd.dma[x].length = lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
lcd_cam_obj->lcd.dma[x].buf = (lcd_cam_obj->lcd.dma_buffer + lcd_cam_obj->lcd.dma_node_buffer_size * x);
|
||||
lcd_cam_obj->lcd.dma[x].eof = !((x + 1) % lcd_cam_obj->lcd.dma_half_node_cnt);
|
||||
lcd_cam_obj->lcd.dma[x].empty = (uint32_t)&lcd_cam_obj->lcd.dma[(x + 1) % lcd_cam_obj->lcd.dma_node_cnt];
|
||||
}
|
||||
lcd_cam_obj->lcd.dma[lcd_cam_obj->lcd.dma_half_node_cnt - 1].empty = (uint32_t)NULL;
|
||||
lcd_cam_obj->lcd.dma[lcd_cam_obj->lcd.dma_node_cnt - 1].empty = (uint32_t)NULL;
|
||||
}
|
||||
|
||||
static void lcd_dma_set_left(lcd_cam_obj_t *lcd_cam_obj, int pos, size_t len)
|
||||
{
|
||||
int end_pos = 0, size = 0;
|
||||
// Processing data length is an integer multiple of lcd_cam_obj->lcd.dma_node_buffer_size
|
||||
if (len % lcd_cam_obj->lcd.dma_node_buffer_size) {
|
||||
end_pos = (pos % 2) * lcd_cam_obj->lcd.dma_half_node_cnt + len / lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
size = len % lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
} else {
|
||||
end_pos = (pos % 2) * lcd_cam_obj->lcd.dma_half_node_cnt + len / lcd_cam_obj->lcd.dma_node_buffer_size - 1;
|
||||
size = lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
}
|
||||
// Process the tail node to make it a DMA tail
|
||||
lcd_cam_obj->lcd.dma[end_pos].size = size;
|
||||
lcd_cam_obj->lcd.dma[end_pos].length = size;
|
||||
lcd_cam_obj->lcd.dma[end_pos].eof = 1;
|
||||
lcd_cam_obj->lcd.dma[end_pos].empty = (uint32_t)NULL;
|
||||
}
|
||||
|
||||
static void lcd_i2s_start(i2s_dev_t *i2s_dev, uint8_t fifo_mode, uint32_t addr, size_t len)
|
||||
{
|
||||
while (!i2s_dev->state.tx_idle);
|
||||
i2s_dev->fifo_conf.tx_fifo_mod = fifo_mode;
|
||||
i2s_dev->conf.tx_start = 0;
|
||||
i2s_dev->conf.tx_reset = 1;
|
||||
i2s_dev->conf.tx_reset = 0;
|
||||
i2s_dev->lc_conf.out_rst = 1;
|
||||
i2s_dev->lc_conf.out_rst = 0;
|
||||
i2s_dev->conf.tx_fifo_reset = 1;
|
||||
i2s_dev->conf.tx_fifo_reset = 0;
|
||||
i2s_dev->out_link.addr = addr;
|
||||
i2s_dev->out_link.start = 1;
|
||||
ets_delay_us(1);
|
||||
i2s_dev->conf.tx_start = 1;
|
||||
}
|
||||
|
||||
static void i2s_write_8bit_data(lcd_cam_obj_t *lcd_cam_obj, uint8_t *data, size_t len)
|
||||
{
|
||||
int event = 0;
|
||||
int x = 0, y = 0, left = 0, cnt = 0;
|
||||
if (len <= 0) {
|
||||
ESP_LOGE(TAG, "wrong len!");
|
||||
return;
|
||||
}
|
||||
len = len * 2;
|
||||
lcd_dma_set_int(lcd_cam_obj);
|
||||
uint8_t fifo_mode = 1;
|
||||
// Start signal
|
||||
xQueueSend(lcd_cam_obj->lcd.event_queue, &event, 0);
|
||||
cnt = len / lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
// Process a complete piece of data, ping-pong operation
|
||||
for (x = 0; x < cnt; x++) {
|
||||
uint8_t *out = (uint8_t *)lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt].buf;
|
||||
uint8_t *in = data;
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
for (y = 0; y < lcd_cam_obj->lcd.dma_half_buffer_size; y += 4) {
|
||||
out[y + 3] = in[(y >> 1) + 0];
|
||||
out[y + 1] = in[(y >> 1) + 1];
|
||||
}
|
||||
} else {
|
||||
for (y = 0; y < lcd_cam_obj->lcd.dma_half_buffer_size; y += 4) {
|
||||
out[y + 1] = in[(y >> 1) + 0];
|
||||
out[y + 3] = in[(y >> 1) + 1];
|
||||
}
|
||||
}
|
||||
data += lcd_cam_obj->lcd.dma_half_buffer_size >> 1;
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
lcd_i2s_start(lcd_cam_obj->i2s_dev, fifo_mode, ((uint32_t)&lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt]) & 0xfffff, lcd_cam_obj->lcd.dma_half_buffer_size);
|
||||
}
|
||||
left = len % lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
// Process remaining incomplete segment data
|
||||
while (left) {
|
||||
uint8_t *out = (uint8_t *)lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt].buf;
|
||||
uint8_t *in = data;
|
||||
if (left > 2) {
|
||||
cnt = left - left % 4;
|
||||
left = left % 4;
|
||||
data += cnt >> 1;
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
for (y = 0; y < cnt; y += 4) {
|
||||
out[y + 3] = in[(y >> 1) + 0];
|
||||
out[y + 1] = in[(y >> 1) + 1];
|
||||
}
|
||||
} else {
|
||||
for (y = 0; y < cnt; y += 4) {
|
||||
out[y + 1] = in[(y >> 1) + 0];
|
||||
out[y + 3] = in[(y >> 1) + 1];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
cnt = 4;
|
||||
left = 0;
|
||||
fifo_mode = 3;
|
||||
out[3] = in[0];
|
||||
}
|
||||
lcd_dma_set_left(lcd_cam_obj, x, cnt);
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
lcd_i2s_start(lcd_cam_obj->i2s_dev, fifo_mode, ((uint32_t)&lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt]) & 0xfffff, cnt);
|
||||
x++;
|
||||
}
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
}
|
||||
|
||||
static void i2s_write_16bit_data(lcd_cam_obj_t *lcd_cam_obj, uint8_t *data, size_t len)
|
||||
{
|
||||
int event = 0;
|
||||
int x = 0, y = 0, left = 0, cnt = 0;
|
||||
if (len <= 0 || len % 2 != 0) {
|
||||
ESP_LOGE(TAG, "wrong len!");
|
||||
return;
|
||||
}
|
||||
lcd_dma_set_int(lcd_cam_obj);
|
||||
uint8_t fifo_mode = 1;
|
||||
// Start signal
|
||||
xQueueSend(lcd_cam_obj->lcd.event_queue, &event, 0);
|
||||
cnt = len / lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
// Process a complete piece of data, ping-pong operation
|
||||
for (x = 0; x < cnt; x++) {
|
||||
uint8_t *out = (uint8_t *)lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt].buf;
|
||||
uint8_t *in = data;
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
for (y = 0; y < lcd_cam_obj->lcd.dma_half_buffer_size; y += 4) {
|
||||
out[y + 3] = in[y + 0];
|
||||
out[y + 2] = in[y + 1];
|
||||
out[y + 1] = in[y + 2];
|
||||
out[y + 0] = in[y + 3];
|
||||
}
|
||||
} else {
|
||||
for (y = 0; y < lcd_cam_obj->lcd.dma_half_buffer_size; y += 4) {
|
||||
out[y + 2] = in[y + 0];
|
||||
out[y + 3] = in[y + 1];
|
||||
out[y + 0] = in[y + 2];
|
||||
out[y + 1] = in[y + 3];
|
||||
}
|
||||
}
|
||||
data += lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
lcd_i2s_start(lcd_cam_obj->i2s_dev, fifo_mode, ((uint32_t)&lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt]) & 0xfffff, lcd_cam_obj->lcd.dma_half_buffer_size);
|
||||
}
|
||||
left = len % lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
// Process remaining incomplete segment data
|
||||
while (left) {
|
||||
uint8_t *out = (uint8_t *)lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt].buf;
|
||||
uint8_t *in = data;
|
||||
if (left > 2) {
|
||||
cnt = left - left % 4;
|
||||
left = left % 4;
|
||||
data += cnt;
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
for (y = 0; y < cnt; y += 4) {
|
||||
out[y + 3] = in[y + 0];
|
||||
out[y + 2] = in[y + 1];
|
||||
out[y + 1] = in[y + 2];
|
||||
out[y + 0] = in[y + 3];
|
||||
}
|
||||
} else {
|
||||
for (y = 0; y < cnt; y += 4) {
|
||||
out[y + 2] = in[y + 0];
|
||||
out[y + 3] = in[y + 1];
|
||||
out[y + 0] = in[y + 2];
|
||||
out[y + 1] = in[y + 3];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
cnt = 4;
|
||||
left = 0;
|
||||
fifo_mode = 3;
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
out[3] = in[0];
|
||||
out[2] = in[1];
|
||||
} else {
|
||||
out[2] = in[0];
|
||||
out[3] = in[1];
|
||||
}
|
||||
}
|
||||
lcd_dma_set_left(lcd_cam_obj, x, cnt);
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
lcd_i2s_start(lcd_cam_obj->i2s_dev, fifo_mode, ((uint32_t)&lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt]) & 0xfffff, cnt);
|
||||
x++;
|
||||
}
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
}
|
||||
|
||||
|
||||
static esp_err_t i2s_lcd_reg_config(i2s_dev_t *i2s_dev, uint16_t data_width, uint32_t clk_freq)
|
||||
{
|
||||
// Configure the clock
|
||||
i2s_dev->clkm_conf.clkm_div_num = 2; // 160MHz / 2 = 80MHz
|
||||
i2s_dev->clkm_conf.clkm_div_b = 0;
|
||||
i2s_dev->clkm_conf.clkm_div_a = 10;
|
||||
i2s_dev->clkm_conf.clk_en = 1;
|
||||
|
||||
i2s_dev->conf.val = 0;
|
||||
i2s_dev->fifo_conf.val = 0;
|
||||
i2s_dev->fifo_conf.dscr_en = 1;
|
||||
|
||||
i2s_dev->conf2.lcd_en = 1;
|
||||
i2s_dev->conf2.camera_en = 1;
|
||||
|
||||
i2s_dev->lc_conf.ahbm_fifo_rst = 1;
|
||||
i2s_dev->lc_conf.ahbm_fifo_rst = 0;
|
||||
i2s_dev->lc_conf.ahbm_rst = 1;
|
||||
i2s_dev->lc_conf.ahbm_rst = 0;
|
||||
i2s_dev->lc_conf.check_owner = 0;
|
||||
i2s_dev->lc_conf.out_loop_test = 0;
|
||||
i2s_dev->lc_conf.out_auto_wrback = 0;
|
||||
i2s_dev->lc_conf.out_data_burst_en = 1;
|
||||
i2s_dev->lc_conf.out_no_restart_clr = 0;
|
||||
i2s_dev->lc_conf.indscr_burst_en = 0;
|
||||
i2s_dev->lc_conf.out_eof_mode = 1;
|
||||
|
||||
i2s_dev->timing.val = 0;
|
||||
|
||||
i2s_dev->int_ena.val = 0;
|
||||
i2s_dev->int_clr.val = ~0;
|
||||
|
||||
// Configure sampling rate
|
||||
i2s_dev->sample_rate_conf.tx_bck_div_num = 40000000 / clk_freq; // Fws = Fbck / 2
|
||||
i2s_dev->sample_rate_conf.tx_bits_mod = (data_width == 8) ? 0 : 1;
|
||||
// Configuration data format
|
||||
i2s_dev->conf.tx_start = 0;
|
||||
i2s_dev->conf.tx_reset = 1;
|
||||
i2s_dev->conf.tx_reset = 0;
|
||||
i2s_dev->conf.tx_fifo_reset = 1;
|
||||
i2s_dev->conf.tx_fifo_reset = 0;
|
||||
i2s_dev->conf.tx_slave_mod = 0;
|
||||
i2s_dev->conf.tx_right_first = 1; // Must be set to 1, otherwise the clock line will change during reset
|
||||
i2s_dev->conf.tx_msb_right = 0;
|
||||
i2s_dev->conf.tx_short_sync = 0;
|
||||
i2s_dev->conf.tx_mono = 0;
|
||||
i2s_dev->conf.tx_msb_shift = 0;
|
||||
|
||||
i2s_dev->conf1.tx_pcm_bypass = 1;
|
||||
i2s_dev->conf1.tx_stop_en = 1;
|
||||
|
||||
i2s_dev->conf_chan.tx_chan_mod = 1;
|
||||
|
||||
i2s_dev->fifo_conf.tx_fifo_mod_force_en = 1;
|
||||
i2s_dev->fifo_conf.tx_data_num = 32;
|
||||
i2s_dev->fifo_conf.tx_fifo_mod = 1;
|
||||
|
||||
i2s_dev->lc_conf.out_rst = 1;
|
||||
i2s_dev->lc_conf.out_rst = 0;
|
||||
|
||||
i2s_dev->int_ena.out_eof = 1;
|
||||
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_set_pin(const i2s_lcd_config_t *config)
|
||||
{
|
||||
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_num_wr], PIN_FUNC_GPIO);
|
||||
gpio_set_direction(config->pin_num_wr, GPIO_MODE_OUTPUT);
|
||||
gpio_set_pull_mode(config->pin_num_wr, GPIO_FLOATING);
|
||||
gpio_matrix_out(config->pin_num_wr, I2S0O_WS_OUT_IDX, true, false);
|
||||
|
||||
for (int i = 0; i < config->data_width; i++) {
|
||||
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_data_num[i]], PIN_FUNC_GPIO);
|
||||
gpio_set_direction(config->pin_data_num[i], GPIO_MODE_OUTPUT);
|
||||
gpio_set_pull_mode(config->pin_data_num[i], GPIO_FLOATING);
|
||||
// High bit aligned, OUT23 is always the highest bit
|
||||
gpio_matrix_out(config->pin_data_num[i], I2S0O_DATA_OUT0_IDX + (LCD_DATA_MAX_WIDTH - config->data_width) + i, false, false);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_dma_config(lcd_cam_obj_t *lcd_cam_obj, uint32_t max_dma_buffer_size)
|
||||
{
|
||||
int cnt = 0;
|
||||
if (LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE % 2 != 0) {
|
||||
ESP_LOGE(TAG, "ESP32 only supports 2-byte aligned data length");
|
||||
return ESP_FAIL;
|
||||
}
|
||||
if (max_dma_buffer_size >= LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE * 2) {
|
||||
lcd_cam_obj->lcd.dma_node_buffer_size = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE;
|
||||
for (cnt = 0; cnt < max_dma_buffer_size - 8; cnt++) { // Find a buffer size that can divide dma_size
|
||||
if ((max_dma_buffer_size - cnt) % (lcd_cam_obj->lcd.dma_node_buffer_size * 2) == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
lcd_cam_obj->lcd.dma_buffer_size = max_dma_buffer_size - cnt;
|
||||
} else {
|
||||
lcd_cam_obj->lcd.dma_node_buffer_size = max_dma_buffer_size / 2;
|
||||
lcd_cam_obj->lcd.dma_buffer_size = lcd_cam_obj->lcd.dma_node_buffer_size * 2;
|
||||
}
|
||||
|
||||
lcd_cam_obj->lcd.dma_half_buffer_size = lcd_cam_obj->lcd.dma_buffer_size / 2;
|
||||
lcd_cam_obj->lcd.dma_node_cnt = (lcd_cam_obj->lcd.dma_buffer_size) / lcd_cam_obj->lcd.dma_node_buffer_size; // Number of DMA nodes
|
||||
lcd_cam_obj->lcd.dma_half_node_cnt = lcd_cam_obj->lcd.dma_node_cnt / 2;
|
||||
|
||||
ESP_LOGI(TAG, "lcd_buffer_size: %d, lcd_dma_size: %d, lcd_dma_node_cnt: %d", lcd_cam_obj->lcd.dma_buffer_size, lcd_cam_obj->lcd.dma_node_buffer_size, lcd_cam_obj->lcd.dma_node_cnt);
|
||||
|
||||
lcd_cam_obj->lcd.dma = (lldesc_t *)heap_caps_malloc(lcd_cam_obj->lcd.dma_node_cnt * sizeof(lldesc_t), MALLOC_CAP_DMA | MALLOC_CAP_8BIT);
|
||||
lcd_cam_obj->lcd.dma_buffer = (uint8_t *)heap_caps_malloc(lcd_cam_obj->lcd.dma_buffer_size * sizeof(uint8_t), MALLOC_CAP_DMA | MALLOC_CAP_8BIT);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t lcd_cam_deinit(i2s_lcd_driver_t *drv)
|
||||
{
|
||||
if (!drv->lcd_cam_obj) {
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
if (drv->lcd_cam_obj->lcd.event_queue) {
|
||||
vQueueDelete(drv->lcd_cam_obj->lcd.event_queue);
|
||||
}
|
||||
if (drv->lcd_cam_obj->lcd.dma) {
|
||||
heap_caps_free(drv->lcd_cam_obj->lcd.dma);
|
||||
}
|
||||
if (drv->lcd_cam_obj->lcd.dma_buffer) {
|
||||
heap_caps_free(drv->lcd_cam_obj->lcd.dma_buffer);
|
||||
}
|
||||
|
||||
if (drv->lcd_cam_obj->lcd_cam_intr_handle) {
|
||||
esp_intr_free(drv->lcd_cam_obj->lcd_cam_intr_handle);
|
||||
}
|
||||
|
||||
heap_caps_free(drv->lcd_cam_obj);
|
||||
drv->lcd_cam_obj = NULL;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_cam_init(i2s_lcd_driver_t *drv, const i2s_lcd_config_t *config)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
|
||||
lcd_cam_obj_t *lcd_cam_obj = (lcd_cam_obj_t *)heap_caps_calloc(1, sizeof(lcd_cam_obj_t), MALLOC_CAP_DMA);
|
||||
if (lcd_cam_obj == NULL) {
|
||||
ESP_LOGE(TAG, "lcd_cam object malloc failed");
|
||||
return ESP_ERR_NO_MEM;
|
||||
}
|
||||
drv->lcd_cam_obj = lcd_cam_obj;
|
||||
|
||||
if (I2S_NUM_0 == config->i2s_port) {
|
||||
lcd_cam_obj->i2s_dev = &I2S0;
|
||||
periph_module_enable(PERIPH_I2S0_MODULE);
|
||||
ESP_LOGI(TAG, "Enable I2S0");
|
||||
} else if (I2S_NUM_1 == config->i2s_port) {
|
||||
lcd_cam_obj->i2s_dev = &I2S1;
|
||||
periph_module_enable(PERIPH_I2S1_MODULE);
|
||||
ESP_LOGI(TAG, "Enable I2S1");
|
||||
} else {
|
||||
ESP_LOGE(TAG, "Designated I2S peripheral not found");
|
||||
}
|
||||
|
||||
do {
|
||||
ret |= i2s_lcd_reg_config(lcd_cam_obj->i2s_dev, config->data_width, config->clk_freq);
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "lcd_cam config fail!");
|
||||
break;
|
||||
}
|
||||
|
||||
ret |= lcd_set_pin(config);
|
||||
ret |= lcd_dma_config(lcd_cam_obj, config->buffer_size);
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "lcd config fail!");
|
||||
break;
|
||||
}
|
||||
|
||||
lcd_cam_obj->lcd.event_queue = xQueueCreate(1, sizeof(int));
|
||||
lcd_cam_obj->lcd.width = config->data_width;
|
||||
lcd_cam_obj->lcd.swap_data = config->swap_data;;
|
||||
|
||||
if (lcd_cam_obj->lcd.event_queue == NULL) {
|
||||
ESP_LOGE(TAG, "lcd config fail!");
|
||||
break;
|
||||
}
|
||||
|
||||
if (I2S_NUM_0 == config->i2s_port) {
|
||||
ret |= esp_intr_alloc(ETS_I2S0_INTR_SOURCE, ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM, i2s_isr, lcd_cam_obj, &lcd_cam_obj->lcd_cam_intr_handle);
|
||||
} else if (I2S_NUM_1 == config->i2s_port) {
|
||||
ret |= esp_intr_alloc(ETS_I2S1_INTR_SOURCE, ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM, i2s_isr, lcd_cam_obj, &lcd_cam_obj->lcd_cam_intr_handle);
|
||||
}
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "lcd_cam intr alloc fail!");
|
||||
break;
|
||||
}
|
||||
ESP_LOGI(TAG, "i2s lcd driver init ok");
|
||||
return ESP_OK;
|
||||
} while (0);
|
||||
|
||||
lcd_cam_deinit(drv);
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
/**< Public functions */
|
||||
|
||||
i2s_lcd_handle_t i2s_lcd_driver_init(const i2s_lcd_config_t *config)
|
||||
{
|
||||
I2S_CHECK(NULL != config, "config pointer invalid", NULL);
|
||||
I2S_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(config->pin_num_wr), "GPIO WR invalid", NULL);
|
||||
I2S_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(config->pin_num_rs), "GPIO RS invalid", NULL);
|
||||
I2S_CHECK(config->data_width > 0 && config->data_width <= 16, "Bit width out of range", NULL);
|
||||
I2S_CHECK(0 == (config->data_width % 8), "Bit width must be a multiple of 8", NULL);
|
||||
uint64_t pin_mask = 0;
|
||||
for (size_t i = 0; i < config->data_width; i++) {
|
||||
uint64_t mask = 1ULL << config->pin_data_num[i];
|
||||
I2S_CHECK(!(pin_mask & mask), "Data bus GPIO has a duplicate", NULL);
|
||||
I2S_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(config->pin_data_num[i]), "Data bus gpio invalid", NULL);
|
||||
pin_mask |= mask;
|
||||
}
|
||||
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)heap_caps_malloc(sizeof(i2s_lcd_driver_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "Error malloc handle of i2s lcd driver", NULL);
|
||||
|
||||
esp_err_t ret = lcd_cam_init(i2s_lcd_drv, config);
|
||||
if (ESP_OK != ret) {
|
||||
ESP_LOGE(TAG, "%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, "i2s lcd driver initialize failed");
|
||||
heap_caps_free(i2s_lcd_drv);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
i2s_lcd_drv->mutex = xSemaphoreCreateMutex();
|
||||
if (i2s_lcd_drv->mutex == NULL) {
|
||||
ESP_LOGE(TAG, "%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, "lcd create mutex failed");
|
||||
lcd_cam_deinit(i2s_lcd_drv);
|
||||
heap_caps_free(i2s_lcd_drv);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (8 == config->data_width) {
|
||||
i2s_lcd_drv->i2s_write_data_func = i2s_write_8bit_data;
|
||||
} else if (16 == config->data_width) {
|
||||
i2s_lcd_drv->i2s_write_data_func = i2s_write_16bit_data;
|
||||
}
|
||||
|
||||
if (config->pin_num_cs >= 0) {
|
||||
gpio_pad_select_gpio(config->pin_num_cs);
|
||||
gpio_set_direction(config->pin_num_cs, GPIO_MODE_OUTPUT);
|
||||
gpio_set_level(config->pin_num_cs, 0);
|
||||
}
|
||||
|
||||
gpio_pad_select_gpio(config->pin_num_rs);
|
||||
gpio_set_direction(config->pin_num_rs, GPIO_MODE_OUTPUT);
|
||||
i2s_lcd_drv->rs_io_num = config->pin_num_rs;
|
||||
return (i2s_lcd_handle_t)i2s_lcd_drv;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_driver_deinit(i2s_lcd_handle_t handle)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
lcd_cam_deinit(i2s_lcd_drv);
|
||||
vSemaphoreDelete(i2s_lcd_drv->mutex);
|
||||
heap_caps_free(handle);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_write_data(i2s_lcd_handle_t handle, uint16_t data)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
i2s_lcd_drv->i2s_write_data_func(i2s_lcd_drv->lcd_cam_obj, (uint8_t *)&data, 2);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_write_cmd(i2s_lcd_handle_t handle, uint16_t cmd)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
gpio_set_level(i2s_lcd_drv->rs_io_num, LCD_CMD_LEV);
|
||||
i2s_lcd_drv->i2s_write_data_func(i2s_lcd_drv->lcd_cam_obj, (uint8_t *)&cmd, 2);
|
||||
gpio_set_level(i2s_lcd_drv->rs_io_num, LCD_DATA_LEV);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_write(i2s_lcd_handle_t handle, const uint8_t *data, uint32_t length)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
i2s_lcd_drv->i2s_write_data_func(i2s_lcd_drv->lcd_cam_obj, (uint8_t *)data, length);
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_acquire(i2s_lcd_handle_t handle)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
BaseType_t ret = xSemaphoreTake(i2s_lcd_drv->mutex, portMAX_DELAY);
|
||||
I2S_CHECK(pdTRUE == ret, "Take semaphore failed", ESP_FAIL);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_release(i2s_lcd_handle_t handle)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
BaseType_t ret = xSemaphoreGive(i2s_lcd_drv->mutex);
|
||||
I2S_CHECK(pdTRUE == ret, "Give semaphore failed", ESP_FAIL);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
#endif // CONFIG_IDF_TARGET_ESP32
|
||||
@@ -0,0 +1,481 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "sdkconfig.h"
|
||||
#if CONFIG_IDF_TARGET_ESP32S2
|
||||
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "esp_log.h"
|
||||
#include "driver/gpio.h"
|
||||
#include "driver/i2s.h"
|
||||
#include "esp_heap_caps.h"
|
||||
#include "esp32s2/rom/lldesc.h"
|
||||
#include "soc/system_reg.h"
|
||||
#include "i2s_lcd_driver.h"
|
||||
|
||||
|
||||
static const char *TAG = "ESP32S2_I2S_LCD";
|
||||
|
||||
#define I2S_CHECK(a, str, ret) if (!(a)) { \
|
||||
ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
|
||||
return (ret); \
|
||||
}
|
||||
|
||||
#define LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE (4000) // 4-byte aligned
|
||||
#define LCD_DATA_MAX_WIDTH (24) /*!< Maximum width of LCD data bus */
|
||||
|
||||
typedef struct {
|
||||
uint32_t dma_buffer_size;
|
||||
uint32_t dma_half_buffer_size;
|
||||
uint32_t dma_node_buffer_size;
|
||||
uint32_t dma_node_cnt;
|
||||
uint32_t dma_half_node_cnt;
|
||||
lldesc_t *dma;
|
||||
uint8_t *dma_buffer;
|
||||
QueueHandle_t event_queue;
|
||||
uint8_t width;
|
||||
bool swap_data;
|
||||
} lcd_obj_t;
|
||||
|
||||
typedef struct {
|
||||
lcd_obj_t lcd;
|
||||
intr_handle_t lcd_cam_intr_handle;
|
||||
i2s_dev_t *i2s_dev;
|
||||
} lcd_cam_obj_t;
|
||||
|
||||
typedef struct {
|
||||
int rs_io_num;
|
||||
lcd_cam_obj_t *lcd_cam_obj;
|
||||
SemaphoreHandle_t mutex;
|
||||
} i2s_lcd_driver_t;
|
||||
|
||||
static void IRAM_ATTR i2s_isr(void *arg)
|
||||
{
|
||||
BaseType_t HPTaskAwoken = pdFALSE;
|
||||
lcd_cam_obj_t *lcd_cam_obj = (lcd_cam_obj_t*)arg;
|
||||
i2s_dev_t *i2s_dev = lcd_cam_obj->i2s_dev;
|
||||
|
||||
typeof(i2s_dev->int_st) status = i2s_dev->int_st;
|
||||
i2s_dev->int_clr.val = status.val;
|
||||
if (status.val == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (status.out_eof) {
|
||||
xQueueSendFromISR(lcd_cam_obj->lcd.event_queue, (void*)&status.val, &HPTaskAwoken);
|
||||
}
|
||||
|
||||
if (HPTaskAwoken == pdTRUE) {
|
||||
portYIELD_FROM_ISR();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static void lcd_dma_set_int(lcd_cam_obj_t *lcd_cam_obj)
|
||||
{
|
||||
// Generate a data DMA linked list
|
||||
for (int x = 0; x < lcd_cam_obj->lcd.dma_node_cnt; x++) {
|
||||
lcd_cam_obj->lcd.dma[x].size = lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
lcd_cam_obj->lcd.dma[x].length = lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
lcd_cam_obj->lcd.dma[x].buf = (lcd_cam_obj->lcd.dma_buffer + lcd_cam_obj->lcd.dma_node_buffer_size * x);
|
||||
lcd_cam_obj->lcd.dma[x].eof = !((x + 1) % lcd_cam_obj->lcd.dma_half_node_cnt);
|
||||
lcd_cam_obj->lcd.dma[x].empty = (uint32_t)&lcd_cam_obj->lcd.dma[(x + 1) % lcd_cam_obj->lcd.dma_node_cnt];
|
||||
}
|
||||
lcd_cam_obj->lcd.dma[lcd_cam_obj->lcd.dma_half_node_cnt - 1].empty = (uint32_t)NULL;
|
||||
lcd_cam_obj->lcd.dma[lcd_cam_obj->lcd.dma_node_cnt - 1].empty = (uint32_t)NULL;
|
||||
}
|
||||
|
||||
static void lcd_dma_set_left(lcd_cam_obj_t *lcd_cam_obj, int pos, size_t len)
|
||||
{
|
||||
int end_pos = 0, size = 0;
|
||||
// Processing data length is an integer multiple of lcd_cam_obj->lcd.dma_node_buffer_size
|
||||
if (len % lcd_cam_obj->lcd.dma_node_buffer_size) {
|
||||
end_pos = (pos % 2) * lcd_cam_obj->lcd.dma_half_node_cnt + len / lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
size = len % lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
} else {
|
||||
end_pos = (pos % 2) * lcd_cam_obj->lcd.dma_half_node_cnt + len / lcd_cam_obj->lcd.dma_node_buffer_size - 1;
|
||||
size = lcd_cam_obj->lcd.dma_node_buffer_size;
|
||||
}
|
||||
// Process the tail node to make it a DMA tail
|
||||
lcd_cam_obj->lcd.dma[end_pos].size = size;
|
||||
lcd_cam_obj->lcd.dma[end_pos].length = size;
|
||||
lcd_cam_obj->lcd.dma[end_pos].eof = 1;
|
||||
lcd_cam_obj->lcd.dma[end_pos].empty = (uint32_t)NULL;
|
||||
}
|
||||
|
||||
static void lcd_i2s_start(i2s_dev_t *i2s_dev, uint32_t addr, size_t len)
|
||||
{
|
||||
while (!i2s_dev->state.tx_idle);
|
||||
i2s_dev->conf.tx_reset = 1;
|
||||
i2s_dev->conf.tx_reset = 0;
|
||||
i2s_dev->conf.tx_fifo_reset = 1;
|
||||
i2s_dev->conf.tx_fifo_reset = 0;
|
||||
i2s_dev->out_link.addr = addr;
|
||||
i2s_dev->out_link.start = 1;
|
||||
ets_delay_us(1);
|
||||
i2s_dev->conf.tx_start = 1;
|
||||
}
|
||||
|
||||
static void i2s_write_data(lcd_cam_obj_t *lcd_cam_obj, uint8_t *data, size_t len)
|
||||
{
|
||||
int event = 0;
|
||||
int x = 0, y = 0, left = 0, cnt = 0;
|
||||
if (len <= 0) {
|
||||
ESP_LOGE(TAG, "wrong len!");
|
||||
return;
|
||||
}
|
||||
lcd_dma_set_int(lcd_cam_obj);
|
||||
cnt = len / lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
// Start signal
|
||||
xQueueSend(lcd_cam_obj->lcd.event_queue, &event, 0);
|
||||
// Process a complete piece of data, ping-pong operation
|
||||
for (x = 0; x < cnt; x++) {
|
||||
uint8_t *out = (uint8_t*)lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt].buf;
|
||||
uint8_t *in = data;
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
for (y = 0; y < lcd_cam_obj->lcd.dma_half_buffer_size; y+=2) {
|
||||
out[y+1] = in[y+0];
|
||||
out[y+0] = in[y+1];
|
||||
}
|
||||
} else {
|
||||
memcpy(out, in, lcd_cam_obj->lcd.dma_half_buffer_size);
|
||||
}
|
||||
data += lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
lcd_i2s_start(lcd_cam_obj->i2s_dev, ((uint32_t)&lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt]) & 0xfffff, lcd_cam_obj->lcd.dma_half_buffer_size);
|
||||
}
|
||||
left = len % lcd_cam_obj->lcd.dma_half_buffer_size;
|
||||
// Process remaining incomplete segment data
|
||||
if (left) {
|
||||
uint8_t *out = (uint8_t*)lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt].buf;
|
||||
uint8_t *in = data;
|
||||
cnt = left - left % 2;
|
||||
if (cnt) {
|
||||
if (lcd_cam_obj->lcd.swap_data) {
|
||||
for (y = 0; y < cnt; y+=2) {
|
||||
out[y+1] = in[y+0];
|
||||
out[y+0] = in[y+1];
|
||||
}
|
||||
} else {
|
||||
memcpy(out, in, cnt);
|
||||
}
|
||||
}
|
||||
|
||||
if (left % 2) {
|
||||
out[cnt] = in[cnt];
|
||||
}
|
||||
lcd_dma_set_left(lcd_cam_obj, x, left);
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
lcd_i2s_start(lcd_cam_obj->i2s_dev, ((uint32_t)&lcd_cam_obj->lcd.dma[(x % 2) * lcd_cam_obj->lcd.dma_half_node_cnt]) & 0xfffff, left);
|
||||
}
|
||||
xQueueReceive(lcd_cam_obj->lcd.event_queue, (void *)&event, portMAX_DELAY);
|
||||
}
|
||||
|
||||
|
||||
static esp_err_t i2s_lcd_reg_config(i2s_dev_t *i2s_dev, uint16_t data_width, uint32_t clk_freq)
|
||||
{
|
||||
// Configure the clock
|
||||
i2s_dev->clkm_conf.clkm_div_num = 2; // 160MHz / 2 = 80MHz
|
||||
i2s_dev->clkm_conf.clkm_div_b = 0;
|
||||
i2s_dev->clkm_conf.clkm_div_a = 0;
|
||||
i2s_dev->clkm_conf.clk_sel = 2;
|
||||
i2s_dev->clkm_conf.clk_en = 1;
|
||||
|
||||
i2s_dev->conf.val = 0;
|
||||
i2s_dev->fifo_conf.val = 0;
|
||||
i2s_dev->fifo_conf.dscr_en = 1;
|
||||
|
||||
i2s_dev->lc_conf.ahbm_fifo_rst = 1;
|
||||
i2s_dev->lc_conf.ahbm_fifo_rst = 0;
|
||||
i2s_dev->lc_conf.ahbm_rst = 1;
|
||||
i2s_dev->lc_conf.ahbm_rst = 0;
|
||||
i2s_dev->lc_conf.check_owner = 0;
|
||||
|
||||
i2s_dev->timing.val = 0;
|
||||
|
||||
i2s_dev->int_ena.val = 0;
|
||||
i2s_dev->int_clr.val = ~0;
|
||||
|
||||
i2s_dev->conf2.lcd_en = 1;
|
||||
|
||||
// Configure sampling rate
|
||||
i2s_dev->sample_rate_conf.tx_bck_div_num = 40000000 / clk_freq; // Fws = Fbck / 2
|
||||
i2s_dev->sample_rate_conf.tx_bits_mod = data_width;
|
||||
// Configuration data format
|
||||
|
||||
i2s_dev->conf.tx_right_first = 1;
|
||||
i2s_dev->conf.tx_msb_right = 1;
|
||||
i2s_dev->conf.tx_dma_equal = 1;
|
||||
|
||||
i2s_dev->conf1.tx_pcm_bypass = 1;
|
||||
i2s_dev->conf1.tx_stop_en = 1;
|
||||
|
||||
i2s_dev->conf2.lcd_en = 1;
|
||||
|
||||
i2s_dev->conf_chan.tx_chan_mod = 1;
|
||||
|
||||
i2s_dev->fifo_conf.tx_fifo_mod_force_en = 1;
|
||||
i2s_dev->fifo_conf.tx_data_num = 32;
|
||||
i2s_dev->fifo_conf.tx_fifo_mod = 2;
|
||||
i2s_dev->fifo_conf.tx_24msb_en = 0;
|
||||
|
||||
i2s_dev->lc_conf.out_rst = 1;
|
||||
i2s_dev->lc_conf.out_rst = 0;
|
||||
|
||||
i2s_dev->int_ena.out_eof = 1;
|
||||
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_set_pin(const i2s_lcd_config_t *config)
|
||||
{
|
||||
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_num_wr], PIN_FUNC_GPIO);
|
||||
gpio_set_direction(config->pin_num_wr, GPIO_MODE_OUTPUT);
|
||||
gpio_set_pull_mode(config->pin_num_wr, GPIO_FLOATING);
|
||||
gpio_matrix_out(config->pin_num_wr, I2S0O_WS_OUT_IDX, true, false);
|
||||
|
||||
for (int i = 0; i < config->data_width; i++) {
|
||||
PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[config->pin_data_num[i]], PIN_FUNC_GPIO);
|
||||
gpio_set_direction(config->pin_data_num[i], GPIO_MODE_OUTPUT);
|
||||
gpio_set_pull_mode(config->pin_data_num[i], GPIO_FLOATING);
|
||||
// High bit aligned, OUT23 is always the highest bit
|
||||
gpio_matrix_out(config->pin_data_num[i], I2S0O_DATA_OUT0_IDX + (LCD_DATA_MAX_WIDTH - config->data_width) + i, false, false);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_dma_config(lcd_cam_obj_t *lcd_cam_obj, uint32_t max_dma_buffer_size)
|
||||
{
|
||||
int cnt = 0;
|
||||
if (LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE % 2 != 0) {
|
||||
ESP_LOGE(TAG, "ESP32 only supports 2-byte aligned data length");
|
||||
return ESP_FAIL;
|
||||
}
|
||||
if (max_dma_buffer_size >= LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE * 2) {
|
||||
lcd_cam_obj->lcd.dma_node_buffer_size = LCD_CAM_DMA_NODE_BUFFER_MAX_SIZE;
|
||||
for (cnt = 0; cnt < max_dma_buffer_size - 8; cnt++) { // Find a buffer size that can divide dma_size
|
||||
if ((max_dma_buffer_size - cnt) % (lcd_cam_obj->lcd.dma_node_buffer_size * 2) == 0) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
lcd_cam_obj->lcd.dma_buffer_size = max_dma_buffer_size - cnt;
|
||||
} else {
|
||||
lcd_cam_obj->lcd.dma_node_buffer_size = max_dma_buffer_size / 2;
|
||||
lcd_cam_obj->lcd.dma_buffer_size = lcd_cam_obj->lcd.dma_node_buffer_size * 2;
|
||||
}
|
||||
|
||||
lcd_cam_obj->lcd.dma_half_buffer_size = lcd_cam_obj->lcd.dma_buffer_size / 2;
|
||||
lcd_cam_obj->lcd.dma_node_cnt = (lcd_cam_obj->lcd.dma_buffer_size) / lcd_cam_obj->lcd.dma_node_buffer_size; // Number of DMA nodes
|
||||
lcd_cam_obj->lcd.dma_half_node_cnt = lcd_cam_obj->lcd.dma_node_cnt / 2;
|
||||
|
||||
ESP_LOGI(TAG, "lcd_buffer_size: %d, lcd_dma_size: %d, lcd_dma_node_cnt: %d", lcd_cam_obj->lcd.dma_buffer_size, lcd_cam_obj->lcd.dma_node_buffer_size, lcd_cam_obj->lcd.dma_node_cnt);
|
||||
|
||||
lcd_cam_obj->lcd.dma = (lldesc_t *)heap_caps_malloc(lcd_cam_obj->lcd.dma_node_cnt * sizeof(lldesc_t), MALLOC_CAP_DMA | MALLOC_CAP_8BIT);
|
||||
lcd_cam_obj->lcd.dma_buffer = (uint8_t *)heap_caps_malloc(lcd_cam_obj->lcd.dma_buffer_size * sizeof(uint8_t), MALLOC_CAP_DMA | MALLOC_CAP_8BIT);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_cam_deinit(i2s_lcd_driver_t *drv)
|
||||
{
|
||||
if (!drv->lcd_cam_obj) {
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
if (drv->lcd_cam_obj->lcd.event_queue) {
|
||||
vQueueDelete(drv->lcd_cam_obj->lcd.event_queue);
|
||||
}
|
||||
if (drv->lcd_cam_obj->lcd.dma) {
|
||||
heap_caps_free(drv->lcd_cam_obj->lcd.dma);
|
||||
}
|
||||
if (drv->lcd_cam_obj->lcd.dma_buffer) {
|
||||
heap_caps_free(drv->lcd_cam_obj->lcd.dma_buffer);
|
||||
}
|
||||
|
||||
if (drv->lcd_cam_obj->lcd_cam_intr_handle) {
|
||||
esp_intr_free(drv->lcd_cam_obj->lcd_cam_intr_handle);
|
||||
}
|
||||
|
||||
heap_caps_free(drv->lcd_cam_obj);
|
||||
drv->lcd_cam_obj = NULL;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t lcd_cam_init(i2s_lcd_driver_t *drv, const i2s_lcd_config_t *config)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
|
||||
lcd_cam_obj_t *lcd_cam_obj = (lcd_cam_obj_t *)heap_caps_calloc(1, sizeof(lcd_cam_obj_t), MALLOC_CAP_DMA);
|
||||
if (lcd_cam_obj == NULL) {
|
||||
ESP_LOGE(TAG, "lcd_cam object malloc error");
|
||||
return ESP_ERR_NO_MEM;
|
||||
}
|
||||
drv->lcd_cam_obj = lcd_cam_obj;
|
||||
|
||||
if (I2S_NUM_0 == config->i2s_port) {
|
||||
lcd_cam_obj->i2s_dev = &I2S0;
|
||||
periph_module_enable(PERIPH_I2S0_MODULE);
|
||||
} else {
|
||||
ESP_LOGE(TAG, "Designated I2S peripheral not found");
|
||||
}
|
||||
|
||||
ret |= i2s_lcd_reg_config(lcd_cam_obj->i2s_dev, config->data_width, config->clk_freq);
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "lcd_cam config fail!");
|
||||
lcd_cam_deinit(drv);
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
ret |= lcd_set_pin(config);
|
||||
ret |= lcd_dma_config(lcd_cam_obj, config->buffer_size);
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "lcd config fail!");
|
||||
lcd_cam_deinit(drv);
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
lcd_cam_obj->lcd.event_queue = xQueueCreate(1, sizeof(int));
|
||||
lcd_cam_obj->lcd.width = config->data_width;
|
||||
lcd_cam_obj->lcd.swap_data = config->swap_data;
|
||||
|
||||
if (lcd_cam_obj->lcd.event_queue == NULL) {
|
||||
ESP_LOGE(TAG, "lcd config fail!");
|
||||
lcd_cam_deinit(drv);
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
ret |= esp_intr_alloc(ETS_I2S0_INTR_SOURCE, ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_IRAM, i2s_isr, lcd_cam_obj, &lcd_cam_obj->lcd_cam_intr_handle);
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
ESP_LOGE(TAG, "lcd_cam intr alloc fail!");
|
||||
lcd_cam_deinit(drv);
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
ESP_LOGI(TAG, "lcd init ok");
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
|
||||
/**< Public functions */
|
||||
|
||||
i2s_lcd_handle_t i2s_lcd_driver_init(const i2s_lcd_config_t *config)
|
||||
{
|
||||
I2S_CHECK(NULL != config, "config pointer invalid", NULL);
|
||||
I2S_CHECK(GPIO_IS_VALID_GPIO(config->pin_num_wr), "GPIO WR invalid", NULL);
|
||||
I2S_CHECK(GPIO_IS_VALID_GPIO(config->pin_num_rs), "GPIO RS invalid", NULL);
|
||||
I2S_CHECK(config->data_width > 0 && config->data_width <= 16, "Bit width out of range", NULL);
|
||||
I2S_CHECK(0 == (config->data_width % 8), "Bit width must be a multiple of 8", NULL);
|
||||
uint64_t pin_mask = 0;
|
||||
for (size_t i = 0; i < config->data_width; i++) {
|
||||
uint64_t mask = 1ULL << config->pin_data_num[i];
|
||||
I2S_CHECK(!(pin_mask & mask), "Data bus GPIO has a duplicate", NULL);
|
||||
I2S_CHECK(GPIO_IS_VALID_GPIO(config->pin_data_num[i]), "Data bus gpio invalid", NULL);
|
||||
pin_mask |= mask;
|
||||
}
|
||||
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)heap_caps_malloc(sizeof(i2s_lcd_driver_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "Error malloc handle of i2s lcd driver", NULL);
|
||||
|
||||
esp_err_t ret = lcd_cam_init(i2s_lcd_drv, config);
|
||||
if(ESP_OK != ret) {
|
||||
ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, "i2s lcd driver initialize failed");
|
||||
heap_caps_free(i2s_lcd_drv);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
i2s_lcd_drv->mutex = xSemaphoreCreateMutex();
|
||||
if (i2s_lcd_drv->mutex == NULL) {
|
||||
ESP_LOGE(TAG, "%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, "lcd create mutex failed");
|
||||
lcd_cam_deinit(i2s_lcd_drv);
|
||||
heap_caps_free(i2s_lcd_drv);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
if (config->pin_num_cs >= 0) {
|
||||
gpio_pad_select_gpio(config->pin_num_cs);
|
||||
gpio_set_direction(config->pin_num_cs, GPIO_MODE_OUTPUT);
|
||||
gpio_set_level(config->pin_num_cs, 0);
|
||||
}
|
||||
|
||||
gpio_pad_select_gpio(config->pin_num_rs);
|
||||
gpio_set_direction(config->pin_num_rs, GPIO_MODE_OUTPUT);
|
||||
i2s_lcd_drv->rs_io_num = config->pin_num_rs;
|
||||
return (i2s_lcd_handle_t)i2s_lcd_drv;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_driver_deinit(i2s_lcd_handle_t handle)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
lcd_cam_deinit(i2s_lcd_drv);
|
||||
vSemaphoreDelete(i2s_lcd_drv->mutex);
|
||||
heap_caps_free(handle);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_write_data(i2s_lcd_handle_t handle, uint16_t data)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
i2s_write_data(i2s_lcd_drv->lcd_cam_obj, (uint8_t *)&data, 2);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_write_cmd(i2s_lcd_handle_t handle, uint16_t cmd)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
gpio_set_level(i2s_lcd_drv->rs_io_num, LCD_CMD_LEV);
|
||||
i2s_write_data(i2s_lcd_drv->lcd_cam_obj, (uint8_t *)&cmd, 2);
|
||||
gpio_set_level(i2s_lcd_drv->rs_io_num, LCD_DATA_LEV);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_write(i2s_lcd_handle_t handle, const uint8_t *data, uint32_t length)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
i2s_write_data(i2s_lcd_drv->lcd_cam_obj, (uint8_t*)data, length);
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_acquire(i2s_lcd_handle_t handle)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
BaseType_t ret = xSemaphoreTake(i2s_lcd_drv->mutex, portMAX_DELAY);
|
||||
I2S_CHECK(pdTRUE == ret, "Take semaphore failed", ESP_FAIL);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2s_lcd_release(i2s_lcd_handle_t handle)
|
||||
{
|
||||
i2s_lcd_driver_t *i2s_lcd_drv = (i2s_lcd_driver_t *)handle;
|
||||
I2S_CHECK(NULL != i2s_lcd_drv, "handle pointer invalid", ESP_ERR_INVALID_ARG);
|
||||
BaseType_t ret = xSemaphoreGive(i2s_lcd_drv->mutex);
|
||||
I2S_CHECK(pdTRUE == ret, "Give semaphore failed", ESP_FAIL);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
#endif // CONFIG_IDF_TARGET_ESP32S2
|
||||
@@ -0,0 +1,296 @@
|
||||
// Copyright 2019-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#ifndef _I2C_BUS_H_
|
||||
#define _I2C_BUS_H_
|
||||
#include "driver/i2c.h"
|
||||
|
||||
#define NULL_I2C_MEM_ADDR 0xFF /*!< set mem_address to NULL_I2C_MEM_ADDR if i2c device has no internal address during read/write */
|
||||
#define NULL_I2C_DEV_ADDR 0xFF /*!< invalid i2c device address */
|
||||
typedef void *i2c_bus_handle_t; /*!< i2c bus handle */
|
||||
typedef void *i2c_bus_device_handle_t; /*!< i2c device handle */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**************************************** Public Functions (Application level)*********************************************/
|
||||
|
||||
/**
|
||||
* @brief Create an I2C bus instance then return a handle if created successfully. Each I2C bus works in a singleton mode,
|
||||
* which means for an i2c port only one group parameter works. When i2c_bus_create is called more than one time for the
|
||||
* same i2c port, following parameter will override the previous one.
|
||||
*
|
||||
* @param port I2C port number
|
||||
* @param conf Pointer to I2C bus configuration
|
||||
* @return i2c_bus_handle_t Return the I2C bus handle if created successfully, return NULL if failed.
|
||||
*/
|
||||
i2c_bus_handle_t i2c_bus_create(i2c_port_t port, const i2c_config_t *conf);
|
||||
|
||||
/**
|
||||
* @brief Delete and release the I2C bus resource.
|
||||
*
|
||||
* @param p_bus_handle Point to the I2C bus handle, if delete succeed handle will set to NULL.
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Fail
|
||||
*/
|
||||
esp_err_t i2c_bus_delete(i2c_bus_handle_t *p_bus_handle);
|
||||
|
||||
/**
|
||||
* @brief Scan i2c devices attached on i2c bus
|
||||
*
|
||||
* @param bus_handle I2C bus handle
|
||||
* @param buf Pointer to a buffer to save devices' address, if NULL no address will be saved.
|
||||
* @param num Maximum number of addresses to save, invalid if buf set to NULL,
|
||||
* higer addresses will be discarded if num less-than the total number found on the I2C bus.
|
||||
* @return uint8_t Total number of devices found on the I2C bus
|
||||
*/
|
||||
uint8_t i2c_bus_scan(i2c_bus_handle_t bus_handle, uint8_t *buf, uint8_t num);
|
||||
|
||||
/**
|
||||
* @brief Get current active clock speed.
|
||||
*
|
||||
* @param bus_handle I2C bus handle
|
||||
* @return uint32_t current clock speed
|
||||
*/
|
||||
uint32_t i2c_bus_get_current_clk_speed(i2c_bus_handle_t bus_handle);
|
||||
|
||||
/**
|
||||
* @brief Get created device number of the bus.
|
||||
*
|
||||
* @param bus_handle I2C bus handle
|
||||
* @return uint8_t created device number of the bus
|
||||
*/
|
||||
uint8_t i2c_bus_get_created_device_num(i2c_bus_handle_t bus_handle);
|
||||
|
||||
/**
|
||||
* @brief Create an I2C device on specific bus.
|
||||
* Dynamic configuration must be enable to achieve multiple devices with different configs on a single bus.
|
||||
* menuconfig:Bus Options->I2C Bus Options->enable dynamic configuration
|
||||
*
|
||||
* @param bus_handle Point to the I2C bus handle
|
||||
* @param dev_addr i2c device address
|
||||
* @param clk_speed device specified clock frequency the i2c_bus will switch to during each transfer. 0 if use current bus speed.
|
||||
* @return i2c_bus_device_handle_t return a device handle if created successfully, return NULL if failed.
|
||||
*/
|
||||
i2c_bus_device_handle_t i2c_bus_device_create(i2c_bus_handle_t bus_handle, uint8_t dev_addr, uint32_t clk_speed);
|
||||
|
||||
/**
|
||||
* @brief Delete and release the I2C device resource, i2c_bus_device_delete should be used in pairs with i2c_bus_device_create.
|
||||
*
|
||||
* @param p_dev_handle Point to the I2C device handle, if delete succeed handle will set to NULL.
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_FAIL Fail
|
||||
*/
|
||||
esp_err_t i2c_bus_device_delete(i2c_bus_device_handle_t *p_dev_handle);
|
||||
|
||||
/**
|
||||
* @brief Get device's I2C address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @return uint8_t I2C address, return NULL_I2C_DEV_ADDR if dev_handle is invalid.
|
||||
*/
|
||||
uint8_t i2c_bus_device_get_address(i2c_bus_device_handle_t dev_handle);
|
||||
|
||||
/**
|
||||
* @brief Read single byte from i2c device with 8-bit internal register/memory address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to read from, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param data Pointer to a buffer to save the data that was read
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_read_byte(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t *data);
|
||||
|
||||
/**
|
||||
* @brief Read multiple bytes from i2c device with 8-bit internal register/memory address.
|
||||
* If internal reg/mem address is 16-bit, please refer i2c_bus_read_reg16
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to read from, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param data_len Number of bytes to read
|
||||
* @param data Pointer to a buffer to save the data that was read
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_read_bytes(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, uint8_t *data);
|
||||
|
||||
/**
|
||||
* @brief Read single bit of a byte from i2c device with 8-bit internal register/memory address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to read from, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param bit_num The bit number 0 - 7 to read
|
||||
* @param data Pointer to a buffer to save the data that was read. *data == 0 -> bit = 0, *data !=0 -> bit = 1.
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_read_bit(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_num, uint8_t *data);
|
||||
|
||||
/**
|
||||
* @brief Read multiple bits of a byte from i2c device with 8-bit internal register/memory address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to read from, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param bit_start The bit to start from, 0 - 7, MSB at 0
|
||||
* @param length The number of bits to read, 1 - 8
|
||||
* @param data Pointer to a buffer to save the data that was read
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_read_bits(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_start, uint8_t length, uint8_t *data);
|
||||
|
||||
/**
|
||||
* @brief Write single byte to i2c device with 8-bit internal register/memory address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to write to, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param data The byte to write.
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_write_byte(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t data);
|
||||
|
||||
/**
|
||||
* @brief Write multiple byte to i2c device with 8-bit internal register/memory address
|
||||
* If internal reg/mem address is 16-bit, please refer i2c_bus_write_reg16
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to write to, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param data_len Number of bytes to write
|
||||
* @param data Pointer to the bytes to write.
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_write_bytes(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, size_t data_len, const uint8_t *data);
|
||||
|
||||
/**
|
||||
* @brief Write single bit of a byte to an i2c device with 8-bit internal register/memory address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to write to, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param bit_num The bit number 0 - 7 to write
|
||||
* @param data The bit to write, data == 0 means set bit = 0, data !=0 means set bit = 1.
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_write_bit(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_num, uint8_t data);
|
||||
|
||||
/**
|
||||
* @brief Write multiple bits of a byte to an i2c device with 8-bit internal register/memory address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal reg/mem address to write to, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param bit_start The bit to start from, 0 - 7, MSB at 0
|
||||
* @param length The number of bits to write, 1 - 8
|
||||
* @param data The bits to write.
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_write_bits(i2c_bus_device_handle_t dev_handle, uint8_t mem_address, uint8_t bit_start, uint8_t length, uint8_t data);
|
||||
|
||||
/**************************************** Public Functions (Low level)*********************************************/
|
||||
|
||||
/**
|
||||
* @brief I2C master send queued commands create by ``i2c_cmd_link_create`` .
|
||||
* This function will trigger sending all queued commands.
|
||||
* The task will be blocked until all the commands have been sent out.
|
||||
* If I2C_BUS_DYNAMIC_CONFIG enable, i2c_bus will dynamically check configs and re-install i2c driver before each transfer,
|
||||
* hence multiple devices with different configs on a single bus can be supported.
|
||||
* @note
|
||||
* Only call this function when ``i2c_bus_read/write_xx`` do not meet the requirements
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param cmd I2C command handler
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_cmd_begin(i2c_bus_device_handle_t dev_handle, i2c_cmd_handle_t cmd);
|
||||
|
||||
/**
|
||||
* @brief Write date to an i2c device with 16-bit internal reg/mem address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal 16-bit reg/mem address to write to, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param data_len Number of bytes to write
|
||||
* @param data Pointer to the bytes to write.
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_write_reg16(i2c_bus_device_handle_t dev_handle, uint16_t mem_address, size_t data_len, const uint8_t *data);
|
||||
|
||||
/**
|
||||
* @brief Read date from i2c device with 16-bit internal reg/mem address
|
||||
*
|
||||
* @param dev_handle I2C device handle
|
||||
* @param mem_address The internal 16-bit reg/mem address to read from, set to NULL_I2C_MEM_ADDR if no internal address.
|
||||
* @param data_len Number of bytes to read
|
||||
* @param data Pointer to a buffer to save the data that was read
|
||||
* @return esp_err_t
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_bus_read_reg16(i2c_bus_device_handle_t dev_handle, uint16_t mem_address, size_t data_len, uint8_t *data);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,125 @@
|
||||
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#ifndef __I2S_LCD_DRIVER_H__
|
||||
#define __I2S_LCD_DRIVER_H__
|
||||
|
||||
#include "driver/i2s.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
#define LCD_CMD_LEV (0)
|
||||
#define LCD_DATA_LEV (1)
|
||||
|
||||
typedef void * i2s_lcd_handle_t; /** Handle of i2s lcd driver */
|
||||
|
||||
/**
|
||||
* @brief Configuration of i2s lcd mode
|
||||
*
|
||||
*/
|
||||
typedef struct {
|
||||
int8_t data_width; /*!< Parallel data width, 16bit or 8bit available */
|
||||
int8_t pin_data_num[16]; /*!< Parallel data output IO*/
|
||||
int8_t pin_num_cs; /*!< CS io num */
|
||||
int8_t pin_num_wr; /*!< Write clk io*/
|
||||
int8_t pin_num_rs; /*!< RS io num */
|
||||
int clk_freq; /*!< I2s clock frequency */
|
||||
i2s_port_t i2s_port; /*!< I2S port number */
|
||||
bool swap_data; /*!< Swap the 2 bytes of RGB565 color */
|
||||
uint32_t buffer_size; /*!< DMA buffer size */
|
||||
} i2s_lcd_config_t;
|
||||
|
||||
/**
|
||||
* @brief Initilize i2s lcd driver.
|
||||
*
|
||||
* @param config configuration of i2s
|
||||
*
|
||||
* @return A handle to the created i2s lcd driver, or NULL in case of error.
|
||||
*/
|
||||
i2s_lcd_handle_t i2s_lcd_driver_init(const i2s_lcd_config_t *config);
|
||||
|
||||
/**
|
||||
* @brief Deinit i2s lcd driver.
|
||||
*
|
||||
* @param handle i2s lcd driver handle to deinitilize
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_ERR_INVALID_ARG handle is invalid
|
||||
*/
|
||||
esp_err_t i2s_lcd_driver_deinit(i2s_lcd_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief Write a data to LCD
|
||||
*
|
||||
* @param handle i2s lcd driver handle
|
||||
* @param data Data to write
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_ERR_INVALID_ARG handle is invalid
|
||||
*/
|
||||
esp_err_t i2s_lcd_write_data(i2s_lcd_handle_t handle, uint16_t data);
|
||||
|
||||
/**
|
||||
* @brief Write a command to LCD
|
||||
*
|
||||
* @param handle Handle of i2s lcd driver
|
||||
* @param cmd command to write
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_ERR_INVALID_ARG handle is invalid
|
||||
*/
|
||||
esp_err_t i2s_lcd_write_cmd(i2s_lcd_handle_t handle, uint16_t cmd);
|
||||
|
||||
/**
|
||||
* @brief Write block data to LCD
|
||||
*
|
||||
* @param handle Handle of i2s lcd driver
|
||||
* @param data Pointer of data
|
||||
* @param length length of data
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK on success
|
||||
* - ESP_ERR_INVALID_ARG handle is invalid
|
||||
*/
|
||||
esp_err_t i2s_lcd_write(i2s_lcd_handle_t handle, const uint8_t *data, uint32_t length);
|
||||
|
||||
/**
|
||||
* @brief acquire a lock
|
||||
*
|
||||
* @param handle Handle of i2s lcd driver
|
||||
*
|
||||
* @return Always return ESP_OK
|
||||
*/
|
||||
esp_err_t i2s_lcd_acquire(i2s_lcd_handle_t handle);
|
||||
|
||||
/**
|
||||
* @brief release a lock
|
||||
*
|
||||
* @param handle Handle of i2s lcd driver
|
||||
*
|
||||
* @return Always return ESP_OK
|
||||
*/
|
||||
esp_err_t i2s_lcd_release(i2s_lcd_handle_t handle);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,164 @@
|
||||
// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#ifndef _IOT_SPI_BUS_H_
|
||||
#define _IOT_SPI_BUS_H_
|
||||
|
||||
#include "driver/spi_master.h"
|
||||
#include "driver/gpio.h"
|
||||
|
||||
#define NULL_SPI_CS_PIN -1 /*!< set cs_io_num to NULL_SPI_CS_PIN if spi device has no CP pin */
|
||||
typedef void *spi_bus_handle_t; /*!< spi bus handle */
|
||||
typedef void *spi_bus_device_handle_t; /*!< spi device handle */
|
||||
|
||||
/**
|
||||
* spi bus initialization parameters.
|
||||
* */
|
||||
typedef struct {
|
||||
gpio_num_t miso_io_num; /*!< GPIO pin for Master In Slave Out (=spi_q) signal, or -1 if not used.*/
|
||||
gpio_num_t mosi_io_num; /*!< GPIO pin for Master Out Slave In (=spi_d) signal, or -1 if not used.*/
|
||||
gpio_num_t sclk_io_num; /*!< GPIO pin for Spi CLocK signal, or -1 if not used*/
|
||||
int max_transfer_sz; /*!< <Maximum length of bytes available to send, if < 4096, 4096 will be set*/
|
||||
}spi_config_t;
|
||||
|
||||
/**
|
||||
* spi device initialization parameters.
|
||||
* */
|
||||
typedef struct {
|
||||
gpio_num_t cs_io_num; /*!< GPIO pin to select this device (CS), or -1 if not used*/
|
||||
uint8_t mode; /*!< modes (0,1,2,3) that correspond to the four possible clocking configurations*/
|
||||
int clock_speed_hz; /*!< spi clock speed, divisors of 80MHz, in Hz. See ``SPI_MASTER_FREQ_*`*/
|
||||
}spi_device_config_t;
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Create and initialize a spi bus and return the spi bus handle
|
||||
*
|
||||
* @param host_id SPI peripheral that controls this bus, SPI2_HOST or SPI3_HOST
|
||||
* @param bus_conf spi bus configurations details in spi_config_t
|
||||
* @return spi_bus_handle_t handle for spi bus operation, NULL if failed.
|
||||
*/
|
||||
spi_bus_handle_t spi_bus_create(spi_host_device_t host_id, const spi_config_t *bus_conf);
|
||||
|
||||
/**
|
||||
* @brief Deinitialize and delete the spi bus
|
||||
*
|
||||
* @param p_bus_handle pointer to spi bus handle, if delete succeed handle will set to NULL.
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_FAIL Fail
|
||||
* - ESP_OK Success
|
||||
*/
|
||||
esp_err_t spi_bus_delete(spi_bus_handle_t *p_bus_handle);
|
||||
|
||||
/**
|
||||
* @brief Create and add a device on the spi bus.
|
||||
*
|
||||
* @param bus_handle handle for spi bus operation.
|
||||
* @param device_conf spi device configurations details in spi_device_config_t
|
||||
* @return spi_bus_device_handle_t handle for device operation, NULL if failed.
|
||||
*/
|
||||
spi_bus_device_handle_t spi_bus_device_create(spi_bus_handle_t bus_handle, const spi_device_config_t *device_conf);
|
||||
|
||||
/**
|
||||
* @brief Deinitialize and remove the device from spi bus.
|
||||
*
|
||||
* @param p_dev_handle pointer to device handle, if delete succeed handle will set to NULL.
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_FAIL Fail
|
||||
* - ESP_OK Success
|
||||
*/
|
||||
esp_err_t spi_bus_device_delete(spi_bus_device_handle_t *p_dev_handle);
|
||||
|
||||
/**
|
||||
* @brief Transfer one byte with the device.
|
||||
*
|
||||
* @param dev_handle handle for device operation.
|
||||
* @param data_out data will send to device.
|
||||
* @param data_in pointer to receive buffer, set NULL to skip receive phase.
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_TIMEOUT if bus is busy
|
||||
* - ESP_OK on success
|
||||
*/
|
||||
esp_err_t spi_bus_transfer_byte(spi_bus_device_handle_t dev_handle, uint8_t data_out, uint8_t *data_in);
|
||||
|
||||
/**
|
||||
* @brief Transfer multi-bytes with the device.
|
||||
*
|
||||
* @param dev_handle handle for device operation.
|
||||
* @param data_out pointer to sent buffer, set NULL to skip sent phase.
|
||||
* @param data_in pointer to receive buffer, set NULL to skip receive phase.
|
||||
* @param data_len number of bytes will transfer.
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_TIMEOUT if bus is busy
|
||||
* - ESP_OK on success
|
||||
*/
|
||||
esp_err_t spi_bus_transfer_bytes(spi_bus_device_handle_t dev_handle, const uint8_t *data_out, uint8_t *data_in, uint32_t data_len);
|
||||
|
||||
/**************************************** Public Functions (Low level)*********************************************/
|
||||
|
||||
/**
|
||||
* @brief Send a polling transaction, wait for it to complete, and return the result
|
||||
* @note
|
||||
* Only call this function when ``spi_bus_transfer_xx`` do not meet the requirements
|
||||
*
|
||||
* @param dev_handle handle for device operation.
|
||||
* @param p_trans Description of transaction to execute
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_TIMEOUT if bus is busy
|
||||
* - ESP_OK on success
|
||||
*/
|
||||
esp_err_t spi_bus_transmit_begin(spi_bus_device_handle_t dev_handle, spi_transaction_t *p_trans);
|
||||
|
||||
/**
|
||||
* @brief Transfer one 16-bit value with the device. using msb by default.
|
||||
* For example 0x1234, 0x12 will send first then 0x34.
|
||||
*
|
||||
* @param dev_handle handle for device operation.
|
||||
* @param data_out data will send to device.
|
||||
* @param data_in pointer to receive buffer, set NULL to skip receive phase.
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_TIMEOUT if bus is busy
|
||||
* - ESP_OK on success
|
||||
*/
|
||||
esp_err_t spi_bus_transfer_reg16(spi_bus_device_handle_t dev_handle, uint16_t data_out, uint16_t *data_in);
|
||||
|
||||
/**
|
||||
* @brief Transfer one 32-bit value with the device. using msb by default.
|
||||
* For example 0x12345678, 0x12 will send first, 0x78 will send in the end.
|
||||
*
|
||||
* @param dev_handle handle for device operation.
|
||||
* @param data_out data will send to device.
|
||||
* @param data_in pointer to receive buffer, set NULL to skip receive phase.
|
||||
* @return esp_err_t
|
||||
* - ESP_ERR_INVALID_ARG if parameter is invalid
|
||||
* - ESP_ERR_TIMEOUT if bus is busy
|
||||
* - ESP_OK on success
|
||||
*/
|
||||
esp_err_t spi_bus_transfer_reg32(spi_bus_device_handle_t dev_handle, uint32_t data_out, uint32_t *data_in);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
253
firmware/esp-idf/wumei-smart-firmware/components/bus/spi_bus.c
Normal file
253
firmware/esp-idf/wumei-smart-firmware/components/bus/spi_bus.c
Normal file
@@ -0,0 +1,253 @@
|
||||
// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "esp_log.h"
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/semphr.h"
|
||||
#include "driver/spi_master.h"
|
||||
#include "driver/spi_common.h"
|
||||
#include "spi_bus.h"
|
||||
|
||||
typedef struct {
|
||||
spi_host_device_t host_id; /*!<spi device number */
|
||||
bool is_init;
|
||||
spi_bus_config_t conf; /*!<spi bus active configuration */
|
||||
} _spi_bus_t;
|
||||
|
||||
typedef struct {
|
||||
spi_device_handle_t handle;
|
||||
spi_bus_handle_t spi_bus; /*!<spi bus handle */
|
||||
spi_device_interface_config_t conf; /*!<spi device active configuration */
|
||||
SemaphoreHandle_t mutex; /* mutex to achive device thread-safe*/
|
||||
} _spi_device_t;
|
||||
|
||||
static const char *TAG = "spi_bus";
|
||||
static _spi_bus_t s_spi_bus[2];
|
||||
#define ESP_SPI_MUTEX_TICKS_TO_WAIT 2
|
||||
|
||||
#define SPI_BUS_CHECK(a, str, ret) if(!(a)) { \
|
||||
ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
|
||||
return (ret); \
|
||||
}
|
||||
|
||||
#define SPI_BUS_CHECK_GOTO(a, str, lable) if(!(a)) { \
|
||||
ESP_LOGE(TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
|
||||
goto lable; \
|
||||
}
|
||||
|
||||
#define SPI_DEVICE_MUTEX_TAKE(p_spi_dev, ret) if (!xSemaphoreTake((p_spi_dev)->mutex, ESP_SPI_MUTEX_TICKS_TO_WAIT)) { \
|
||||
ESP_LOGE(TAG, "spi device(%d) take mutex timeout, max wait = %d ticks", (int32_t)((p_spi_dev)->handle), ESP_SPI_MUTEX_TICKS_TO_WAIT); \
|
||||
return (ret); \
|
||||
}
|
||||
|
||||
#define SPI_DEVICE_MUTEX_GIVE(p_spi_dev, ret) if (!xSemaphoreGive((p_spi_dev)->mutex)) { \
|
||||
ESP_LOGE(TAG, "spi device(%d) give mutex failed", (int32_t)((p_spi_dev)->handle)); \
|
||||
return (ret); \
|
||||
}
|
||||
|
||||
spi_bus_handle_t spi_bus_create(spi_host_device_t host_id, const spi_config_t *bus_conf)
|
||||
{
|
||||
SPI_BUS_CHECK(SPI1_HOST < host_id && host_id <= SPI3_HOST, "Invalid spi host_id", NULL);
|
||||
uint8_t index = host_id - 1; //find related index
|
||||
spi_bus_config_t buscfg = {
|
||||
.miso_io_num = bus_conf->miso_io_num,
|
||||
.mosi_io_num = bus_conf->mosi_io_num,
|
||||
.sclk_io_num = bus_conf->sclk_io_num,
|
||||
.quadwp_io_num = -1,
|
||||
.quadhd_io_num = -1,
|
||||
.max_transfer_sz = bus_conf->max_transfer_sz,
|
||||
};
|
||||
int dma_chan = host_id; //set dma channel equals to host_id by default
|
||||
esp_err_t ret = spi_bus_initialize(host_id, &buscfg, dma_chan);
|
||||
SPI_BUS_CHECK(ESP_OK == ret, "spi bus create failed", NULL);
|
||||
s_spi_bus[index].host_id = host_id;
|
||||
memcpy(&s_spi_bus[index].conf, &buscfg, sizeof(spi_bus_config_t));
|
||||
s_spi_bus[index].is_init = true;
|
||||
ESP_LOGI(TAG, "SPI%d bus created", host_id + 1);
|
||||
return (spi_bus_handle_t)&s_spi_bus[index];
|
||||
}
|
||||
|
||||
esp_err_t spi_bus_delete(spi_bus_handle_t *p_bus_handle)
|
||||
{
|
||||
SPI_BUS_CHECK((NULL != p_bus_handle) && (NULL != *p_bus_handle), "Handle error", ESP_ERR_INVALID_ARG);
|
||||
_spi_bus_t *spi_bus = (_spi_bus_t *)(*p_bus_handle);
|
||||
|
||||
if (!spi_bus->is_init) {
|
||||
ESP_LOGW(TAG, "spi_bus%d has been de-inited", spi_bus->host_id);
|
||||
return ESP_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
esp_err_t ret = spi_bus_free(spi_bus->host_id);
|
||||
SPI_BUS_CHECK(ESP_OK == ret, "spi bus delete failed", ESP_FAIL);
|
||||
ESP_LOGI(TAG, "SPI%d bus delete", spi_bus->host_id + 1);
|
||||
memset(spi_bus, 0, sizeof(_spi_bus_t));
|
||||
*p_bus_handle = NULL;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
spi_bus_device_handle_t spi_bus_device_create(spi_bus_device_handle_t bus_handle, const spi_device_config_t *device_conf)
|
||||
{
|
||||
SPI_BUS_CHECK(NULL != bus_handle, "Pointer error", NULL);
|
||||
_spi_bus_t *spi_bus = (_spi_bus_t *)bus_handle;
|
||||
|
||||
_spi_device_t *spi_dev = malloc(sizeof(_spi_device_t));
|
||||
spi_device_interface_config_t devcfg = {
|
||||
.command_bits = 0,
|
||||
.address_bits = 0,
|
||||
.dummy_bits = 0,
|
||||
.clock_speed_hz = device_conf->clock_speed_hz,
|
||||
.duty_cycle_pos = 128, //50% duty cycle
|
||||
.mode = device_conf->mode,
|
||||
.spics_io_num = device_conf->cs_io_num,
|
||||
.cs_ena_posttrans = 3, //Keep the CS low 3 cycles after transaction, to stop slave from missing the last bit when CS has less propagation delay than CLK
|
||||
.queue_size = 3
|
||||
};
|
||||
esp_err_t ret = spi_bus_add_device(spi_bus->host_id, &devcfg, &spi_dev->handle);
|
||||
SPI_BUS_CHECK_GOTO(ESP_OK == ret, "add spi device failed", cleanup_device);
|
||||
spi_dev->mutex = xSemaphoreCreateMutex();
|
||||
SPI_BUS_CHECK_GOTO(NULL != spi_dev->mutex, "spi device create mutex failed", cleanup_device);
|
||||
spi_dev->spi_bus = bus_handle;
|
||||
memcpy(&spi_dev->conf, &devcfg, sizeof(spi_device_interface_config_t));
|
||||
ESP_LOGI(TAG, "SPI%d bus device added, CS=%d Mode=%u Speed=%d", spi_bus->host_id + 1, device_conf->cs_io_num, device_conf->mode, device_conf->clock_speed_hz);
|
||||
return (spi_bus_device_handle_t)spi_dev;
|
||||
|
||||
cleanup_device:
|
||||
free(spi_dev);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
esp_err_t spi_bus_device_delete(spi_bus_device_handle_t *p_dev_handle)
|
||||
{
|
||||
SPI_BUS_CHECK((NULL != p_dev_handle) && (NULL != *p_dev_handle), "Pointer error", ESP_ERR_INVALID_ARG);
|
||||
_spi_device_t *spi_dev = (_spi_device_t *)(*p_dev_handle);
|
||||
_spi_bus_t *spi_bus = (_spi_bus_t *)(spi_dev->spi_bus);
|
||||
SPI_DEVICE_MUTEX_TAKE(spi_dev, ESP_FAIL);
|
||||
esp_err_t ret = spi_bus_remove_device(spi_dev->handle);
|
||||
SPI_DEVICE_MUTEX_GIVE(spi_dev, ESP_FAIL);
|
||||
SPI_BUS_CHECK(ESP_OK == ret, "spi bus delete device failed", ret);
|
||||
vSemaphoreDelete(spi_dev->mutex);
|
||||
ESP_LOGI(TAG, "SPI%d device removed, CS=%d", spi_bus->host_id + 1, spi_dev->conf.spics_io_num);
|
||||
free(spi_dev);
|
||||
*p_dev_handle = NULL;
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
/* this function should lable with inline*/
|
||||
inline static esp_err_t _spi_device_polling_transmit(spi_bus_device_handle_t dev_handle, spi_transaction_t *trans)
|
||||
{
|
||||
SPI_BUS_CHECK(NULL != dev_handle, "Pointer error", ESP_ERR_INVALID_ARG);
|
||||
_spi_device_t *spi_dev = (_spi_device_t *)(dev_handle);
|
||||
esp_err_t ret;
|
||||
SPI_DEVICE_MUTEX_TAKE(spi_dev, ESP_FAIL);
|
||||
ret = spi_device_polling_transmit(spi_dev->handle, trans);
|
||||
SPI_DEVICE_MUTEX_GIVE(spi_dev, ESP_FAIL);
|
||||
return ret;
|
||||
}
|
||||
|
||||
esp_err_t spi_bus_transfer_byte(spi_bus_device_handle_t dev_handle, uint8_t data_out, uint8_t *data_in)
|
||||
{
|
||||
esp_err_t ret;
|
||||
spi_transaction_t trans = {
|
||||
.length = 8,
|
||||
.flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA,
|
||||
.tx_data = {
|
||||
[0] = data_out
|
||||
}
|
||||
};
|
||||
ret = _spi_device_polling_transmit(dev_handle, &trans);
|
||||
SPI_BUS_CHECK(ret == ESP_OK, "spi transfer byte failed", ret);
|
||||
|
||||
if (data_in) {
|
||||
*data_in = trans.rx_data[0];
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t spi_bus_transfer_bytes(spi_bus_device_handle_t dev_handle, const uint8_t *data_out, uint8_t *data_in, uint32_t data_len)
|
||||
{
|
||||
esp_err_t ret;
|
||||
spi_transaction_t trans = {
|
||||
.length = data_len * 8,
|
||||
.tx_buffer = NULL,
|
||||
.rx_buffer = NULL
|
||||
};
|
||||
|
||||
if (data_out) {
|
||||
trans.tx_buffer = data_out;
|
||||
}
|
||||
|
||||
if (data_in) {
|
||||
trans.rx_buffer = data_in;
|
||||
}
|
||||
|
||||
ret = _spi_device_polling_transmit(dev_handle, &trans);
|
||||
SPI_BUS_CHECK(ret == ESP_OK, "spi transfer bytes failed", ret);
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
/**************************************** Public Functions (Low level)*********************************************/
|
||||
|
||||
esp_err_t spi_bus_transmit_begin(spi_bus_device_handle_t dev_handle, spi_transaction_t *p_trans)
|
||||
{
|
||||
return _spi_device_polling_transmit(dev_handle, p_trans);
|
||||
}
|
||||
|
||||
esp_err_t spi_bus_transfer_reg16(spi_bus_device_handle_t dev_handle, uint16_t data_out, uint16_t *data_in)
|
||||
{
|
||||
esp_err_t ret;
|
||||
spi_transaction_t trans = {
|
||||
.length = 16,
|
||||
.flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA,
|
||||
/* default MSB first */
|
||||
.tx_data = {
|
||||
[0] = (data_out >> 8) & 0xff,
|
||||
[1] = data_out & 0xff,
|
||||
}
|
||||
};
|
||||
ret = _spi_device_polling_transmit(dev_handle, &trans);
|
||||
SPI_BUS_CHECK(ret == ESP_OK, "spi transfer reg16 failed", ret);
|
||||
|
||||
if (data_in) {
|
||||
*data_in = (trans.rx_data[0] << 8) | (trans.rx_data[1]);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t spi_bus_transfer_reg32(spi_bus_device_handle_t dev_handle, uint32_t data_out, uint32_t *data_in)
|
||||
{
|
||||
esp_err_t ret;
|
||||
spi_transaction_t trans = {
|
||||
.length = 32,
|
||||
.flags = SPI_TRANS_USE_RXDATA | SPI_TRANS_USE_TXDATA,
|
||||
/* default MSB first */
|
||||
.tx_data = {
|
||||
[0] = (data_out >> 24) & 0xff,
|
||||
[1] = (data_out >> 16) & 0xff,
|
||||
[2] = (data_out >> 8) & 0xff,
|
||||
[3] = data_out & 0xff
|
||||
}
|
||||
};
|
||||
ret = _spi_device_polling_transmit(dev_handle, &trans);
|
||||
SPI_BUS_CHECK(ret == ESP_OK, "spi transfer reg32 failed", ret);
|
||||
|
||||
if (data_in) {
|
||||
*data_in = (trans.rx_data[0] << 24) | (trans.rx_data[1] << 16) | (trans.rx_data[2] << 8) | (trans.rx_data[3]);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
@@ -0,0 +1,3 @@
|
||||
idf_component_register(SRCS "test_i2c_bus.c" "test_spi_bus.c"
|
||||
INCLUDE_DIRS .
|
||||
REQUIRES test_utils bus)
|
||||
@@ -0,0 +1,5 @@
|
||||
#
|
||||
#Component Makefile
|
||||
#
|
||||
|
||||
COMPONENT_ADD_LDFLAGS = -Wl,--whole-archive -l$(COMPONENT_NAME) -Wl,--no-whole-archive
|
||||
@@ -0,0 +1,269 @@
|
||||
// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include "unity.h"
|
||||
#include "test_utils.h"
|
||||
#include "unity_config.h"
|
||||
#include "i2c_bus.h"
|
||||
#include "esp_system.h"
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
|
||||
#define I2C_MASTER_SCL_IO (gpio_num_t)22 /*!< gpio number for I2C master clock */
|
||||
#define I2C_MASTER_SDA_IO (gpio_num_t)21 /*!< gpio number for I2C master data */
|
||||
|
||||
#define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
|
||||
#define RW_TEST_LENGTH 129 /*!<Data length for r/w test, any value from 0-DATA_LENGTH*/
|
||||
#define DELAY_TIME_BETWEEN_ITEMS_MS 1234 /*!< delay time between different test items */
|
||||
|
||||
#define I2C_SLAVE_SCL_IO 17 /*!<gpio number for i2c slave clock */
|
||||
#define I2C_SLAVE_SDA_IO 16 /*!<gpio number for i2c slave data */
|
||||
#define I2C_MASTER_NUM I2C_NUM_1 /*!<I2C port number for master dev */
|
||||
#define I2C_MASTER_FREQ_HZ 100000 /*!< I2C master clock frequency */
|
||||
#define I2C_SLAVE_NUM I2C_NUM_0 /*!<I2C port number for slave dev */
|
||||
#define I2C_SLAVE_TX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave tx buffer size */
|
||||
#define I2C_SLAVE_RX_BUF_LEN (2*DATA_LENGTH) /*!<I2C slave rx buffer size */
|
||||
|
||||
#define ESP_SLAVE_ADDR 0x28 /*!< ESP32 slave address, you can set any 7bit value */
|
||||
|
||||
void i2c_bus_init_deinit_test()
|
||||
{
|
||||
i2c_config_t conf = {
|
||||
.mode = I2C_MODE_MASTER,
|
||||
.sda_io_num = I2C_MASTER_SDA_IO,
|
||||
.sda_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.scl_io_num = I2C_MASTER_SCL_IO,
|
||||
.scl_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.master.clk_speed = I2C_MASTER_FREQ_HZ,
|
||||
};
|
||||
i2c_bus_handle_t i2c0_bus_1 = i2c_bus_create(I2C_NUM_0, &conf);
|
||||
TEST_ASSERT(i2c0_bus_1 != NULL);
|
||||
/** configs not change**/
|
||||
i2c0_bus_1 = i2c_bus_create(I2C_NUM_0, &conf);
|
||||
TEST_ASSERT(i2c0_bus_1 != NULL);
|
||||
/** configs not change**/
|
||||
conf.master.clk_speed *= 2;
|
||||
i2c0_bus_1 = i2c_bus_create(I2C_NUM_0, &conf);
|
||||
TEST_ASSERT(i2c0_bus_1 != NULL);
|
||||
vTaskDelay(100 / portTICK_RATE_MS);
|
||||
TEST_ASSERT(ESP_OK == i2c_bus_delete(&i2c0_bus_1));
|
||||
TEST_ASSERT(i2c0_bus_1 == NULL);
|
||||
}
|
||||
|
||||
void i2c_bus_device_add_test()
|
||||
{
|
||||
i2c_config_t conf = {
|
||||
.mode = I2C_MODE_MASTER,
|
||||
.sda_io_num = I2C_MASTER_SDA_IO,
|
||||
.sda_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.scl_io_num = I2C_MASTER_SCL_IO,
|
||||
.scl_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.master.clk_speed = I2C_MASTER_FREQ_HZ,
|
||||
};
|
||||
i2c_bus_handle_t i2c0_bus_1 = i2c_bus_create(I2C_NUM_0, &conf);
|
||||
TEST_ASSERT(i2c0_bus_1 != NULL);
|
||||
i2c_bus_device_handle_t i2c_device1 = i2c_bus_device_create(i2c0_bus_1, 0x01, 400000);
|
||||
TEST_ASSERT(i2c_device1 != NULL);
|
||||
i2c_bus_device_handle_t i2c_device2 = i2c_bus_device_create(i2c0_bus_1, 0x01, 100000);
|
||||
TEST_ASSERT(i2c_device2 != NULL);
|
||||
i2c_bus_device_delete(&i2c_device1);
|
||||
TEST_ASSERT(i2c_device1 == NULL);
|
||||
i2c_bus_device_delete(&i2c_device2);
|
||||
TEST_ASSERT(i2c_device2 == NULL);
|
||||
TEST_ASSERT(ESP_OK == i2c_bus_delete(&i2c0_bus_1));
|
||||
TEST_ASSERT(i2c0_bus_1 == NULL);
|
||||
}
|
||||
|
||||
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
|
||||
// print the reading buffer
|
||||
static void disp_buf(uint8_t *buf, int len)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < len; i++) {
|
||||
printf("%02x ", buf[i]);
|
||||
|
||||
if ((i + 1) % 16 == 0) {
|
||||
printf("\n");
|
||||
}
|
||||
}
|
||||
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
static void i2c_master_write_test(void)
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int i;
|
||||
i2c_config_t conf = {
|
||||
.mode = I2C_MODE_MASTER,
|
||||
.sda_io_num = I2C_MASTER_SDA_IO,
|
||||
.sda_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.scl_io_num = I2C_MASTER_SCL_IO,
|
||||
.scl_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.master.clk_speed = I2C_MASTER_FREQ_HZ,
|
||||
};
|
||||
i2c_bus_handle_t i2c0_bus = i2c_bus_create(I2C_MASTER_NUM, &conf);
|
||||
TEST_ASSERT(i2c0_bus != NULL);
|
||||
i2c_bus_device_handle_t i2c_device1 = i2c_bus_device_create(i2c0_bus, ESP_SLAVE_ADDR, 0);
|
||||
TEST_ASSERT(i2c_device1 != NULL);
|
||||
|
||||
unity_wait_for_signal("i2c slave init finish");
|
||||
|
||||
unity_send_signal("master write");
|
||||
|
||||
for (i = 0; i < DATA_LENGTH / 2; i++) {
|
||||
data_wr[i] = i;
|
||||
}
|
||||
|
||||
i2c_bus_write_bytes(i2c_device1, NULL_I2C_MEM_ADDR, DATA_LENGTH / 2, data_wr);
|
||||
disp_buf(data_wr, i + 1);
|
||||
free(data_wr);
|
||||
i2c_bus_device_delete(&i2c_device1);
|
||||
TEST_ASSERT(i2c_device1 == NULL);
|
||||
TEST_ASSERT(ESP_OK == i2c_bus_delete(&i2c0_bus));
|
||||
TEST_ASSERT(i2c0_bus == NULL);
|
||||
}
|
||||
|
||||
static void i2c_slave_read_test(void)
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int size_rd = 0;
|
||||
int len = 0;
|
||||
|
||||
i2c_config_t conf_slave = {
|
||||
.mode = I2C_MODE_SLAVE,
|
||||
.sda_io_num = I2C_SLAVE_SDA_IO,
|
||||
.scl_io_num = I2C_SLAVE_SCL_IO,
|
||||
.sda_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.scl_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.slave.addr_10bit_en = 0,
|
||||
.slave.slave_addr = ESP_SLAVE_ADDR,
|
||||
};
|
||||
|
||||
TEST_ESP_OK(i2c_param_config(I2C_SLAVE_NUM, &conf_slave));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0));
|
||||
unity_send_signal("i2c slave init finish");
|
||||
|
||||
unity_wait_for_signal("master write");
|
||||
|
||||
while (1) {
|
||||
len = i2c_slave_read_buffer(I2C_SLAVE_NUM, data_rd + size_rd, DATA_LENGTH, 10000 / portTICK_RATE_MS);
|
||||
|
||||
if (len == 0) {
|
||||
break;
|
||||
}
|
||||
|
||||
size_rd += len;
|
||||
}
|
||||
|
||||
disp_buf(data_rd, size_rd);
|
||||
|
||||
for (int i = 0; i < size_rd; i++) {
|
||||
TEST_ASSERT(data_rd[i] == i);
|
||||
}
|
||||
|
||||
free(data_rd);
|
||||
unity_send_signal("ready to delete");
|
||||
TEST_ESP_OK(i2c_driver_delete(I2C_SLAVE_NUM));
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c_bus]", i2c_master_write_test, i2c_slave_read_test);
|
||||
|
||||
static void master_read_slave_test(void)
|
||||
{
|
||||
uint8_t *data_rd = (uint8_t *) malloc(DATA_LENGTH);
|
||||
memset(data_rd, 0, DATA_LENGTH);
|
||||
i2c_config_t conf = {
|
||||
.mode = I2C_MODE_MASTER,
|
||||
.sda_io_num = I2C_MASTER_SDA_IO,
|
||||
.sda_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.scl_io_num = I2C_MASTER_SCL_IO,
|
||||
.scl_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.master.clk_speed = I2C_MASTER_FREQ_HZ,
|
||||
};
|
||||
i2c_bus_handle_t i2c0_bus = i2c_bus_create(I2C_MASTER_NUM, &conf);
|
||||
TEST_ASSERT(i2c0_bus != NULL);
|
||||
i2c_bus_device_handle_t i2c_device1 = i2c_bus_device_create(i2c0_bus, ESP_SLAVE_ADDR, 0);
|
||||
TEST_ASSERT(i2c_device1 != NULL);
|
||||
|
||||
unity_wait_for_signal("i2c slave init finish");
|
||||
unity_send_signal("slave write");
|
||||
unity_wait_for_signal("master read");
|
||||
|
||||
i2c_bus_read_bytes(i2c_device1, NULL_I2C_MEM_ADDR, RW_TEST_LENGTH, data_rd);
|
||||
|
||||
vTaskDelay(100 / portTICK_RATE_MS);
|
||||
|
||||
for (int i = 0; i < RW_TEST_LENGTH; i++) {
|
||||
printf("%d\n", data_rd[i]);
|
||||
TEST_ASSERT(data_rd[i] == i);
|
||||
}
|
||||
|
||||
free(data_rd);
|
||||
unity_send_signal("ready to delete");
|
||||
i2c_bus_device_delete(&i2c_device1);
|
||||
TEST_ASSERT(i2c_device1 == NULL);
|
||||
TEST_ASSERT(ESP_OK == i2c_bus_delete(&i2c0_bus));
|
||||
TEST_ASSERT(i2c0_bus == NULL);
|
||||
}
|
||||
|
||||
static void slave_write_buffer_test(void)
|
||||
{
|
||||
uint8_t *data_wr = (uint8_t *) malloc(DATA_LENGTH);
|
||||
int size_rd;
|
||||
|
||||
i2c_config_t conf_slave = {
|
||||
.mode = I2C_MODE_SLAVE,
|
||||
.sda_io_num = I2C_SLAVE_SDA_IO,
|
||||
.scl_io_num = I2C_SLAVE_SCL_IO,
|
||||
.sda_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.scl_pullup_en = GPIO_PULLUP_ENABLE,
|
||||
.slave.addr_10bit_en = 0,
|
||||
.slave.slave_addr = ESP_SLAVE_ADDR,
|
||||
};
|
||||
|
||||
TEST_ESP_OK(i2c_param_config(I2C_SLAVE_NUM, &conf_slave));
|
||||
TEST_ESP_OK(i2c_driver_install(I2C_SLAVE_NUM, I2C_MODE_SLAVE,
|
||||
I2C_SLAVE_RX_BUF_LEN,
|
||||
I2C_SLAVE_TX_BUF_LEN, 0));
|
||||
unity_send_signal("i2c slave init finish");
|
||||
|
||||
unity_wait_for_signal("slave write");
|
||||
|
||||
for (int i = 0; i < DATA_LENGTH / 2; i++) {
|
||||
data_wr[i] = i;
|
||||
}
|
||||
|
||||
size_rd = i2c_slave_write_buffer(I2C_SLAVE_NUM, data_wr, RW_TEST_LENGTH, 2000 / portTICK_RATE_MS);
|
||||
disp_buf(data_wr, size_rd);
|
||||
unity_send_signal("master read");
|
||||
unity_wait_for_signal("ready to delete");
|
||||
free(data_wr);
|
||||
i2c_driver_delete(I2C_SLAVE_NUM);
|
||||
}
|
||||
|
||||
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c_bus]", master_read_slave_test, slave_write_buffer_test);
|
||||
|
||||
#endif //DISABLED_FOR_TARGET(ESP32S2)
|
||||
|
||||
|
||||
TEST_CASE("i2c bus init-deinit test", "[bus][i2c_bus]")
|
||||
{
|
||||
i2c_bus_init_deinit_test();
|
||||
i2c_bus_device_add_test();
|
||||
}
|
||||
@@ -0,0 +1,119 @@
|
||||
// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
#include <stdio.h>
|
||||
#include "unity.h"
|
||||
#include "unity_config.h"
|
||||
#include "spi_bus.h"
|
||||
#include "esp_system.h"
|
||||
#include "freertos/FreeRTOS.h"
|
||||
#include "freertos/task.h"
|
||||
|
||||
#define SPI_SCK_IO 18
|
||||
#define SPI_MOSI_IO 23
|
||||
#define SPI_MISO_IO 19
|
||||
|
||||
void spi_bus_init_deinit_test()
|
||||
{
|
||||
spi_bus_handle_t bus_handle = NULL;
|
||||
spi_config_t bus_conf = {
|
||||
.miso_io_num = SPI_MISO_IO,
|
||||
.mosi_io_num = SPI_MOSI_IO,
|
||||
.sclk_io_num = SPI_SCK_IO,
|
||||
};
|
||||
bus_handle = spi_bus_create(SPI2_HOST, &bus_conf);
|
||||
TEST_ASSERT(bus_handle != NULL);
|
||||
TEST_ASSERT(ESP_OK == spi_bus_delete(&bus_handle));
|
||||
TEST_ASSERT(bus_handle == NULL);
|
||||
bus_handle = spi_bus_create(SPI3_HOST, &bus_conf);
|
||||
TEST_ASSERT(bus_handle != NULL);
|
||||
TEST_ASSERT(ESP_OK == spi_bus_delete(&bus_handle));
|
||||
TEST_ASSERT(bus_handle == NULL);
|
||||
}
|
||||
|
||||
/* connect mosi with miso for transfer test */
|
||||
void spi_bus_transfer_test()
|
||||
{
|
||||
spi_bus_handle_t bus_handle = NULL;
|
||||
spi_config_t bus_conf = {
|
||||
.miso_io_num = SPI_MISO_IO,
|
||||
.mosi_io_num = SPI_MOSI_IO,
|
||||
.sclk_io_num = SPI_SCK_IO,
|
||||
};
|
||||
|
||||
spi_device_config_t device_conf = {
|
||||
.cs_io_num = NULL_SPI_CS_PIN,
|
||||
.mode = 0,
|
||||
.clock_speed_hz = 20 * 1000 * 1000,
|
||||
};
|
||||
|
||||
bus_handle = spi_bus_create(SPI2_HOST, &bus_conf);
|
||||
TEST_ASSERT(bus_handle != NULL);
|
||||
spi_bus_device_handle_t device_handle = NULL;
|
||||
device_handle = spi_bus_device_create(bus_handle, &device_conf);
|
||||
TEST_ASSERT(device_handle != NULL);
|
||||
|
||||
printf("************byte transfer test***************\n");
|
||||
for (uint8_t i = 0; i < 200; i++) {
|
||||
uint8_t in = 0;
|
||||
TEST_ASSERT(ESP_OK == spi_bus_transfer_byte(device_handle, i, &in));
|
||||
TEST_ASSERT_EQUAL_UINT8(i, in);
|
||||
printf("in=%u\n", in);
|
||||
}
|
||||
|
||||
vTaskDelay(2);
|
||||
printf("************bytes transfer test***************\n");
|
||||
uint8_t data[200] = {0};
|
||||
uint8_t data_in[200] = {0};
|
||||
for (uint8_t i = 0; i < 200; i++) {
|
||||
data[i] = i;
|
||||
}
|
||||
TEST_ASSERT(ESP_OK == spi_bus_transfer_bytes(device_handle, data, data_in, 200));
|
||||
for (uint8_t i = 0; i < 200; i++) {
|
||||
printf("%u ", data_in[i]);
|
||||
}
|
||||
printf("\n");
|
||||
|
||||
vTaskDelay(2);
|
||||
printf("************reg16 transfer test***************\n");
|
||||
for (uint16_t i = (0xffff - 200); i < 0xffff; i++) {
|
||||
uint16_t in = 0;
|
||||
TEST_ASSERT(ESP_OK == spi_bus_transfer_reg16(device_handle, i, &in));
|
||||
TEST_ASSERT_EQUAL_UINT16(i, in);
|
||||
printf("in=%u\n", in);
|
||||
}
|
||||
|
||||
vTaskDelay(2);
|
||||
printf("************reg32 transfer test***************\n");
|
||||
for (uint32_t i = (0xffffffff - 200); i < 0xffffffff; i++) {
|
||||
uint32_t in = 0;
|
||||
TEST_ASSERT(ESP_OK == spi_bus_transfer_reg32(device_handle, i, &in));
|
||||
TEST_ASSERT_EQUAL_UINT32(i, in);
|
||||
printf("in=%x\n", in);
|
||||
}
|
||||
|
||||
TEST_ASSERT(ESP_OK == spi_bus_device_delete(&device_handle));
|
||||
TEST_ASSERT(device_handle == NULL);
|
||||
TEST_ASSERT(ESP_OK == spi_bus_delete(&bus_handle));
|
||||
TEST_ASSERT(bus_handle == NULL);
|
||||
}
|
||||
|
||||
TEST_CASE("spi bus init-deinit test", "[bus]spi_bus]")
|
||||
{
|
||||
spi_bus_init_deinit_test();
|
||||
}
|
||||
|
||||
TEST_CASE("spi bus transfer test", "[bus][spi_bus]")
|
||||
{
|
||||
spi_bus_transfer_test();
|
||||
}
|
||||
Reference in New Issue
Block a user