From d6ff7a2077fd8865fae6f2a0b484467116009b79 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E4=B9=90=E6=98=8E?= <1443685018@qq.com> Date: Wed, 1 Sep 2021 01:49:15 +0000 Subject: [PATCH 1/9] =?UTF-8?q?=E6=96=B0=E5=BB=BA=20stm32-esp?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- firmware/stm32-esp/.keep | 0 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 firmware/stm32-esp/.keep diff --git a/firmware/stm32-esp/.keep b/firmware/stm32-esp/.keep new file mode 100644 index 00000000..e69de29b From 4e0dc1ed9d78806704578bb7121c5594576d2343 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=9C=88=E6=98=8EL=E6=98=9F=E7=A8=80?= <1443685018@qq.com> Date: Wed, 1 Sep 2021 05:56:49 +0000 Subject: [PATCH 2/9] clear --- firmware/stm32-esp/keilkill.bat | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 firmware/stm32-esp/keilkill.bat diff --git a/firmware/stm32-esp/keilkill.bat b/firmware/stm32-esp/keilkill.bat new file mode 100644 index 00000000..1d37d16e --- /dev/null +++ b/firmware/stm32-esp/keilkill.bat @@ -0,0 +1,27 @@ +del *.bak /s +del *.ddk /s +del *.edk /s +del *.lst /s +del *.lnp /s +del *.mpf /s +del *.mpj /s +del *.obj /s +del *.omf /s +::del *.opt /s ::ɾJLINK +del *.plg /s +del *.rpt /s +del *.tmp /s +del *.__i /s +del *.crf /s +del *.o /s +del *.d /s +del *.axf /s +del *.tra /s +del *.dep /s +del JLinkLog.txt /s + +del *.iex /s +del *.htm /s +del *.sct /s +del *.map /s +exit From 975adfb602d3cf9c8bef9b0ce03906b883e67d15 Mon Sep 17 00:00:00 2001 From: yueming Date: Wed, 1 Sep 2021 14:03:46 +0800 Subject: [PATCH 3/9] =?UTF-8?q?=E5=88=9D=E5=A7=8B=E7=89=88=E6=9C=AC?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- firmware/stm32-esp/libraries/cmsis/core_cm3.c | 784 ++ firmware/stm32-esp/libraries/cmsis/core_cm3.h | 1818 ++++ .../cmsis/startup/startup_stm32f10x_hd.s | 358 + .../stm32-esp/libraries/cmsis/stm32f10x.h | 8336 +++++++++++++++++ .../libraries/cmsis/system_stm32f10x.c | 1094 +++ .../libraries/cmsis/system_stm32f10x.h | 98 + firmware/stm32-esp/libraries/fwlib/inc/misc.h | 220 + .../libraries/fwlib/inc/stm32f10x_adc.h | 483 + .../libraries/fwlib/inc/stm32f10x_bkp.h | 195 + .../libraries/fwlib/inc/stm32f10x_can.h | 697 ++ .../libraries/fwlib/inc/stm32f10x_cec.h | 210 + .../libraries/fwlib/inc/stm32f10x_crc.h | 94 + .../libraries/fwlib/inc/stm32f10x_dac.h | 317 + .../libraries/fwlib/inc/stm32f10x_dbgmcu.h | 119 + .../libraries/fwlib/inc/stm32f10x_dma.h | 439 + .../libraries/fwlib/inc/stm32f10x_exti.h | 184 + .../libraries/fwlib/inc/stm32f10x_flash.h | 426 + .../libraries/fwlib/inc/stm32f10x_fsmc.h | 733 ++ .../libraries/fwlib/inc/stm32f10x_gpio.h | 385 + .../libraries/fwlib/inc/stm32f10x_i2c.h | 684 ++ .../libraries/fwlib/inc/stm32f10x_iwdg.h | 140 + .../libraries/fwlib/inc/stm32f10x_pwr.h | 156 + .../libraries/fwlib/inc/stm32f10x_rcc.h | 727 ++ .../libraries/fwlib/inc/stm32f10x_rtc.h | 135 + .../libraries/fwlib/inc/stm32f10x_sdio.h | 531 ++ .../libraries/fwlib/inc/stm32f10x_spi.h | 487 + .../libraries/fwlib/inc/stm32f10x_tim.h | 1164 +++ .../libraries/fwlib/inc/stm32f10x_usart.h | 412 + .../libraries/fwlib/inc/stm32f10x_wwdg.h | 115 + firmware/stm32-esp/libraries/fwlib/src/misc.c | 225 + .../libraries/fwlib/src/stm32f10x_adc.c | 1307 +++ .../libraries/fwlib/src/stm32f10x_bkp.c | 308 + .../libraries/fwlib/src/stm32f10x_can.c | 1415 +++ .../libraries/fwlib/src/stm32f10x_cec.c | 433 + .../libraries/fwlib/src/stm32f10x_crc.c | 160 + .../libraries/fwlib/src/stm32f10x_dac.c | 571 ++ .../libraries/fwlib/src/stm32f10x_dbgmcu.c | 162 + .../libraries/fwlib/src/stm32f10x_dma.c | 714 ++ .../libraries/fwlib/src/stm32f10x_exti.c | 269 + .../libraries/fwlib/src/stm32f10x_flash.c | 1684 ++++ .../libraries/fwlib/src/stm32f10x_fsmc.c | 866 ++ .../libraries/fwlib/src/stm32f10x_gpio.c | 650 ++ .../libraries/fwlib/src/stm32f10x_i2c.c | 1331 +++ .../libraries/fwlib/src/stm32f10x_iwdg.c | 190 + .../libraries/fwlib/src/stm32f10x_pwr.c | 307 + .../libraries/fwlib/src/stm32f10x_rcc.c | 1470 +++ .../libraries/fwlib/src/stm32f10x_rtc.c | 339 + .../libraries/fwlib/src/stm32f10x_sdio.c | 799 ++ .../libraries/fwlib/src/stm32f10x_spi.c | 908 ++ .../libraries/fwlib/src/stm32f10x_tim.c | 2890 ++++++ .../libraries/fwlib/src/stm32f10x_usart.c | 1058 +++ .../libraries/fwlib/src/stm32f10x_wwdg.c | 224 + firmware/stm32-esp/output/pro.bin | Bin 0 -> 14508 bytes firmware/stm32-esp/output/pro.hex | 1709 ++++ .../stm32-esp/project/EventRecorderStub.scvd | 9 + firmware/stm32-esp/project/pro.uvgui.LS-PC | 3642 +++++++ firmware/stm32-esp/project/pro.uvgui.RJYF-PC | 3696 ++++++++ firmware/stm32-esp/project/pro.uvgui.RJYS-PC | 1919 ++++ firmware/stm32-esp/project/pro.uvopt | 1019 ++ firmware/stm32-esp/project/pro.uvproj | 770 ++ firmware/stm32-esp/user/cjson/cJSON.c | 727 ++ firmware/stm32-esp/user/cjson/cJSON.h | 126 + firmware/stm32-esp/user/com/uart1_receive.c | 40 + firmware/stm32-esp/user/com/uart1_receive.h | 27 + firmware/stm32-esp/user/com/uart2_receive.c | 81 + firmware/stm32-esp/user/com/uart2_receive.h | 21 + firmware/stm32-esp/user/com/uart3_receive.c | 28 + firmware/stm32-esp/user/com/uart3_receive.h | 24 + firmware/stm32-esp/user/data/basic_data.c | 18 + firmware/stm32-esp/user/data/basic_data.h | 65 + firmware/stm32-esp/user/drive/bsp_adc.c | 70 + firmware/stm32-esp/user/drive/bsp_adc.h | 17 + firmware/stm32-esp/user/drive/bsp_clock.c | 53 + firmware/stm32-esp/user/drive/bsp_clock.h | 12 + firmware/stm32-esp/user/drive/bsp_port.c | 74 + firmware/stm32-esp/user/drive/bsp_port.h | 34 + firmware/stm32-esp/user/drive/bsp_timer3.c | 123 + firmware/stm32-esp/user/drive/bsp_timer3.h | 15 + firmware/stm32-esp/user/drive/bsp_tool.c | 2 + firmware/stm32-esp/user/drive/bsp_tool.h | 11 + firmware/stm32-esp/user/drive/bsp_uart1.c | 107 + firmware/stm32-esp/user/drive/bsp_uart1.h | 22 + firmware/stm32-esp/user/drive/bsp_uart2.c | 111 + firmware/stm32-esp/user/drive/bsp_uart2.h | 19 + firmware/stm32-esp/user/drive/bsp_uart3.c | 109 + firmware/stm32-esp/user/drive/bsp_uart3.h | 18 + firmware/stm32-esp/user/main.c | 67 + firmware/stm32-esp/user/main.h | 28 + firmware/stm32-esp/user/mqtt/MQTTConnect.h | 126 + .../stm32-esp/user/mqtt/MQTTConnectClient.c | 181 + .../stm32-esp/user/mqtt/MQTTConnectServer.c | 125 + .../user/mqtt/MQTTDeserializePublish.c | 105 + firmware/stm32-esp/user/mqtt/MQTTFormat.c | 233 + firmware/stm32-esp/user/mqtt/MQTTFormat.h | 37 + firmware/stm32-esp/user/mqtt/MQTTPacket.c | 365 + firmware/stm32-esp/user/mqtt/MQTTPacket.h | 116 + firmware/stm32-esp/user/mqtt/MQTTPublish.h | 38 + .../user/mqtt/MQTTSerializePublish.c | 145 + firmware/stm32-esp/user/mqtt/MQTTSubscribe.h | 39 + .../stm32-esp/user/mqtt/MQTTSubscribeClient.c | 118 + .../stm32-esp/user/mqtt/MQTTSubscribeServer.c | 92 + .../stm32-esp/user/mqtt/MQTTUnsubscribe.h | 38 + .../user/mqtt/MQTTUnsubscribeClient.c | 87 + .../user/mqtt/MQTTUnsubscribeServer.c | 83 + firmware/stm32-esp/user/mqtt/StackTrace.h | 61 + firmware/stm32-esp/user/show/battery.c | 220 + firmware/stm32-esp/user/show/battery.h | 31 + firmware/stm32-esp/user/show/dev_work.c | 127 + firmware/stm32-esp/user/show/dev_work.h | 29 + firmware/stm32-esp/user/show/esp8266_uart2.c | 253 + firmware/stm32-esp/user/show/esp8266_uart2.h | 23 + firmware/stm32-esp/user/show/esp8266_work.c | 269 + firmware/stm32-esp/user/show/esp8266_work.h | 18 + firmware/stm32-esp/user/show/pm_uart3.c | 196 + firmware/stm32-esp/user/show/pm_uart3.h | 28 + .../stm32-esp/user/show/simulation_font.h | 270 + firmware/stm32-esp/user/show/simulation_lcd.c | 1157 +++ firmware/stm32-esp/user/show/simulation_lcd.h | 206 + firmware/stm32-esp/user/show/stmflash.c | 116 + firmware/stm32-esp/user/show/stmflash.h | 44 + firmware/stm32-esp/user/stm32f10x_conf.h | 77 + firmware/stm32-esp/user/stm32f10x_it.c | 160 + firmware/stm32-esp/user/stm32f10x_it.h | 54 + 123 files changed, 59901 insertions(+) create mode 100644 firmware/stm32-esp/libraries/cmsis/core_cm3.c create mode 100644 firmware/stm32-esp/libraries/cmsis/core_cm3.h create mode 100644 firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s create mode 100644 firmware/stm32-esp/libraries/cmsis/stm32f10x.h create mode 100644 firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c create mode 100644 firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/misc.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h create mode 100644 firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h create mode 100644 firmware/stm32-esp/libraries/fwlib/src/misc.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c create mode 100644 firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c create mode 100644 firmware/stm32-esp/output/pro.bin create mode 100644 firmware/stm32-esp/output/pro.hex create mode 100644 firmware/stm32-esp/project/EventRecorderStub.scvd create mode 100644 firmware/stm32-esp/project/pro.uvgui.LS-PC create mode 100644 firmware/stm32-esp/project/pro.uvgui.RJYF-PC create mode 100644 firmware/stm32-esp/project/pro.uvgui.RJYS-PC create mode 100644 firmware/stm32-esp/project/pro.uvopt create mode 100644 firmware/stm32-esp/project/pro.uvproj create mode 100644 firmware/stm32-esp/user/cjson/cJSON.c create mode 100644 firmware/stm32-esp/user/cjson/cJSON.h create mode 100644 firmware/stm32-esp/user/com/uart1_receive.c create mode 100644 firmware/stm32-esp/user/com/uart1_receive.h create mode 100644 firmware/stm32-esp/user/com/uart2_receive.c create mode 100644 firmware/stm32-esp/user/com/uart2_receive.h create mode 100644 firmware/stm32-esp/user/com/uart3_receive.c create mode 100644 firmware/stm32-esp/user/com/uart3_receive.h create mode 100644 firmware/stm32-esp/user/data/basic_data.c create mode 100644 firmware/stm32-esp/user/data/basic_data.h create mode 100644 firmware/stm32-esp/user/drive/bsp_adc.c create mode 100644 firmware/stm32-esp/user/drive/bsp_adc.h create mode 100644 firmware/stm32-esp/user/drive/bsp_clock.c create mode 100644 firmware/stm32-esp/user/drive/bsp_clock.h create mode 100644 firmware/stm32-esp/user/drive/bsp_port.c create mode 100644 firmware/stm32-esp/user/drive/bsp_port.h create mode 100644 firmware/stm32-esp/user/drive/bsp_timer3.c create mode 100644 firmware/stm32-esp/user/drive/bsp_timer3.h create mode 100644 firmware/stm32-esp/user/drive/bsp_tool.c create mode 100644 firmware/stm32-esp/user/drive/bsp_tool.h create mode 100644 firmware/stm32-esp/user/drive/bsp_uart1.c create mode 100644 firmware/stm32-esp/user/drive/bsp_uart1.h create mode 100644 firmware/stm32-esp/user/drive/bsp_uart2.c create mode 100644 firmware/stm32-esp/user/drive/bsp_uart2.h create mode 100644 firmware/stm32-esp/user/drive/bsp_uart3.c create mode 100644 firmware/stm32-esp/user/drive/bsp_uart3.h create mode 100644 firmware/stm32-esp/user/main.c create mode 100644 firmware/stm32-esp/user/main.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTConnect.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTConnectClient.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTConnectServer.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTFormat.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTFormat.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTPacket.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTPacket.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTPublish.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTSubscribe.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h create mode 100644 firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c create mode 100644 firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c create mode 100644 firmware/stm32-esp/user/mqtt/StackTrace.h create mode 100644 firmware/stm32-esp/user/show/battery.c create mode 100644 firmware/stm32-esp/user/show/battery.h create mode 100644 firmware/stm32-esp/user/show/dev_work.c create mode 100644 firmware/stm32-esp/user/show/dev_work.h create mode 100644 firmware/stm32-esp/user/show/esp8266_uart2.c create mode 100644 firmware/stm32-esp/user/show/esp8266_uart2.h create mode 100644 firmware/stm32-esp/user/show/esp8266_work.c create mode 100644 firmware/stm32-esp/user/show/esp8266_work.h create mode 100644 firmware/stm32-esp/user/show/pm_uart3.c create mode 100644 firmware/stm32-esp/user/show/pm_uart3.h create mode 100644 firmware/stm32-esp/user/show/simulation_font.h create mode 100644 firmware/stm32-esp/user/show/simulation_lcd.c create mode 100644 firmware/stm32-esp/user/show/simulation_lcd.h create mode 100644 firmware/stm32-esp/user/show/stmflash.c create mode 100644 firmware/stm32-esp/user/show/stmflash.h create mode 100644 firmware/stm32-esp/user/stm32f10x_conf.h create mode 100644 firmware/stm32-esp/user/stm32f10x_it.c create mode 100644 firmware/stm32-esp/user/stm32f10x_it.h diff --git a/firmware/stm32-esp/libraries/cmsis/core_cm3.c b/firmware/stm32-esp/libraries/cmsis/core_cm3.c new file mode 100644 index 00000000..fcff0d13 --- /dev/null +++ b/firmware/stm32-esp/libraries/cmsis/core_cm3.c @@ -0,0 +1,784 @@ +/**************************************************************************//** + * @file core_cm3.c + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File + * @version V1.30 + * @date 30. October 2009 + * + * @note + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * @par + * ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * @par + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + +#include + +/* define compiler specific symbols */ +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + +/* ################### Compiler specific Intrinsics ########################### */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +__ASM uint32_t __get_PSP(void) +{ + mrs r0, psp + bx lr +} + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +__ASM void __set_PSP(uint32_t topOfProcStack) +{ + msr psp, r0 + bx lr +} + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +__ASM uint32_t __get_MSP(void) +{ + mrs r0, msp + bx lr +} + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +__ASM void __set_MSP(uint32_t mainStackPointer) +{ + msr msp, r0 + bx lr +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +__ASM uint32_t __REV16(uint16_t value) +{ + rev16 r0, r0 + bx lr +} + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +__ASM int32_t __REVSH(int16_t value) +{ + revsh r0, r0 + bx lr +} + + +#if (__ARMCC_VERSION < 400000) + +/** + * @brief Remove the exclusive lock created by ldrex + * + * Removes the exclusive lock which is created by ldrex. + */ +__ASM void __CLREX(void) +{ + clrex +} + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +__ASM uint32_t __get_BASEPRI(void) +{ + mrs r0, basepri + bx lr +} + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +__ASM void __set_BASEPRI(uint32_t basePri) +{ + msr basepri, r0 + bx lr +} + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +__ASM uint32_t __get_PRIMASK(void) +{ + mrs r0, primask + bx lr +} + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +__ASM void __set_PRIMASK(uint32_t priMask) +{ + msr primask, r0 + bx lr +} + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +__ASM uint32_t __get_FAULTMASK(void) +{ + mrs r0, faultmask + bx lr +} + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +__ASM void __set_FAULTMASK(uint32_t faultMask) +{ + msr faultmask, r0 + bx lr +} + +/** + * @brief Return the Control Register value + * + * @return Control value + * + * Return the content of the control register + */ +__ASM uint32_t __get_CONTROL(void) +{ + mrs r0, control + bx lr +} + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +__ASM void __set_CONTROL(uint32_t control) +{ + msr control, r0 + bx lr +} + +#endif /* __ARMCC_VERSION */ + + + +#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ +#pragma diag_suppress=Pe940 + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +uint32_t __get_PSP(void) +{ + __ASM("mrs r0, psp"); + __ASM("bx lr"); +} + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +void __set_PSP(uint32_t topOfProcStack) +{ + __ASM("msr psp, r0"); + __ASM("bx lr"); +} + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +uint32_t __get_MSP(void) +{ + __ASM("mrs r0, msp"); + __ASM("bx lr"); +} + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +void __set_MSP(uint32_t topOfMainStack) +{ + __ASM("msr msp, r0"); + __ASM("bx lr"); +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +uint32_t __REV16(uint16_t value) +{ + __ASM("rev16 r0, r0"); + __ASM("bx lr"); +} + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +uint32_t __RBIT(uint32_t value) +{ + __ASM("rbit r0, r0"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit values) + */ +uint8_t __LDREXB(uint8_t *addr) +{ + __ASM("ldrexb r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +uint16_t __LDREXH(uint16_t *addr) +{ + __ASM("ldrexh r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +uint32_t __LDREXW(uint32_t *addr) +{ + __ASM("ldrex r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +uint32_t __STREXB(uint8_t value, uint8_t *addr) +{ + __ASM("strexb r0, r0, [r1]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +uint32_t __STREXH(uint16_t value, uint16_t *addr) +{ + __ASM("strexh r0, r0, [r1]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +uint32_t __STREXW(uint32_t value, uint32_t *addr) +{ + __ASM("strex r0, r0, [r1]"); + __ASM("bx lr"); +} + +#pragma diag_default=Pe940 + + +#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +uint32_t __get_PSP(void) __attribute__( ( naked ) ); +uint32_t __get_PSP(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, psp\n\t" + "MOV r0, %0 \n\t" + "BX lr \n\t" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); +void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0\n\t" + "BX lr \n\t" : : "r" (topOfProcStack) ); +} + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +uint32_t __get_MSP(void) __attribute__( ( naked ) ); +uint32_t __get_MSP(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, msp\n\t" + "MOV r0, %0 \n\t" + "BX lr \n\t" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); +void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0\n\t" + "BX lr \n\t" : : "r" (topOfMainStack) ); +} + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +uint32_t __get_BASEPRI(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) ); +} + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +uint32_t __get_PRIMASK(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); +} + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +uint32_t __get_FAULTMASK(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); +} + +/** + * @brief Return the Control Register value +* +* @return Control value + * + * Return the content of the control register + */ +uint32_t __get_CONTROL(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) ); +} + + +/** + * @brief Reverse byte order in integer value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in integer value + */ +uint32_t __REV(uint32_t value) +{ + uint32_t result=0; + + __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +uint32_t __REV16(uint16_t value) +{ + uint32_t result=0; + + __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +int32_t __REVSH(int16_t value) +{ + uint32_t result=0; + + __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +uint32_t __RBIT(uint32_t value) +{ + uint32_t result=0; + + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit value + */ +uint8_t __LDREXB(uint8_t *addr) +{ + uint8_t result=0; + + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +uint16_t __LDREXH(uint16_t *addr) +{ + uint16_t result=0; + + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +uint32_t __LDREXW(uint32_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +uint32_t __STREXB(uint8_t value, uint8_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +uint32_t __STREXH(uint16_t value, uint16_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +uint32_t __STREXW(uint32_t value, uint32_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + + +#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ +/* TASKING carm specific functions */ + +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all instrinsics, + * Including the CMSIS ones. + */ + +#endif diff --git a/firmware/stm32-esp/libraries/cmsis/core_cm3.h b/firmware/stm32-esp/libraries/cmsis/core_cm3.h new file mode 100644 index 00000000..7ab7b4b4 --- /dev/null +++ b/firmware/stm32-esp/libraries/cmsis/core_cm3.h @@ -0,0 +1,1818 @@ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V1.30 + * @date 30. October 2009 + * + * @note + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * @par + * ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * @par + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + +#ifndef __CM3_CORE_H__ +#define __CM3_CORE_H__ + +/** @addtogroup CMSIS_CM3_core_LintCinfiguration CMSIS CM3 Core Lint Configuration + * + * List of Lint messages which will be suppressed and not shown: + * - Error 10: \n + * register uint32_t __regBasePri __asm("basepri"); \n + * Error 10: Expecting ';' + * . + * - Error 530: \n + * return(__regBasePri); \n + * Warning 530: Symbol '__regBasePri' (line 264) not initialized + * . + * - Error 550: \n + * __regBasePri = (basePri & 0x1ff); \n + * Warning 550: Symbol '__regBasePri' (line 271) not accessed + * . + * - Error 754: \n + * uint32_t RESERVED0[24]; \n + * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced + * . + * - Error 750: \n + * #define __CM3_CORE_H__ \n + * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced + * . + * - Error 528: \n + * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n + * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced + * . + * - Error 751: \n + * } InterruptType_Type; \n + * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced + * . + * Note: To re-enable a Message, insert a space before 'lint' * + * + */ + +/*lint -save */ +/*lint -e10 */ +/*lint -e530 */ +/*lint -e550 */ +/*lint -e754 */ +/*lint -e750 */ +/*lint -e528 */ +/*lint -e751 */ + + +/** @addtogroup CMSIS_CM3_core_definitions CM3 Core Definitions + This file defines all structures and symbols for CMSIS core: + - CMSIS version number + - Cortex-M core registers and bitfields + - Cortex-M core peripheral base address + @{ + */ + +#ifdef __cplusplus + extern "C" { +#endif + +#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x03) /*!< Cortex core */ + +#include /* Include standard types */ + +#if defined (__ICCARM__) + #include /* IAR Intrinsics */ +#endif + + +#ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ +#endif + + + + +/** + * IO definitions + * + * define access restrictions to peripheral registers + */ + +#ifdef __cplusplus + #define __I volatile /*!< defines 'read only' permissions */ +#else + #define __I volatile const /*!< defines 'read only' permissions */ +#endif +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + + + +/******************************************************************************* + * Register Abstraction + ******************************************************************************/ +/** @addtogroup CMSIS_CM3_core_register CMSIS CM3 Core Register + @{ +*/ + + +/** @addtogroup CMSIS_CM3_NVIC CMSIS CM3 NVIC + memory mapped structure for Nested Vectored Interrupt Controller (NVIC) + @{ + */ +typedef struct +{ + __IO uint32_t ISER[8]; /*!< Offset: 0x000 Interrupt Set Enable Register */ + uint32_t RESERVED0[24]; + __IO uint32_t ICER[8]; /*!< Offset: 0x080 Interrupt Clear Enable Register */ + uint32_t RSERVED1[24]; + __IO uint32_t ISPR[8]; /*!< Offset: 0x100 Interrupt Set Pending Register */ + uint32_t RESERVED2[24]; + __IO uint32_t ICPR[8]; /*!< Offset: 0x180 Interrupt Clear Pending Register */ + uint32_t RESERVED3[24]; + __IO uint32_t IABR[8]; /*!< Offset: 0x200 Interrupt Active bit Register */ + uint32_t RESERVED4[56]; + __IO uint8_t IP[240]; /*!< Offset: 0x300 Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644]; + __O uint32_t STIR; /*!< Offset: 0xE00 Software Trigger Interrupt Register */ +} NVIC_Type; +/*@}*/ /* end of group CMSIS_CM3_NVIC */ + + +/** @addtogroup CMSIS_CM3_SCB CMSIS CM3 SCB + memory mapped structure for System Control Block (SCB) + @{ + */ +typedef struct +{ + __I uint32_t CPUID; /*!< Offset: 0x00 CPU ID Base Register */ + __IO uint32_t ICSR; /*!< Offset: 0x04 Interrupt Control State Register */ + __IO uint32_t VTOR; /*!< Offset: 0x08 Vector Table Offset Register */ + __IO uint32_t AIRCR; /*!< Offset: 0x0C Application Interrupt / Reset Control Register */ + __IO uint32_t SCR; /*!< Offset: 0x10 System Control Register */ + __IO uint32_t CCR; /*!< Offset: 0x14 Configuration Control Register */ + __IO uint8_t SHP[12]; /*!< Offset: 0x18 System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IO uint32_t SHCSR; /*!< Offset: 0x24 System Handler Control and State Register */ + __IO uint32_t CFSR; /*!< Offset: 0x28 Configurable Fault Status Register */ + __IO uint32_t HFSR; /*!< Offset: 0x2C Hard Fault Status Register */ + __IO uint32_t DFSR; /*!< Offset: 0x30 Debug Fault Status Register */ + __IO uint32_t MMFAR; /*!< Offset: 0x34 Mem Manage Address Register */ + __IO uint32_t BFAR; /*!< Offset: 0x38 Bus Fault Address Register */ + __IO uint32_t AFSR; /*!< Offset: 0x3C Auxiliary Fault Status Register */ + __I uint32_t PFR[2]; /*!< Offset: 0x40 Processor Feature Register */ + __I uint32_t DFR; /*!< Offset: 0x48 Debug Feature Register */ + __I uint32_t ADR; /*!< Offset: 0x4C Auxiliary Feature Register */ + __I uint32_t MMFR[4]; /*!< Offset: 0x50 Memory Model Feature Register */ + __I uint32_t ISAR[5]; /*!< Offset: 0x60 ISA Feature Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Registers Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* SCB Hard Fault Status Registers Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */ +/*@}*/ /* end of group CMSIS_CM3_SCB */ + + +/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick + memory mapped structure for SysTick + @{ + */ +typedef struct +{ + __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */ + __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */ + __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */ + __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */ +/*@}*/ /* end of group CMSIS_CM3_SysTick */ + + +/** @addtogroup CMSIS_CM3_ITM CMSIS CM3 ITM + memory mapped structure for Instrumentation Trace Macrocell (ITM) + @{ + */ +typedef struct +{ + __O union + { + __O uint8_t u8; /*!< Offset: ITM Stimulus Port 8-bit */ + __O uint16_t u16; /*!< Offset: ITM Stimulus Port 16-bit */ + __O uint32_t u32; /*!< Offset: ITM Stimulus Port 32-bit */ + } PORT [32]; /*!< Offset: 0x00 ITM Stimulus Port Registers */ + uint32_t RESERVED0[864]; + __IO uint32_t TER; /*!< Offset: ITM Trace Enable Register */ + uint32_t RESERVED1[15]; + __IO uint32_t TPR; /*!< Offset: ITM Trace Privilege Register */ + uint32_t RESERVED2[15]; + __IO uint32_t TCR; /*!< Offset: ITM Trace Control Register */ + uint32_t RESERVED3[29]; + __IO uint32_t IWR; /*!< Offset: ITM Integration Write Register */ + __IO uint32_t IRR; /*!< Offset: ITM Integration Read Register */ + __IO uint32_t IMCR; /*!< Offset: ITM Integration Mode Control Register */ + uint32_t RESERVED4[43]; + __IO uint32_t LAR; /*!< Offset: ITM Lock Access Register */ + __IO uint32_t LSR; /*!< Offset: ITM Lock Status Register */ + uint32_t RESERVED5[6]; + __I uint32_t PID4; /*!< Offset: ITM Peripheral Identification Register #4 */ + __I uint32_t PID5; /*!< Offset: ITM Peripheral Identification Register #5 */ + __I uint32_t PID6; /*!< Offset: ITM Peripheral Identification Register #6 */ + __I uint32_t PID7; /*!< Offset: ITM Peripheral Identification Register #7 */ + __I uint32_t PID0; /*!< Offset: ITM Peripheral Identification Register #0 */ + __I uint32_t PID1; /*!< Offset: ITM Peripheral Identification Register #1 */ + __I uint32_t PID2; /*!< Offset: ITM Peripheral Identification Register #2 */ + __I uint32_t PID3; /*!< Offset: ITM Peripheral Identification Register #3 */ + __I uint32_t CID0; /*!< Offset: ITM Component Identification Register #0 */ + __I uint32_t CID1; /*!< Offset: ITM Component Identification Register #1 */ + __I uint32_t CID2; /*!< Offset: ITM Component Identification Register #2 */ + __I uint32_t CID3; /*!< Offset: ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_ATBID_Pos 16 /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */ +/*@}*/ /* end of group CMSIS_CM3_ITM */ + + +/** @addtogroup CMSIS_CM3_InterruptType CMSIS CM3 Interrupt Type + memory mapped structure for Interrupt Type + @{ + */ +typedef struct +{ + uint32_t RESERVED0; + __I uint32_t ICTR; /*!< Offset: 0x04 Interrupt Control Type Register */ +#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) + __IO uint32_t ACTLR; /*!< Offset: 0x08 Auxiliary Control Register */ +#else + uint32_t RESERVED1; +#endif +} InterruptType_Type; + +/* Interrupt Controller Type Register Definitions */ +#define InterruptType_ICTR_INTLINESNUM_Pos 0 /*!< InterruptType ICTR: INTLINESNUM Position */ +#define InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos) /*!< InterruptType ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define InterruptType_ACTLR_DISFOLD_Pos 2 /*!< InterruptType ACTLR: DISFOLD Position */ +#define InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos) /*!< InterruptType ACTLR: DISFOLD Mask */ + +#define InterruptType_ACTLR_DISDEFWBUF_Pos 1 /*!< InterruptType ACTLR: DISDEFWBUF Position */ +#define InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos) /*!< InterruptType ACTLR: DISDEFWBUF Mask */ + +#define InterruptType_ACTLR_DISMCYCINT_Pos 0 /*!< InterruptType ACTLR: DISMCYCINT Position */ +#define InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos) /*!< InterruptType ACTLR: DISMCYCINT Mask */ +/*@}*/ /* end of group CMSIS_CM3_InterruptType */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) +/** @addtogroup CMSIS_CM3_MPU CMSIS CM3 MPU + memory mapped structure for Memory Protection Unit (MPU) + @{ + */ +typedef struct +{ + __I uint32_t TYPE; /*!< Offset: 0x00 MPU Type Register */ + __IO uint32_t CTRL; /*!< Offset: 0x04 MPU Control Register */ + __IO uint32_t RNR; /*!< Offset: 0x08 MPU Region RNRber Register */ + __IO uint32_t RBAR; /*!< Offset: 0x0C MPU Region Base Address Register */ + __IO uint32_t RASR; /*!< Offset: 0x10 MPU Region Attribute and Size Register */ + __IO uint32_t RBAR_A1; /*!< Offset: 0x14 MPU Alias 1 Region Base Address Register */ + __IO uint32_t RASR_A1; /*!< Offset: 0x18 MPU Alias 1 Region Attribute and Size Register */ + __IO uint32_t RBAR_A2; /*!< Offset: 0x1C MPU Alias 2 Region Base Address Register */ + __IO uint32_t RASR_A2; /*!< Offset: 0x20 MPU Alias 2 Region Attribute and Size Register */ + __IO uint32_t RBAR_A3; /*!< Offset: 0x24 MPU Alias 3 Region Base Address Register */ + __IO uint32_t RASR_A3; /*!< Offset: 0x28 MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register */ +#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFul << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFul << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1ul << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register */ +#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1ul << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1ul << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1ul << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register */ +#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFul << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register */ +#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFul << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1ul << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFul << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register */ +#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: XN Position */ +#define MPU_RASR_XN_Msk (1ul << MPU_RASR_XN_Pos) /*!< MPU RASR: XN Mask */ + +#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: AP Position */ +#define MPU_RASR_AP_Msk (7ul << MPU_RASR_AP_Pos) /*!< MPU RASR: AP Mask */ + +#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: TEX Position */ +#define MPU_RASR_TEX_Msk (7ul << MPU_RASR_TEX_Pos) /*!< MPU RASR: TEX Mask */ + +#define MPU_RASR_S_Pos 18 /*!< MPU RASR: Shareable bit Position */ +#define MPU_RASR_S_Msk (1ul << MPU_RASR_S_Pos) /*!< MPU RASR: Shareable bit Mask */ + +#define MPU_RASR_C_Pos 17 /*!< MPU RASR: Cacheable bit Position */ +#define MPU_RASR_C_Msk (1ul << MPU_RASR_C_Pos) /*!< MPU RASR: Cacheable bit Mask */ + +#define MPU_RASR_B_Pos 16 /*!< MPU RASR: Bufferable bit Position */ +#define MPU_RASR_B_Msk (1ul << MPU_RASR_B_Pos) /*!< MPU RASR: Bufferable bit Mask */ + +#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFul << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1Ful << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENA_Pos 0 /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENA_Msk (0x1Ful << MPU_RASR_ENA_Pos) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@}*/ /* end of group CMSIS_CM3_MPU */ +#endif + + +/** @addtogroup CMSIS_CM3_CoreDebug CMSIS CM3 Core Debug + memory mapped structure for Core Debug Register + @{ + */ +typedef struct +{ + __IO uint32_t DHCSR; /*!< Offset: 0x00 Debug Halting Control and Status Register */ + __O uint32_t DCRSR; /*!< Offset: 0x04 Debug Core Register Selector Register */ + __IO uint32_t DCRDR; /*!< Offset: 0x08 Debug Core Register Data Register */ + __IO uint32_t DEMCR; /*!< Offset: 0x0C Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register */ +#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register */ +#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ +/*@}*/ /* end of group CMSIS_CM3_CoreDebug */ + + +/* Memory mapping of Cortex-M3 Hardware */ +#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ +#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ + +#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ +#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) + #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ +#endif + +/*@}*/ /* end of group CMSIS_CM3_core_register */ + + +/******************************************************************************* + * Hardware Abstraction Layer + ******************************************************************************/ + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + +/* ################### Compiler specific Intrinsics ########################### */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#define __enable_fault_irq __enable_fiq +#define __disable_fault_irq __disable_fiq + +#define __NOP __nop +#define __WFI __wfi +#define __WFE __wfe +#define __SEV __sev +#define __ISB() __isb(0) +#define __DSB() __dsb(0) +#define __DMB() __dmb(0) +#define __REV __rev +#define __RBIT __rbit +#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) +#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) +#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) +#define __STREXB(value, ptr) __strex(value, ptr) +#define __STREXH(value, ptr) __strex(value, ptr) +#define __STREXW(value, ptr) __strex(value, ptr) + + +/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ +/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ +/* intrinsic void __enable_irq(); */ +/* intrinsic void __disable_irq(); */ + + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +extern int32_t __REVSH(int16_t value); + + +#if (__ARMCC_VERSION < 400000) + +/** + * @brief Remove the exclusive lock created by ldrex + * + * Removes the exclusive lock which is created by ldrex. + */ +extern void __CLREX(void); + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +extern uint32_t __get_BASEPRI(void); + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +extern void __set_BASEPRI(uint32_t basePri); + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +extern uint32_t __get_PRIMASK(void); + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +extern void __set_PRIMASK(uint32_t priMask); + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +extern uint32_t __get_FAULTMASK(void); + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +extern void __set_FAULTMASK(uint32_t faultMask); + +/** + * @brief Return the Control Register value + * + * @return Control value + * + * Return the content of the control register + */ +extern uint32_t __get_CONTROL(void); + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +extern void __set_CONTROL(uint32_t control); + +#else /* (__ARMCC_VERSION >= 400000) */ + +/** + * @brief Remove the exclusive lock created by ldrex + * + * Removes the exclusive lock which is created by ldrex. + */ +#define __CLREX __clrex + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +static __INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +static __INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0xff); +} + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +static __INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +static __INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +static __INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +static __INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & 1); +} + +/** + * @brief Return the Control Register value + * + * @return Control value + * + * Return the content of the control register + */ +static __INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +static __INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + +#endif /* __ARMCC_VERSION */ + + + +#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ + +#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ +#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ + +static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } +static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } + +#define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ +static __INLINE void __WFI() { __ASM ("wfi"); } +static __INLINE void __WFE() { __ASM ("wfe"); } +static __INLINE void __SEV() { __ASM ("sev"); } +static __INLINE void __CLREX() { __ASM ("clrex"); } + +/* intrinsic void __ISB(void) */ +/* intrinsic void __DSB(void) */ +/* intrinsic void __DMB(void) */ +/* intrinsic void __set_PRIMASK(); */ +/* intrinsic void __get_PRIMASK(); */ +/* intrinsic void __set_FAULTMASK(); */ +/* intrinsic void __get_FAULTMASK(); */ +/* intrinsic uint32_t __REV(uint32_t value); */ +/* intrinsic uint32_t __REVSH(uint32_t value); */ +/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ +/* intrinsic unsigned long __LDREX(unsigned long *); */ + + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +extern uint32_t __RBIT(uint32_t value); + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit values) + */ +extern uint8_t __LDREXB(uint8_t *addr); + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +extern uint16_t __LDREXH(uint16_t *addr); + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +extern uint32_t __LDREXW(uint32_t *addr); + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +extern uint32_t __STREXB(uint8_t value, uint8_t *addr); + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +extern uint32_t __STREXH(uint16_t value, uint16_t *addr); + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +extern uint32_t __STREXW(uint32_t value, uint32_t *addr); + + + +#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } +static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } + +static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } +static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } + +static __INLINE void __NOP() { __ASM volatile ("nop"); } +static __INLINE void __WFI() { __ASM volatile ("wfi"); } +static __INLINE void __WFE() { __ASM volatile ("wfe"); } +static __INLINE void __SEV() { __ASM volatile ("sev"); } +static __INLINE void __ISB() { __ASM volatile ("isb"); } +static __INLINE void __DSB() { __ASM volatile ("dsb"); } +static __INLINE void __DMB() { __ASM volatile ("dmb"); } +static __INLINE void __CLREX() { __ASM volatile ("clrex"); } + + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +extern uint32_t __get_BASEPRI(void); + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +extern void __set_BASEPRI(uint32_t basePri); + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +extern uint32_t __get_PRIMASK(void); + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +extern void __set_PRIMASK(uint32_t priMask); + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +extern uint32_t __get_FAULTMASK(void); + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +extern void __set_FAULTMASK(uint32_t faultMask); + +/** + * @brief Return the Control Register value +* +* @return Control value + * + * Return the content of the control register + */ +extern uint32_t __get_CONTROL(void); + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +extern void __set_CONTROL(uint32_t control); + +/** + * @brief Reverse byte order in integer value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in integer value + */ +extern uint32_t __REV(uint32_t value); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +extern int32_t __REVSH(int16_t value); + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +extern uint32_t __RBIT(uint32_t value); + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit value + */ +extern uint8_t __LDREXB(uint8_t *addr); + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +extern uint16_t __LDREXH(uint16_t *addr); + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +extern uint32_t __LDREXW(uint32_t *addr); + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +extern uint32_t __STREXB(uint8_t value, uint8_t *addr); + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +extern uint32_t __STREXH(uint16_t value, uint16_t *addr); + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +extern uint32_t __STREXW(uint32_t value, uint32_t *addr); + + +#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ +/* TASKING carm specific functions */ + +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all instrinsics, + * Including the CMSIS ones. + */ + +#endif + + +/** @addtogroup CMSIS_CM3_Core_FunctionInterface CMSIS CM3 Core Function Interface + Core Function Interface containing: + - Core NVIC Functions + - Core SysTick Functions + - Core Reset Functions +*/ +/*@{*/ + +/* ########################## NVIC functions #################################### */ + +/** + * @brief Set the Priority Grouping in NVIC Interrupt Controller + * + * @param PriorityGroup is priority grouping field + * + * Set the priority grouping field using the required unlock sequence. + * The parameter priority_grouping is assigned to the field + * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + */ +static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ + reg_value = (reg_value | + (0x5FA << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + +/** + * @brief Get the Priority Grouping from NVIC Interrupt Controller + * + * @return priority grouping field + * + * Get the priority grouping from NVIC Interrupt Controller. + * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. + */ +static __INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */ +} + +/** + * @brief Enable Interrupt in NVIC Interrupt Controller + * + * @param IRQn The positive number of the external interrupt to enable + * + * Enable a device specific interupt in the NVIC interrupt controller. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ +} + +/** + * @brief Disable the interrupt line for external interrupt specified + * + * @param IRQn The positive number of the external interrupt to disable + * + * Disable a device specific interupt in the NVIC interrupt controller. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ +} + +/** + * @brief Read the interrupt pending bit for a device specific interrupt source + * + * @param IRQn The number of the device specifc interrupt + * @return 1 = interrupt pending, 0 = interrupt not pending + * + * Read the pending register in NVIC and return 1 if its status is pending, + * otherwise it returns 0 + */ +static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ +} + +/** + * @brief Set the pending bit for an external interrupt + * + * @param IRQn The number of the interrupt for set pending + * + * Set the pending bit for the specified interrupt. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ +} + +/** + * @brief Clear the pending bit for an external interrupt + * + * @param IRQn The number of the interrupt for clear pending + * + * Clear the pending bit for the specified interrupt. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ +} + +/** + * @brief Read the active bit for an external interrupt + * + * @param IRQn The number of the interrupt for read active bit + * @return 1 = interrupt active, 0 = interrupt not active + * + * Read the active register in NVIC and returns 1 if its status is active, + * otherwise it returns 0. + */ +static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ +} + +/** + * @brief Set the priority for an interrupt + * + * @param IRQn The number of the interrupt for set priority + * @param priority The priority to set + * + * Set the priority for the specified interrupt. The interrupt + * number can be positive to specify an external (device specific) + * interrupt, or negative to specify an internal (core) interrupt. + * + * Note: The priority cannot be set for every core interrupt. + */ +static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if(IRQn < 0) { + SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ + else { + NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ +} + +/** + * @brief Read the priority for an interrupt + * + * @param IRQn The number of the interrupt for get priority + * @return The priority for the interrupt + * + * Read the priority for the specified interrupt. The interrupt + * number can be positive to specify an external (device specific) + * interrupt, or negative to specify an internal (core) interrupt. + * + * The returned priority value is automatically aligned to the implemented + * priority bits of the microcontroller. + * + * Note: The priority cannot be set for every core interrupt. + */ +static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if(IRQn < 0) { + return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ + else { + return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ +} + + +/** + * @brief Encode the priority for an interrupt + * + * @param PriorityGroup The used priority group + * @param PreemptPriority The preemptive priority value (starting from 0) + * @param SubPriority The sub priority value (starting from 0) + * @return The encoded priority for the interrupt + * + * Encode the priority for an interrupt with the given priority group, + * preemptive priority value and sub priority value. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. + * + * The returned priority value can be used for NVIC_SetPriority(...) function + */ +static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; + SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; + + return ( + ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | + ((SubPriority & ((1 << (SubPriorityBits )) - 1))) + ); +} + + +/** + * @brief Decode the priority of an interrupt + * + * @param Priority The priority for the interrupt + * @param PriorityGroup The used priority group + * @param pPreemptPriority The preemptive priority value (starting from 0) + * @param pSubPriority The sub priority value (starting from 0) + * + * Decode an interrupt priority value with the given priority group to + * preemptive priority value and sub priority value. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. + * + * The priority value can be retrieved with NVIC_GetPriority(...) function + */ +static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; + SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; + + *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); + *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); +} + + + +/* ################################## SysTick function ############################################ */ + +#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) + +/** + * @brief Initialize and start the SysTick counter and its interrupt. + * + * @param ticks number of ticks between two interrupts + * @return 1 = failed, 0 = successful + * + * Initialise the system tick timer and its interrupt and start the + * system tick timer / counter in free running mode to generate + * periodical interrupts. + */ +static __INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */ + + SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ + SysTick->VAL = 0; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0); /* Function successful */ +} + +#endif + + + + +/* ################################## Reset function ############################################ */ + +/** + * @brief Initiate a system reset request. + * + * Initiate a system reset request to reset the MCU + */ +static __INLINE void NVIC_SystemReset(void) +{ + SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + while(1); /* wait until reset */ +} + +/*@}*/ /* end of group CMSIS_CM3_Core_FunctionInterface */ + + + +/* ##################################### Debug In/Output function ########################################### */ + +/** @addtogroup CMSIS_CM3_CoreDebugInterface CMSIS CM3 Core Debug Interface + Core Debug Interface containing: + - Core Debug Receive / Transmit Functions + - Core Debug Defines + - Core Debug Variables +*/ +/*@{*/ + +extern volatile int ITM_RxBuffer; /*!< variable to receive characters */ +#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */ + + +/** + * @brief Outputs a character via the ITM channel 0 + * + * @param ch character to output + * @return character to output + * + * The function outputs a character via the ITM channel 0. + * The function returns when no debugger is connected that has booked the output. + * It is blocking when a debugger is connected, but the previous character send is not transmitted. + */ +static __INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */ + (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ + (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0].u32 == 0); + ITM->PORT[0].u8 = (uint8_t) ch; + } + return (ch); +} + + +/** + * @brief Inputs a character via variable ITM_RxBuffer + * + * @return received character, -1 = no character received + * + * The function inputs a character via variable ITM_RxBuffer. + * The function returns when no debugger is connected that has booked the output. + * It is blocking when a debugger is connected, but the previous character send is not transmitted. + */ +static __INLINE int ITM_ReceiveChar (void) { + int ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + * @brief Check if a character via variable ITM_RxBuffer is available + * + * @return 1 = character available, 0 = no character available + * + * The function checks variable ITM_RxBuffer whether a character is available or not. + * The function returns '1' if a character is available and '0' if no character is available. + */ +static __INLINE int ITM_CheckChar (void) { + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { + return (0); /* no character available */ + } else { + return (1); /* character available */ + } +} + +/*@}*/ /* end of group CMSIS_CM3_core_DebugInterface */ + + +#ifdef __cplusplus +} +#endif + +/*@}*/ /* end of group CMSIS_CM3_core_definitions */ + +#endif /* __CM3_CORE_H__ */ + +/*lint -restore */ diff --git a/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s b/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s new file mode 100644 index 00000000..8a19827c --- /dev/null +++ b/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s @@ -0,0 +1,358 @@ +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f10x_hd.s +;* Author : MCD Application Team +;* Version : V3.5.0 +;* Date : 11-March-2011 +;* Description : STM32F10x High Density Devices vector table for MDK-ARM +;* toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Configure the clock system and also configure the external +;* SRAM mounted on STM3210E-EVAL board to be used as data +;* memory (optional, to be enabled by user) +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD TAMPER_IRQHandler ; Tamper + DCD RTC_IRQHandler ; RTC + DCD FLASH_IRQHandler ; Flash + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line 0 + DCD EXTI1_IRQHandler ; EXTI Line 1 + DCD EXTI2_IRQHandler ; EXTI Line 2 + DCD EXTI3_IRQHandler ; EXTI Line 3 + DCD EXTI4_IRQHandler ; EXTI Line 4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1 & ADC2 + DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX + DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 + DCD TIM1_BRK_IRQHandler ; TIM1 Break + DCD TIM1_UP_IRQHandler ; TIM1 Update + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 + DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line + DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend + DCD TIM8_BRK_IRQHandler ; TIM8 Break + DCD TIM8_UP_IRQHandler ; TIM8 Update + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare + DCD ADC3_IRQHandler ; ADC3 + DCD FSMC_IRQHandler ; FSMC + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_IRQHandler ; TIM6 + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 + DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] + EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT USBWakeUp_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FSMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_5_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +USB_HP_CAN1_TX_IRQHandler +USB_LP_CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTCAlarm_IRQHandler +USBWakeUp_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FSMC_IRQHandler +SDIO_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_5_IRQHandler + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/firmware/stm32-esp/libraries/cmsis/stm32f10x.h b/firmware/stm32-esp/libraries/cmsis/stm32f10x.h new file mode 100644 index 00000000..8bf76245 --- /dev/null +++ b/firmware/stm32-esp/libraries/cmsis/stm32f10x.h @@ -0,0 +1,8336 @@ +/** + ****************************************************************************** + * @file stm32f10x.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File. + * This file contains all the peripheral register's definitions, bits + * definitions and memory mapping for STM32F10x Connectivity line, + * High density, High density value line, Medium density, + * Medium density Value line, Low density, Low density Value line + * and XL-density devices. + * + * The file is the unique include file that the application programmer + * is using in the C source code, usually in main.c. This file contains: + * - Configuration section that allows to select: + * - The device used in the target application + * - To use or not the peripherals drivers in application code(i.e. + * code will be based on direct access to peripherals registers + * rather than drivers API), this option is controlled by + * "#define USE_STDPERIPH_DRIVER" + * - To change few application-specific parameters such as the HSE + * crystal frequency + * - Data structures and the address mapping for all peripherals + * - Peripheral's registers declarations and bits definition + * - Macros to access peripherals registers hardware + * + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x + * @{ + */ + +#ifndef __STM32F10x_H +#define __STM32F10x_H + +#ifdef __cplusplus + extern "C" { +#endif + +/** @addtogroup Library_configuration_section + * @{ + */ + +/* Uncomment the line below according to the target STM32 device used in your + application + */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) + /* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */ + /* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */ + /* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */ + /* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */ + /* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */ + /* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */ + /* #define STM32F10X_XL */ /*!< STM32F10X_XL: STM32 XL-density devices */ + /* #define STM32F10X_CL */ /*!< STM32F10X_CL: STM32 Connectivity line devices */ +#endif +/* Tip: To avoid modifying this file each time you need to switch between these + devices, you can define the device in your toolchain compiler preprocessor. + + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers + where the Flash memory density ranges between 16 and 32 Kbytes. + - Low-density value line devices are STM32F100xx microcontrollers where the Flash + memory density ranges between 16 and 32 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers + where the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 64 and 128 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) + #error "Please select first the target STM32F10x device used in your application (in stm32f10x.h file)" +#endif + +#if !defined USE_STDPERIPH_DRIVER +/** + * @brief Comment the line below if you will not use the peripherals drivers. + In this case, these drivers will not be included and the application code will + be based on direct access to peripherals registers + */ + /*#define USE_STDPERIPH_DRIVER*/ +#endif + +/** + * @brief In the following line adjust the value of External High Speed oscillator (HSE) + used in your application + + Tip: To avoid modifying this file each time you need to use different HSE, you + can define the HSE value in your toolchain compiler preprocessor. + */ +#if !defined HSE_VALUE + #ifdef STM32F10X_CL + #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ + #else + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ + #endif /* STM32F10X_CL */ +#endif /* HSE_VALUE */ + + +/** + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + Timeout value + */ +#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */ + +#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ + +/** + * @brief STM32F10x Standard Peripheral Library version number + */ +#define __STM32F10X_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:24] main version */ +#define __STM32F10X_STDPERIPH_VERSION_SUB1 (0x05) /*!< [23:16] sub1 version */ +#define __STM32F10X_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ +#define __STM32F10X_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */ +#define __STM32F10X_STDPERIPH_VERSION ( (__STM32F10X_STDPERIPH_VERSION_MAIN << 24)\ + |(__STM32F10X_STDPERIPH_VERSION_SUB1 << 16)\ + |(__STM32F10X_STDPERIPH_VERSION_SUB2 << 8)\ + |(__STM32F10X_STDPERIPH_VERSION_RC)) + +/** + * @} + */ + +/** @addtogroup Configuration_section_for_CMSIS + * @{ + */ + +/** + * @brief Configuration of the Cortex-M3 Processor and Core Peripherals + */ +#ifdef STM32F10X_XL + #define __MPU_PRESENT 1 /*!< STM32 XL-density devices provide an MPU */ +#else + #define __MPU_PRESENT 0 /*!< Other STM32 devices does not provide an MPU */ +#endif /* STM32F10X_XL */ +#define __NVIC_PRIO_BITS 4 /*!< STM32 uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ + +/** + * @brief STM32F10x Interrupt Number Definition, according to the selected device + * in @ref Library_configuration_section + */ +typedef enum IRQn +{ +/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ + +/****** STM32 specific Interrupt Numbers *********************************************************/ + WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ + PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */ + TAMPER_IRQn = 2, /*!< Tamper Interrupt */ + RTC_IRQn = 3, /*!< RTC global Interrupt */ + FLASH_IRQn = 4, /*!< FLASH global Interrupt */ + RCC_IRQn = 5, /*!< RCC global Interrupt */ + EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ + EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ + EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ + EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ + EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ + DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ + DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ + DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ + DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ + DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ + DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ + DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ + +#ifdef STM32F10X_LD + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ +#endif /* STM32F10X_LD */ + +#ifdef STM32F10X_LD_VL + ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ + TIM7_IRQn = 55 /*!< TIM7 Interrupt */ +#endif /* STM32F10X_LD_VL */ + +#ifdef STM32F10X_MD + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ +#endif /* STM32F10X_MD */ + +#ifdef STM32F10X_MD_VL + ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ + TIM7_IRQn = 55 /*!< TIM7 Interrupt */ +#endif /* STM32F10X_MD_VL */ + +#ifdef STM32F10X_HD + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ + TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ + TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ + TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ + TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ + ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ + FSMC_IRQn = 48, /*!< FSMC global Interrupt */ + SDIO_IRQn = 49, /*!< SDIO global Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ +#endif /* STM32F10X_HD */ + +#ifdef STM32F10X_HD_VL + ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ + TIM12_IRQn = 43, /*!< TIM12 global Interrupt */ + TIM13_IRQn = 44, /*!< TIM13 global Interrupt */ + TIM14_IRQn = 45, /*!< TIM14 global Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_5_IRQn = 59, /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ + DMA2_Channel5_IRQn = 60 /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is + mapped at position 60 only if the MISC_REMAP bit in + the AFIO_MAPR2 register is set) */ +#endif /* STM32F10X_HD_VL */ + +#ifdef STM32F10X_XL + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM9_IRQn = 24, /*!< TIM1 Break Interrupt and TIM9 global Interrupt */ + TIM1_UP_TIM10_IRQn = 25, /*!< TIM1 Update Interrupt and TIM10 global Interrupt */ + TIM1_TRG_COM_TIM11_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ + TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global Interrupt */ + TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global Interrupt */ + TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */ + TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ + ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ + FSMC_IRQn = 48, /*!< FSMC global Interrupt */ + SDIO_IRQn = 49, /*!< SDIO global Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ +#endif /* STM32F10X_XL */ + +#ifdef STM32F10X_CL + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ + DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ + ETH_IRQn = 61, /*!< Ethernet global Interrupt */ + ETH_WKUP_IRQn = 62, /*!< Ethernet Wakeup through EXTI line Interrupt */ + CAN2_TX_IRQn = 63, /*!< CAN2 TX Interrupt */ + CAN2_RX0_IRQn = 64, /*!< CAN2 RX0 Interrupt */ + CAN2_RX1_IRQn = 65, /*!< CAN2 RX1 Interrupt */ + CAN2_SCE_IRQn = 66, /*!< CAN2 SCE Interrupt */ + OTG_FS_IRQn = 67 /*!< USB OTG FS global Interrupt */ +#endif /* STM32F10X_CL */ +} IRQn_Type; + +/** + * @} + */ + +#include "core_cm3.h" +#include "system_stm32f10x.h" +#include + +/** @addtogroup Exported_types + * @{ + */ + +/*!< STM32F10x Standard Peripheral Library old types (maintained for legacy purpose) */ +typedef int32_t s32; +typedef int16_t s16; +typedef int8_t s8; + +typedef const int32_t sc32; /*!< Read Only */ +typedef const int16_t sc16; /*!< Read Only */ +typedef const int8_t sc8; /*!< Read Only */ + +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef __I int32_t vsc32; /*!< Read Only */ +typedef __I int16_t vsc16; /*!< Read Only */ +typedef __I int8_t vsc8; /*!< Read Only */ + +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +typedef const uint32_t uc32; /*!< Read Only */ +typedef const uint16_t uc16; /*!< Read Only */ +typedef const uint8_t uc8; /*!< Read Only */ + +typedef __IO uint32_t vu32; +typedef __IO uint16_t vu16; +typedef __IO uint8_t vu8; + +typedef __I uint32_t vuc32; /*!< Read Only */ +typedef __I uint16_t vuc16; /*!< Read Only */ +typedef __I uint8_t vuc8; /*!< Read Only */ + +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; + +typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; +#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) + +typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; + +/*!< STM32F10x Standard Peripheral Library old definitions (maintained for legacy purpose) */ +#define HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT +#define HSE_Value HSE_VALUE +#define HSI_Value HSI_VALUE +/** + * @} + */ + +/** @addtogroup Peripheral_registers_structures + * @{ + */ + +/** + * @brief Analog to Digital Converter + */ + +typedef struct +{ + __IO uint32_t SR; + __IO uint32_t CR1; + __IO uint32_t CR2; + __IO uint32_t SMPR1; + __IO uint32_t SMPR2; + __IO uint32_t JOFR1; + __IO uint32_t JOFR2; + __IO uint32_t JOFR3; + __IO uint32_t JOFR4; + __IO uint32_t HTR; + __IO uint32_t LTR; + __IO uint32_t SQR1; + __IO uint32_t SQR2; + __IO uint32_t SQR3; + __IO uint32_t JSQR; + __IO uint32_t JDR1; + __IO uint32_t JDR2; + __IO uint32_t JDR3; + __IO uint32_t JDR4; + __IO uint32_t DR; +} ADC_TypeDef; + +/** + * @brief Backup Registers + */ + +typedef struct +{ + uint32_t RESERVED0; + __IO uint16_t DR1; + uint16_t RESERVED1; + __IO uint16_t DR2; + uint16_t RESERVED2; + __IO uint16_t DR3; + uint16_t RESERVED3; + __IO uint16_t DR4; + uint16_t RESERVED4; + __IO uint16_t DR5; + uint16_t RESERVED5; + __IO uint16_t DR6; + uint16_t RESERVED6; + __IO uint16_t DR7; + uint16_t RESERVED7; + __IO uint16_t DR8; + uint16_t RESERVED8; + __IO uint16_t DR9; + uint16_t RESERVED9; + __IO uint16_t DR10; + uint16_t RESERVED10; + __IO uint16_t RTCCR; + uint16_t RESERVED11; + __IO uint16_t CR; + uint16_t RESERVED12; + __IO uint16_t CSR; + uint16_t RESERVED13[5]; + __IO uint16_t DR11; + uint16_t RESERVED14; + __IO uint16_t DR12; + uint16_t RESERVED15; + __IO uint16_t DR13; + uint16_t RESERVED16; + __IO uint16_t DR14; + uint16_t RESERVED17; + __IO uint16_t DR15; + uint16_t RESERVED18; + __IO uint16_t DR16; + uint16_t RESERVED19; + __IO uint16_t DR17; + uint16_t RESERVED20; + __IO uint16_t DR18; + uint16_t RESERVED21; + __IO uint16_t DR19; + uint16_t RESERVED22; + __IO uint16_t DR20; + uint16_t RESERVED23; + __IO uint16_t DR21; + uint16_t RESERVED24; + __IO uint16_t DR22; + uint16_t RESERVED25; + __IO uint16_t DR23; + uint16_t RESERVED26; + __IO uint16_t DR24; + uint16_t RESERVED27; + __IO uint16_t DR25; + uint16_t RESERVED28; + __IO uint16_t DR26; + uint16_t RESERVED29; + __IO uint16_t DR27; + uint16_t RESERVED30; + __IO uint16_t DR28; + uint16_t RESERVED31; + __IO uint16_t DR29; + uint16_t RESERVED32; + __IO uint16_t DR30; + uint16_t RESERVED33; + __IO uint16_t DR31; + uint16_t RESERVED34; + __IO uint16_t DR32; + uint16_t RESERVED35; + __IO uint16_t DR33; + uint16_t RESERVED36; + __IO uint16_t DR34; + uint16_t RESERVED37; + __IO uint16_t DR35; + uint16_t RESERVED38; + __IO uint16_t DR36; + uint16_t RESERVED39; + __IO uint16_t DR37; + uint16_t RESERVED40; + __IO uint16_t DR38; + uint16_t RESERVED41; + __IO uint16_t DR39; + uint16_t RESERVED42; + __IO uint16_t DR40; + uint16_t RESERVED43; + __IO uint16_t DR41; + uint16_t RESERVED44; + __IO uint16_t DR42; + uint16_t RESERVED45; +} BKP_TypeDef; + +/** + * @brief Controller Area Network TxMailBox + */ + +typedef struct +{ + __IO uint32_t TIR; + __IO uint32_t TDTR; + __IO uint32_t TDLR; + __IO uint32_t TDHR; +} CAN_TxMailBox_TypeDef; + +/** + * @brief Controller Area Network FIFOMailBox + */ + +typedef struct +{ + __IO uint32_t RIR; + __IO uint32_t RDTR; + __IO uint32_t RDLR; + __IO uint32_t RDHR; +} CAN_FIFOMailBox_TypeDef; + +/** + * @brief Controller Area Network FilterRegister + */ + +typedef struct +{ + __IO uint32_t FR1; + __IO uint32_t FR2; +} CAN_FilterRegister_TypeDef; + +/** + * @brief Controller Area Network + */ + +typedef struct +{ + __IO uint32_t MCR; + __IO uint32_t MSR; + __IO uint32_t TSR; + __IO uint32_t RF0R; + __IO uint32_t RF1R; + __IO uint32_t IER; + __IO uint32_t ESR; + __IO uint32_t BTR; + uint32_t RESERVED0[88]; + CAN_TxMailBox_TypeDef sTxMailBox[3]; + CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; + uint32_t RESERVED1[12]; + __IO uint32_t FMR; + __IO uint32_t FM1R; + uint32_t RESERVED2; + __IO uint32_t FS1R; + uint32_t RESERVED3; + __IO uint32_t FFA1R; + uint32_t RESERVED4; + __IO uint32_t FA1R; + uint32_t RESERVED5[8]; +#ifndef STM32F10X_CL + CAN_FilterRegister_TypeDef sFilterRegister[14]; +#else + CAN_FilterRegister_TypeDef sFilterRegister[28]; +#endif /* STM32F10X_CL */ +} CAN_TypeDef; + +/** + * @brief Consumer Electronics Control (CEC) + */ +typedef struct +{ + __IO uint32_t CFGR; + __IO uint32_t OAR; + __IO uint32_t PRES; + __IO uint32_t ESR; + __IO uint32_t CSR; + __IO uint32_t TXD; + __IO uint32_t RXD; +} CEC_TypeDef; + +/** + * @brief CRC calculation unit + */ + +typedef struct +{ + __IO uint32_t DR; + __IO uint8_t IDR; + uint8_t RESERVED0; + uint16_t RESERVED1; + __IO uint32_t CR; +} CRC_TypeDef; + +/** + * @brief Digital to Analog Converter + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t SWTRIGR; + __IO uint32_t DHR12R1; + __IO uint32_t DHR12L1; + __IO uint32_t DHR8R1; + __IO uint32_t DHR12R2; + __IO uint32_t DHR12L2; + __IO uint32_t DHR8R2; + __IO uint32_t DHR12RD; + __IO uint32_t DHR12LD; + __IO uint32_t DHR8RD; + __IO uint32_t DOR1; + __IO uint32_t DOR2; +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + __IO uint32_t SR; +#endif +} DAC_TypeDef; + +/** + * @brief Debug MCU + */ + +typedef struct +{ + __IO uint32_t IDCODE; + __IO uint32_t CR; +}DBGMCU_TypeDef; + +/** + * @brief DMA Controller + */ + +typedef struct +{ + __IO uint32_t CCR; + __IO uint32_t CNDTR; + __IO uint32_t CPAR; + __IO uint32_t CMAR; +} DMA_Channel_TypeDef; + +typedef struct +{ + __IO uint32_t ISR; + __IO uint32_t IFCR; +} DMA_TypeDef; + +/** + * @brief Ethernet MAC + */ + +typedef struct +{ + __IO uint32_t MACCR; + __IO uint32_t MACFFR; + __IO uint32_t MACHTHR; + __IO uint32_t MACHTLR; + __IO uint32_t MACMIIAR; + __IO uint32_t MACMIIDR; + __IO uint32_t MACFCR; + __IO uint32_t MACVLANTR; /* 8 */ + uint32_t RESERVED0[2]; + __IO uint32_t MACRWUFFR; /* 11 */ + __IO uint32_t MACPMTCSR; + uint32_t RESERVED1[2]; + __IO uint32_t MACSR; /* 15 */ + __IO uint32_t MACIMR; + __IO uint32_t MACA0HR; + __IO uint32_t MACA0LR; + __IO uint32_t MACA1HR; + __IO uint32_t MACA1LR; + __IO uint32_t MACA2HR; + __IO uint32_t MACA2LR; + __IO uint32_t MACA3HR; + __IO uint32_t MACA3LR; /* 24 */ + uint32_t RESERVED2[40]; + __IO uint32_t MMCCR; /* 65 */ + __IO uint32_t MMCRIR; + __IO uint32_t MMCTIR; + __IO uint32_t MMCRIMR; + __IO uint32_t MMCTIMR; /* 69 */ + uint32_t RESERVED3[14]; + __IO uint32_t MMCTGFSCCR; /* 84 */ + __IO uint32_t MMCTGFMSCCR; + uint32_t RESERVED4[5]; + __IO uint32_t MMCTGFCR; + uint32_t RESERVED5[10]; + __IO uint32_t MMCRFCECR; + __IO uint32_t MMCRFAECR; + uint32_t RESERVED6[10]; + __IO uint32_t MMCRGUFCR; + uint32_t RESERVED7[334]; + __IO uint32_t PTPTSCR; + __IO uint32_t PTPSSIR; + __IO uint32_t PTPTSHR; + __IO uint32_t PTPTSLR; + __IO uint32_t PTPTSHUR; + __IO uint32_t PTPTSLUR; + __IO uint32_t PTPTSAR; + __IO uint32_t PTPTTHR; + __IO uint32_t PTPTTLR; + uint32_t RESERVED8[567]; + __IO uint32_t DMABMR; + __IO uint32_t DMATPDR; + __IO uint32_t DMARPDR; + __IO uint32_t DMARDLAR; + __IO uint32_t DMATDLAR; + __IO uint32_t DMASR; + __IO uint32_t DMAOMR; + __IO uint32_t DMAIER; + __IO uint32_t DMAMFBOCR; + uint32_t RESERVED9[9]; + __IO uint32_t DMACHTDR; + __IO uint32_t DMACHRDR; + __IO uint32_t DMACHTBAR; + __IO uint32_t DMACHRBAR; +} ETH_TypeDef; + +/** + * @brief External Interrupt/Event Controller + */ + +typedef struct +{ + __IO uint32_t IMR; + __IO uint32_t EMR; + __IO uint32_t RTSR; + __IO uint32_t FTSR; + __IO uint32_t SWIER; + __IO uint32_t PR; +} EXTI_TypeDef; + +/** + * @brief FLASH Registers + */ + +typedef struct +{ + __IO uint32_t ACR; + __IO uint32_t KEYR; + __IO uint32_t OPTKEYR; + __IO uint32_t SR; + __IO uint32_t CR; + __IO uint32_t AR; + __IO uint32_t RESERVED; + __IO uint32_t OBR; + __IO uint32_t WRPR; +#ifdef STM32F10X_XL + uint32_t RESERVED1[8]; + __IO uint32_t KEYR2; + uint32_t RESERVED2; + __IO uint32_t SR2; + __IO uint32_t CR2; + __IO uint32_t AR2; +#endif /* STM32F10X_XL */ +} FLASH_TypeDef; + +/** + * @brief Option Bytes Registers + */ + +typedef struct +{ + __IO uint16_t RDP; + __IO uint16_t USER; + __IO uint16_t Data0; + __IO uint16_t Data1; + __IO uint16_t WRP0; + __IO uint16_t WRP1; + __IO uint16_t WRP2; + __IO uint16_t WRP3; +} OB_TypeDef; + +/** + * @brief Flexible Static Memory Controller + */ + +typedef struct +{ + __IO uint32_t BTCR[8]; +} FSMC_Bank1_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank1E + */ + +typedef struct +{ + __IO uint32_t BWTR[7]; +} FSMC_Bank1E_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank2 + */ + +typedef struct +{ + __IO uint32_t PCR2; + __IO uint32_t SR2; + __IO uint32_t PMEM2; + __IO uint32_t PATT2; + uint32_t RESERVED0; + __IO uint32_t ECCR2; +} FSMC_Bank2_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank3 + */ + +typedef struct +{ + __IO uint32_t PCR3; + __IO uint32_t SR3; + __IO uint32_t PMEM3; + __IO uint32_t PATT3; + uint32_t RESERVED0; + __IO uint32_t ECCR3; +} FSMC_Bank3_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank4 + */ + +typedef struct +{ + __IO uint32_t PCR4; + __IO uint32_t SR4; + __IO uint32_t PMEM4; + __IO uint32_t PATT4; + __IO uint32_t PIO4; +} FSMC_Bank4_TypeDef; + +/** + * @brief General Purpose I/O + */ + +typedef struct +{ + __IO uint32_t CRL; + __IO uint32_t CRH; + __IO uint32_t IDR; + __IO uint32_t ODR; + __IO uint32_t BSRR; + __IO uint32_t BRR; + __IO uint32_t LCKR; +} GPIO_TypeDef; + +/** + * @brief Alternate Function I/O + */ + +typedef struct +{ + __IO uint32_t EVCR; + __IO uint32_t MAPR; + __IO uint32_t EXTICR[4]; + uint32_t RESERVED0; + __IO uint32_t MAPR2; +} AFIO_TypeDef; +/** + * @brief Inter Integrated Circuit Interface + */ + +typedef struct +{ + __IO uint16_t CR1; + uint16_t RESERVED0; + __IO uint16_t CR2; + uint16_t RESERVED1; + __IO uint16_t OAR1; + uint16_t RESERVED2; + __IO uint16_t OAR2; + uint16_t RESERVED3; + __IO uint16_t DR; + uint16_t RESERVED4; + __IO uint16_t SR1; + uint16_t RESERVED5; + __IO uint16_t SR2; + uint16_t RESERVED6; + __IO uint16_t CCR; + uint16_t RESERVED7; + __IO uint16_t TRISE; + uint16_t RESERVED8; +} I2C_TypeDef; + +/** + * @brief Independent WATCHDOG + */ + +typedef struct +{ + __IO uint32_t KR; + __IO uint32_t PR; + __IO uint32_t RLR; + __IO uint32_t SR; +} IWDG_TypeDef; + +/** + * @brief Power Control + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t CSR; +} PWR_TypeDef; + +/** + * @brief Reset and Clock Control + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t CFGR; + __IO uint32_t CIR; + __IO uint32_t APB2RSTR; + __IO uint32_t APB1RSTR; + __IO uint32_t AHBENR; + __IO uint32_t APB2ENR; + __IO uint32_t APB1ENR; + __IO uint32_t BDCR; + __IO uint32_t CSR; + +#ifdef STM32F10X_CL + __IO uint32_t AHBRSTR; + __IO uint32_t CFGR2; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + uint32_t RESERVED0; + __IO uint32_t CFGR2; +#endif /* STM32F10X_LD_VL || STM32F10X_MD_VL || STM32F10X_HD_VL */ +} RCC_TypeDef; + +/** + * @brief Real-Time Clock + */ + +typedef struct +{ + __IO uint16_t CRH; + uint16_t RESERVED0; + __IO uint16_t CRL; + uint16_t RESERVED1; + __IO uint16_t PRLH; + uint16_t RESERVED2; + __IO uint16_t PRLL; + uint16_t RESERVED3; + __IO uint16_t DIVH; + uint16_t RESERVED4; + __IO uint16_t DIVL; + uint16_t RESERVED5; + __IO uint16_t CNTH; + uint16_t RESERVED6; + __IO uint16_t CNTL; + uint16_t RESERVED7; + __IO uint16_t ALRH; + uint16_t RESERVED8; + __IO uint16_t ALRL; + uint16_t RESERVED9; +} RTC_TypeDef; + +/** + * @brief SD host Interface + */ + +typedef struct +{ + __IO uint32_t POWER; + __IO uint32_t CLKCR; + __IO uint32_t ARG; + __IO uint32_t CMD; + __I uint32_t RESPCMD; + __I uint32_t RESP1; + __I uint32_t RESP2; + __I uint32_t RESP3; + __I uint32_t RESP4; + __IO uint32_t DTIMER; + __IO uint32_t DLEN; + __IO uint32_t DCTRL; + __I uint32_t DCOUNT; + __I uint32_t STA; + __IO uint32_t ICR; + __IO uint32_t MASK; + uint32_t RESERVED0[2]; + __I uint32_t FIFOCNT; + uint32_t RESERVED1[13]; + __IO uint32_t FIFO; +} SDIO_TypeDef; + +/** + * @brief Serial Peripheral Interface + */ + +typedef struct +{ + __IO uint16_t CR1; + uint16_t RESERVED0; + __IO uint16_t CR2; + uint16_t RESERVED1; + __IO uint16_t SR; + uint16_t RESERVED2; + __IO uint16_t DR; + uint16_t RESERVED3; + __IO uint16_t CRCPR; + uint16_t RESERVED4; + __IO uint16_t RXCRCR; + uint16_t RESERVED5; + __IO uint16_t TXCRCR; + uint16_t RESERVED6; + __IO uint16_t I2SCFGR; + uint16_t RESERVED7; + __IO uint16_t I2SPR; + uint16_t RESERVED8; +} SPI_TypeDef; + +/** + * @brief TIM + */ + +typedef struct +{ + __IO uint16_t CR1; + uint16_t RESERVED0; + __IO uint16_t CR2; + uint16_t RESERVED1; + __IO uint16_t SMCR; + uint16_t RESERVED2; + __IO uint16_t DIER; + uint16_t RESERVED3; + __IO uint16_t SR; + uint16_t RESERVED4; + __IO uint16_t EGR; + uint16_t RESERVED5; + __IO uint16_t CCMR1; + uint16_t RESERVED6; + __IO uint16_t CCMR2; + uint16_t RESERVED7; + __IO uint16_t CCER; + uint16_t RESERVED8; + __IO uint16_t CNT; + uint16_t RESERVED9; + __IO uint16_t PSC; + uint16_t RESERVED10; + __IO uint16_t ARR; + uint16_t RESERVED11; + __IO uint16_t RCR; + uint16_t RESERVED12; + __IO uint16_t CCR1; + uint16_t RESERVED13; + __IO uint16_t CCR2; + uint16_t RESERVED14; + __IO uint16_t CCR3; + uint16_t RESERVED15; + __IO uint16_t CCR4; + uint16_t RESERVED16; + __IO uint16_t BDTR; + uint16_t RESERVED17; + __IO uint16_t DCR; + uint16_t RESERVED18; + __IO uint16_t DMAR; + uint16_t RESERVED19; +} TIM_TypeDef; + +/** + * @brief Universal Synchronous Asynchronous Receiver Transmitter + */ + +typedef struct +{ + __IO uint16_t SR; + uint16_t RESERVED0; + __IO uint16_t DR; + uint16_t RESERVED1; + __IO uint16_t BRR; + uint16_t RESERVED2; + __IO uint16_t CR1; + uint16_t RESERVED3; + __IO uint16_t CR2; + uint16_t RESERVED4; + __IO uint16_t CR3; + uint16_t RESERVED5; + __IO uint16_t GTPR; + uint16_t RESERVED6; +} USART_TypeDef; + +/** + * @brief Window WATCHDOG + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t CFR; + __IO uint32_t SR; +} WWDG_TypeDef; + +/** + * @} + */ + +/** @addtogroup Peripheral_memory_map + * @{ + */ + + +#define FLASH_BASE ((uint32_t)0x08000000) /*!< FLASH base address in the alias region */ +#define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM base address in the alias region */ +#define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripheral base address in the alias region */ + +#define SRAM_BB_BASE ((uint32_t)0x22000000) /*!< SRAM base address in the bit-band region */ +#define PERIPH_BB_BASE ((uint32_t)0x42000000) /*!< Peripheral base address in the bit-band region */ + +#define FSMC_R_BASE ((uint32_t)0xA0000000) /*!< FSMC registers base address */ + +/*!< Peripheral memory map */ +#define APB1PERIPH_BASE PERIPH_BASE +#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) +#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) + +#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) +#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) +#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) +#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) +#define TIM6_BASE (APB1PERIPH_BASE + 0x1000) +#define TIM7_BASE (APB1PERIPH_BASE + 0x1400) +#define TIM12_BASE (APB1PERIPH_BASE + 0x1800) +#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00) +#define TIM14_BASE (APB1PERIPH_BASE + 0x2000) +#define RTC_BASE (APB1PERIPH_BASE + 0x2800) +#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) +#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) +#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) +#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) +#define USART2_BASE (APB1PERIPH_BASE + 0x4400) +#define USART3_BASE (APB1PERIPH_BASE + 0x4800) +#define UART4_BASE (APB1PERIPH_BASE + 0x4C00) +#define UART5_BASE (APB1PERIPH_BASE + 0x5000) +#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) +#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) +#define CAN1_BASE (APB1PERIPH_BASE + 0x6400) +#define CAN2_BASE (APB1PERIPH_BASE + 0x6800) +#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) +#define PWR_BASE (APB1PERIPH_BASE + 0x7000) +#define DAC_BASE (APB1PERIPH_BASE + 0x7400) +#define CEC_BASE (APB1PERIPH_BASE + 0x7800) + +#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) +#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) +#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) +#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) +#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) +#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) +#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) +#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00) +#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000) +#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) +#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) +#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) +#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) +#define TIM8_BASE (APB2PERIPH_BASE + 0x3400) +#define USART1_BASE (APB2PERIPH_BASE + 0x3800) +#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00) +#define TIM15_BASE (APB2PERIPH_BASE + 0x4000) +#define TIM16_BASE (APB2PERIPH_BASE + 0x4400) +#define TIM17_BASE (APB2PERIPH_BASE + 0x4800) +#define TIM9_BASE (APB2PERIPH_BASE + 0x4C00) +#define TIM10_BASE (APB2PERIPH_BASE + 0x5000) +#define TIM11_BASE (APB2PERIPH_BASE + 0x5400) + +#define SDIO_BASE (PERIPH_BASE + 0x18000) + +#define DMA1_BASE (AHBPERIPH_BASE + 0x0000) +#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008) +#define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) +#define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030) +#define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044) +#define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058) +#define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C) +#define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) +#define DMA2_BASE (AHBPERIPH_BASE + 0x0400) +#define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408) +#define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C) +#define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430) +#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) +#define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458) +#define RCC_BASE (AHBPERIPH_BASE + 0x1000) +#define CRC_BASE (AHBPERIPH_BASE + 0x3000) + +#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) /*!< Flash registers base address */ +#define OB_BASE ((uint32_t)0x1FFFF800) /*!< Flash Option Bytes base address */ + +#define ETH_BASE (AHBPERIPH_BASE + 0x8000) +#define ETH_MAC_BASE (ETH_BASE) +#define ETH_MMC_BASE (ETH_BASE + 0x0100) +#define ETH_PTP_BASE (ETH_BASE + 0x0700) +#define ETH_DMA_BASE (ETH_BASE + 0x1000) + +#define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) /*!< FSMC Bank1 registers base address */ +#define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) /*!< FSMC Bank1E registers base address */ +#define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) /*!< FSMC Bank2 registers base address */ +#define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) /*!< FSMC Bank3 registers base address */ +#define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) /*!< FSMC Bank4 registers base address */ + +#define DBGMCU_BASE ((uint32_t)0xE0042000) /*!< Debug MCU registers base address */ + +/** + * @} + */ + +/** @addtogroup Peripheral_declaration + * @{ + */ + +#define TIM2 ((TIM_TypeDef *) TIM2_BASE) +#define TIM3 ((TIM_TypeDef *) TIM3_BASE) +#define TIM4 ((TIM_TypeDef *) TIM4_BASE) +#define TIM5 ((TIM_TypeDef *) TIM5_BASE) +#define TIM6 ((TIM_TypeDef *) TIM6_BASE) +#define TIM7 ((TIM_TypeDef *) TIM7_BASE) +#define TIM12 ((TIM_TypeDef *) TIM12_BASE) +#define TIM13 ((TIM_TypeDef *) TIM13_BASE) +#define TIM14 ((TIM_TypeDef *) TIM14_BASE) +#define RTC ((RTC_TypeDef *) RTC_BASE) +#define WWDG ((WWDG_TypeDef *) WWDG_BASE) +#define IWDG ((IWDG_TypeDef *) IWDG_BASE) +#define SPI2 ((SPI_TypeDef *) SPI2_BASE) +#define SPI3 ((SPI_TypeDef *) SPI3_BASE) +#define USART2 ((USART_TypeDef *) USART2_BASE) +#define USART3 ((USART_TypeDef *) USART3_BASE) +#define UART4 ((USART_TypeDef *) UART4_BASE) +#define UART5 ((USART_TypeDef *) UART5_BASE) +#define I2C1 ((I2C_TypeDef *) I2C1_BASE) +#define I2C2 ((I2C_TypeDef *) I2C2_BASE) +#define CAN1 ((CAN_TypeDef *) CAN1_BASE) +#define CAN2 ((CAN_TypeDef *) CAN2_BASE) +#define BKP ((BKP_TypeDef *) BKP_BASE) +#define PWR ((PWR_TypeDef *) PWR_BASE) +#define DAC ((DAC_TypeDef *) DAC_BASE) +#define CEC ((CEC_TypeDef *) CEC_BASE) +#define AFIO ((AFIO_TypeDef *) AFIO_BASE) +#define EXTI ((EXTI_TypeDef *) EXTI_BASE) +#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) +#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) +#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) +#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) +#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) +#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) +#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) +#define ADC1 ((ADC_TypeDef *) ADC1_BASE) +#define ADC2 ((ADC_TypeDef *) ADC2_BASE) +#define TIM1 ((TIM_TypeDef *) TIM1_BASE) +#define SPI1 ((SPI_TypeDef *) SPI1_BASE) +#define TIM8 ((TIM_TypeDef *) TIM8_BASE) +#define USART1 ((USART_TypeDef *) USART1_BASE) +#define ADC3 ((ADC_TypeDef *) ADC3_BASE) +#define TIM15 ((TIM_TypeDef *) TIM15_BASE) +#define TIM16 ((TIM_TypeDef *) TIM16_BASE) +#define TIM17 ((TIM_TypeDef *) TIM17_BASE) +#define TIM9 ((TIM_TypeDef *) TIM9_BASE) +#define TIM10 ((TIM_TypeDef *) TIM10_BASE) +#define TIM11 ((TIM_TypeDef *) TIM11_BASE) +#define SDIO ((SDIO_TypeDef *) SDIO_BASE) +#define DMA1 ((DMA_TypeDef *) DMA1_BASE) +#define DMA2 ((DMA_TypeDef *) DMA2_BASE) +#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) +#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) +#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) +#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) +#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) +#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) +#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) +#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) +#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) +#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) +#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) +#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) +#define RCC ((RCC_TypeDef *) RCC_BASE) +#define CRC ((CRC_TypeDef *) CRC_BASE) +#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) +#define OB ((OB_TypeDef *) OB_BASE) +#define ETH ((ETH_TypeDef *) ETH_BASE) +#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE) +#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE) +#define FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE) +#define FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE) +#define FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE) +#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) + +/** + * @} + */ + +/** @addtogroup Exported_constants + * @{ + */ + + /** @addtogroup Peripheral_Registers_Bits_Definition + * @{ + */ + +/******************************************************************************/ +/* Peripheral Registers_Bits_Definition */ +/******************************************************************************/ + +/******************************************************************************/ +/* */ +/* CRC calculation unit */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for CRC_DR register *********************/ +#define CRC_DR_DR ((uint32_t)0xFFFFFFFF) /*!< Data register bits */ + + +/******************* Bit definition for CRC_IDR register ********************/ +#define CRC_IDR_IDR ((uint8_t)0xFF) /*!< General-purpose 8-bit data register bits */ + + +/******************** Bit definition for CRC_CR register ********************/ +#define CRC_CR_RESET ((uint8_t)0x01) /*!< RESET bit */ + +/******************************************************************************/ +/* */ +/* Power Control */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for PWR_CR register ********************/ +#define PWR_CR_LPDS ((uint16_t)0x0001) /*!< Low-Power Deepsleep */ +#define PWR_CR_PDDS ((uint16_t)0x0002) /*!< Power Down Deepsleep */ +#define PWR_CR_CWUF ((uint16_t)0x0004) /*!< Clear Wakeup Flag */ +#define PWR_CR_CSBF ((uint16_t)0x0008) /*!< Clear Standby Flag */ +#define PWR_CR_PVDE ((uint16_t)0x0010) /*!< Power Voltage Detector Enable */ + +#define PWR_CR_PLS ((uint16_t)0x00E0) /*!< PLS[2:0] bits (PVD Level Selection) */ +#define PWR_CR_PLS_0 ((uint16_t)0x0020) /*!< Bit 0 */ +#define PWR_CR_PLS_1 ((uint16_t)0x0040) /*!< Bit 1 */ +#define PWR_CR_PLS_2 ((uint16_t)0x0080) /*!< Bit 2 */ + +/*!< PVD level configuration */ +#define PWR_CR_PLS_2V2 ((uint16_t)0x0000) /*!< PVD level 2.2V */ +#define PWR_CR_PLS_2V3 ((uint16_t)0x0020) /*!< PVD level 2.3V */ +#define PWR_CR_PLS_2V4 ((uint16_t)0x0040) /*!< PVD level 2.4V */ +#define PWR_CR_PLS_2V5 ((uint16_t)0x0060) /*!< PVD level 2.5V */ +#define PWR_CR_PLS_2V6 ((uint16_t)0x0080) /*!< PVD level 2.6V */ +#define PWR_CR_PLS_2V7 ((uint16_t)0x00A0) /*!< PVD level 2.7V */ +#define PWR_CR_PLS_2V8 ((uint16_t)0x00C0) /*!< PVD level 2.8V */ +#define PWR_CR_PLS_2V9 ((uint16_t)0x00E0) /*!< PVD level 2.9V */ + +#define PWR_CR_DBP ((uint16_t)0x0100) /*!< Disable Backup Domain write protection */ + + +/******************* Bit definition for PWR_CSR register ********************/ +#define PWR_CSR_WUF ((uint16_t)0x0001) /*!< Wakeup Flag */ +#define PWR_CSR_SBF ((uint16_t)0x0002) /*!< Standby Flag */ +#define PWR_CSR_PVDO ((uint16_t)0x0004) /*!< PVD Output */ +#define PWR_CSR_EWUP ((uint16_t)0x0100) /*!< Enable WKUP pin */ + +/******************************************************************************/ +/* */ +/* Backup registers */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for BKP_DR1 register ********************/ +#define BKP_DR1_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR2 register ********************/ +#define BKP_DR2_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR3 register ********************/ +#define BKP_DR3_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR4 register ********************/ +#define BKP_DR4_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR5 register ********************/ +#define BKP_DR5_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR6 register ********************/ +#define BKP_DR6_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR7 register ********************/ +#define BKP_DR7_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR8 register ********************/ +#define BKP_DR8_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR9 register ********************/ +#define BKP_DR9_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR10 register *******************/ +#define BKP_DR10_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR11 register *******************/ +#define BKP_DR11_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR12 register *******************/ +#define BKP_DR12_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR13 register *******************/ +#define BKP_DR13_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR14 register *******************/ +#define BKP_DR14_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR15 register *******************/ +#define BKP_DR15_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR16 register *******************/ +#define BKP_DR16_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR17 register *******************/ +#define BKP_DR17_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/****************** Bit definition for BKP_DR18 register ********************/ +#define BKP_DR18_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR19 register *******************/ +#define BKP_DR19_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR20 register *******************/ +#define BKP_DR20_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR21 register *******************/ +#define BKP_DR21_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR22 register *******************/ +#define BKP_DR22_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR23 register *******************/ +#define BKP_DR23_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR24 register *******************/ +#define BKP_DR24_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR25 register *******************/ +#define BKP_DR25_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR26 register *******************/ +#define BKP_DR26_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR27 register *******************/ +#define BKP_DR27_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR28 register *******************/ +#define BKP_DR28_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR29 register *******************/ +#define BKP_DR29_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR30 register *******************/ +#define BKP_DR30_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR31 register *******************/ +#define BKP_DR31_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR32 register *******************/ +#define BKP_DR32_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR33 register *******************/ +#define BKP_DR33_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR34 register *******************/ +#define BKP_DR34_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR35 register *******************/ +#define BKP_DR35_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR36 register *******************/ +#define BKP_DR36_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR37 register *******************/ +#define BKP_DR37_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR38 register *******************/ +#define BKP_DR38_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR39 register *******************/ +#define BKP_DR39_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR40 register *******************/ +#define BKP_DR40_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR41 register *******************/ +#define BKP_DR41_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR42 register *******************/ +#define BKP_DR42_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/****************** Bit definition for BKP_RTCCR register *******************/ +#define BKP_RTCCR_CAL ((uint16_t)0x007F) /*!< Calibration value */ +#define BKP_RTCCR_CCO ((uint16_t)0x0080) /*!< Calibration Clock Output */ +#define BKP_RTCCR_ASOE ((uint16_t)0x0100) /*!< Alarm or Second Output Enable */ +#define BKP_RTCCR_ASOS ((uint16_t)0x0200) /*!< Alarm or Second Output Selection */ + +/******************** Bit definition for BKP_CR register ********************/ +#define BKP_CR_TPE ((uint8_t)0x01) /*!< TAMPER pin enable */ +#define BKP_CR_TPAL ((uint8_t)0x02) /*!< TAMPER pin active level */ + +/******************* Bit definition for BKP_CSR register ********************/ +#define BKP_CSR_CTE ((uint16_t)0x0001) /*!< Clear Tamper event */ +#define BKP_CSR_CTI ((uint16_t)0x0002) /*!< Clear Tamper Interrupt */ +#define BKP_CSR_TPIE ((uint16_t)0x0004) /*!< TAMPER Pin interrupt enable */ +#define BKP_CSR_TEF ((uint16_t)0x0100) /*!< Tamper Event Flag */ +#define BKP_CSR_TIF ((uint16_t)0x0200) /*!< Tamper Interrupt Flag */ + +/******************************************************************************/ +/* */ +/* Reset and Clock Control */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for RCC_CR register ********************/ +#define RCC_CR_HSION ((uint32_t)0x00000001) /*!< Internal High Speed clock enable */ +#define RCC_CR_HSIRDY ((uint32_t)0x00000002) /*!< Internal High Speed clock ready flag */ +#define RCC_CR_HSITRIM ((uint32_t)0x000000F8) /*!< Internal High Speed clock trimming */ +#define RCC_CR_HSICAL ((uint32_t)0x0000FF00) /*!< Internal High Speed clock Calibration */ +#define RCC_CR_HSEON ((uint32_t)0x00010000) /*!< External High Speed clock enable */ +#define RCC_CR_HSERDY ((uint32_t)0x00020000) /*!< External High Speed clock ready flag */ +#define RCC_CR_HSEBYP ((uint32_t)0x00040000) /*!< External High Speed clock Bypass */ +#define RCC_CR_CSSON ((uint32_t)0x00080000) /*!< Clock Security System enable */ +#define RCC_CR_PLLON ((uint32_t)0x01000000) /*!< PLL enable */ +#define RCC_CR_PLLRDY ((uint32_t)0x02000000) /*!< PLL clock ready flag */ + +#ifdef STM32F10X_CL + #define RCC_CR_PLL2ON ((uint32_t)0x04000000) /*!< PLL2 enable */ + #define RCC_CR_PLL2RDY ((uint32_t)0x08000000) /*!< PLL2 clock ready flag */ + #define RCC_CR_PLL3ON ((uint32_t)0x10000000) /*!< PLL3 enable */ + #define RCC_CR_PLL3RDY ((uint32_t)0x20000000) /*!< PLL3 clock ready flag */ +#endif /* STM32F10X_CL */ + +/******************* Bit definition for RCC_CFGR register *******************/ +/*!< SW configuration */ +#define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (System clock Switch) */ +#define RCC_CFGR_SW_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define RCC_CFGR_SW_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + +#define RCC_CFGR_SW_HSI ((uint32_t)0x00000000) /*!< HSI selected as system clock */ +#define RCC_CFGR_SW_HSE ((uint32_t)0x00000001) /*!< HSE selected as system clock */ +#define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as system clock */ + +/*!< SWS configuration */ +#define RCC_CFGR_SWS ((uint32_t)0x0000000C) /*!< SWS[1:0] bits (System Clock Switch Status) */ +#define RCC_CFGR_SWS_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define RCC_CFGR_SWS_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) /*!< HSI oscillator used as system clock */ +#define RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) /*!< HSE oscillator used as system clock */ +#define RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) /*!< PLL used as system clock */ + +/*!< HPRE configuration */ +#define RCC_CFGR_HPRE ((uint32_t)0x000000F0) /*!< HPRE[3:0] bits (AHB prescaler) */ +#define RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) /*!< SYSCLK not divided */ +#define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2 */ +#define RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) /*!< SYSCLK divided by 4 */ +#define RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) /*!< SYSCLK divided by 8 */ +#define RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) /*!< SYSCLK divided by 16 */ +#define RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) /*!< SYSCLK divided by 64 */ +#define RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) /*!< SYSCLK divided by 128 */ +#define RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) /*!< SYSCLK divided by 256 */ +#define RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) /*!< SYSCLK divided by 512 */ + +/*!< PPRE1 configuration */ +#define RCC_CFGR_PPRE1 ((uint32_t)0x00000700) /*!< PRE1[2:0] bits (APB1 prescaler) */ +#define RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ + +#define RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ +#define RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400) /*!< HCLK divided by 2 */ +#define RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500) /*!< HCLK divided by 4 */ +#define RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600) /*!< HCLK divided by 8 */ +#define RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) /*!< HCLK divided by 16 */ + +/*!< PPRE2 configuration */ +#define RCC_CFGR_PPRE2 ((uint32_t)0x00003800) /*!< PRE2[2:0] bits (APB2 prescaler) */ +#define RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800) /*!< Bit 0 */ +#define RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000) /*!< Bit 1 */ +#define RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000) /*!< Bit 2 */ + +#define RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ +#define RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000) /*!< HCLK divided by 2 */ +#define RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800) /*!< HCLK divided by 4 */ +#define RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000) /*!< HCLK divided by 8 */ +#define RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800) /*!< HCLK divided by 16 */ + +/*!< ADCPPRE configuration */ +#define RCC_CFGR_ADCPRE ((uint32_t)0x0000C000) /*!< ADCPRE[1:0] bits (ADC prescaler) */ +#define RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000) /*!< Bit 0 */ +#define RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000) /*!< Bit 1 */ + +#define RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000) /*!< PCLK2 divided by 2 */ +#define RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000) /*!< PCLK2 divided by 4 */ +#define RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000) /*!< PCLK2 divided by 6 */ +#define RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000) /*!< PCLK2 divided by 8 */ + +#define RCC_CFGR_PLLSRC ((uint32_t)0x00010000) /*!< PLL entry clock source */ + +#define RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000) /*!< HSE divider for PLL entry */ + +/*!< PLLMUL configuration */ +#define RCC_CFGR_PLLMULL ((uint32_t)0x003C0000) /*!< PLLMUL[3:0] bits (PLL multiplication factor) */ +#define RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000) /*!< Bit 1 */ +#define RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000) /*!< Bit 2 */ +#define RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000) /*!< Bit 3 */ + +#ifdef STM32F10X_CL + #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ + #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ + + #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ + #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ + + #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock * 4 */ + #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock * 5 */ + #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock * 6 */ + #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock * 7 */ + #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock * 8 */ + #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock * 9 */ + #define RCC_CFGR_PLLMULL6_5 ((uint32_t)0x00340000) /*!< PLL input clock * 6.5 */ + + #define RCC_CFGR_OTGFSPRE ((uint32_t)0x00400000) /*!< USB OTG FS prescaler */ + +/*!< MCO configuration */ + #define RCC_CFGR_MCO ((uint32_t)0x0F000000) /*!< MCO[3:0] bits (Microcontroller Clock Output) */ + #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ + #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + #define RCC_CFGR_MCO_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + + #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ + #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ + #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ + #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ + #define RCC_CFGR_MCO_PLLCLK_Div2 ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ + #define RCC_CFGR_MCO_PLL2CLK ((uint32_t)0x08000000) /*!< PLL2 clock selected as MCO source*/ + #define RCC_CFGR_MCO_PLL3CLK_Div2 ((uint32_t)0x09000000) /*!< PLL3 clock divided by 2 selected as MCO source*/ + #define RCC_CFGR_MCO_Ext_HSE ((uint32_t)0x0A000000) /*!< XT1 external 3-25 MHz oscillator clock selected as MCO source */ + #define RCC_CFGR_MCO_PLL3CLK ((uint32_t)0x0B000000) /*!< PLL3 clock selected as MCO source */ +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ + #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ + + #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ + #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ + + #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ + #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ + #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ + #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ + #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ + #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ + #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ + #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ + #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ + #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ + #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ + #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ + #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ + #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ + #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ + +/*!< MCO configuration */ + #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ + #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ + #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + + #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ + #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ + #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ + #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ + #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ +#else + #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ + #define RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000) /*!< HSE clock selected as PLL entry clock source */ + + #define RCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000) /*!< HSE clock not divided for PLL entry */ + #define RCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) /*!< HSE clock divided by 2 for PLL entry */ + + #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ + #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ + #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ + #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ + #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ + #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ + #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ + #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ + #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ + #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ + #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ + #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ + #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ + #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ + #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ + #define RCC_CFGR_USBPRE ((uint32_t)0x00400000) /*!< USB Device prescaler */ + +/*!< MCO configuration */ + #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ + #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ + #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + + #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ + #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ + #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ + #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ + #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ +#endif /* STM32F10X_CL */ + +/*!<****************** Bit definition for RCC_CIR register ********************/ +#define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) /*!< LSI Ready Interrupt flag */ +#define RCC_CIR_LSERDYF ((uint32_t)0x00000002) /*!< LSE Ready Interrupt flag */ +#define RCC_CIR_HSIRDYF ((uint32_t)0x00000004) /*!< HSI Ready Interrupt flag */ +#define RCC_CIR_HSERDYF ((uint32_t)0x00000008) /*!< HSE Ready Interrupt flag */ +#define RCC_CIR_PLLRDYF ((uint32_t)0x00000010) /*!< PLL Ready Interrupt flag */ +#define RCC_CIR_CSSF ((uint32_t)0x00000080) /*!< Clock Security System Interrupt flag */ +#define RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) /*!< LSI Ready Interrupt Enable */ +#define RCC_CIR_LSERDYIE ((uint32_t)0x00000200) /*!< LSE Ready Interrupt Enable */ +#define RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) /*!< HSI Ready Interrupt Enable */ +#define RCC_CIR_HSERDYIE ((uint32_t)0x00000800) /*!< HSE Ready Interrupt Enable */ +#define RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) /*!< PLL Ready Interrupt Enable */ +#define RCC_CIR_LSIRDYC ((uint32_t)0x00010000) /*!< LSI Ready Interrupt Clear */ +#define RCC_CIR_LSERDYC ((uint32_t)0x00020000) /*!< LSE Ready Interrupt Clear */ +#define RCC_CIR_HSIRDYC ((uint32_t)0x00040000) /*!< HSI Ready Interrupt Clear */ +#define RCC_CIR_HSERDYC ((uint32_t)0x00080000) /*!< HSE Ready Interrupt Clear */ +#define RCC_CIR_PLLRDYC ((uint32_t)0x00100000) /*!< PLL Ready Interrupt Clear */ +#define RCC_CIR_CSSC ((uint32_t)0x00800000) /*!< Clock Security System Interrupt Clear */ + +#ifdef STM32F10X_CL + #define RCC_CIR_PLL2RDYF ((uint32_t)0x00000020) /*!< PLL2 Ready Interrupt flag */ + #define RCC_CIR_PLL3RDYF ((uint32_t)0x00000040) /*!< PLL3 Ready Interrupt flag */ + #define RCC_CIR_PLL2RDYIE ((uint32_t)0x00002000) /*!< PLL2 Ready Interrupt Enable */ + #define RCC_CIR_PLL3RDYIE ((uint32_t)0x00004000) /*!< PLL3 Ready Interrupt Enable */ + #define RCC_CIR_PLL2RDYC ((uint32_t)0x00200000) /*!< PLL2 Ready Interrupt Clear */ + #define RCC_CIR_PLL3RDYC ((uint32_t)0x00400000) /*!< PLL3 Ready Interrupt Clear */ +#endif /* STM32F10X_CL */ + +/***************** Bit definition for RCC_APB2RSTR register *****************/ +#define RCC_APB2RSTR_AFIORST ((uint32_t)0x00000001) /*!< Alternate Function I/O reset */ +#define RCC_APB2RSTR_IOPARST ((uint32_t)0x00000004) /*!< I/O port A reset */ +#define RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008) /*!< I/O port B reset */ +#define RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010) /*!< I/O port C reset */ +#define RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020) /*!< I/O port D reset */ +#define RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200) /*!< ADC 1 interface reset */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400) /*!< ADC 2 interface reset */ +#endif + +#define RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800) /*!< TIM1 Timer reset */ +#define RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) /*!< SPI 1 reset */ +#define RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000) /*!< USART1 reset */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +#define RCC_APB2RSTR_TIM15RST ((uint32_t)0x00010000) /*!< TIM15 Timer reset */ +#define RCC_APB2RSTR_TIM16RST ((uint32_t)0x00020000) /*!< TIM16 Timer reset */ +#define RCC_APB2RSTR_TIM17RST ((uint32_t)0x00040000) /*!< TIM17 Timer reset */ +#endif + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040) /*!< I/O port E reset */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_XL) + #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ + #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ + #define RCC_APB2RSTR_TIM8RST ((uint32_t)0x00002000) /*!< TIM8 Timer reset */ + #define RCC_APB2RSTR_ADC3RST ((uint32_t)0x00008000) /*!< ADC3 interface reset */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ + #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ +#endif + +#ifdef STM32F10X_XL + #define RCC_APB2RSTR_TIM9RST ((uint32_t)0x00080000) /*!< TIM9 Timer reset */ + #define RCC_APB2RSTR_TIM10RST ((uint32_t)0x00100000) /*!< TIM10 Timer reset */ + #define RCC_APB2RSTR_TIM11RST ((uint32_t)0x00200000) /*!< TIM11 Timer reset */ +#endif /* STM32F10X_XL */ + +/***************** Bit definition for RCC_APB1RSTR register *****************/ +#define RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) /*!< Timer 2 reset */ +#define RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) /*!< Timer 3 reset */ +#define RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) /*!< Window Watchdog reset */ +#define RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) /*!< USART 2 reset */ +#define RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) /*!< I2C 1 reset */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) /*!< CAN1 reset */ +#endif + +#define RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000) /*!< Backup interface reset */ +#define RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) /*!< Power interface reset */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) /*!< Timer 4 reset */ + #define RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) /*!< SPI 2 reset */ + #define RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) /*!< USART 3 reset */ + #define RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) /*!< I2C 2 reset */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) || defined (STM32F10X_XL) + #define RCC_APB1RSTR_USBRST ((uint32_t)0x00800000) /*!< USB Device reset */ +#endif + +#if defined (STM32F10X_HD) || defined (STM32F10X_CL) || defined (STM32F10X_XL) + #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ + #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ + #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ + #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ + #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ + #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ + #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ +#endif + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ + #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ + #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ + #define RCC_APB1RSTR_CECRST ((uint32_t)0x40000000) /*!< CEC interface reset */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ + #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) /*!< TIM12 Timer reset */ + #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) /*!< TIM13 Timer reset */ + #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) /*!< TIM14 Timer reset */ + #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ + #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ + #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ +#endif + +#ifdef STM32F10X_CL + #define RCC_APB1RSTR_CAN2RST ((uint32_t)0x04000000) /*!< CAN2 reset */ +#endif /* STM32F10X_CL */ + +#ifdef STM32F10X_XL + #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) /*!< TIM12 Timer reset */ + #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) /*!< TIM13 Timer reset */ + #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) /*!< TIM14 Timer reset */ +#endif /* STM32F10X_XL */ + +/****************** Bit definition for RCC_AHBENR register ******************/ +#define RCC_AHBENR_DMA1EN ((uint16_t)0x0001) /*!< DMA1 clock enable */ +#define RCC_AHBENR_SRAMEN ((uint16_t)0x0004) /*!< SRAM interface clock enable */ +#define RCC_AHBENR_FLITFEN ((uint16_t)0x0010) /*!< FLITF clock enable */ +#define RCC_AHBENR_CRCEN ((uint16_t)0x0040) /*!< CRC clock enable */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_CL) || defined (STM32F10X_HD_VL) + #define RCC_AHBENR_DMA2EN ((uint16_t)0x0002) /*!< DMA2 clock enable */ +#endif + +#if defined (STM32F10X_HD) || defined (STM32F10X_XL) + #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ + #define RCC_AHBENR_SDIOEN ((uint16_t)0x0400) /*!< SDIO clock enable */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ +#endif + +#ifdef STM32F10X_CL + #define RCC_AHBENR_OTGFSEN ((uint32_t)0x00001000) /*!< USB OTG FS clock enable */ + #define RCC_AHBENR_ETHMACEN ((uint32_t)0x00004000) /*!< ETHERNET MAC clock enable */ + #define RCC_AHBENR_ETHMACTXEN ((uint32_t)0x00008000) /*!< ETHERNET MAC Tx clock enable */ + #define RCC_AHBENR_ETHMACRXEN ((uint32_t)0x00010000) /*!< ETHERNET MAC Rx clock enable */ +#endif /* STM32F10X_CL */ + +/****************** Bit definition for RCC_APB2ENR register *****************/ +#define RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001) /*!< Alternate Function I/O clock enable */ +#define RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004) /*!< I/O port A clock enable */ +#define RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008) /*!< I/O port B clock enable */ +#define RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010) /*!< I/O port C clock enable */ +#define RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020) /*!< I/O port D clock enable */ +#define RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200) /*!< ADC 1 interface clock enable */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400) /*!< ADC 2 interface clock enable */ +#endif + +#define RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800) /*!< TIM1 Timer clock enable */ +#define RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) /*!< SPI 1 clock enable */ +#define RCC_APB2ENR_USART1EN ((uint32_t)0x00004000) /*!< USART1 clock enable */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +#define RCC_APB2ENR_TIM15EN ((uint32_t)0x00010000) /*!< TIM15 Timer clock enable */ +#define RCC_APB2ENR_TIM16EN ((uint32_t)0x00020000) /*!< TIM16 Timer clock enable */ +#define RCC_APB2ENR_TIM17EN ((uint32_t)0x00040000) /*!< TIM17 Timer clock enable */ +#endif + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040) /*!< I/O port E clock enable */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_XL) + #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ + #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ + #define RCC_APB2ENR_TIM8EN ((uint32_t)0x00002000) /*!< TIM8 Timer clock enable */ + #define RCC_APB2ENR_ADC3EN ((uint32_t)0x00008000) /*!< DMA1 clock enable */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ + #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ +#endif + +#ifdef STM32F10X_XL + #define RCC_APB2ENR_TIM9EN ((uint32_t)0x00080000) /*!< TIM9 Timer clock enable */ + #define RCC_APB2ENR_TIM10EN ((uint32_t)0x00100000) /*!< TIM10 Timer clock enable */ + #define RCC_APB2ENR_TIM11EN ((uint32_t)0x00200000) /*!< TIM11 Timer clock enable */ +#endif + +/***************** Bit definition for RCC_APB1ENR register ******************/ +#define RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) /*!< Timer 2 clock enabled*/ +#define RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) /*!< Timer 3 clock enable */ +#define RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) /*!< Window Watchdog clock enable */ +#define RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) /*!< USART 2 clock enable */ +#define RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) /*!< I2C 1 clock enable */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) /*!< CAN1 clock enable */ +#endif + +#define RCC_APB1ENR_BKPEN ((uint32_t)0x08000000) /*!< Backup interface clock enable */ +#define RCC_APB1ENR_PWREN ((uint32_t)0x10000000) /*!< Power interface clock enable */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) /*!< Timer 4 clock enable */ + #define RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) /*!< SPI 2 clock enable */ + #define RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) /*!< USART 3 clock enable */ + #define RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) /*!< I2C 2 clock enable */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) + #define RCC_APB1ENR_USBEN ((uint32_t)0x00800000) /*!< USB Device clock enable */ +#endif + +#if defined (STM32F10X_HD) || defined (STM32F10X_CL) + #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ + #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ + #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ + #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ + #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ + #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ + #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ +#endif + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ + #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ + #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ + #define RCC_APB1ENR_CECEN ((uint32_t)0x40000000) /*!< CEC interface clock enable */ +#endif + +#ifdef STM32F10X_HD_VL + #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ + #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) /*!< TIM12 Timer clock enable */ + #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) /*!< TIM13 Timer clock enable */ + #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) /*!< TIM14 Timer clock enable */ + #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ + #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ + #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ +#endif /* STM32F10X_HD_VL */ + +#ifdef STM32F10X_CL + #define RCC_APB1ENR_CAN2EN ((uint32_t)0x04000000) /*!< CAN2 clock enable */ +#endif /* STM32F10X_CL */ + +#ifdef STM32F10X_XL + #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) /*!< TIM12 Timer clock enable */ + #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) /*!< TIM13 Timer clock enable */ + #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) /*!< TIM14 Timer clock enable */ +#endif /* STM32F10X_XL */ + +/******************* Bit definition for RCC_BDCR register *******************/ +#define RCC_BDCR_LSEON ((uint32_t)0x00000001) /*!< External Low Speed oscillator enable */ +#define RCC_BDCR_LSERDY ((uint32_t)0x00000002) /*!< External Low Speed oscillator Ready */ +#define RCC_BDCR_LSEBYP ((uint32_t)0x00000004) /*!< External Low Speed oscillator Bypass */ + +#define RCC_BDCR_RTCSEL ((uint32_t)0x00000300) /*!< RTCSEL[1:0] bits (RTC clock source selection) */ +#define RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +/*!< RTC congiguration */ +#define RCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ +#define RCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100) /*!< LSE oscillator clock used as RTC clock */ +#define RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200) /*!< LSI oscillator clock used as RTC clock */ +#define RCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300) /*!< HSE oscillator clock divided by 128 used as RTC clock */ + +#define RCC_BDCR_RTCEN ((uint32_t)0x00008000) /*!< RTC clock enable */ +#define RCC_BDCR_BDRST ((uint32_t)0x00010000) /*!< Backup domain software reset */ + +/******************* Bit definition for RCC_CSR register ********************/ +#define RCC_CSR_LSION ((uint32_t)0x00000001) /*!< Internal Low Speed oscillator enable */ +#define RCC_CSR_LSIRDY ((uint32_t)0x00000002) /*!< Internal Low Speed oscillator Ready */ +#define RCC_CSR_RMVF ((uint32_t)0x01000000) /*!< Remove reset flag */ +#define RCC_CSR_PINRSTF ((uint32_t)0x04000000) /*!< PIN reset flag */ +#define RCC_CSR_PORRSTF ((uint32_t)0x08000000) /*!< POR/PDR reset flag */ +#define RCC_CSR_SFTRSTF ((uint32_t)0x10000000) /*!< Software Reset flag */ +#define RCC_CSR_IWDGRSTF ((uint32_t)0x20000000) /*!< Independent Watchdog reset flag */ +#define RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) /*!< Window watchdog reset flag */ +#define RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) /*!< Low-Power reset flag */ + +#ifdef STM32F10X_CL +/******************* Bit definition for RCC_AHBRSTR register ****************/ + #define RCC_AHBRSTR_OTGFSRST ((uint32_t)0x00001000) /*!< USB OTG FS reset */ + #define RCC_AHBRSTR_ETHMACRST ((uint32_t)0x00004000) /*!< ETHERNET MAC reset */ + +/******************* Bit definition for RCC_CFGR2 register ******************/ +/*!< PREDIV1 configuration */ + #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ + #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ + #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + + #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ + #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ + #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ + #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ + #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ + #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ + #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ + #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ + #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ + #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ + #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ + #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ + #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ + #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ + #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ + #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ + +/*!< PREDIV2 configuration */ + #define RCC_CFGR2_PREDIV2 ((uint32_t)0x000000F0) /*!< PREDIV2[3:0] bits */ + #define RCC_CFGR2_PREDIV2_0 ((uint32_t)0x00000010) /*!< Bit 0 */ + #define RCC_CFGR2_PREDIV2_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + #define RCC_CFGR2_PREDIV2_2 ((uint32_t)0x00000040) /*!< Bit 2 */ + #define RCC_CFGR2_PREDIV2_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + + #define RCC_CFGR2_PREDIV2_DIV1 ((uint32_t)0x00000000) /*!< PREDIV2 input clock not divided */ + #define RCC_CFGR2_PREDIV2_DIV2 ((uint32_t)0x00000010) /*!< PREDIV2 input clock divided by 2 */ + #define RCC_CFGR2_PREDIV2_DIV3 ((uint32_t)0x00000020) /*!< PREDIV2 input clock divided by 3 */ + #define RCC_CFGR2_PREDIV2_DIV4 ((uint32_t)0x00000030) /*!< PREDIV2 input clock divided by 4 */ + #define RCC_CFGR2_PREDIV2_DIV5 ((uint32_t)0x00000040) /*!< PREDIV2 input clock divided by 5 */ + #define RCC_CFGR2_PREDIV2_DIV6 ((uint32_t)0x00000050) /*!< PREDIV2 input clock divided by 6 */ + #define RCC_CFGR2_PREDIV2_DIV7 ((uint32_t)0x00000060) /*!< PREDIV2 input clock divided by 7 */ + #define RCC_CFGR2_PREDIV2_DIV8 ((uint32_t)0x00000070) /*!< PREDIV2 input clock divided by 8 */ + #define RCC_CFGR2_PREDIV2_DIV9 ((uint32_t)0x00000080) /*!< PREDIV2 input clock divided by 9 */ + #define RCC_CFGR2_PREDIV2_DIV10 ((uint32_t)0x00000090) /*!< PREDIV2 input clock divided by 10 */ + #define RCC_CFGR2_PREDIV2_DIV11 ((uint32_t)0x000000A0) /*!< PREDIV2 input clock divided by 11 */ + #define RCC_CFGR2_PREDIV2_DIV12 ((uint32_t)0x000000B0) /*!< PREDIV2 input clock divided by 12 */ + #define RCC_CFGR2_PREDIV2_DIV13 ((uint32_t)0x000000C0) /*!< PREDIV2 input clock divided by 13 */ + #define RCC_CFGR2_PREDIV2_DIV14 ((uint32_t)0x000000D0) /*!< PREDIV2 input clock divided by 14 */ + #define RCC_CFGR2_PREDIV2_DIV15 ((uint32_t)0x000000E0) /*!< PREDIV2 input clock divided by 15 */ + #define RCC_CFGR2_PREDIV2_DIV16 ((uint32_t)0x000000F0) /*!< PREDIV2 input clock divided by 16 */ + +/*!< PLL2MUL configuration */ + #define RCC_CFGR2_PLL2MUL ((uint32_t)0x00000F00) /*!< PLL2MUL[3:0] bits */ + #define RCC_CFGR2_PLL2MUL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ + #define RCC_CFGR2_PLL2MUL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + #define RCC_CFGR2_PLL2MUL_2 ((uint32_t)0x00000400) /*!< Bit 2 */ + #define RCC_CFGR2_PLL2MUL_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + + #define RCC_CFGR2_PLL2MUL8 ((uint32_t)0x00000600) /*!< PLL2 input clock * 8 */ + #define RCC_CFGR2_PLL2MUL9 ((uint32_t)0x00000700) /*!< PLL2 input clock * 9 */ + #define RCC_CFGR2_PLL2MUL10 ((uint32_t)0x00000800) /*!< PLL2 input clock * 10 */ + #define RCC_CFGR2_PLL2MUL11 ((uint32_t)0x00000900) /*!< PLL2 input clock * 11 */ + #define RCC_CFGR2_PLL2MUL12 ((uint32_t)0x00000A00) /*!< PLL2 input clock * 12 */ + #define RCC_CFGR2_PLL2MUL13 ((uint32_t)0x00000B00) /*!< PLL2 input clock * 13 */ + #define RCC_CFGR2_PLL2MUL14 ((uint32_t)0x00000C00) /*!< PLL2 input clock * 14 */ + #define RCC_CFGR2_PLL2MUL16 ((uint32_t)0x00000E00) /*!< PLL2 input clock * 16 */ + #define RCC_CFGR2_PLL2MUL20 ((uint32_t)0x00000F00) /*!< PLL2 input clock * 20 */ + +/*!< PLL3MUL configuration */ + #define RCC_CFGR2_PLL3MUL ((uint32_t)0x0000F000) /*!< PLL3MUL[3:0] bits */ + #define RCC_CFGR2_PLL3MUL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ + #define RCC_CFGR2_PLL3MUL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ + #define RCC_CFGR2_PLL3MUL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + #define RCC_CFGR2_PLL3MUL_3 ((uint32_t)0x00008000) /*!< Bit 3 */ + + #define RCC_CFGR2_PLL3MUL8 ((uint32_t)0x00006000) /*!< PLL3 input clock * 8 */ + #define RCC_CFGR2_PLL3MUL9 ((uint32_t)0x00007000) /*!< PLL3 input clock * 9 */ + #define RCC_CFGR2_PLL3MUL10 ((uint32_t)0x00008000) /*!< PLL3 input clock * 10 */ + #define RCC_CFGR2_PLL3MUL11 ((uint32_t)0x00009000) /*!< PLL3 input clock * 11 */ + #define RCC_CFGR2_PLL3MUL12 ((uint32_t)0x0000A000) /*!< PLL3 input clock * 12 */ + #define RCC_CFGR2_PLL3MUL13 ((uint32_t)0x0000B000) /*!< PLL3 input clock * 13 */ + #define RCC_CFGR2_PLL3MUL14 ((uint32_t)0x0000C000) /*!< PLL3 input clock * 14 */ + #define RCC_CFGR2_PLL3MUL16 ((uint32_t)0x0000E000) /*!< PLL3 input clock * 16 */ + #define RCC_CFGR2_PLL3MUL20 ((uint32_t)0x0000F000) /*!< PLL3 input clock * 20 */ + + #define RCC_CFGR2_PREDIV1SRC ((uint32_t)0x00010000) /*!< PREDIV1 entry clock source */ + #define RCC_CFGR2_PREDIV1SRC_PLL2 ((uint32_t)0x00010000) /*!< PLL2 selected as PREDIV1 entry clock source */ + #define RCC_CFGR2_PREDIV1SRC_HSE ((uint32_t)0x00000000) /*!< HSE selected as PREDIV1 entry clock source */ + #define RCC_CFGR2_I2S2SRC ((uint32_t)0x00020000) /*!< I2S2 entry clock source */ + #define RCC_CFGR2_I2S3SRC ((uint32_t)0x00040000) /*!< I2S3 clock source */ +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/******************* Bit definition for RCC_CFGR2 register ******************/ +/*!< PREDIV1 configuration */ + #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ + #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ + #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + + #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ + #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ + #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ + #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ + #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ + #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ + #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ + #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ + #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ + #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ + #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ + #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ + #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ + #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ + #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ + #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ +#endif + +/******************************************************************************/ +/* */ +/* General Purpose and Alternate Function I/O */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for GPIO_CRL register *******************/ +#define GPIO_CRL_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ + +#define GPIO_CRL_MODE0 ((uint32_t)0x00000003) /*!< MODE0[1:0] bits (Port x mode bits, pin 0) */ +#define GPIO_CRL_MODE0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define GPIO_CRL_MODE0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + +#define GPIO_CRL_MODE1 ((uint32_t)0x00000030) /*!< MODE1[1:0] bits (Port x mode bits, pin 1) */ +#define GPIO_CRL_MODE1_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define GPIO_CRL_MODE1_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define GPIO_CRL_MODE2 ((uint32_t)0x00000300) /*!< MODE2[1:0] bits (Port x mode bits, pin 2) */ +#define GPIO_CRL_MODE2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define GPIO_CRL_MODE2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +#define GPIO_CRL_MODE3 ((uint32_t)0x00003000) /*!< MODE3[1:0] bits (Port x mode bits, pin 3) */ +#define GPIO_CRL_MODE3_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define GPIO_CRL_MODE3_1 ((uint32_t)0x00002000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE4 ((uint32_t)0x00030000) /*!< MODE4[1:0] bits (Port x mode bits, pin 4) */ +#define GPIO_CRL_MODE4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define GPIO_CRL_MODE4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE5 ((uint32_t)0x00300000) /*!< MODE5[1:0] bits (Port x mode bits, pin 5) */ +#define GPIO_CRL_MODE5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define GPIO_CRL_MODE5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE6 ((uint32_t)0x03000000) /*!< MODE6[1:0] bits (Port x mode bits, pin 6) */ +#define GPIO_CRL_MODE6_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define GPIO_CRL_MODE6_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE7 ((uint32_t)0x30000000) /*!< MODE7[1:0] bits (Port x mode bits, pin 7) */ +#define GPIO_CRL_MODE7_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define GPIO_CRL_MODE7_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ + +#define GPIO_CRL_CNF0 ((uint32_t)0x0000000C) /*!< CNF0[1:0] bits (Port x configuration bits, pin 0) */ +#define GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define GPIO_CRL_CNF1 ((uint32_t)0x000000C0) /*!< CNF1[1:0] bits (Port x configuration bits, pin 1) */ +#define GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define GPIO_CRL_CNF2 ((uint32_t)0x00000C00) /*!< CNF2[1:0] bits (Port x configuration bits, pin 2) */ +#define GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) /*!< Bit 1 */ + +#define GPIO_CRL_CNF3 ((uint32_t)0x0000C000) /*!< CNF3[1:0] bits (Port x configuration bits, pin 3) */ +#define GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) /*!< Bit 0 */ +#define GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF4 ((uint32_t)0x000C0000) /*!< CNF4[1:0] bits (Port x configuration bits, pin 4) */ +#define GPIO_CRL_CNF4_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define GPIO_CRL_CNF4_1 ((uint32_t)0x00080000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF5 ((uint32_t)0x00C00000) /*!< CNF5[1:0] bits (Port x configuration bits, pin 5) */ +#define GPIO_CRL_CNF5_0 ((uint32_t)0x00400000) /*!< Bit 0 */ +#define GPIO_CRL_CNF5_1 ((uint32_t)0x00800000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF6 ((uint32_t)0x0C000000) /*!< CNF6[1:0] bits (Port x configuration bits, pin 6) */ +#define GPIO_CRL_CNF6_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define GPIO_CRL_CNF6_1 ((uint32_t)0x08000000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF7 ((uint32_t)0xC0000000) /*!< CNF7[1:0] bits (Port x configuration bits, pin 7) */ +#define GPIO_CRL_CNF7_0 ((uint32_t)0x40000000) /*!< Bit 0 */ +#define GPIO_CRL_CNF7_1 ((uint32_t)0x80000000) /*!< Bit 1 */ + +/******************* Bit definition for GPIO_CRH register *******************/ +#define GPIO_CRH_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ + +#define GPIO_CRH_MODE8 ((uint32_t)0x00000003) /*!< MODE8[1:0] bits (Port x mode bits, pin 8) */ +#define GPIO_CRH_MODE8_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define GPIO_CRH_MODE8_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + +#define GPIO_CRH_MODE9 ((uint32_t)0x00000030) /*!< MODE9[1:0] bits (Port x mode bits, pin 9) */ +#define GPIO_CRH_MODE9_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define GPIO_CRH_MODE9_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define GPIO_CRH_MODE10 ((uint32_t)0x00000300) /*!< MODE10[1:0] bits (Port x mode bits, pin 10) */ +#define GPIO_CRH_MODE10_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define GPIO_CRH_MODE10_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +#define GPIO_CRH_MODE11 ((uint32_t)0x00003000) /*!< MODE11[1:0] bits (Port x mode bits, pin 11) */ +#define GPIO_CRH_MODE11_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define GPIO_CRH_MODE11_1 ((uint32_t)0x00002000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE12 ((uint32_t)0x00030000) /*!< MODE12[1:0] bits (Port x mode bits, pin 12) */ +#define GPIO_CRH_MODE12_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define GPIO_CRH_MODE12_1 ((uint32_t)0x00020000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE13 ((uint32_t)0x00300000) /*!< MODE13[1:0] bits (Port x mode bits, pin 13) */ +#define GPIO_CRH_MODE13_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define GPIO_CRH_MODE13_1 ((uint32_t)0x00200000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE14 ((uint32_t)0x03000000) /*!< MODE14[1:0] bits (Port x mode bits, pin 14) */ +#define GPIO_CRH_MODE14_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define GPIO_CRH_MODE14_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE15 ((uint32_t)0x30000000) /*!< MODE15[1:0] bits (Port x mode bits, pin 15) */ +#define GPIO_CRH_MODE15_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define GPIO_CRH_MODE15_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ + +#define GPIO_CRH_CNF8 ((uint32_t)0x0000000C) /*!< CNF8[1:0] bits (Port x configuration bits, pin 8) */ +#define GPIO_CRH_CNF8_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define GPIO_CRH_CNF8_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define GPIO_CRH_CNF9 ((uint32_t)0x000000C0) /*!< CNF9[1:0] bits (Port x configuration bits, pin 9) */ +#define GPIO_CRH_CNF9_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define GPIO_CRH_CNF9_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define GPIO_CRH_CNF10 ((uint32_t)0x00000C00) /*!< CNF10[1:0] bits (Port x configuration bits, pin 10) */ +#define GPIO_CRH_CNF10_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define GPIO_CRH_CNF10_1 ((uint32_t)0x00000800) /*!< Bit 1 */ + +#define GPIO_CRH_CNF11 ((uint32_t)0x0000C000) /*!< CNF11[1:0] bits (Port x configuration bits, pin 11) */ +#define GPIO_CRH_CNF11_0 ((uint32_t)0x00004000) /*!< Bit 0 */ +#define GPIO_CRH_CNF11_1 ((uint32_t)0x00008000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF12 ((uint32_t)0x000C0000) /*!< CNF12[1:0] bits (Port x configuration bits, pin 12) */ +#define GPIO_CRH_CNF12_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define GPIO_CRH_CNF12_1 ((uint32_t)0x00080000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF13 ((uint32_t)0x00C00000) /*!< CNF13[1:0] bits (Port x configuration bits, pin 13) */ +#define GPIO_CRH_CNF13_0 ((uint32_t)0x00400000) /*!< Bit 0 */ +#define GPIO_CRH_CNF13_1 ((uint32_t)0x00800000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF14 ((uint32_t)0x0C000000) /*!< CNF14[1:0] bits (Port x configuration bits, pin 14) */ +#define GPIO_CRH_CNF14_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define GPIO_CRH_CNF14_1 ((uint32_t)0x08000000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF15 ((uint32_t)0xC0000000) /*!< CNF15[1:0] bits (Port x configuration bits, pin 15) */ +#define GPIO_CRH_CNF15_0 ((uint32_t)0x40000000) /*!< Bit 0 */ +#define GPIO_CRH_CNF15_1 ((uint32_t)0x80000000) /*!< Bit 1 */ + +/*!<****************** Bit definition for GPIO_IDR register *******************/ +#define GPIO_IDR_IDR0 ((uint16_t)0x0001) /*!< Port input data, bit 0 */ +#define GPIO_IDR_IDR1 ((uint16_t)0x0002) /*!< Port input data, bit 1 */ +#define GPIO_IDR_IDR2 ((uint16_t)0x0004) /*!< Port input data, bit 2 */ +#define GPIO_IDR_IDR3 ((uint16_t)0x0008) /*!< Port input data, bit 3 */ +#define GPIO_IDR_IDR4 ((uint16_t)0x0010) /*!< Port input data, bit 4 */ +#define GPIO_IDR_IDR5 ((uint16_t)0x0020) /*!< Port input data, bit 5 */ +#define GPIO_IDR_IDR6 ((uint16_t)0x0040) /*!< Port input data, bit 6 */ +#define GPIO_IDR_IDR7 ((uint16_t)0x0080) /*!< Port input data, bit 7 */ +#define GPIO_IDR_IDR8 ((uint16_t)0x0100) /*!< Port input data, bit 8 */ +#define GPIO_IDR_IDR9 ((uint16_t)0x0200) /*!< Port input data, bit 9 */ +#define GPIO_IDR_IDR10 ((uint16_t)0x0400) /*!< Port input data, bit 10 */ +#define GPIO_IDR_IDR11 ((uint16_t)0x0800) /*!< Port input data, bit 11 */ +#define GPIO_IDR_IDR12 ((uint16_t)0x1000) /*!< Port input data, bit 12 */ +#define GPIO_IDR_IDR13 ((uint16_t)0x2000) /*!< Port input data, bit 13 */ +#define GPIO_IDR_IDR14 ((uint16_t)0x4000) /*!< Port input data, bit 14 */ +#define GPIO_IDR_IDR15 ((uint16_t)0x8000) /*!< Port input data, bit 15 */ + +/******************* Bit definition for GPIO_ODR register *******************/ +#define GPIO_ODR_ODR0 ((uint16_t)0x0001) /*!< Port output data, bit 0 */ +#define GPIO_ODR_ODR1 ((uint16_t)0x0002) /*!< Port output data, bit 1 */ +#define GPIO_ODR_ODR2 ((uint16_t)0x0004) /*!< Port output data, bit 2 */ +#define GPIO_ODR_ODR3 ((uint16_t)0x0008) /*!< Port output data, bit 3 */ +#define GPIO_ODR_ODR4 ((uint16_t)0x0010) /*!< Port output data, bit 4 */ +#define GPIO_ODR_ODR5 ((uint16_t)0x0020) /*!< Port output data, bit 5 */ +#define GPIO_ODR_ODR6 ((uint16_t)0x0040) /*!< Port output data, bit 6 */ +#define GPIO_ODR_ODR7 ((uint16_t)0x0080) /*!< Port output data, bit 7 */ +#define GPIO_ODR_ODR8 ((uint16_t)0x0100) /*!< Port output data, bit 8 */ +#define GPIO_ODR_ODR9 ((uint16_t)0x0200) /*!< Port output data, bit 9 */ +#define GPIO_ODR_ODR10 ((uint16_t)0x0400) /*!< Port output data, bit 10 */ +#define GPIO_ODR_ODR11 ((uint16_t)0x0800) /*!< Port output data, bit 11 */ +#define GPIO_ODR_ODR12 ((uint16_t)0x1000) /*!< Port output data, bit 12 */ +#define GPIO_ODR_ODR13 ((uint16_t)0x2000) /*!< Port output data, bit 13 */ +#define GPIO_ODR_ODR14 ((uint16_t)0x4000) /*!< Port output data, bit 14 */ +#define GPIO_ODR_ODR15 ((uint16_t)0x8000) /*!< Port output data, bit 15 */ + +/****************** Bit definition for GPIO_BSRR register *******************/ +#define GPIO_BSRR_BS0 ((uint32_t)0x00000001) /*!< Port x Set bit 0 */ +#define GPIO_BSRR_BS1 ((uint32_t)0x00000002) /*!< Port x Set bit 1 */ +#define GPIO_BSRR_BS2 ((uint32_t)0x00000004) /*!< Port x Set bit 2 */ +#define GPIO_BSRR_BS3 ((uint32_t)0x00000008) /*!< Port x Set bit 3 */ +#define GPIO_BSRR_BS4 ((uint32_t)0x00000010) /*!< Port x Set bit 4 */ +#define GPIO_BSRR_BS5 ((uint32_t)0x00000020) /*!< Port x Set bit 5 */ +#define GPIO_BSRR_BS6 ((uint32_t)0x00000040) /*!< Port x Set bit 6 */ +#define GPIO_BSRR_BS7 ((uint32_t)0x00000080) /*!< Port x Set bit 7 */ +#define GPIO_BSRR_BS8 ((uint32_t)0x00000100) /*!< Port x Set bit 8 */ +#define GPIO_BSRR_BS9 ((uint32_t)0x00000200) /*!< Port x Set bit 9 */ +#define GPIO_BSRR_BS10 ((uint32_t)0x00000400) /*!< Port x Set bit 10 */ +#define GPIO_BSRR_BS11 ((uint32_t)0x00000800) /*!< Port x Set bit 11 */ +#define GPIO_BSRR_BS12 ((uint32_t)0x00001000) /*!< Port x Set bit 12 */ +#define GPIO_BSRR_BS13 ((uint32_t)0x00002000) /*!< Port x Set bit 13 */ +#define GPIO_BSRR_BS14 ((uint32_t)0x00004000) /*!< Port x Set bit 14 */ +#define GPIO_BSRR_BS15 ((uint32_t)0x00008000) /*!< Port x Set bit 15 */ + +#define GPIO_BSRR_BR0 ((uint32_t)0x00010000) /*!< Port x Reset bit 0 */ +#define GPIO_BSRR_BR1 ((uint32_t)0x00020000) /*!< Port x Reset bit 1 */ +#define GPIO_BSRR_BR2 ((uint32_t)0x00040000) /*!< Port x Reset bit 2 */ +#define GPIO_BSRR_BR3 ((uint32_t)0x00080000) /*!< Port x Reset bit 3 */ +#define GPIO_BSRR_BR4 ((uint32_t)0x00100000) /*!< Port x Reset bit 4 */ +#define GPIO_BSRR_BR5 ((uint32_t)0x00200000) /*!< Port x Reset bit 5 */ +#define GPIO_BSRR_BR6 ((uint32_t)0x00400000) /*!< Port x Reset bit 6 */ +#define GPIO_BSRR_BR7 ((uint32_t)0x00800000) /*!< Port x Reset bit 7 */ +#define GPIO_BSRR_BR8 ((uint32_t)0x01000000) /*!< Port x Reset bit 8 */ +#define GPIO_BSRR_BR9 ((uint32_t)0x02000000) /*!< Port x Reset bit 9 */ +#define GPIO_BSRR_BR10 ((uint32_t)0x04000000) /*!< Port x Reset bit 10 */ +#define GPIO_BSRR_BR11 ((uint32_t)0x08000000) /*!< Port x Reset bit 11 */ +#define GPIO_BSRR_BR12 ((uint32_t)0x10000000) /*!< Port x Reset bit 12 */ +#define GPIO_BSRR_BR13 ((uint32_t)0x20000000) /*!< Port x Reset bit 13 */ +#define GPIO_BSRR_BR14 ((uint32_t)0x40000000) /*!< Port x Reset bit 14 */ +#define GPIO_BSRR_BR15 ((uint32_t)0x80000000) /*!< Port x Reset bit 15 */ + +/******************* Bit definition for GPIO_BRR register *******************/ +#define GPIO_BRR_BR0 ((uint16_t)0x0001) /*!< Port x Reset bit 0 */ +#define GPIO_BRR_BR1 ((uint16_t)0x0002) /*!< Port x Reset bit 1 */ +#define GPIO_BRR_BR2 ((uint16_t)0x0004) /*!< Port x Reset bit 2 */ +#define GPIO_BRR_BR3 ((uint16_t)0x0008) /*!< Port x Reset bit 3 */ +#define GPIO_BRR_BR4 ((uint16_t)0x0010) /*!< Port x Reset bit 4 */ +#define GPIO_BRR_BR5 ((uint16_t)0x0020) /*!< Port x Reset bit 5 */ +#define GPIO_BRR_BR6 ((uint16_t)0x0040) /*!< Port x Reset bit 6 */ +#define GPIO_BRR_BR7 ((uint16_t)0x0080) /*!< Port x Reset bit 7 */ +#define GPIO_BRR_BR8 ((uint16_t)0x0100) /*!< Port x Reset bit 8 */ +#define GPIO_BRR_BR9 ((uint16_t)0x0200) /*!< Port x Reset bit 9 */ +#define GPIO_BRR_BR10 ((uint16_t)0x0400) /*!< Port x Reset bit 10 */ +#define GPIO_BRR_BR11 ((uint16_t)0x0800) /*!< Port x Reset bit 11 */ +#define GPIO_BRR_BR12 ((uint16_t)0x1000) /*!< Port x Reset bit 12 */ +#define GPIO_BRR_BR13 ((uint16_t)0x2000) /*!< Port x Reset bit 13 */ +#define GPIO_BRR_BR14 ((uint16_t)0x4000) /*!< Port x Reset bit 14 */ +#define GPIO_BRR_BR15 ((uint16_t)0x8000) /*!< Port x Reset bit 15 */ + +/****************** Bit definition for GPIO_LCKR register *******************/ +#define GPIO_LCKR_LCK0 ((uint32_t)0x00000001) /*!< Port x Lock bit 0 */ +#define GPIO_LCKR_LCK1 ((uint32_t)0x00000002) /*!< Port x Lock bit 1 */ +#define GPIO_LCKR_LCK2 ((uint32_t)0x00000004) /*!< Port x Lock bit 2 */ +#define GPIO_LCKR_LCK3 ((uint32_t)0x00000008) /*!< Port x Lock bit 3 */ +#define GPIO_LCKR_LCK4 ((uint32_t)0x00000010) /*!< Port x Lock bit 4 */ +#define GPIO_LCKR_LCK5 ((uint32_t)0x00000020) /*!< Port x Lock bit 5 */ +#define GPIO_LCKR_LCK6 ((uint32_t)0x00000040) /*!< Port x Lock bit 6 */ +#define GPIO_LCKR_LCK7 ((uint32_t)0x00000080) /*!< Port x Lock bit 7 */ +#define GPIO_LCKR_LCK8 ((uint32_t)0x00000100) /*!< Port x Lock bit 8 */ +#define GPIO_LCKR_LCK9 ((uint32_t)0x00000200) /*!< Port x Lock bit 9 */ +#define GPIO_LCKR_LCK10 ((uint32_t)0x00000400) /*!< Port x Lock bit 10 */ +#define GPIO_LCKR_LCK11 ((uint32_t)0x00000800) /*!< Port x Lock bit 11 */ +#define GPIO_LCKR_LCK12 ((uint32_t)0x00001000) /*!< Port x Lock bit 12 */ +#define GPIO_LCKR_LCK13 ((uint32_t)0x00002000) /*!< Port x Lock bit 13 */ +#define GPIO_LCKR_LCK14 ((uint32_t)0x00004000) /*!< Port x Lock bit 14 */ +#define GPIO_LCKR_LCK15 ((uint32_t)0x00008000) /*!< Port x Lock bit 15 */ +#define GPIO_LCKR_LCKK ((uint32_t)0x00010000) /*!< Lock key */ + +/*----------------------------------------------------------------------------*/ + +/****************** Bit definition for AFIO_EVCR register *******************/ +#define AFIO_EVCR_PIN ((uint8_t)0x0F) /*!< PIN[3:0] bits (Pin selection) */ +#define AFIO_EVCR_PIN_0 ((uint8_t)0x01) /*!< Bit 0 */ +#define AFIO_EVCR_PIN_1 ((uint8_t)0x02) /*!< Bit 1 */ +#define AFIO_EVCR_PIN_2 ((uint8_t)0x04) /*!< Bit 2 */ +#define AFIO_EVCR_PIN_3 ((uint8_t)0x08) /*!< Bit 3 */ + +/*!< PIN configuration */ +#define AFIO_EVCR_PIN_PX0 ((uint8_t)0x00) /*!< Pin 0 selected */ +#define AFIO_EVCR_PIN_PX1 ((uint8_t)0x01) /*!< Pin 1 selected */ +#define AFIO_EVCR_PIN_PX2 ((uint8_t)0x02) /*!< Pin 2 selected */ +#define AFIO_EVCR_PIN_PX3 ((uint8_t)0x03) /*!< Pin 3 selected */ +#define AFIO_EVCR_PIN_PX4 ((uint8_t)0x04) /*!< Pin 4 selected */ +#define AFIO_EVCR_PIN_PX5 ((uint8_t)0x05) /*!< Pin 5 selected */ +#define AFIO_EVCR_PIN_PX6 ((uint8_t)0x06) /*!< Pin 6 selected */ +#define AFIO_EVCR_PIN_PX7 ((uint8_t)0x07) /*!< Pin 7 selected */ +#define AFIO_EVCR_PIN_PX8 ((uint8_t)0x08) /*!< Pin 8 selected */ +#define AFIO_EVCR_PIN_PX9 ((uint8_t)0x09) /*!< Pin 9 selected */ +#define AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A) /*!< Pin 10 selected */ +#define AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B) /*!< Pin 11 selected */ +#define AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C) /*!< Pin 12 selected */ +#define AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D) /*!< Pin 13 selected */ +#define AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E) /*!< Pin 14 selected */ +#define AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F) /*!< Pin 15 selected */ + +#define AFIO_EVCR_PORT ((uint8_t)0x70) /*!< PORT[2:0] bits (Port selection) */ +#define AFIO_EVCR_PORT_0 ((uint8_t)0x10) /*!< Bit 0 */ +#define AFIO_EVCR_PORT_1 ((uint8_t)0x20) /*!< Bit 1 */ +#define AFIO_EVCR_PORT_2 ((uint8_t)0x40) /*!< Bit 2 */ + +/*!< PORT configuration */ +#define AFIO_EVCR_PORT_PA ((uint8_t)0x00) /*!< Port A selected */ +#define AFIO_EVCR_PORT_PB ((uint8_t)0x10) /*!< Port B selected */ +#define AFIO_EVCR_PORT_PC ((uint8_t)0x20) /*!< Port C selected */ +#define AFIO_EVCR_PORT_PD ((uint8_t)0x30) /*!< Port D selected */ +#define AFIO_EVCR_PORT_PE ((uint8_t)0x40) /*!< Port E selected */ + +#define AFIO_EVCR_EVOE ((uint8_t)0x80) /*!< Event Output Enable */ + +/****************** Bit definition for AFIO_MAPR register *******************/ +#define AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001) /*!< SPI1 remapping */ +#define AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002) /*!< I2C1 remapping */ +#define AFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004) /*!< USART1 remapping */ +#define AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008) /*!< USART2 remapping */ + +#define AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030) /*!< USART3_REMAP[1:0] bits (USART3 remapping) */ +#define AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +/* USART3_REMAP configuration */ +#define AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */ +#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) /*!< Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */ +#define AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) /*!< Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */ + +#define AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0) /*!< TIM1_REMAP[1:0] bits (TIM1 remapping) */ +#define AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +/*!< TIM1_REMAP configuration */ +#define AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15) */ +#define AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) /*!< Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1) */ +#define AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) /*!< Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12) */ + +#define AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300) /*!< TIM2_REMAP[1:0] bits (TIM2 remapping) */ +#define AFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define AFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +/*!< TIM2_REMAP configuration */ +#define AFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3) */ +#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) /*!< Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3) */ +#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) /*!< Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11) */ +#define AFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) /*!< Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11) */ + +#define AFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00) /*!< TIM3_REMAP[1:0] bits (TIM3 remapping) */ +#define AFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define AFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800) /*!< Bit 1 */ + +/*!< TIM3_REMAP configuration */ +#define AFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1) */ +#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) /*!< Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1) */ +#define AFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ + +#define AFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000) /*!< TIM4_REMAP bit (TIM4 remapping) */ + +#define AFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000) /*!< CAN_REMAP[1:0] bits (CAN Alternate function remapping) */ +#define AFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define AFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000) /*!< Bit 1 */ + +/*!< CAN_REMAP configuration */ +#define AFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) /*!< CANRX mapped to PA11, CANTX mapped to PA12 */ +#define AFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) /*!< CANRX mapped to PB8, CANTX mapped to PB9 */ +#define AFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) /*!< CANRX mapped to PD0, CANTX mapped to PD1 */ + +#define AFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000) /*!< Port D0/Port D1 mapping on OSC_IN/OSC_OUT */ +#define AFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000) /*!< TIM5 Channel4 Internal Remap */ +#define AFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) /*!< ADC 1 External Trigger Injected Conversion remapping */ +#define AFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) /*!< ADC 1 External Trigger Regular Conversion remapping */ +#define AFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) /*!< ADC 2 External Trigger Injected Conversion remapping */ +#define AFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) /*!< ADC 2 External Trigger Regular Conversion remapping */ + +/*!< SWJ_CFG configuration */ +#define AFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000) /*!< SWJ_CFG[2:0] bits (Serial Wire JTAG configuration) */ +#define AFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define AFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define AFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + +#define AFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000) /*!< Full SWJ (JTAG-DP + SW-DP) : Reset State */ +#define AFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) /*!< Full SWJ (JTAG-DP + SW-DP) but without JNTRST */ +#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) /*!< JTAG-DP Disabled and SW-DP Enabled */ +#define AFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000) /*!< JTAG-DP Disabled and SW-DP Disabled */ + +#ifdef STM32F10X_CL +/*!< ETH_REMAP configuration */ + #define AFIO_MAPR_ETH_REMAP ((uint32_t)0x00200000) /*!< SPI3_REMAP bit (Ethernet MAC I/O remapping) */ + +/*!< CAN2_REMAP configuration */ + #define AFIO_MAPR_CAN2_REMAP ((uint32_t)0x00400000) /*!< CAN2_REMAP bit (CAN2 I/O remapping) */ + +/*!< MII_RMII_SEL configuration */ + #define AFIO_MAPR_MII_RMII_SEL ((uint32_t)0x00800000) /*!< MII_RMII_SEL bit (Ethernet MII or RMII selection) */ + +/*!< SPI3_REMAP configuration */ + #define AFIO_MAPR_SPI3_REMAP ((uint32_t)0x10000000) /*!< SPI3_REMAP bit (SPI3 remapping) */ + +/*!< TIM2ITR1_IREMAP configuration */ + #define AFIO_MAPR_TIM2ITR1_IREMAP ((uint32_t)0x20000000) /*!< TIM2ITR1_IREMAP bit (TIM2 internal trigger 1 remapping) */ + +/*!< PTP_PPS_REMAP configuration */ + #define AFIO_MAPR_PTP_PPS_REMAP ((uint32_t)0x40000000) /*!< PTP_PPS_REMAP bit (Ethernet PTP PPS remapping) */ +#endif + +/***************** Bit definition for AFIO_EXTICR1 register *****************/ +#define AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) /*!< EXTI 0 configuration */ +#define AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) /*!< EXTI 1 configuration */ +#define AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) /*!< EXTI 2 configuration */ +#define AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) /*!< EXTI 3 configuration */ + +/*!< EXTI0 configuration */ +#define AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) /*!< PA[0] pin */ +#define AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) /*!< PB[0] pin */ +#define AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) /*!< PC[0] pin */ +#define AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) /*!< PD[0] pin */ +#define AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) /*!< PE[0] pin */ +#define AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) /*!< PF[0] pin */ +#define AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) /*!< PG[0] pin */ + +/*!< EXTI1 configuration */ +#define AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) /*!< PA[1] pin */ +#define AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) /*!< PB[1] pin */ +#define AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) /*!< PC[1] pin */ +#define AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) /*!< PD[1] pin */ +#define AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) /*!< PE[1] pin */ +#define AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) /*!< PF[1] pin */ +#define AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) /*!< PG[1] pin */ + +/*!< EXTI2 configuration */ +#define AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) /*!< PA[2] pin */ +#define AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) /*!< PB[2] pin */ +#define AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) /*!< PC[2] pin */ +#define AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) /*!< PD[2] pin */ +#define AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) /*!< PE[2] pin */ +#define AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) /*!< PF[2] pin */ +#define AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) /*!< PG[2] pin */ + +/*!< EXTI3 configuration */ +#define AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) /*!< PA[3] pin */ +#define AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) /*!< PB[3] pin */ +#define AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) /*!< PC[3] pin */ +#define AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) /*!< PD[3] pin */ +#define AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) /*!< PE[3] pin */ +#define AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) /*!< PF[3] pin */ +#define AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) /*!< PG[3] pin */ + +/***************** Bit definition for AFIO_EXTICR2 register *****************/ +#define AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) /*!< EXTI 4 configuration */ +#define AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) /*!< EXTI 5 configuration */ +#define AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) /*!< EXTI 6 configuration */ +#define AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) /*!< EXTI 7 configuration */ + +/*!< EXTI4 configuration */ +#define AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) /*!< PA[4] pin */ +#define AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) /*!< PB[4] pin */ +#define AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) /*!< PC[4] pin */ +#define AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) /*!< PD[4] pin */ +#define AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) /*!< PE[4] pin */ +#define AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) /*!< PF[4] pin */ +#define AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) /*!< PG[4] pin */ + +/* EXTI5 configuration */ +#define AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) /*!< PA[5] pin */ +#define AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) /*!< PB[5] pin */ +#define AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) /*!< PC[5] pin */ +#define AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) /*!< PD[5] pin */ +#define AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) /*!< PE[5] pin */ +#define AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) /*!< PF[5] pin */ +#define AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) /*!< PG[5] pin */ + +/*!< EXTI6 configuration */ +#define AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) /*!< PA[6] pin */ +#define AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) /*!< PB[6] pin */ +#define AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) /*!< PC[6] pin */ +#define AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) /*!< PD[6] pin */ +#define AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) /*!< PE[6] pin */ +#define AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) /*!< PF[6] pin */ +#define AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) /*!< PG[6] pin */ + +/*!< EXTI7 configuration */ +#define AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) /*!< PA[7] pin */ +#define AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) /*!< PB[7] pin */ +#define AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) /*!< PC[7] pin */ +#define AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) /*!< PD[7] pin */ +#define AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) /*!< PE[7] pin */ +#define AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) /*!< PF[7] pin */ +#define AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) /*!< PG[7] pin */ + +/***************** Bit definition for AFIO_EXTICR3 register *****************/ +#define AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) /*!< EXTI 8 configuration */ +#define AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) /*!< EXTI 9 configuration */ +#define AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) /*!< EXTI 10 configuration */ +#define AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) /*!< EXTI 11 configuration */ + +/*!< EXTI8 configuration */ +#define AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) /*!< PA[8] pin */ +#define AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) /*!< PB[8] pin */ +#define AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) /*!< PC[8] pin */ +#define AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) /*!< PD[8] pin */ +#define AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) /*!< PE[8] pin */ +#define AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) /*!< PF[8] pin */ +#define AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) /*!< PG[8] pin */ + +/*!< EXTI9 configuration */ +#define AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) /*!< PA[9] pin */ +#define AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) /*!< PB[9] pin */ +#define AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) /*!< PC[9] pin */ +#define AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) /*!< PD[9] pin */ +#define AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) /*!< PE[9] pin */ +#define AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) /*!< PF[9] pin */ +#define AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) /*!< PG[9] pin */ + +/*!< EXTI10 configuration */ +#define AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) /*!< PA[10] pin */ +#define AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) /*!< PB[10] pin */ +#define AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) /*!< PC[10] pin */ +#define AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) /*!< PD[10] pin */ +#define AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) /*!< PE[10] pin */ +#define AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) /*!< PF[10] pin */ +#define AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) /*!< PG[10] pin */ + +/*!< EXTI11 configuration */ +#define AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) /*!< PA[11] pin */ +#define AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) /*!< PB[11] pin */ +#define AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) /*!< PC[11] pin */ +#define AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) /*!< PD[11] pin */ +#define AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) /*!< PE[11] pin */ +#define AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) /*!< PF[11] pin */ +#define AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) /*!< PG[11] pin */ + +/***************** Bit definition for AFIO_EXTICR4 register *****************/ +#define AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) /*!< EXTI 12 configuration */ +#define AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) /*!< EXTI 13 configuration */ +#define AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) /*!< EXTI 14 configuration */ +#define AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) /*!< EXTI 15 configuration */ + +/* EXTI12 configuration */ +#define AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) /*!< PA[12] pin */ +#define AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) /*!< PB[12] pin */ +#define AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) /*!< PC[12] pin */ +#define AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) /*!< PD[12] pin */ +#define AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) /*!< PE[12] pin */ +#define AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) /*!< PF[12] pin */ +#define AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) /*!< PG[12] pin */ + +/* EXTI13 configuration */ +#define AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) /*!< PA[13] pin */ +#define AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) /*!< PB[13] pin */ +#define AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) /*!< PC[13] pin */ +#define AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) /*!< PD[13] pin */ +#define AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) /*!< PE[13] pin */ +#define AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) /*!< PF[13] pin */ +#define AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) /*!< PG[13] pin */ + +/*!< EXTI14 configuration */ +#define AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) /*!< PA[14] pin */ +#define AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) /*!< PB[14] pin */ +#define AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) /*!< PC[14] pin */ +#define AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) /*!< PD[14] pin */ +#define AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) /*!< PE[14] pin */ +#define AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) /*!< PF[14] pin */ +#define AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) /*!< PG[14] pin */ + +/*!< EXTI15 configuration */ +#define AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) /*!< PA[15] pin */ +#define AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) /*!< PB[15] pin */ +#define AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) /*!< PC[15] pin */ +#define AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) /*!< PD[15] pin */ +#define AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) /*!< PE[15] pin */ +#define AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) /*!< PF[15] pin */ +#define AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) /*!< PG[15] pin */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/****************** Bit definition for AFIO_MAPR2 register ******************/ +#define AFIO_MAPR2_TIM15_REMAP ((uint32_t)0x00000001) /*!< TIM15 remapping */ +#define AFIO_MAPR2_TIM16_REMAP ((uint32_t)0x00000002) /*!< TIM16 remapping */ +#define AFIO_MAPR2_TIM17_REMAP ((uint32_t)0x00000004) /*!< TIM17 remapping */ +#define AFIO_MAPR2_CEC_REMAP ((uint32_t)0x00000008) /*!< CEC remapping */ +#define AFIO_MAPR2_TIM1_DMA_REMAP ((uint32_t)0x00000010) /*!< TIM1_DMA remapping */ +#endif + +#ifdef STM32F10X_HD_VL +#define AFIO_MAPR2_TIM13_REMAP ((uint32_t)0x00000100) /*!< TIM13 remapping */ +#define AFIO_MAPR2_TIM14_REMAP ((uint32_t)0x00000200) /*!< TIM14 remapping */ +#define AFIO_MAPR2_FSMC_NADV_REMAP ((uint32_t)0x00000400) /*!< FSMC NADV remapping */ +#define AFIO_MAPR2_TIM67_DAC_DMA_REMAP ((uint32_t)0x00000800) /*!< TIM6/TIM7 and DAC DMA remapping */ +#define AFIO_MAPR2_TIM12_REMAP ((uint32_t)0x00001000) /*!< TIM12 remapping */ +#define AFIO_MAPR2_MISC_REMAP ((uint32_t)0x00002000) /*!< Miscellaneous remapping */ +#endif + +#ifdef STM32F10X_XL +/****************** Bit definition for AFIO_MAPR2 register ******************/ +#define AFIO_MAPR2_TIM9_REMAP ((uint32_t)0x00000020) /*!< TIM9 remapping */ +#define AFIO_MAPR2_TIM10_REMAP ((uint32_t)0x00000040) /*!< TIM10 remapping */ +#define AFIO_MAPR2_TIM11_REMAP ((uint32_t)0x00000080) /*!< TIM11 remapping */ +#define AFIO_MAPR2_TIM13_REMAP ((uint32_t)0x00000100) /*!< TIM13 remapping */ +#define AFIO_MAPR2_TIM14_REMAP ((uint32_t)0x00000200) /*!< TIM14 remapping */ +#define AFIO_MAPR2_FSMC_NADV_REMAP ((uint32_t)0x00000400) /*!< FSMC NADV remapping */ +#endif + +/******************************************************************************/ +/* */ +/* SystemTick */ +/* */ +/******************************************************************************/ + +/***************** Bit definition for SysTick_CTRL register *****************/ +#define SysTick_CTRL_ENABLE ((uint32_t)0x00000001) /*!< Counter enable */ +#define SysTick_CTRL_TICKINT ((uint32_t)0x00000002) /*!< Counting down to 0 pends the SysTick handler */ +#define SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004) /*!< Clock source */ +#define SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000) /*!< Count Flag */ + +/***************** Bit definition for SysTick_LOAD register *****************/ +#define SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF) /*!< Value to load into the SysTick Current Value Register when the counter reaches 0 */ + +/***************** Bit definition for SysTick_VAL register ******************/ +#define SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF) /*!< Current value at the time the register is accessed */ + +/***************** Bit definition for SysTick_CALIB register ****************/ +#define SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF) /*!< Reload value to use for 10ms timing */ +#define SysTick_CALIB_SKEW ((uint32_t)0x40000000) /*!< Calibration value is not exactly 10 ms */ +#define SysTick_CALIB_NOREF ((uint32_t)0x80000000) /*!< The reference clock is not provided */ + +/******************************************************************************/ +/* */ +/* Nested Vectored Interrupt Controller */ +/* */ +/******************************************************************************/ + +/****************** Bit definition for NVIC_ISER register *******************/ +#define NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt set enable bits */ +#define NVIC_ISER_SETENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ISER_SETENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ISER_SETENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ISER_SETENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ISER_SETENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ISER_SETENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ISER_SETENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ISER_SETENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ISER_SETENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ISER_SETENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ISER_SETENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ISER_SETENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ISER_SETENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ISER_SETENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ISER_SETENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ISER_SETENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ISER_SETENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ISER_SETENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ISER_SETENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ISER_SETENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ISER_SETENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ISER_SETENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ISER_SETENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ISER_SETENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ISER_SETENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ISER_SETENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ISER_SETENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ISER_SETENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ISER_SETENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ISER_SETENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ISER_SETENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ISER_SETENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_ICER register *******************/ +#define NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-enable bits */ +#define NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_ISPR register *******************/ +#define NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt set-pending bits */ +#define NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_ICPR register *******************/ +#define NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-pending bits */ +#define NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_IABR register *******************/ +#define NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF) /*!< Interrupt active flags */ +#define NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_PRI0 register *******************/ +#define NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF) /*!< Priority of interrupt 0 */ +#define NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 1 */ +#define NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 2 */ +#define NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000) /*!< Priority of interrupt 3 */ + +/****************** Bit definition for NVIC_PRI1 register *******************/ +#define NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF) /*!< Priority of interrupt 4 */ +#define NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 5 */ +#define NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 6 */ +#define NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) /*!< Priority of interrupt 7 */ + +/****************** Bit definition for NVIC_PRI2 register *******************/ +#define NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF) /*!< Priority of interrupt 8 */ +#define NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 9 */ +#define NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 10 */ +#define NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000) /*!< Priority of interrupt 11 */ + +/****************** Bit definition for NVIC_PRI3 register *******************/ +#define NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF) /*!< Priority of interrupt 12 */ +#define NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 13 */ +#define NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 14 */ +#define NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000) /*!< Priority of interrupt 15 */ + +/****************** Bit definition for NVIC_PRI4 register *******************/ +#define NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF) /*!< Priority of interrupt 16 */ +#define NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 17 */ +#define NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 18 */ +#define NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000) /*!< Priority of interrupt 19 */ + +/****************** Bit definition for NVIC_PRI5 register *******************/ +#define NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF) /*!< Priority of interrupt 20 */ +#define NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 21 */ +#define NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 22 */ +#define NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000) /*!< Priority of interrupt 23 */ + +/****************** Bit definition for NVIC_PRI6 register *******************/ +#define NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF) /*!< Priority of interrupt 24 */ +#define NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 25 */ +#define NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 26 */ +#define NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000) /*!< Priority of interrupt 27 */ + +/****************** Bit definition for NVIC_PRI7 register *******************/ +#define NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF) /*!< Priority of interrupt 28 */ +#define NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 29 */ +#define NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 30 */ +#define NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000) /*!< Priority of interrupt 31 */ + +/****************** Bit definition for SCB_CPUID register *******************/ +#define SCB_CPUID_REVISION ((uint32_t)0x0000000F) /*!< Implementation defined revision number */ +#define SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0) /*!< Number of processor within family */ +#define SCB_CPUID_Constant ((uint32_t)0x000F0000) /*!< Reads as 0x0F */ +#define SCB_CPUID_VARIANT ((uint32_t)0x00F00000) /*!< Implementation defined variant number */ +#define SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000) /*!< Implementer code. ARM is 0x41 */ + +/******************* Bit definition for SCB_ICSR register *******************/ +#define SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF) /*!< Active ISR number field */ +#define SCB_ICSR_RETTOBASE ((uint32_t)0x00000800) /*!< All active exceptions minus the IPSR_current_exception yields the empty set */ +#define SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000) /*!< Pending ISR number field */ +#define SCB_ICSR_ISRPENDING ((uint32_t)0x00400000) /*!< Interrupt pending flag */ +#define SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000) /*!< It indicates that a pending interrupt becomes active in the next running cycle */ +#define SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000) /*!< Clear pending SysTick bit */ +#define SCB_ICSR_PENDSTSET ((uint32_t)0x04000000) /*!< Set pending SysTick bit */ +#define SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000) /*!< Clear pending pendSV bit */ +#define SCB_ICSR_PENDSVSET ((uint32_t)0x10000000) /*!< Set pending pendSV bit */ +#define SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000) /*!< Set pending NMI bit */ + +/******************* Bit definition for SCB_VTOR register *******************/ +#define SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80) /*!< Vector table base offset field */ +#define SCB_VTOR_TBLBASE ((uint32_t)0x20000000) /*!< Table base in code(0) or RAM(1) */ + +/*!<***************** Bit definition for SCB_AIRCR register *******************/ +#define SCB_AIRCR_VECTRESET ((uint32_t)0x00000001) /*!< System Reset bit */ +#define SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002) /*!< Clear active vector bit */ +#define SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004) /*!< Requests chip control logic to generate a reset */ + +#define SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700) /*!< PRIGROUP[2:0] bits (Priority group) */ +#define SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400) /*!< Bit 2 */ + +/* prority group configuration */ +#define SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000) /*!< Priority group=0 (7 bits of pre-emption priority, 1 bit of subpriority) */ +#define SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100) /*!< Priority group=1 (6 bits of pre-emption priority, 2 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200) /*!< Priority group=2 (5 bits of pre-emption priority, 3 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300) /*!< Priority group=3 (4 bits of pre-emption priority, 4 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400) /*!< Priority group=4 (3 bits of pre-emption priority, 5 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500) /*!< Priority group=5 (2 bits of pre-emption priority, 6 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600) /*!< Priority group=6 (1 bit of pre-emption priority, 7 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700) /*!< Priority group=7 (no pre-emption priority, 8 bits of subpriority) */ + +#define SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000) /*!< Data endianness bit */ +#define SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000) /*!< Register key (VECTKEY) - Reads as 0xFA05 (VECTKEYSTAT) */ + +/******************* Bit definition for SCB_SCR register ********************/ +#define SCB_SCR_SLEEPONEXIT ((uint8_t)0x02) /*!< Sleep on exit bit */ +#define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ +#define SCB_SCR_SEVONPEND ((uint8_t)0x10) /*!< Wake up from WFE */ + +/******************** Bit definition for SCB_CCR register *******************/ +#define SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001) /*!< Thread mode can be entered from any level in Handler mode by controlled return value */ +#define SCB_CCR_USERSETMPEND ((uint16_t)0x0002) /*!< Enables user code to write the Software Trigger Interrupt register to trigger (pend) a Main exception */ +#define SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008) /*!< Trap for unaligned access */ +#define SCB_CCR_DIV_0_TRP ((uint16_t)0x0010) /*!< Trap on Divide by 0 */ +#define SCB_CCR_BFHFNMIGN ((uint16_t)0x0100) /*!< Handlers running at priority -1 and -2 */ +#define SCB_CCR_STKALIGN ((uint16_t)0x0200) /*!< On exception entry, the SP used prior to the exception is adjusted to be 8-byte aligned */ + +/******************* Bit definition for SCB_SHPR register ********************/ +#define SCB_SHPR_PRI_N ((uint32_t)0x000000FF) /*!< Priority of system handler 4,8, and 12. Mem Manage, reserved and Debug Monitor */ +#define SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00) /*!< Priority of system handler 5,9, and 13. Bus Fault, reserved and reserved */ +#define SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000) /*!< Priority of system handler 6,10, and 14. Usage Fault, reserved and PendSV */ +#define SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000) /*!< Priority of system handler 7,11, and 15. Reserved, SVCall and SysTick */ + +/****************** Bit definition for SCB_SHCSR register *******************/ +#define SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001) /*!< MemManage is active */ +#define SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002) /*!< BusFault is active */ +#define SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008) /*!< UsageFault is active */ +#define SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080) /*!< SVCall is active */ +#define SCB_SHCSR_MONITORACT ((uint32_t)0x00000100) /*!< Monitor is active */ +#define SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400) /*!< PendSV is active */ +#define SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800) /*!< SysTick is active */ +#define SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000) /*!< Usage Fault is pended */ +#define SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000) /*!< MemManage is pended */ +#define SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000) /*!< Bus Fault is pended */ +#define SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000) /*!< SVCall is pended */ +#define SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000) /*!< MemManage enable */ +#define SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000) /*!< Bus Fault enable */ +#define SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000) /*!< UsageFault enable */ + +/******************* Bit definition for SCB_CFSR register *******************/ +/*!< MFSR */ +#define SCB_CFSR_IACCVIOL ((uint32_t)0x00000001) /*!< Instruction access violation */ +#define SCB_CFSR_DACCVIOL ((uint32_t)0x00000002) /*!< Data access violation */ +#define SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008) /*!< Unstacking error */ +#define SCB_CFSR_MSTKERR ((uint32_t)0x00000010) /*!< Stacking error */ +#define SCB_CFSR_MMARVALID ((uint32_t)0x00000080) /*!< Memory Manage Address Register address valid flag */ +/*!< BFSR */ +#define SCB_CFSR_IBUSERR ((uint32_t)0x00000100) /*!< Instruction bus error flag */ +#define SCB_CFSR_PRECISERR ((uint32_t)0x00000200) /*!< Precise data bus error */ +#define SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400) /*!< Imprecise data bus error */ +#define SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) /*!< Unstacking error */ +#define SCB_CFSR_STKERR ((uint32_t)0x00001000) /*!< Stacking error */ +#define SCB_CFSR_BFARVALID ((uint32_t)0x00008000) /*!< Bus Fault Address Register address valid flag */ +/*!< UFSR */ +#define SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000) /*!< The processor attempt to execute an undefined instruction */ +#define SCB_CFSR_INVSTATE ((uint32_t)0x00020000) /*!< Invalid combination of EPSR and instruction */ +#define SCB_CFSR_INVPC ((uint32_t)0x00040000) /*!< Attempt to load EXC_RETURN into pc illegally */ +#define SCB_CFSR_NOCP ((uint32_t)0x00080000) /*!< Attempt to use a coprocessor instruction */ +#define SCB_CFSR_UNALIGNED ((uint32_t)0x01000000) /*!< Fault occurs when there is an attempt to make an unaligned memory access */ +#define SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000) /*!< Fault occurs when SDIV or DIV instruction is used with a divisor of 0 */ + +/******************* Bit definition for SCB_HFSR register *******************/ +#define SCB_HFSR_VECTTBL ((uint32_t)0x00000002) /*!< Fault occurs because of vector table read on exception processing */ +#define SCB_HFSR_FORCED ((uint32_t)0x40000000) /*!< Hard Fault activated when a configurable Fault was received and cannot activate */ +#define SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000) /*!< Fault related to debug */ + +/******************* Bit definition for SCB_DFSR register *******************/ +#define SCB_DFSR_HALTED ((uint8_t)0x01) /*!< Halt request flag */ +#define SCB_DFSR_BKPT ((uint8_t)0x02) /*!< BKPT flag */ +#define SCB_DFSR_DWTTRAP ((uint8_t)0x04) /*!< Data Watchpoint and Trace (DWT) flag */ +#define SCB_DFSR_VCATCH ((uint8_t)0x08) /*!< Vector catch flag */ +#define SCB_DFSR_EXTERNAL ((uint8_t)0x10) /*!< External debug request flag */ + +/******************* Bit definition for SCB_MMFAR register ******************/ +#define SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Mem Manage fault address field */ + +/******************* Bit definition for SCB_BFAR register *******************/ +#define SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Bus fault address field */ + +/******************* Bit definition for SCB_afsr register *******************/ +#define SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF) /*!< Implementation defined */ + +/******************************************************************************/ +/* */ +/* External Interrupt/Event Controller */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for EXTI_IMR register *******************/ +#define EXTI_IMR_MR0 ((uint32_t)0x00000001) /*!< Interrupt Mask on line 0 */ +#define EXTI_IMR_MR1 ((uint32_t)0x00000002) /*!< Interrupt Mask on line 1 */ +#define EXTI_IMR_MR2 ((uint32_t)0x00000004) /*!< Interrupt Mask on line 2 */ +#define EXTI_IMR_MR3 ((uint32_t)0x00000008) /*!< Interrupt Mask on line 3 */ +#define EXTI_IMR_MR4 ((uint32_t)0x00000010) /*!< Interrupt Mask on line 4 */ +#define EXTI_IMR_MR5 ((uint32_t)0x00000020) /*!< Interrupt Mask on line 5 */ +#define EXTI_IMR_MR6 ((uint32_t)0x00000040) /*!< Interrupt Mask on line 6 */ +#define EXTI_IMR_MR7 ((uint32_t)0x00000080) /*!< Interrupt Mask on line 7 */ +#define EXTI_IMR_MR8 ((uint32_t)0x00000100) /*!< Interrupt Mask on line 8 */ +#define EXTI_IMR_MR9 ((uint32_t)0x00000200) /*!< Interrupt Mask on line 9 */ +#define EXTI_IMR_MR10 ((uint32_t)0x00000400) /*!< Interrupt Mask on line 10 */ +#define EXTI_IMR_MR11 ((uint32_t)0x00000800) /*!< Interrupt Mask on line 11 */ +#define EXTI_IMR_MR12 ((uint32_t)0x00001000) /*!< Interrupt Mask on line 12 */ +#define EXTI_IMR_MR13 ((uint32_t)0x00002000) /*!< Interrupt Mask on line 13 */ +#define EXTI_IMR_MR14 ((uint32_t)0x00004000) /*!< Interrupt Mask on line 14 */ +#define EXTI_IMR_MR15 ((uint32_t)0x00008000) /*!< Interrupt Mask on line 15 */ +#define EXTI_IMR_MR16 ((uint32_t)0x00010000) /*!< Interrupt Mask on line 16 */ +#define EXTI_IMR_MR17 ((uint32_t)0x00020000) /*!< Interrupt Mask on line 17 */ +#define EXTI_IMR_MR18 ((uint32_t)0x00040000) /*!< Interrupt Mask on line 18 */ +#define EXTI_IMR_MR19 ((uint32_t)0x00080000) /*!< Interrupt Mask on line 19 */ + +/******************* Bit definition for EXTI_EMR register *******************/ +#define EXTI_EMR_MR0 ((uint32_t)0x00000001) /*!< Event Mask on line 0 */ +#define EXTI_EMR_MR1 ((uint32_t)0x00000002) /*!< Event Mask on line 1 */ +#define EXTI_EMR_MR2 ((uint32_t)0x00000004) /*!< Event Mask on line 2 */ +#define EXTI_EMR_MR3 ((uint32_t)0x00000008) /*!< Event Mask on line 3 */ +#define EXTI_EMR_MR4 ((uint32_t)0x00000010) /*!< Event Mask on line 4 */ +#define EXTI_EMR_MR5 ((uint32_t)0x00000020) /*!< Event Mask on line 5 */ +#define EXTI_EMR_MR6 ((uint32_t)0x00000040) /*!< Event Mask on line 6 */ +#define EXTI_EMR_MR7 ((uint32_t)0x00000080) /*!< Event Mask on line 7 */ +#define EXTI_EMR_MR8 ((uint32_t)0x00000100) /*!< Event Mask on line 8 */ +#define EXTI_EMR_MR9 ((uint32_t)0x00000200) /*!< Event Mask on line 9 */ +#define EXTI_EMR_MR10 ((uint32_t)0x00000400) /*!< Event Mask on line 10 */ +#define EXTI_EMR_MR11 ((uint32_t)0x00000800) /*!< Event Mask on line 11 */ +#define EXTI_EMR_MR12 ((uint32_t)0x00001000) /*!< Event Mask on line 12 */ +#define EXTI_EMR_MR13 ((uint32_t)0x00002000) /*!< Event Mask on line 13 */ +#define EXTI_EMR_MR14 ((uint32_t)0x00004000) /*!< Event Mask on line 14 */ +#define EXTI_EMR_MR15 ((uint32_t)0x00008000) /*!< Event Mask on line 15 */ +#define EXTI_EMR_MR16 ((uint32_t)0x00010000) /*!< Event Mask on line 16 */ +#define EXTI_EMR_MR17 ((uint32_t)0x00020000) /*!< Event Mask on line 17 */ +#define EXTI_EMR_MR18 ((uint32_t)0x00040000) /*!< Event Mask on line 18 */ +#define EXTI_EMR_MR19 ((uint32_t)0x00080000) /*!< Event Mask on line 19 */ + +/****************** Bit definition for EXTI_RTSR register *******************/ +#define EXTI_RTSR_TR0 ((uint32_t)0x00000001) /*!< Rising trigger event configuration bit of line 0 */ +#define EXTI_RTSR_TR1 ((uint32_t)0x00000002) /*!< Rising trigger event configuration bit of line 1 */ +#define EXTI_RTSR_TR2 ((uint32_t)0x00000004) /*!< Rising trigger event configuration bit of line 2 */ +#define EXTI_RTSR_TR3 ((uint32_t)0x00000008) /*!< Rising trigger event configuration bit of line 3 */ +#define EXTI_RTSR_TR4 ((uint32_t)0x00000010) /*!< Rising trigger event configuration bit of line 4 */ +#define EXTI_RTSR_TR5 ((uint32_t)0x00000020) /*!< Rising trigger event configuration bit of line 5 */ +#define EXTI_RTSR_TR6 ((uint32_t)0x00000040) /*!< Rising trigger event configuration bit of line 6 */ +#define EXTI_RTSR_TR7 ((uint32_t)0x00000080) /*!< Rising trigger event configuration bit of line 7 */ +#define EXTI_RTSR_TR8 ((uint32_t)0x00000100) /*!< Rising trigger event configuration bit of line 8 */ +#define EXTI_RTSR_TR9 ((uint32_t)0x00000200) /*!< Rising trigger event configuration bit of line 9 */ +#define EXTI_RTSR_TR10 ((uint32_t)0x00000400) /*!< Rising trigger event configuration bit of line 10 */ +#define EXTI_RTSR_TR11 ((uint32_t)0x00000800) /*!< Rising trigger event configuration bit of line 11 */ +#define EXTI_RTSR_TR12 ((uint32_t)0x00001000) /*!< Rising trigger event configuration bit of line 12 */ +#define EXTI_RTSR_TR13 ((uint32_t)0x00002000) /*!< Rising trigger event configuration bit of line 13 */ +#define EXTI_RTSR_TR14 ((uint32_t)0x00004000) /*!< Rising trigger event configuration bit of line 14 */ +#define EXTI_RTSR_TR15 ((uint32_t)0x00008000) /*!< Rising trigger event configuration bit of line 15 */ +#define EXTI_RTSR_TR16 ((uint32_t)0x00010000) /*!< Rising trigger event configuration bit of line 16 */ +#define EXTI_RTSR_TR17 ((uint32_t)0x00020000) /*!< Rising trigger event configuration bit of line 17 */ +#define EXTI_RTSR_TR18 ((uint32_t)0x00040000) /*!< Rising trigger event configuration bit of line 18 */ +#define EXTI_RTSR_TR19 ((uint32_t)0x00080000) /*!< Rising trigger event configuration bit of line 19 */ + +/****************** Bit definition for EXTI_FTSR register *******************/ +#define EXTI_FTSR_TR0 ((uint32_t)0x00000001) /*!< Falling trigger event configuration bit of line 0 */ +#define EXTI_FTSR_TR1 ((uint32_t)0x00000002) /*!< Falling trigger event configuration bit of line 1 */ +#define EXTI_FTSR_TR2 ((uint32_t)0x00000004) /*!< Falling trigger event configuration bit of line 2 */ +#define EXTI_FTSR_TR3 ((uint32_t)0x00000008) /*!< Falling trigger event configuration bit of line 3 */ +#define EXTI_FTSR_TR4 ((uint32_t)0x00000010) /*!< Falling trigger event configuration bit of line 4 */ +#define EXTI_FTSR_TR5 ((uint32_t)0x00000020) /*!< Falling trigger event configuration bit of line 5 */ +#define EXTI_FTSR_TR6 ((uint32_t)0x00000040) /*!< Falling trigger event configuration bit of line 6 */ +#define EXTI_FTSR_TR7 ((uint32_t)0x00000080) /*!< Falling trigger event configuration bit of line 7 */ +#define EXTI_FTSR_TR8 ((uint32_t)0x00000100) /*!< Falling trigger event configuration bit of line 8 */ +#define EXTI_FTSR_TR9 ((uint32_t)0x00000200) /*!< Falling trigger event configuration bit of line 9 */ +#define EXTI_FTSR_TR10 ((uint32_t)0x00000400) /*!< Falling trigger event configuration bit of line 10 */ +#define EXTI_FTSR_TR11 ((uint32_t)0x00000800) /*!< Falling trigger event configuration bit of line 11 */ +#define EXTI_FTSR_TR12 ((uint32_t)0x00001000) /*!< Falling trigger event configuration bit of line 12 */ +#define EXTI_FTSR_TR13 ((uint32_t)0x00002000) /*!< Falling trigger event configuration bit of line 13 */ +#define EXTI_FTSR_TR14 ((uint32_t)0x00004000) /*!< Falling trigger event configuration bit of line 14 */ +#define EXTI_FTSR_TR15 ((uint32_t)0x00008000) /*!< Falling trigger event configuration bit of line 15 */ +#define EXTI_FTSR_TR16 ((uint32_t)0x00010000) /*!< Falling trigger event configuration bit of line 16 */ +#define EXTI_FTSR_TR17 ((uint32_t)0x00020000) /*!< Falling trigger event configuration bit of line 17 */ +#define EXTI_FTSR_TR18 ((uint32_t)0x00040000) /*!< Falling trigger event configuration bit of line 18 */ +#define EXTI_FTSR_TR19 ((uint32_t)0x00080000) /*!< Falling trigger event configuration bit of line 19 */ + +/****************** Bit definition for EXTI_SWIER register ******************/ +#define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) /*!< Software Interrupt on line 0 */ +#define EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) /*!< Software Interrupt on line 1 */ +#define EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) /*!< Software Interrupt on line 2 */ +#define EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) /*!< Software Interrupt on line 3 */ +#define EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) /*!< Software Interrupt on line 4 */ +#define EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) /*!< Software Interrupt on line 5 */ +#define EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) /*!< Software Interrupt on line 6 */ +#define EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) /*!< Software Interrupt on line 7 */ +#define EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) /*!< Software Interrupt on line 8 */ +#define EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) /*!< Software Interrupt on line 9 */ +#define EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) /*!< Software Interrupt on line 10 */ +#define EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) /*!< Software Interrupt on line 11 */ +#define EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) /*!< Software Interrupt on line 12 */ +#define EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) /*!< Software Interrupt on line 13 */ +#define EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) /*!< Software Interrupt on line 14 */ +#define EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) /*!< Software Interrupt on line 15 */ +#define EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) /*!< Software Interrupt on line 16 */ +#define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) /*!< Software Interrupt on line 17 */ +#define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) /*!< Software Interrupt on line 18 */ +#define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) /*!< Software Interrupt on line 19 */ + +/******************* Bit definition for EXTI_PR register ********************/ +#define EXTI_PR_PR0 ((uint32_t)0x00000001) /*!< Pending bit for line 0 */ +#define EXTI_PR_PR1 ((uint32_t)0x00000002) /*!< Pending bit for line 1 */ +#define EXTI_PR_PR2 ((uint32_t)0x00000004) /*!< Pending bit for line 2 */ +#define EXTI_PR_PR3 ((uint32_t)0x00000008) /*!< Pending bit for line 3 */ +#define EXTI_PR_PR4 ((uint32_t)0x00000010) /*!< Pending bit for line 4 */ +#define EXTI_PR_PR5 ((uint32_t)0x00000020) /*!< Pending bit for line 5 */ +#define EXTI_PR_PR6 ((uint32_t)0x00000040) /*!< Pending bit for line 6 */ +#define EXTI_PR_PR7 ((uint32_t)0x00000080) /*!< Pending bit for line 7 */ +#define EXTI_PR_PR8 ((uint32_t)0x00000100) /*!< Pending bit for line 8 */ +#define EXTI_PR_PR9 ((uint32_t)0x00000200) /*!< Pending bit for line 9 */ +#define EXTI_PR_PR10 ((uint32_t)0x00000400) /*!< Pending bit for line 10 */ +#define EXTI_PR_PR11 ((uint32_t)0x00000800) /*!< Pending bit for line 11 */ +#define EXTI_PR_PR12 ((uint32_t)0x00001000) /*!< Pending bit for line 12 */ +#define EXTI_PR_PR13 ((uint32_t)0x00002000) /*!< Pending bit for line 13 */ +#define EXTI_PR_PR14 ((uint32_t)0x00004000) /*!< Pending bit for line 14 */ +#define EXTI_PR_PR15 ((uint32_t)0x00008000) /*!< Pending bit for line 15 */ +#define EXTI_PR_PR16 ((uint32_t)0x00010000) /*!< Pending bit for line 16 */ +#define EXTI_PR_PR17 ((uint32_t)0x00020000) /*!< Pending bit for line 17 */ +#define EXTI_PR_PR18 ((uint32_t)0x00040000) /*!< Pending bit for line 18 */ +#define EXTI_PR_PR19 ((uint32_t)0x00080000) /*!< Pending bit for line 19 */ + +/******************************************************************************/ +/* */ +/* DMA Controller */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for DMA_ISR register ********************/ +#define DMA_ISR_GIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt flag */ +#define DMA_ISR_TCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete flag */ +#define DMA_ISR_HTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer flag */ +#define DMA_ISR_TEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error flag */ +#define DMA_ISR_GIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt flag */ +#define DMA_ISR_TCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete flag */ +#define DMA_ISR_HTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer flag */ +#define DMA_ISR_TEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error flag */ +#define DMA_ISR_GIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt flag */ +#define DMA_ISR_TCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete flag */ +#define DMA_ISR_HTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer flag */ +#define DMA_ISR_TEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error flag */ +#define DMA_ISR_GIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt flag */ +#define DMA_ISR_TCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete flag */ +#define DMA_ISR_HTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer flag */ +#define DMA_ISR_TEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error flag */ +#define DMA_ISR_GIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt flag */ +#define DMA_ISR_TCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete flag */ +#define DMA_ISR_HTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer flag */ +#define DMA_ISR_TEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error flag */ +#define DMA_ISR_GIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt flag */ +#define DMA_ISR_TCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete flag */ +#define DMA_ISR_HTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer flag */ +#define DMA_ISR_TEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error flag */ +#define DMA_ISR_GIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt flag */ +#define DMA_ISR_TCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete flag */ +#define DMA_ISR_HTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer flag */ +#define DMA_ISR_TEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error flag */ + +/******************* Bit definition for DMA_IFCR register *******************/ +#define DMA_IFCR_CGIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt clear */ +#define DMA_IFCR_CTCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete clear */ +#define DMA_IFCR_CHTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer clear */ +#define DMA_IFCR_CTEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error clear */ +#define DMA_IFCR_CGIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt clear */ +#define DMA_IFCR_CTCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete clear */ +#define DMA_IFCR_CHTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer clear */ +#define DMA_IFCR_CTEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error clear */ +#define DMA_IFCR_CGIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt clear */ +#define DMA_IFCR_CTCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete clear */ +#define DMA_IFCR_CHTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer clear */ +#define DMA_IFCR_CTEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error clear */ +#define DMA_IFCR_CGIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt clear */ +#define DMA_IFCR_CTCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete clear */ +#define DMA_IFCR_CHTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer clear */ +#define DMA_IFCR_CTEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error clear */ +#define DMA_IFCR_CGIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt clear */ +#define DMA_IFCR_CTCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete clear */ +#define DMA_IFCR_CHTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer clear */ +#define DMA_IFCR_CTEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error clear */ +#define DMA_IFCR_CGIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt clear */ +#define DMA_IFCR_CTCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete clear */ +#define DMA_IFCR_CHTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer clear */ +#define DMA_IFCR_CTEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error clear */ +#define DMA_IFCR_CGIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt clear */ +#define DMA_IFCR_CTCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete clear */ +#define DMA_IFCR_CHTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer clear */ +#define DMA_IFCR_CTEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error clear */ + +/******************* Bit definition for DMA_CCR1 register *******************/ +#define DMA_CCR1_EN ((uint16_t)0x0001) /*!< Channel enable*/ +#define DMA_CCR1_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR1_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR1_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR1_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR1_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR1_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR1_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR1_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR1_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR1_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR1_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR1_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR1_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR1_PL ((uint16_t)0x3000) /*!< PL[1:0] bits(Channel Priority level) */ +#define DMA_CCR1_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR1_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR1_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/******************* Bit definition for DMA_CCR2 register *******************/ +#define DMA_CCR2_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR2_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR2_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR2_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR2_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR2_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR2_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR2_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR2_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR2_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR2_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR2_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR2_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR2_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR2_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR2_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR2_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR2_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/******************* Bit definition for DMA_CCR3 register *******************/ +#define DMA_CCR3_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR3_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR3_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR3_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR3_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR3_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR3_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR3_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR3_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR3_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR3_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR3_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR3_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR3_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR3_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR3_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR3_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR3_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/*!<****************** Bit definition for DMA_CCR4 register *******************/ +#define DMA_CCR4_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR4_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR4_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR4_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR4_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR4_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR4_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR4_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR4_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR4_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR4_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR4_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR4_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR4_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR4_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR4_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR4_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR4_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/****************** Bit definition for DMA_CCR5 register *******************/ +#define DMA_CCR5_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR5_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR5_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR5_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR5_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR5_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR5_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR5_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR5_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR5_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR5_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR5_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR5_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR5_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR5_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR5_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR5_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR5_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode enable */ + +/******************* Bit definition for DMA_CCR6 register *******************/ +#define DMA_CCR6_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR6_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR6_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR6_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR6_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR6_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR6_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR6_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR6_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR6_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR6_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR6_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR6_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR6_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR6_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR6_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR6_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR6_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/******************* Bit definition for DMA_CCR7 register *******************/ +#define DMA_CCR7_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR7_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR7_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR7_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR7_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR7_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR7_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR7_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR7_PSIZE , ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR7_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR7_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR7_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR7_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR7_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR7_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR7_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR7_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR7_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode enable */ + +/****************** Bit definition for DMA_CNDTR1 register ******************/ +#define DMA_CNDTR1_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR2 register ******************/ +#define DMA_CNDTR2_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR3 register ******************/ +#define DMA_CNDTR3_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR4 register ******************/ +#define DMA_CNDTR4_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR5 register ******************/ +#define DMA_CNDTR5_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR6 register ******************/ +#define DMA_CNDTR6_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR7 register ******************/ +#define DMA_CNDTR7_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CPAR1 register *******************/ +#define DMA_CPAR1_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR2 register *******************/ +#define DMA_CPAR2_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR3 register *******************/ +#define DMA_CPAR3_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + + +/****************** Bit definition for DMA_CPAR4 register *******************/ +#define DMA_CPAR4_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR5 register *******************/ +#define DMA_CPAR5_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR6 register *******************/ +#define DMA_CPAR6_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + + +/****************** Bit definition for DMA_CPAR7 register *******************/ +#define DMA_CPAR7_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CMAR1 register *******************/ +#define DMA_CMAR1_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR2 register *******************/ +#define DMA_CMAR2_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR3 register *******************/ +#define DMA_CMAR3_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + + +/****************** Bit definition for DMA_CMAR4 register *******************/ +#define DMA_CMAR4_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR5 register *******************/ +#define DMA_CMAR5_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR6 register *******************/ +#define DMA_CMAR6_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR7 register *******************/ +#define DMA_CMAR7_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/******************************************************************************/ +/* */ +/* Analog to Digital Converter */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for ADC_SR register ********************/ +#define ADC_SR_AWD ((uint8_t)0x01) /*!< Analog watchdog flag */ +#define ADC_SR_EOC ((uint8_t)0x02) /*!< End of conversion */ +#define ADC_SR_JEOC ((uint8_t)0x04) /*!< Injected channel end of conversion */ +#define ADC_SR_JSTRT ((uint8_t)0x08) /*!< Injected channel Start flag */ +#define ADC_SR_STRT ((uint8_t)0x10) /*!< Regular channel Start flag */ + +/******************* Bit definition for ADC_CR1 register ********************/ +#define ADC_CR1_AWDCH ((uint32_t)0x0000001F) /*!< AWDCH[4:0] bits (Analog watchdog channel select bits) */ +#define ADC_CR1_AWDCH_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_CR1_AWDCH_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_CR1_AWDCH_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_CR1_AWDCH_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_CR1_AWDCH_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_CR1_EOCIE ((uint32_t)0x00000020) /*!< Interrupt enable for EOC */ +#define ADC_CR1_AWDIE ((uint32_t)0x00000040) /*!< Analog Watchdog interrupt enable */ +#define ADC_CR1_JEOCIE ((uint32_t)0x00000080) /*!< Interrupt enable for injected channels */ +#define ADC_CR1_SCAN ((uint32_t)0x00000100) /*!< Scan mode */ +#define ADC_CR1_AWDSGL ((uint32_t)0x00000200) /*!< Enable the watchdog on a single channel in scan mode */ +#define ADC_CR1_JAUTO ((uint32_t)0x00000400) /*!< Automatic injected group conversion */ +#define ADC_CR1_DISCEN ((uint32_t)0x00000800) /*!< Discontinuous mode on regular channels */ +#define ADC_CR1_JDISCEN ((uint32_t)0x00001000) /*!< Discontinuous mode on injected channels */ + +#define ADC_CR1_DISCNUM ((uint32_t)0x0000E000) /*!< DISCNUM[2:0] bits (Discontinuous mode channel count) */ +#define ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000) /*!< Bit 2 */ + +#define ADC_CR1_DUALMOD ((uint32_t)0x000F0000) /*!< DUALMOD[3:0] bits (Dual mode selection) */ +#define ADC_CR1_DUALMOD_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define ADC_CR1_DUALMOD_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define ADC_CR1_DUALMOD_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define ADC_CR1_DUALMOD_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define ADC_CR1_JAWDEN ((uint32_t)0x00400000) /*!< Analog watchdog enable on injected channels */ +#define ADC_CR1_AWDEN ((uint32_t)0x00800000) /*!< Analog watchdog enable on regular channels */ + + +/******************* Bit definition for ADC_CR2 register ********************/ +#define ADC_CR2_ADON ((uint32_t)0x00000001) /*!< A/D Converter ON / OFF */ +#define ADC_CR2_CONT ((uint32_t)0x00000002) /*!< Continuous Conversion */ +#define ADC_CR2_CAL ((uint32_t)0x00000004) /*!< A/D Calibration */ +#define ADC_CR2_RSTCAL ((uint32_t)0x00000008) /*!< Reset Calibration */ +#define ADC_CR2_DMA ((uint32_t)0x00000100) /*!< Direct Memory access mode */ +#define ADC_CR2_ALIGN ((uint32_t)0x00000800) /*!< Data Alignment */ + +#define ADC_CR2_JEXTSEL ((uint32_t)0x00007000) /*!< JEXTSEL[2:0] bits (External event select for injected group) */ +#define ADC_CR2_JEXTSEL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define ADC_CR2_JEXTSEL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ +#define ADC_CR2_JEXTSEL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + +#define ADC_CR2_JEXTTRIG ((uint32_t)0x00008000) /*!< External Trigger Conversion mode for injected channels */ + +#define ADC_CR2_EXTSEL ((uint32_t)0x000E0000) /*!< EXTSEL[2:0] bits (External Event Select for regular group) */ +#define ADC_CR2_EXTSEL_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define ADC_CR2_EXTSEL_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define ADC_CR2_EXTSEL_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +#define ADC_CR2_EXTTRIG ((uint32_t)0x00100000) /*!< External Trigger Conversion mode for regular channels */ +#define ADC_CR2_JSWSTART ((uint32_t)0x00200000) /*!< Start Conversion of injected channels */ +#define ADC_CR2_SWSTART ((uint32_t)0x00400000) /*!< Start Conversion of regular channels */ +#define ADC_CR2_TSVREFE ((uint32_t)0x00800000) /*!< Temperature Sensor and VREFINT Enable */ + +/****************** Bit definition for ADC_SMPR1 register *******************/ +#define ADC_SMPR1_SMP10 ((uint32_t)0x00000007) /*!< SMP10[2:0] bits (Channel 10 Sample time selection) */ +#define ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP11 ((uint32_t)0x00000038) /*!< SMP11[2:0] bits (Channel 11 Sample time selection) */ +#define ADC_SMPR1_SMP11_0 ((uint32_t)0x00000008) /*!< Bit 0 */ +#define ADC_SMPR1_SMP11_1 ((uint32_t)0x00000010) /*!< Bit 1 */ +#define ADC_SMPR1_SMP11_2 ((uint32_t)0x00000020) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP12 ((uint32_t)0x000001C0) /*!< SMP12[2:0] bits (Channel 12 Sample time selection) */ +#define ADC_SMPR1_SMP12_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define ADC_SMPR1_SMP12_1 ((uint32_t)0x00000080) /*!< Bit 1 */ +#define ADC_SMPR1_SMP12_2 ((uint32_t)0x00000100) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP13 ((uint32_t)0x00000E00) /*!< SMP13[2:0] bits (Channel 13 Sample time selection) */ +#define ADC_SMPR1_SMP13_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define ADC_SMPR1_SMP13_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define ADC_SMPR1_SMP13_2 ((uint32_t)0x00000800) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP14 ((uint32_t)0x00007000) /*!< SMP14[2:0] bits (Channel 14 Sample time selection) */ +#define ADC_SMPR1_SMP14_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP14_1 ((uint32_t)0x00002000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP14_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP15 ((uint32_t)0x00038000) /*!< SMP15[2:0] bits (Channel 15 Sample time selection) */ +#define ADC_SMPR1_SMP15_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP15_2 ((uint32_t)0x00020000) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP16 ((uint32_t)0x001C0000) /*!< SMP16[2:0] bits (Channel 16 Sample time selection) */ +#define ADC_SMPR1_SMP16_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP16_1 ((uint32_t)0x00080000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP16_2 ((uint32_t)0x00100000) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP17 ((uint32_t)0x00E00000) /*!< SMP17[2:0] bits (Channel 17 Sample time selection) */ +#define ADC_SMPR1_SMP17_0 ((uint32_t)0x00200000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP17_1 ((uint32_t)0x00400000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP17_2 ((uint32_t)0x00800000) /*!< Bit 2 */ + +/****************** Bit definition for ADC_SMPR2 register *******************/ +#define ADC_SMPR2_SMP0 ((uint32_t)0x00000007) /*!< SMP0[2:0] bits (Channel 0 Sample time selection) */ +#define ADC_SMPR2_SMP0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SMPR2_SMP0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SMPR2_SMP0_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP1 ((uint32_t)0x00000038) /*!< SMP1[2:0] bits (Channel 1 Sample time selection) */ +#define ADC_SMPR2_SMP1_0 ((uint32_t)0x00000008) /*!< Bit 0 */ +#define ADC_SMPR2_SMP1_1 ((uint32_t)0x00000010) /*!< Bit 1 */ +#define ADC_SMPR2_SMP1_2 ((uint32_t)0x00000020) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP2 ((uint32_t)0x000001C0) /*!< SMP2[2:0] bits (Channel 2 Sample time selection) */ +#define ADC_SMPR2_SMP2_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define ADC_SMPR2_SMP2_1 ((uint32_t)0x00000080) /*!< Bit 1 */ +#define ADC_SMPR2_SMP2_2 ((uint32_t)0x00000100) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP3 ((uint32_t)0x00000E00) /*!< SMP3[2:0] bits (Channel 3 Sample time selection) */ +#define ADC_SMPR2_SMP3_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define ADC_SMPR2_SMP3_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP4 ((uint32_t)0x00007000) /*!< SMP4[2:0] bits (Channel 4 Sample time selection) */ +#define ADC_SMPR2_SMP4_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP4_1 ((uint32_t)0x00002000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP4_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP5 ((uint32_t)0x00038000) /*!< SMP5[2:0] bits (Channel 5 Sample time selection) */ +#define ADC_SMPR2_SMP5_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP6 ((uint32_t)0x001C0000) /*!< SMP6[2:0] bits (Channel 6 Sample time selection) */ +#define ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP7 ((uint32_t)0x00E00000) /*!< SMP7[2:0] bits (Channel 7 Sample time selection) */ +#define ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP8 ((uint32_t)0x07000000) /*!< SMP8[2:0] bits (Channel 8 Sample time selection) */ +#define ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP9 ((uint32_t)0x38000000) /*!< SMP9[2:0] bits (Channel 9 Sample time selection) */ +#define ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000) /*!< Bit 2 */ + +/****************** Bit definition for ADC_JOFR1 register *******************/ +#define ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 1 */ + +/****************** Bit definition for ADC_JOFR2 register *******************/ +#define ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 2 */ + +/****************** Bit definition for ADC_JOFR3 register *******************/ +#define ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 3 */ + +/****************** Bit definition for ADC_JOFR4 register *******************/ +#define ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 4 */ + +/******************* Bit definition for ADC_HTR register ********************/ +#define ADC_HTR_HT ((uint16_t)0x0FFF) /*!< Analog watchdog high threshold */ + +/******************* Bit definition for ADC_LTR register ********************/ +#define ADC_LTR_LT ((uint16_t)0x0FFF) /*!< Analog watchdog low threshold */ + +/******************* Bit definition for ADC_SQR1 register *******************/ +#define ADC_SQR1_SQ13 ((uint32_t)0x0000001F) /*!< SQ13[4:0] bits (13th conversion in regular sequence) */ +#define ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_SQR1_SQ14 ((uint32_t)0x000003E0) /*!< SQ14[4:0] bits (14th conversion in regular sequence) */ +#define ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_SQR1_SQ15 ((uint32_t)0x00007C00) /*!< SQ15[4:0] bits (15th conversion in regular sequence) */ +#define ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_SQR1_SQ16 ((uint32_t)0x000F8000) /*!< SQ16[4:0] bits (16th conversion in regular sequence) */ +#define ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_SQR1_L ((uint32_t)0x00F00000) /*!< L[3:0] bits (Regular channel sequence length) */ +#define ADC_SQR1_L_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_SQR1_L_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define ADC_SQR1_L_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define ADC_SQR1_L_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +/******************* Bit definition for ADC_SQR2 register *******************/ +#define ADC_SQR2_SQ7 ((uint32_t)0x0000001F) /*!< SQ7[4:0] bits (7th conversion in regular sequence) */ +#define ADC_SQR2_SQ7_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SQR2_SQ7_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SQR2_SQ7_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_SQR2_SQ7_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_SQR2_SQ7_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_SQR2_SQ8 ((uint32_t)0x000003E0) /*!< SQ8[4:0] bits (8th conversion in regular sequence) */ +#define ADC_SQR2_SQ8_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_SQR2_SQ8_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_SQR2_SQ8_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_SQR2_SQ8_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_SQR2_SQ8_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_SQR2_SQ9 ((uint32_t)0x00007C00) /*!< SQ9[4:0] bits (9th conversion in regular sequence) */ +#define ADC_SQR2_SQ9_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_SQR2_SQ9_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_SQR2_SQ9_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_SQR2_SQ9_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_SQR2_SQ9_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_SQR2_SQ10 ((uint32_t)0x000F8000) /*!< SQ10[4:0] bits (10th conversion in regular sequence) */ +#define ADC_SQR2_SQ10_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SQR2_SQ10_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SQR2_SQ10_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_SQR2_SQ10_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_SQR2_SQ10_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_SQR2_SQ11 ((uint32_t)0x01F00000) /*!< SQ11[4:0] bits (11th conversion in regular sequence) */ +#define ADC_SQR2_SQ11_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_SQR2_SQ11_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define ADC_SQR2_SQ11_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define ADC_SQR2_SQ11_3 ((uint32_t)0x00800000) /*!< Bit 3 */ +#define ADC_SQR2_SQ11_4 ((uint32_t)0x01000000) /*!< Bit 4 */ + +#define ADC_SQR2_SQ12 ((uint32_t)0x3E000000) /*!< SQ12[4:0] bits (12th conversion in regular sequence) */ +#define ADC_SQR2_SQ12_0 ((uint32_t)0x02000000) /*!< Bit 0 */ +#define ADC_SQR2_SQ12_1 ((uint32_t)0x04000000) /*!< Bit 1 */ +#define ADC_SQR2_SQ12_2 ((uint32_t)0x08000000) /*!< Bit 2 */ +#define ADC_SQR2_SQ12_3 ((uint32_t)0x10000000) /*!< Bit 3 */ +#define ADC_SQR2_SQ12_4 ((uint32_t)0x20000000) /*!< Bit 4 */ + +/******************* Bit definition for ADC_SQR3 register *******************/ +#define ADC_SQR3_SQ1 ((uint32_t)0x0000001F) /*!< SQ1[4:0] bits (1st conversion in regular sequence) */ +#define ADC_SQR3_SQ1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SQR3_SQ1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SQR3_SQ1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_SQR3_SQ1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_SQR3_SQ1_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_SQR3_SQ2 ((uint32_t)0x000003E0) /*!< SQ2[4:0] bits (2nd conversion in regular sequence) */ +#define ADC_SQR3_SQ2_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_SQR3_SQ2_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_SQR3_SQ2_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_SQR3_SQ2_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_SQR3_SQ2_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_SQR3_SQ3 ((uint32_t)0x00007C00) /*!< SQ3[4:0] bits (3rd conversion in regular sequence) */ +#define ADC_SQR3_SQ3_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_SQR3_SQ3_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_SQR3_SQ3_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_SQR3_SQ3_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_SQR3_SQ3_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_SQR3_SQ4 ((uint32_t)0x000F8000) /*!< SQ4[4:0] bits (4th conversion in regular sequence) */ +#define ADC_SQR3_SQ4_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SQR3_SQ4_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SQR3_SQ4_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_SQR3_SQ4_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_SQR3_SQ4_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_SQR3_SQ5 ((uint32_t)0x01F00000) /*!< SQ5[4:0] bits (5th conversion in regular sequence) */ +#define ADC_SQR3_SQ5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_SQR3_SQ5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define ADC_SQR3_SQ5_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define ADC_SQR3_SQ5_3 ((uint32_t)0x00800000) /*!< Bit 3 */ +#define ADC_SQR3_SQ5_4 ((uint32_t)0x01000000) /*!< Bit 4 */ + +#define ADC_SQR3_SQ6 ((uint32_t)0x3E000000) /*!< SQ6[4:0] bits (6th conversion in regular sequence) */ +#define ADC_SQR3_SQ6_0 ((uint32_t)0x02000000) /*!< Bit 0 */ +#define ADC_SQR3_SQ6_1 ((uint32_t)0x04000000) /*!< Bit 1 */ +#define ADC_SQR3_SQ6_2 ((uint32_t)0x08000000) /*!< Bit 2 */ +#define ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) /*!< Bit 3 */ +#define ADC_SQR3_SQ6_4 ((uint32_t)0x20000000) /*!< Bit 4 */ + +/******************* Bit definition for ADC_JSQR register *******************/ +#define ADC_JSQR_JSQ1 ((uint32_t)0x0000001F) /*!< JSQ1[4:0] bits (1st conversion in injected sequence) */ +#define ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_JSQR_JSQ2 ((uint32_t)0x000003E0) /*!< JSQ2[4:0] bits (2nd conversion in injected sequence) */ +#define ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_JSQR_JSQ3 ((uint32_t)0x00007C00) /*!< JSQ3[4:0] bits (3rd conversion in injected sequence) */ +#define ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_JSQR_JSQ4 ((uint32_t)0x000F8000) /*!< JSQ4[4:0] bits (4th conversion in injected sequence) */ +#define ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_JSQR_JL ((uint32_t)0x00300000) /*!< JL[1:0] bits (Injected Sequence length) */ +#define ADC_JSQR_JL_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_JSQR_JL_1 ((uint32_t)0x00200000) /*!< Bit 1 */ + +/******************* Bit definition for ADC_JDR1 register *******************/ +#define ADC_JDR1_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************* Bit definition for ADC_JDR2 register *******************/ +#define ADC_JDR2_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************* Bit definition for ADC_JDR3 register *******************/ +#define ADC_JDR3_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************* Bit definition for ADC_JDR4 register *******************/ +#define ADC_JDR4_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************** Bit definition for ADC_DR register ********************/ +#define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!< Regular data */ +#define ADC_DR_ADC2DATA ((uint32_t)0xFFFF0000) /*!< ADC2 data */ + +/******************************************************************************/ +/* */ +/* Digital to Analog Converter */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for DAC_CR register ********************/ +#define DAC_CR_EN1 ((uint32_t)0x00000001) /*!< DAC channel1 enable */ +#define DAC_CR_BOFF1 ((uint32_t)0x00000002) /*!< DAC channel1 output buffer disable */ +#define DAC_CR_TEN1 ((uint32_t)0x00000004) /*!< DAC channel1 Trigger enable */ + +#define DAC_CR_TSEL1 ((uint32_t)0x00000038) /*!< TSEL1[2:0] (DAC channel1 Trigger selection) */ +#define DAC_CR_TSEL1_0 ((uint32_t)0x00000008) /*!< Bit 0 */ +#define DAC_CR_TSEL1_1 ((uint32_t)0x00000010) /*!< Bit 1 */ +#define DAC_CR_TSEL1_2 ((uint32_t)0x00000020) /*!< Bit 2 */ + +#define DAC_CR_WAVE1 ((uint32_t)0x000000C0) /*!< WAVE1[1:0] (DAC channel1 noise/triangle wave generation enable) */ +#define DAC_CR_WAVE1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define DAC_CR_WAVE1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define DAC_CR_MAMP1 ((uint32_t)0x00000F00) /*!< MAMP1[3:0] (DAC channel1 Mask/Amplitude selector) */ +#define DAC_CR_MAMP1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define DAC_CR_MAMP1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define DAC_CR_MAMP1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define DAC_CR_MAMP1_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define DAC_CR_DMAEN1 ((uint32_t)0x00001000) /*!< DAC channel1 DMA enable */ +#define DAC_CR_EN2 ((uint32_t)0x00010000) /*!< DAC channel2 enable */ +#define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!< DAC channel2 output buffer disable */ +#define DAC_CR_TEN2 ((uint32_t)0x00040000) /*!< DAC channel2 Trigger enable */ + +#define DAC_CR_TSEL2 ((uint32_t)0x00380000) /*!< TSEL2[2:0] (DAC channel2 Trigger selection) */ +#define DAC_CR_TSEL2_0 ((uint32_t)0x00080000) /*!< Bit 0 */ +#define DAC_CR_TSEL2_1 ((uint32_t)0x00100000) /*!< Bit 1 */ +#define DAC_CR_TSEL2_2 ((uint32_t)0x00200000) /*!< Bit 2 */ + +#define DAC_CR_WAVE2 ((uint32_t)0x00C00000) /*!< WAVE2[1:0] (DAC channel2 noise/triangle wave generation enable) */ +#define DAC_CR_WAVE2_0 ((uint32_t)0x00400000) /*!< Bit 0 */ +#define DAC_CR_WAVE2_1 ((uint32_t)0x00800000) /*!< Bit 1 */ + +#define DAC_CR_MAMP2 ((uint32_t)0x0F000000) /*!< MAMP2[3:0] (DAC channel2 Mask/Amplitude selector) */ +#define DAC_CR_MAMP2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define DAC_CR_MAMP2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define DAC_CR_MAMP2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define DAC_CR_MAMP2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define DAC_CR_DMAEN2 ((uint32_t)0x10000000) /*!< DAC channel2 DMA enabled */ + +/***************** Bit definition for DAC_SWTRIGR register ******************/ +#define DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) /*!< DAC channel1 software trigger */ +#define DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) /*!< DAC channel2 software trigger */ + +/***************** Bit definition for DAC_DHR12R1 register ******************/ +#define DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) /*!< DAC channel1 12-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12L1 register ******************/ +#define DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) /*!< DAC channel1 12-bit Left aligned data */ + +/****************** Bit definition for DAC_DHR8R1 register ******************/ +#define DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) /*!< DAC channel1 8-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12R2 register ******************/ +#define DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) /*!< DAC channel2 12-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12L2 register ******************/ +#define DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) /*!< DAC channel2 12-bit Left aligned data */ + +/****************** Bit definition for DAC_DHR8R2 register ******************/ +#define DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) /*!< DAC channel2 8-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12RD register ******************/ +#define DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) /*!< DAC channel1 12-bit Right aligned data */ +#define DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) /*!< DAC channel2 12-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12LD register ******************/ +#define DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) /*!< DAC channel1 12-bit Left aligned data */ +#define DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000) /*!< DAC channel2 12-bit Left aligned data */ + +/****************** Bit definition for DAC_DHR8RD register ******************/ +#define DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF) /*!< DAC channel1 8-bit Right aligned data */ +#define DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00) /*!< DAC channel2 8-bit Right aligned data */ + +/******************* Bit definition for DAC_DOR1 register *******************/ +#define DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF) /*!< DAC channel1 data output */ + +/******************* Bit definition for DAC_DOR2 register *******************/ +#define DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF) /*!< DAC channel2 data output */ + +/******************** Bit definition for DAC_SR register ********************/ +#define DAC_SR_DMAUDR1 ((uint32_t)0x00002000) /*!< DAC channel1 DMA underrun flag */ +#define DAC_SR_DMAUDR2 ((uint32_t)0x20000000) /*!< DAC channel2 DMA underrun flag */ + +/******************************************************************************/ +/* */ +/* CEC */ +/* */ +/******************************************************************************/ +/******************** Bit definition for CEC_CFGR register ******************/ +#define CEC_CFGR_PE ((uint16_t)0x0001) /*!< Peripheral Enable */ +#define CEC_CFGR_IE ((uint16_t)0x0002) /*!< Interrupt Enable */ +#define CEC_CFGR_BTEM ((uint16_t)0x0004) /*!< Bit Timing Error Mode */ +#define CEC_CFGR_BPEM ((uint16_t)0x0008) /*!< Bit Period Error Mode */ + +/******************** Bit definition for CEC_OAR register ******************/ +#define CEC_OAR_OA ((uint16_t)0x000F) /*!< OA[3:0]: Own Address */ +#define CEC_OAR_OA_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define CEC_OAR_OA_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define CEC_OAR_OA_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define CEC_OAR_OA_3 ((uint16_t)0x0008) /*!< Bit 3 */ + +/******************** Bit definition for CEC_PRES register ******************/ +#define CEC_PRES_PRES ((uint16_t)0x3FFF) /*!< Prescaler Counter Value */ + +/******************** Bit definition for CEC_ESR register ******************/ +#define CEC_ESR_BTE ((uint16_t)0x0001) /*!< Bit Timing Error */ +#define CEC_ESR_BPE ((uint16_t)0x0002) /*!< Bit Period Error */ +#define CEC_ESR_RBTFE ((uint16_t)0x0004) /*!< Rx Block Transfer Finished Error */ +#define CEC_ESR_SBE ((uint16_t)0x0008) /*!< Start Bit Error */ +#define CEC_ESR_ACKE ((uint16_t)0x0010) /*!< Block Acknowledge Error */ +#define CEC_ESR_LINE ((uint16_t)0x0020) /*!< Line Error */ +#define CEC_ESR_TBTFE ((uint16_t)0x0040) /*!< Tx Block Transfer Finished Error */ + +/******************** Bit definition for CEC_CSR register ******************/ +#define CEC_CSR_TSOM ((uint16_t)0x0001) /*!< Tx Start Of Message */ +#define CEC_CSR_TEOM ((uint16_t)0x0002) /*!< Tx End Of Message */ +#define CEC_CSR_TERR ((uint16_t)0x0004) /*!< Tx Error */ +#define CEC_CSR_TBTRF ((uint16_t)0x0008) /*!< Tx Byte Transfer Request or Block Transfer Finished */ +#define CEC_CSR_RSOM ((uint16_t)0x0010) /*!< Rx Start Of Message */ +#define CEC_CSR_REOM ((uint16_t)0x0020) /*!< Rx End Of Message */ +#define CEC_CSR_RERR ((uint16_t)0x0040) /*!< Rx Error */ +#define CEC_CSR_RBTF ((uint16_t)0x0080) /*!< Rx Block Transfer Finished */ + +/******************** Bit definition for CEC_TXD register ******************/ +#define CEC_TXD_TXD ((uint16_t)0x00FF) /*!< Tx Data register */ + +/******************** Bit definition for CEC_RXD register ******************/ +#define CEC_RXD_RXD ((uint16_t)0x00FF) /*!< Rx Data register */ + +/******************************************************************************/ +/* */ +/* TIM */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for TIM_CR1 register ********************/ +#define TIM_CR1_CEN ((uint16_t)0x0001) /*!< Counter enable */ +#define TIM_CR1_UDIS ((uint16_t)0x0002) /*!< Update disable */ +#define TIM_CR1_URS ((uint16_t)0x0004) /*!< Update request source */ +#define TIM_CR1_OPM ((uint16_t)0x0008) /*!< One pulse mode */ +#define TIM_CR1_DIR ((uint16_t)0x0010) /*!< Direction */ + +#define TIM_CR1_CMS ((uint16_t)0x0060) /*!< CMS[1:0] bits (Center-aligned mode selection) */ +#define TIM_CR1_CMS_0 ((uint16_t)0x0020) /*!< Bit 0 */ +#define TIM_CR1_CMS_1 ((uint16_t)0x0040) /*!< Bit 1 */ + +#define TIM_CR1_ARPE ((uint16_t)0x0080) /*!< Auto-reload preload enable */ + +#define TIM_CR1_CKD ((uint16_t)0x0300) /*!< CKD[1:0] bits (clock division) */ +#define TIM_CR1_CKD_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_CR1_CKD_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +/******************* Bit definition for TIM_CR2 register ********************/ +#define TIM_CR2_CCPC ((uint16_t)0x0001) /*!< Capture/Compare Preloaded Control */ +#define TIM_CR2_CCUS ((uint16_t)0x0004) /*!< Capture/Compare Control Update Selection */ +#define TIM_CR2_CCDS ((uint16_t)0x0008) /*!< Capture/Compare DMA Selection */ + +#define TIM_CR2_MMS ((uint16_t)0x0070) /*!< MMS[2:0] bits (Master Mode Selection) */ +#define TIM_CR2_MMS_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CR2_MMS_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CR2_MMS_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_CR2_TI1S ((uint16_t)0x0080) /*!< TI1 Selection */ +#define TIM_CR2_OIS1 ((uint16_t)0x0100) /*!< Output Idle state 1 (OC1 output) */ +#define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!< Output Idle state 1 (OC1N output) */ +#define TIM_CR2_OIS2 ((uint16_t)0x0400) /*!< Output Idle state 2 (OC2 output) */ +#define TIM_CR2_OIS2N ((uint16_t)0x0800) /*!< Output Idle state 2 (OC2N output) */ +#define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!< Output Idle state 3 (OC3 output) */ +#define TIM_CR2_OIS3N ((uint16_t)0x2000) /*!< Output Idle state 3 (OC3N output) */ +#define TIM_CR2_OIS4 ((uint16_t)0x4000) /*!< Output Idle state 4 (OC4 output) */ + +/******************* Bit definition for TIM_SMCR register *******************/ +#define TIM_SMCR_SMS ((uint16_t)0x0007) /*!< SMS[2:0] bits (Slave mode selection) */ +#define TIM_SMCR_SMS_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_SMCR_SMS_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define TIM_SMCR_SMS_2 ((uint16_t)0x0004) /*!< Bit 2 */ + +#define TIM_SMCR_TS ((uint16_t)0x0070) /*!< TS[2:0] bits (Trigger selection) */ +#define TIM_SMCR_TS_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_SMCR_TS_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_SMCR_TS_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_SMCR_MSM ((uint16_t)0x0080) /*!< Master/slave mode */ + +#define TIM_SMCR_ETF ((uint16_t)0x0F00) /*!< ETF[3:0] bits (External trigger filter) */ +#define TIM_SMCR_ETF_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_SMCR_ETF_1 ((uint16_t)0x0200) /*!< Bit 1 */ +#define TIM_SMCR_ETF_2 ((uint16_t)0x0400) /*!< Bit 2 */ +#define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!< Bit 3 */ + +#define TIM_SMCR_ETPS ((uint16_t)0x3000) /*!< ETPS[1:0] bits (External trigger prescaler) */ +#define TIM_SMCR_ETPS_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_SMCR_ETPS_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define TIM_SMCR_ECE ((uint16_t)0x4000) /*!< External clock enable */ +#define TIM_SMCR_ETP ((uint16_t)0x8000) /*!< External trigger polarity */ + +/******************* Bit definition for TIM_DIER register *******************/ +#define TIM_DIER_UIE ((uint16_t)0x0001) /*!< Update interrupt enable */ +#define TIM_DIER_CC1IE ((uint16_t)0x0002) /*!< Capture/Compare 1 interrupt enable */ +#define TIM_DIER_CC2IE ((uint16_t)0x0004) /*!< Capture/Compare 2 interrupt enable */ +#define TIM_DIER_CC3IE ((uint16_t)0x0008) /*!< Capture/Compare 3 interrupt enable */ +#define TIM_DIER_CC4IE ((uint16_t)0x0010) /*!< Capture/Compare 4 interrupt enable */ +#define TIM_DIER_COMIE ((uint16_t)0x0020) /*!< COM interrupt enable */ +#define TIM_DIER_TIE ((uint16_t)0x0040) /*!< Trigger interrupt enable */ +#define TIM_DIER_BIE ((uint16_t)0x0080) /*!< Break interrupt enable */ +#define TIM_DIER_UDE ((uint16_t)0x0100) /*!< Update DMA request enable */ +#define TIM_DIER_CC1DE ((uint16_t)0x0200) /*!< Capture/Compare 1 DMA request enable */ +#define TIM_DIER_CC2DE ((uint16_t)0x0400) /*!< Capture/Compare 2 DMA request enable */ +#define TIM_DIER_CC3DE ((uint16_t)0x0800) /*!< Capture/Compare 3 DMA request enable */ +#define TIM_DIER_CC4DE ((uint16_t)0x1000) /*!< Capture/Compare 4 DMA request enable */ +#define TIM_DIER_COMDE ((uint16_t)0x2000) /*!< COM DMA request enable */ +#define TIM_DIER_TDE ((uint16_t)0x4000) /*!< Trigger DMA request enable */ + +/******************** Bit definition for TIM_SR register ********************/ +#define TIM_SR_UIF ((uint16_t)0x0001) /*!< Update interrupt Flag */ +#define TIM_SR_CC1IF ((uint16_t)0x0002) /*!< Capture/Compare 1 interrupt Flag */ +#define TIM_SR_CC2IF ((uint16_t)0x0004) /*!< Capture/Compare 2 interrupt Flag */ +#define TIM_SR_CC3IF ((uint16_t)0x0008) /*!< Capture/Compare 3 interrupt Flag */ +#define TIM_SR_CC4IF ((uint16_t)0x0010) /*!< Capture/Compare 4 interrupt Flag */ +#define TIM_SR_COMIF ((uint16_t)0x0020) /*!< COM interrupt Flag */ +#define TIM_SR_TIF ((uint16_t)0x0040) /*!< Trigger interrupt Flag */ +#define TIM_SR_BIF ((uint16_t)0x0080) /*!< Break interrupt Flag */ +#define TIM_SR_CC1OF ((uint16_t)0x0200) /*!< Capture/Compare 1 Overcapture Flag */ +#define TIM_SR_CC2OF ((uint16_t)0x0400) /*!< Capture/Compare 2 Overcapture Flag */ +#define TIM_SR_CC3OF ((uint16_t)0x0800) /*!< Capture/Compare 3 Overcapture Flag */ +#define TIM_SR_CC4OF ((uint16_t)0x1000) /*!< Capture/Compare 4 Overcapture Flag */ + +/******************* Bit definition for TIM_EGR register ********************/ +#define TIM_EGR_UG ((uint8_t)0x01) /*!< Update Generation */ +#define TIM_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation */ +#define TIM_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation */ +#define TIM_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation */ +#define TIM_EGR_CC4G ((uint8_t)0x10) /*!< Capture/Compare 4 Generation */ +#define TIM_EGR_COMG ((uint8_t)0x20) /*!< Capture/Compare Control Update Generation */ +#define TIM_EGR_TG ((uint8_t)0x40) /*!< Trigger Generation */ +#define TIM_EGR_BG ((uint8_t)0x80) /*!< Break Generation */ + +/****************** Bit definition for TIM_CCMR1 register *******************/ +#define TIM_CCMR1_CC1S ((uint16_t)0x0003) /*!< CC1S[1:0] bits (Capture/Compare 1 Selection) */ +#define TIM_CCMR1_CC1S_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_CCMR1_CC1S_1 ((uint16_t)0x0002) /*!< Bit 1 */ + +#define TIM_CCMR1_OC1FE ((uint16_t)0x0004) /*!< Output Compare 1 Fast enable */ +#define TIM_CCMR1_OC1PE ((uint16_t)0x0008) /*!< Output Compare 1 Preload enable */ + +#define TIM_CCMR1_OC1M ((uint16_t)0x0070) /*!< OC1M[2:0] bits (Output Compare 1 Mode) */ +#define TIM_CCMR1_OC1M_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR1_OC1M_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR1_OC1M_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_CCMR1_OC1CE ((uint16_t)0x0080) /*!< Output Compare 1Clear Enable */ + +#define TIM_CCMR1_CC2S ((uint16_t)0x0300) /*!< CC2S[1:0] bits (Capture/Compare 2 Selection) */ +#define TIM_CCMR1_CC2S_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_CCMR1_CC2S_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define TIM_CCMR1_OC2FE ((uint16_t)0x0400) /*!< Output Compare 2 Fast enable */ +#define TIM_CCMR1_OC2PE ((uint16_t)0x0800) /*!< Output Compare 2 Preload enable */ + +#define TIM_CCMR1_OC2M ((uint16_t)0x7000) /*!< OC2M[2:0] bits (Output Compare 2 Mode) */ +#define TIM_CCMR1_OC2M_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR1_OC2M_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR1_OC2M_2 ((uint16_t)0x4000) /*!< Bit 2 */ + +#define TIM_CCMR1_OC2CE ((uint16_t)0x8000) /*!< Output Compare 2 Clear Enable */ + +/*----------------------------------------------------------------------------*/ + +#define TIM_CCMR1_IC1PSC ((uint16_t)0x000C) /*!< IC1PSC[1:0] bits (Input Capture 1 Prescaler) */ +#define TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004) /*!< Bit 0 */ +#define TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008) /*!< Bit 1 */ + +#define TIM_CCMR1_IC1F ((uint16_t)0x00F0) /*!< IC1F[3:0] bits (Input Capture 1 Filter) */ +#define TIM_CCMR1_IC1F_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR1_IC1F_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR1_IC1F_2 ((uint16_t)0x0040) /*!< Bit 2 */ +#define TIM_CCMR1_IC1F_3 ((uint16_t)0x0080) /*!< Bit 3 */ + +#define TIM_CCMR1_IC2PSC ((uint16_t)0x0C00) /*!< IC2PSC[1:0] bits (Input Capture 2 Prescaler) */ +#define TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define TIM_CCMR1_IC2F ((uint16_t)0xF000) /*!< IC2F[3:0] bits (Input Capture 2 Filter) */ +#define TIM_CCMR1_IC2F_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR1_IC2F_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR1_IC2F_2 ((uint16_t)0x4000) /*!< Bit 2 */ +#define TIM_CCMR1_IC2F_3 ((uint16_t)0x8000) /*!< Bit 3 */ + +/****************** Bit definition for TIM_CCMR2 register *******************/ +#define TIM_CCMR2_CC3S ((uint16_t)0x0003) /*!< CC3S[1:0] bits (Capture/Compare 3 Selection) */ +#define TIM_CCMR2_CC3S_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_CCMR2_CC3S_1 ((uint16_t)0x0002) /*!< Bit 1 */ + +#define TIM_CCMR2_OC3FE ((uint16_t)0x0004) /*!< Output Compare 3 Fast enable */ +#define TIM_CCMR2_OC3PE ((uint16_t)0x0008) /*!< Output Compare 3 Preload enable */ + +#define TIM_CCMR2_OC3M ((uint16_t)0x0070) /*!< OC3M[2:0] bits (Output Compare 3 Mode) */ +#define TIM_CCMR2_OC3M_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR2_OC3M_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR2_OC3M_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_CCMR2_OC3CE ((uint16_t)0x0080) /*!< Output Compare 3 Clear Enable */ + +#define TIM_CCMR2_CC4S ((uint16_t)0x0300) /*!< CC4S[1:0] bits (Capture/Compare 4 Selection) */ +#define TIM_CCMR2_CC4S_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_CCMR2_CC4S_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define TIM_CCMR2_OC4FE ((uint16_t)0x0400) /*!< Output Compare 4 Fast enable */ +#define TIM_CCMR2_OC4PE ((uint16_t)0x0800) /*!< Output Compare 4 Preload enable */ + +#define TIM_CCMR2_OC4M ((uint16_t)0x7000) /*!< OC4M[2:0] bits (Output Compare 4 Mode) */ +#define TIM_CCMR2_OC4M_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR2_OC4M_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR2_OC4M_2 ((uint16_t)0x4000) /*!< Bit 2 */ + +#define TIM_CCMR2_OC4CE ((uint16_t)0x8000) /*!< Output Compare 4 Clear Enable */ + +/*----------------------------------------------------------------------------*/ + +#define TIM_CCMR2_IC3PSC ((uint16_t)0x000C) /*!< IC3PSC[1:0] bits (Input Capture 3 Prescaler) */ +#define TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004) /*!< Bit 0 */ +#define TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) /*!< Bit 1 */ + +#define TIM_CCMR2_IC3F ((uint16_t)0x00F0) /*!< IC3F[3:0] bits (Input Capture 3 Filter) */ +#define TIM_CCMR2_IC3F_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR2_IC3F_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR2_IC3F_2 ((uint16_t)0x0040) /*!< Bit 2 */ +#define TIM_CCMR2_IC3F_3 ((uint16_t)0x0080) /*!< Bit 3 */ + +#define TIM_CCMR2_IC4PSC ((uint16_t)0x0C00) /*!< IC4PSC[1:0] bits (Input Capture 4 Prescaler) */ +#define TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define TIM_CCMR2_IC4F ((uint16_t)0xF000) /*!< IC4F[3:0] bits (Input Capture 4 Filter) */ +#define TIM_CCMR2_IC4F_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR2_IC4F_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR2_IC4F_2 ((uint16_t)0x4000) /*!< Bit 2 */ +#define TIM_CCMR2_IC4F_3 ((uint16_t)0x8000) /*!< Bit 3 */ + +/******************* Bit definition for TIM_CCER register *******************/ +#define TIM_CCER_CC1E ((uint16_t)0x0001) /*!< Capture/Compare 1 output enable */ +#define TIM_CCER_CC1P ((uint16_t)0x0002) /*!< Capture/Compare 1 output Polarity */ +#define TIM_CCER_CC1NE ((uint16_t)0x0004) /*!< Capture/Compare 1 Complementary output enable */ +#define TIM_CCER_CC1NP ((uint16_t)0x0008) /*!< Capture/Compare 1 Complementary output Polarity */ +#define TIM_CCER_CC2E ((uint16_t)0x0010) /*!< Capture/Compare 2 output enable */ +#define TIM_CCER_CC2P ((uint16_t)0x0020) /*!< Capture/Compare 2 output Polarity */ +#define TIM_CCER_CC2NE ((uint16_t)0x0040) /*!< Capture/Compare 2 Complementary output enable */ +#define TIM_CCER_CC2NP ((uint16_t)0x0080) /*!< Capture/Compare 2 Complementary output Polarity */ +#define TIM_CCER_CC3E ((uint16_t)0x0100) /*!< Capture/Compare 3 output enable */ +#define TIM_CCER_CC3P ((uint16_t)0x0200) /*!< Capture/Compare 3 output Polarity */ +#define TIM_CCER_CC3NE ((uint16_t)0x0400) /*!< Capture/Compare 3 Complementary output enable */ +#define TIM_CCER_CC3NP ((uint16_t)0x0800) /*!< Capture/Compare 3 Complementary output Polarity */ +#define TIM_CCER_CC4E ((uint16_t)0x1000) /*!< Capture/Compare 4 output enable */ +#define TIM_CCER_CC4P ((uint16_t)0x2000) /*!< Capture/Compare 4 output Polarity */ +#define TIM_CCER_CC4NP ((uint16_t)0x8000) /*!< Capture/Compare 4 Complementary output Polarity */ + +/******************* Bit definition for TIM_CNT register ********************/ +#define TIM_CNT_CNT ((uint16_t)0xFFFF) /*!< Counter Value */ + +/******************* Bit definition for TIM_PSC register ********************/ +#define TIM_PSC_PSC ((uint16_t)0xFFFF) /*!< Prescaler Value */ + +/******************* Bit definition for TIM_ARR register ********************/ +#define TIM_ARR_ARR ((uint16_t)0xFFFF) /*!< actual auto-reload Value */ + +/******************* Bit definition for TIM_RCR register ********************/ +#define TIM_RCR_REP ((uint8_t)0xFF) /*!< Repetition Counter Value */ + +/******************* Bit definition for TIM_CCR1 register *******************/ +#define TIM_CCR1_CCR1 ((uint16_t)0xFFFF) /*!< Capture/Compare 1 Value */ + +/******************* Bit definition for TIM_CCR2 register *******************/ +#define TIM_CCR2_CCR2 ((uint16_t)0xFFFF) /*!< Capture/Compare 2 Value */ + +/******************* Bit definition for TIM_CCR3 register *******************/ +#define TIM_CCR3_CCR3 ((uint16_t)0xFFFF) /*!< Capture/Compare 3 Value */ + +/******************* Bit definition for TIM_CCR4 register *******************/ +#define TIM_CCR4_CCR4 ((uint16_t)0xFFFF) /*!< Capture/Compare 4 Value */ + +/******************* Bit definition for TIM_BDTR register *******************/ +#define TIM_BDTR_DTG ((uint16_t)0x00FF) /*!< DTG[0:7] bits (Dead-Time Generator set-up) */ +#define TIM_BDTR_DTG_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_BDTR_DTG_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define TIM_BDTR_DTG_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define TIM_BDTR_DTG_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define TIM_BDTR_DTG_4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define TIM_BDTR_DTG_5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define TIM_BDTR_DTG_6 ((uint16_t)0x0040) /*!< Bit 6 */ +#define TIM_BDTR_DTG_7 ((uint16_t)0x0080) /*!< Bit 7 */ + +#define TIM_BDTR_LOCK ((uint16_t)0x0300) /*!< LOCK[1:0] bits (Lock Configuration) */ +#define TIM_BDTR_LOCK_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_BDTR_LOCK_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define TIM_BDTR_OSSI ((uint16_t)0x0400) /*!< Off-State Selection for Idle mode */ +#define TIM_BDTR_OSSR ((uint16_t)0x0800) /*!< Off-State Selection for Run mode */ +#define TIM_BDTR_BKE ((uint16_t)0x1000) /*!< Break enable */ +#define TIM_BDTR_BKP ((uint16_t)0x2000) /*!< Break Polarity */ +#define TIM_BDTR_AOE ((uint16_t)0x4000) /*!< Automatic Output enable */ +#define TIM_BDTR_MOE ((uint16_t)0x8000) /*!< Main Output enable */ + +/******************* Bit definition for TIM_DCR register ********************/ +#define TIM_DCR_DBA ((uint16_t)0x001F) /*!< DBA[4:0] bits (DMA Base Address) */ +#define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define TIM_DCR_DBA_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define TIM_DCR_DBA_4 ((uint16_t)0x0010) /*!< Bit 4 */ + +#define TIM_DCR_DBL ((uint16_t)0x1F00) /*!< DBL[4:0] bits (DMA Burst Length) */ +#define TIM_DCR_DBL_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_DCR_DBL_1 ((uint16_t)0x0200) /*!< Bit 1 */ +#define TIM_DCR_DBL_2 ((uint16_t)0x0400) /*!< Bit 2 */ +#define TIM_DCR_DBL_3 ((uint16_t)0x0800) /*!< Bit 3 */ +#define TIM_DCR_DBL_4 ((uint16_t)0x1000) /*!< Bit 4 */ + +/******************* Bit definition for TIM_DMAR register *******************/ +#define TIM_DMAR_DMAB ((uint16_t)0xFFFF) /*!< DMA register for burst accesses */ + +/******************************************************************************/ +/* */ +/* Real-Time Clock */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for RTC_CRH register ********************/ +#define RTC_CRH_SECIE ((uint8_t)0x01) /*!< Second Interrupt Enable */ +#define RTC_CRH_ALRIE ((uint8_t)0x02) /*!< Alarm Interrupt Enable */ +#define RTC_CRH_OWIE ((uint8_t)0x04) /*!< OverfloW Interrupt Enable */ + +/******************* Bit definition for RTC_CRL register ********************/ +#define RTC_CRL_SECF ((uint8_t)0x01) /*!< Second Flag */ +#define RTC_CRL_ALRF ((uint8_t)0x02) /*!< Alarm Flag */ +#define RTC_CRL_OWF ((uint8_t)0x04) /*!< OverfloW Flag */ +#define RTC_CRL_RSF ((uint8_t)0x08) /*!< Registers Synchronized Flag */ +#define RTC_CRL_CNF ((uint8_t)0x10) /*!< Configuration Flag */ +#define RTC_CRL_RTOFF ((uint8_t)0x20) /*!< RTC operation OFF */ + +/******************* Bit definition for RTC_PRLH register *******************/ +#define RTC_PRLH_PRL ((uint16_t)0x000F) /*!< RTC Prescaler Reload Value High */ + +/******************* Bit definition for RTC_PRLL register *******************/ +#define RTC_PRLL_PRL ((uint16_t)0xFFFF) /*!< RTC Prescaler Reload Value Low */ + +/******************* Bit definition for RTC_DIVH register *******************/ +#define RTC_DIVH_RTC_DIV ((uint16_t)0x000F) /*!< RTC Clock Divider High */ + +/******************* Bit definition for RTC_DIVL register *******************/ +#define RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF) /*!< RTC Clock Divider Low */ + +/******************* Bit definition for RTC_CNTH register *******************/ +#define RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF) /*!< RTC Counter High */ + +/******************* Bit definition for RTC_CNTL register *******************/ +#define RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF) /*!< RTC Counter Low */ + +/******************* Bit definition for RTC_ALRH register *******************/ +#define RTC_ALRH_RTC_ALR ((uint16_t)0xFFFF) /*!< RTC Alarm High */ + +/******************* Bit definition for RTC_ALRL register *******************/ +#define RTC_ALRL_RTC_ALR ((uint16_t)0xFFFF) /*!< RTC Alarm Low */ + +/******************************************************************************/ +/* */ +/* Independent WATCHDOG */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for IWDG_KR register ********************/ +#define IWDG_KR_KEY ((uint16_t)0xFFFF) /*!< Key value (write only, read 0000h) */ + +/******************* Bit definition for IWDG_PR register ********************/ +#define IWDG_PR_PR ((uint8_t)0x07) /*!< PR[2:0] (Prescaler divider) */ +#define IWDG_PR_PR_0 ((uint8_t)0x01) /*!< Bit 0 */ +#define IWDG_PR_PR_1 ((uint8_t)0x02) /*!< Bit 1 */ +#define IWDG_PR_PR_2 ((uint8_t)0x04) /*!< Bit 2 */ + +/******************* Bit definition for IWDG_RLR register *******************/ +#define IWDG_RLR_RL ((uint16_t)0x0FFF) /*!< Watchdog counter reload value */ + +/******************* Bit definition for IWDG_SR register ********************/ +#define IWDG_SR_PVU ((uint8_t)0x01) /*!< Watchdog prescaler value update */ +#define IWDG_SR_RVU ((uint8_t)0x02) /*!< Watchdog counter reload value update */ + +/******************************************************************************/ +/* */ +/* Window WATCHDOG */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for WWDG_CR register ********************/ +#define WWDG_CR_T ((uint8_t)0x7F) /*!< T[6:0] bits (7-Bit counter (MSB to LSB)) */ +#define WWDG_CR_T0 ((uint8_t)0x01) /*!< Bit 0 */ +#define WWDG_CR_T1 ((uint8_t)0x02) /*!< Bit 1 */ +#define WWDG_CR_T2 ((uint8_t)0x04) /*!< Bit 2 */ +#define WWDG_CR_T3 ((uint8_t)0x08) /*!< Bit 3 */ +#define WWDG_CR_T4 ((uint8_t)0x10) /*!< Bit 4 */ +#define WWDG_CR_T5 ((uint8_t)0x20) /*!< Bit 5 */ +#define WWDG_CR_T6 ((uint8_t)0x40) /*!< Bit 6 */ + +#define WWDG_CR_WDGA ((uint8_t)0x80) /*!< Activation bit */ + +/******************* Bit definition for WWDG_CFR register *******************/ +#define WWDG_CFR_W ((uint16_t)0x007F) /*!< W[6:0] bits (7-bit window value) */ +#define WWDG_CFR_W0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define WWDG_CFR_W1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define WWDG_CFR_W2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define WWDG_CFR_W3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define WWDG_CFR_W4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define WWDG_CFR_W5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define WWDG_CFR_W6 ((uint16_t)0x0040) /*!< Bit 6 */ + +#define WWDG_CFR_WDGTB ((uint16_t)0x0180) /*!< WDGTB[1:0] bits (Timer Base) */ +#define WWDG_CFR_WDGTB0 ((uint16_t)0x0080) /*!< Bit 0 */ +#define WWDG_CFR_WDGTB1 ((uint16_t)0x0100) /*!< Bit 1 */ + +#define WWDG_CFR_EWI ((uint16_t)0x0200) /*!< Early Wakeup Interrupt */ + +/******************* Bit definition for WWDG_SR register ********************/ +#define WWDG_SR_EWIF ((uint8_t)0x01) /*!< Early Wakeup Interrupt Flag */ + +/******************************************************************************/ +/* */ +/* Flexible Static Memory Controller */ +/* */ +/******************************************************************************/ + +/****************** Bit definition for FSMC_BCR1 register *******************/ +#define FSMC_BCR1_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR1_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR1_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR1_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR1_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR1_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR1_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR1_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR1_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ +#define FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR1_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR1_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR1_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR1_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BCR2 register *******************/ +#define FSMC_BCR2_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR2_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR2_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR2_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR2_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR2_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR2_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR2_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR2_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ +#define FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR2_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR2_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR2_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR2_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BCR3 register *******************/ +#define FSMC_BCR3_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR3_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR3_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR3_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR3_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR3_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR3_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR3_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR3_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit. */ +#define FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR3_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR3_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR3_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR3_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BCR4 register *******************/ +#define FSMC_BCR4_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR4_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR4_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR4_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR4_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR4_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR4_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR4_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR4_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ +#define FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR4_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR4_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR4_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR4_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BTR1 register ******************/ +#define FSMC_BTR1_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR1_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR1_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR1_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BTR2 register *******************/ +#define FSMC_BTR2_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR2_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR2_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR2_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/******************* Bit definition for FSMC_BTR3 register *******************/ +#define FSMC_BTR3_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR3_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR3_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR3_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BTR4 register *******************/ +#define FSMC_BTR4_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR4_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR4_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR4_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR1 register ******************/ +#define FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR2 register ******************/ +#define FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1*/ +#define FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR3 register ******************/ +#define FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR4 register ******************/ +#define FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_PCR2 register *******************/ +#define FSMC_PCR2_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ +#define FSMC_PCR2_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ +#define FSMC_PCR2_PTYP ((uint32_t)0x00000008) /*!< Memory type */ + +#define FSMC_PCR2_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ +#define FSMC_PCR2_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_PCR2_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_PCR2_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ + +#define FSMC_PCR2_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ +#define FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ +#define FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ + +#define FSMC_PCR2_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ +#define FSMC_PCR2_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define FSMC_PCR2_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define FSMC_PCR2_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ +#define FSMC_PCR2_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ + +#define FSMC_PCR2_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[1:0] bits (ECC page size) */ +#define FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +/****************** Bit definition for FSMC_PCR3 register *******************/ +#define FSMC_PCR3_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ +#define FSMC_PCR3_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ +#define FSMC_PCR3_PTYP ((uint32_t)0x00000008) /*!< Memory type */ + +#define FSMC_PCR3_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ +#define FSMC_PCR3_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_PCR3_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_PCR3_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ + +#define FSMC_PCR3_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ +#define FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ +#define FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ + +#define FSMC_PCR3_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ +#define FSMC_PCR3_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define FSMC_PCR3_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define FSMC_PCR3_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ +#define FSMC_PCR3_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ + +#define FSMC_PCR3_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[2:0] bits (ECC page size) */ +#define FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +/****************** Bit definition for FSMC_PCR4 register *******************/ +#define FSMC_PCR4_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ +#define FSMC_PCR4_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ +#define FSMC_PCR4_PTYP ((uint32_t)0x00000008) /*!< Memory type */ + +#define FSMC_PCR4_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ +#define FSMC_PCR4_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_PCR4_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_PCR4_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ + +#define FSMC_PCR4_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ +#define FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ +#define FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ + +#define FSMC_PCR4_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ +#define FSMC_PCR4_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define FSMC_PCR4_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define FSMC_PCR4_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ +#define FSMC_PCR4_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ + +#define FSMC_PCR4_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[2:0] bits (ECC page size) */ +#define FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +/******************* Bit definition for FSMC_SR2 register *******************/ +#define FSMC_SR2_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ +#define FSMC_SR2_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ +#define FSMC_SR2_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ +#define FSMC_SR2_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ +#define FSMC_SR2_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ +#define FSMC_SR2_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ +#define FSMC_SR2_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ + +/******************* Bit definition for FSMC_SR3 register *******************/ +#define FSMC_SR3_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ +#define FSMC_SR3_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ +#define FSMC_SR3_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ +#define FSMC_SR3_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ +#define FSMC_SR3_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ +#define FSMC_SR3_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ +#define FSMC_SR3_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ + +/******************* Bit definition for FSMC_SR4 register *******************/ +#define FSMC_SR4_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ +#define FSMC_SR4_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ +#define FSMC_SR4_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ +#define FSMC_SR4_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ +#define FSMC_SR4_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ +#define FSMC_SR4_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ +#define FSMC_SR4_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ + +/****************** Bit definition for FSMC_PMEM2 register ******************/ +#define FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) /*!< MEMSET2[7:0] bits (Common memory 2 setup time) */ +#define FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) /*!< MEMWAIT2[7:0] bits (Common memory 2 wait time) */ +#define FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) /*!< MEMHOLD2[7:0] bits (Common memory 2 hold time) */ +#define FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) /*!< MEMHIZ2[7:0] bits (Common memory 2 databus HiZ time) */ +#define FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PMEM3 register ******************/ +#define FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) /*!< MEMSET3[7:0] bits (Common memory 3 setup time) */ +#define FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) /*!< MEMWAIT3[7:0] bits (Common memory 3 wait time) */ +#define FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) /*!< MEMHOLD3[7:0] bits (Common memory 3 hold time) */ +#define FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) /*!< MEMHIZ3[7:0] bits (Common memory 3 databus HiZ time) */ +#define FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PMEM4 register ******************/ +#define FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) /*!< MEMSET4[7:0] bits (Common memory 4 setup time) */ +#define FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) /*!< MEMWAIT4[7:0] bits (Common memory 4 wait time) */ +#define FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) /*!< MEMHOLD4[7:0] bits (Common memory 4 hold time) */ +#define FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) /*!< MEMHIZ4[7:0] bits (Common memory 4 databus HiZ time) */ +#define FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PATT2 register ******************/ +#define FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) /*!< ATTSET2[7:0] bits (Attribute memory 2 setup time) */ +#define FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) /*!< ATTWAIT2[7:0] bits (Attribute memory 2 wait time) */ +#define FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) /*!< ATTHOLD2[7:0] bits (Attribute memory 2 hold time) */ +#define FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) /*!< ATTHIZ2[7:0] bits (Attribute memory 2 databus HiZ time) */ +#define FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PATT3 register ******************/ +#define FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) /*!< ATTSET3[7:0] bits (Attribute memory 3 setup time) */ +#define FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) /*!< ATTWAIT3[7:0] bits (Attribute memory 3 wait time) */ +#define FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) /*!< ATTHOLD3[7:0] bits (Attribute memory 3 hold time) */ +#define FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) /*!< ATTHIZ3[7:0] bits (Attribute memory 3 databus HiZ time) */ +#define FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PATT4 register ******************/ +#define FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) /*!< ATTSET4[7:0] bits (Attribute memory 4 setup time) */ +#define FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) /*!< ATTWAIT4[7:0] bits (Attribute memory 4 wait time) */ +#define FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) /*!< ATTHOLD4[7:0] bits (Attribute memory 4 hold time) */ +#define FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) /*!< ATTHIZ4[7:0] bits (Attribute memory 4 databus HiZ time) */ +#define FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PIO4 register *******************/ +#define FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF) /*!< IOSET4[7:0] bits (I/O 4 setup time) */ +#define FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) /*!< IOWAIT4[7:0] bits (I/O 4 wait time) */ +#define FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) /*!< IOHOLD4[7:0] bits (I/O 4 hold time) */ +#define FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) /*!< IOHIZ4[7:0] bits (I/O 4 databus HiZ time) */ +#define FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_ECCR2 register ******************/ +#define FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) /*!< ECC result */ + +/****************** Bit definition for FSMC_ECCR3 register ******************/ +#define FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) /*!< ECC result */ + +/******************************************************************************/ +/* */ +/* SD host Interface */ +/* */ +/******************************************************************************/ + +/****************** Bit definition for SDIO_POWER register ******************/ +#define SDIO_POWER_PWRCTRL ((uint8_t)0x03) /*!< PWRCTRL[1:0] bits (Power supply control bits) */ +#define SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01) /*!< Bit 0 */ +#define SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02) /*!< Bit 1 */ + +/****************** Bit definition for SDIO_CLKCR register ******************/ +#define SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF) /*!< Clock divide factor */ +#define SDIO_CLKCR_CLKEN ((uint16_t)0x0100) /*!< Clock enable bit */ +#define SDIO_CLKCR_PWRSAV ((uint16_t)0x0200) /*!< Power saving configuration bit */ +#define SDIO_CLKCR_BYPASS ((uint16_t)0x0400) /*!< Clock divider bypass enable bit */ + +#define SDIO_CLKCR_WIDBUS ((uint16_t)0x1800) /*!< WIDBUS[1:0] bits (Wide bus mode enable bit) */ +#define SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) /*!< Bit 0 */ +#define SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000) /*!< Bit 1 */ + +#define SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000) /*!< SDIO_CK dephasing selection bit */ +#define SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000) /*!< HW Flow Control enable */ + +/******************* Bit definition for SDIO_ARG register *******************/ +#define SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF) /*!< Command argument */ + +/******************* Bit definition for SDIO_CMD register *******************/ +#define SDIO_CMD_CMDINDEX ((uint16_t)0x003F) /*!< Command Index */ + +#define SDIO_CMD_WAITRESP ((uint16_t)0x00C0) /*!< WAITRESP[1:0] bits (Wait for response bits) */ +#define SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040) /*!< Bit 0 */ +#define SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080) /*!< Bit 1 */ + +#define SDIO_CMD_WAITINT ((uint16_t)0x0100) /*!< CPSM Waits for Interrupt Request */ +#define SDIO_CMD_WAITPEND ((uint16_t)0x0200) /*!< CPSM Waits for ends of data transfer (CmdPend internal signal) */ +#define SDIO_CMD_CPSMEN ((uint16_t)0x0400) /*!< Command path state machine (CPSM) Enable bit */ +#define SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800) /*!< SD I/O suspend command */ +#define SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000) /*!< Enable CMD completion */ +#define SDIO_CMD_NIEN ((uint16_t)0x2000) /*!< Not Interrupt Enable */ +#define SDIO_CMD_CEATACMD ((uint16_t)0x4000) /*!< CE-ATA command */ + +/***************** Bit definition for SDIO_RESPCMD register *****************/ +#define SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F) /*!< Response command index */ + +/****************** Bit definition for SDIO_RESP0 register ******************/ +#define SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP1 register ******************/ +#define SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP2 register ******************/ +#define SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP3 register ******************/ +#define SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP4 register ******************/ +#define SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_DTIMER register *****************/ +#define SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF) /*!< Data timeout period. */ + +/****************** Bit definition for SDIO_DLEN register *******************/ +#define SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF) /*!< Data length value */ + +/****************** Bit definition for SDIO_DCTRL register ******************/ +#define SDIO_DCTRL_DTEN ((uint16_t)0x0001) /*!< Data transfer enabled bit */ +#define SDIO_DCTRL_DTDIR ((uint16_t)0x0002) /*!< Data transfer direction selection */ +#define SDIO_DCTRL_DTMODE ((uint16_t)0x0004) /*!< Data transfer mode selection */ +#define SDIO_DCTRL_DMAEN ((uint16_t)0x0008) /*!< DMA enabled bit */ + +#define SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0) /*!< DBLOCKSIZE[3:0] bits (Data block size) */ +#define SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040) /*!< Bit 2 */ +#define SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080) /*!< Bit 3 */ + +#define SDIO_DCTRL_RWSTART ((uint16_t)0x0100) /*!< Read wait start */ +#define SDIO_DCTRL_RWSTOP ((uint16_t)0x0200) /*!< Read wait stop */ +#define SDIO_DCTRL_RWMOD ((uint16_t)0x0400) /*!< Read wait mode */ +#define SDIO_DCTRL_SDIOEN ((uint16_t)0x0800) /*!< SD I/O enable functions */ + +/****************** Bit definition for SDIO_DCOUNT register *****************/ +#define SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF) /*!< Data count value */ + +/****************** Bit definition for SDIO_STA register ********************/ +#define SDIO_STA_CCRCFAIL ((uint32_t)0x00000001) /*!< Command response received (CRC check failed) */ +#define SDIO_STA_DCRCFAIL ((uint32_t)0x00000002) /*!< Data block sent/received (CRC check failed) */ +#define SDIO_STA_CTIMEOUT ((uint32_t)0x00000004) /*!< Command response timeout */ +#define SDIO_STA_DTIMEOUT ((uint32_t)0x00000008) /*!< Data timeout */ +#define SDIO_STA_TXUNDERR ((uint32_t)0x00000010) /*!< Transmit FIFO underrun error */ +#define SDIO_STA_RXOVERR ((uint32_t)0x00000020) /*!< Received FIFO overrun error */ +#define SDIO_STA_CMDREND ((uint32_t)0x00000040) /*!< Command response received (CRC check passed) */ +#define SDIO_STA_CMDSENT ((uint32_t)0x00000080) /*!< Command sent (no response required) */ +#define SDIO_STA_DATAEND ((uint32_t)0x00000100) /*!< Data end (data counter, SDIDCOUNT, is zero) */ +#define SDIO_STA_STBITERR ((uint32_t)0x00000200) /*!< Start bit not detected on all data signals in wide bus mode */ +#define SDIO_STA_DBCKEND ((uint32_t)0x00000400) /*!< Data block sent/received (CRC check passed) */ +#define SDIO_STA_CMDACT ((uint32_t)0x00000800) /*!< Command transfer in progress */ +#define SDIO_STA_TXACT ((uint32_t)0x00001000) /*!< Data transmit in progress */ +#define SDIO_STA_RXACT ((uint32_t)0x00002000) /*!< Data receive in progress */ +#define SDIO_STA_TXFIFOHE ((uint32_t)0x00004000) /*!< Transmit FIFO Half Empty: at least 8 words can be written into the FIFO */ +#define SDIO_STA_RXFIFOHF ((uint32_t)0x00008000) /*!< Receive FIFO Half Full: there are at least 8 words in the FIFO */ +#define SDIO_STA_TXFIFOF ((uint32_t)0x00010000) /*!< Transmit FIFO full */ +#define SDIO_STA_RXFIFOF ((uint32_t)0x00020000) /*!< Receive FIFO full */ +#define SDIO_STA_TXFIFOE ((uint32_t)0x00040000) /*!< Transmit FIFO empty */ +#define SDIO_STA_RXFIFOE ((uint32_t)0x00080000) /*!< Receive FIFO empty */ +#define SDIO_STA_TXDAVL ((uint32_t)0x00100000) /*!< Data available in transmit FIFO */ +#define SDIO_STA_RXDAVL ((uint32_t)0x00200000) /*!< Data available in receive FIFO */ +#define SDIO_STA_SDIOIT ((uint32_t)0x00400000) /*!< SDIO interrupt received */ +#define SDIO_STA_CEATAEND ((uint32_t)0x00800000) /*!< CE-ATA command completion signal received for CMD61 */ + +/******************* Bit definition for SDIO_ICR register *******************/ +#define SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001) /*!< CCRCFAIL flag clear bit */ +#define SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002) /*!< DCRCFAIL flag clear bit */ +#define SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004) /*!< CTIMEOUT flag clear bit */ +#define SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008) /*!< DTIMEOUT flag clear bit */ +#define SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010) /*!< TXUNDERR flag clear bit */ +#define SDIO_ICR_RXOVERRC ((uint32_t)0x00000020) /*!< RXOVERR flag clear bit */ +#define SDIO_ICR_CMDRENDC ((uint32_t)0x00000040) /*!< CMDREND flag clear bit */ +#define SDIO_ICR_CMDSENTC ((uint32_t)0x00000080) /*!< CMDSENT flag clear bit */ +#define SDIO_ICR_DATAENDC ((uint32_t)0x00000100) /*!< DATAEND flag clear bit */ +#define SDIO_ICR_STBITERRC ((uint32_t)0x00000200) /*!< STBITERR flag clear bit */ +#define SDIO_ICR_DBCKENDC ((uint32_t)0x00000400) /*!< DBCKEND flag clear bit */ +#define SDIO_ICR_SDIOITC ((uint32_t)0x00400000) /*!< SDIOIT flag clear bit */ +#define SDIO_ICR_CEATAENDC ((uint32_t)0x00800000) /*!< CEATAEND flag clear bit */ + +/****************** Bit definition for SDIO_MASK register *******************/ +#define SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001) /*!< Command CRC Fail Interrupt Enable */ +#define SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002) /*!< Data CRC Fail Interrupt Enable */ +#define SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004) /*!< Command TimeOut Interrupt Enable */ +#define SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008) /*!< Data TimeOut Interrupt Enable */ +#define SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010) /*!< Tx FIFO UnderRun Error Interrupt Enable */ +#define SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020) /*!< Rx FIFO OverRun Error Interrupt Enable */ +#define SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040) /*!< Command Response Received Interrupt Enable */ +#define SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080) /*!< Command Sent Interrupt Enable */ +#define SDIO_MASK_DATAENDIE ((uint32_t)0x00000100) /*!< Data End Interrupt Enable */ +#define SDIO_MASK_STBITERRIE ((uint32_t)0x00000200) /*!< Start Bit Error Interrupt Enable */ +#define SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400) /*!< Data Block End Interrupt Enable */ +#define SDIO_MASK_CMDACTIE ((uint32_t)0x00000800) /*!< Command Acting Interrupt Enable */ +#define SDIO_MASK_TXACTIE ((uint32_t)0x00001000) /*!< Data Transmit Acting Interrupt Enable */ +#define SDIO_MASK_RXACTIE ((uint32_t)0x00002000) /*!< Data receive acting interrupt enabled */ +#define SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000) /*!< Tx FIFO Half Empty interrupt Enable */ +#define SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000) /*!< Rx FIFO Half Full interrupt Enable */ +#define SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000) /*!< Tx FIFO Full interrupt Enable */ +#define SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000) /*!< Rx FIFO Full interrupt Enable */ +#define SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) /*!< Tx FIFO Empty interrupt Enable */ +#define SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000) /*!< Rx FIFO Empty interrupt Enable */ +#define SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000) /*!< Data available in Tx FIFO interrupt Enable */ +#define SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000) /*!< Data available in Rx FIFO interrupt Enable */ +#define SDIO_MASK_SDIOITIE ((uint32_t)0x00400000) /*!< SDIO Mode Interrupt Received interrupt Enable */ +#define SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000) /*!< CE-ATA command completion signal received Interrupt Enable */ + +/***************** Bit definition for SDIO_FIFOCNT register *****************/ +#define SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF) /*!< Remaining number of words to be written to or read from the FIFO */ + +/****************** Bit definition for SDIO_FIFO register *******************/ +#define SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF) /*!< Receive and transmit FIFO data */ + +/******************************************************************************/ +/* */ +/* USB Device FS */ +/* */ +/******************************************************************************/ + +/*!< Endpoint-specific registers */ +/******************* Bit definition for USB_EP0R register *******************/ +#define USB_EP0R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP0R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP0R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP0R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP0R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP0R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP0R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP0R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP0R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP0R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP0R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP0R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP0R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP0R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP1R register *******************/ +#define USB_EP1R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP1R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP1R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP1R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP1R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP1R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP1R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP1R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP1R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP1R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP1R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP1R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP1R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP1R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP2R register *******************/ +#define USB_EP2R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP2R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP2R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP2R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP2R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP2R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP2R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP2R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP2R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP2R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP2R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP2R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP2R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP2R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP3R register *******************/ +#define USB_EP3R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP3R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP3R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP3R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP3R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP3R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP3R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP3R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP3R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP3R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP3R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP3R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP3R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP3R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP4R register *******************/ +#define USB_EP4R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP4R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP4R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP4R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP4R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP4R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP4R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP4R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP4R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP4R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP4R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP4R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP4R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP4R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP5R register *******************/ +#define USB_EP5R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP5R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP5R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP5R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP5R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP5R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP5R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP5R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP5R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP5R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP5R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP5R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP5R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP5R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP6R register *******************/ +#define USB_EP6R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP6R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP6R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP6R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP6R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP6R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP6R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP6R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP6R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP6R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP6R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP6R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP6R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP6R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP7R register *******************/ +#define USB_EP7R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP7R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP7R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP7R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP7R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP7R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP7R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP7R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP7R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP7R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP7R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP7R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP7R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP7R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/*!< Common registers */ +/******************* Bit definition for USB_CNTR register *******************/ +#define USB_CNTR_FRES ((uint16_t)0x0001) /*!< Force USB Reset */ +#define USB_CNTR_PDWN ((uint16_t)0x0002) /*!< Power down */ +#define USB_CNTR_LP_MODE ((uint16_t)0x0004) /*!< Low-power mode */ +#define USB_CNTR_FSUSP ((uint16_t)0x0008) /*!< Force suspend */ +#define USB_CNTR_RESUME ((uint16_t)0x0010) /*!< Resume request */ +#define USB_CNTR_ESOFM ((uint16_t)0x0100) /*!< Expected Start Of Frame Interrupt Mask */ +#define USB_CNTR_SOFM ((uint16_t)0x0200) /*!< Start Of Frame Interrupt Mask */ +#define USB_CNTR_RESETM ((uint16_t)0x0400) /*!< RESET Interrupt Mask */ +#define USB_CNTR_SUSPM ((uint16_t)0x0800) /*!< Suspend mode Interrupt Mask */ +#define USB_CNTR_WKUPM ((uint16_t)0x1000) /*!< Wakeup Interrupt Mask */ +#define USB_CNTR_ERRM ((uint16_t)0x2000) /*!< Error Interrupt Mask */ +#define USB_CNTR_PMAOVRM ((uint16_t)0x4000) /*!< Packet Memory Area Over / Underrun Interrupt Mask */ +#define USB_CNTR_CTRM ((uint16_t)0x8000) /*!< Correct Transfer Interrupt Mask */ + +/******************* Bit definition for USB_ISTR register *******************/ +#define USB_ISTR_EP_ID ((uint16_t)0x000F) /*!< Endpoint Identifier */ +#define USB_ISTR_DIR ((uint16_t)0x0010) /*!< Direction of transaction */ +#define USB_ISTR_ESOF ((uint16_t)0x0100) /*!< Expected Start Of Frame */ +#define USB_ISTR_SOF ((uint16_t)0x0200) /*!< Start Of Frame */ +#define USB_ISTR_RESET ((uint16_t)0x0400) /*!< USB RESET request */ +#define USB_ISTR_SUSP ((uint16_t)0x0800) /*!< Suspend mode request */ +#define USB_ISTR_WKUP ((uint16_t)0x1000) /*!< Wake up */ +#define USB_ISTR_ERR ((uint16_t)0x2000) /*!< Error */ +#define USB_ISTR_PMAOVR ((uint16_t)0x4000) /*!< Packet Memory Area Over / Underrun */ +#define USB_ISTR_CTR ((uint16_t)0x8000) /*!< Correct Transfer */ + +/******************* Bit definition for USB_FNR register ********************/ +#define USB_FNR_FN ((uint16_t)0x07FF) /*!< Frame Number */ +#define USB_FNR_LSOF ((uint16_t)0x1800) /*!< Lost SOF */ +#define USB_FNR_LCK ((uint16_t)0x2000) /*!< Locked */ +#define USB_FNR_RXDM ((uint16_t)0x4000) /*!< Receive Data - Line Status */ +#define USB_FNR_RXDP ((uint16_t)0x8000) /*!< Receive Data + Line Status */ + +/****************** Bit definition for USB_DADDR register *******************/ +#define USB_DADDR_ADD ((uint8_t)0x7F) /*!< ADD[6:0] bits (Device Address) */ +#define USB_DADDR_ADD0 ((uint8_t)0x01) /*!< Bit 0 */ +#define USB_DADDR_ADD1 ((uint8_t)0x02) /*!< Bit 1 */ +#define USB_DADDR_ADD2 ((uint8_t)0x04) /*!< Bit 2 */ +#define USB_DADDR_ADD3 ((uint8_t)0x08) /*!< Bit 3 */ +#define USB_DADDR_ADD4 ((uint8_t)0x10) /*!< Bit 4 */ +#define USB_DADDR_ADD5 ((uint8_t)0x20) /*!< Bit 5 */ +#define USB_DADDR_ADD6 ((uint8_t)0x40) /*!< Bit 6 */ + +#define USB_DADDR_EF ((uint8_t)0x80) /*!< Enable Function */ + +/****************** Bit definition for USB_BTABLE register ******************/ +#define USB_BTABLE_BTABLE ((uint16_t)0xFFF8) /*!< Buffer Table */ + +/*!< Buffer descriptor table */ +/***************** Bit definition for USB_ADDR0_TX register *****************/ +#define USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 0 */ + +/***************** Bit definition for USB_ADDR1_TX register *****************/ +#define USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 1 */ + +/***************** Bit definition for USB_ADDR2_TX register *****************/ +#define USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 2 */ + +/***************** Bit definition for USB_ADDR3_TX register *****************/ +#define USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 3 */ + +/***************** Bit definition for USB_ADDR4_TX register *****************/ +#define USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 4 */ + +/***************** Bit definition for USB_ADDR5_TX register *****************/ +#define USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 5 */ + +/***************** Bit definition for USB_ADDR6_TX register *****************/ +#define USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 6 */ + +/***************** Bit definition for USB_ADDR7_TX register *****************/ +#define USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 7 */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_COUNT0_TX register ****************/ +#define USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 0 */ + +/***************** Bit definition for USB_COUNT1_TX register ****************/ +#define USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 1 */ + +/***************** Bit definition for USB_COUNT2_TX register ****************/ +#define USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 2 */ + +/***************** Bit definition for USB_COUNT3_TX register ****************/ +#define USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 3 */ + +/***************** Bit definition for USB_COUNT4_TX register ****************/ +#define USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 4 */ + +/***************** Bit definition for USB_COUNT5_TX register ****************/ +#define USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 5 */ + +/***************** Bit definition for USB_COUNT6_TX register ****************/ +#define USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 6 */ + +/***************** Bit definition for USB_COUNT7_TX register ****************/ +#define USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 7 */ + +/*----------------------------------------------------------------------------*/ + +/**************** Bit definition for USB_COUNT0_TX_0 register ***************/ +#define USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 0 (low) */ + +/**************** Bit definition for USB_COUNT0_TX_1 register ***************/ +#define USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 0 (high) */ + +/**************** Bit definition for USB_COUNT1_TX_0 register ***************/ +#define USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 1 (low) */ + +/**************** Bit definition for USB_COUNT1_TX_1 register ***************/ +#define USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 1 (high) */ + +/**************** Bit definition for USB_COUNT2_TX_0 register ***************/ +#define USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 2 (low) */ + +/**************** Bit definition for USB_COUNT2_TX_1 register ***************/ +#define USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 2 (high) */ + +/**************** Bit definition for USB_COUNT3_TX_0 register ***************/ +#define USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF) /*!< Transmission Byte Count 3 (low) */ + +/**************** Bit definition for USB_COUNT3_TX_1 register ***************/ +#define USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000) /*!< Transmission Byte Count 3 (high) */ + +/**************** Bit definition for USB_COUNT4_TX_0 register ***************/ +#define USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 4 (low) */ + +/**************** Bit definition for USB_COUNT4_TX_1 register ***************/ +#define USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 4 (high) */ + +/**************** Bit definition for USB_COUNT5_TX_0 register ***************/ +#define USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 5 (low) */ + +/**************** Bit definition for USB_COUNT5_TX_1 register ***************/ +#define USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 5 (high) */ + +/**************** Bit definition for USB_COUNT6_TX_0 register ***************/ +#define USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 6 (low) */ + +/**************** Bit definition for USB_COUNT6_TX_1 register ***************/ +#define USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 6 (high) */ + +/**************** Bit definition for USB_COUNT7_TX_0 register ***************/ +#define USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 7 (low) */ + +/**************** Bit definition for USB_COUNT7_TX_1 register ***************/ +#define USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 7 (high) */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_ADDR0_RX register *****************/ +#define USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 0 */ + +/***************** Bit definition for USB_ADDR1_RX register *****************/ +#define USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 1 */ + +/***************** Bit definition for USB_ADDR2_RX register *****************/ +#define USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 2 */ + +/***************** Bit definition for USB_ADDR3_RX register *****************/ +#define USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 3 */ + +/***************** Bit definition for USB_ADDR4_RX register *****************/ +#define USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 4 */ + +/***************** Bit definition for USB_ADDR5_RX register *****************/ +#define USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 5 */ + +/***************** Bit definition for USB_ADDR6_RX register *****************/ +#define USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 6 */ + +/***************** Bit definition for USB_ADDR7_RX register *****************/ +#define USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 7 */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_COUNT0_RX register ****************/ +#define USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT1_RX register ****************/ +#define USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT2_RX register ****************/ +#define USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT3_RX register ****************/ +#define USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT4_RX register ****************/ +#define USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT5_RX register ****************/ +#define USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT6_RX register ****************/ +#define USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT7_RX register ****************/ +#define USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/*----------------------------------------------------------------------------*/ + +/**************** Bit definition for USB_COUNT0_RX_0 register ***************/ +#define USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT0_RX_1 register ***************/ +#define USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 1 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT1_RX_0 register ***************/ +#define USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT1_RX_1 register ***************/ +#define USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT2_RX_0 register ***************/ +#define USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT2_RX_1 register ***************/ +#define USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT3_RX_0 register ***************/ +#define USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT3_RX_1 register ***************/ +#define USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT4_RX_0 register ***************/ +#define USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT4_RX_1 register ***************/ +#define USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT5_RX_0 register ***************/ +#define USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT5_RX_1 register ***************/ +#define USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/*************** Bit definition for USB_COUNT6_RX_0 register ***************/ +#define USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT6_RX_1 register ***************/ +#define USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/*************** Bit definition for USB_COUNT7_RX_0 register ****************/ +#define USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/*************** Bit definition for USB_COUNT7_RX_1 register ****************/ +#define USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/******************************************************************************/ +/* */ +/* Controller Area Network */ +/* */ +/******************************************************************************/ + +/*!< CAN control and status registers */ +/******************* Bit definition for CAN_MCR register ********************/ +#define CAN_MCR_INRQ ((uint16_t)0x0001) /*!< Initialization Request */ +#define CAN_MCR_SLEEP ((uint16_t)0x0002) /*!< Sleep Mode Request */ +#define CAN_MCR_TXFP ((uint16_t)0x0004) /*!< Transmit FIFO Priority */ +#define CAN_MCR_RFLM ((uint16_t)0x0008) /*!< Receive FIFO Locked Mode */ +#define CAN_MCR_NART ((uint16_t)0x0010) /*!< No Automatic Retransmission */ +#define CAN_MCR_AWUM ((uint16_t)0x0020) /*!< Automatic Wakeup Mode */ +#define CAN_MCR_ABOM ((uint16_t)0x0040) /*!< Automatic Bus-Off Management */ +#define CAN_MCR_TTCM ((uint16_t)0x0080) /*!< Time Triggered Communication Mode */ +#define CAN_MCR_RESET ((uint16_t)0x8000) /*!< CAN software master reset */ + +/******************* Bit definition for CAN_MSR register ********************/ +#define CAN_MSR_INAK ((uint16_t)0x0001) /*!< Initialization Acknowledge */ +#define CAN_MSR_SLAK ((uint16_t)0x0002) /*!< Sleep Acknowledge */ +#define CAN_MSR_ERRI ((uint16_t)0x0004) /*!< Error Interrupt */ +#define CAN_MSR_WKUI ((uint16_t)0x0008) /*!< Wakeup Interrupt */ +#define CAN_MSR_SLAKI ((uint16_t)0x0010) /*!< Sleep Acknowledge Interrupt */ +#define CAN_MSR_TXM ((uint16_t)0x0100) /*!< Transmit Mode */ +#define CAN_MSR_RXM ((uint16_t)0x0200) /*!< Receive Mode */ +#define CAN_MSR_SAMP ((uint16_t)0x0400) /*!< Last Sample Point */ +#define CAN_MSR_RX ((uint16_t)0x0800) /*!< CAN Rx Signal */ + +/******************* Bit definition for CAN_TSR register ********************/ +#define CAN_TSR_RQCP0 ((uint32_t)0x00000001) /*!< Request Completed Mailbox0 */ +#define CAN_TSR_TXOK0 ((uint32_t)0x00000002) /*!< Transmission OK of Mailbox0 */ +#define CAN_TSR_ALST0 ((uint32_t)0x00000004) /*!< Arbitration Lost for Mailbox0 */ +#define CAN_TSR_TERR0 ((uint32_t)0x00000008) /*!< Transmission Error of Mailbox0 */ +#define CAN_TSR_ABRQ0 ((uint32_t)0x00000080) /*!< Abort Request for Mailbox0 */ +#define CAN_TSR_RQCP1 ((uint32_t)0x00000100) /*!< Request Completed Mailbox1 */ +#define CAN_TSR_TXOK1 ((uint32_t)0x00000200) /*!< Transmission OK of Mailbox1 */ +#define CAN_TSR_ALST1 ((uint32_t)0x00000400) /*!< Arbitration Lost for Mailbox1 */ +#define CAN_TSR_TERR1 ((uint32_t)0x00000800) /*!< Transmission Error of Mailbox1 */ +#define CAN_TSR_ABRQ1 ((uint32_t)0x00008000) /*!< Abort Request for Mailbox 1 */ +#define CAN_TSR_RQCP2 ((uint32_t)0x00010000) /*!< Request Completed Mailbox2 */ +#define CAN_TSR_TXOK2 ((uint32_t)0x00020000) /*!< Transmission OK of Mailbox 2 */ +#define CAN_TSR_ALST2 ((uint32_t)0x00040000) /*!< Arbitration Lost for mailbox 2 */ +#define CAN_TSR_TERR2 ((uint32_t)0x00080000) /*!< Transmission Error of Mailbox 2 */ +#define CAN_TSR_ABRQ2 ((uint32_t)0x00800000) /*!< Abort Request for Mailbox 2 */ +#define CAN_TSR_CODE ((uint32_t)0x03000000) /*!< Mailbox Code */ + +#define CAN_TSR_TME ((uint32_t)0x1C000000) /*!< TME[2:0] bits */ +#define CAN_TSR_TME0 ((uint32_t)0x04000000) /*!< Transmit Mailbox 0 Empty */ +#define CAN_TSR_TME1 ((uint32_t)0x08000000) /*!< Transmit Mailbox 1 Empty */ +#define CAN_TSR_TME2 ((uint32_t)0x10000000) /*!< Transmit Mailbox 2 Empty */ + +#define CAN_TSR_LOW ((uint32_t)0xE0000000) /*!< LOW[2:0] bits */ +#define CAN_TSR_LOW0 ((uint32_t)0x20000000) /*!< Lowest Priority Flag for Mailbox 0 */ +#define CAN_TSR_LOW1 ((uint32_t)0x40000000) /*!< Lowest Priority Flag for Mailbox 1 */ +#define CAN_TSR_LOW2 ((uint32_t)0x80000000) /*!< Lowest Priority Flag for Mailbox 2 */ + +/******************* Bit definition for CAN_RF0R register *******************/ +#define CAN_RF0R_FMP0 ((uint8_t)0x03) /*!< FIFO 0 Message Pending */ +#define CAN_RF0R_FULL0 ((uint8_t)0x08) /*!< FIFO 0 Full */ +#define CAN_RF0R_FOVR0 ((uint8_t)0x10) /*!< FIFO 0 Overrun */ +#define CAN_RF0R_RFOM0 ((uint8_t)0x20) /*!< Release FIFO 0 Output Mailbox */ + +/******************* Bit definition for CAN_RF1R register *******************/ +#define CAN_RF1R_FMP1 ((uint8_t)0x03) /*!< FIFO 1 Message Pending */ +#define CAN_RF1R_FULL1 ((uint8_t)0x08) /*!< FIFO 1 Full */ +#define CAN_RF1R_FOVR1 ((uint8_t)0x10) /*!< FIFO 1 Overrun */ +#define CAN_RF1R_RFOM1 ((uint8_t)0x20) /*!< Release FIFO 1 Output Mailbox */ + +/******************** Bit definition for CAN_IER register *******************/ +#define CAN_IER_TMEIE ((uint32_t)0x00000001) /*!< Transmit Mailbox Empty Interrupt Enable */ +#define CAN_IER_FMPIE0 ((uint32_t)0x00000002) /*!< FIFO Message Pending Interrupt Enable */ +#define CAN_IER_FFIE0 ((uint32_t)0x00000004) /*!< FIFO Full Interrupt Enable */ +#define CAN_IER_FOVIE0 ((uint32_t)0x00000008) /*!< FIFO Overrun Interrupt Enable */ +#define CAN_IER_FMPIE1 ((uint32_t)0x00000010) /*!< FIFO Message Pending Interrupt Enable */ +#define CAN_IER_FFIE1 ((uint32_t)0x00000020) /*!< FIFO Full Interrupt Enable */ +#define CAN_IER_FOVIE1 ((uint32_t)0x00000040) /*!< FIFO Overrun Interrupt Enable */ +#define CAN_IER_EWGIE ((uint32_t)0x00000100) /*!< Error Warning Interrupt Enable */ +#define CAN_IER_EPVIE ((uint32_t)0x00000200) /*!< Error Passive Interrupt Enable */ +#define CAN_IER_BOFIE ((uint32_t)0x00000400) /*!< Bus-Off Interrupt Enable */ +#define CAN_IER_LECIE ((uint32_t)0x00000800) /*!< Last Error Code Interrupt Enable */ +#define CAN_IER_ERRIE ((uint32_t)0x00008000) /*!< Error Interrupt Enable */ +#define CAN_IER_WKUIE ((uint32_t)0x00010000) /*!< Wakeup Interrupt Enable */ +#define CAN_IER_SLKIE ((uint32_t)0x00020000) /*!< Sleep Interrupt Enable */ + +/******************** Bit definition for CAN_ESR register *******************/ +#define CAN_ESR_EWGF ((uint32_t)0x00000001) /*!< Error Warning Flag */ +#define CAN_ESR_EPVF ((uint32_t)0x00000002) /*!< Error Passive Flag */ +#define CAN_ESR_BOFF ((uint32_t)0x00000004) /*!< Bus-Off Flag */ + +#define CAN_ESR_LEC ((uint32_t)0x00000070) /*!< LEC[2:0] bits (Last Error Code) */ +#define CAN_ESR_LEC_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define CAN_ESR_LEC_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define CAN_ESR_LEC_2 ((uint32_t)0x00000040) /*!< Bit 2 */ + +#define CAN_ESR_TEC ((uint32_t)0x00FF0000) /*!< Least significant byte of the 9-bit Transmit Error Counter */ +#define CAN_ESR_REC ((uint32_t)0xFF000000) /*!< Receive Error Counter */ + +/******************* Bit definition for CAN_BTR register ********************/ +#define CAN_BTR_BRP ((uint32_t)0x000003FF) /*!< Baud Rate Prescaler */ +#define CAN_BTR_TS1 ((uint32_t)0x000F0000) /*!< Time Segment 1 */ +#define CAN_BTR_TS2 ((uint32_t)0x00700000) /*!< Time Segment 2 */ +#define CAN_BTR_SJW ((uint32_t)0x03000000) /*!< Resynchronization Jump Width */ +#define CAN_BTR_LBKM ((uint32_t)0x40000000) /*!< Loop Back Mode (Debug) */ +#define CAN_BTR_SILM ((uint32_t)0x80000000) /*!< Silent Mode */ + +/*!< Mailbox registers */ +/****************** Bit definition for CAN_TI0R register ********************/ +#define CAN_TI0R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ +#define CAN_TI0R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_TI0R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_TI0R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ +#define CAN_TI0R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/****************** Bit definition for CAN_TDT0R register *******************/ +#define CAN_TDT0R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_TDT0R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ +#define CAN_TDT0R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/****************** Bit definition for CAN_TDL0R register *******************/ +#define CAN_TDL0R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_TDL0R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/****************** Bit definition for CAN_TDH0R register *******************/ +#define CAN_TDH0R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_TDH0R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_TI1R register *******************/ +#define CAN_TI1R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ +#define CAN_TI1R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_TI1R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_TI1R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ +#define CAN_TI1R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_TDT1R register ******************/ +#define CAN_TDT1R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_TDT1R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ +#define CAN_TDT1R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_TDL1R register ******************/ +#define CAN_TDL1R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_TDL1R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_TDH1R register ******************/ +#define CAN_TDH1R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_TDH1R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_TI2R register *******************/ +#define CAN_TI2R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ +#define CAN_TI2R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_TI2R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_TI2R_EXID ((uint32_t)0x001FFFF8) /*!< Extended identifier */ +#define CAN_TI2R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_TDT2R register ******************/ +#define CAN_TDT2R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_TDT2R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ +#define CAN_TDT2R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_TDL2R register ******************/ +#define CAN_TDL2R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_TDL2R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_TDH2R register ******************/ +#define CAN_TDH2R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_TDH2R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_RI0R register *******************/ +#define CAN_RI0R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_RI0R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_RI0R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ +#define CAN_RI0R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_RDT0R register ******************/ +#define CAN_RDT0R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_RDT0R_FMI ((uint32_t)0x0000FF00) /*!< Filter Match Index */ +#define CAN_RDT0R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_RDL0R register ******************/ +#define CAN_RDL0R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_RDL0R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_RDH0R register ******************/ +#define CAN_RDH0R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_RDH0R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_RI1R register *******************/ +#define CAN_RI1R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_RI1R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_RI1R_EXID ((uint32_t)0x001FFFF8) /*!< Extended identifier */ +#define CAN_RI1R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_RDT1R register ******************/ +#define CAN_RDT1R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_RDT1R_FMI ((uint32_t)0x0000FF00) /*!< Filter Match Index */ +#define CAN_RDT1R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_RDL1R register ******************/ +#define CAN_RDL1R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_RDL1R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_RDH1R register ******************/ +#define CAN_RDH1R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_RDH1R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/*!< CAN filter registers */ +/******************* Bit definition for CAN_FMR register ********************/ +#define CAN_FMR_FINIT ((uint8_t)0x01) /*!< Filter Init Mode */ + +/******************* Bit definition for CAN_FM1R register *******************/ +#define CAN_FM1R_FBM ((uint16_t)0x3FFF) /*!< Filter Mode */ +#define CAN_FM1R_FBM0 ((uint16_t)0x0001) /*!< Filter Init Mode bit 0 */ +#define CAN_FM1R_FBM1 ((uint16_t)0x0002) /*!< Filter Init Mode bit 1 */ +#define CAN_FM1R_FBM2 ((uint16_t)0x0004) /*!< Filter Init Mode bit 2 */ +#define CAN_FM1R_FBM3 ((uint16_t)0x0008) /*!< Filter Init Mode bit 3 */ +#define CAN_FM1R_FBM4 ((uint16_t)0x0010) /*!< Filter Init Mode bit 4 */ +#define CAN_FM1R_FBM5 ((uint16_t)0x0020) /*!< Filter Init Mode bit 5 */ +#define CAN_FM1R_FBM6 ((uint16_t)0x0040) /*!< Filter Init Mode bit 6 */ +#define CAN_FM1R_FBM7 ((uint16_t)0x0080) /*!< Filter Init Mode bit 7 */ +#define CAN_FM1R_FBM8 ((uint16_t)0x0100) /*!< Filter Init Mode bit 8 */ +#define CAN_FM1R_FBM9 ((uint16_t)0x0200) /*!< Filter Init Mode bit 9 */ +#define CAN_FM1R_FBM10 ((uint16_t)0x0400) /*!< Filter Init Mode bit 10 */ +#define CAN_FM1R_FBM11 ((uint16_t)0x0800) /*!< Filter Init Mode bit 11 */ +#define CAN_FM1R_FBM12 ((uint16_t)0x1000) /*!< Filter Init Mode bit 12 */ +#define CAN_FM1R_FBM13 ((uint16_t)0x2000) /*!< Filter Init Mode bit 13 */ + +/******************* Bit definition for CAN_FS1R register *******************/ +#define CAN_FS1R_FSC ((uint16_t)0x3FFF) /*!< Filter Scale Configuration */ +#define CAN_FS1R_FSC0 ((uint16_t)0x0001) /*!< Filter Scale Configuration bit 0 */ +#define CAN_FS1R_FSC1 ((uint16_t)0x0002) /*!< Filter Scale Configuration bit 1 */ +#define CAN_FS1R_FSC2 ((uint16_t)0x0004) /*!< Filter Scale Configuration bit 2 */ +#define CAN_FS1R_FSC3 ((uint16_t)0x0008) /*!< Filter Scale Configuration bit 3 */ +#define CAN_FS1R_FSC4 ((uint16_t)0x0010) /*!< Filter Scale Configuration bit 4 */ +#define CAN_FS1R_FSC5 ((uint16_t)0x0020) /*!< Filter Scale Configuration bit 5 */ +#define CAN_FS1R_FSC6 ((uint16_t)0x0040) /*!< Filter Scale Configuration bit 6 */ +#define CAN_FS1R_FSC7 ((uint16_t)0x0080) /*!< Filter Scale Configuration bit 7 */ +#define CAN_FS1R_FSC8 ((uint16_t)0x0100) /*!< Filter Scale Configuration bit 8 */ +#define CAN_FS1R_FSC9 ((uint16_t)0x0200) /*!< Filter Scale Configuration bit 9 */ +#define CAN_FS1R_FSC10 ((uint16_t)0x0400) /*!< Filter Scale Configuration bit 10 */ +#define CAN_FS1R_FSC11 ((uint16_t)0x0800) /*!< Filter Scale Configuration bit 11 */ +#define CAN_FS1R_FSC12 ((uint16_t)0x1000) /*!< Filter Scale Configuration bit 12 */ +#define CAN_FS1R_FSC13 ((uint16_t)0x2000) /*!< Filter Scale Configuration bit 13 */ + +/****************** Bit definition for CAN_FFA1R register *******************/ +#define CAN_FFA1R_FFA ((uint16_t)0x3FFF) /*!< Filter FIFO Assignment */ +#define CAN_FFA1R_FFA0 ((uint16_t)0x0001) /*!< Filter FIFO Assignment for Filter 0 */ +#define CAN_FFA1R_FFA1 ((uint16_t)0x0002) /*!< Filter FIFO Assignment for Filter 1 */ +#define CAN_FFA1R_FFA2 ((uint16_t)0x0004) /*!< Filter FIFO Assignment for Filter 2 */ +#define CAN_FFA1R_FFA3 ((uint16_t)0x0008) /*!< Filter FIFO Assignment for Filter 3 */ +#define CAN_FFA1R_FFA4 ((uint16_t)0x0010) /*!< Filter FIFO Assignment for Filter 4 */ +#define CAN_FFA1R_FFA5 ((uint16_t)0x0020) /*!< Filter FIFO Assignment for Filter 5 */ +#define CAN_FFA1R_FFA6 ((uint16_t)0x0040) /*!< Filter FIFO Assignment for Filter 6 */ +#define CAN_FFA1R_FFA7 ((uint16_t)0x0080) /*!< Filter FIFO Assignment for Filter 7 */ +#define CAN_FFA1R_FFA8 ((uint16_t)0x0100) /*!< Filter FIFO Assignment for Filter 8 */ +#define CAN_FFA1R_FFA9 ((uint16_t)0x0200) /*!< Filter FIFO Assignment for Filter 9 */ +#define CAN_FFA1R_FFA10 ((uint16_t)0x0400) /*!< Filter FIFO Assignment for Filter 10 */ +#define CAN_FFA1R_FFA11 ((uint16_t)0x0800) /*!< Filter FIFO Assignment for Filter 11 */ +#define CAN_FFA1R_FFA12 ((uint16_t)0x1000) /*!< Filter FIFO Assignment for Filter 12 */ +#define CAN_FFA1R_FFA13 ((uint16_t)0x2000) /*!< Filter FIFO Assignment for Filter 13 */ + +/******************* Bit definition for CAN_FA1R register *******************/ +#define CAN_FA1R_FACT ((uint16_t)0x3FFF) /*!< Filter Active */ +#define CAN_FA1R_FACT0 ((uint16_t)0x0001) /*!< Filter 0 Active */ +#define CAN_FA1R_FACT1 ((uint16_t)0x0002) /*!< Filter 1 Active */ +#define CAN_FA1R_FACT2 ((uint16_t)0x0004) /*!< Filter 2 Active */ +#define CAN_FA1R_FACT3 ((uint16_t)0x0008) /*!< Filter 3 Active */ +#define CAN_FA1R_FACT4 ((uint16_t)0x0010) /*!< Filter 4 Active */ +#define CAN_FA1R_FACT5 ((uint16_t)0x0020) /*!< Filter 5 Active */ +#define CAN_FA1R_FACT6 ((uint16_t)0x0040) /*!< Filter 6 Active */ +#define CAN_FA1R_FACT7 ((uint16_t)0x0080) /*!< Filter 7 Active */ +#define CAN_FA1R_FACT8 ((uint16_t)0x0100) /*!< Filter 8 Active */ +#define CAN_FA1R_FACT9 ((uint16_t)0x0200) /*!< Filter 9 Active */ +#define CAN_FA1R_FACT10 ((uint16_t)0x0400) /*!< Filter 10 Active */ +#define CAN_FA1R_FACT11 ((uint16_t)0x0800) /*!< Filter 11 Active */ +#define CAN_FA1R_FACT12 ((uint16_t)0x1000) /*!< Filter 12 Active */ +#define CAN_FA1R_FACT13 ((uint16_t)0x2000) /*!< Filter 13 Active */ + +/******************* Bit definition for CAN_F0R1 register *******************/ +#define CAN_F0R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F0R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F0R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F0R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F0R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F0R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F0R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F0R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F0R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F0R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F0R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F0R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F0R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F0R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F0R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F0R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F0R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F0R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F0R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F0R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F0R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F0R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F0R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F0R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F0R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F0R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F0R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F0R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F0R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F0R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F0R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F0R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F1R1 register *******************/ +#define CAN_F1R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F1R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F1R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F1R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F1R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F1R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F1R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F1R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F1R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F1R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F1R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F1R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F1R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F1R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F1R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F1R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F1R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F1R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F1R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F1R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F1R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F1R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F1R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F1R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F1R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F1R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F1R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F1R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F1R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F1R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F1R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F1R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F2R1 register *******************/ +#define CAN_F2R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F2R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F2R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F2R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F2R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F2R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F2R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F2R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F2R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F2R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F2R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F2R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F2R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F2R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F2R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F2R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F2R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F2R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F2R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F2R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F2R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F2R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F2R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F2R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F2R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F2R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F2R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F2R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F2R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F2R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F2R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F2R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F3R1 register *******************/ +#define CAN_F3R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F3R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F3R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F3R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F3R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F3R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F3R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F3R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F3R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F3R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F3R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F3R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F3R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F3R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F3R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F3R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F3R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F3R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F3R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F3R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F3R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F3R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F3R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F3R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F3R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F3R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F3R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F3R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F3R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F3R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F3R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F3R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F4R1 register *******************/ +#define CAN_F4R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F4R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F4R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F4R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F4R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F4R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F4R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F4R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F4R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F4R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F4R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F4R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F4R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F4R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F4R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F4R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F4R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F4R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F4R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F4R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F4R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F4R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F4R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F4R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F4R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F4R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F4R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F4R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F4R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F4R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F4R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F4R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F5R1 register *******************/ +#define CAN_F5R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F5R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F5R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F5R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F5R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F5R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F5R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F5R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F5R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F5R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F5R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F5R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F5R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F5R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F5R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F5R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F5R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F5R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F5R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F5R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F5R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F5R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F5R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F5R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F5R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F5R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F5R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F5R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F5R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F5R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F5R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F5R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F6R1 register *******************/ +#define CAN_F6R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F6R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F6R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F6R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F6R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F6R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F6R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F6R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F6R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F6R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F6R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F6R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F6R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F6R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F6R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F6R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F6R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F6R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F6R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F6R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F6R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F6R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F6R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F6R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F6R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F6R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F6R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F6R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F6R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F6R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F6R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F6R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F7R1 register *******************/ +#define CAN_F7R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F7R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F7R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F7R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F7R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F7R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F7R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F7R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F7R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F7R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F7R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F7R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F7R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F7R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F7R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F7R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F7R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F7R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F7R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F7R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F7R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F7R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F7R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F7R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F7R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F7R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F7R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F7R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F7R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F7R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F7R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F7R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F8R1 register *******************/ +#define CAN_F8R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F8R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F8R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F8R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F8R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F8R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F8R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F8R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F8R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F8R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F8R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F8R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F8R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F8R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F8R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F8R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F8R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F8R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F8R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F8R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F8R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F8R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F8R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F8R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F8R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F8R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F8R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F8R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F8R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F8R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F8R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F8R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F9R1 register *******************/ +#define CAN_F9R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F9R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F9R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F9R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F9R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F9R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F9R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F9R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F9R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F9R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F9R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F9R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F9R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F9R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F9R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F9R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F9R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F9R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F9R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F9R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F9R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F9R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F9R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F9R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F9R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F9R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F9R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F9R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F9R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F9R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F9R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F9R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F10R1 register ******************/ +#define CAN_F10R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F10R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F10R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F10R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F10R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F10R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F10R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F10R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F10R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F10R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F10R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F10R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F10R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F10R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F10R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F10R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F10R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F10R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F10R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F10R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F10R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F10R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F10R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F10R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F10R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F10R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F10R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F10R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F10R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F10R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F10R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F10R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F11R1 register ******************/ +#define CAN_F11R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F11R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F11R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F11R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F11R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F11R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F11R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F11R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F11R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F11R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F11R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F11R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F11R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F11R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F11R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F11R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F11R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F11R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F11R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F11R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F11R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F11R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F11R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F11R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F11R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F11R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F11R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F11R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F11R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F11R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F11R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F11R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F12R1 register ******************/ +#define CAN_F12R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F12R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F12R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F12R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F12R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F12R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F12R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F12R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F12R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F12R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F12R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F12R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F12R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F12R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F12R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F12R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F12R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F12R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F12R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F12R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F12R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F12R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F12R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F12R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F12R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F12R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F12R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F12R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F12R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F12R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F12R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F12R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F13R1 register ******************/ +#define CAN_F13R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F13R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F13R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F13R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F13R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F13R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F13R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F13R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F13R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F13R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F13R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F13R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F13R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F13R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F13R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F13R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F13R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F13R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F13R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F13R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F13R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F13R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F13R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F13R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F13R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F13R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F13R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F13R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F13R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F13R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F13R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F13R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F0R2 register *******************/ +#define CAN_F0R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F0R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F0R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F0R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F0R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F0R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F0R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F0R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F0R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F0R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F0R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F0R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F0R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F0R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F0R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F0R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F0R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F0R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F0R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F0R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F0R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F0R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F0R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F0R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F0R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F0R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F0R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F0R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F0R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F0R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F0R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F0R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F1R2 register *******************/ +#define CAN_F1R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F1R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F1R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F1R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F1R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F1R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F1R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F1R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F1R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F1R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F1R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F1R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F1R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F1R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F1R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F1R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F1R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F1R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F1R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F1R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F1R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F1R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F1R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F1R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F1R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F1R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F1R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F1R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F1R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F1R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F1R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F1R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F2R2 register *******************/ +#define CAN_F2R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F2R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F2R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F2R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F2R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F2R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F2R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F2R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F2R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F2R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F2R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F2R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F2R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F2R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F2R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F2R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F2R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F2R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F2R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F2R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F2R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F2R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F2R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F2R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F2R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F2R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F2R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F2R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F2R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F2R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F2R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F2R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F3R2 register *******************/ +#define CAN_F3R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F3R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F3R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F3R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F3R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F3R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F3R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F3R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F3R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F3R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F3R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F3R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F3R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F3R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F3R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F3R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F3R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F3R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F3R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F3R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F3R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F3R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F3R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F3R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F3R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F3R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F3R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F3R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F3R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F3R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F3R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F3R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F4R2 register *******************/ +#define CAN_F4R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F4R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F4R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F4R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F4R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F4R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F4R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F4R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F4R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F4R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F4R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F4R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F4R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F4R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F4R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F4R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F4R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F4R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F4R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F4R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F4R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F4R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F4R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F4R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F4R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F4R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F4R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F4R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F4R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F4R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F4R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F4R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F5R2 register *******************/ +#define CAN_F5R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F5R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F5R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F5R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F5R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F5R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F5R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F5R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F5R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F5R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F5R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F5R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F5R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F5R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F5R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F5R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F5R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F5R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F5R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F5R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F5R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F5R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F5R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F5R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F5R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F5R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F5R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F5R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F5R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F5R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F5R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F5R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F6R2 register *******************/ +#define CAN_F6R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F6R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F6R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F6R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F6R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F6R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F6R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F6R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F6R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F6R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F6R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F6R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F6R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F6R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F6R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F6R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F6R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F6R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F6R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F6R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F6R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F6R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F6R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F6R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F6R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F6R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F6R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F6R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F6R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F6R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F6R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F6R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F7R2 register *******************/ +#define CAN_F7R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F7R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F7R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F7R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F7R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F7R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F7R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F7R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F7R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F7R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F7R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F7R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F7R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F7R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F7R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F7R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F7R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F7R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F7R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F7R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F7R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F7R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F7R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F7R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F7R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F7R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F7R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F7R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F7R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F7R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F7R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F7R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F8R2 register *******************/ +#define CAN_F8R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F8R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F8R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F8R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F8R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F8R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F8R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F8R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F8R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F8R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F8R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F8R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F8R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F8R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F8R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F8R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F8R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F8R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F8R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F8R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F8R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F8R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F8R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F8R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F8R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F8R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F8R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F8R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F8R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F8R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F8R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F8R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F9R2 register *******************/ +#define CAN_F9R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F9R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F9R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F9R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F9R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F9R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F9R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F9R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F9R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F9R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F9R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F9R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F9R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F9R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F9R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F9R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F9R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F9R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F9R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F9R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F9R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F9R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F9R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F9R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F9R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F9R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F9R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F9R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F9R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F9R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F9R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F9R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F10R2 register ******************/ +#define CAN_F10R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F10R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F10R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F10R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F10R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F10R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F10R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F10R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F10R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F10R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F10R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F10R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F10R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F10R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F10R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F10R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F10R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F10R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F10R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F10R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F10R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F10R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F10R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F10R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F10R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F10R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F10R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F10R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F10R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F10R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F10R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F10R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F11R2 register ******************/ +#define CAN_F11R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F11R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F11R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F11R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F11R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F11R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F11R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F11R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F11R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F11R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F11R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F11R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F11R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F11R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F11R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F11R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F11R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F11R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F11R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F11R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F11R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F11R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F11R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F11R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F11R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F11R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F11R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F11R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F11R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F11R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F11R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F11R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F12R2 register ******************/ +#define CAN_F12R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F12R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F12R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F12R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F12R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F12R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F12R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F12R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F12R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F12R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F12R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F12R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F12R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F12R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F12R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F12R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F12R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F12R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F12R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F12R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F12R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F12R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F12R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F12R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F12R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F12R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F12R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F12R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F12R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F12R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F12R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F12R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F13R2 register ******************/ +#define CAN_F13R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F13R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F13R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F13R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F13R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F13R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F13R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F13R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F13R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F13R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F13R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F13R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F13R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F13R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F13R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F13R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F13R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F13R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F13R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F13R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F13R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F13R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F13R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F13R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F13R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F13R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F13R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F13R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F13R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F13R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F13R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F13R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************************************************************************/ +/* */ +/* Serial Peripheral Interface */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for SPI_CR1 register ********************/ +#define SPI_CR1_CPHA ((uint16_t)0x0001) /*!< Clock Phase */ +#define SPI_CR1_CPOL ((uint16_t)0x0002) /*!< Clock Polarity */ +#define SPI_CR1_MSTR ((uint16_t)0x0004) /*!< Master Selection */ + +#define SPI_CR1_BR ((uint16_t)0x0038) /*!< BR[2:0] bits (Baud Rate Control) */ +#define SPI_CR1_BR_0 ((uint16_t)0x0008) /*!< Bit 0 */ +#define SPI_CR1_BR_1 ((uint16_t)0x0010) /*!< Bit 1 */ +#define SPI_CR1_BR_2 ((uint16_t)0x0020) /*!< Bit 2 */ + +#define SPI_CR1_SPE ((uint16_t)0x0040) /*!< SPI Enable */ +#define SPI_CR1_LSBFIRST ((uint16_t)0x0080) /*!< Frame Format */ +#define SPI_CR1_SSI ((uint16_t)0x0100) /*!< Internal slave select */ +#define SPI_CR1_SSM ((uint16_t)0x0200) /*!< Software slave management */ +#define SPI_CR1_RXONLY ((uint16_t)0x0400) /*!< Receive only */ +#define SPI_CR1_DFF ((uint16_t)0x0800) /*!< Data Frame Format */ +#define SPI_CR1_CRCNEXT ((uint16_t)0x1000) /*!< Transmit CRC next */ +#define SPI_CR1_CRCEN ((uint16_t)0x2000) /*!< Hardware CRC calculation enable */ +#define SPI_CR1_BIDIOE ((uint16_t)0x4000) /*!< Output enable in bidirectional mode */ +#define SPI_CR1_BIDIMODE ((uint16_t)0x8000) /*!< Bidirectional data mode enable */ + +/******************* Bit definition for SPI_CR2 register ********************/ +#define SPI_CR2_RXDMAEN ((uint8_t)0x01) /*!< Rx Buffer DMA Enable */ +#define SPI_CR2_TXDMAEN ((uint8_t)0x02) /*!< Tx Buffer DMA Enable */ +#define SPI_CR2_SSOE ((uint8_t)0x04) /*!< SS Output Enable */ +#define SPI_CR2_ERRIE ((uint8_t)0x20) /*!< Error Interrupt Enable */ +#define SPI_CR2_RXNEIE ((uint8_t)0x40) /*!< RX buffer Not Empty Interrupt Enable */ +#define SPI_CR2_TXEIE ((uint8_t)0x80) /*!< Tx buffer Empty Interrupt Enable */ + +/******************** Bit definition for SPI_SR register ********************/ +#define SPI_SR_RXNE ((uint8_t)0x01) /*!< Receive buffer Not Empty */ +#define SPI_SR_TXE ((uint8_t)0x02) /*!< Transmit buffer Empty */ +#define SPI_SR_CHSIDE ((uint8_t)0x04) /*!< Channel side */ +#define SPI_SR_UDR ((uint8_t)0x08) /*!< Underrun flag */ +#define SPI_SR_CRCERR ((uint8_t)0x10) /*!< CRC Error flag */ +#define SPI_SR_MODF ((uint8_t)0x20) /*!< Mode fault */ +#define SPI_SR_OVR ((uint8_t)0x40) /*!< Overrun flag */ +#define SPI_SR_BSY ((uint8_t)0x80) /*!< Busy flag */ + +/******************** Bit definition for SPI_DR register ********************/ +#define SPI_DR_DR ((uint16_t)0xFFFF) /*!< Data Register */ + +/******************* Bit definition for SPI_CRCPR register ******************/ +#define SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF) /*!< CRC polynomial register */ + +/****************** Bit definition for SPI_RXCRCR register ******************/ +#define SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF) /*!< Rx CRC Register */ + +/****************** Bit definition for SPI_TXCRCR register ******************/ +#define SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF) /*!< Tx CRC Register */ + +/****************** Bit definition for SPI_I2SCFGR register *****************/ +#define SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) /*!< Channel length (number of bits per audio channel) */ + +#define SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) /*!< DATLEN[1:0] bits (Data length to be transferred) */ +#define SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) /*!< Bit 0 */ +#define SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) /*!< Bit 1 */ + +#define SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) /*!< steady state clock polarity */ + +#define SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) /*!< I2SSTD[1:0] bits (I2S standard selection) */ +#define SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) /*!< PCM frame synchronization */ + +#define SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) /*!< I2SCFG[1:0] bits (I2S configuration mode) */ +#define SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define SPI_I2SCFGR_I2SE ((uint16_t)0x0400) /*!< I2S Enable */ +#define SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) /*!< I2S mode selection */ + +/****************** Bit definition for SPI_I2SPR register *******************/ +#define SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) /*!< I2S Linear prescaler */ +#define SPI_I2SPR_ODD ((uint16_t)0x0100) /*!< Odd factor for the prescaler */ +#define SPI_I2SPR_MCKOE ((uint16_t)0x0200) /*!< Master Clock Output Enable */ + +/******************************************************************************/ +/* */ +/* Inter-integrated Circuit Interface */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for I2C_CR1 register ********************/ +#define I2C_CR1_PE ((uint16_t)0x0001) /*!< Peripheral Enable */ +#define I2C_CR1_SMBUS ((uint16_t)0x0002) /*!< SMBus Mode */ +#define I2C_CR1_SMBTYPE ((uint16_t)0x0008) /*!< SMBus Type */ +#define I2C_CR1_ENARP ((uint16_t)0x0010) /*!< ARP Enable */ +#define I2C_CR1_ENPEC ((uint16_t)0x0020) /*!< PEC Enable */ +#define I2C_CR1_ENGC ((uint16_t)0x0040) /*!< General Call Enable */ +#define I2C_CR1_NOSTRETCH ((uint16_t)0x0080) /*!< Clock Stretching Disable (Slave mode) */ +#define I2C_CR1_START ((uint16_t)0x0100) /*!< Start Generation */ +#define I2C_CR1_STOP ((uint16_t)0x0200) /*!< Stop Generation */ +#define I2C_CR1_ACK ((uint16_t)0x0400) /*!< Acknowledge Enable */ +#define I2C_CR1_POS ((uint16_t)0x0800) /*!< Acknowledge/PEC Position (for data reception) */ +#define I2C_CR1_PEC ((uint16_t)0x1000) /*!< Packet Error Checking */ +#define I2C_CR1_ALERT ((uint16_t)0x2000) /*!< SMBus Alert */ +#define I2C_CR1_SWRST ((uint16_t)0x8000) /*!< Software Reset */ + +/******************* Bit definition for I2C_CR2 register ********************/ +#define I2C_CR2_FREQ ((uint16_t)0x003F) /*!< FREQ[5:0] bits (Peripheral Clock Frequency) */ +#define I2C_CR2_FREQ_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define I2C_CR2_FREQ_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define I2C_CR2_FREQ_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define I2C_CR2_FREQ_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define I2C_CR2_FREQ_4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define I2C_CR2_FREQ_5 ((uint16_t)0x0020) /*!< Bit 5 */ + +#define I2C_CR2_ITERREN ((uint16_t)0x0100) /*!< Error Interrupt Enable */ +#define I2C_CR2_ITEVTEN ((uint16_t)0x0200) /*!< Event Interrupt Enable */ +#define I2C_CR2_ITBUFEN ((uint16_t)0x0400) /*!< Buffer Interrupt Enable */ +#define I2C_CR2_DMAEN ((uint16_t)0x0800) /*!< DMA Requests Enable */ +#define I2C_CR2_LAST ((uint16_t)0x1000) /*!< DMA Last Transfer */ + +/******************* Bit definition for I2C_OAR1 register *******************/ +#define I2C_OAR1_ADD1_7 ((uint16_t)0x00FE) /*!< Interface Address */ +#define I2C_OAR1_ADD8_9 ((uint16_t)0x0300) /*!< Interface Address */ + +#define I2C_OAR1_ADD0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define I2C_OAR1_ADD1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define I2C_OAR1_ADD2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define I2C_OAR1_ADD3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define I2C_OAR1_ADD4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define I2C_OAR1_ADD5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define I2C_OAR1_ADD6 ((uint16_t)0x0040) /*!< Bit 6 */ +#define I2C_OAR1_ADD7 ((uint16_t)0x0080) /*!< Bit 7 */ +#define I2C_OAR1_ADD8 ((uint16_t)0x0100) /*!< Bit 8 */ +#define I2C_OAR1_ADD9 ((uint16_t)0x0200) /*!< Bit 9 */ + +#define I2C_OAR1_ADDMODE ((uint16_t)0x8000) /*!< Addressing Mode (Slave mode) */ + +/******************* Bit definition for I2C_OAR2 register *******************/ +#define I2C_OAR2_ENDUAL ((uint8_t)0x01) /*!< Dual addressing mode enable */ +#define I2C_OAR2_ADD2 ((uint8_t)0xFE) /*!< Interface address */ + +/******************** Bit definition for I2C_DR register ********************/ +#define I2C_DR_DR ((uint8_t)0xFF) /*!< 8-bit Data Register */ + +/******************* Bit definition for I2C_SR1 register ********************/ +#define I2C_SR1_SB ((uint16_t)0x0001) /*!< Start Bit (Master mode) */ +#define I2C_SR1_ADDR ((uint16_t)0x0002) /*!< Address sent (master mode)/matched (slave mode) */ +#define I2C_SR1_BTF ((uint16_t)0x0004) /*!< Byte Transfer Finished */ +#define I2C_SR1_ADD10 ((uint16_t)0x0008) /*!< 10-bit header sent (Master mode) */ +#define I2C_SR1_STOPF ((uint16_t)0x0010) /*!< Stop detection (Slave mode) */ +#define I2C_SR1_RXNE ((uint16_t)0x0040) /*!< Data Register not Empty (receivers) */ +#define I2C_SR1_TXE ((uint16_t)0x0080) /*!< Data Register Empty (transmitters) */ +#define I2C_SR1_BERR ((uint16_t)0x0100) /*!< Bus Error */ +#define I2C_SR1_ARLO ((uint16_t)0x0200) /*!< Arbitration Lost (master mode) */ +#define I2C_SR1_AF ((uint16_t)0x0400) /*!< Acknowledge Failure */ +#define I2C_SR1_OVR ((uint16_t)0x0800) /*!< Overrun/Underrun */ +#define I2C_SR1_PECERR ((uint16_t)0x1000) /*!< PEC Error in reception */ +#define I2C_SR1_TIMEOUT ((uint16_t)0x4000) /*!< Timeout or Tlow Error */ +#define I2C_SR1_SMBALERT ((uint16_t)0x8000) /*!< SMBus Alert */ + +/******************* Bit definition for I2C_SR2 register ********************/ +#define I2C_SR2_MSL ((uint16_t)0x0001) /*!< Master/Slave */ +#define I2C_SR2_BUSY ((uint16_t)0x0002) /*!< Bus Busy */ +#define I2C_SR2_TRA ((uint16_t)0x0004) /*!< Transmitter/Receiver */ +#define I2C_SR2_GENCALL ((uint16_t)0x0010) /*!< General Call Address (Slave mode) */ +#define I2C_SR2_SMBDEFAULT ((uint16_t)0x0020) /*!< SMBus Device Default Address (Slave mode) */ +#define I2C_SR2_SMBHOST ((uint16_t)0x0040) /*!< SMBus Host Header (Slave mode) */ +#define I2C_SR2_DUALF ((uint16_t)0x0080) /*!< Dual Flag (Slave mode) */ +#define I2C_SR2_PEC ((uint16_t)0xFF00) /*!< Packet Error Checking Register */ + +/******************* Bit definition for I2C_CCR register ********************/ +#define I2C_CCR_CCR ((uint16_t)0x0FFF) /*!< Clock Control Register in Fast/Standard mode (Master mode) */ +#define I2C_CCR_DUTY ((uint16_t)0x4000) /*!< Fast Mode Duty Cycle */ +#define I2C_CCR_FS ((uint16_t)0x8000) /*!< I2C Master Mode Selection */ + +/****************** Bit definition for I2C_TRISE register *******************/ +#define I2C_TRISE_TRISE ((uint8_t)0x3F) /*!< Maximum Rise Time in Fast/Standard mode (Master mode) */ + +/******************************************************************************/ +/* */ +/* Universal Synchronous Asynchronous Receiver Transmitter */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for USART_SR register *******************/ +#define USART_SR_PE ((uint16_t)0x0001) /*!< Parity Error */ +#define USART_SR_FE ((uint16_t)0x0002) /*!< Framing Error */ +#define USART_SR_NE ((uint16_t)0x0004) /*!< Noise Error Flag */ +#define USART_SR_ORE ((uint16_t)0x0008) /*!< OverRun Error */ +#define USART_SR_IDLE ((uint16_t)0x0010) /*!< IDLE line detected */ +#define USART_SR_RXNE ((uint16_t)0x0020) /*!< Read Data Register Not Empty */ +#define USART_SR_TC ((uint16_t)0x0040) /*!< Transmission Complete */ +#define USART_SR_TXE ((uint16_t)0x0080) /*!< Transmit Data Register Empty */ +#define USART_SR_LBD ((uint16_t)0x0100) /*!< LIN Break Detection Flag */ +#define USART_SR_CTS ((uint16_t)0x0200) /*!< CTS Flag */ + +/******************* Bit definition for USART_DR register *******************/ +#define USART_DR_DR ((uint16_t)0x01FF) /*!< Data value */ + +/****************** Bit definition for USART_BRR register *******************/ +#define USART_BRR_DIV_Fraction ((uint16_t)0x000F) /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) /*!< Mantissa of USARTDIV */ + +/****************** Bit definition for USART_CR1 register *******************/ +#define USART_CR1_SBK ((uint16_t)0x0001) /*!< Send Break */ +#define USART_CR1_RWU ((uint16_t)0x0002) /*!< Receiver wakeup */ +#define USART_CR1_RE ((uint16_t)0x0004) /*!< Receiver Enable */ +#define USART_CR1_TE ((uint16_t)0x0008) /*!< Transmitter Enable */ +#define USART_CR1_IDLEIE ((uint16_t)0x0010) /*!< IDLE Interrupt Enable */ +#define USART_CR1_RXNEIE ((uint16_t)0x0020) /*!< RXNE Interrupt Enable */ +#define USART_CR1_TCIE ((uint16_t)0x0040) /*!< Transmission Complete Interrupt Enable */ +#define USART_CR1_TXEIE ((uint16_t)0x0080) /*!< PE Interrupt Enable */ +#define USART_CR1_PEIE ((uint16_t)0x0100) /*!< PE Interrupt Enable */ +#define USART_CR1_PS ((uint16_t)0x0200) /*!< Parity Selection */ +#define USART_CR1_PCE ((uint16_t)0x0400) /*!< Parity Control Enable */ +#define USART_CR1_WAKE ((uint16_t)0x0800) /*!< Wakeup method */ +#define USART_CR1_M ((uint16_t)0x1000) /*!< Word length */ +#define USART_CR1_UE ((uint16_t)0x2000) /*!< USART Enable */ +#define USART_CR1_OVER8 ((uint16_t)0x8000) /*!< USART Oversmapling 8-bits */ + +/****************** Bit definition for USART_CR2 register *******************/ +#define USART_CR2_ADD ((uint16_t)0x000F) /*!< Address of the USART node */ +#define USART_CR2_LBDL ((uint16_t)0x0020) /*!< LIN Break Detection Length */ +#define USART_CR2_LBDIE ((uint16_t)0x0040) /*!< LIN Break Detection Interrupt Enable */ +#define USART_CR2_LBCL ((uint16_t)0x0100) /*!< Last Bit Clock pulse */ +#define USART_CR2_CPHA ((uint16_t)0x0200) /*!< Clock Phase */ +#define USART_CR2_CPOL ((uint16_t)0x0400) /*!< Clock Polarity */ +#define USART_CR2_CLKEN ((uint16_t)0x0800) /*!< Clock Enable */ + +#define USART_CR2_STOP ((uint16_t)0x3000) /*!< STOP[1:0] bits (STOP bits) */ +#define USART_CR2_STOP_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USART_CR2_STOP_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USART_CR2_LINEN ((uint16_t)0x4000) /*!< LIN mode enable */ + +/****************** Bit definition for USART_CR3 register *******************/ +#define USART_CR3_EIE ((uint16_t)0x0001) /*!< Error Interrupt Enable */ +#define USART_CR3_IREN ((uint16_t)0x0002) /*!< IrDA mode Enable */ +#define USART_CR3_IRLP ((uint16_t)0x0004) /*!< IrDA Low-Power */ +#define USART_CR3_HDSEL ((uint16_t)0x0008) /*!< Half-Duplex Selection */ +#define USART_CR3_NACK ((uint16_t)0x0010) /*!< Smartcard NACK enable */ +#define USART_CR3_SCEN ((uint16_t)0x0020) /*!< Smartcard mode enable */ +#define USART_CR3_DMAR ((uint16_t)0x0040) /*!< DMA Enable Receiver */ +#define USART_CR3_DMAT ((uint16_t)0x0080) /*!< DMA Enable Transmitter */ +#define USART_CR3_RTSE ((uint16_t)0x0100) /*!< RTS Enable */ +#define USART_CR3_CTSE ((uint16_t)0x0200) /*!< CTS Enable */ +#define USART_CR3_CTSIE ((uint16_t)0x0400) /*!< CTS Interrupt Enable */ +#define USART_CR3_ONEBIT ((uint16_t)0x0800) /*!< One Bit method */ + +/****************** Bit definition for USART_GTPR register ******************/ +#define USART_GTPR_PSC ((uint16_t)0x00FF) /*!< PSC[7:0] bits (Prescaler value) */ +#define USART_GTPR_PSC_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define USART_GTPR_PSC_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define USART_GTPR_PSC_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define USART_GTPR_PSC_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define USART_GTPR_PSC_4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define USART_GTPR_PSC_5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define USART_GTPR_PSC_6 ((uint16_t)0x0040) /*!< Bit 6 */ +#define USART_GTPR_PSC_7 ((uint16_t)0x0080) /*!< Bit 7 */ + +#define USART_GTPR_GT ((uint16_t)0xFF00) /*!< Guard time value */ + +/******************************************************************************/ +/* */ +/* Debug MCU */ +/* */ +/******************************************************************************/ + +/**************** Bit definition for DBGMCU_IDCODE register *****************/ +#define DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF) /*!< Device Identifier */ + +#define DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000) /*!< REV_ID[15:0] bits (Revision Identifier) */ +#define DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000) /*!< Bit 7 */ +#define DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000) /*!< Bit 8 */ +#define DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000) /*!< Bit 9 */ +#define DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000) /*!< Bit 10 */ +#define DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000) /*!< Bit 11 */ +#define DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000) /*!< Bit 12 */ +#define DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000) /*!< Bit 13 */ +#define DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000) /*!< Bit 14 */ +#define DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000) /*!< Bit 15 */ + +/****************** Bit definition for DBGMCU_CR register *******************/ +#define DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001) /*!< Debug Sleep Mode */ +#define DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002) /*!< Debug Stop Mode */ +#define DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004) /*!< Debug Standby mode */ +#define DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020) /*!< Trace Pin Assignment Control */ + +#define DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0) /*!< TRACE_MODE[1:0] bits (Trace Pin Assignment Control) */ +#define DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define DBGMCU_CR_DBG_IWDG_STOP ((uint32_t)0x00000100) /*!< Debug Independent Watchdog stopped when Core is halted */ +#define DBGMCU_CR_DBG_WWDG_STOP ((uint32_t)0x00000200) /*!< Debug Window Watchdog stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM1_STOP ((uint32_t)0x00000400) /*!< TIM1 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM2_STOP ((uint32_t)0x00000800) /*!< TIM2 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM3_STOP ((uint32_t)0x00001000) /*!< TIM3 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM4_STOP ((uint32_t)0x00002000) /*!< TIM4 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_CAN1_STOP ((uint32_t)0x00004000) /*!< Debug CAN1 stopped when Core is halted */ +#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) /*!< SMBUS timeout mode stopped when Core is halted */ +#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) /*!< SMBUS timeout mode stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM8_STOP ((uint32_t)0x00020000) /*!< TIM8 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM5_STOP ((uint32_t)0x00040000) /*!< TIM5 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM6_STOP ((uint32_t)0x00080000) /*!< TIM6 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM7_STOP ((uint32_t)0x00100000) /*!< TIM7 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_CAN2_STOP ((uint32_t)0x00200000) /*!< Debug CAN2 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM15_STOP ((uint32_t)0x00400000) /*!< Debug TIM15 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM16_STOP ((uint32_t)0x00800000) /*!< Debug TIM16 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM17_STOP ((uint32_t)0x01000000) /*!< Debug TIM17 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM12_STOP ((uint32_t)0x02000000) /*!< Debug TIM12 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM13_STOP ((uint32_t)0x04000000) /*!< Debug TIM13 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM14_STOP ((uint32_t)0x08000000) /*!< Debug TIM14 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM9_STOP ((uint32_t)0x10000000) /*!< Debug TIM9 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM10_STOP ((uint32_t)0x20000000) /*!< Debug TIM10 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM11_STOP ((uint32_t)0x40000000) /*!< Debug TIM11 stopped when Core is halted */ + +/******************************************************************************/ +/* */ +/* FLASH and Option Bytes Registers */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for FLASH_ACR register ******************/ +#define FLASH_ACR_LATENCY ((uint8_t)0x03) /*!< LATENCY[2:0] bits (Latency) */ +#define FLASH_ACR_LATENCY_0 ((uint8_t)0x00) /*!< Bit 0 */ +#define FLASH_ACR_LATENCY_1 ((uint8_t)0x01) /*!< Bit 0 */ +#define FLASH_ACR_LATENCY_2 ((uint8_t)0x02) /*!< Bit 1 */ + +#define FLASH_ACR_HLFCYA ((uint8_t)0x08) /*!< Flash Half Cycle Access Enable */ +#define FLASH_ACR_PRFTBE ((uint8_t)0x10) /*!< Prefetch Buffer Enable */ +#define FLASH_ACR_PRFTBS ((uint8_t)0x20) /*!< Prefetch Buffer Status */ + +/****************** Bit definition for FLASH_KEYR register ******************/ +#define FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF) /*!< FPEC Key */ + +/***************** Bit definition for FLASH_OPTKEYR register ****************/ +#define FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF) /*!< Option Byte Key */ + +/****************** Bit definition for FLASH_SR register *******************/ +#define FLASH_SR_BSY ((uint8_t)0x01) /*!< Busy */ +#define FLASH_SR_PGERR ((uint8_t)0x04) /*!< Programming Error */ +#define FLASH_SR_WRPRTERR ((uint8_t)0x10) /*!< Write Protection Error */ +#define FLASH_SR_EOP ((uint8_t)0x20) /*!< End of operation */ + +/******************* Bit definition for FLASH_CR register *******************/ +#define FLASH_CR_PG ((uint16_t)0x0001) /*!< Programming */ +#define FLASH_CR_PER ((uint16_t)0x0002) /*!< Page Erase */ +#define FLASH_CR_MER ((uint16_t)0x0004) /*!< Mass Erase */ +#define FLASH_CR_OPTPG ((uint16_t)0x0010) /*!< Option Byte Programming */ +#define FLASH_CR_OPTER ((uint16_t)0x0020) /*!< Option Byte Erase */ +#define FLASH_CR_STRT ((uint16_t)0x0040) /*!< Start */ +#define FLASH_CR_LOCK ((uint16_t)0x0080) /*!< Lock */ +#define FLASH_CR_OPTWRE ((uint16_t)0x0200) /*!< Option Bytes Write Enable */ +#define FLASH_CR_ERRIE ((uint16_t)0x0400) /*!< Error Interrupt Enable */ +#define FLASH_CR_EOPIE ((uint16_t)0x1000) /*!< End of operation interrupt enable */ + +/******************* Bit definition for FLASH_AR register *******************/ +#define FLASH_AR_FAR ((uint32_t)0xFFFFFFFF) /*!< Flash Address */ + +/****************** Bit definition for FLASH_OBR register *******************/ +#define FLASH_OBR_OPTERR ((uint16_t)0x0001) /*!< Option Byte Error */ +#define FLASH_OBR_RDPRT ((uint16_t)0x0002) /*!< Read protection */ + +#define FLASH_OBR_USER ((uint16_t)0x03FC) /*!< User Option Bytes */ +#define FLASH_OBR_WDG_SW ((uint16_t)0x0004) /*!< WDG_SW */ +#define FLASH_OBR_nRST_STOP ((uint16_t)0x0008) /*!< nRST_STOP */ +#define FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) /*!< nRST_STDBY */ +#define FLASH_OBR_BFB2 ((uint16_t)0x0020) /*!< BFB2 */ + +/****************** Bit definition for FLASH_WRPR register ******************/ +#define FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF) /*!< Write Protect */ + +/*----------------------------------------------------------------------------*/ + +/****************** Bit definition for FLASH_RDP register *******************/ +#define FLASH_RDP_RDP ((uint32_t)0x000000FF) /*!< Read protection option byte */ +#define FLASH_RDP_nRDP ((uint32_t)0x0000FF00) /*!< Read protection complemented option byte */ + +/****************** Bit definition for FLASH_USER register ******************/ +#define FLASH_USER_USER ((uint32_t)0x00FF0000) /*!< User option byte */ +#define FLASH_USER_nUSER ((uint32_t)0xFF000000) /*!< User complemented option byte */ + +/****************** Bit definition for FLASH_Data0 register *****************/ +#define FLASH_Data0_Data0 ((uint32_t)0x000000FF) /*!< User data storage option byte */ +#define FLASH_Data0_nData0 ((uint32_t)0x0000FF00) /*!< User data storage complemented option byte */ + +/****************** Bit definition for FLASH_Data1 register *****************/ +#define FLASH_Data1_Data1 ((uint32_t)0x00FF0000) /*!< User data storage option byte */ +#define FLASH_Data1_nData1 ((uint32_t)0xFF000000) /*!< User data storage complemented option byte */ + +/****************** Bit definition for FLASH_WRP0 register ******************/ +#define FLASH_WRP0_WRP0 ((uint32_t)0x000000FF) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP0_nWRP0 ((uint32_t)0x0000FF00) /*!< Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRP1 register ******************/ +#define FLASH_WRP1_WRP1 ((uint32_t)0x00FF0000) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP1_nWRP1 ((uint32_t)0xFF000000) /*!< Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRP2 register ******************/ +#define FLASH_WRP2_WRP2 ((uint32_t)0x000000FF) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP2_nWRP2 ((uint32_t)0x0000FF00) /*!< Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRP3 register ******************/ +#define FLASH_WRP3_WRP3 ((uint32_t)0x00FF0000) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP3_nWRP3 ((uint32_t)0xFF000000) /*!< Flash memory write protection complemented option bytes */ + +#ifdef STM32F10X_CL +/******************************************************************************/ +/* Ethernet MAC Registers bits definitions */ +/******************************************************************************/ +/* Bit definition for Ethernet MAC Control Register register */ +#define ETH_MACCR_WD ((uint32_t)0x00800000) /* Watchdog disable */ +#define ETH_MACCR_JD ((uint32_t)0x00400000) /* Jabber disable */ +#define ETH_MACCR_IFG ((uint32_t)0x000E0000) /* Inter-frame gap */ + #define ETH_MACCR_IFG_96Bit ((uint32_t)0x00000000) /* Minimum IFG between frames during transmission is 96Bit */ + #define ETH_MACCR_IFG_88Bit ((uint32_t)0x00020000) /* Minimum IFG between frames during transmission is 88Bit */ + #define ETH_MACCR_IFG_80Bit ((uint32_t)0x00040000) /* Minimum IFG between frames during transmission is 80Bit */ + #define ETH_MACCR_IFG_72Bit ((uint32_t)0x00060000) /* Minimum IFG between frames during transmission is 72Bit */ + #define ETH_MACCR_IFG_64Bit ((uint32_t)0x00080000) /* Minimum IFG between frames during transmission is 64Bit */ + #define ETH_MACCR_IFG_56Bit ((uint32_t)0x000A0000) /* Minimum IFG between frames during transmission is 56Bit */ + #define ETH_MACCR_IFG_48Bit ((uint32_t)0x000C0000) /* Minimum IFG between frames during transmission is 48Bit */ + #define ETH_MACCR_IFG_40Bit ((uint32_t)0x000E0000) /* Minimum IFG between frames during transmission is 40Bit */ +#define ETH_MACCR_CSD ((uint32_t)0x00010000) /* Carrier sense disable (during transmission) */ +#define ETH_MACCR_FES ((uint32_t)0x00004000) /* Fast ethernet speed */ +#define ETH_MACCR_ROD ((uint32_t)0x00002000) /* Receive own disable */ +#define ETH_MACCR_LM ((uint32_t)0x00001000) /* loopback mode */ +#define ETH_MACCR_DM ((uint32_t)0x00000800) /* Duplex mode */ +#define ETH_MACCR_IPCO ((uint32_t)0x00000400) /* IP Checksum offload */ +#define ETH_MACCR_RD ((uint32_t)0x00000200) /* Retry disable */ +#define ETH_MACCR_APCS ((uint32_t)0x00000080) /* Automatic Pad/CRC stripping */ +#define ETH_MACCR_BL ((uint32_t)0x00000060) /* Back-off limit: random integer number (r) of slot time delays before rescheduling + a transmission attempt during retries after a collision: 0 =< r <2^k */ + #define ETH_MACCR_BL_10 ((uint32_t)0x00000000) /* k = min (n, 10) */ + #define ETH_MACCR_BL_8 ((uint32_t)0x00000020) /* k = min (n, 8) */ + #define ETH_MACCR_BL_4 ((uint32_t)0x00000040) /* k = min (n, 4) */ + #define ETH_MACCR_BL_1 ((uint32_t)0x00000060) /* k = min (n, 1) */ +#define ETH_MACCR_DC ((uint32_t)0x00000010) /* Defferal check */ +#define ETH_MACCR_TE ((uint32_t)0x00000008) /* Transmitter enable */ +#define ETH_MACCR_RE ((uint32_t)0x00000004) /* Receiver enable */ + +/* Bit definition for Ethernet MAC Frame Filter Register */ +#define ETH_MACFFR_RA ((uint32_t)0x80000000) /* Receive all */ +#define ETH_MACFFR_HPF ((uint32_t)0x00000400) /* Hash or perfect filter */ +#define ETH_MACFFR_SAF ((uint32_t)0x00000200) /* Source address filter enable */ +#define ETH_MACFFR_SAIF ((uint32_t)0x00000100) /* SA inverse filtering */ +#define ETH_MACFFR_PCF ((uint32_t)0x000000C0) /* Pass control frames: 3 cases */ + #define ETH_MACFFR_PCF_BlockAll ((uint32_t)0x00000040) /* MAC filters all control frames from reaching the application */ + #define ETH_MACFFR_PCF_ForwardAll ((uint32_t)0x00000080) /* MAC forwards all control frames to application even if they fail the Address Filter */ + #define ETH_MACFFR_PCF_ForwardPassedAddrFilter ((uint32_t)0x000000C0) /* MAC forwards control frames that pass the Address Filter. */ +#define ETH_MACFFR_BFD ((uint32_t)0x00000020) /* Broadcast frame disable */ +#define ETH_MACFFR_PAM ((uint32_t)0x00000010) /* Pass all mutlicast */ +#define ETH_MACFFR_DAIF ((uint32_t)0x00000008) /* DA Inverse filtering */ +#define ETH_MACFFR_HM ((uint32_t)0x00000004) /* Hash multicast */ +#define ETH_MACFFR_HU ((uint32_t)0x00000002) /* Hash unicast */ +#define ETH_MACFFR_PM ((uint32_t)0x00000001) /* Promiscuous mode */ + +/* Bit definition for Ethernet MAC Hash Table High Register */ +#define ETH_MACHTHR_HTH ((uint32_t)0xFFFFFFFF) /* Hash table high */ + +/* Bit definition for Ethernet MAC Hash Table Low Register */ +#define ETH_MACHTLR_HTL ((uint32_t)0xFFFFFFFF) /* Hash table low */ + +/* Bit definition for Ethernet MAC MII Address Register */ +#define ETH_MACMIIAR_PA ((uint32_t)0x0000F800) /* Physical layer address */ +#define ETH_MACMIIAR_MR ((uint32_t)0x000007C0) /* MII register in the selected PHY */ +#define ETH_MACMIIAR_CR ((uint32_t)0x0000001C) /* CR clock range: 6 cases */ + #define ETH_MACMIIAR_CR_Div42 ((uint32_t)0x00000000) /* HCLK:60-72 MHz; MDC clock= HCLK/42 */ + #define ETH_MACMIIAR_CR_Div16 ((uint32_t)0x00000008) /* HCLK:20-35 MHz; MDC clock= HCLK/16 */ + #define ETH_MACMIIAR_CR_Div26 ((uint32_t)0x0000000C) /* HCLK:35-60 MHz; MDC clock= HCLK/26 */ +#define ETH_MACMIIAR_MW ((uint32_t)0x00000002) /* MII write */ +#define ETH_MACMIIAR_MB ((uint32_t)0x00000001) /* MII busy */ + +/* Bit definition for Ethernet MAC MII Data Register */ +#define ETH_MACMIIDR_MD ((uint32_t)0x0000FFFF) /* MII data: read/write data from/to PHY */ + +/* Bit definition for Ethernet MAC Flow Control Register */ +#define ETH_MACFCR_PT ((uint32_t)0xFFFF0000) /* Pause time */ +#define ETH_MACFCR_ZQPD ((uint32_t)0x00000080) /* Zero-quanta pause disable */ +#define ETH_MACFCR_PLT ((uint32_t)0x00000030) /* Pause low threshold: 4 cases */ + #define ETH_MACFCR_PLT_Minus4 ((uint32_t)0x00000000) /* Pause time minus 4 slot times */ + #define ETH_MACFCR_PLT_Minus28 ((uint32_t)0x00000010) /* Pause time minus 28 slot times */ + #define ETH_MACFCR_PLT_Minus144 ((uint32_t)0x00000020) /* Pause time minus 144 slot times */ + #define ETH_MACFCR_PLT_Minus256 ((uint32_t)0x00000030) /* Pause time minus 256 slot times */ +#define ETH_MACFCR_UPFD ((uint32_t)0x00000008) /* Unicast pause frame detect */ +#define ETH_MACFCR_RFCE ((uint32_t)0x00000004) /* Receive flow control enable */ +#define ETH_MACFCR_TFCE ((uint32_t)0x00000002) /* Transmit flow control enable */ +#define ETH_MACFCR_FCBBPA ((uint32_t)0x00000001) /* Flow control busy/backpressure activate */ + +/* Bit definition for Ethernet MAC VLAN Tag Register */ +#define ETH_MACVLANTR_VLANTC ((uint32_t)0x00010000) /* 12-bit VLAN tag comparison */ +#define ETH_MACVLANTR_VLANTI ((uint32_t)0x0000FFFF) /* VLAN tag identifier (for receive frames) */ + +/* Bit definition for Ethernet MAC Remote Wake-UpFrame Filter Register */ +#define ETH_MACRWUFFR_D ((uint32_t)0xFFFFFFFF) /* Wake-up frame filter register data */ +/* Eight sequential Writes to this address (offset 0x28) will write all Wake-UpFrame Filter Registers. + Eight sequential Reads from this address (offset 0x28) will read all Wake-UpFrame Filter Registers. */ +/* Wake-UpFrame Filter Reg0 : Filter 0 Byte Mask + Wake-UpFrame Filter Reg1 : Filter 1 Byte Mask + Wake-UpFrame Filter Reg2 : Filter 2 Byte Mask + Wake-UpFrame Filter Reg3 : Filter 3 Byte Mask + Wake-UpFrame Filter Reg4 : RSVD - Filter3 Command - RSVD - Filter2 Command - + RSVD - Filter1 Command - RSVD - Filter0 Command + Wake-UpFrame Filter Re5 : Filter3 Offset - Filter2 Offset - Filter1 Offset - Filter0 Offset + Wake-UpFrame Filter Re6 : Filter1 CRC16 - Filter0 CRC16 + Wake-UpFrame Filter Re7 : Filter3 CRC16 - Filter2 CRC16 */ + +/* Bit definition for Ethernet MAC PMT Control and Status Register */ +#define ETH_MACPMTCSR_WFFRPR ((uint32_t)0x80000000) /* Wake-Up Frame Filter Register Pointer Reset */ +#define ETH_MACPMTCSR_GU ((uint32_t)0x00000200) /* Global Unicast */ +#define ETH_MACPMTCSR_WFR ((uint32_t)0x00000040) /* Wake-Up Frame Received */ +#define ETH_MACPMTCSR_MPR ((uint32_t)0x00000020) /* Magic Packet Received */ +#define ETH_MACPMTCSR_WFE ((uint32_t)0x00000004) /* Wake-Up Frame Enable */ +#define ETH_MACPMTCSR_MPE ((uint32_t)0x00000002) /* Magic Packet Enable */ +#define ETH_MACPMTCSR_PD ((uint32_t)0x00000001) /* Power Down */ + +/* Bit definition for Ethernet MAC Status Register */ +#define ETH_MACSR_TSTS ((uint32_t)0x00000200) /* Time stamp trigger status */ +#define ETH_MACSR_MMCTS ((uint32_t)0x00000040) /* MMC transmit status */ +#define ETH_MACSR_MMMCRS ((uint32_t)0x00000020) /* MMC receive status */ +#define ETH_MACSR_MMCS ((uint32_t)0x00000010) /* MMC status */ +#define ETH_MACSR_PMTS ((uint32_t)0x00000008) /* PMT status */ + +/* Bit definition for Ethernet MAC Interrupt Mask Register */ +#define ETH_MACIMR_TSTIM ((uint32_t)0x00000200) /* Time stamp trigger interrupt mask */ +#define ETH_MACIMR_PMTIM ((uint32_t)0x00000008) /* PMT interrupt mask */ + +/* Bit definition for Ethernet MAC Address0 High Register */ +#define ETH_MACA0HR_MACA0H ((uint32_t)0x0000FFFF) /* MAC address0 high */ + +/* Bit definition for Ethernet MAC Address0 Low Register */ +#define ETH_MACA0LR_MACA0L ((uint32_t)0xFFFFFFFF) /* MAC address0 low */ + +/* Bit definition for Ethernet MAC Address1 High Register */ +#define ETH_MACA1HR_AE ((uint32_t)0x80000000) /* Address enable */ +#define ETH_MACA1HR_SA ((uint32_t)0x40000000) /* Source address */ +#define ETH_MACA1HR_MBC ((uint32_t)0x3F000000) /* Mask byte control: bits to mask for comparison of the MAC Address bytes */ + #define ETH_MACA1HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ + #define ETH_MACA1HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ + #define ETH_MACA1HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ + #define ETH_MACA1HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ + #define ETH_MACA1HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ + #define ETH_MACA1HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [7:0] */ +#define ETH_MACA1HR_MACA1H ((uint32_t)0x0000FFFF) /* MAC address1 high */ + +/* Bit definition for Ethernet MAC Address1 Low Register */ +#define ETH_MACA1LR_MACA1L ((uint32_t)0xFFFFFFFF) /* MAC address1 low */ + +/* Bit definition for Ethernet MAC Address2 High Register */ +#define ETH_MACA2HR_AE ((uint32_t)0x80000000) /* Address enable */ +#define ETH_MACA2HR_SA ((uint32_t)0x40000000) /* Source address */ +#define ETH_MACA2HR_MBC ((uint32_t)0x3F000000) /* Mask byte control */ + #define ETH_MACA2HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ + #define ETH_MACA2HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ + #define ETH_MACA2HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ + #define ETH_MACA2HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ + #define ETH_MACA2HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ + #define ETH_MACA2HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */ +#define ETH_MACA2HR_MACA2H ((uint32_t)0x0000FFFF) /* MAC address1 high */ + +/* Bit definition for Ethernet MAC Address2 Low Register */ +#define ETH_MACA2LR_MACA2L ((uint32_t)0xFFFFFFFF) /* MAC address2 low */ + +/* Bit definition for Ethernet MAC Address3 High Register */ +#define ETH_MACA3HR_AE ((uint32_t)0x80000000) /* Address enable */ +#define ETH_MACA3HR_SA ((uint32_t)0x40000000) /* Source address */ +#define ETH_MACA3HR_MBC ((uint32_t)0x3F000000) /* Mask byte control */ + #define ETH_MACA3HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ + #define ETH_MACA3HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ + #define ETH_MACA3HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ + #define ETH_MACA3HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ + #define ETH_MACA3HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ + #define ETH_MACA3HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */ +#define ETH_MACA3HR_MACA3H ((uint32_t)0x0000FFFF) /* MAC address3 high */ + +/* Bit definition for Ethernet MAC Address3 Low Register */ +#define ETH_MACA3LR_MACA3L ((uint32_t)0xFFFFFFFF) /* MAC address3 low */ + +/******************************************************************************/ +/* Ethernet MMC Registers bits definition */ +/******************************************************************************/ + +/* Bit definition for Ethernet MMC Contol Register */ +#define ETH_MMCCR_MCF ((uint32_t)0x00000008) /* MMC Counter Freeze */ +#define ETH_MMCCR_ROR ((uint32_t)0x00000004) /* Reset on Read */ +#define ETH_MMCCR_CSR ((uint32_t)0x00000002) /* Counter Stop Rollover */ +#define ETH_MMCCR_CR ((uint32_t)0x00000001) /* Counters Reset */ + +/* Bit definition for Ethernet MMC Receive Interrupt Register */ +#define ETH_MMCRIR_RGUFS ((uint32_t)0x00020000) /* Set when Rx good unicast frames counter reaches half the maximum value */ +#define ETH_MMCRIR_RFAES ((uint32_t)0x00000040) /* Set when Rx alignment error counter reaches half the maximum value */ +#define ETH_MMCRIR_RFCES ((uint32_t)0x00000020) /* Set when Rx crc error counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Transmit Interrupt Register */ +#define ETH_MMCTIR_TGFS ((uint32_t)0x00200000) /* Set when Tx good frame count counter reaches half the maximum value */ +#define ETH_MMCTIR_TGFMSCS ((uint32_t)0x00008000) /* Set when Tx good multi col counter reaches half the maximum value */ +#define ETH_MMCTIR_TGFSCS ((uint32_t)0x00004000) /* Set when Tx good single col counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Receive Interrupt Mask Register */ +#define ETH_MMCRIMR_RGUFM ((uint32_t)0x00020000) /* Mask the interrupt when Rx good unicast frames counter reaches half the maximum value */ +#define ETH_MMCRIMR_RFAEM ((uint32_t)0x00000040) /* Mask the interrupt when when Rx alignment error counter reaches half the maximum value */ +#define ETH_MMCRIMR_RFCEM ((uint32_t)0x00000020) /* Mask the interrupt when Rx crc error counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Transmit Interrupt Mask Register */ +#define ETH_MMCTIMR_TGFM ((uint32_t)0x00200000) /* Mask the interrupt when Tx good frame count counter reaches half the maximum value */ +#define ETH_MMCTIMR_TGFMSCM ((uint32_t)0x00008000) /* Mask the interrupt when Tx good multi col counter reaches half the maximum value */ +#define ETH_MMCTIMR_TGFSCM ((uint32_t)0x00004000) /* Mask the interrupt when Tx good single col counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Transmitted Good Frames after Single Collision Counter Register */ +#define ETH_MMCTGFSCCR_TGFSCC ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after a single collision in Half-duplex mode. */ + +/* Bit definition for Ethernet MMC Transmitted Good Frames after More than a Single Collision Counter Register */ +#define ETH_MMCTGFMSCCR_TGFMSCC ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after more than a single collision in Half-duplex mode. */ + +/* Bit definition for Ethernet MMC Transmitted Good Frames Counter Register */ +#define ETH_MMCTGFCR_TGFC ((uint32_t)0xFFFFFFFF) /* Number of good frames transmitted. */ + +/* Bit definition for Ethernet MMC Received Frames with CRC Error Counter Register */ +#define ETH_MMCRFCECR_RFCEC ((uint32_t)0xFFFFFFFF) /* Number of frames received with CRC error. */ + +/* Bit definition for Ethernet MMC Received Frames with Alignement Error Counter Register */ +#define ETH_MMCRFAECR_RFAEC ((uint32_t)0xFFFFFFFF) /* Number of frames received with alignment (dribble) error */ + +/* Bit definition for Ethernet MMC Received Good Unicast Frames Counter Register */ +#define ETH_MMCRGUFCR_RGUFC ((uint32_t)0xFFFFFFFF) /* Number of good unicast frames received. */ + +/******************************************************************************/ +/* Ethernet PTP Registers bits definition */ +/******************************************************************************/ + +/* Bit definition for Ethernet PTP Time Stamp Contol Register */ +#define ETH_PTPTSCR_TSARU ((uint32_t)0x00000020) /* Addend register update */ +#define ETH_PTPTSCR_TSITE ((uint32_t)0x00000010) /* Time stamp interrupt trigger enable */ +#define ETH_PTPTSCR_TSSTU ((uint32_t)0x00000008) /* Time stamp update */ +#define ETH_PTPTSCR_TSSTI ((uint32_t)0x00000004) /* Time stamp initialize */ +#define ETH_PTPTSCR_TSFCU ((uint32_t)0x00000002) /* Time stamp fine or coarse update */ +#define ETH_PTPTSCR_TSE ((uint32_t)0x00000001) /* Time stamp enable */ + +/* Bit definition for Ethernet PTP Sub-Second Increment Register */ +#define ETH_PTPSSIR_STSSI ((uint32_t)0x000000FF) /* System time Sub-second increment value */ + +/* Bit definition for Ethernet PTP Time Stamp High Register */ +#define ETH_PTPTSHR_STS ((uint32_t)0xFFFFFFFF) /* System Time second */ + +/* Bit definition for Ethernet PTP Time Stamp Low Register */ +#define ETH_PTPTSLR_STPNS ((uint32_t)0x80000000) /* System Time Positive or negative time */ +#define ETH_PTPTSLR_STSS ((uint32_t)0x7FFFFFFF) /* System Time sub-seconds */ + +/* Bit definition for Ethernet PTP Time Stamp High Update Register */ +#define ETH_PTPTSHUR_TSUS ((uint32_t)0xFFFFFFFF) /* Time stamp update seconds */ + +/* Bit definition for Ethernet PTP Time Stamp Low Update Register */ +#define ETH_PTPTSLUR_TSUPNS ((uint32_t)0x80000000) /* Time stamp update Positive or negative time */ +#define ETH_PTPTSLUR_TSUSS ((uint32_t)0x7FFFFFFF) /* Time stamp update sub-seconds */ + +/* Bit definition for Ethernet PTP Time Stamp Addend Register */ +#define ETH_PTPTSAR_TSA ((uint32_t)0xFFFFFFFF) /* Time stamp addend */ + +/* Bit definition for Ethernet PTP Target Time High Register */ +#define ETH_PTPTTHR_TTSH ((uint32_t)0xFFFFFFFF) /* Target time stamp high */ + +/* Bit definition for Ethernet PTP Target Time Low Register */ +#define ETH_PTPTTLR_TTSL ((uint32_t)0xFFFFFFFF) /* Target time stamp low */ + +/******************************************************************************/ +/* Ethernet DMA Registers bits definition */ +/******************************************************************************/ + +/* Bit definition for Ethernet DMA Bus Mode Register */ +#define ETH_DMABMR_AAB ((uint32_t)0x02000000) /* Address-Aligned beats */ +#define ETH_DMABMR_FPM ((uint32_t)0x01000000) /* 4xPBL mode */ +#define ETH_DMABMR_USP ((uint32_t)0x00800000) /* Use separate PBL */ +#define ETH_DMABMR_RDP ((uint32_t)0x007E0000) /* RxDMA PBL */ + #define ETH_DMABMR_RDP_1Beat ((uint32_t)0x00020000) /* maximum number of beats to be transferred in one RxDMA transaction is 1 */ + #define ETH_DMABMR_RDP_2Beat ((uint32_t)0x00040000) /* maximum number of beats to be transferred in one RxDMA transaction is 2 */ + #define ETH_DMABMR_RDP_4Beat ((uint32_t)0x00080000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ + #define ETH_DMABMR_RDP_8Beat ((uint32_t)0x00100000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ + #define ETH_DMABMR_RDP_16Beat ((uint32_t)0x00200000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ + #define ETH_DMABMR_RDP_32Beat ((uint32_t)0x00400000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ + #define ETH_DMABMR_RDP_4xPBL_4Beat ((uint32_t)0x01020000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ + #define ETH_DMABMR_RDP_4xPBL_8Beat ((uint32_t)0x01040000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ + #define ETH_DMABMR_RDP_4xPBL_16Beat ((uint32_t)0x01080000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ + #define ETH_DMABMR_RDP_4xPBL_32Beat ((uint32_t)0x01100000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ + #define ETH_DMABMR_RDP_4xPBL_64Beat ((uint32_t)0x01200000) /* maximum number of beats to be transferred in one RxDMA transaction is 64 */ + #define ETH_DMABMR_RDP_4xPBL_128Beat ((uint32_t)0x01400000) /* maximum number of beats to be transferred in one RxDMA transaction is 128 */ +#define ETH_DMABMR_FB ((uint32_t)0x00010000) /* Fixed Burst */ +#define ETH_DMABMR_RTPR ((uint32_t)0x0000C000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_1_1 ((uint32_t)0x00000000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_2_1 ((uint32_t)0x00004000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_3_1 ((uint32_t)0x00008000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_4_1 ((uint32_t)0x0000C000) /* Rx Tx priority ratio */ +#define ETH_DMABMR_PBL ((uint32_t)0x00003F00) /* Programmable burst length */ + #define ETH_DMABMR_PBL_1Beat ((uint32_t)0x00000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */ + #define ETH_DMABMR_PBL_2Beat ((uint32_t)0x00000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */ + #define ETH_DMABMR_PBL_4Beat ((uint32_t)0x00000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ + #define ETH_DMABMR_PBL_8Beat ((uint32_t)0x00000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ + #define ETH_DMABMR_PBL_16Beat ((uint32_t)0x00001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ + #define ETH_DMABMR_PBL_32Beat ((uint32_t)0x00002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ + #define ETH_DMABMR_PBL_4xPBL_4Beat ((uint32_t)0x01000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ + #define ETH_DMABMR_PBL_4xPBL_8Beat ((uint32_t)0x01000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ + #define ETH_DMABMR_PBL_4xPBL_16Beat ((uint32_t)0x01000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ + #define ETH_DMABMR_PBL_4xPBL_32Beat ((uint32_t)0x01000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ + #define ETH_DMABMR_PBL_4xPBL_64Beat ((uint32_t)0x01001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */ + #define ETH_DMABMR_PBL_4xPBL_128Beat ((uint32_t)0x01002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */ +#define ETH_DMABMR_DSL ((uint32_t)0x0000007C) /* Descriptor Skip Length */ +#define ETH_DMABMR_DA ((uint32_t)0x00000002) /* DMA arbitration scheme */ +#define ETH_DMABMR_SR ((uint32_t)0x00000001) /* Software reset */ + +/* Bit definition for Ethernet DMA Transmit Poll Demand Register */ +#define ETH_DMATPDR_TPD ((uint32_t)0xFFFFFFFF) /* Transmit poll demand */ + +/* Bit definition for Ethernet DMA Receive Poll Demand Register */ +#define ETH_DMARPDR_RPD ((uint32_t)0xFFFFFFFF) /* Receive poll demand */ + +/* Bit definition for Ethernet DMA Receive Descriptor List Address Register */ +#define ETH_DMARDLAR_SRL ((uint32_t)0xFFFFFFFF) /* Start of receive list */ + +/* Bit definition for Ethernet DMA Transmit Descriptor List Address Register */ +#define ETH_DMATDLAR_STL ((uint32_t)0xFFFFFFFF) /* Start of transmit list */ + +/* Bit definition for Ethernet DMA Status Register */ +#define ETH_DMASR_TSTS ((uint32_t)0x20000000) /* Time-stamp trigger status */ +#define ETH_DMASR_PMTS ((uint32_t)0x10000000) /* PMT status */ +#define ETH_DMASR_MMCS ((uint32_t)0x08000000) /* MMC status */ +#define ETH_DMASR_EBS ((uint32_t)0x03800000) /* Error bits status */ + /* combination with EBS[2:0] for GetFlagStatus function */ + #define ETH_DMASR_EBS_DescAccess ((uint32_t)0x02000000) /* Error bits 0-data buffer, 1-desc. access */ + #define ETH_DMASR_EBS_ReadTransf ((uint32_t)0x01000000) /* Error bits 0-write trnsf, 1-read transfr */ + #define ETH_DMASR_EBS_DataTransfTx ((uint32_t)0x00800000) /* Error bits 0-Rx DMA, 1-Tx DMA */ +#define ETH_DMASR_TPS ((uint32_t)0x00700000) /* Transmit process state */ + #define ETH_DMASR_TPS_Stopped ((uint32_t)0x00000000) /* Stopped - Reset or Stop Tx Command issued */ + #define ETH_DMASR_TPS_Fetching ((uint32_t)0x00100000) /* Running - fetching the Tx descriptor */ + #define ETH_DMASR_TPS_Waiting ((uint32_t)0x00200000) /* Running - waiting for status */ + #define ETH_DMASR_TPS_Reading ((uint32_t)0x00300000) /* Running - reading the data from host memory */ + #define ETH_DMASR_TPS_Suspended ((uint32_t)0x00600000) /* Suspended - Tx Descriptor unavailabe */ + #define ETH_DMASR_TPS_Closing ((uint32_t)0x00700000) /* Running - closing Rx descriptor */ +#define ETH_DMASR_RPS ((uint32_t)0x000E0000) /* Receive process state */ + #define ETH_DMASR_RPS_Stopped ((uint32_t)0x00000000) /* Stopped - Reset or Stop Rx Command issued */ + #define ETH_DMASR_RPS_Fetching ((uint32_t)0x00020000) /* Running - fetching the Rx descriptor */ + #define ETH_DMASR_RPS_Waiting ((uint32_t)0x00060000) /* Running - waiting for packet */ + #define ETH_DMASR_RPS_Suspended ((uint32_t)0x00080000) /* Suspended - Rx Descriptor unavailable */ + #define ETH_DMASR_RPS_Closing ((uint32_t)0x000A0000) /* Running - closing descriptor */ + #define ETH_DMASR_RPS_Queuing ((uint32_t)0x000E0000) /* Running - queuing the recieve frame into host memory */ +#define ETH_DMASR_NIS ((uint32_t)0x00010000) /* Normal interrupt summary */ +#define ETH_DMASR_AIS ((uint32_t)0x00008000) /* Abnormal interrupt summary */ +#define ETH_DMASR_ERS ((uint32_t)0x00004000) /* Early receive status */ +#define ETH_DMASR_FBES ((uint32_t)0x00002000) /* Fatal bus error status */ +#define ETH_DMASR_ETS ((uint32_t)0x00000400) /* Early transmit status */ +#define ETH_DMASR_RWTS ((uint32_t)0x00000200) /* Receive watchdog timeout status */ +#define ETH_DMASR_RPSS ((uint32_t)0x00000100) /* Receive process stopped status */ +#define ETH_DMASR_RBUS ((uint32_t)0x00000080) /* Receive buffer unavailable status */ +#define ETH_DMASR_RS ((uint32_t)0x00000040) /* Receive status */ +#define ETH_DMASR_TUS ((uint32_t)0x00000020) /* Transmit underflow status */ +#define ETH_DMASR_ROS ((uint32_t)0x00000010) /* Receive overflow status */ +#define ETH_DMASR_TJTS ((uint32_t)0x00000008) /* Transmit jabber timeout status */ +#define ETH_DMASR_TBUS ((uint32_t)0x00000004) /* Transmit buffer unavailable status */ +#define ETH_DMASR_TPSS ((uint32_t)0x00000002) /* Transmit process stopped status */ +#define ETH_DMASR_TS ((uint32_t)0x00000001) /* Transmit status */ + +/* Bit definition for Ethernet DMA Operation Mode Register */ +#define ETH_DMAOMR_DTCEFD ((uint32_t)0x04000000) /* Disable Dropping of TCP/IP checksum error frames */ +#define ETH_DMAOMR_RSF ((uint32_t)0x02000000) /* Receive store and forward */ +#define ETH_DMAOMR_DFRF ((uint32_t)0x01000000) /* Disable flushing of received frames */ +#define ETH_DMAOMR_TSF ((uint32_t)0x00200000) /* Transmit store and forward */ +#define ETH_DMAOMR_FTF ((uint32_t)0x00100000) /* Flush transmit FIFO */ +#define ETH_DMAOMR_TTC ((uint32_t)0x0001C000) /* Transmit threshold control */ + #define ETH_DMAOMR_TTC_64Bytes ((uint32_t)0x00000000) /* threshold level of the MTL Transmit FIFO is 64 Bytes */ + #define ETH_DMAOMR_TTC_128Bytes ((uint32_t)0x00004000) /* threshold level of the MTL Transmit FIFO is 128 Bytes */ + #define ETH_DMAOMR_TTC_192Bytes ((uint32_t)0x00008000) /* threshold level of the MTL Transmit FIFO is 192 Bytes */ + #define ETH_DMAOMR_TTC_256Bytes ((uint32_t)0x0000C000) /* threshold level of the MTL Transmit FIFO is 256 Bytes */ + #define ETH_DMAOMR_TTC_40Bytes ((uint32_t)0x00010000) /* threshold level of the MTL Transmit FIFO is 40 Bytes */ + #define ETH_DMAOMR_TTC_32Bytes ((uint32_t)0x00014000) /* threshold level of the MTL Transmit FIFO is 32 Bytes */ + #define ETH_DMAOMR_TTC_24Bytes ((uint32_t)0x00018000) /* threshold level of the MTL Transmit FIFO is 24 Bytes */ + #define ETH_DMAOMR_TTC_16Bytes ((uint32_t)0x0001C000) /* threshold level of the MTL Transmit FIFO is 16 Bytes */ +#define ETH_DMAOMR_ST ((uint32_t)0x00002000) /* Start/stop transmission command */ +#define ETH_DMAOMR_FEF ((uint32_t)0x00000080) /* Forward error frames */ +#define ETH_DMAOMR_FUGF ((uint32_t)0x00000040) /* Forward undersized good frames */ +#define ETH_DMAOMR_RTC ((uint32_t)0x00000018) /* receive threshold control */ + #define ETH_DMAOMR_RTC_64Bytes ((uint32_t)0x00000000) /* threshold level of the MTL Receive FIFO is 64 Bytes */ + #define ETH_DMAOMR_RTC_32Bytes ((uint32_t)0x00000008) /* threshold level of the MTL Receive FIFO is 32 Bytes */ + #define ETH_DMAOMR_RTC_96Bytes ((uint32_t)0x00000010) /* threshold level of the MTL Receive FIFO is 96 Bytes */ + #define ETH_DMAOMR_RTC_128Bytes ((uint32_t)0x00000018) /* threshold level of the MTL Receive FIFO is 128 Bytes */ +#define ETH_DMAOMR_OSF ((uint32_t)0x00000004) /* operate on second frame */ +#define ETH_DMAOMR_SR ((uint32_t)0x00000002) /* Start/stop receive */ + +/* Bit definition for Ethernet DMA Interrupt Enable Register */ +#define ETH_DMAIER_NISE ((uint32_t)0x00010000) /* Normal interrupt summary enable */ +#define ETH_DMAIER_AISE ((uint32_t)0x00008000) /* Abnormal interrupt summary enable */ +#define ETH_DMAIER_ERIE ((uint32_t)0x00004000) /* Early receive interrupt enable */ +#define ETH_DMAIER_FBEIE ((uint32_t)0x00002000) /* Fatal bus error interrupt enable */ +#define ETH_DMAIER_ETIE ((uint32_t)0x00000400) /* Early transmit interrupt enable */ +#define ETH_DMAIER_RWTIE ((uint32_t)0x00000200) /* Receive watchdog timeout interrupt enable */ +#define ETH_DMAIER_RPSIE ((uint32_t)0x00000100) /* Receive process stopped interrupt enable */ +#define ETH_DMAIER_RBUIE ((uint32_t)0x00000080) /* Receive buffer unavailable interrupt enable */ +#define ETH_DMAIER_RIE ((uint32_t)0x00000040) /* Receive interrupt enable */ +#define ETH_DMAIER_TUIE ((uint32_t)0x00000020) /* Transmit Underflow interrupt enable */ +#define ETH_DMAIER_ROIE ((uint32_t)0x00000010) /* Receive Overflow interrupt enable */ +#define ETH_DMAIER_TJTIE ((uint32_t)0x00000008) /* Transmit jabber timeout interrupt enable */ +#define ETH_DMAIER_TBUIE ((uint32_t)0x00000004) /* Transmit buffer unavailable interrupt enable */ +#define ETH_DMAIER_TPSIE ((uint32_t)0x00000002) /* Transmit process stopped interrupt enable */ +#define ETH_DMAIER_TIE ((uint32_t)0x00000001) /* Transmit interrupt enable */ + +/* Bit definition for Ethernet DMA Missed Frame and Buffer Overflow Counter Register */ +#define ETH_DMAMFBOCR_OFOC ((uint32_t)0x10000000) /* Overflow bit for FIFO overflow counter */ +#define ETH_DMAMFBOCR_MFA ((uint32_t)0x0FFE0000) /* Number of frames missed by the application */ +#define ETH_DMAMFBOCR_OMFC ((uint32_t)0x00010000) /* Overflow bit for missed frame counter */ +#define ETH_DMAMFBOCR_MFC ((uint32_t)0x0000FFFF) /* Number of frames missed by the controller */ + +/* Bit definition for Ethernet DMA Current Host Transmit Descriptor Register */ +#define ETH_DMACHTDR_HTDAP ((uint32_t)0xFFFFFFFF) /* Host transmit descriptor address pointer */ + +/* Bit definition for Ethernet DMA Current Host Receive Descriptor Register */ +#define ETH_DMACHRDR_HRDAP ((uint32_t)0xFFFFFFFF) /* Host receive descriptor address pointer */ + +/* Bit definition for Ethernet DMA Current Host Transmit Buffer Address Register */ +#define ETH_DMACHTBAR_HTBAP ((uint32_t)0xFFFFFFFF) /* Host transmit buffer address pointer */ + +/* Bit definition for Ethernet DMA Current Host Receive Buffer Address Register */ +#define ETH_DMACHRBAR_HRBAP ((uint32_t)0xFFFFFFFF) /* Host receive buffer address pointer */ +#endif /* STM32F10X_CL */ + +/** + * @} + */ + + /** + * @} + */ + +#ifdef USE_STDPERIPH_DRIVER + #include "stm32f10x_conf.h" +#endif + +/** @addtogroup Exported_macro + * @{ + */ + +#define SET_BIT(REG, BIT) ((REG) |= (BIT)) + +#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) + +#define READ_BIT(REG, BIT) ((REG) & (BIT)) + +#define CLEAR_REG(REG) ((REG) = (0x0)) + +#define WRITE_REG(REG, VAL) ((REG) = (VAL)) + +#define READ_REG(REG) ((REG)) + +#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_H */ + +/** + * @} + */ + + /** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c new file mode 100644 index 00000000..71efc858 --- /dev/null +++ b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c @@ -0,0 +1,1094 @@ +/** + ****************************************************************************** + * @file system_stm32f10x.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depedning on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + +#ifndef STM32F10X_CL + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#else + if (HSE_VALUE <= 24000000) + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + } + else + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + } +#endif /* STM32F10X_CL */ +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); + + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); + + /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + +#else + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL7); +#else + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); +#else + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h new file mode 100644 index 00000000..54bc1abe --- /dev/null +++ b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h @@ -0,0 +1,98 @@ +/** + ****************************************************************************** + * @file system_stm32f10x.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** + * @brief Define to prevent recursive inclusion + */ +#ifndef __SYSTEM_STM32F10X_H +#define __SYSTEM_STM32F10X_H + +#ifdef __cplusplus + extern "C" { +#endif + +/** @addtogroup STM32F10x_System_Includes + * @{ + */ + +/** + * @} + */ + + +/** @addtogroup STM32F10x_System_Exported_types + * @{ + */ + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Exported_Constants + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Exported_Functions + * @{ + */ + +extern void SystemInit(void); +extern void SystemCoreClockUpdate(void); +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /*__SYSTEM_STM32F10X_H */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/misc.h b/firmware/stm32-esp/libraries/fwlib/inc/misc.h new file mode 100644 index 00000000..9a6bd07c --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/misc.h @@ -0,0 +1,220 @@ +/** + ****************************************************************************** + * @file misc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the miscellaneous + * firmware library functions (add-on to CMSIS functions). + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MISC_H +#define __MISC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup MISC + * @{ + */ + +/** @defgroup MISC_Exported_Types + * @{ + */ + +/** + * @brief NVIC Init Structure definition + */ + +typedef struct +{ + uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. + This parameter can be a value of @ref IRQn_Type + (For the complete STM32 Devices IRQ Channels list, please + refer to stm32f10x.h file) */ + + uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel + specified in NVIC_IRQChannel. This parameter can be a value + between 0 and 15 as described in the table @ref NVIC_Priority_Table */ + + uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified + in NVIC_IRQChannel. This parameter can be a value + between 0 and 15 as described in the table @ref NVIC_Priority_Table */ + + FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel + will be enabled or disabled. + This parameter can be set either to ENABLE or DISABLE */ +} NVIC_InitTypeDef; + +/** + * @} + */ + +/** @defgroup NVIC_Priority_Table + * @{ + */ + +/** +@code + The table below gives the allowed values of the pre-emption priority and subpriority according + to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function + ============================================================================================================================ + NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description + ============================================================================================================================ + NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority + | | | 4 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority + | | | 3 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority + | | | 2 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority + | | | 1 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority + | | | 0 bits for subpriority + ============================================================================================================================ +@endcode +*/ + +/** + * @} + */ + +/** @defgroup MISC_Exported_Constants + * @{ + */ + +/** @defgroup Vector_Table_Base + * @{ + */ + +#define NVIC_VectTab_RAM ((uint32_t)0x20000000) +#define NVIC_VectTab_FLASH ((uint32_t)0x08000000) +#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ + ((VECTTAB) == NVIC_VectTab_FLASH)) +/** + * @} + */ + +/** @defgroup System_Low_Power + * @{ + */ + +#define NVIC_LP_SEVONPEND ((uint8_t)0x10) +#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) +#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) +#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ + ((LP) == NVIC_LP_SLEEPDEEP) || \ + ((LP) == NVIC_LP_SLEEPONEXIT)) +/** + * @} + */ + +/** @defgroup Preemption_Priority_Group + * @{ + */ + +#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority + 4 bits for subpriority */ +#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority + 3 bits for subpriority */ +#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority + 2 bits for subpriority */ +#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority + 1 bits for subpriority */ +#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority + 0 bits for subpriority */ + +#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ + ((GROUP) == NVIC_PriorityGroup_1) || \ + ((GROUP) == NVIC_PriorityGroup_2) || \ + ((GROUP) == NVIC_PriorityGroup_3) || \ + ((GROUP) == NVIC_PriorityGroup_4)) + +#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) + +#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) + +#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) + +/** + * @} + */ + +/** @defgroup SysTick_clock_source + * @{ + */ + +#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) +#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) +#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ + ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup MISC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Exported_Functions + * @{ + */ + +void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); +void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); +void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); +void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); +void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); + +#ifdef __cplusplus +} +#endif + +#endif /* __MISC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h new file mode 100644 index 00000000..c465d335 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h @@ -0,0 +1,483 @@ +/** + ****************************************************************************** + * @file stm32f10x_adc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the ADC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_ADC_H +#define __STM32F10x_ADC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup ADC + * @{ + */ + +/** @defgroup ADC_Exported_Types + * @{ + */ + +/** + * @brief ADC Init structure definition + */ + +typedef struct +{ + uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or + dual mode. + This parameter can be a value of @ref ADC_mode */ + + FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in + Scan (multichannels) or Single (one channel) mode. + This parameter can be set to ENABLE or DISABLE */ + + FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in + Continuous or Single mode. + This parameter can be set to ENABLE or DISABLE. */ + + uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog + to digital conversion of regular channels. This parameter + can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ + + uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. + This parameter can be a value of @ref ADC_data_align */ + + uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted + using the sequencer for regular channel group. + This parameter must range from 1 to 16. */ +}ADC_InitTypeDef; +/** + * @} + */ + +/** @defgroup ADC_Exported_Constants + * @{ + */ + +#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ + ((PERIPH) == ADC2) || \ + ((PERIPH) == ADC3)) + +#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ + ((PERIPH) == ADC3)) + +/** @defgroup ADC_mode + * @{ + */ + +#define ADC_Mode_Independent ((uint32_t)0x00000000) +#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) +#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) +#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) +#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) +#define ADC_Mode_InjecSimult ((uint32_t)0x00050000) +#define ADC_Mode_RegSimult ((uint32_t)0x00060000) +#define ADC_Mode_FastInterl ((uint32_t)0x00070000) +#define ADC_Mode_SlowInterl ((uint32_t)0x00080000) +#define ADC_Mode_AlterTrig ((uint32_t)0x00090000) + +#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ + ((MODE) == ADC_Mode_RegInjecSimult) || \ + ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ + ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ + ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ + ((MODE) == ADC_Mode_InjecSimult) || \ + ((MODE) == ADC_Mode_RegSimult) || \ + ((MODE) == ADC_Mode_FastInterl) || \ + ((MODE) == ADC_Mode_SlowInterl) || \ + ((MODE) == ADC_Mode_AlterTrig)) +/** + * @} + */ + +/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion + * @{ + */ + +#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ + +#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ +#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ + +#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ + +#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ + ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ + ((REGTRIG) == ADC_ExternalTrigConv_None) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) +/** + * @} + */ + +/** @defgroup ADC_data_align + * @{ + */ + +#define ADC_DataAlign_Right ((uint32_t)0x00000000) +#define ADC_DataAlign_Left ((uint32_t)0x00000800) +#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ + ((ALIGN) == ADC_DataAlign_Left)) +/** + * @} + */ + +/** @defgroup ADC_channels + * @{ + */ + +#define ADC_Channel_0 ((uint8_t)0x00) +#define ADC_Channel_1 ((uint8_t)0x01) +#define ADC_Channel_2 ((uint8_t)0x02) +#define ADC_Channel_3 ((uint8_t)0x03) +#define ADC_Channel_4 ((uint8_t)0x04) +#define ADC_Channel_5 ((uint8_t)0x05) +#define ADC_Channel_6 ((uint8_t)0x06) +#define ADC_Channel_7 ((uint8_t)0x07) +#define ADC_Channel_8 ((uint8_t)0x08) +#define ADC_Channel_9 ((uint8_t)0x09) +#define ADC_Channel_10 ((uint8_t)0x0A) +#define ADC_Channel_11 ((uint8_t)0x0B) +#define ADC_Channel_12 ((uint8_t)0x0C) +#define ADC_Channel_13 ((uint8_t)0x0D) +#define ADC_Channel_14 ((uint8_t)0x0E) +#define ADC_Channel_15 ((uint8_t)0x0F) +#define ADC_Channel_16 ((uint8_t)0x10) +#define ADC_Channel_17 ((uint8_t)0x11) + +#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) +#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) + +#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ + ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ + ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ + ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ + ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ + ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ + ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ + ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ + ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) +/** + * @} + */ + +/** @defgroup ADC_sampling_time + * @{ + */ + +#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) +#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) +#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) +#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) +#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) +#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) +#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) +#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) +#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ + ((TIME) == ADC_SampleTime_7Cycles5) || \ + ((TIME) == ADC_SampleTime_13Cycles5) || \ + ((TIME) == ADC_SampleTime_28Cycles5) || \ + ((TIME) == ADC_SampleTime_41Cycles5) || \ + ((TIME) == ADC_SampleTime_55Cycles5) || \ + ((TIME) == ADC_SampleTime_71Cycles5) || \ + ((TIME) == ADC_SampleTime_239Cycles5)) +/** + * @} + */ + +/** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion + * @{ + */ + +#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ + +#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ +#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ +#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ + +#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ + +#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) +/** + * @} + */ + +/** @defgroup ADC_injected_channel_selection + * @{ + */ + +#define ADC_InjectedChannel_1 ((uint8_t)0x14) +#define ADC_InjectedChannel_2 ((uint8_t)0x18) +#define ADC_InjectedChannel_3 ((uint8_t)0x1C) +#define ADC_InjectedChannel_4 ((uint8_t)0x20) +#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ + ((CHANNEL) == ADC_InjectedChannel_2) || \ + ((CHANNEL) == ADC_InjectedChannel_3) || \ + ((CHANNEL) == ADC_InjectedChannel_4)) +/** + * @} + */ + +/** @defgroup ADC_analog_watchdog_selection + * @{ + */ + +#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) +#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) +#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) +#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) +#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) +#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) +#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) + +#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_None)) +/** + * @} + */ + +/** @defgroup ADC_interrupts_definition + * @{ + */ + +#define ADC_IT_EOC ((uint16_t)0x0220) +#define ADC_IT_AWD ((uint16_t)0x0140) +#define ADC_IT_JEOC ((uint16_t)0x0480) + +#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) + +#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ + ((IT) == ADC_IT_JEOC)) +/** + * @} + */ + +/** @defgroup ADC_flags_definition + * @{ + */ + +#define ADC_FLAG_AWD ((uint8_t)0x01) +#define ADC_FLAG_EOC ((uint8_t)0x02) +#define ADC_FLAG_JEOC ((uint8_t)0x04) +#define ADC_FLAG_JSTRT ((uint8_t)0x08) +#define ADC_FLAG_STRT ((uint8_t)0x10) +#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) +#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ + ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ + ((FLAG) == ADC_FLAG_STRT)) +/** + * @} + */ + +/** @defgroup ADC_thresholds + * @{ + */ + +#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) + +/** + * @} + */ + +/** @defgroup ADC_injected_offset + * @{ + */ + +#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) + +/** + * @} + */ + +/** @defgroup ADC_injected_length + * @{ + */ + +#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) + +/** + * @} + */ + +/** @defgroup ADC_injected_rank + * @{ + */ + +#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) + +/** + * @} + */ + + +/** @defgroup ADC_regular_length + * @{ + */ + +#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) +/** + * @} + */ + +/** @defgroup ADC_regular_rank + * @{ + */ + +#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) + +/** + * @} + */ + +/** @defgroup ADC_regular_discontinuous_mode_number + * @{ + */ + +#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup ADC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Exported_Functions + * @{ + */ + +void ADC_DeInit(ADC_TypeDef* ADCx); +void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); +void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); +void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); +void ADC_ResetCalibration(ADC_TypeDef* ADCx); +FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); +void ADC_StartCalibration(ADC_TypeDef* ADCx); +FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); +void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); +void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); +void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); +void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); +uint32_t ADC_GetDualModeConversionValue(void); +void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); +void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); +void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); +void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); +void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); +uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); +void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); +void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); +void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); +void ADC_TempSensorVrefintCmd(FunctionalState NewState); +FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); +void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); +ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); +void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_ADC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h new file mode 100644 index 00000000..275c5e1f --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h @@ -0,0 +1,195 @@ +/** + ****************************************************************************** + * @file stm32f10x_bkp.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the BKP firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_BKP_H +#define __STM32F10x_BKP_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup BKP + * @{ + */ + +/** @defgroup BKP_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Exported_Constants + * @{ + */ + +/** @defgroup Tamper_Pin_active_level + * @{ + */ + +#define BKP_TamperPinLevel_High ((uint16_t)0x0000) +#define BKP_TamperPinLevel_Low ((uint16_t)0x0001) +#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ + ((LEVEL) == BKP_TamperPinLevel_Low)) +/** + * @} + */ + +/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin + * @{ + */ + +#define BKP_RTCOutputSource_None ((uint16_t)0x0000) +#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) +#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) +#define BKP_RTCOutputSource_Second ((uint16_t)0x0300) +#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ + ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \ + ((SOURCE) == BKP_RTCOutputSource_Alarm) || \ + ((SOURCE) == BKP_RTCOutputSource_Second)) +/** + * @} + */ + +/** @defgroup Data_Backup_Register + * @{ + */ + +#define BKP_DR1 ((uint16_t)0x0004) +#define BKP_DR2 ((uint16_t)0x0008) +#define BKP_DR3 ((uint16_t)0x000C) +#define BKP_DR4 ((uint16_t)0x0010) +#define BKP_DR5 ((uint16_t)0x0014) +#define BKP_DR6 ((uint16_t)0x0018) +#define BKP_DR7 ((uint16_t)0x001C) +#define BKP_DR8 ((uint16_t)0x0020) +#define BKP_DR9 ((uint16_t)0x0024) +#define BKP_DR10 ((uint16_t)0x0028) +#define BKP_DR11 ((uint16_t)0x0040) +#define BKP_DR12 ((uint16_t)0x0044) +#define BKP_DR13 ((uint16_t)0x0048) +#define BKP_DR14 ((uint16_t)0x004C) +#define BKP_DR15 ((uint16_t)0x0050) +#define BKP_DR16 ((uint16_t)0x0054) +#define BKP_DR17 ((uint16_t)0x0058) +#define BKP_DR18 ((uint16_t)0x005C) +#define BKP_DR19 ((uint16_t)0x0060) +#define BKP_DR20 ((uint16_t)0x0064) +#define BKP_DR21 ((uint16_t)0x0068) +#define BKP_DR22 ((uint16_t)0x006C) +#define BKP_DR23 ((uint16_t)0x0070) +#define BKP_DR24 ((uint16_t)0x0074) +#define BKP_DR25 ((uint16_t)0x0078) +#define BKP_DR26 ((uint16_t)0x007C) +#define BKP_DR27 ((uint16_t)0x0080) +#define BKP_DR28 ((uint16_t)0x0084) +#define BKP_DR29 ((uint16_t)0x0088) +#define BKP_DR30 ((uint16_t)0x008C) +#define BKP_DR31 ((uint16_t)0x0090) +#define BKP_DR32 ((uint16_t)0x0094) +#define BKP_DR33 ((uint16_t)0x0098) +#define BKP_DR34 ((uint16_t)0x009C) +#define BKP_DR35 ((uint16_t)0x00A0) +#define BKP_DR36 ((uint16_t)0x00A4) +#define BKP_DR37 ((uint16_t)0x00A8) +#define BKP_DR38 ((uint16_t)0x00AC) +#define BKP_DR39 ((uint16_t)0x00B0) +#define BKP_DR40 ((uint16_t)0x00B4) +#define BKP_DR41 ((uint16_t)0x00B8) +#define BKP_DR42 ((uint16_t)0x00BC) + +#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \ + ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \ + ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \ + ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \ + ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \ + ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \ + ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \ + ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \ + ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \ + ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \ + ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \ + ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \ + ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \ + ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42)) + +#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup BKP_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Exported_Functions + * @{ + */ + +void BKP_DeInit(void); +void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); +void BKP_TamperPinCmd(FunctionalState NewState); +void BKP_ITConfig(FunctionalState NewState); +void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); +void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); +void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); +uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); +FlagStatus BKP_GetFlagStatus(void); +void BKP_ClearFlag(void); +ITStatus BKP_GetITStatus(void); +void BKP_ClearITPendingBit(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_BKP_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h new file mode 100644 index 00000000..d185aa21 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h @@ -0,0 +1,697 @@ +/** + ****************************************************************************** + * @file stm32f10x_can.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the CAN firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CAN_H +#define __STM32F10x_CAN_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup CAN + * @{ + */ + +/** @defgroup CAN_Exported_Types + * @{ + */ + +#define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \ + ((PERIPH) == CAN2)) + +/** + * @brief CAN init structure definition + */ + +typedef struct +{ + uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum. + It ranges from 1 to 1024. */ + + uint8_t CAN_Mode; /*!< Specifies the CAN operating mode. + This parameter can be a value of + @ref CAN_operating_mode */ + + uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta + the CAN hardware is allowed to lengthen or + shorten a bit to perform resynchronization. + This parameter can be a value of + @ref CAN_synchronisation_jump_width */ + + uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit + Segment 1. This parameter can be a value of + @ref CAN_time_quantum_in_bit_segment_1 */ + + uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit + Segment 2. + This parameter can be a value of + @ref CAN_time_quantum_in_bit_segment_2 */ + + FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered + communication mode. This parameter can be set + either to ENABLE or DISABLE. */ + + FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off + management. This parameter can be set either + to ENABLE or DISABLE. */ + + FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode. + This parameter can be set either to ENABLE or + DISABLE. */ + + FunctionalState CAN_NART; /*!< Enable or disable the no-automatic + retransmission mode. This parameter can be + set either to ENABLE or DISABLE. */ + + FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode. + This parameter can be set either to ENABLE + or DISABLE. */ + + FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority. + This parameter can be set either to ENABLE + or DISABLE. */ +} CAN_InitTypeDef; + +/** + * @brief CAN filter init structure definition + */ + +typedef struct +{ + uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit + configuration, first one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit + configuration, second one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, + according to the mode (MSBs for a 32-bit configuration, + first one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, + according to the mode (LSBs for a 32-bit configuration, + second one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. + This parameter can be a value of @ref CAN_filter_FIFO */ + + uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */ + + uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized. + This parameter can be a value of @ref CAN_filter_mode */ + + uint8_t CAN_FilterScale; /*!< Specifies the filter scale. + This parameter can be a value of @ref CAN_filter_scale */ + + FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter. + This parameter can be set either to ENABLE or DISABLE. */ +} CAN_FilterInitTypeDef; + +/** + * @brief CAN Tx message structure definition + */ + +typedef struct +{ + uint32_t StdId; /*!< Specifies the standard identifier. + This parameter can be a value between 0 to 0x7FF. */ + + uint32_t ExtId; /*!< Specifies the extended identifier. + This parameter can be a value between 0 to 0x1FFFFFFF. */ + + uint8_t IDE; /*!< Specifies the type of identifier for the message that + will be transmitted. This parameter can be a value + of @ref CAN_identifier_type */ + + uint8_t RTR; /*!< Specifies the type of frame for the message that will + be transmitted. This parameter can be a value of + @ref CAN_remote_transmission_request */ + + uint8_t DLC; /*!< Specifies the length of the frame that will be + transmitted. This parameter can be a value between + 0 to 8 */ + + uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 + to 0xFF. */ +} CanTxMsg; + +/** + * @brief CAN Rx message structure definition + */ + +typedef struct +{ + uint32_t StdId; /*!< Specifies the standard identifier. + This parameter can be a value between 0 to 0x7FF. */ + + uint32_t ExtId; /*!< Specifies the extended identifier. + This parameter can be a value between 0 to 0x1FFFFFFF. */ + + uint8_t IDE; /*!< Specifies the type of identifier for the message that + will be received. This parameter can be a value of + @ref CAN_identifier_type */ + + uint8_t RTR; /*!< Specifies the type of frame for the received message. + This parameter can be a value of + @ref CAN_remote_transmission_request */ + + uint8_t DLC; /*!< Specifies the length of the frame that will be received. + This parameter can be a value between 0 to 8 */ + + uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to + 0xFF. */ + + uint8_t FMI; /*!< Specifies the index of the filter the message stored in + the mailbox passes through. This parameter can be a + value between 0 to 0xFF */ +} CanRxMsg; + +/** + * @} + */ + +/** @defgroup CAN_Exported_Constants + * @{ + */ + +/** @defgroup CAN_sleep_constants + * @{ + */ + +#define CAN_InitStatus_Failed ((uint8_t)0x00) /*!< CAN initialization failed */ +#define CAN_InitStatus_Success ((uint8_t)0x01) /*!< CAN initialization OK */ + +/** + * @} + */ + +/** @defgroup CAN_Mode + * @{ + */ + +#define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */ +#define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */ +#define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */ +#define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */ + +#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || \ + ((MODE) == CAN_Mode_LoopBack)|| \ + ((MODE) == CAN_Mode_Silent) || \ + ((MODE) == CAN_Mode_Silent_LoopBack)) +/** + * @} + */ + + +/** + * @defgroup CAN_Operating_Mode + * @{ + */ +#define CAN_OperatingMode_Initialization ((uint8_t)0x00) /*!< Initialization mode */ +#define CAN_OperatingMode_Normal ((uint8_t)0x01) /*!< Normal mode */ +#define CAN_OperatingMode_Sleep ((uint8_t)0x02) /*!< sleep mode */ + + +#define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ + ((MODE) == CAN_OperatingMode_Normal)|| \ + ((MODE) == CAN_OperatingMode_Sleep)) +/** + * @} + */ + +/** + * @defgroup CAN_Mode_Status + * @{ + */ + +#define CAN_ModeStatus_Failed ((uint8_t)0x00) /*!< CAN entering the specific mode failed */ +#define CAN_ModeStatus_Success ((uint8_t)!CAN_ModeStatus_Failed) /*!< CAN entering the specific mode Succeed */ + + +/** + * @} + */ + +/** @defgroup CAN_synchronisation_jump_width + * @{ + */ + +#define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */ +#define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */ +#define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */ +#define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */ + +#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \ + ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq)) +/** + * @} + */ + +/** @defgroup CAN_time_quantum_in_bit_segment_1 + * @{ + */ + +#define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */ +#define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */ +#define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */ +#define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */ +#define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */ +#define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */ +#define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */ +#define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */ +#define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */ +#define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */ +#define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */ +#define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */ +#define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */ +#define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */ +#define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */ +#define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */ + +#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq) +/** + * @} + */ + +/** @defgroup CAN_time_quantum_in_bit_segment_2 + * @{ + */ + +#define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */ +#define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */ +#define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */ +#define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */ +#define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */ +#define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */ +#define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */ +#define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */ + +#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq) + +/** + * @} + */ + +/** @defgroup CAN_clock_prescaler + * @{ + */ + +#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) + +/** + * @} + */ + +/** @defgroup CAN_filter_number + * @{ + */ +#ifndef STM32F10X_CL + #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13) +#else + #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) +#endif /* STM32F10X_CL */ +/** + * @} + */ + +/** @defgroup CAN_filter_mode + * @{ + */ + +#define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< identifier/mask mode */ +#define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */ + +#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \ + ((MODE) == CAN_FilterMode_IdList)) +/** + * @} + */ + +/** @defgroup CAN_filter_scale + * @{ + */ + +#define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */ +#define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */ + +#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \ + ((SCALE) == CAN_FilterScale_32bit)) + +/** + * @} + */ + +/** @defgroup CAN_filter_FIFO + * @{ + */ + +#define CAN_Filter_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ +#define CAN_Filter_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ +#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \ + ((FIFO) == CAN_FilterFIFO1)) +/** + * @} + */ + +/** @defgroup Start_bank_filter_for_slave_CAN + * @{ + */ +#define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27)) +/** + * @} + */ + +/** @defgroup CAN_Tx + * @{ + */ + +#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) +#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) +#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) +#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) + +/** + * @} + */ + +/** @defgroup CAN_identifier_type + * @{ + */ + +#define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */ +#define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */ +#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || \ + ((IDTYPE) == CAN_Id_Extended)) +/** + * @} + */ + +/** @defgroup CAN_remote_transmission_request + * @{ + */ + +#define CAN_RTR_Data ((uint32_t)0x00000000) /*!< Data frame */ +#define CAN_RTR_Remote ((uint32_t)0x00000002) /*!< Remote frame */ +#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote)) + +/** + * @} + */ + +/** @defgroup CAN_transmit_constants + * @{ + */ + +#define CAN_TxStatus_Failed ((uint8_t)0x00)/*!< CAN transmission failed */ +#define CAN_TxStatus_Ok ((uint8_t)0x01) /*!< CAN transmission succeeded */ +#define CAN_TxStatus_Pending ((uint8_t)0x02) /*!< CAN transmission pending */ +#define CAN_TxStatus_NoMailBox ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */ + +/** + * @} + */ + +/** @defgroup CAN_receive_FIFO_number_constants + * @{ + */ + +#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ +#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ + +#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) + +/** + * @} + */ + +/** @defgroup CAN_sleep_constants + * @{ + */ + +#define CAN_Sleep_Failed ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */ +#define CAN_Sleep_Ok ((uint8_t)0x01) /*!< CAN entered the sleep mode */ + +/** + * @} + */ + +/** @defgroup CAN_wake_up_constants + * @{ + */ + +#define CAN_WakeUp_Failed ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */ +#define CAN_WakeUp_Ok ((uint8_t)0x01) /*!< CAN leaved the sleep mode */ + +/** + * @} + */ + +/** + * @defgroup CAN_Error_Code_constants + * @{ + */ + +#define CAN_ErrorCode_NoErr ((uint8_t)0x00) /*!< No Error */ +#define CAN_ErrorCode_StuffErr ((uint8_t)0x10) /*!< Stuff Error */ +#define CAN_ErrorCode_FormErr ((uint8_t)0x20) /*!< Form Error */ +#define CAN_ErrorCode_ACKErr ((uint8_t)0x30) /*!< Acknowledgment Error */ +#define CAN_ErrorCode_BitRecessiveErr ((uint8_t)0x40) /*!< Bit Recessive Error */ +#define CAN_ErrorCode_BitDominantErr ((uint8_t)0x50) /*!< Bit Dominant Error */ +#define CAN_ErrorCode_CRCErr ((uint8_t)0x60) /*!< CRC Error */ +#define CAN_ErrorCode_SoftwareSetErr ((uint8_t)0x70) /*!< Software Set Error */ + + +/** + * @} + */ + +/** @defgroup CAN_flags + * @{ + */ +/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() + and CAN_ClearFlag() functions. */ +/* If the flag is 0x1XXXXXXX, it means that it can only be used with CAN_GetFlagStatus() function. */ + +/* Transmit Flags */ +#define CAN_FLAG_RQCP0 ((uint32_t)0x38000001) /*!< Request MailBox0 Flag */ +#define CAN_FLAG_RQCP1 ((uint32_t)0x38000100) /*!< Request MailBox1 Flag */ +#define CAN_FLAG_RQCP2 ((uint32_t)0x38010000) /*!< Request MailBox2 Flag */ + +/* Receive Flags */ +#define CAN_FLAG_FMP0 ((uint32_t)0x12000003) /*!< FIFO 0 Message Pending Flag */ +#define CAN_FLAG_FF0 ((uint32_t)0x32000008) /*!< FIFO 0 Full Flag */ +#define CAN_FLAG_FOV0 ((uint32_t)0x32000010) /*!< FIFO 0 Overrun Flag */ +#define CAN_FLAG_FMP1 ((uint32_t)0x14000003) /*!< FIFO 1 Message Pending Flag */ +#define CAN_FLAG_FF1 ((uint32_t)0x34000008) /*!< FIFO 1 Full Flag */ +#define CAN_FLAG_FOV1 ((uint32_t)0x34000010) /*!< FIFO 1 Overrun Flag */ + +/* Operating Mode Flags */ +#define CAN_FLAG_WKU ((uint32_t)0x31000008) /*!< Wake up Flag */ +#define CAN_FLAG_SLAK ((uint32_t)0x31000012) /*!< Sleep acknowledge Flag */ +/* Note: When SLAK intterupt is disabled (SLKIE=0), no polling on SLAKI is possible. + In this case the SLAK bit can be polled.*/ + +/* Error Flags */ +#define CAN_FLAG_EWG ((uint32_t)0x10F00001) /*!< Error Warning Flag */ +#define CAN_FLAG_EPV ((uint32_t)0x10F00002) /*!< Error Passive Flag */ +#define CAN_FLAG_BOF ((uint32_t)0x10F00004) /*!< Bus-Off Flag */ +#define CAN_FLAG_LEC ((uint32_t)0x30F00070) /*!< Last error code Flag */ + +#define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_BOF) || \ + ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \ + ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \ + ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FMP0) || \ + ((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \ + ((FLAG) == CAN_FLAG_FMP1) || ((FLAG) == CAN_FLAG_RQCP2) || \ + ((FLAG) == CAN_FLAG_RQCP1)|| ((FLAG) == CAN_FLAG_RQCP0) || \ + ((FLAG) == CAN_FLAG_SLAK )) + +#define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_RQCP2) || \ + ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \ + ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) ||\ + ((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \ + ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_SLAK)) +/** + * @} + */ + + +/** @defgroup CAN_interrupts + * @{ + */ + + + +#define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty Interrupt*/ + +/* Receive Interrupts */ +#define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending Interrupt*/ +#define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full Interrupt*/ +#define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun Interrupt*/ +#define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending Interrupt*/ +#define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full Interrupt*/ +#define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun Interrupt*/ + +/* Operating Mode Interrupts */ +#define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up Interrupt*/ +#define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep acknowledge Interrupt*/ + +/* Error Interrupts */ +#define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning Interrupt*/ +#define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive Interrupt*/ +#define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off Interrupt*/ +#define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code Interrupt*/ +#define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error Interrupt*/ + +/* Flags named as Interrupts : kept only for FW compatibility */ +#define CAN_IT_RQCP0 CAN_IT_TME +#define CAN_IT_RQCP1 CAN_IT_TME +#define CAN_IT_RQCP2 CAN_IT_TME + + +#define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\ + ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\ + ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\ + ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ + ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ + ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ + ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) + +#define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\ + ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\ + ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\ + ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ + ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ + ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) + +/** + * @} + */ + +/** @defgroup CAN_Legacy + * @{ + */ +#define CANINITFAILED CAN_InitStatus_Failed +#define CANINITOK CAN_InitStatus_Success +#define CAN_FilterFIFO0 CAN_Filter_FIFO0 +#define CAN_FilterFIFO1 CAN_Filter_FIFO1 +#define CAN_ID_STD CAN_Id_Standard +#define CAN_ID_EXT CAN_Id_Extended +#define CAN_RTR_DATA CAN_RTR_Data +#define CAN_RTR_REMOTE CAN_RTR_Remote +#define CANTXFAILE CAN_TxStatus_Failed +#define CANTXOK CAN_TxStatus_Ok +#define CANTXPENDING CAN_TxStatus_Pending +#define CAN_NO_MB CAN_TxStatus_NoMailBox +#define CANSLEEPFAILED CAN_Sleep_Failed +#define CANSLEEPOK CAN_Sleep_Ok +#define CANWAKEUPFAILED CAN_WakeUp_Failed +#define CANWAKEUPOK CAN_WakeUp_Ok + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup CAN_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Exported_Functions + * @{ + */ +/* Function used to set the CAN configuration to the default reset state *****/ +void CAN_DeInit(CAN_TypeDef* CANx); + +/* Initialization and Configuration functions *********************************/ +uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct); +void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct); +void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct); +void CAN_SlaveStartBank(uint8_t CAN_BankNumber); +void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState); +void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState); + +/* Transmit functions *********************************************************/ +uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage); +uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox); +void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox); + +/* Receive functions **********************************************************/ +void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage); +void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber); +uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber); + + +/* Operation modes functions **************************************************/ +uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode); +uint8_t CAN_Sleep(CAN_TypeDef* CANx); +uint8_t CAN_WakeUp(CAN_TypeDef* CANx); + +/* Error management functions *************************************************/ +uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx); +uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx); +uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx); + +/* Interrupts and flags management functions **********************************/ +void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState); +FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG); +void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG); +ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT); +void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_CAN_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h new file mode 100644 index 00000000..7ce68961 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h @@ -0,0 +1,210 @@ +/** + ****************************************************************************** + * @file stm32f10x_cec.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the CEC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CEC_H +#define __STM32F10x_CEC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup CEC + * @{ + */ + + +/** @defgroup CEC_Exported_Types + * @{ + */ + +/** + * @brief CEC Init structure definition + */ +typedef struct +{ + uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. + This parameter can be a value of @ref CEC_BitTiming_Mode */ + uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. + This parameter can be a value of @ref CEC_BitPeriod_Mode */ +}CEC_InitTypeDef; + +/** + * @} + */ + +/** @defgroup CEC_Exported_Constants + * @{ + */ + +/** @defgroup CEC_BitTiming_Mode + * @{ + */ +#define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ +#define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ + +#define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ + ((MODE) == CEC_BitTimingErrFreeMode)) +/** + * @} + */ + +/** @defgroup CEC_BitPeriod_Mode + * @{ + */ +#define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ +#define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ + +#define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ + ((MODE) == CEC_BitPeriodFlexibleMode)) +/** + * @} + */ + + +/** @defgroup CEC_interrupts_definition + * @{ + */ +#define CEC_IT_TERR CEC_CSR_TERR +#define CEC_IT_TBTRF CEC_CSR_TBTRF +#define CEC_IT_RERR CEC_CSR_RERR +#define CEC_IT_RBTF CEC_CSR_RBTF +#define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ + ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) +/** + * @} + */ + + +/** @defgroup CEC_Own_Address + * @{ + */ +#define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) +/** + * @} + */ + +/** @defgroup CEC_Prescaler + * @{ + */ +#define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) + +/** + * @} + */ + +/** @defgroup CEC_flags_definition + * @{ + */ + +/** + * @brief ESR register flags + */ +#define CEC_FLAG_BTE ((uint32_t)0x10010000) +#define CEC_FLAG_BPE ((uint32_t)0x10020000) +#define CEC_FLAG_RBTFE ((uint32_t)0x10040000) +#define CEC_FLAG_SBE ((uint32_t)0x10080000) +#define CEC_FLAG_ACKE ((uint32_t)0x10100000) +#define CEC_FLAG_LINE ((uint32_t)0x10200000) +#define CEC_FLAG_TBTFE ((uint32_t)0x10400000) + +/** + * @brief CSR register flags + */ +#define CEC_FLAG_TEOM ((uint32_t)0x00000002) +#define CEC_FLAG_TERR ((uint32_t)0x00000004) +#define CEC_FLAG_TBTRF ((uint32_t)0x00000008) +#define CEC_FLAG_RSOM ((uint32_t)0x00000010) +#define CEC_FLAG_REOM ((uint32_t)0x00000020) +#define CEC_FLAG_RERR ((uint32_t)0x00000040) +#define CEC_FLAG_RBTF ((uint32_t)0x00000080) + +#define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) + +#define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ + ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ + ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ + ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ + ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ + ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ + ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup CEC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CEC_Exported_Functions + * @{ + */ +void CEC_DeInit(void); +void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); +void CEC_Cmd(FunctionalState NewState); +void CEC_ITConfig(FunctionalState NewState); +void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); +void CEC_SetPrescaler(uint16_t CEC_Prescaler); +void CEC_SendDataByte(uint8_t Data); +uint8_t CEC_ReceiveDataByte(void); +void CEC_StartOfMessage(void); +void CEC_EndOfMessageCmd(FunctionalState NewState); +FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); +void CEC_ClearFlag(uint32_t CEC_FLAG); +ITStatus CEC_GetITStatus(uint8_t CEC_IT); +void CEC_ClearITPendingBit(uint16_t CEC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_CEC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h new file mode 100644 index 00000000..3362fcaa --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h @@ -0,0 +1,94 @@ +/** + ****************************************************************************** + * @file stm32f10x_crc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the CRC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CRC_H +#define __STM32F10x_CRC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup CRC + * @{ + */ + +/** @defgroup CRC_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Exported_Constants + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Exported_Functions + * @{ + */ + +void CRC_ResetDR(void); +uint32_t CRC_CalcCRC(uint32_t Data); +uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); +uint32_t CRC_GetCRC(void); +void CRC_SetIDRegister(uint8_t IDValue); +uint8_t CRC_GetIDRegister(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_CRC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h new file mode 100644 index 00000000..174773cd --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h @@ -0,0 +1,317 @@ +/** + ****************************************************************************** + * @file stm32f10x_dac.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the DAC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_DAC_H +#define __STM32F10x_DAC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup DAC + * @{ + */ + +/** @defgroup DAC_Exported_Types + * @{ + */ + +/** + * @brief DAC Init structure definition + */ + +typedef struct +{ + uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. + This parameter can be a value of @ref DAC_trigger_selection */ + + uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves + are generated, or whether no wave is generated. + This parameter can be a value of @ref DAC_wave_generation */ + + uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or + the maximum amplitude triangle generation for the DAC channel. + This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */ + + uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. + This parameter can be a value of @ref DAC_output_buffer */ +}DAC_InitTypeDef; + +/** + * @} + */ + +/** @defgroup DAC_Exported_Constants + * @{ + */ + +/** @defgroup DAC_trigger_selection + * @{ + */ + +#define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register + has been loaded, and not by external trigger */ +#define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel + only in High-density devices*/ +#define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel + only in Connectivity line, Medium-density and Low-density Value Line devices */ +#define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T15_TRGO ((uint32_t)0x0000001C) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel + only in Medium-density and Low-density Value Line devices*/ +#define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */ + +#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \ + ((TRIGGER) == DAC_Trigger_T6_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T8_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T7_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T5_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T2_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T4_TRGO) || \ + ((TRIGGER) == DAC_Trigger_Ext_IT9) || \ + ((TRIGGER) == DAC_Trigger_Software)) + +/** + * @} + */ + +/** @defgroup DAC_wave_generation + * @{ + */ + +#define DAC_WaveGeneration_None ((uint32_t)0x00000000) +#define DAC_WaveGeneration_Noise ((uint32_t)0x00000040) +#define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080) +#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \ + ((WAVE) == DAC_WaveGeneration_Noise) || \ + ((WAVE) == DAC_WaveGeneration_Triangle)) +/** + * @} + */ + +/** @defgroup DAC_lfsrunmask_triangleamplitude + * @{ + */ + +#define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ +#define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ +#define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ +#define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */ +#define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */ +#define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */ +#define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */ +#define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */ +#define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */ +#define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */ +#define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */ +#define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */ +#define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */ +#define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */ + +#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \ + ((VALUE) == DAC_TriangleAmplitude_1) || \ + ((VALUE) == DAC_TriangleAmplitude_3) || \ + ((VALUE) == DAC_TriangleAmplitude_7) || \ + ((VALUE) == DAC_TriangleAmplitude_15) || \ + ((VALUE) == DAC_TriangleAmplitude_31) || \ + ((VALUE) == DAC_TriangleAmplitude_63) || \ + ((VALUE) == DAC_TriangleAmplitude_127) || \ + ((VALUE) == DAC_TriangleAmplitude_255) || \ + ((VALUE) == DAC_TriangleAmplitude_511) || \ + ((VALUE) == DAC_TriangleAmplitude_1023) || \ + ((VALUE) == DAC_TriangleAmplitude_2047) || \ + ((VALUE) == DAC_TriangleAmplitude_4095)) +/** + * @} + */ + +/** @defgroup DAC_output_buffer + * @{ + */ + +#define DAC_OutputBuffer_Enable ((uint32_t)0x00000000) +#define DAC_OutputBuffer_Disable ((uint32_t)0x00000002) +#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \ + ((STATE) == DAC_OutputBuffer_Disable)) +/** + * @} + */ + +/** @defgroup DAC_Channel_selection + * @{ + */ + +#define DAC_Channel_1 ((uint32_t)0x00000000) +#define DAC_Channel_2 ((uint32_t)0x00000010) +#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \ + ((CHANNEL) == DAC_Channel_2)) +/** + * @} + */ + +/** @defgroup DAC_data_alignment + * @{ + */ + +#define DAC_Align_12b_R ((uint32_t)0x00000000) +#define DAC_Align_12b_L ((uint32_t)0x00000004) +#define DAC_Align_8b_R ((uint32_t)0x00000008) +#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \ + ((ALIGN) == DAC_Align_12b_L) || \ + ((ALIGN) == DAC_Align_8b_R)) +/** + * @} + */ + +/** @defgroup DAC_wave_generation + * @{ + */ + +#define DAC_Wave_Noise ((uint32_t)0x00000040) +#define DAC_Wave_Triangle ((uint32_t)0x00000080) +#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \ + ((WAVE) == DAC_Wave_Triangle)) +/** + * @} + */ + +/** @defgroup DAC_data + * @{ + */ + +#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) +/** + * @} + */ +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/** @defgroup DAC_interrupts_definition + * @{ + */ + +#define DAC_IT_DMAUDR ((uint32_t)0x00002000) +#define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR)) + +/** + * @} + */ + +/** @defgroup DAC_flags_definition + * @{ + */ + +#define DAC_FLAG_DMAUDR ((uint32_t)0x00002000) +#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR)) + +/** + * @} + */ +#endif + +/** + * @} + */ + +/** @defgroup DAC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Exported_Functions + * @{ + */ + +void DAC_DeInit(void); +void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct); +void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct); +void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState); +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState); +#endif +void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState); +void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState); +void DAC_DualSoftwareTriggerCmd(FunctionalState NewState); +void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState); +void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data); +void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data); +void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1); +uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel); +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG); +void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG); +ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT); +void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_DAC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h new file mode 100644 index 00000000..89ceb9a4 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h @@ -0,0 +1,119 @@ +/** + ****************************************************************************** + * @file stm32f10x_dbgmcu.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the DBGMCU + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_DBGMCU_H +#define __STM32F10x_DBGMCU_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup DBGMCU + * @{ + */ + +/** @defgroup DBGMCU_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Exported_Constants + * @{ + */ + +#define DBGMCU_SLEEP ((uint32_t)0x00000001) +#define DBGMCU_STOP ((uint32_t)0x00000002) +#define DBGMCU_STANDBY ((uint32_t)0x00000004) +#define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) +#define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) +#define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) +#define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) +#define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) +#define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) +#define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) +#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) +#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) +#define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) +#define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) +#define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) +#define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) +#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) +#define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) +#define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) +#define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) +#define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) +#define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) +#define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) +#define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) +#define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) +#define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) + +#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) +/** + * @} + */ + +/** @defgroup DBGMCU_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Exported_Functions + * @{ + */ + +uint32_t DBGMCU_GetREVID(void); +uint32_t DBGMCU_GetDEVID(void); +void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_DBGMCU_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h new file mode 100644 index 00000000..14275fe1 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h @@ -0,0 +1,439 @@ +/** + ****************************************************************************** + * @file stm32f10x_dma.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the DMA firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_DMA_H +#define __STM32F10x_DMA_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup DMA + * @{ + */ + +/** @defgroup DMA_Exported_Types + * @{ + */ + +/** + * @brief DMA Init structure definition + */ + +typedef struct +{ + uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */ + + uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */ + + uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination. + This parameter can be a value of @ref DMA_data_transfer_direction */ + + uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. + The data unit is equal to the configuration set in DMA_PeripheralDataSize + or DMA_MemoryDataSize members depending in the transfer direction. */ + + uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not. + This parameter can be a value of @ref DMA_peripheral_incremented_mode */ + + uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not. + This parameter can be a value of @ref DMA_memory_incremented_mode */ + + uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width. + This parameter can be a value of @ref DMA_peripheral_data_size */ + + uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width. + This parameter can be a value of @ref DMA_memory_data_size */ + + uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx. + This parameter can be a value of @ref DMA_circular_normal_mode. + @note: The circular buffer mode cannot be used if the memory-to-memory + data transfer is configured on the selected Channel */ + + uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx. + This parameter can be a value of @ref DMA_priority_level */ + + uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer. + This parameter can be a value of @ref DMA_memory_to_memory */ +}DMA_InitTypeDef; + +/** + * @} + */ + +/** @defgroup DMA_Exported_Constants + * @{ + */ + +#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \ + ((PERIPH) == DMA1_Channel2) || \ + ((PERIPH) == DMA1_Channel3) || \ + ((PERIPH) == DMA1_Channel4) || \ + ((PERIPH) == DMA1_Channel5) || \ + ((PERIPH) == DMA1_Channel6) || \ + ((PERIPH) == DMA1_Channel7) || \ + ((PERIPH) == DMA2_Channel1) || \ + ((PERIPH) == DMA2_Channel2) || \ + ((PERIPH) == DMA2_Channel3) || \ + ((PERIPH) == DMA2_Channel4) || \ + ((PERIPH) == DMA2_Channel5)) + +/** @defgroup DMA_data_transfer_direction + * @{ + */ + +#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) +#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) +#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ + ((DIR) == DMA_DIR_PeripheralSRC)) +/** + * @} + */ + +/** @defgroup DMA_peripheral_incremented_mode + * @{ + */ + +#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) +#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) +#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ + ((STATE) == DMA_PeripheralInc_Disable)) +/** + * @} + */ + +/** @defgroup DMA_memory_incremented_mode + * @{ + */ + +#define DMA_MemoryInc_Enable ((uint32_t)0x00000080) +#define DMA_MemoryInc_Disable ((uint32_t)0x00000000) +#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ + ((STATE) == DMA_MemoryInc_Disable)) +/** + * @} + */ + +/** @defgroup DMA_peripheral_data_size + * @{ + */ + +#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) +#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) +#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) +#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ + ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ + ((SIZE) == DMA_PeripheralDataSize_Word)) +/** + * @} + */ + +/** @defgroup DMA_memory_data_size + * @{ + */ + +#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) +#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) +#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) +#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ + ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ + ((SIZE) == DMA_MemoryDataSize_Word)) +/** + * @} + */ + +/** @defgroup DMA_circular_normal_mode + * @{ + */ + +#define DMA_Mode_Circular ((uint32_t)0x00000020) +#define DMA_Mode_Normal ((uint32_t)0x00000000) +#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) +/** + * @} + */ + +/** @defgroup DMA_priority_level + * @{ + */ + +#define DMA_Priority_VeryHigh ((uint32_t)0x00003000) +#define DMA_Priority_High ((uint32_t)0x00002000) +#define DMA_Priority_Medium ((uint32_t)0x00001000) +#define DMA_Priority_Low ((uint32_t)0x00000000) +#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ + ((PRIORITY) == DMA_Priority_High) || \ + ((PRIORITY) == DMA_Priority_Medium) || \ + ((PRIORITY) == DMA_Priority_Low)) +/** + * @} + */ + +/** @defgroup DMA_memory_to_memory + * @{ + */ + +#define DMA_M2M_Enable ((uint32_t)0x00004000) +#define DMA_M2M_Disable ((uint32_t)0x00000000) +#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) + +/** + * @} + */ + +/** @defgroup DMA_interrupts_definition + * @{ + */ + +#define DMA_IT_TC ((uint32_t)0x00000002) +#define DMA_IT_HT ((uint32_t)0x00000004) +#define DMA_IT_TE ((uint32_t)0x00000008) +#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) + +#define DMA1_IT_GL1 ((uint32_t)0x00000001) +#define DMA1_IT_TC1 ((uint32_t)0x00000002) +#define DMA1_IT_HT1 ((uint32_t)0x00000004) +#define DMA1_IT_TE1 ((uint32_t)0x00000008) +#define DMA1_IT_GL2 ((uint32_t)0x00000010) +#define DMA1_IT_TC2 ((uint32_t)0x00000020) +#define DMA1_IT_HT2 ((uint32_t)0x00000040) +#define DMA1_IT_TE2 ((uint32_t)0x00000080) +#define DMA1_IT_GL3 ((uint32_t)0x00000100) +#define DMA1_IT_TC3 ((uint32_t)0x00000200) +#define DMA1_IT_HT3 ((uint32_t)0x00000400) +#define DMA1_IT_TE3 ((uint32_t)0x00000800) +#define DMA1_IT_GL4 ((uint32_t)0x00001000) +#define DMA1_IT_TC4 ((uint32_t)0x00002000) +#define DMA1_IT_HT4 ((uint32_t)0x00004000) +#define DMA1_IT_TE4 ((uint32_t)0x00008000) +#define DMA1_IT_GL5 ((uint32_t)0x00010000) +#define DMA1_IT_TC5 ((uint32_t)0x00020000) +#define DMA1_IT_HT5 ((uint32_t)0x00040000) +#define DMA1_IT_TE5 ((uint32_t)0x00080000) +#define DMA1_IT_GL6 ((uint32_t)0x00100000) +#define DMA1_IT_TC6 ((uint32_t)0x00200000) +#define DMA1_IT_HT6 ((uint32_t)0x00400000) +#define DMA1_IT_TE6 ((uint32_t)0x00800000) +#define DMA1_IT_GL7 ((uint32_t)0x01000000) +#define DMA1_IT_TC7 ((uint32_t)0x02000000) +#define DMA1_IT_HT7 ((uint32_t)0x04000000) +#define DMA1_IT_TE7 ((uint32_t)0x08000000) + +#define DMA2_IT_GL1 ((uint32_t)0x10000001) +#define DMA2_IT_TC1 ((uint32_t)0x10000002) +#define DMA2_IT_HT1 ((uint32_t)0x10000004) +#define DMA2_IT_TE1 ((uint32_t)0x10000008) +#define DMA2_IT_GL2 ((uint32_t)0x10000010) +#define DMA2_IT_TC2 ((uint32_t)0x10000020) +#define DMA2_IT_HT2 ((uint32_t)0x10000040) +#define DMA2_IT_TE2 ((uint32_t)0x10000080) +#define DMA2_IT_GL3 ((uint32_t)0x10000100) +#define DMA2_IT_TC3 ((uint32_t)0x10000200) +#define DMA2_IT_HT3 ((uint32_t)0x10000400) +#define DMA2_IT_TE3 ((uint32_t)0x10000800) +#define DMA2_IT_GL4 ((uint32_t)0x10001000) +#define DMA2_IT_TC4 ((uint32_t)0x10002000) +#define DMA2_IT_HT4 ((uint32_t)0x10004000) +#define DMA2_IT_TE4 ((uint32_t)0x10008000) +#define DMA2_IT_GL5 ((uint32_t)0x10010000) +#define DMA2_IT_TC5 ((uint32_t)0x10020000) +#define DMA2_IT_HT5 ((uint32_t)0x10040000) +#define DMA2_IT_TE5 ((uint32_t)0x10080000) + +#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) + +#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ + ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ + ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ + ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ + ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ + ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ + ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ + ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ + ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ + ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ + ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ + ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ + ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ + ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ + ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ + ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ + ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ + ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ + ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ + ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ + ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ + ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ + ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ + ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) + +/** + * @} + */ + +/** @defgroup DMA_flags_definition + * @{ + */ +#define DMA1_FLAG_GL1 ((uint32_t)0x00000001) +#define DMA1_FLAG_TC1 ((uint32_t)0x00000002) +#define DMA1_FLAG_HT1 ((uint32_t)0x00000004) +#define DMA1_FLAG_TE1 ((uint32_t)0x00000008) +#define DMA1_FLAG_GL2 ((uint32_t)0x00000010) +#define DMA1_FLAG_TC2 ((uint32_t)0x00000020) +#define DMA1_FLAG_HT2 ((uint32_t)0x00000040) +#define DMA1_FLAG_TE2 ((uint32_t)0x00000080) +#define DMA1_FLAG_GL3 ((uint32_t)0x00000100) +#define DMA1_FLAG_TC3 ((uint32_t)0x00000200) +#define DMA1_FLAG_HT3 ((uint32_t)0x00000400) +#define DMA1_FLAG_TE3 ((uint32_t)0x00000800) +#define DMA1_FLAG_GL4 ((uint32_t)0x00001000) +#define DMA1_FLAG_TC4 ((uint32_t)0x00002000) +#define DMA1_FLAG_HT4 ((uint32_t)0x00004000) +#define DMA1_FLAG_TE4 ((uint32_t)0x00008000) +#define DMA1_FLAG_GL5 ((uint32_t)0x00010000) +#define DMA1_FLAG_TC5 ((uint32_t)0x00020000) +#define DMA1_FLAG_HT5 ((uint32_t)0x00040000) +#define DMA1_FLAG_TE5 ((uint32_t)0x00080000) +#define DMA1_FLAG_GL6 ((uint32_t)0x00100000) +#define DMA1_FLAG_TC6 ((uint32_t)0x00200000) +#define DMA1_FLAG_HT6 ((uint32_t)0x00400000) +#define DMA1_FLAG_TE6 ((uint32_t)0x00800000) +#define DMA1_FLAG_GL7 ((uint32_t)0x01000000) +#define DMA1_FLAG_TC7 ((uint32_t)0x02000000) +#define DMA1_FLAG_HT7 ((uint32_t)0x04000000) +#define DMA1_FLAG_TE7 ((uint32_t)0x08000000) + +#define DMA2_FLAG_GL1 ((uint32_t)0x10000001) +#define DMA2_FLAG_TC1 ((uint32_t)0x10000002) +#define DMA2_FLAG_HT1 ((uint32_t)0x10000004) +#define DMA2_FLAG_TE1 ((uint32_t)0x10000008) +#define DMA2_FLAG_GL2 ((uint32_t)0x10000010) +#define DMA2_FLAG_TC2 ((uint32_t)0x10000020) +#define DMA2_FLAG_HT2 ((uint32_t)0x10000040) +#define DMA2_FLAG_TE2 ((uint32_t)0x10000080) +#define DMA2_FLAG_GL3 ((uint32_t)0x10000100) +#define DMA2_FLAG_TC3 ((uint32_t)0x10000200) +#define DMA2_FLAG_HT3 ((uint32_t)0x10000400) +#define DMA2_FLAG_TE3 ((uint32_t)0x10000800) +#define DMA2_FLAG_GL4 ((uint32_t)0x10001000) +#define DMA2_FLAG_TC4 ((uint32_t)0x10002000) +#define DMA2_FLAG_HT4 ((uint32_t)0x10004000) +#define DMA2_FLAG_TE4 ((uint32_t)0x10008000) +#define DMA2_FLAG_GL5 ((uint32_t)0x10010000) +#define DMA2_FLAG_TC5 ((uint32_t)0x10020000) +#define DMA2_FLAG_HT5 ((uint32_t)0x10040000) +#define DMA2_FLAG_TE5 ((uint32_t)0x10080000) + +#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) + +#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ + ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ + ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ + ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ + ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ + ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ + ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ + ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ + ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ + ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ + ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ + ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ + ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ + ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ + ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ + ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ + ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ + ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ + ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ + ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ + ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ + ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ + ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ + ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) +/** + * @} + */ + +/** @defgroup DMA_Buffer_Size + * @{ + */ + +#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup DMA_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Exported_Functions + * @{ + */ + +void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); +void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); +void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); +void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); +void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); +void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); +uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); +FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG); +void DMA_ClearFlag(uint32_t DMAy_FLAG); +ITStatus DMA_GetITStatus(uint32_t DMAy_IT); +void DMA_ClearITPendingBit(uint32_t DMAy_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_DMA_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h new file mode 100644 index 00000000..bb9d7f67 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h @@ -0,0 +1,184 @@ +/** + ****************************************************************************** + * @file stm32f10x_exti.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the EXTI firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_EXTI_H +#define __STM32F10x_EXTI_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup EXTI + * @{ + */ + +/** @defgroup EXTI_Exported_Types + * @{ + */ + +/** + * @brief EXTI mode enumeration + */ + +typedef enum +{ + EXTI_Mode_Interrupt = 0x00, + EXTI_Mode_Event = 0x04 +}EXTIMode_TypeDef; + +#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) + +/** + * @brief EXTI Trigger enumeration + */ + +typedef enum +{ + EXTI_Trigger_Rising = 0x08, + EXTI_Trigger_Falling = 0x0C, + EXTI_Trigger_Rising_Falling = 0x10 +}EXTITrigger_TypeDef; + +#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ + ((TRIGGER) == EXTI_Trigger_Falling) || \ + ((TRIGGER) == EXTI_Trigger_Rising_Falling)) +/** + * @brief EXTI Init Structure definition + */ + +typedef struct +{ + uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. + This parameter can be any combination of @ref EXTI_Lines */ + + EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. + This parameter can be a value of @ref EXTIMode_TypeDef */ + + EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. + This parameter can be a value of @ref EXTIMode_TypeDef */ + + FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. + This parameter can be set either to ENABLE or DISABLE */ +}EXTI_InitTypeDef; + +/** + * @} + */ + +/** @defgroup EXTI_Exported_Constants + * @{ + */ + +/** @defgroup EXTI_Lines + * @{ + */ + +#define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ +#define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ +#define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ +#define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ +#define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ +#define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ +#define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ +#define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ +#define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ +#define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ +#define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ +#define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ +#define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ +#define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ +#define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ +#define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ +#define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ +#define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ +#define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS + Wakeup from suspend event */ +#define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ + +#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) +#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ + ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ + ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ + ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ + ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ + ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ + ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ + ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ + ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ + ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) + + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup EXTI_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Exported_Functions + * @{ + */ + +void EXTI_DeInit(void); +void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); +void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); +void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); +FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); +void EXTI_ClearFlag(uint32_t EXTI_Line); +ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); +void EXTI_ClearITPendingBit(uint32_t EXTI_Line); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_EXTI_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h new file mode 100644 index 00000000..63720dea --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h @@ -0,0 +1,426 @@ +/** + ****************************************************************************** + * @file stm32f10x_flash.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the FLASH + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_FLASH_H +#define __STM32F10x_FLASH_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup FLASH + * @{ + */ + +/** @defgroup FLASH_Exported_Types + * @{ + */ + +/** + * @brief FLASH Status + */ + +typedef enum +{ + FLASH_BUSY = 1, + FLASH_ERROR_PG, + FLASH_ERROR_WRP, + FLASH_COMPLETE, + FLASH_TIMEOUT +}FLASH_Status; + +/** + * @} + */ + +/** @defgroup FLASH_Exported_Constants + * @{ + */ + +/** @defgroup Flash_Latency + * @{ + */ + +#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */ +#define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */ +#define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */ +#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ + ((LATENCY) == FLASH_Latency_1) || \ + ((LATENCY) == FLASH_Latency_2)) +/** + * @} + */ + +/** @defgroup Half_Cycle_Enable_Disable + * @{ + */ + +#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */ +#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */ +#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \ + ((STATE) == FLASH_HalfCycleAccess_Disable)) +/** + * @} + */ + +/** @defgroup Prefetch_Buffer_Enable_Disable + * @{ + */ + +#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */ +#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */ +#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \ + ((STATE) == FLASH_PrefetchBuffer_Disable)) +/** + * @} + */ + +/** @defgroup Option_Bytes_Write_Protection + * @{ + */ + +/* Values to be used with STM32 Low and Medium density devices */ +#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */ +#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */ +#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */ +#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */ +#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */ +#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */ +#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */ +#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */ + +/* Values to be used with STM32 Medium-density devices */ +#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */ +#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */ +#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */ +#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */ +#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */ +#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */ +#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */ +#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */ +#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */ +#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */ +#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */ +#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */ +#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */ +#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */ +#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */ +#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */ +#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */ +#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */ +#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */ +#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */ +#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */ +#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */ +#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */ +#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */ + +/* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */ +#define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 0 to 1 */ +#define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 2 to 3 */ +#define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 4 to 5 */ +#define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 6 to 7 */ +#define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 8 to 9 */ +#define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 10 to 11 */ +#define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 12 to 13 */ +#define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 14 to 15 */ +#define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 16 to 17 */ +#define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 18 to 19 */ +#define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 20 to 21 */ +#define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 22 to 23 */ +#define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 24 to 25 */ +#define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 26 to 27 */ +#define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 28 to 29 */ +#define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 30 to 31 */ +#define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 32 to 33 */ +#define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 34 to 35 */ +#define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 36 to 37 */ +#define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 38 to 39 */ +#define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 40 to 41 */ +#define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 42 to 43 */ +#define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 44 to 45 */ +#define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 46 to 47 */ +#define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 48 to 49 */ +#define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 50 to 51 */ +#define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 52 to 53 */ +#define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 54 to 55 */ +#define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 56 to 57 */ +#define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 58 to 59 */ +#define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 60 to 61 */ +#define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */ +#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */ +#define FLASH_WRProt_Pages62to511 ((uint32_t)0x80000000) /*!< STM32 XL-density devices: Write protection of page 62 to 511 */ + +#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ + +#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000)) + +#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) + +#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806)) + +/** + * @} + */ + +/** @defgroup Option_Bytes_IWatchdog + * @{ + */ + +#define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ +#define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ +#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) + +/** + * @} + */ + +/** @defgroup Option_Bytes_nRST_STOP + * @{ + */ + +#define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ +#define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ +#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) + +/** + * @} + */ + +/** @defgroup Option_Bytes_nRST_STDBY + * @{ + */ + +#define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ +#define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ +#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) + +#ifdef STM32F10X_XL +/** + * @} + */ +/** @defgroup FLASH_Boot + * @{ + */ +#define FLASH_BOOT_Bank1 ((uint16_t)0x0000) /*!< At startup, if boot pins are set in boot from user Flash position + and this parameter is selected the device will boot from Bank1(Default) */ +#define FLASH_BOOT_Bank2 ((uint16_t)0x0001) /*!< At startup, if boot pins are set in boot from user Flash position + and this parameter is selected the device will boot from Bank 2 or Bank 1, + depending on the activation of the bank */ +#define IS_FLASH_BOOT(BOOT) (((BOOT) == FLASH_BOOT_Bank1) || ((BOOT) == FLASH_BOOT_Bank2)) +#endif +/** + * @} + */ +/** @defgroup FLASH_Interrupts + * @{ + */ +#ifdef STM32F10X_XL +#define FLASH_IT_BANK2_ERROR ((uint32_t)0x80000400) /*!< FPEC BANK2 error interrupt source */ +#define FLASH_IT_BANK2_EOP ((uint32_t)0x80001000) /*!< End of FLASH BANK2 Operation Interrupt source */ + +#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */ +#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */ + +#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC BANK1 error interrupt source */ +#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH BANK1 Operation Interrupt source */ +#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0x7FFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) +#else +#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */ +#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */ +#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */ +#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */ + +#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) +#endif + +/** + * @} + */ + +/** @defgroup FLASH_Flags + * @{ + */ +#ifdef STM32F10X_XL +#define FLASH_FLAG_BANK2_BSY ((uint32_t)0x80000001) /*!< FLASH BANK2 Busy flag */ +#define FLASH_FLAG_BANK2_EOP ((uint32_t)0x80000020) /*!< FLASH BANK2 End of Operation flag */ +#define FLASH_FLAG_BANK2_PGERR ((uint32_t)0x80000004) /*!< FLASH BANK2 Program error flag */ +#define FLASH_FLAG_BANK2_WRPRTERR ((uint32_t)0x80000010) /*!< FLASH BANK2 Write protected error flag */ + +#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/ +#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */ +#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */ +#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */ + +#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ +#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ +#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ +#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ +#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ + +#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0x7FFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) +#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ + ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_OPTERR)|| \ + ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \ + ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_BANK2_BSY) || ((FLAG) == FLASH_FLAG_BANK2_EOP) || \ + ((FLAG) == FLASH_FLAG_BANK2_PGERR) || ((FLAG) == FLASH_FLAG_BANK2_WRPRTERR)) +#else +#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ +#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ +#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ +#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ +#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ + +#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/ +#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */ +#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */ +#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */ + +#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) +#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ + ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \ + ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_OPTERR)) +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup FLASH_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Exported_Functions + * @{ + */ + +/*------------ Functions used for all STM32F10x devices -----*/ +void FLASH_SetLatency(uint32_t FLASH_Latency); +void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess); +void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer); +void FLASH_Unlock(void); +void FLASH_Lock(void); +FLASH_Status FLASH_ErasePage(uint32_t Page_Address); +FLASH_Status FLASH_EraseAllPages(void); +FLASH_Status FLASH_EraseOptionBytes(void); +FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); +FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); +FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages); +FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState); +FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY); +uint32_t FLASH_GetUserOptionByte(void); +uint32_t FLASH_GetWriteProtectionOptionByte(void); +FlagStatus FLASH_GetReadOutProtectionStatus(void); +FlagStatus FLASH_GetPrefetchBufferStatus(void); +void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); +FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); +void FLASH_ClearFlag(uint32_t FLASH_FLAG); +FLASH_Status FLASH_GetStatus(void); +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); + +/*------------ New function used for all STM32F10x devices -----*/ +void FLASH_UnlockBank1(void); +void FLASH_LockBank1(void); +FLASH_Status FLASH_EraseAllBank1Pages(void); +FLASH_Status FLASH_GetBank1Status(void); +FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout); + +#ifdef STM32F10X_XL +/*---- New Functions used only with STM32F10x_XL density devices -----*/ +void FLASH_UnlockBank2(void); +void FLASH_LockBank2(void); +FLASH_Status FLASH_EraseAllBank2Pages(void); +FLASH_Status FLASH_GetBank2Status(void); +FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout); +FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_FLASH_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h new file mode 100644 index 00000000..6e1769d9 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h @@ -0,0 +1,733 @@ +/** + ****************************************************************************** + * @file stm32f10x_fsmc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the FSMC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_FSMC_H +#define __STM32F10x_FSMC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup FSMC + * @{ + */ + +/** @defgroup FSMC_Exported_Types + * @{ + */ + +/** + * @brief Timing parameters For NOR/SRAM Banks + */ + +typedef struct +{ + uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure + the duration of the address setup time. + This parameter can be a value between 0 and 0xF. + @note: It is not used with synchronous NOR Flash memories. */ + + uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure + the duration of the address hold time. + This parameter can be a value between 0 and 0xF. + @note: It is not used with synchronous NOR Flash memories.*/ + + uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure + the duration of the data setup time. + This parameter can be a value between 0 and 0xFF. + @note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */ + + uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure + the duration of the bus turnaround. + This parameter can be a value between 0 and 0xF. + @note: It is only used for multiplexed NOR Flash memories. */ + + uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles. + This parameter can be a value between 1 and 0xF. + @note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */ + + uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue + to the memory before getting the first data. + The value of this parameter depends on the memory type as shown below: + - It must be set to 0 in case of a CRAM + - It is don't care in asynchronous NOR, SRAM or ROM accesses + - It may assume a value between 0 and 0xF in NOR Flash memories + with synchronous burst mode enable */ + + uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode. + This parameter can be a value of @ref FSMC_Access_Mode */ +}FSMC_NORSRAMTimingInitTypeDef; + +/** + * @brief FSMC NOR/SRAM Init structure definition + */ + +typedef struct +{ + uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used. + This parameter can be a value of @ref FSMC_NORSRAM_Bank */ + + uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are + multiplexed on the databus or not. + This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */ + + uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to + the corresponding memory bank. + This parameter can be a value of @ref FSMC_Memory_Type */ + + uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. + This parameter can be a value of @ref FSMC_Data_Width */ + + uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, + valid only with synchronous burst Flash memories. + This parameter can be a value of @ref FSMC_Burst_Access_Mode */ + + uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, + valid only with asynchronous Flash memories. + This parameter can be a value of @ref FSMC_AsynchronousWait */ + + uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing + the Flash memory in burst mode. + This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */ + + uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash + memory, valid only when accessing Flash memories in burst mode. + This parameter can be a value of @ref FSMC_Wrap_Mode */ + + uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one + clock cycle before the wait state or during the wait state, + valid only when accessing memories in burst mode. + This parameter can be a value of @ref FSMC_Wait_Timing */ + + uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC. + This parameter can be a value of @ref FSMC_Write_Operation */ + + uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait + signal, valid for Flash memory access in burst mode. + This parameter can be a value of @ref FSMC_Wait_Signal */ + + uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode. + This parameter can be a value of @ref FSMC_Extended_Mode */ + + uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation. + This parameter can be a value of @ref FSMC_Write_Burst */ + + FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/ + + FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/ +}FSMC_NORSRAMInitTypeDef; + +/** + * @brief Timing parameters For FSMC NAND and PCCARD Banks + */ + +typedef struct +{ + uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before + the command assertion for NAND-Flash read or write access + to common/Attribute or I/O memory space (depending on + the memory space timing to be configured). + This parameter can be a value between 0 and 0xFF.*/ + + uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the + command for NAND-Flash read or write access to + common/Attribute or I/O memory space (depending on the + memory space timing to be configured). + This parameter can be a number between 0x00 and 0xFF */ + + uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address + (and data for write access) after the command deassertion + for NAND-Flash read or write access to common/Attribute + or I/O memory space (depending on the memory space timing + to be configured). + This parameter can be a number between 0x00 and 0xFF */ + + uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the + databus is kept in HiZ after the start of a NAND-Flash + write access to common/Attribute or I/O memory space (depending + on the memory space timing to be configured). + This parameter can be a number between 0x00 and 0xFF */ +}FSMC_NAND_PCCARDTimingInitTypeDef; + +/** + * @brief FSMC NAND Init structure definition + */ + +typedef struct +{ + uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used. + This parameter can be a value of @ref FSMC_NAND_Bank */ + + uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank. + This parameter can be any value of @ref FSMC_Wait_feature */ + + uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. + This parameter can be any value of @ref FSMC_Data_Width */ + + uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation. + This parameter can be any value of @ref FSMC_ECC */ + + uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC. + This parameter can be any value of @ref FSMC_ECC_Page_Size */ + + uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between CLE low and RE low. + This parameter can be a value between 0 and 0xFF. */ + + uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between ALE low and RE low. + This parameter can be a number between 0x0 and 0xFF */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ +}FSMC_NANDInitTypeDef; + +/** + * @brief FSMC PCCARD Init structure definition + */ + +typedef struct +{ + uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank. + This parameter can be any value of @ref FSMC_Wait_feature */ + + uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between CLE low and RE low. + This parameter can be a value between 0 and 0xFF. */ + + uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between ALE low and RE low. + This parameter can be a number between 0x0 and 0xFF */ + + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */ +}FSMC_PCCARDInitTypeDef; + +/** + * @} + */ + +/** @defgroup FSMC_Exported_Constants + * @{ + */ + +/** @defgroup FSMC_NORSRAM_Bank + * @{ + */ +#define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000) +#define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002) +#define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004) +#define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006) +/** + * @} + */ + +/** @defgroup FSMC_NAND_Bank + * @{ + */ +#define FSMC_Bank2_NAND ((uint32_t)0x00000010) +#define FSMC_Bank3_NAND ((uint32_t)0x00000100) +/** + * @} + */ + +/** @defgroup FSMC_PCCARD_Bank + * @{ + */ +#define FSMC_Bank4_PCCARD ((uint32_t)0x00001000) +/** + * @} + */ + +#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \ + ((BANK) == FSMC_Bank1_NORSRAM2) || \ + ((BANK) == FSMC_Bank1_NORSRAM3) || \ + ((BANK) == FSMC_Bank1_NORSRAM4)) + +#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ + ((BANK) == FSMC_Bank3_NAND)) + +#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ + ((BANK) == FSMC_Bank3_NAND) || \ + ((BANK) == FSMC_Bank4_PCCARD)) + +#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ + ((BANK) == FSMC_Bank3_NAND) || \ + ((BANK) == FSMC_Bank4_PCCARD)) + +/** @defgroup NOR_SRAM_Controller + * @{ + */ + +/** @defgroup FSMC_Data_Address_Bus_Multiplexing + * @{ + */ + +#define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000) +#define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002) +#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \ + ((MUX) == FSMC_DataAddressMux_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Memory_Type + * @{ + */ + +#define FSMC_MemoryType_SRAM ((uint32_t)0x00000000) +#define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004) +#define FSMC_MemoryType_NOR ((uint32_t)0x00000008) +#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \ + ((MEMORY) == FSMC_MemoryType_PSRAM)|| \ + ((MEMORY) == FSMC_MemoryType_NOR)) + +/** + * @} + */ + +/** @defgroup FSMC_Data_Width + * @{ + */ + +#define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000) +#define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010) +#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \ + ((WIDTH) == FSMC_MemoryDataWidth_16b)) + +/** + * @} + */ + +/** @defgroup FSMC_Burst_Access_Mode + * @{ + */ + +#define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000) +#define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100) +#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \ + ((STATE) == FSMC_BurstAccessMode_Enable)) +/** + * @} + */ + +/** @defgroup FSMC_AsynchronousWait + * @{ + */ +#define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000) +#define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000) +#define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \ + ((STATE) == FSMC_AsynchronousWait_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Signal_Polarity + * @{ + */ + +#define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000) +#define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200) +#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \ + ((POLARITY) == FSMC_WaitSignalPolarity_High)) + +/** + * @} + */ + +/** @defgroup FSMC_Wrap_Mode + * @{ + */ + +#define FSMC_WrapMode_Disable ((uint32_t)0x00000000) +#define FSMC_WrapMode_Enable ((uint32_t)0x00000400) +#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \ + ((MODE) == FSMC_WrapMode_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Timing + * @{ + */ + +#define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000) +#define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800) +#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \ + ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState)) + +/** + * @} + */ + +/** @defgroup FSMC_Write_Operation + * @{ + */ + +#define FSMC_WriteOperation_Disable ((uint32_t)0x00000000) +#define FSMC_WriteOperation_Enable ((uint32_t)0x00001000) +#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \ + ((OPERATION) == FSMC_WriteOperation_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Signal + * @{ + */ + +#define FSMC_WaitSignal_Disable ((uint32_t)0x00000000) +#define FSMC_WaitSignal_Enable ((uint32_t)0x00002000) +#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \ + ((SIGNAL) == FSMC_WaitSignal_Enable)) +/** + * @} + */ + +/** @defgroup FSMC_Extended_Mode + * @{ + */ + +#define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000) +#define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000) + +#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \ + ((MODE) == FSMC_ExtendedMode_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Write_Burst + * @{ + */ + +#define FSMC_WriteBurst_Disable ((uint32_t)0x00000000) +#define FSMC_WriteBurst_Enable ((uint32_t)0x00080000) +#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \ + ((BURST) == FSMC_WriteBurst_Enable)) +/** + * @} + */ + +/** @defgroup FSMC_Address_Setup_Time + * @{ + */ + +#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Address_Hold_Time + * @{ + */ + +#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Data_Setup_Time + * @{ + */ + +#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF)) + +/** + * @} + */ + +/** @defgroup FSMC_Bus_Turn_around_Duration + * @{ + */ + +#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_CLK_Division + * @{ + */ + +#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Data_Latency + * @{ + */ + +#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Access_Mode + * @{ + */ + +#define FSMC_AccessMode_A ((uint32_t)0x00000000) +#define FSMC_AccessMode_B ((uint32_t)0x10000000) +#define FSMC_AccessMode_C ((uint32_t)0x20000000) +#define FSMC_AccessMode_D ((uint32_t)0x30000000) +#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \ + ((MODE) == FSMC_AccessMode_B) || \ + ((MODE) == FSMC_AccessMode_C) || \ + ((MODE) == FSMC_AccessMode_D)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup NAND_PCCARD_Controller + * @{ + */ + +/** @defgroup FSMC_Wait_feature + * @{ + */ + +#define FSMC_Waitfeature_Disable ((uint32_t)0x00000000) +#define FSMC_Waitfeature_Enable ((uint32_t)0x00000002) +#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \ + ((FEATURE) == FSMC_Waitfeature_Enable)) + +/** + * @} + */ + + +/** @defgroup FSMC_ECC + * @{ + */ + +#define FSMC_ECC_Disable ((uint32_t)0x00000000) +#define FSMC_ECC_Enable ((uint32_t)0x00000040) +#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \ + ((STATE) == FSMC_ECC_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_ECC_Page_Size + * @{ + */ + +#define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000) +#define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000) +#define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000) +#define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000) +#define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000) +#define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000) +#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_512Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_8192Bytes)) + +/** + * @} + */ + +/** @defgroup FSMC_TCLR_Setup_Time + * @{ + */ + +#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_TAR_Setup_Time + * @{ + */ + +#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Setup_Time + * @{ + */ + +#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Setup_Time + * @{ + */ + +#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Hold_Setup_Time + * @{ + */ + +#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_HiZ_Setup_Time + * @{ + */ + +#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Interrupt_sources + * @{ + */ + +#define FSMC_IT_RisingEdge ((uint32_t)0x00000008) +#define FSMC_IT_Level ((uint32_t)0x00000010) +#define FSMC_IT_FallingEdge ((uint32_t)0x00000020) +#define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000)) +#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \ + ((IT) == FSMC_IT_Level) || \ + ((IT) == FSMC_IT_FallingEdge)) +/** + * @} + */ + +/** @defgroup FSMC_Flags + * @{ + */ + +#define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001) +#define FSMC_FLAG_Level ((uint32_t)0x00000002) +#define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004) +#define FSMC_FLAG_FEMPT ((uint32_t)0x00000040) +#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \ + ((FLAG) == FSMC_FLAG_Level) || \ + ((FLAG) == FSMC_FLAG_FallingEdge) || \ + ((FLAG) == FSMC_FLAG_FEMPT)) + +#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000)) + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup FSMC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Exported_Functions + * @{ + */ + +void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank); +void FSMC_NANDDeInit(uint32_t FSMC_Bank); +void FSMC_PCCARDDeInit(void); +void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); +void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); +void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); +void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); +void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); +void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); +void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState); +void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState); +void FSMC_PCCARDCmd(FunctionalState NewState); +void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState); +uint32_t FSMC_GetECC(uint32_t FSMC_Bank); +void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState); +FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); +void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); +ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT); +void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_FSMC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h new file mode 100644 index 00000000..dd28da89 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h @@ -0,0 +1,385 @@ +/** + ****************************************************************************** + * @file stm32f10x_gpio.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the GPIO + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_GPIO_H +#define __STM32F10x_GPIO_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup GPIO + * @{ + */ + +/** @defgroup GPIO_Exported_Types + * @{ + */ + +#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \ + ((PERIPH) == GPIOB) || \ + ((PERIPH) == GPIOC) || \ + ((PERIPH) == GPIOD) || \ + ((PERIPH) == GPIOE) || \ + ((PERIPH) == GPIOF) || \ + ((PERIPH) == GPIOG)) + +/** + * @brief Output Maximum frequency selection + */ + +typedef enum +{ + GPIO_Speed_10MHz = 1, + GPIO_Speed_2MHz, + GPIO_Speed_50MHz +}GPIOSpeed_TypeDef; +#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \ + ((SPEED) == GPIO_Speed_50MHz)) + +/** + * @brief Configuration Mode enumeration + */ + +typedef enum +{ GPIO_Mode_AIN = 0x0, + GPIO_Mode_IN_FLOATING = 0x04, + GPIO_Mode_IPD = 0x28, + GPIO_Mode_IPU = 0x48, + GPIO_Mode_Out_OD = 0x14, + GPIO_Mode_Out_PP = 0x10, + GPIO_Mode_AF_OD = 0x1C, + GPIO_Mode_AF_PP = 0x18 +}GPIOMode_TypeDef; + +#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \ + ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \ + ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \ + ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP)) + +/** + * @brief GPIO Init structure definition + */ + +typedef struct +{ + uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. + This parameter can be any value of @ref GPIO_pins_define */ + + GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins. + This parameter can be a value of @ref GPIOSpeed_TypeDef */ + + GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. + This parameter can be a value of @ref GPIOMode_TypeDef */ +}GPIO_InitTypeDef; + + +/** + * @brief Bit_SET and Bit_RESET enumeration + */ + +typedef enum +{ Bit_RESET = 0, + Bit_SET +}BitAction; + +#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) + +/** + * @} + */ + +/** @defgroup GPIO_Exported_Constants + * @{ + */ + +/** @defgroup GPIO_pins_define + * @{ + */ + +#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */ +#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */ +#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */ +#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */ +#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */ +#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */ +#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */ +#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */ +#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */ +#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */ +#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */ +#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */ +#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */ +#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */ +#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */ +#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */ +#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */ + +#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00)) + +#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ + ((PIN) == GPIO_Pin_1) || \ + ((PIN) == GPIO_Pin_2) || \ + ((PIN) == GPIO_Pin_3) || \ + ((PIN) == GPIO_Pin_4) || \ + ((PIN) == GPIO_Pin_5) || \ + ((PIN) == GPIO_Pin_6) || \ + ((PIN) == GPIO_Pin_7) || \ + ((PIN) == GPIO_Pin_8) || \ + ((PIN) == GPIO_Pin_9) || \ + ((PIN) == GPIO_Pin_10) || \ + ((PIN) == GPIO_Pin_11) || \ + ((PIN) == GPIO_Pin_12) || \ + ((PIN) == GPIO_Pin_13) || \ + ((PIN) == GPIO_Pin_14) || \ + ((PIN) == GPIO_Pin_15)) + +/** + * @} + */ + +/** @defgroup GPIO_Remap_define + * @{ + */ + +#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */ +#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */ +#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */ +#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */ +#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */ +#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */ +#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */ +#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */ +#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */ +#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */ +#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */ +#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */ +#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */ +#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */ +#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */ +#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */ +#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */ +#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */ +#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */ +#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */ +#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */ +#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */ +#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */ +#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */ +#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ +#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */ +#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */ +#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */ +#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected + to TIM2 Internal Trigger 1 for calibration + (only for Connectivity line devices) */ +#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */ + +#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */ + +#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */ +#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */ +#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */ +#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */ +#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */ +#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */ + +#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */ +#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */ +#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, + only for High density Value line devices) */ + +#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \ + ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \ + ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \ + ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \ + ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \ + ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \ + ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \ + ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \ + ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \ + ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \ + ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \ + ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \ + ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \ + ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \ + ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \ + ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \ + ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \ + ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \ + ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \ + ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \ + ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \ + ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC)) + +/** + * @} + */ + +/** @defgroup GPIO_Port_Sources + * @{ + */ + +#define GPIO_PortSourceGPIOA ((uint8_t)0x00) +#define GPIO_PortSourceGPIOB ((uint8_t)0x01) +#define GPIO_PortSourceGPIOC ((uint8_t)0x02) +#define GPIO_PortSourceGPIOD ((uint8_t)0x03) +#define GPIO_PortSourceGPIOE ((uint8_t)0x04) +#define GPIO_PortSourceGPIOF ((uint8_t)0x05) +#define GPIO_PortSourceGPIOG ((uint8_t)0x06) +#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOE)) + +#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOG)) + +/** + * @} + */ + +/** @defgroup GPIO_Pin_sources + * @{ + */ + +#define GPIO_PinSource0 ((uint8_t)0x00) +#define GPIO_PinSource1 ((uint8_t)0x01) +#define GPIO_PinSource2 ((uint8_t)0x02) +#define GPIO_PinSource3 ((uint8_t)0x03) +#define GPIO_PinSource4 ((uint8_t)0x04) +#define GPIO_PinSource5 ((uint8_t)0x05) +#define GPIO_PinSource6 ((uint8_t)0x06) +#define GPIO_PinSource7 ((uint8_t)0x07) +#define GPIO_PinSource8 ((uint8_t)0x08) +#define GPIO_PinSource9 ((uint8_t)0x09) +#define GPIO_PinSource10 ((uint8_t)0x0A) +#define GPIO_PinSource11 ((uint8_t)0x0B) +#define GPIO_PinSource12 ((uint8_t)0x0C) +#define GPIO_PinSource13 ((uint8_t)0x0D) +#define GPIO_PinSource14 ((uint8_t)0x0E) +#define GPIO_PinSource15 ((uint8_t)0x0F) + +#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ + ((PINSOURCE) == GPIO_PinSource1) || \ + ((PINSOURCE) == GPIO_PinSource2) || \ + ((PINSOURCE) == GPIO_PinSource3) || \ + ((PINSOURCE) == GPIO_PinSource4) || \ + ((PINSOURCE) == GPIO_PinSource5) || \ + ((PINSOURCE) == GPIO_PinSource6) || \ + ((PINSOURCE) == GPIO_PinSource7) || \ + ((PINSOURCE) == GPIO_PinSource8) || \ + ((PINSOURCE) == GPIO_PinSource9) || \ + ((PINSOURCE) == GPIO_PinSource10) || \ + ((PINSOURCE) == GPIO_PinSource11) || \ + ((PINSOURCE) == GPIO_PinSource12) || \ + ((PINSOURCE) == GPIO_PinSource13) || \ + ((PINSOURCE) == GPIO_PinSource14) || \ + ((PINSOURCE) == GPIO_PinSource15)) + +/** + * @} + */ + +/** @defgroup Ethernet_Media_Interface + * @{ + */ +#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000) +#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001) + +#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \ + ((INTERFACE) == GPIO_ETH_MediaInterface_RMII)) + +/** + * @} + */ +/** + * @} + */ + +/** @defgroup GPIO_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Exported_Functions + * @{ + */ + +void GPIO_DeInit(GPIO_TypeDef* GPIOx); +void GPIO_AFIODeInit(void); +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); +void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); +void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); +void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); +void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); +void GPIO_EventOutputCmd(FunctionalState NewState); +void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState); +void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); +void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_GPIO_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h new file mode 100644 index 00000000..60e4b14f --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h @@ -0,0 +1,684 @@ +/** + ****************************************************************************** + * @file stm32f10x_i2c.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the I2C firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_I2C_H +#define __STM32F10x_I2C_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup I2C + * @{ + */ + +/** @defgroup I2C_Exported_Types + * @{ + */ + +/** + * @brief I2C Init structure definition + */ + +typedef struct +{ + uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. + This parameter must be set to a value lower than 400kHz */ + + uint16_t I2C_Mode; /*!< Specifies the I2C mode. + This parameter can be a value of @ref I2C_mode */ + + uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle. + This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ + + uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address. + This parameter can be a 7-bit or 10-bit address. */ + + uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement. + This parameter can be a value of @ref I2C_acknowledgement */ + + uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. + This parameter can be a value of @ref I2C_acknowledged_address */ +}I2C_InitTypeDef; + +/** + * @} + */ + + +/** @defgroup I2C_Exported_Constants + * @{ + */ + +#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ + ((PERIPH) == I2C2)) +/** @defgroup I2C_mode + * @{ + */ + +#define I2C_Mode_I2C ((uint16_t)0x0000) +#define I2C_Mode_SMBusDevice ((uint16_t)0x0002) +#define I2C_Mode_SMBusHost ((uint16_t)0x000A) +#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ + ((MODE) == I2C_Mode_SMBusDevice) || \ + ((MODE) == I2C_Mode_SMBusHost)) +/** + * @} + */ + +/** @defgroup I2C_duty_cycle_in_fast_mode + * @{ + */ + +#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */ +#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */ +#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ + ((CYCLE) == I2C_DutyCycle_2)) +/** + * @} + */ + +/** @defgroup I2C_acknowledgement + * @{ + */ + +#define I2C_Ack_Enable ((uint16_t)0x0400) +#define I2C_Ack_Disable ((uint16_t)0x0000) +#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ + ((STATE) == I2C_Ack_Disable)) +/** + * @} + */ + +/** @defgroup I2C_transfer_direction + * @{ + */ + +#define I2C_Direction_Transmitter ((uint8_t)0x00) +#define I2C_Direction_Receiver ((uint8_t)0x01) +#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ + ((DIRECTION) == I2C_Direction_Receiver)) +/** + * @} + */ + +/** @defgroup I2C_acknowledged_address + * @{ + */ + +#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) +#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) +#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ + ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) +/** + * @} + */ + +/** @defgroup I2C_registers + * @{ + */ + +#define I2C_Register_CR1 ((uint8_t)0x00) +#define I2C_Register_CR2 ((uint8_t)0x04) +#define I2C_Register_OAR1 ((uint8_t)0x08) +#define I2C_Register_OAR2 ((uint8_t)0x0C) +#define I2C_Register_DR ((uint8_t)0x10) +#define I2C_Register_SR1 ((uint8_t)0x14) +#define I2C_Register_SR2 ((uint8_t)0x18) +#define I2C_Register_CCR ((uint8_t)0x1C) +#define I2C_Register_TRISE ((uint8_t)0x20) +#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ + ((REGISTER) == I2C_Register_CR2) || \ + ((REGISTER) == I2C_Register_OAR1) || \ + ((REGISTER) == I2C_Register_OAR2) || \ + ((REGISTER) == I2C_Register_DR) || \ + ((REGISTER) == I2C_Register_SR1) || \ + ((REGISTER) == I2C_Register_SR2) || \ + ((REGISTER) == I2C_Register_CCR) || \ + ((REGISTER) == I2C_Register_TRISE)) +/** + * @} + */ + +/** @defgroup I2C_SMBus_alert_pin_level + * @{ + */ + +#define I2C_SMBusAlert_Low ((uint16_t)0x2000) +#define I2C_SMBusAlert_High ((uint16_t)0xDFFF) +#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ + ((ALERT) == I2C_SMBusAlert_High)) +/** + * @} + */ + +/** @defgroup I2C_PEC_position + * @{ + */ + +#define I2C_PECPosition_Next ((uint16_t)0x0800) +#define I2C_PECPosition_Current ((uint16_t)0xF7FF) +#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ + ((POSITION) == I2C_PECPosition_Current)) +/** + * @} + */ + +/** @defgroup I2C_NCAK_position + * @{ + */ + +#define I2C_NACKPosition_Next ((uint16_t)0x0800) +#define I2C_NACKPosition_Current ((uint16_t)0xF7FF) +#define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \ + ((POSITION) == I2C_NACKPosition_Current)) +/** + * @} + */ + +/** @defgroup I2C_interrupts_definition + * @{ + */ + +#define I2C_IT_BUF ((uint16_t)0x0400) +#define I2C_IT_EVT ((uint16_t)0x0200) +#define I2C_IT_ERR ((uint16_t)0x0100) +#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) +/** + * @} + */ + +/** @defgroup I2C_interrupts_definition + * @{ + */ + +#define I2C_IT_SMBALERT ((uint32_t)0x01008000) +#define I2C_IT_TIMEOUT ((uint32_t)0x01004000) +#define I2C_IT_PECERR ((uint32_t)0x01001000) +#define I2C_IT_OVR ((uint32_t)0x01000800) +#define I2C_IT_AF ((uint32_t)0x01000400) +#define I2C_IT_ARLO ((uint32_t)0x01000200) +#define I2C_IT_BERR ((uint32_t)0x01000100) +#define I2C_IT_TXE ((uint32_t)0x06000080) +#define I2C_IT_RXNE ((uint32_t)0x06000040) +#define I2C_IT_STOPF ((uint32_t)0x02000010) +#define I2C_IT_ADD10 ((uint32_t)0x02000008) +#define I2C_IT_BTF ((uint32_t)0x02000004) +#define I2C_IT_ADDR ((uint32_t)0x02000002) +#define I2C_IT_SB ((uint32_t)0x02000001) + +#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) + +#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ + ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ + ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ + ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ + ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ + ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ + ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) +/** + * @} + */ + +/** @defgroup I2C_flags_definition + * @{ + */ + +/** + * @brief SR2 register flags + */ + +#define I2C_FLAG_DUALF ((uint32_t)0x00800000) +#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) +#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) +#define I2C_FLAG_GENCALL ((uint32_t)0x00100000) +#define I2C_FLAG_TRA ((uint32_t)0x00040000) +#define I2C_FLAG_BUSY ((uint32_t)0x00020000) +#define I2C_FLAG_MSL ((uint32_t)0x00010000) + +/** + * @brief SR1 register flags + */ + +#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) +#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) +#define I2C_FLAG_PECERR ((uint32_t)0x10001000) +#define I2C_FLAG_OVR ((uint32_t)0x10000800) +#define I2C_FLAG_AF ((uint32_t)0x10000400) +#define I2C_FLAG_ARLO ((uint32_t)0x10000200) +#define I2C_FLAG_BERR ((uint32_t)0x10000100) +#define I2C_FLAG_TXE ((uint32_t)0x10000080) +#define I2C_FLAG_RXNE ((uint32_t)0x10000040) +#define I2C_FLAG_STOPF ((uint32_t)0x10000010) +#define I2C_FLAG_ADD10 ((uint32_t)0x10000008) +#define I2C_FLAG_BTF ((uint32_t)0x10000004) +#define I2C_FLAG_ADDR ((uint32_t)0x10000002) +#define I2C_FLAG_SB ((uint32_t)0x10000001) + +#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) + +#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ + ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ + ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ + ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ + ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ + ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ + ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ + ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ + ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ + ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ + ((FLAG) == I2C_FLAG_SB)) +/** + * @} + */ + +/** @defgroup I2C_Events + * @{ + */ + +/*======================================== + + I2C Master Events (Events grouped in order of communication) + ==========================================*/ +/** + * @brief Communication start + * + * After sending the START condition (I2C_GenerateSTART() function) the master + * has to wait for this event. It means that the Start condition has been correctly + * released on the I2C bus (the bus is free, no other devices is communicating). + * + */ +/* --EV5 */ +#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ + +/** + * @brief Address Acknowledge + * + * After checking on EV5 (start condition correctly released on the bus), the + * master sends the address of the slave(s) with which it will communicate + * (I2C_Send7bitAddress() function, it also determines the direction of the communication: + * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges + * his address. If an acknowledge is sent on the bus, one of the following events will + * be set: + * + * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED + * event is set. + * + * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED + * is set + * + * 3) In case of 10-Bit addressing mode, the master (just after generating the START + * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() + * function). Then master should wait on EV9. It means that the 10-bit addressing + * header has been correctly sent on the bus. Then master should send the second part of + * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master + * should wait for event EV6. + * + */ + +/* --EV6 */ +#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ +#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ +/* --EV9 */ +#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ + +/** + * @brief Communication events + * + * If a communication is established (START condition generated and slave address + * acknowledged) then the master has to check on one of the following events for + * communication procedures: + * + * 1) Master Receiver mode: The master has to wait on the event EV7 then to read + * the data received from the slave (I2C_ReceiveData() function). + * + * 2) Master Transmitter mode: The master has to send data (I2C_SendData() + * function) then to wait on event EV8 or EV8_2. + * These two events are similar: + * - EV8 means that the data has been written in the data register and is + * being shifted out. + * - EV8_2 means that the data has been physically shifted out and output + * on the bus. + * In most cases, using EV8 is sufficient for the application. + * Using EV8_2 leads to a slower communication but ensure more reliable test. + * EV8_2 is also more suitable than EV8 for testing on the last data transmission + * (before Stop condition generation). + * + * @note In case the user software does not guarantee that this event EV7 is + * managed before the current byte end of transfer, then user may check on EV7 + * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). + * In this case the communication may be slower. + * + */ + +/* Master RECEIVER mode -----------------------------*/ +/* --EV7 */ +#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ + +/* Master TRANSMITTER mode --------------------------*/ +/* --EV8 */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ +/* --EV8_2 */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ + + +/*======================================== + + I2C Slave Events (Events grouped in order of communication) + ==========================================*/ + +/** + * @brief Communication start events + * + * Wait on one of these events at the start of the communication. It means that + * the I2C peripheral detected a Start condition on the bus (generated by master + * device) followed by the peripheral address. The peripheral generates an ACK + * condition on the bus (if the acknowledge feature is enabled through function + * I2C_AcknowledgeConfig()) and the events listed above are set : + * + * 1) In normal case (only one address managed by the slave), when the address + * sent by the master matches the own address of the peripheral (configured by + * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set + * (where XXX could be TRANSMITTER or RECEIVER). + * + * 2) In case the address sent by the master matches the second address of the + * peripheral (configured by the function I2C_OwnAddress2Config() and enabled + * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED + * (where XXX could be TRANSMITTER or RECEIVER) are set. + * + * 3) In case the address sent by the master is General Call (address 0x00) and + * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) + * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. + * + */ + +/* --EV1 (all the events below are variants of EV1) */ +/* 1) Case of One Single Address managed by the slave */ +#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ + +/* 2) Case of Dual address managed by the slave */ +#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ + +/* 3) Case of General Call enabled for the slave */ +#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ + +/** + * @brief Communication events + * + * Wait on one of these events when EV1 has already been checked and: + * + * - Slave RECEIVER mode: + * - EV2: When the application is expecting a data byte to be received. + * - EV4: When the application is expecting the end of the communication: master + * sends a stop condition and data transmission is stopped. + * + * - Slave Transmitter mode: + * - EV3: When a byte has been transmitted by the slave and the application is expecting + * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and + * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be + * used when the user software doesn't guarantee the EV3 is managed before the + * current byte end of transfer. + * - EV3_2: When the master sends a NACK in order to tell slave that data transmission + * shall end (before sending the STOP condition). In this case slave has to stop sending + * data bytes and expect a Stop condition on the bus. + * + * @note In case the user software does not guarantee that the event EV2 is + * managed before the current byte end of transfer, then user may check on EV2 + * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). + * In this case the communication may be slower. + * + */ + +/* Slave RECEIVER mode --------------------------*/ +/* --EV2 */ +#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ +/* --EV4 */ +#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ + +/* Slave TRANSMITTER mode -----------------------*/ +/* --EV3 */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ +/* --EV3_2 */ +#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ + +/*=========================== End of Events Description ==========================================*/ + +#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ + ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ + ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ + ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ + ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ + ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) +/** + * @} + */ + +/** @defgroup I2C_own_address1 + * @{ + */ + +#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) +/** + * @} + */ + +/** @defgroup I2C_clock_speed + * @{ + */ + +#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup I2C_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Exported_Functions + * @{ + */ + +void I2C_DeInit(I2C_TypeDef* I2Cx); +void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); +void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); +void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); +void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); +void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); +uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); +void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); +uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); +void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition); +void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); +void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); +void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); +uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); +void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); + +/** + * @brief + **************************************************************************************** + * + * I2C State Monitoring Functions + * + **************************************************************************************** + * This I2C driver provides three different ways for I2C state monitoring + * depending on the application requirements and constraints: + * + * + * 1) Basic state monitoring: + * Using I2C_CheckEvent() function: + * It compares the status registers (SR1 and SR2) content to a given event + * (can be the combination of one or more flags). + * It returns SUCCESS if the current status includes the given flags + * and returns ERROR if one or more flags are missing in the current status. + * - When to use: + * - This function is suitable for most applications as well as for startup + * activity since the events are fully described in the product reference manual + * (RM0008). + * - It is also suitable for users who need to define their own events. + * - Limitations: + * - If an error occurs (ie. error flags are set besides to the monitored flags), + * the I2C_CheckEvent() function may return SUCCESS despite the communication + * hold or corrupted real state. + * In this case, it is advised to use error interrupts to monitor the error + * events and handle them in the interrupt IRQ handler. + * + * @note + * For error management, it is advised to use the following functions: + * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). + * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. + * Where x is the peripheral instance (I2C1, I2C2 ...) + * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() + * in order to determine which error occurred. + * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() + * and/or I2C_GenerateStop() in order to clear the error flag and source, + * and return to correct communication status. + * + * + * 2) Advanced state monitoring: + * Using the function I2C_GetLastEvent() which returns the image of both status + * registers in a single word (uint32_t) (Status Register 2 value is shifted left + * by 16 bits and concatenated to Status Register 1). + * - When to use: + * - This function is suitable for the same applications above but it allows to + * overcome the limitations of I2C_GetFlagStatus() function (see below). + * The returned value could be compared to events already defined in the + * library (stm32f10x_i2c.h) or to custom values defined by user. + * - This function is suitable when multiple flags are monitored at the same time. + * - At the opposite of I2C_CheckEvent() function, this function allows user to + * choose when an event is accepted (when all events flags are set and no + * other flags are set or just when the needed flags are set like + * I2C_CheckEvent() function). + * - Limitations: + * - User may need to define his own events. + * - Same remark concerning the error management is applicable for this + * function if user decides to check only regular communication flags (and + * ignores error flags). + * + * + * 3) Flag-based state monitoring: + * Using the function I2C_GetFlagStatus() which simply returns the status of + * one single flag (ie. I2C_FLAG_RXNE ...). + * - When to use: + * - This function could be used for specific applications or in debug phase. + * - It is suitable when only one flag checking is needed (most I2C events + * are monitored through multiple flags). + * - Limitations: + * - When calling this function, the Status register is accessed. Some flags are + * cleared when the status register is accessed. So checking the status + * of one Flag, may clear other ones. + * - Function may need to be called twice or more in order to monitor one + * single event. + * + */ + +/** + * + * 1) Basic state monitoring + ******************************************************************************* + */ +ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); +/** + * + * 2) Advanced state monitoring + ******************************************************************************* + */ +uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); +/** + * + * 3) Flag-based state monitoring + ******************************************************************************* + */ +FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); +/** + * + ******************************************************************************* + */ + +void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); +ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); +void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_I2C_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h new file mode 100644 index 00000000..25b0bb52 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h @@ -0,0 +1,140 @@ +/** + ****************************************************************************** + * @file stm32f10x_iwdg.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the IWDG + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IWDG_H +#define __STM32F10x_IWDG_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup IWDG + * @{ + */ + +/** @defgroup IWDG_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Exported_Constants + * @{ + */ + +/** @defgroup IWDG_WriteAccess + * @{ + */ + +#define IWDG_WriteAccess_Enable ((uint16_t)0x5555) +#define IWDG_WriteAccess_Disable ((uint16_t)0x0000) +#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ + ((ACCESS) == IWDG_WriteAccess_Disable)) +/** + * @} + */ + +/** @defgroup IWDG_prescaler + * @{ + */ + +#define IWDG_Prescaler_4 ((uint8_t)0x00) +#define IWDG_Prescaler_8 ((uint8_t)0x01) +#define IWDG_Prescaler_16 ((uint8_t)0x02) +#define IWDG_Prescaler_32 ((uint8_t)0x03) +#define IWDG_Prescaler_64 ((uint8_t)0x04) +#define IWDG_Prescaler_128 ((uint8_t)0x05) +#define IWDG_Prescaler_256 ((uint8_t)0x06) +#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ + ((PRESCALER) == IWDG_Prescaler_8) || \ + ((PRESCALER) == IWDG_Prescaler_16) || \ + ((PRESCALER) == IWDG_Prescaler_32) || \ + ((PRESCALER) == IWDG_Prescaler_64) || \ + ((PRESCALER) == IWDG_Prescaler_128)|| \ + ((PRESCALER) == IWDG_Prescaler_256)) +/** + * @} + */ + +/** @defgroup IWDG_Flag + * @{ + */ + +#define IWDG_FLAG_PVU ((uint16_t)0x0001) +#define IWDG_FLAG_RVU ((uint16_t)0x0002) +#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) +#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup IWDG_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Exported_Functions + * @{ + */ + +void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); +void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); +void IWDG_SetReload(uint16_t Reload); +void IWDG_ReloadCounter(void); +void IWDG_Enable(void); +FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_IWDG_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h new file mode 100644 index 00000000..1c025e2f --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h @@ -0,0 +1,156 @@ +/** + ****************************************************************************** + * @file stm32f10x_pwr.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the PWR firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_PWR_H +#define __STM32F10x_PWR_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup PWR + * @{ + */ + +/** @defgroup PWR_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Exported_Constants + * @{ + */ + +/** @defgroup PVD_detection_level + * @{ + */ + +#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) +#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) +#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) +#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) +#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) +#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) +#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) +#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) +#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ + ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ + ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ + ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) +/** + * @} + */ + +/** @defgroup Regulator_state_is_STOP_mode + * @{ + */ + +#define PWR_Regulator_ON ((uint32_t)0x00000000) +#define PWR_Regulator_LowPower ((uint32_t)0x00000001) +#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ + ((REGULATOR) == PWR_Regulator_LowPower)) +/** + * @} + */ + +/** @defgroup STOP_mode_entry + * @{ + */ + +#define PWR_STOPEntry_WFI ((uint8_t)0x01) +#define PWR_STOPEntry_WFE ((uint8_t)0x02) +#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) + +/** + * @} + */ + +/** @defgroup PWR_Flag + * @{ + */ + +#define PWR_FLAG_WU ((uint32_t)0x00000001) +#define PWR_FLAG_SB ((uint32_t)0x00000002) +#define PWR_FLAG_PVDO ((uint32_t)0x00000004) +#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ + ((FLAG) == PWR_FLAG_PVDO)) + +#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup PWR_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Exported_Functions + * @{ + */ + +void PWR_DeInit(void); +void PWR_BackupAccessCmd(FunctionalState NewState); +void PWR_PVDCmd(FunctionalState NewState); +void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); +void PWR_WakeUpPinCmd(FunctionalState NewState); +void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); +void PWR_EnterSTANDBYMode(void); +FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); +void PWR_ClearFlag(uint32_t PWR_FLAG); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_PWR_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h new file mode 100644 index 00000000..1149c347 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h @@ -0,0 +1,727 @@ +/** + ****************************************************************************** + * @file stm32f10x_rcc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the RCC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_RCC_H +#define __STM32F10x_RCC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup RCC + * @{ + */ + +/** @defgroup RCC_Exported_Types + * @{ + */ + +typedef struct +{ + uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */ + uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */ + uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */ + uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */ + uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */ +}RCC_ClocksTypeDef; + +/** + * @} + */ + +/** @defgroup RCC_Exported_Constants + * @{ + */ + +/** @defgroup HSE_configuration + * @{ + */ + +#define RCC_HSE_OFF ((uint32_t)0x00000000) +#define RCC_HSE_ON ((uint32_t)0x00010000) +#define RCC_HSE_Bypass ((uint32_t)0x00040000) +#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \ + ((HSE) == RCC_HSE_Bypass)) + +/** + * @} + */ + +/** @defgroup PLL_entry_clock_source + * @{ + */ + +#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000) + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL) + #define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000) + #define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000) + #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ + ((SOURCE) == RCC_PLLSource_HSE_Div1) || \ + ((SOURCE) == RCC_PLLSource_HSE_Div2)) +#else + #define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000) + #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ + ((SOURCE) == RCC_PLLSource_PREDIV1)) +#endif /* STM32F10X_CL */ + +/** + * @} + */ + +/** @defgroup PLL_multiplication_factor + * @{ + */ +#ifndef STM32F10X_CL + #define RCC_PLLMul_2 ((uint32_t)0x00000000) + #define RCC_PLLMul_3 ((uint32_t)0x00040000) + #define RCC_PLLMul_4 ((uint32_t)0x00080000) + #define RCC_PLLMul_5 ((uint32_t)0x000C0000) + #define RCC_PLLMul_6 ((uint32_t)0x00100000) + #define RCC_PLLMul_7 ((uint32_t)0x00140000) + #define RCC_PLLMul_8 ((uint32_t)0x00180000) + #define RCC_PLLMul_9 ((uint32_t)0x001C0000) + #define RCC_PLLMul_10 ((uint32_t)0x00200000) + #define RCC_PLLMul_11 ((uint32_t)0x00240000) + #define RCC_PLLMul_12 ((uint32_t)0x00280000) + #define RCC_PLLMul_13 ((uint32_t)0x002C0000) + #define RCC_PLLMul_14 ((uint32_t)0x00300000) + #define RCC_PLLMul_15 ((uint32_t)0x00340000) + #define RCC_PLLMul_16 ((uint32_t)0x00380000) + #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \ + ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ + ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ + ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ + ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \ + ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \ + ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \ + ((MUL) == RCC_PLLMul_16)) + +#else + #define RCC_PLLMul_4 ((uint32_t)0x00080000) + #define RCC_PLLMul_5 ((uint32_t)0x000C0000) + #define RCC_PLLMul_6 ((uint32_t)0x00100000) + #define RCC_PLLMul_7 ((uint32_t)0x00140000) + #define RCC_PLLMul_8 ((uint32_t)0x00180000) + #define RCC_PLLMul_9 ((uint32_t)0x001C0000) + #define RCC_PLLMul_6_5 ((uint32_t)0x00340000) + + #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ + ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ + ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ + ((MUL) == RCC_PLLMul_6_5)) +#endif /* STM32F10X_CL */ +/** + * @} + */ + +/** @defgroup PREDIV1_division_factor + * @{ + */ +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) + #define RCC_PREDIV1_Div1 ((uint32_t)0x00000000) + #define RCC_PREDIV1_Div2 ((uint32_t)0x00000001) + #define RCC_PREDIV1_Div3 ((uint32_t)0x00000002) + #define RCC_PREDIV1_Div4 ((uint32_t)0x00000003) + #define RCC_PREDIV1_Div5 ((uint32_t)0x00000004) + #define RCC_PREDIV1_Div6 ((uint32_t)0x00000005) + #define RCC_PREDIV1_Div7 ((uint32_t)0x00000006) + #define RCC_PREDIV1_Div8 ((uint32_t)0x00000007) + #define RCC_PREDIV1_Div9 ((uint32_t)0x00000008) + #define RCC_PREDIV1_Div10 ((uint32_t)0x00000009) + #define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A) + #define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B) + #define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C) + #define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D) + #define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E) + #define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F) + + #define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \ + ((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \ + ((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \ + ((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \ + ((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \ + ((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \ + ((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \ + ((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16)) +#endif +/** + * @} + */ + + +/** @defgroup PREDIV1_clock_source + * @{ + */ +#ifdef STM32F10X_CL +/* PREDIV1 clock source (for STM32 connectivity line devices) */ + #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) + #define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000) + + #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \ + ((SOURCE) == RCC_PREDIV1_Source_PLL2)) +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/* PREDIV1 clock source (for STM32 Value line devices) */ + #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) + + #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE)) +#endif +/** + * @} + */ + +#ifdef STM32F10X_CL +/** @defgroup PREDIV2_division_factor + * @{ + */ + + #define RCC_PREDIV2_Div1 ((uint32_t)0x00000000) + #define RCC_PREDIV2_Div2 ((uint32_t)0x00000010) + #define RCC_PREDIV2_Div3 ((uint32_t)0x00000020) + #define RCC_PREDIV2_Div4 ((uint32_t)0x00000030) + #define RCC_PREDIV2_Div5 ((uint32_t)0x00000040) + #define RCC_PREDIV2_Div6 ((uint32_t)0x00000050) + #define RCC_PREDIV2_Div7 ((uint32_t)0x00000060) + #define RCC_PREDIV2_Div8 ((uint32_t)0x00000070) + #define RCC_PREDIV2_Div9 ((uint32_t)0x00000080) + #define RCC_PREDIV2_Div10 ((uint32_t)0x00000090) + #define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0) + #define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0) + #define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0) + #define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0) + #define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0) + #define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0) + + #define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \ + ((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \ + ((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \ + ((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \ + ((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \ + ((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \ + ((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \ + ((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16)) +/** + * @} + */ + + +/** @defgroup PLL2_multiplication_factor + * @{ + */ + + #define RCC_PLL2Mul_8 ((uint32_t)0x00000600) + #define RCC_PLL2Mul_9 ((uint32_t)0x00000700) + #define RCC_PLL2Mul_10 ((uint32_t)0x00000800) + #define RCC_PLL2Mul_11 ((uint32_t)0x00000900) + #define RCC_PLL2Mul_12 ((uint32_t)0x00000A00) + #define RCC_PLL2Mul_13 ((uint32_t)0x00000B00) + #define RCC_PLL2Mul_14 ((uint32_t)0x00000C00) + #define RCC_PLL2Mul_16 ((uint32_t)0x00000E00) + #define RCC_PLL2Mul_20 ((uint32_t)0x00000F00) + + #define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \ + ((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \ + ((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \ + ((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \ + ((MUL) == RCC_PLL2Mul_20)) +/** + * @} + */ + + +/** @defgroup PLL3_multiplication_factor + * @{ + */ + + #define RCC_PLL3Mul_8 ((uint32_t)0x00006000) + #define RCC_PLL3Mul_9 ((uint32_t)0x00007000) + #define RCC_PLL3Mul_10 ((uint32_t)0x00008000) + #define RCC_PLL3Mul_11 ((uint32_t)0x00009000) + #define RCC_PLL3Mul_12 ((uint32_t)0x0000A000) + #define RCC_PLL3Mul_13 ((uint32_t)0x0000B000) + #define RCC_PLL3Mul_14 ((uint32_t)0x0000C000) + #define RCC_PLL3Mul_16 ((uint32_t)0x0000E000) + #define RCC_PLL3Mul_20 ((uint32_t)0x0000F000) + + #define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \ + ((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \ + ((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \ + ((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \ + ((MUL) == RCC_PLL3Mul_20)) +/** + * @} + */ + +#endif /* STM32F10X_CL */ + + +/** @defgroup System_clock_source + * @{ + */ + +#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000) +#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001) +#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002) +#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ + ((SOURCE) == RCC_SYSCLKSource_HSE) || \ + ((SOURCE) == RCC_SYSCLKSource_PLLCLK)) +/** + * @} + */ + +/** @defgroup AHB_clock_source + * @{ + */ + +#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000) +#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080) +#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090) +#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0) +#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0) +#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0) +#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0) +#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0) +#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0) +#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \ + ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \ + ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \ + ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \ + ((HCLK) == RCC_SYSCLK_Div512)) +/** + * @} + */ + +/** @defgroup APB1_APB2_clock_source + * @{ + */ + +#define RCC_HCLK_Div1 ((uint32_t)0x00000000) +#define RCC_HCLK_Div2 ((uint32_t)0x00000400) +#define RCC_HCLK_Div4 ((uint32_t)0x00000500) +#define RCC_HCLK_Div8 ((uint32_t)0x00000600) +#define RCC_HCLK_Div16 ((uint32_t)0x00000700) +#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \ + ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \ + ((PCLK) == RCC_HCLK_Div16)) +/** + * @} + */ + +/** @defgroup RCC_Interrupt_source + * @{ + */ + +#define RCC_IT_LSIRDY ((uint8_t)0x01) +#define RCC_IT_LSERDY ((uint8_t)0x02) +#define RCC_IT_HSIRDY ((uint8_t)0x04) +#define RCC_IT_HSERDY ((uint8_t)0x08) +#define RCC_IT_PLLRDY ((uint8_t)0x10) +#define RCC_IT_CSS ((uint8_t)0x80) + +#ifndef STM32F10X_CL + #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00)) + #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ + ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ + ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS)) + #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00)) +#else + #define RCC_IT_PLL2RDY ((uint8_t)0x20) + #define RCC_IT_PLL3RDY ((uint8_t)0x40) + #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00)) + #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ + ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ + ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \ + ((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY)) + #define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00) +#endif /* STM32F10X_CL */ + + +/** + * @} + */ + +#ifndef STM32F10X_CL +/** @defgroup USB_Device_clock_source + * @{ + */ + + #define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00) + #define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01) + + #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \ + ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1)) +/** + * @} + */ +#else +/** @defgroup USB_OTG_FS_clock_source + * @{ + */ + #define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00) + #define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01) + + #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \ + ((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2)) +/** + * @} + */ +#endif /* STM32F10X_CL */ + + +#ifdef STM32F10X_CL +/** @defgroup I2S2_clock_source + * @{ + */ + #define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00) + #define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01) + + #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \ + ((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO)) +/** + * @} + */ + +/** @defgroup I2S3_clock_source + * @{ + */ + #define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00) + #define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01) + + #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \ + ((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO)) +/** + * @} + */ +#endif /* STM32F10X_CL */ + + +/** @defgroup ADC_clock_source + * @{ + */ + +#define RCC_PCLK2_Div2 ((uint32_t)0x00000000) +#define RCC_PCLK2_Div4 ((uint32_t)0x00004000) +#define RCC_PCLK2_Div6 ((uint32_t)0x00008000) +#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000) +#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \ + ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8)) +/** + * @} + */ + +/** @defgroup LSE_configuration + * @{ + */ + +#define RCC_LSE_OFF ((uint8_t)0x00) +#define RCC_LSE_ON ((uint8_t)0x01) +#define RCC_LSE_Bypass ((uint8_t)0x04) +#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \ + ((LSE) == RCC_LSE_Bypass)) +/** + * @} + */ + +/** @defgroup RTC_clock_source + * @{ + */ + +#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100) +#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200) +#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300) +#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ + ((SOURCE) == RCC_RTCCLKSource_LSI) || \ + ((SOURCE) == RCC_RTCCLKSource_HSE_Div128)) +/** + * @} + */ + +/** @defgroup AHB_peripheral + * @{ + */ + +#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001) +#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002) +#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004) +#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010) +#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040) + +#ifndef STM32F10X_CL + #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100) + #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400) + #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00)) +#else + #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000) + #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000) + #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000) + #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000) + + #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00)) + #define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00)) +#endif /* STM32F10X_CL */ +/** + * @} + */ + +/** @defgroup APB2_peripheral + * @{ + */ + +#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001) +#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004) +#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008) +#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010) +#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020) +#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040) +#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080) +#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100) +#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200) +#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400) +#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800) +#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000) +#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000) +#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000) +#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000) +#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000) +#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000) +#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000) +#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000) +#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000) +#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000) + +#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00)) +/** + * @} + */ + +/** @defgroup APB1_peripheral + * @{ + */ + +#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001) +#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002) +#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004) +#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008) +#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010) +#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020) +#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040) +#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080) +#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100) +#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800) +#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000) +#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000) +#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000) +#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000) +#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000) +#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000) +#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000) +#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000) +#define RCC_APB1Periph_USB ((uint32_t)0x00800000) +#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000) +#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000) +#define RCC_APB1Periph_BKP ((uint32_t)0x08000000) +#define RCC_APB1Periph_PWR ((uint32_t)0x10000000) +#define RCC_APB1Periph_DAC ((uint32_t)0x20000000) +#define RCC_APB1Periph_CEC ((uint32_t)0x40000000) + +#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00)) + +/** + * @} + */ + +/** @defgroup Clock_source_to_output_on_MCO_pin + * @{ + */ + +#define RCC_MCO_NoClock ((uint8_t)0x00) +#define RCC_MCO_SYSCLK ((uint8_t)0x04) +#define RCC_MCO_HSI ((uint8_t)0x05) +#define RCC_MCO_HSE ((uint8_t)0x06) +#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07) + +#ifndef STM32F10X_CL + #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ + ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ + ((MCO) == RCC_MCO_PLLCLK_Div2)) +#else + #define RCC_MCO_PLL2CLK ((uint8_t)0x08) + #define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09) + #define RCC_MCO_XT1 ((uint8_t)0x0A) + #define RCC_MCO_PLL3CLK ((uint8_t)0x0B) + + #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ + ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ + ((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \ + ((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \ + ((MCO) == RCC_MCO_PLL3CLK)) +#endif /* STM32F10X_CL */ + +/** + * @} + */ + +/** @defgroup RCC_Flag + * @{ + */ + +#define RCC_FLAG_HSIRDY ((uint8_t)0x21) +#define RCC_FLAG_HSERDY ((uint8_t)0x31) +#define RCC_FLAG_PLLRDY ((uint8_t)0x39) +#define RCC_FLAG_LSERDY ((uint8_t)0x41) +#define RCC_FLAG_LSIRDY ((uint8_t)0x61) +#define RCC_FLAG_PINRST ((uint8_t)0x7A) +#define RCC_FLAG_PORRST ((uint8_t)0x7B) +#define RCC_FLAG_SFTRST ((uint8_t)0x7C) +#define RCC_FLAG_IWDGRST ((uint8_t)0x7D) +#define RCC_FLAG_WWDGRST ((uint8_t)0x7E) +#define RCC_FLAG_LPWRRST ((uint8_t)0x7F) + +#ifndef STM32F10X_CL + #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ + ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ + ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ + ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ + ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ + ((FLAG) == RCC_FLAG_LPWRRST)) +#else + #define RCC_FLAG_PLL2RDY ((uint8_t)0x3B) + #define RCC_FLAG_PLL3RDY ((uint8_t)0x3D) + #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ + ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ + ((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \ + ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ + ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ + ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ + ((FLAG) == RCC_FLAG_LPWRRST)) +#endif /* STM32F10X_CL */ + +#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup RCC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Exported_Functions + * @{ + */ + +void RCC_DeInit(void); +void RCC_HSEConfig(uint32_t RCC_HSE); +ErrorStatus RCC_WaitForHSEStartUp(void); +void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue); +void RCC_HSICmd(FunctionalState NewState); +void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul); +void RCC_PLLCmd(FunctionalState NewState); + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) + void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div); +#endif + +#ifdef STM32F10X_CL + void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div); + void RCC_PLL2Config(uint32_t RCC_PLL2Mul); + void RCC_PLL2Cmd(FunctionalState NewState); + void RCC_PLL3Config(uint32_t RCC_PLL3Mul); + void RCC_PLL3Cmd(FunctionalState NewState); +#endif /* STM32F10X_CL */ + +void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource); +uint8_t RCC_GetSYSCLKSource(void); +void RCC_HCLKConfig(uint32_t RCC_SYSCLK); +void RCC_PCLK1Config(uint32_t RCC_HCLK); +void RCC_PCLK2Config(uint32_t RCC_HCLK); +void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState); + +#ifndef STM32F10X_CL + void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource); +#else + void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource); +#endif /* STM32F10X_CL */ + +void RCC_ADCCLKConfig(uint32_t RCC_PCLK2); + +#ifdef STM32F10X_CL + void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource); + void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource); +#endif /* STM32F10X_CL */ + +void RCC_LSEConfig(uint8_t RCC_LSE); +void RCC_LSICmd(FunctionalState NewState); +void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource); +void RCC_RTCCLKCmd(FunctionalState NewState); +void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); +void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); +void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); +void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); + +#ifdef STM32F10X_CL +void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); +#endif /* STM32F10X_CL */ + +void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); +void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); +void RCC_BackupResetCmd(FunctionalState NewState); +void RCC_ClockSecuritySystemCmd(FunctionalState NewState); +void RCC_MCOConfig(uint8_t RCC_MCO); +FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG); +void RCC_ClearFlag(void); +ITStatus RCC_GetITStatus(uint8_t RCC_IT); +void RCC_ClearITPendingBit(uint8_t RCC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_RCC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h new file mode 100644 index 00000000..fd8beb5b --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h @@ -0,0 +1,135 @@ +/** + ****************************************************************************** + * @file stm32f10x_rtc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the RTC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_RTC_H +#define __STM32F10x_RTC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup RTC + * @{ + */ + +/** @defgroup RTC_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Exported_Constants + * @{ + */ + +/** @defgroup RTC_interrupts_define + * @{ + */ + +#define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ +#define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ +#define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ +#define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) +#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ + ((IT) == RTC_IT_SEC)) +/** + * @} + */ + +/** @defgroup RTC_interrupts_flags + * @{ + */ + +#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ +#define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ +#define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ +#define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ +#define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ +#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) +#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ + ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ + ((FLAG) == RTC_FLAG_SEC)) +#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup RTC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Exported_Functions + * @{ + */ + +void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); +void RTC_EnterConfigMode(void); +void RTC_ExitConfigMode(void); +uint32_t RTC_GetCounter(void); +void RTC_SetCounter(uint32_t CounterValue); +void RTC_SetPrescaler(uint32_t PrescalerValue); +void RTC_SetAlarm(uint32_t AlarmValue); +uint32_t RTC_GetDivider(void); +void RTC_WaitForLastTask(void); +void RTC_WaitForSynchro(void); +FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); +void RTC_ClearFlag(uint16_t RTC_FLAG); +ITStatus RTC_GetITStatus(uint16_t RTC_IT); +void RTC_ClearITPendingBit(uint16_t RTC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_RTC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h new file mode 100644 index 00000000..81c058ad --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h @@ -0,0 +1,531 @@ +/** + ****************************************************************************** + * @file stm32f10x_sdio.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the SDIO firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_SDIO_H +#define __STM32F10x_SDIO_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup SDIO + * @{ + */ + +/** @defgroup SDIO_Exported_Types + * @{ + */ + +typedef struct +{ + uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref SDIO_Clock_Edge */ + + uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is + enabled or disabled. + This parameter can be a value of @ref SDIO_Clock_Bypass */ + + uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or + disabled when the bus is idle. + This parameter can be a value of @ref SDIO_Clock_Power_Save */ + + uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. + This parameter can be a value of @ref SDIO_Bus_Wide */ + + uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. + This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ + + uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. + This parameter can be a value between 0x00 and 0xFF. */ + +} SDIO_InitTypeDef; + +typedef struct +{ + uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent + to a card as part of a command message. If a command + contains an argument, it must be loaded into this register + before writing the command to the command register */ + + uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ + + uint32_t SDIO_Response; /*!< Specifies the SDIO response type. + This parameter can be a value of @ref SDIO_Response_Type */ + + uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled. + This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ + + uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) + is enabled or disabled. + This parameter can be a value of @ref SDIO_CPSM_State */ +} SDIO_CmdInitTypeDef; + +typedef struct +{ + uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ + + uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ + + uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. + This parameter can be a value of @ref SDIO_Data_Block_Size */ + + uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer + is a read or write. + This parameter can be a value of @ref SDIO_Transfer_Direction */ + + uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. + This parameter can be a value of @ref SDIO_Transfer_Type */ + + uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) + is enabled or disabled. + This parameter can be a value of @ref SDIO_DPSM_State */ +} SDIO_DataInitTypeDef; + +/** + * @} + */ + +/** @defgroup SDIO_Exported_Constants + * @{ + */ + +/** @defgroup SDIO_Clock_Edge + * @{ + */ + +#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) +#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) +#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ + ((EDGE) == SDIO_ClockEdge_Falling)) +/** + * @} + */ + +/** @defgroup SDIO_Clock_Bypass + * @{ + */ + +#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) +#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) +#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ + ((BYPASS) == SDIO_ClockBypass_Enable)) +/** + * @} + */ + +/** @defgroup SDIO_Clock_Power_Save + * @{ + */ + +#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) +#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) +#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ + ((SAVE) == SDIO_ClockPowerSave_Enable)) +/** + * @} + */ + +/** @defgroup SDIO_Bus_Wide + * @{ + */ + +#define SDIO_BusWide_1b ((uint32_t)0x00000000) +#define SDIO_BusWide_4b ((uint32_t)0x00000800) +#define SDIO_BusWide_8b ((uint32_t)0x00001000) +#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ + ((WIDE) == SDIO_BusWide_8b)) + +/** + * @} + */ + +/** @defgroup SDIO_Hardware_Flow_Control + * @{ + */ + +#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) +#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) +#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ + ((CONTROL) == SDIO_HardwareFlowControl_Enable)) +/** + * @} + */ + +/** @defgroup SDIO_Power_State + * @{ + */ + +#define SDIO_PowerState_OFF ((uint32_t)0x00000000) +#define SDIO_PowerState_ON ((uint32_t)0x00000003) +#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) +/** + * @} + */ + + +/** @defgroup SDIO_Interrupt_sources + * @{ + */ + +#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) +#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) +#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) +#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) +#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) +#define SDIO_IT_RXOVERR ((uint32_t)0x00000020) +#define SDIO_IT_CMDREND ((uint32_t)0x00000040) +#define SDIO_IT_CMDSENT ((uint32_t)0x00000080) +#define SDIO_IT_DATAEND ((uint32_t)0x00000100) +#define SDIO_IT_STBITERR ((uint32_t)0x00000200) +#define SDIO_IT_DBCKEND ((uint32_t)0x00000400) +#define SDIO_IT_CMDACT ((uint32_t)0x00000800) +#define SDIO_IT_TXACT ((uint32_t)0x00001000) +#define SDIO_IT_RXACT ((uint32_t)0x00002000) +#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) +#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) +#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) +#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) +#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) +#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) +#define SDIO_IT_TXDAVL ((uint32_t)0x00100000) +#define SDIO_IT_RXDAVL ((uint32_t)0x00200000) +#define SDIO_IT_SDIOIT ((uint32_t)0x00400000) +#define SDIO_IT_CEATAEND ((uint32_t)0x00800000) +#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) +/** + * @} + */ + +/** @defgroup SDIO_Command_Index + * @{ + */ + +#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) +/** + * @} + */ + +/** @defgroup SDIO_Response_Type + * @{ + */ + +#define SDIO_Response_No ((uint32_t)0x00000000) +#define SDIO_Response_Short ((uint32_t)0x00000040) +#define SDIO_Response_Long ((uint32_t)0x000000C0) +#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ + ((RESPONSE) == SDIO_Response_Short) || \ + ((RESPONSE) == SDIO_Response_Long)) +/** + * @} + */ + +/** @defgroup SDIO_Wait_Interrupt_State + * @{ + */ + +#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ +#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ +#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ +#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ + ((WAIT) == SDIO_Wait_Pend)) +/** + * @} + */ + +/** @defgroup SDIO_CPSM_State + * @{ + */ + +#define SDIO_CPSM_Disable ((uint32_t)0x00000000) +#define SDIO_CPSM_Enable ((uint32_t)0x00000400) +#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) +/** + * @} + */ + +/** @defgroup SDIO_Response_Registers + * @{ + */ + +#define SDIO_RESP1 ((uint32_t)0x00000000) +#define SDIO_RESP2 ((uint32_t)0x00000004) +#define SDIO_RESP3 ((uint32_t)0x00000008) +#define SDIO_RESP4 ((uint32_t)0x0000000C) +#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ + ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) +/** + * @} + */ + +/** @defgroup SDIO_Data_Length + * @{ + */ + +#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) +/** + * @} + */ + +/** @defgroup SDIO_Data_Block_Size + * @{ + */ + +#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) +#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) +#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) +#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) +#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) +#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) +#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) +#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) +#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) +#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) +#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) +#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) +#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) +#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) +#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) +#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ + ((SIZE) == SDIO_DataBlockSize_2b) || \ + ((SIZE) == SDIO_DataBlockSize_4b) || \ + ((SIZE) == SDIO_DataBlockSize_8b) || \ + ((SIZE) == SDIO_DataBlockSize_16b) || \ + ((SIZE) == SDIO_DataBlockSize_32b) || \ + ((SIZE) == SDIO_DataBlockSize_64b) || \ + ((SIZE) == SDIO_DataBlockSize_128b) || \ + ((SIZE) == SDIO_DataBlockSize_256b) || \ + ((SIZE) == SDIO_DataBlockSize_512b) || \ + ((SIZE) == SDIO_DataBlockSize_1024b) || \ + ((SIZE) == SDIO_DataBlockSize_2048b) || \ + ((SIZE) == SDIO_DataBlockSize_4096b) || \ + ((SIZE) == SDIO_DataBlockSize_8192b) || \ + ((SIZE) == SDIO_DataBlockSize_16384b)) +/** + * @} + */ + +/** @defgroup SDIO_Transfer_Direction + * @{ + */ + +#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) +#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) +#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ + ((DIR) == SDIO_TransferDir_ToSDIO)) +/** + * @} + */ + +/** @defgroup SDIO_Transfer_Type + * @{ + */ + +#define SDIO_TransferMode_Block ((uint32_t)0x00000000) +#define SDIO_TransferMode_Stream ((uint32_t)0x00000004) +#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ + ((MODE) == SDIO_TransferMode_Block)) +/** + * @} + */ + +/** @defgroup SDIO_DPSM_State + * @{ + */ + +#define SDIO_DPSM_Disable ((uint32_t)0x00000000) +#define SDIO_DPSM_Enable ((uint32_t)0x00000001) +#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) +/** + * @} + */ + +/** @defgroup SDIO_Flags + * @{ + */ + +#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) +#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) +#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) +#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) +#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) +#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) +#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) +#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) +#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) +#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) +#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) +#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) +#define SDIO_FLAG_TXACT ((uint32_t)0x00001000) +#define SDIO_FLAG_RXACT ((uint32_t)0x00002000) +#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) +#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) +#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) +#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) +#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) +#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) +#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) +#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) +#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) +#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) +#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ + ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ + ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ + ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ + ((FLAG) == SDIO_FLAG_TXUNDERR) || \ + ((FLAG) == SDIO_FLAG_RXOVERR) || \ + ((FLAG) == SDIO_FLAG_CMDREND) || \ + ((FLAG) == SDIO_FLAG_CMDSENT) || \ + ((FLAG) == SDIO_FLAG_DATAEND) || \ + ((FLAG) == SDIO_FLAG_STBITERR) || \ + ((FLAG) == SDIO_FLAG_DBCKEND) || \ + ((FLAG) == SDIO_FLAG_CMDACT) || \ + ((FLAG) == SDIO_FLAG_TXACT) || \ + ((FLAG) == SDIO_FLAG_RXACT) || \ + ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ + ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ + ((FLAG) == SDIO_FLAG_TXFIFOF) || \ + ((FLAG) == SDIO_FLAG_RXFIFOF) || \ + ((FLAG) == SDIO_FLAG_TXFIFOE) || \ + ((FLAG) == SDIO_FLAG_RXFIFOE) || \ + ((FLAG) == SDIO_FLAG_TXDAVL) || \ + ((FLAG) == SDIO_FLAG_RXDAVL) || \ + ((FLAG) == SDIO_FLAG_SDIOIT) || \ + ((FLAG) == SDIO_FLAG_CEATAEND)) + +#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) + +#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ + ((IT) == SDIO_IT_DCRCFAIL) || \ + ((IT) == SDIO_IT_CTIMEOUT) || \ + ((IT) == SDIO_IT_DTIMEOUT) || \ + ((IT) == SDIO_IT_TXUNDERR) || \ + ((IT) == SDIO_IT_RXOVERR) || \ + ((IT) == SDIO_IT_CMDREND) || \ + ((IT) == SDIO_IT_CMDSENT) || \ + ((IT) == SDIO_IT_DATAEND) || \ + ((IT) == SDIO_IT_STBITERR) || \ + ((IT) == SDIO_IT_DBCKEND) || \ + ((IT) == SDIO_IT_CMDACT) || \ + ((IT) == SDIO_IT_TXACT) || \ + ((IT) == SDIO_IT_RXACT) || \ + ((IT) == SDIO_IT_TXFIFOHE) || \ + ((IT) == SDIO_IT_RXFIFOHF) || \ + ((IT) == SDIO_IT_TXFIFOF) || \ + ((IT) == SDIO_IT_RXFIFOF) || \ + ((IT) == SDIO_IT_TXFIFOE) || \ + ((IT) == SDIO_IT_RXFIFOE) || \ + ((IT) == SDIO_IT_TXDAVL) || \ + ((IT) == SDIO_IT_RXDAVL) || \ + ((IT) == SDIO_IT_SDIOIT) || \ + ((IT) == SDIO_IT_CEATAEND)) + +#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) + +/** + * @} + */ + +/** @defgroup SDIO_Read_Wait_Mode + * @{ + */ + +#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) +#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) +#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ + ((MODE) == SDIO_ReadWaitMode_DATA2)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup SDIO_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Exported_Functions + * @{ + */ + +void SDIO_DeInit(void); +void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); +void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); +void SDIO_ClockCmd(FunctionalState NewState); +void SDIO_SetPowerState(uint32_t SDIO_PowerState); +uint32_t SDIO_GetPowerState(void); +void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); +void SDIO_DMACmd(FunctionalState NewState); +void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); +void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); +uint8_t SDIO_GetCommandResponse(void); +uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); +void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); +void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); +uint32_t SDIO_GetDataCounter(void); +uint32_t SDIO_ReadData(void); +void SDIO_WriteData(uint32_t Data); +uint32_t SDIO_GetFIFOCount(void); +void SDIO_StartSDIOReadWait(FunctionalState NewState); +void SDIO_StopSDIOReadWait(FunctionalState NewState); +void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); +void SDIO_SetSDIOOperation(FunctionalState NewState); +void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); +void SDIO_CommandCompletionCmd(FunctionalState NewState); +void SDIO_CEATAITCmd(FunctionalState NewState); +void SDIO_SendCEATACmd(FunctionalState NewState); +FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); +void SDIO_ClearFlag(uint32_t SDIO_FLAG); +ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); +void SDIO_ClearITPendingBit(uint32_t SDIO_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_SDIO_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h new file mode 100644 index 00000000..23cc26d2 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h @@ -0,0 +1,487 @@ +/** + ****************************************************************************** + * @file stm32f10x_spi.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the SPI firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_SPI_H +#define __STM32F10x_SPI_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup SPI + * @{ + */ + +/** @defgroup SPI_Exported_Types + * @{ + */ + +/** + * @brief SPI Init structure definition + */ + +typedef struct +{ + uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode. + This parameter can be a value of @ref SPI_data_direction */ + + uint16_t SPI_Mode; /*!< Specifies the SPI operating mode. + This parameter can be a value of @ref SPI_mode */ + + uint16_t SPI_DataSize; /*!< Specifies the SPI data size. + This parameter can be a value of @ref SPI_data_size */ + + uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state. + This parameter can be a value of @ref SPI_Clock_Polarity */ + + uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture. + This parameter can be a value of @ref SPI_Clock_Phase */ + + uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by + hardware (NSS pin) or by software using the SSI bit. + This parameter can be a value of @ref SPI_Slave_Select_management */ + + uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be + used to configure the transmit and receive SCK clock. + This parameter can be a value of @ref SPI_BaudRate_Prescaler. + @note The communication clock is derived from the master + clock. The slave clock does not need to be set. */ + + uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. + This parameter can be a value of @ref SPI_MSB_LSB_transmission */ + + uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */ +}SPI_InitTypeDef; + +/** + * @brief I2S Init structure definition + */ + +typedef struct +{ + + uint16_t I2S_Mode; /*!< Specifies the I2S operating mode. + This parameter can be a value of @ref I2S_Mode */ + + uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication. + This parameter can be a value of @ref I2S_Standard */ + + uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication. + This parameter can be a value of @ref I2S_Data_Format */ + + uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. + This parameter can be a value of @ref I2S_MCLK_Output */ + + uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication. + This parameter can be a value of @ref I2S_Audio_Frequency */ + + uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock. + This parameter can be a value of @ref I2S_Clock_Polarity */ +}I2S_InitTypeDef; + +/** + * @} + */ + +/** @defgroup SPI_Exported_Constants + * @{ + */ + +#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \ + ((PERIPH) == SPI2) || \ + ((PERIPH) == SPI3)) + +#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \ + ((PERIPH) == SPI3)) + +/** @defgroup SPI_data_direction + * @{ + */ + +#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) +#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) +#define SPI_Direction_1Line_Rx ((uint16_t)0x8000) +#define SPI_Direction_1Line_Tx ((uint16_t)0xC000) +#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \ + ((MODE) == SPI_Direction_2Lines_RxOnly) || \ + ((MODE) == SPI_Direction_1Line_Rx) || \ + ((MODE) == SPI_Direction_1Line_Tx)) +/** + * @} + */ + +/** @defgroup SPI_mode + * @{ + */ + +#define SPI_Mode_Master ((uint16_t)0x0104) +#define SPI_Mode_Slave ((uint16_t)0x0000) +#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \ + ((MODE) == SPI_Mode_Slave)) +/** + * @} + */ + +/** @defgroup SPI_data_size + * @{ + */ + +#define SPI_DataSize_16b ((uint16_t)0x0800) +#define SPI_DataSize_8b ((uint16_t)0x0000) +#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \ + ((DATASIZE) == SPI_DataSize_8b)) +/** + * @} + */ + +/** @defgroup SPI_Clock_Polarity + * @{ + */ + +#define SPI_CPOL_Low ((uint16_t)0x0000) +#define SPI_CPOL_High ((uint16_t)0x0002) +#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \ + ((CPOL) == SPI_CPOL_High)) +/** + * @} + */ + +/** @defgroup SPI_Clock_Phase + * @{ + */ + +#define SPI_CPHA_1Edge ((uint16_t)0x0000) +#define SPI_CPHA_2Edge ((uint16_t)0x0001) +#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \ + ((CPHA) == SPI_CPHA_2Edge)) +/** + * @} + */ + +/** @defgroup SPI_Slave_Select_management + * @{ + */ + +#define SPI_NSS_Soft ((uint16_t)0x0200) +#define SPI_NSS_Hard ((uint16_t)0x0000) +#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \ + ((NSS) == SPI_NSS_Hard)) +/** + * @} + */ + +/** @defgroup SPI_BaudRate_Prescaler + * @{ + */ + +#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) +#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) +#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) +#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) +#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) +#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) +#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) +#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) +#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_4) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_8) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_16) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_32) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_64) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_128) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_256)) +/** + * @} + */ + +/** @defgroup SPI_MSB_LSB_transmission + * @{ + */ + +#define SPI_FirstBit_MSB ((uint16_t)0x0000) +#define SPI_FirstBit_LSB ((uint16_t)0x0080) +#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \ + ((BIT) == SPI_FirstBit_LSB)) +/** + * @} + */ + +/** @defgroup I2S_Mode + * @{ + */ + +#define I2S_Mode_SlaveTx ((uint16_t)0x0000) +#define I2S_Mode_SlaveRx ((uint16_t)0x0100) +#define I2S_Mode_MasterTx ((uint16_t)0x0200) +#define I2S_Mode_MasterRx ((uint16_t)0x0300) +#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \ + ((MODE) == I2S_Mode_SlaveRx) || \ + ((MODE) == I2S_Mode_MasterTx) || \ + ((MODE) == I2S_Mode_MasterRx) ) +/** + * @} + */ + +/** @defgroup I2S_Standard + * @{ + */ + +#define I2S_Standard_Phillips ((uint16_t)0x0000) +#define I2S_Standard_MSB ((uint16_t)0x0010) +#define I2S_Standard_LSB ((uint16_t)0x0020) +#define I2S_Standard_PCMShort ((uint16_t)0x0030) +#define I2S_Standard_PCMLong ((uint16_t)0x00B0) +#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \ + ((STANDARD) == I2S_Standard_MSB) || \ + ((STANDARD) == I2S_Standard_LSB) || \ + ((STANDARD) == I2S_Standard_PCMShort) || \ + ((STANDARD) == I2S_Standard_PCMLong)) +/** + * @} + */ + +/** @defgroup I2S_Data_Format + * @{ + */ + +#define I2S_DataFormat_16b ((uint16_t)0x0000) +#define I2S_DataFormat_16bextended ((uint16_t)0x0001) +#define I2S_DataFormat_24b ((uint16_t)0x0003) +#define I2S_DataFormat_32b ((uint16_t)0x0005) +#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \ + ((FORMAT) == I2S_DataFormat_16bextended) || \ + ((FORMAT) == I2S_DataFormat_24b) || \ + ((FORMAT) == I2S_DataFormat_32b)) +/** + * @} + */ + +/** @defgroup I2S_MCLK_Output + * @{ + */ + +#define I2S_MCLKOutput_Enable ((uint16_t)0x0200) +#define I2S_MCLKOutput_Disable ((uint16_t)0x0000) +#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \ + ((OUTPUT) == I2S_MCLKOutput_Disable)) +/** + * @} + */ + +/** @defgroup I2S_Audio_Frequency + * @{ + */ + +#define I2S_AudioFreq_192k ((uint32_t)192000) +#define I2S_AudioFreq_96k ((uint32_t)96000) +#define I2S_AudioFreq_48k ((uint32_t)48000) +#define I2S_AudioFreq_44k ((uint32_t)44100) +#define I2S_AudioFreq_32k ((uint32_t)32000) +#define I2S_AudioFreq_22k ((uint32_t)22050) +#define I2S_AudioFreq_16k ((uint32_t)16000) +#define I2S_AudioFreq_11k ((uint32_t)11025) +#define I2S_AudioFreq_8k ((uint32_t)8000) +#define I2S_AudioFreq_Default ((uint32_t)2) + +#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \ + ((FREQ) <= I2S_AudioFreq_192k)) || \ + ((FREQ) == I2S_AudioFreq_Default)) +/** + * @} + */ + +/** @defgroup I2S_Clock_Polarity + * @{ + */ + +#define I2S_CPOL_Low ((uint16_t)0x0000) +#define I2S_CPOL_High ((uint16_t)0x0008) +#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \ + ((CPOL) == I2S_CPOL_High)) +/** + * @} + */ + +/** @defgroup SPI_I2S_DMA_transfer_requests + * @{ + */ + +#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) +#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) +#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) +/** + * @} + */ + +/** @defgroup SPI_NSS_internal_software_management + * @{ + */ + +#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) +#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) +#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \ + ((INTERNAL) == SPI_NSSInternalSoft_Reset)) +/** + * @} + */ + +/** @defgroup SPI_CRC_Transmit_Receive + * @{ + */ + +#define SPI_CRC_Tx ((uint8_t)0x00) +#define SPI_CRC_Rx ((uint8_t)0x01) +#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx)) +/** + * @} + */ + +/** @defgroup SPI_direction_transmit_receive + * @{ + */ + +#define SPI_Direction_Rx ((uint16_t)0xBFFF) +#define SPI_Direction_Tx ((uint16_t)0x4000) +#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \ + ((DIRECTION) == SPI_Direction_Tx)) +/** + * @} + */ + +/** @defgroup SPI_I2S_interrupts_definition + * @{ + */ + +#define SPI_I2S_IT_TXE ((uint8_t)0x71) +#define SPI_I2S_IT_RXNE ((uint8_t)0x60) +#define SPI_I2S_IT_ERR ((uint8_t)0x50) +#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \ + ((IT) == SPI_I2S_IT_RXNE) || \ + ((IT) == SPI_I2S_IT_ERR)) +#define SPI_I2S_IT_OVR ((uint8_t)0x56) +#define SPI_IT_MODF ((uint8_t)0x55) +#define SPI_IT_CRCERR ((uint8_t)0x54) +#define I2S_IT_UDR ((uint8_t)0x53) +#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR)) +#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \ + ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \ + ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR)) +/** + * @} + */ + +/** @defgroup SPI_I2S_flags_definition + * @{ + */ + +#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) +#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) +#define I2S_FLAG_CHSIDE ((uint16_t)0x0004) +#define I2S_FLAG_UDR ((uint16_t)0x0008) +#define SPI_FLAG_CRCERR ((uint16_t)0x0010) +#define SPI_FLAG_MODF ((uint16_t)0x0020) +#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) +#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) +#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR)) +#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \ + ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ + ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ + ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)) +/** + * @} + */ + +/** @defgroup SPI_CRC_polynomial + * @{ + */ + +#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup SPI_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Exported_Functions + * @{ + */ + +void SPI_I2S_DeInit(SPI_TypeDef* SPIx); +void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); +void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct); +void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); +void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct); +void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState); +void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState); +void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data); +uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); +void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft); +void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize); +void SPI_TransmitCRC(SPI_TypeDef* SPIx); +void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); +uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); +uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); +void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction); +FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); +void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); +ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); +void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_SPI_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h new file mode 100644 index 00000000..65bf76aa --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h @@ -0,0 +1,1164 @@ +/** + ****************************************************************************** + * @file stm32f10x_tim.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the TIM firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_TIM_H +#define __STM32F10x_TIM_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup TIM + * @{ + */ + +/** @defgroup TIM_Exported_Types + * @{ + */ + +/** + * @brief TIM Time Base Init structure definition + * @note This structure is used with all TIMx except for TIM6 and TIM7. + */ + +typedef struct +{ + uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. + This parameter can be a number between 0x0000 and 0xFFFF */ + + uint16_t TIM_CounterMode; /*!< Specifies the counter mode. + This parameter can be a value of @ref TIM_Counter_Mode */ + + uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active + Auto-Reload Register at the next update event. + This parameter must be a number between 0x0000 and 0xFFFF. */ + + uint16_t TIM_ClockDivision; /*!< Specifies the clock division. + This parameter can be a value of @ref TIM_Clock_Division_CKD */ + + uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter + reaches zero, an update event is generated and counting restarts + from the RCR value (N). + This means in PWM mode that (N+1) corresponds to: + - the number of PWM periods in edge-aligned mode + - the number of half PWM period in center-aligned mode + This parameter must be a number between 0x00 and 0xFF. + @note This parameter is valid only for TIM1 and TIM8. */ +} TIM_TimeBaseInitTypeDef; + +/** + * @brief TIM Output Compare Init structure definition + */ + +typedef struct +{ + uint16_t TIM_OCMode; /*!< Specifies the TIM mode. + This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ + + uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. + This parameter can be a value of @ref TIM_Output_Compare_state */ + + uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. + This parameter can be a value of @ref TIM_Output_Compare_N_state + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. + This parameter can be a number between 0x0000 and 0xFFFF */ + + uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. + This parameter can be a value of @ref TIM_Output_Compare_Polarity */ + + uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. + This parameter can be a value of @ref TIM_Output_Compare_N_Polarity + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_Output_Compare_Idle_State + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State + @note This parameter is valid only for TIM1 and TIM8. */ +} TIM_OCInitTypeDef; + +/** + * @brief TIM Input Capture Init structure definition + */ + +typedef struct +{ + + uint16_t TIM_Channel; /*!< Specifies the TIM channel. + This parameter can be a value of @ref TIM_Channel */ + + uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. + This parameter can be a value of @ref TIM_Input_Capture_Polarity */ + + uint16_t TIM_ICSelection; /*!< Specifies the input. + This parameter can be a value of @ref TIM_Input_Capture_Selection */ + + uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. + This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ + + uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. + This parameter can be a number between 0x0 and 0xF */ +} TIM_ICInitTypeDef; + +/** + * @brief BDTR structure definition + * @note This structure is used only with TIM1 and TIM8. + */ + +typedef struct +{ + + uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. + This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */ + + uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. + This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */ + + uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. + This parameter can be a value of @ref Lock_level */ + + uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the + switching-on of the outputs. + This parameter can be a number between 0x00 and 0xFF */ + + uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. + This parameter can be a value of @ref Break_Input_enable_disable */ + + uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. + This parameter can be a value of @ref Break_Polarity */ + + uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. + This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ +} TIM_BDTRInitTypeDef; + +/** @defgroup TIM_Exported_constants + * @{ + */ + +#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM6) || \ + ((PERIPH) == TIM7) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM10)|| \ + ((PERIPH) == TIM11)|| \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM13)|| \ + ((PERIPH) == TIM14)|| \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST1: TIM 1 and 8 */ +#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM8)) + +/* LIST2: TIM 1, 8, 15 16 and 17 */ +#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST3: TIM 1, 2, 3, 4, 5 and 8 */ +#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8)) + +/* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */ +#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */ +#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)) + +/* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */ +#define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM15)) + +/* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */ +#define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM6) || \ + ((PERIPH) == TIM7) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM15)) + +/* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */ +#define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM10)|| \ + ((PERIPH) == TIM11)|| \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM13)|| \ + ((PERIPH) == TIM14)|| \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */ +#define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM6) || \ + ((PERIPH) == TIM7) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_and_PWM_modes + * @{ + */ + +#define TIM_OCMode_Timing ((uint16_t)0x0000) +#define TIM_OCMode_Active ((uint16_t)0x0010) +#define TIM_OCMode_Inactive ((uint16_t)0x0020) +#define TIM_OCMode_Toggle ((uint16_t)0x0030) +#define TIM_OCMode_PWM1 ((uint16_t)0x0060) +#define TIM_OCMode_PWM2 ((uint16_t)0x0070) +#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ + ((MODE) == TIM_OCMode_Active) || \ + ((MODE) == TIM_OCMode_Inactive) || \ + ((MODE) == TIM_OCMode_Toggle)|| \ + ((MODE) == TIM_OCMode_PWM1) || \ + ((MODE) == TIM_OCMode_PWM2)) +#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ + ((MODE) == TIM_OCMode_Active) || \ + ((MODE) == TIM_OCMode_Inactive) || \ + ((MODE) == TIM_OCMode_Toggle)|| \ + ((MODE) == TIM_OCMode_PWM1) || \ + ((MODE) == TIM_OCMode_PWM2) || \ + ((MODE) == TIM_ForcedAction_Active) || \ + ((MODE) == TIM_ForcedAction_InActive)) +/** + * @} + */ + +/** @defgroup TIM_One_Pulse_Mode + * @{ + */ + +#define TIM_OPMode_Single ((uint16_t)0x0008) +#define TIM_OPMode_Repetitive ((uint16_t)0x0000) +#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ + ((MODE) == TIM_OPMode_Repetitive)) +/** + * @} + */ + +/** @defgroup TIM_Channel + * @{ + */ + +#define TIM_Channel_1 ((uint16_t)0x0000) +#define TIM_Channel_2 ((uint16_t)0x0004) +#define TIM_Channel_3 ((uint16_t)0x0008) +#define TIM_Channel_4 ((uint16_t)0x000C) +#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ + ((CHANNEL) == TIM_Channel_2) || \ + ((CHANNEL) == TIM_Channel_3) || \ + ((CHANNEL) == TIM_Channel_4)) +#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ + ((CHANNEL) == TIM_Channel_2)) +#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ + ((CHANNEL) == TIM_Channel_2) || \ + ((CHANNEL) == TIM_Channel_3)) +/** + * @} + */ + +/** @defgroup TIM_Clock_Division_CKD + * @{ + */ + +#define TIM_CKD_DIV1 ((uint16_t)0x0000) +#define TIM_CKD_DIV2 ((uint16_t)0x0100) +#define TIM_CKD_DIV4 ((uint16_t)0x0200) +#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ + ((DIV) == TIM_CKD_DIV2) || \ + ((DIV) == TIM_CKD_DIV4)) +/** + * @} + */ + +/** @defgroup TIM_Counter_Mode + * @{ + */ + +#define TIM_CounterMode_Up ((uint16_t)0x0000) +#define TIM_CounterMode_Down ((uint16_t)0x0010) +#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) +#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) +#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) +#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ + ((MODE) == TIM_CounterMode_Down) || \ + ((MODE) == TIM_CounterMode_CenterAligned1) || \ + ((MODE) == TIM_CounterMode_CenterAligned2) || \ + ((MODE) == TIM_CounterMode_CenterAligned3)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Polarity + * @{ + */ + +#define TIM_OCPolarity_High ((uint16_t)0x0000) +#define TIM_OCPolarity_Low ((uint16_t)0x0002) +#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ + ((POLARITY) == TIM_OCPolarity_Low)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_N_Polarity + * @{ + */ + +#define TIM_OCNPolarity_High ((uint16_t)0x0000) +#define TIM_OCNPolarity_Low ((uint16_t)0x0008) +#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ + ((POLARITY) == TIM_OCNPolarity_Low)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_state + * @{ + */ + +#define TIM_OutputState_Disable ((uint16_t)0x0000) +#define TIM_OutputState_Enable ((uint16_t)0x0001) +#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ + ((STATE) == TIM_OutputState_Enable)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_N_state + * @{ + */ + +#define TIM_OutputNState_Disable ((uint16_t)0x0000) +#define TIM_OutputNState_Enable ((uint16_t)0x0004) +#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ + ((STATE) == TIM_OutputNState_Enable)) +/** + * @} + */ + +/** @defgroup TIM_Capture_Compare_state + * @{ + */ + +#define TIM_CCx_Enable ((uint16_t)0x0001) +#define TIM_CCx_Disable ((uint16_t)0x0000) +#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ + ((CCX) == TIM_CCx_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Capture_Compare_N_state + * @{ + */ + +#define TIM_CCxN_Enable ((uint16_t)0x0004) +#define TIM_CCxN_Disable ((uint16_t)0x0000) +#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ + ((CCXN) == TIM_CCxN_Disable)) +/** + * @} + */ + +/** @defgroup Break_Input_enable_disable + * @{ + */ + +#define TIM_Break_Enable ((uint16_t)0x1000) +#define TIM_Break_Disable ((uint16_t)0x0000) +#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ + ((STATE) == TIM_Break_Disable)) +/** + * @} + */ + +/** @defgroup Break_Polarity + * @{ + */ + +#define TIM_BreakPolarity_Low ((uint16_t)0x0000) +#define TIM_BreakPolarity_High ((uint16_t)0x2000) +#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ + ((POLARITY) == TIM_BreakPolarity_High)) +/** + * @} + */ + +/** @defgroup TIM_AOE_Bit_Set_Reset + * @{ + */ + +#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) +#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) +#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ + ((STATE) == TIM_AutomaticOutput_Disable)) +/** + * @} + */ + +/** @defgroup Lock_level + * @{ + */ + +#define TIM_LOCKLevel_OFF ((uint16_t)0x0000) +#define TIM_LOCKLevel_1 ((uint16_t)0x0100) +#define TIM_LOCKLevel_2 ((uint16_t)0x0200) +#define TIM_LOCKLevel_3 ((uint16_t)0x0300) +#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ + ((LEVEL) == TIM_LOCKLevel_1) || \ + ((LEVEL) == TIM_LOCKLevel_2) || \ + ((LEVEL) == TIM_LOCKLevel_3)) +/** + * @} + */ + +/** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state + * @{ + */ + +#define TIM_OSSIState_Enable ((uint16_t)0x0400) +#define TIM_OSSIState_Disable ((uint16_t)0x0000) +#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ + ((STATE) == TIM_OSSIState_Disable)) +/** + * @} + */ + +/** @defgroup OSSR_Off_State_Selection_for_Run_mode_state + * @{ + */ + +#define TIM_OSSRState_Enable ((uint16_t)0x0800) +#define TIM_OSSRState_Disable ((uint16_t)0x0000) +#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ + ((STATE) == TIM_OSSRState_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Idle_State + * @{ + */ + +#define TIM_OCIdleState_Set ((uint16_t)0x0100) +#define TIM_OCIdleState_Reset ((uint16_t)0x0000) +#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ + ((STATE) == TIM_OCIdleState_Reset)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_N_Idle_State + * @{ + */ + +#define TIM_OCNIdleState_Set ((uint16_t)0x0200) +#define TIM_OCNIdleState_Reset ((uint16_t)0x0000) +#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ + ((STATE) == TIM_OCNIdleState_Reset)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Polarity + * @{ + */ + +#define TIM_ICPolarity_Rising ((uint16_t)0x0000) +#define TIM_ICPolarity_Falling ((uint16_t)0x0002) +#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) +#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ + ((POLARITY) == TIM_ICPolarity_Falling)) +#define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ + ((POLARITY) == TIM_ICPolarity_Falling)|| \ + ((POLARITY) == TIM_ICPolarity_BothEdge)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Selection + * @{ + */ + +#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be + connected to IC1, IC2, IC3 or IC4, respectively */ +#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be + connected to IC2, IC1, IC4 or IC3, respectively. */ +#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ +#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ + ((SELECTION) == TIM_ICSelection_IndirectTI) || \ + ((SELECTION) == TIM_ICSelection_TRC)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Prescaler + * @{ + */ + +#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ +#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ +#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ +#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ +#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ + ((PRESCALER) == TIM_ICPSC_DIV2) || \ + ((PRESCALER) == TIM_ICPSC_DIV4) || \ + ((PRESCALER) == TIM_ICPSC_DIV8)) +/** + * @} + */ + +/** @defgroup TIM_interrupt_sources + * @{ + */ + +#define TIM_IT_Update ((uint16_t)0x0001) +#define TIM_IT_CC1 ((uint16_t)0x0002) +#define TIM_IT_CC2 ((uint16_t)0x0004) +#define TIM_IT_CC3 ((uint16_t)0x0008) +#define TIM_IT_CC4 ((uint16_t)0x0010) +#define TIM_IT_COM ((uint16_t)0x0020) +#define TIM_IT_Trigger ((uint16_t)0x0040) +#define TIM_IT_Break ((uint16_t)0x0080) +#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) + +#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ + ((IT) == TIM_IT_CC1) || \ + ((IT) == TIM_IT_CC2) || \ + ((IT) == TIM_IT_CC3) || \ + ((IT) == TIM_IT_CC4) || \ + ((IT) == TIM_IT_COM) || \ + ((IT) == TIM_IT_Trigger) || \ + ((IT) == TIM_IT_Break)) +/** + * @} + */ + +/** @defgroup TIM_DMA_Base_address + * @{ + */ + +#define TIM_DMABase_CR1 ((uint16_t)0x0000) +#define TIM_DMABase_CR2 ((uint16_t)0x0001) +#define TIM_DMABase_SMCR ((uint16_t)0x0002) +#define TIM_DMABase_DIER ((uint16_t)0x0003) +#define TIM_DMABase_SR ((uint16_t)0x0004) +#define TIM_DMABase_EGR ((uint16_t)0x0005) +#define TIM_DMABase_CCMR1 ((uint16_t)0x0006) +#define TIM_DMABase_CCMR2 ((uint16_t)0x0007) +#define TIM_DMABase_CCER ((uint16_t)0x0008) +#define TIM_DMABase_CNT ((uint16_t)0x0009) +#define TIM_DMABase_PSC ((uint16_t)0x000A) +#define TIM_DMABase_ARR ((uint16_t)0x000B) +#define TIM_DMABase_RCR ((uint16_t)0x000C) +#define TIM_DMABase_CCR1 ((uint16_t)0x000D) +#define TIM_DMABase_CCR2 ((uint16_t)0x000E) +#define TIM_DMABase_CCR3 ((uint16_t)0x000F) +#define TIM_DMABase_CCR4 ((uint16_t)0x0010) +#define TIM_DMABase_BDTR ((uint16_t)0x0011) +#define TIM_DMABase_DCR ((uint16_t)0x0012) +#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ + ((BASE) == TIM_DMABase_CR2) || \ + ((BASE) == TIM_DMABase_SMCR) || \ + ((BASE) == TIM_DMABase_DIER) || \ + ((BASE) == TIM_DMABase_SR) || \ + ((BASE) == TIM_DMABase_EGR) || \ + ((BASE) == TIM_DMABase_CCMR1) || \ + ((BASE) == TIM_DMABase_CCMR2) || \ + ((BASE) == TIM_DMABase_CCER) || \ + ((BASE) == TIM_DMABase_CNT) || \ + ((BASE) == TIM_DMABase_PSC) || \ + ((BASE) == TIM_DMABase_ARR) || \ + ((BASE) == TIM_DMABase_RCR) || \ + ((BASE) == TIM_DMABase_CCR1) || \ + ((BASE) == TIM_DMABase_CCR2) || \ + ((BASE) == TIM_DMABase_CCR3) || \ + ((BASE) == TIM_DMABase_CCR4) || \ + ((BASE) == TIM_DMABase_BDTR) || \ + ((BASE) == TIM_DMABase_DCR)) +/** + * @} + */ + +/** @defgroup TIM_DMA_Burst_Length + * @{ + */ + +#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) +#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) +#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) +#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) +#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) +#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) +#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) +#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) +#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) +#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) +#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) +#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) +#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) +#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) +#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) +#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) +#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) +#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) +#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \ + ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_7Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_8Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_11Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_12Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_13Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_15Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_16Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_17Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_18Transfers)) +/** + * @} + */ + +/** @defgroup TIM_DMA_sources + * @{ + */ + +#define TIM_DMA_Update ((uint16_t)0x0100) +#define TIM_DMA_CC1 ((uint16_t)0x0200) +#define TIM_DMA_CC2 ((uint16_t)0x0400) +#define TIM_DMA_CC3 ((uint16_t)0x0800) +#define TIM_DMA_CC4 ((uint16_t)0x1000) +#define TIM_DMA_COM ((uint16_t)0x2000) +#define TIM_DMA_Trigger ((uint16_t)0x4000) +#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) + +/** + * @} + */ + +/** @defgroup TIM_External_Trigger_Prescaler + * @{ + */ + +#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) +#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) +#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) +#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) +#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ + ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ + ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ + ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) +/** + * @} + */ + +/** @defgroup TIM_Internal_Trigger_Selection + * @{ + */ + +#define TIM_TS_ITR0 ((uint16_t)0x0000) +#define TIM_TS_ITR1 ((uint16_t)0x0010) +#define TIM_TS_ITR2 ((uint16_t)0x0020) +#define TIM_TS_ITR3 ((uint16_t)0x0030) +#define TIM_TS_TI1F_ED ((uint16_t)0x0040) +#define TIM_TS_TI1FP1 ((uint16_t)0x0050) +#define TIM_TS_TI2FP2 ((uint16_t)0x0060) +#define TIM_TS_ETRF ((uint16_t)0x0070) +#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ + ((SELECTION) == TIM_TS_ITR1) || \ + ((SELECTION) == TIM_TS_ITR2) || \ + ((SELECTION) == TIM_TS_ITR3) || \ + ((SELECTION) == TIM_TS_TI1F_ED) || \ + ((SELECTION) == TIM_TS_TI1FP1) || \ + ((SELECTION) == TIM_TS_TI2FP2) || \ + ((SELECTION) == TIM_TS_ETRF)) +#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ + ((SELECTION) == TIM_TS_ITR1) || \ + ((SELECTION) == TIM_TS_ITR2) || \ + ((SELECTION) == TIM_TS_ITR3)) +/** + * @} + */ + +/** @defgroup TIM_TIx_External_Clock_Source + * @{ + */ + +#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) +#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) +#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) +#define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ + ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \ + ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED)) +/** + * @} + */ + +/** @defgroup TIM_External_Trigger_Polarity + * @{ + */ +#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) +#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) +#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ + ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) +/** + * @} + */ + +/** @defgroup TIM_Prescaler_Reload_Mode + * @{ + */ + +#define TIM_PSCReloadMode_Update ((uint16_t)0x0000) +#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) +#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ + ((RELOAD) == TIM_PSCReloadMode_Immediate)) +/** + * @} + */ + +/** @defgroup TIM_Forced_Action + * @{ + */ + +#define TIM_ForcedAction_Active ((uint16_t)0x0050) +#define TIM_ForcedAction_InActive ((uint16_t)0x0040) +#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ + ((ACTION) == TIM_ForcedAction_InActive)) +/** + * @} + */ + +/** @defgroup TIM_Encoder_Mode + * @{ + */ + +#define TIM_EncoderMode_TI1 ((uint16_t)0x0001) +#define TIM_EncoderMode_TI2 ((uint16_t)0x0002) +#define TIM_EncoderMode_TI12 ((uint16_t)0x0003) +#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ + ((MODE) == TIM_EncoderMode_TI2) || \ + ((MODE) == TIM_EncoderMode_TI12)) +/** + * @} + */ + + +/** @defgroup TIM_Event_Source + * @{ + */ + +#define TIM_EventSource_Update ((uint16_t)0x0001) +#define TIM_EventSource_CC1 ((uint16_t)0x0002) +#define TIM_EventSource_CC2 ((uint16_t)0x0004) +#define TIM_EventSource_CC3 ((uint16_t)0x0008) +#define TIM_EventSource_CC4 ((uint16_t)0x0010) +#define TIM_EventSource_COM ((uint16_t)0x0020) +#define TIM_EventSource_Trigger ((uint16_t)0x0040) +#define TIM_EventSource_Break ((uint16_t)0x0080) +#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) + +/** + * @} + */ + +/** @defgroup TIM_Update_Source + * @{ + */ + +#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow + or the setting of UG bit, or an update generation + through the slave mode controller. */ +#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ +#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ + ((SOURCE) == TIM_UpdateSource_Regular)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Preload_State + * @{ + */ + +#define TIM_OCPreload_Enable ((uint16_t)0x0008) +#define TIM_OCPreload_Disable ((uint16_t)0x0000) +#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ + ((STATE) == TIM_OCPreload_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Fast_State + * @{ + */ + +#define TIM_OCFast_Enable ((uint16_t)0x0004) +#define TIM_OCFast_Disable ((uint16_t)0x0000) +#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ + ((STATE) == TIM_OCFast_Disable)) + +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Clear_State + * @{ + */ + +#define TIM_OCClear_Enable ((uint16_t)0x0080) +#define TIM_OCClear_Disable ((uint16_t)0x0000) +#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ + ((STATE) == TIM_OCClear_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Trigger_Output_Source + * @{ + */ + +#define TIM_TRGOSource_Reset ((uint16_t)0x0000) +#define TIM_TRGOSource_Enable ((uint16_t)0x0010) +#define TIM_TRGOSource_Update ((uint16_t)0x0020) +#define TIM_TRGOSource_OC1 ((uint16_t)0x0030) +#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) +#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) +#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) +#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) +#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ + ((SOURCE) == TIM_TRGOSource_Enable) || \ + ((SOURCE) == TIM_TRGOSource_Update) || \ + ((SOURCE) == TIM_TRGOSource_OC1) || \ + ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ + ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ + ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ + ((SOURCE) == TIM_TRGOSource_OC4Ref)) +/** + * @} + */ + +/** @defgroup TIM_Slave_Mode + * @{ + */ + +#define TIM_SlaveMode_Reset ((uint16_t)0x0004) +#define TIM_SlaveMode_Gated ((uint16_t)0x0005) +#define TIM_SlaveMode_Trigger ((uint16_t)0x0006) +#define TIM_SlaveMode_External1 ((uint16_t)0x0007) +#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ + ((MODE) == TIM_SlaveMode_Gated) || \ + ((MODE) == TIM_SlaveMode_Trigger) || \ + ((MODE) == TIM_SlaveMode_External1)) +/** + * @} + */ + +/** @defgroup TIM_Master_Slave_Mode + * @{ + */ + +#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) +#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) +#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ + ((STATE) == TIM_MasterSlaveMode_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Flags + * @{ + */ + +#define TIM_FLAG_Update ((uint16_t)0x0001) +#define TIM_FLAG_CC1 ((uint16_t)0x0002) +#define TIM_FLAG_CC2 ((uint16_t)0x0004) +#define TIM_FLAG_CC3 ((uint16_t)0x0008) +#define TIM_FLAG_CC4 ((uint16_t)0x0010) +#define TIM_FLAG_COM ((uint16_t)0x0020) +#define TIM_FLAG_Trigger ((uint16_t)0x0040) +#define TIM_FLAG_Break ((uint16_t)0x0080) +#define TIM_FLAG_CC1OF ((uint16_t)0x0200) +#define TIM_FLAG_CC2OF ((uint16_t)0x0400) +#define TIM_FLAG_CC3OF ((uint16_t)0x0800) +#define TIM_FLAG_CC4OF ((uint16_t)0x1000) +#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ + ((FLAG) == TIM_FLAG_CC1) || \ + ((FLAG) == TIM_FLAG_CC2) || \ + ((FLAG) == TIM_FLAG_CC3) || \ + ((FLAG) == TIM_FLAG_CC4) || \ + ((FLAG) == TIM_FLAG_COM) || \ + ((FLAG) == TIM_FLAG_Trigger) || \ + ((FLAG) == TIM_FLAG_Break) || \ + ((FLAG) == TIM_FLAG_CC1OF) || \ + ((FLAG) == TIM_FLAG_CC2OF) || \ + ((FLAG) == TIM_FLAG_CC3OF) || \ + ((FLAG) == TIM_FLAG_CC4OF)) + + +#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Filer_Value + * @{ + */ + +#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) +/** + * @} + */ + +/** @defgroup TIM_External_Trigger_Filter + * @{ + */ + +#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) +/** + * @} + */ + +/** @defgroup TIM_Legacy + * @{ + */ + +#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer +#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers +#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers +#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers +#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers +#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers +#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers +#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers +#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers +#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers +#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers +#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers +#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers +#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers +#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers +#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers +#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers +#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup TIM_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Exported_Functions + * @{ + */ + +void TIM_DeInit(TIM_TypeDef* TIMx); +void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); +void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); +void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); +void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); +void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); +void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); +void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); +void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); +void TIM_InternalClockConfig(TIM_TypeDef* TIMx); +void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); +void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, + uint16_t TIM_ICPolarity, uint16_t ICFilter); +void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter); +void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, + uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); +void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter); +void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); +void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); +void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); +void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, + uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); +void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); +void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); +void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); +void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); +void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); +void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); +void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); +void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); +void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); +void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); +void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); +void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); +void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); +void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); +void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); +uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); +uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); +uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); +FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); +void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); +ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); +void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_TIM_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h new file mode 100644 index 00000000..162fa87c --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h @@ -0,0 +1,412 @@ +/** + ****************************************************************************** + * @file stm32f10x_usart.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the USART + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_USART_H +#define __STM32F10x_USART_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup USART + * @{ + */ + +/** @defgroup USART_Exported_Types + * @{ + */ + +/** + * @brief USART Init Structure definition + */ + +typedef struct +{ + uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate. + The baud rate is computed using the following formula: + - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate))) + - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */ + + uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref USART_Word_Length */ + + uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref USART_Stop_Bits */ + + uint16_t USART_Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref USART_Parity + @note When parity is enabled, the computed parity is inserted + at the MSB position of the transmitted data (9th bit when + the word length is set to 9 data bits; 8th bit when the + word length is set to 8 data bits). */ + + uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. + This parameter can be a value of @ref USART_Mode */ + + uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled + or disabled. + This parameter can be a value of @ref USART_Hardware_Flow_Control */ +} USART_InitTypeDef; + +/** + * @brief USART Clock Init Structure definition + */ + +typedef struct +{ + + uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled. + This parameter can be a value of @ref USART_Clock */ + + uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock. + This parameter can be a value of @ref USART_Clock_Polarity */ + + uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref USART_Clock_Phase */ + + uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted + data bit (MSB) has to be output on the SCLK pin in synchronous mode. + This parameter can be a value of @ref USART_Last_Bit */ +} USART_ClockInitTypeDef; + +/** + * @} + */ + +/** @defgroup USART_Exported_Constants + * @{ + */ + +#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \ + ((PERIPH) == USART2) || \ + ((PERIPH) == USART3) || \ + ((PERIPH) == UART4) || \ + ((PERIPH) == UART5)) + +#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \ + ((PERIPH) == USART2) || \ + ((PERIPH) == USART3)) + +#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \ + ((PERIPH) == USART2) || \ + ((PERIPH) == USART3) || \ + ((PERIPH) == UART4)) +/** @defgroup USART_Word_Length + * @{ + */ + +#define USART_WordLength_8b ((uint16_t)0x0000) +#define USART_WordLength_9b ((uint16_t)0x1000) + +#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \ + ((LENGTH) == USART_WordLength_9b)) +/** + * @} + */ + +/** @defgroup USART_Stop_Bits + * @{ + */ + +#define USART_StopBits_1 ((uint16_t)0x0000) +#define USART_StopBits_0_5 ((uint16_t)0x1000) +#define USART_StopBits_2 ((uint16_t)0x2000) +#define USART_StopBits_1_5 ((uint16_t)0x3000) +#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \ + ((STOPBITS) == USART_StopBits_0_5) || \ + ((STOPBITS) == USART_StopBits_2) || \ + ((STOPBITS) == USART_StopBits_1_5)) +/** + * @} + */ + +/** @defgroup USART_Parity + * @{ + */ + +#define USART_Parity_No ((uint16_t)0x0000) +#define USART_Parity_Even ((uint16_t)0x0400) +#define USART_Parity_Odd ((uint16_t)0x0600) +#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \ + ((PARITY) == USART_Parity_Even) || \ + ((PARITY) == USART_Parity_Odd)) +/** + * @} + */ + +/** @defgroup USART_Mode + * @{ + */ + +#define USART_Mode_Rx ((uint16_t)0x0004) +#define USART_Mode_Tx ((uint16_t)0x0008) +#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00)) +/** + * @} + */ + +/** @defgroup USART_Hardware_Flow_Control + * @{ + */ +#define USART_HardwareFlowControl_None ((uint16_t)0x0000) +#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100) +#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200) +#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300) +#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\ + (((CONTROL) == USART_HardwareFlowControl_None) || \ + ((CONTROL) == USART_HardwareFlowControl_RTS) || \ + ((CONTROL) == USART_HardwareFlowControl_CTS) || \ + ((CONTROL) == USART_HardwareFlowControl_RTS_CTS)) +/** + * @} + */ + +/** @defgroup USART_Clock + * @{ + */ +#define USART_Clock_Disable ((uint16_t)0x0000) +#define USART_Clock_Enable ((uint16_t)0x0800) +#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \ + ((CLOCK) == USART_Clock_Enable)) +/** + * @} + */ + +/** @defgroup USART_Clock_Polarity + * @{ + */ + +#define USART_CPOL_Low ((uint16_t)0x0000) +#define USART_CPOL_High ((uint16_t)0x0400) +#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High)) + +/** + * @} + */ + +/** @defgroup USART_Clock_Phase + * @{ + */ + +#define USART_CPHA_1Edge ((uint16_t)0x0000) +#define USART_CPHA_2Edge ((uint16_t)0x0200) +#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge)) + +/** + * @} + */ + +/** @defgroup USART_Last_Bit + * @{ + */ + +#define USART_LastBit_Disable ((uint16_t)0x0000) +#define USART_LastBit_Enable ((uint16_t)0x0100) +#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \ + ((LASTBIT) == USART_LastBit_Enable)) +/** + * @} + */ + +/** @defgroup USART_Interrupt_definition + * @{ + */ + +#define USART_IT_PE ((uint16_t)0x0028) +#define USART_IT_TXE ((uint16_t)0x0727) +#define USART_IT_TC ((uint16_t)0x0626) +#define USART_IT_RXNE ((uint16_t)0x0525) +#define USART_IT_IDLE ((uint16_t)0x0424) +#define USART_IT_LBD ((uint16_t)0x0846) +#define USART_IT_CTS ((uint16_t)0x096A) +#define USART_IT_ERR ((uint16_t)0x0060) +#define USART_IT_ORE ((uint16_t)0x0360) +#define USART_IT_NE ((uint16_t)0x0260) +#define USART_IT_FE ((uint16_t)0x0160) +#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ + ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ + ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ + ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR)) +#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ + ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ + ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ + ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \ + ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE)) +#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ + ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS)) +/** + * @} + */ + +/** @defgroup USART_DMA_Requests + * @{ + */ + +#define USART_DMAReq_Tx ((uint16_t)0x0080) +#define USART_DMAReq_Rx ((uint16_t)0x0040) +#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00)) + +/** + * @} + */ + +/** @defgroup USART_WakeUp_methods + * @{ + */ + +#define USART_WakeUp_IdleLine ((uint16_t)0x0000) +#define USART_WakeUp_AddressMark ((uint16_t)0x0800) +#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \ + ((WAKEUP) == USART_WakeUp_AddressMark)) +/** + * @} + */ + +/** @defgroup USART_LIN_Break_Detection_Length + * @{ + */ + +#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000) +#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020) +#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \ + (((LENGTH) == USART_LINBreakDetectLength_10b) || \ + ((LENGTH) == USART_LINBreakDetectLength_11b)) +/** + * @} + */ + +/** @defgroup USART_IrDA_Low_Power + * @{ + */ + +#define USART_IrDAMode_LowPower ((uint16_t)0x0004) +#define USART_IrDAMode_Normal ((uint16_t)0x0000) +#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \ + ((MODE) == USART_IrDAMode_Normal)) +/** + * @} + */ + +/** @defgroup USART_Flags + * @{ + */ + +#define USART_FLAG_CTS ((uint16_t)0x0200) +#define USART_FLAG_LBD ((uint16_t)0x0100) +#define USART_FLAG_TXE ((uint16_t)0x0080) +#define USART_FLAG_TC ((uint16_t)0x0040) +#define USART_FLAG_RXNE ((uint16_t)0x0020) +#define USART_FLAG_IDLE ((uint16_t)0x0010) +#define USART_FLAG_ORE ((uint16_t)0x0008) +#define USART_FLAG_NE ((uint16_t)0x0004) +#define USART_FLAG_FE ((uint16_t)0x0002) +#define USART_FLAG_PE ((uint16_t)0x0001) +#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \ + ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \ + ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \ + ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \ + ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE)) + +#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00)) +#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\ + ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \ + || ((USART_FLAG) != USART_FLAG_CTS)) +#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21)) +#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF) +#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup USART_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Exported_Functions + * @{ + */ + +void USART_DeInit(USART_TypeDef* USARTx); +void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct); +void USART_StructInit(USART_InitTypeDef* USART_InitStruct); +void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct); +void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct); +void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState); +void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState); +void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address); +void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp); +void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength); +void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); +uint16_t USART_ReceiveData(USART_TypeDef* USARTx); +void USART_SendBreak(USART_TypeDef* USARTx); +void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime); +void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler); +void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode); +void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState); +FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG); +void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG); +ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT); +void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_USART_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h new file mode 100644 index 00000000..bdfa177b --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h @@ -0,0 +1,115 @@ +/** + ****************************************************************************** + * @file stm32f10x_wwdg.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the WWDG firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_WWDG_H +#define __STM32F10x_WWDG_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup WWDG + * @{ + */ + +/** @defgroup WWDG_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Exported_Constants + * @{ + */ + +/** @defgroup WWDG_Prescaler + * @{ + */ + +#define WWDG_Prescaler_1 ((uint32_t)0x00000000) +#define WWDG_Prescaler_2 ((uint32_t)0x00000080) +#define WWDG_Prescaler_4 ((uint32_t)0x00000100) +#define WWDG_Prescaler_8 ((uint32_t)0x00000180) +#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ + ((PRESCALER) == WWDG_Prescaler_2) || \ + ((PRESCALER) == WWDG_Prescaler_4) || \ + ((PRESCALER) == WWDG_Prescaler_8)) +#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) +#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup WWDG_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup WWDG_Exported_Functions + * @{ + */ + +void WWDG_DeInit(void); +void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); +void WWDG_SetWindowValue(uint8_t WindowValue); +void WWDG_EnableIT(void); +void WWDG_SetCounter(uint8_t Counter); +void WWDG_Enable(uint8_t Counter); +FlagStatus WWDG_GetFlagStatus(void); +void WWDG_ClearFlag(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_WWDG_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/misc.c b/firmware/stm32-esp/libraries/fwlib/src/misc.c new file mode 100644 index 00000000..c0a5e113 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/misc.c @@ -0,0 +1,225 @@ +/** + ****************************************************************************** + * @file misc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the miscellaneous firmware functions (add-on + * to CMSIS functions). + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "misc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup MISC + * @brief MISC driver modules + * @{ + */ + +/** @defgroup MISC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_Defines + * @{ + */ + +#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) +/** + * @} + */ + +/** @defgroup MISC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_Functions + * @{ + */ + +/** + * @brief Configures the priority grouping: pre-emption priority and subpriority. + * @param NVIC_PriorityGroup: specifies the priority grouping bits length. + * This parameter can be one of the following values: + * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority + * 4 bits for subpriority + * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority + * 3 bits for subpriority + * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority + * 2 bits for subpriority + * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority + * 1 bits for subpriority + * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority + * 0 bits for subpriority + * @retval None + */ +void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) +{ + /* Check the parameters */ + assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); + + /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ + SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; +} + +/** + * @brief Initializes the NVIC peripheral according to the specified + * parameters in the NVIC_InitStruct. + * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains + * the configuration information for the specified NVIC peripheral. + * @retval None + */ +void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) +{ + uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; + + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); + assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); + assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); + + if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) + { + /* Compute the Corresponding IRQ Priority --------------------------------*/ + tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; + tmppre = (0x4 - tmppriority); + tmpsub = tmpsub >> tmppriority; + + tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; + tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; + tmppriority = tmppriority << 0x04; + + NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; + + /* Enable the Selected IRQ Channels --------------------------------------*/ + NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = + (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); + } + else + { + /* Disable the Selected IRQ Channels -------------------------------------*/ + NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = + (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); + } +} + +/** + * @brief Sets the vector table location and Offset. + * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. + * This parameter can be one of the following values: + * @arg NVIC_VectTab_RAM + * @arg NVIC_VectTab_FLASH + * @param Offset: Vector Table base offset field. This value must be a multiple + * of 0x200. + * @retval None + */ +void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) +{ + /* Check the parameters */ + assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); + assert_param(IS_NVIC_OFFSET(Offset)); + + SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); +} + +/** + * @brief Selects the condition for the system to enter low power mode. + * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. + * This parameter can be one of the following values: + * @arg NVIC_LP_SEVONPEND + * @arg NVIC_LP_SLEEPDEEP + * @arg NVIC_LP_SLEEPONEXIT + * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_NVIC_LP(LowPowerMode)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + SCB->SCR |= LowPowerMode; + } + else + { + SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); + } +} + +/** + * @brief Configures the SysTick clock source. + * @param SysTick_CLKSource: specifies the SysTick clock source. + * This parameter can be one of the following values: + * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. + * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. + * @retval None + */ +void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) +{ + /* Check the parameters */ + assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); + if (SysTick_CLKSource == SysTick_CLKSource_HCLK) + { + SysTick->CTRL |= SysTick_CLKSource_HCLK; + } + else + { + SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c new file mode 100644 index 00000000..8155dc9b --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c @@ -0,0 +1,1307 @@ +/** + ****************************************************************************** + * @file stm32f10x_adc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the ADC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_adc.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup ADC + * @brief ADC driver modules + * @{ + */ + +/** @defgroup ADC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Defines + * @{ + */ + +/* ADC DISCNUM mask */ +#define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) + +/* ADC DISCEN mask */ +#define CR1_DISCEN_Set ((uint32_t)0x00000800) +#define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) + +/* ADC JAUTO mask */ +#define CR1_JAUTO_Set ((uint32_t)0x00000400) +#define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) + +/* ADC JDISCEN mask */ +#define CR1_JDISCEN_Set ((uint32_t)0x00001000) +#define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) + +/* ADC AWDCH mask */ +#define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) + +/* ADC Analog watchdog enable mode mask */ +#define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) + +/* CR1 register Mask */ +#define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) + +/* ADC ADON mask */ +#define CR2_ADON_Set ((uint32_t)0x00000001) +#define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE) + +/* ADC DMA mask */ +#define CR2_DMA_Set ((uint32_t)0x00000100) +#define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF) + +/* ADC RSTCAL mask */ +#define CR2_RSTCAL_Set ((uint32_t)0x00000008) + +/* ADC CAL mask */ +#define CR2_CAL_Set ((uint32_t)0x00000004) + +/* ADC SWSTART mask */ +#define CR2_SWSTART_Set ((uint32_t)0x00400000) + +/* ADC EXTTRIG mask */ +#define CR2_EXTTRIG_Set ((uint32_t)0x00100000) +#define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) + +/* ADC Software start mask */ +#define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) +#define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) + +/* ADC JEXTSEL mask */ +#define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) + +/* ADC JEXTTRIG mask */ +#define CR2_JEXTTRIG_Set ((uint32_t)0x00008000) +#define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) + +/* ADC JSWSTART mask */ +#define CR2_JSWSTART_Set ((uint32_t)0x00200000) + +/* ADC injected software start mask */ +#define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) +#define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) + +/* ADC TSPD mask */ +#define CR2_TSVREFE_Set ((uint32_t)0x00800000) +#define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) + +/* CR2 register Mask */ +#define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) + +/* ADC SQx mask */ +#define SQR3_SQ_Set ((uint32_t)0x0000001F) +#define SQR2_SQ_Set ((uint32_t)0x0000001F) +#define SQR1_SQ_Set ((uint32_t)0x0000001F) + +/* SQR1 register Mask */ +#define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) + +/* ADC JSQx mask */ +#define JSQR_JSQ_Set ((uint32_t)0x0000001F) + +/* ADC JL mask */ +#define JSQR_JL_Set ((uint32_t)0x00300000) +#define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF) + +/* ADC SMPx mask */ +#define SMPR1_SMP_Set ((uint32_t)0x00000007) +#define SMPR2_SMP_Set ((uint32_t)0x00000007) + +/* ADC JDRx registers offset */ +#define JDR_Offset ((uint8_t)0x28) + +/* ADC1 DR register base address */ +#define DR_ADDRESS ((uint32_t)0x4001244C) + +/** + * @} + */ + +/** @defgroup ADC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the ADCx peripheral registers to their default reset values. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval None + */ +void ADC_DeInit(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + + if (ADCx == ADC1) + { + /* Enable ADC1 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); + /* Release ADC1 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); + } + else if (ADCx == ADC2) + { + /* Enable ADC2 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE); + /* Release ADC2 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE); + } + else + { + if (ADCx == ADC3) + { + /* Enable ADC3 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE); + /* Release ADC3 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE); + } + } +} + +/** + * @brief Initializes the ADCx peripheral according to the specified parameters + * in the ADC_InitStruct. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains + * the configuration information for the specified ADC peripheral. + * @retval None + */ +void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct) +{ + uint32_t tmpreg1 = 0; + uint8_t tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode)); + assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode)); + assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode)); + assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv)); + assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); + assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel)); + + /*---------------------------- ADCx CR1 Configuration -----------------*/ + /* Get the ADCx CR1 value */ + tmpreg1 = ADCx->CR1; + /* Clear DUALMOD and SCAN bits */ + tmpreg1 &= CR1_CLEAR_Mask; + /* Configure ADCx: Dual mode and scan conversion mode */ + /* Set DUALMOD bits according to ADC_Mode value */ + /* Set SCAN bit according to ADC_ScanConvMode value */ + tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8)); + /* Write to ADCx CR1 */ + ADCx->CR1 = tmpreg1; + + /*---------------------------- ADCx CR2 Configuration -----------------*/ + /* Get the ADCx CR2 value */ + tmpreg1 = ADCx->CR2; + /* Clear CONT, ALIGN and EXTSEL bits */ + tmpreg1 &= CR2_CLEAR_Mask; + /* Configure ADCx: external trigger event and continuous conversion mode */ + /* Set ALIGN bit according to ADC_DataAlign value */ + /* Set EXTSEL bits according to ADC_ExternalTrigConv value */ + /* Set CONT bit according to ADC_ContinuousConvMode value */ + tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv | + ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1)); + /* Write to ADCx CR2 */ + ADCx->CR2 = tmpreg1; + + /*---------------------------- ADCx SQR1 Configuration -----------------*/ + /* Get the ADCx SQR1 value */ + tmpreg1 = ADCx->SQR1; + /* Clear L bits */ + tmpreg1 &= SQR1_CLEAR_Mask; + /* Configure ADCx: regular channel sequence length */ + /* Set L bits according to ADC_NbrOfChannel value */ + tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1); + tmpreg1 |= (uint32_t)tmpreg2 << 20; + /* Write to ADCx SQR1 */ + ADCx->SQR1 = tmpreg1; +} + +/** + * @brief Fills each ADC_InitStruct member with its default value. + * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized. + * @retval None + */ +void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) +{ + /* Reset ADC init structure parameters values */ + /* Initialize the ADC_Mode member */ + ADC_InitStruct->ADC_Mode = ADC_Mode_Independent; + /* initialize the ADC_ScanConvMode member */ + ADC_InitStruct->ADC_ScanConvMode = DISABLE; + /* Initialize the ADC_ContinuousConvMode member */ + ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; + /* Initialize the ADC_ExternalTrigConv member */ + ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; + /* Initialize the ADC_DataAlign member */ + ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; + /* Initialize the ADC_NbrOfChannel member */ + ADC_InitStruct->ADC_NbrOfChannel = 1; +} + +/** + * @brief Enables or disables the specified ADC peripheral. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the ADCx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the ADON bit to wake up the ADC from power down mode */ + ADCx->CR2 |= CR2_ADON_Set; + } + else + { + /* Disable the selected ADC peripheral */ + ADCx->CR2 &= CR2_ADON_Reset; + } +} + +/** + * @brief Enables or disables the specified ADC DMA request. + * @param ADCx: where x can be 1 or 3 to select the ADC peripheral. + * Note: ADC2 hasn't a DMA capability. + * @param NewState: new state of the selected ADC DMA transfer. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_DMA_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC DMA request */ + ADCx->CR2 |= CR2_DMA_Set; + } + else + { + /* Disable the selected ADC DMA request */ + ADCx->CR2 &= CR2_DMA_Reset; + } +} + +/** + * @brief Enables or disables the specified ADC interrupts. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: End of conversion interrupt mask + * @arg ADC_IT_AWD: Analog watchdog interrupt mask + * @arg ADC_IT_JEOC: End of injected conversion interrupt mask + * @param NewState: new state of the specified ADC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState) +{ + uint8_t itmask = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_ADC_IT(ADC_IT)); + /* Get the ADC IT index */ + itmask = (uint8_t)ADC_IT; + if (NewState != DISABLE) + { + /* Enable the selected ADC interrupts */ + ADCx->CR1 |= itmask; + } + else + { + /* Disable the selected ADC interrupts */ + ADCx->CR1 &= (~(uint32_t)itmask); + } +} + +/** + * @brief Resets the selected ADC calibration registers. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval None + */ +void ADC_ResetCalibration(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Resets the selected ADC calibration registers */ + ADCx->CR2 |= CR2_RSTCAL_Set; +} + +/** + * @brief Gets the selected ADC reset calibration registers status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC reset calibration registers (SET or RESET). + */ +FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of RSTCAL bit */ + if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET) + { + /* RSTCAL bit is set */ + bitstatus = SET; + } + else + { + /* RSTCAL bit is reset */ + bitstatus = RESET; + } + /* Return the RSTCAL bit status */ + return bitstatus; +} + +/** + * @brief Starts the selected ADC calibration process. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval None + */ +void ADC_StartCalibration(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Enable the selected ADC calibration process */ + ADCx->CR2 |= CR2_CAL_Set; +} + +/** + * @brief Gets the selected ADC calibration status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC calibration (SET or RESET). + */ +FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of CAL bit */ + if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET) + { + /* CAL bit is set: calibration on going */ + bitstatus = SET; + } + else + { + /* CAL bit is reset: end of calibration */ + bitstatus = RESET; + } + /* Return the CAL bit status */ + return bitstatus; +} + +/** + * @brief Enables or disables the selected ADC software start conversion . + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC software start conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC conversion on external event and start the selected + ADC conversion */ + ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set; + } + else + { + /* Disable the selected ADC conversion on external event and stop the selected + ADC conversion */ + ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset; + } +} + +/** + * @brief Gets the selected ADC Software start conversion Status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC software start conversion (SET or RESET). + */ +FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of SWSTART bit */ + if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET) + { + /* SWSTART bit is set */ + bitstatus = SET; + } + else + { + /* SWSTART bit is reset */ + bitstatus = RESET; + } + /* Return the SWSTART bit status */ + return bitstatus; +} + +/** + * @brief Configures the discontinuous mode for the selected ADC regular + * group channel. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param Number: specifies the discontinuous mode regular channel + * count value. This number must be between 1 and 8. + * @retval None + */ +void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number) +{ + uint32_t tmpreg1 = 0; + uint32_t tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number)); + /* Get the old register value */ + tmpreg1 = ADCx->CR1; + /* Clear the old discontinuous mode channel count */ + tmpreg1 &= CR1_DISCNUM_Reset; + /* Set the discontinuous mode channel count */ + tmpreg2 = Number - 1; + tmpreg1 |= tmpreg2 << 13; + /* Store the new register value */ + ADCx->CR1 = tmpreg1; +} + +/** + * @brief Enables or disables the discontinuous mode on regular group + * channel for the specified ADC + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC discontinuous mode + * on regular group channel. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC regular discontinuous mode */ + ADCx->CR1 |= CR1_DISCEN_Set; + } + else + { + /* Disable the selected ADC regular discontinuous mode */ + ADCx->CR1 &= CR1_DISCEN_Reset; + } +} + +/** + * @brief Configures for the selected ADC regular channel its corresponding + * rank in the sequencer and its sample time. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_Channel: the ADC channel to configure. + * This parameter can be one of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16. + * @param ADC_SampleTime: The sample time value to be set for the selected channel. + * This parameter can be one of the following values: + * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles + * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles + * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles + * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles + * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles + * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles + * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles + * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles + * @retval None + */ +void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CHANNEL(ADC_Channel)); + assert_param(IS_ADC_REGULAR_RANK(Rank)); + assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); + /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ + if (ADC_Channel > ADC_Channel_9) + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR1; + /* Calculate the mask to clear */ + tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10)); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR1 = tmpreg1; + } + else /* ADC_Channel include in ADC_Channel_[0..9] */ + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR2; + /* Calculate the mask to clear */ + tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR2 = tmpreg1; + } + /* For Rank 1 to 6 */ + if (Rank < 7) + { + /* Get the old register value */ + tmpreg1 = ADCx->SQR3; + /* Calculate the mask to clear */ + tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1)); + /* Clear the old SQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1)); + /* Set the SQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SQR3 = tmpreg1; + } + /* For Rank 7 to 12 */ + else if (Rank < 13) + { + /* Get the old register value */ + tmpreg1 = ADCx->SQR2; + /* Calculate the mask to clear */ + tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7)); + /* Clear the old SQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7)); + /* Set the SQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SQR2 = tmpreg1; + } + /* For Rank 13 to 16 */ + else + { + /* Get the old register value */ + tmpreg1 = ADCx->SQR1; + /* Calculate the mask to clear */ + tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13)); + /* Clear the old SQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13)); + /* Set the SQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SQR1 = tmpreg1; + } +} + +/** + * @brief Enables or disables the ADCx conversion through external trigger. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC external trigger start of conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC conversion on external event */ + ADCx->CR2 |= CR2_EXTTRIG_Set; + } + else + { + /* Disable the selected ADC conversion on external event */ + ADCx->CR2 &= CR2_EXTTRIG_Reset; + } +} + +/** + * @brief Returns the last ADCx conversion result data for regular channel. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The Data conversion value. + */ +uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Return the selected ADC conversion value */ + return (uint16_t) ADCx->DR; +} + +/** + * @brief Returns the last ADC1 and ADC2 conversion result data in dual mode. + * @retval The Data conversion value. + */ +uint32_t ADC_GetDualModeConversionValue(void) +{ + /* Return the dual mode conversion value */ + return (*(__IO uint32_t *) DR_ADDRESS); +} + +/** + * @brief Enables or disables the selected ADC automatic injected group + * conversion after regular one. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC auto injected conversion + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC automatic injected group conversion */ + ADCx->CR1 |= CR1_JAUTO_Set; + } + else + { + /* Disable the selected ADC automatic injected group conversion */ + ADCx->CR1 &= CR1_JAUTO_Reset; + } +} + +/** + * @brief Enables or disables the discontinuous mode for injected group + * channel for the specified ADC + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC discontinuous mode + * on injected group channel. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC injected discontinuous mode */ + ADCx->CR1 |= CR1_JDISCEN_Set; + } + else + { + /* Disable the selected ADC injected discontinuous mode */ + ADCx->CR1 &= CR1_JDISCEN_Reset; + } +} + +/** + * @brief Configures the ADCx external trigger for injected channels conversion. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. + * This parameter can be one of the following values: + * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3) + * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3) + * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8 + * capture compare4 event selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not + * by external trigger (for ADC1, ADC2 and ADC3) + * @retval None + */ +void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv)); + /* Get the old register value */ + tmpreg = ADCx->CR2; + /* Clear the old external event selection for injected group */ + tmpreg &= CR2_JEXTSEL_Reset; + /* Set the external event selection for injected group */ + tmpreg |= ADC_ExternalTrigInjecConv; + /* Store the new register value */ + ADCx->CR2 = tmpreg; +} + +/** + * @brief Enables or disables the ADCx injected channels conversion through + * external trigger + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC external trigger start of + * injected conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC external event selection for injected group */ + ADCx->CR2 |= CR2_JEXTTRIG_Set; + } + else + { + /* Disable the selected ADC external event selection for injected group */ + ADCx->CR2 &= CR2_JEXTTRIG_Reset; + } +} + +/** + * @brief Enables or disables the selected ADC start of the injected + * channels conversion. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC software start injected conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC conversion for injected group on external event and start the selected + ADC injected conversion */ + ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set; + } + else + { + /* Disable the selected ADC conversion on external event for injected group and stop the selected + ADC injected conversion */ + ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset; + } +} + +/** + * @brief Gets the selected ADC Software start injected conversion Status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC software start injected conversion (SET or RESET). + */ +FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of JSWSTART bit */ + if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET) + { + /* JSWSTART bit is set */ + bitstatus = SET; + } + else + { + /* JSWSTART bit is reset */ + bitstatus = RESET; + } + /* Return the JSWSTART bit status */ + return bitstatus; +} + +/** + * @brief Configures for the selected ADC injected channel its corresponding + * rank in the sequencer and its sample time. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_Channel: the ADC channel to configure. + * This parameter can be one of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @param Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4. + * @param ADC_SampleTime: The sample time value to be set for the selected channel. + * This parameter can be one of the following values: + * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles + * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles + * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles + * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles + * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles + * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles + * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles + * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles + * @retval None + */ +void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CHANNEL(ADC_Channel)); + assert_param(IS_ADC_INJECTED_RANK(Rank)); + assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); + /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ + if (ADC_Channel > ADC_Channel_9) + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR1; + /* Calculate the mask to clear */ + tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10)); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10)); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR1 = tmpreg1; + } + else /* ADC_Channel include in ADC_Channel_[0..9] */ + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR2; + /* Calculate the mask to clear */ + tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR2 = tmpreg1; + } + /* Rank configuration */ + /* Get the old register value */ + tmpreg1 = ADCx->JSQR; + /* Get JL value: Number = JL+1 */ + tmpreg3 = (tmpreg1 & JSQR_JL_Set)>> 20; + /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */ + tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); + /* Clear the old JSQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); + /* Set the JSQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->JSQR = tmpreg1; +} + +/** + * @brief Configures the sequencer length for injected channels + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param Length: The sequencer length. + * This parameter must be a number between 1 to 4. + * @retval None + */ +void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length) +{ + uint32_t tmpreg1 = 0; + uint32_t tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_INJECTED_LENGTH(Length)); + + /* Get the old register value */ + tmpreg1 = ADCx->JSQR; + /* Clear the old injected sequnence lenght JL bits */ + tmpreg1 &= JSQR_JL_Reset; + /* Set the injected sequnence lenght JL bits */ + tmpreg2 = Length - 1; + tmpreg1 |= tmpreg2 << 20; + /* Store the new register value */ + ADCx->JSQR = tmpreg1; +} + +/** + * @brief Set the injected channels conversion value offset + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_InjectedChannel: the ADC injected channel to set its offset. + * This parameter can be one of the following values: + * @arg ADC_InjectedChannel_1: Injected Channel1 selected + * @arg ADC_InjectedChannel_2: Injected Channel2 selected + * @arg ADC_InjectedChannel_3: Injected Channel3 selected + * @arg ADC_InjectedChannel_4: Injected Channel4 selected + * @param Offset: the offset value for the selected ADC injected channel + * This parameter must be a 12bit value. + * @retval None + */ +void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); + assert_param(IS_ADC_OFFSET(Offset)); + + tmp = (uint32_t)ADCx; + tmp += ADC_InjectedChannel; + + /* Set the selected injected channel data offset */ + *(__IO uint32_t *) tmp = (uint32_t)Offset; +} + +/** + * @brief Returns the ADC injected channel conversion result + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_InjectedChannel: the converted ADC injected channel. + * This parameter can be one of the following values: + * @arg ADC_InjectedChannel_1: Injected Channel1 selected + * @arg ADC_InjectedChannel_2: Injected Channel2 selected + * @arg ADC_InjectedChannel_3: Injected Channel3 selected + * @arg ADC_InjectedChannel_4: Injected Channel4 selected + * @retval The Data conversion value. + */ +uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); + + tmp = (uint32_t)ADCx; + tmp += ADC_InjectedChannel + JDR_Offset; + + /* Returns the selected injected channel conversion data value */ + return (uint16_t) (*(__IO uint32_t*) tmp); +} + +/** + * @brief Enables or disables the analog watchdog on single/all regular + * or injected channels + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration. + * This parameter can be one of the following values: + * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel + * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel + * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel + * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel + * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel + * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels + * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog + * @retval None + */ +void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog)); + /* Get the old register value */ + tmpreg = ADCx->CR1; + /* Clear AWDEN, AWDENJ and AWDSGL bits */ + tmpreg &= CR1_AWDMode_Reset; + /* Set the analog watchdog enable mode */ + tmpreg |= ADC_AnalogWatchdog; + /* Store the new register value */ + ADCx->CR1 = tmpreg; +} + +/** + * @brief Configures the high and low thresholds of the analog watchdog. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param HighThreshold: the ADC analog watchdog High threshold value. + * This parameter must be a 12bit value. + * @param LowThreshold: the ADC analog watchdog Low threshold value. + * This parameter must be a 12bit value. + * @retval None + */ +void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, + uint16_t LowThreshold) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_THRESHOLD(HighThreshold)); + assert_param(IS_ADC_THRESHOLD(LowThreshold)); + /* Set the ADCx high threshold */ + ADCx->HTR = HighThreshold; + /* Set the ADCx low threshold */ + ADCx->LTR = LowThreshold; +} + +/** + * @brief Configures the analog watchdog guarded single channel + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_Channel: the ADC channel to configure for the analog watchdog. + * This parameter can be one of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @retval None + */ +void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CHANNEL(ADC_Channel)); + /* Get the old register value */ + tmpreg = ADCx->CR1; + /* Clear the Analog watchdog channel select bits */ + tmpreg &= CR1_AWDCH_Reset; + /* Set the Analog watchdog channel */ + tmpreg |= ADC_Channel; + /* Store the new register value */ + ADCx->CR1 = tmpreg; +} + +/** + * @brief Enables or disables the temperature sensor and Vrefint channel. + * @param NewState: new state of the temperature sensor. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_TempSensorVrefintCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the temperature sensor and Vrefint channel*/ + ADC1->CR2 |= CR2_TSVREFE_Set; + } + else + { + /* Disable the temperature sensor and Vrefint channel*/ + ADC1->CR2 &= CR2_TSVREFE_Reset; + } +} + +/** + * @brief Checks whether the specified ADC flag is set or not. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg ADC_FLAG_AWD: Analog watchdog flag + * @arg ADC_FLAG_EOC: End of conversion flag + * @arg ADC_FLAG_JEOC: End of injected group conversion flag + * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag + * @arg ADC_FLAG_STRT: Start of regular group conversion flag + * @retval The new state of ADC_FLAG (SET or RESET). + */ +FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_GET_FLAG(ADC_FLAG)); + /* Check the status of the specified ADC flag */ + if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET) + { + /* ADC_FLAG is set */ + bitstatus = SET; + } + else + { + /* ADC_FLAG is reset */ + bitstatus = RESET; + } + /* Return the ADC_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the ADCx's pending flags. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg ADC_FLAG_AWD: Analog watchdog flag + * @arg ADC_FLAG_EOC: End of conversion flag + * @arg ADC_FLAG_JEOC: End of injected group conversion flag + * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag + * @arg ADC_FLAG_STRT: Start of regular group conversion flag + * @retval None + */ +void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG)); + /* Clear the selected ADC flags */ + ADCx->SR = ~(uint32_t)ADC_FLAG; +} + +/** + * @brief Checks whether the specified ADC interrupt has occurred or not. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_IT: specifies the ADC interrupt source to check. + * This parameter can be one of the following values: + * @arg ADC_IT_EOC: End of conversion interrupt mask + * @arg ADC_IT_AWD: Analog watchdog interrupt mask + * @arg ADC_IT_JEOC: End of injected conversion interrupt mask + * @retval The new state of ADC_IT (SET or RESET). + */ +ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t itmask = 0, enablestatus = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_GET_IT(ADC_IT)); + /* Get the ADC IT index */ + itmask = ADC_IT >> 8; + /* Get the ADC_IT enable bit status */ + enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ; + /* Check the status of the specified ADC interrupt */ + if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus) + { + /* ADC_IT is set */ + bitstatus = SET; + } + else + { + /* ADC_IT is reset */ + bitstatus = RESET; + } + /* Return the ADC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the ADCx's interrupt pending bits. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_IT: specifies the ADC interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: End of conversion interrupt mask + * @arg ADC_IT_AWD: Analog watchdog interrupt mask + * @arg ADC_IT_JEOC: End of injected conversion interrupt mask + * @retval None + */ +void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT) +{ + uint8_t itmask = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_IT(ADC_IT)); + /* Get the ADC IT index */ + itmask = (uint8_t)(ADC_IT >> 8); + /* Clear the selected ADC interrupt pending bits */ + ADCx->SR = ~(uint32_t)itmask; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c new file mode 100644 index 00000000..997eecc9 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c @@ -0,0 +1,308 @@ +/** + ****************************************************************************** + * @file stm32f10x_bkp.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the BKP firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_bkp.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup BKP + * @brief BKP driver modules + * @{ + */ + +/** @defgroup BKP_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_Defines + * @{ + */ + +/* ------------ BKP registers bit address in the alias region --------------- */ +#define BKP_OFFSET (BKP_BASE - PERIPH_BASE) + +/* --- CR Register ----*/ + +/* Alias word address of TPAL bit */ +#define CR_OFFSET (BKP_OFFSET + 0x30) +#define TPAL_BitNumber 0x01 +#define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4)) + +/* Alias word address of TPE bit */ +#define TPE_BitNumber 0x00 +#define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of TPIE bit */ +#define CSR_OFFSET (BKP_OFFSET + 0x34) +#define TPIE_BitNumber 0x02 +#define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4)) + +/* Alias word address of TIF bit */ +#define TIF_BitNumber 0x09 +#define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4)) + +/* Alias word address of TEF bit */ +#define TEF_BitNumber 0x08 +#define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4)) + +/* ---------------------- BKP registers bit mask ------------------------ */ + +/* RTCCR register bit mask */ +#define RTCCR_CAL_MASK ((uint16_t)0xFF80) +#define RTCCR_MASK ((uint16_t)0xFC7F) + +/** + * @} + */ + + +/** @defgroup BKP_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the BKP peripheral registers to their default reset values. + * @param None + * @retval None + */ +void BKP_DeInit(void) +{ + RCC_BackupResetCmd(ENABLE); + RCC_BackupResetCmd(DISABLE); +} + +/** + * @brief Configures the Tamper Pin active level. + * @param BKP_TamperPinLevel: specifies the Tamper Pin active level. + * This parameter can be one of the following values: + * @arg BKP_TamperPinLevel_High: Tamper pin active on high level + * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level + * @retval None + */ +void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) +{ + /* Check the parameters */ + assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel)); + *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel; +} + +/** + * @brief Enables or disables the Tamper Pin activation. + * @param NewState: new state of the Tamper Pin activation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void BKP_TamperPinCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the Tamper Pin Interrupt. + * @param NewState: new state of the Tamper Pin Interrupt. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void BKP_ITConfig(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState; +} + +/** + * @brief Select the RTC output source to output on the Tamper pin. + * @param BKP_RTCOutputSource: specifies the RTC output source. + * This parameter can be one of the following values: + * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin. + * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency + * divided by 64 on the Tamper pin. + * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on + * the Tamper pin. + * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on + * the Tamper pin. + * @retval None + */ +void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) +{ + uint16_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource)); + tmpreg = BKP->RTCCR; + /* Clear CCO, ASOE and ASOS bits */ + tmpreg &= RTCCR_MASK; + + /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */ + tmpreg |= BKP_RTCOutputSource; + /* Store the new value */ + BKP->RTCCR = tmpreg; +} + +/** + * @brief Sets RTC Clock Calibration value. + * @param CalibrationValue: specifies the RTC Clock Calibration value. + * This parameter must be a number between 0 and 0x7F. + * @retval None + */ +void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) +{ + uint16_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue)); + tmpreg = BKP->RTCCR; + /* Clear CAL[6:0] bits */ + tmpreg &= RTCCR_CAL_MASK; + /* Set CAL[6:0] bits according to CalibrationValue value */ + tmpreg |= CalibrationValue; + /* Store the new value */ + BKP->RTCCR = tmpreg; +} + +/** + * @brief Writes user data to the specified Data Backup Register. + * @param BKP_DR: specifies the Data Backup Register. + * This parameter can be BKP_DRx where x:[1, 42] + * @param Data: data to write + * @retval None + */ +void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_BKP_DR(BKP_DR)); + + tmp = (uint32_t)BKP_BASE; + tmp += BKP_DR; + + *(__IO uint32_t *) tmp = Data; +} + +/** + * @brief Reads data from the specified Data Backup Register. + * @param BKP_DR: specifies the Data Backup Register. + * This parameter can be BKP_DRx where x:[1, 42] + * @retval The content of the specified Data Backup Register + */ +uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_BKP_DR(BKP_DR)); + + tmp = (uint32_t)BKP_BASE; + tmp += BKP_DR; + + return (*(__IO uint16_t *) tmp); +} + +/** + * @brief Checks whether the Tamper Pin Event flag is set or not. + * @param None + * @retval The new state of the Tamper Pin Event flag (SET or RESET). + */ +FlagStatus BKP_GetFlagStatus(void) +{ + return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB); +} + +/** + * @brief Clears Tamper Pin Event pending flag. + * @param None + * @retval None + */ +void BKP_ClearFlag(void) +{ + /* Set CTE bit to clear Tamper Pin Event flag */ + BKP->CSR |= BKP_CSR_CTE; +} + +/** + * @brief Checks whether the Tamper Pin Interrupt has occurred or not. + * @param None + * @retval The new state of the Tamper Pin Interrupt (SET or RESET). + */ +ITStatus BKP_GetITStatus(void) +{ + return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB); +} + +/** + * @brief Clears Tamper Pin Interrupt pending bit. + * @param None + * @retval None + */ +void BKP_ClearITPendingBit(void) +{ + /* Set CTI bit to clear Tamper Pin Interrupt pending bit */ + BKP->CSR |= BKP_CSR_CTI; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c new file mode 100644 index 00000000..ec8e0498 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c @@ -0,0 +1,1415 @@ +/** + ****************************************************************************** + * @file stm32f10x_can.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the CAN firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_can.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup CAN + * @brief CAN driver modules + * @{ + */ + +/** @defgroup CAN_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Private_Defines + * @{ + */ + +/* CAN Master Control Register bits */ + +#define MCR_DBF ((uint32_t)0x00010000) /* software master reset */ + +/* CAN Mailbox Transmit Request */ +#define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ + +/* CAN Filter Master Register bits */ +#define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */ + +/* Time out for INAK bit */ +#define INAK_TIMEOUT ((uint32_t)0x0000FFFF) +/* Time out for SLAK bit */ +#define SLAK_TIMEOUT ((uint32_t)0x0000FFFF) + + + +/* Flags in TSR register */ +#define CAN_FLAGS_TSR ((uint32_t)0x08000000) +/* Flags in RF1R register */ +#define CAN_FLAGS_RF1R ((uint32_t)0x04000000) +/* Flags in RF0R register */ +#define CAN_FLAGS_RF0R ((uint32_t)0x02000000) +/* Flags in MSR register */ +#define CAN_FLAGS_MSR ((uint32_t)0x01000000) +/* Flags in ESR register */ +#define CAN_FLAGS_ESR ((uint32_t)0x00F00000) + +/* Mailboxes definition */ +#define CAN_TXMAILBOX_0 ((uint8_t)0x00) +#define CAN_TXMAILBOX_1 ((uint8_t)0x01) +#define CAN_TXMAILBOX_2 ((uint8_t)0x02) + + + +#define CAN_MODE_MASK ((uint32_t) 0x00000003) +/** + * @} + */ + +/** @defgroup CAN_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Private_FunctionPrototypes + * @{ + */ + +static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit); + +/** + * @} + */ + +/** @defgroup CAN_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the CAN peripheral registers to their default reset values. + * @param CANx: where x can be 1 or 2 to select the CAN peripheral. + * @retval None. + */ +void CAN_DeInit(CAN_TypeDef* CANx) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + if (CANx == CAN1) + { + /* Enable CAN1 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); + /* Release CAN1 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); + } + else + { + /* Enable CAN2 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE); + /* Release CAN2 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE); + } +} + +/** + * @brief Initializes the CAN peripheral according to the specified + * parameters in the CAN_InitStruct. + * @param CANx: where x can be 1 or 2 to to select the CAN + * peripheral. + * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that + * contains the configuration information for the + * CAN peripheral. + * @retval Constant indicates initialization succeed which will be + * CAN_InitStatus_Failed or CAN_InitStatus_Success. + */ +uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct) +{ + uint8_t InitStatus = CAN_InitStatus_Failed; + uint32_t wait_ack = 0x00000000; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP)); + assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode)); + assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW)); + assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1)); + assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2)); + assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler)); + + /* Exit from sleep mode */ + CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP); + + /* Request initialisation */ + CANx->MCR |= CAN_MCR_INRQ ; + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) + { + wait_ack++; + } + + /* Check acknowledge */ + if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) + { + InitStatus = CAN_InitStatus_Failed; + } + else + { + /* Set the time triggered communication mode */ + if (CAN_InitStruct->CAN_TTCM == ENABLE) + { + CANx->MCR |= CAN_MCR_TTCM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM; + } + + /* Set the automatic bus-off management */ + if (CAN_InitStruct->CAN_ABOM == ENABLE) + { + CANx->MCR |= CAN_MCR_ABOM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM; + } + + /* Set the automatic wake-up mode */ + if (CAN_InitStruct->CAN_AWUM == ENABLE) + { + CANx->MCR |= CAN_MCR_AWUM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM; + } + + /* Set the no automatic retransmission */ + if (CAN_InitStruct->CAN_NART == ENABLE) + { + CANx->MCR |= CAN_MCR_NART; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_NART; + } + + /* Set the receive FIFO locked mode */ + if (CAN_InitStruct->CAN_RFLM == ENABLE) + { + CANx->MCR |= CAN_MCR_RFLM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM; + } + + /* Set the transmit FIFO priority */ + if (CAN_InitStruct->CAN_TXFP == ENABLE) + { + CANx->MCR |= CAN_MCR_TXFP; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP; + } + + /* Set the bit timing register */ + CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \ + ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \ + ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \ + ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \ + ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1); + + /* Request leave initialisation */ + CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ; + + /* Wait the acknowledge */ + wait_ack = 0; + + while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) + { + wait_ack++; + } + + /* ...and check acknowledged */ + if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) + { + InitStatus = CAN_InitStatus_Failed; + } + else + { + InitStatus = CAN_InitStatus_Success ; + } + } + + /* At this step, return the status of initialization */ + return InitStatus; +} + +/** + * @brief Initializes the CAN peripheral according to the specified + * parameters in the CAN_FilterInitStruct. + * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef + * structure that contains the configuration + * information. + * @retval None. + */ +void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct) +{ + uint32_t filter_number_bit_pos = 0; + /* Check the parameters */ + assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber)); + assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode)); + assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale)); + assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment)); + assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation)); + + filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber; + + /* Initialisation mode for the filter */ + CAN1->FMR |= FMR_FINIT; + + /* Filter Deactivation */ + CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos; + + /* Filter Scale */ + if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit) + { + /* 16-bit scale for the filter */ + CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos; + + /* First 16-bit identifier and First 16-bit mask */ + /* Or First 16-bit identifier and Second 16-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); + + /* Second 16-bit identifier and Second 16-bit mask */ + /* Or Third 16-bit identifier and Fourth 16-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh); + } + + if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit) + { + /* 32-bit scale for the filter */ + CAN1->FS1R |= filter_number_bit_pos; + /* 32-bit identifier or First 32-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); + /* 32-bit mask or Second 32-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow); + } + + /* Filter Mode */ + if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask) + { + /*Id/Mask mode for the filter*/ + CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos; + } + else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ + { + /*Identifier list mode for the filter*/ + CAN1->FM1R |= (uint32_t)filter_number_bit_pos; + } + + /* Filter FIFO assignment */ + if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0) + { + /* FIFO 0 assignation for the filter */ + CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos; + } + + if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1) + { + /* FIFO 1 assignation for the filter */ + CAN1->FFA1R |= (uint32_t)filter_number_bit_pos; + } + + /* Filter activation */ + if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE) + { + CAN1->FA1R |= filter_number_bit_pos; + } + + /* Leave the initialisation mode for the filter */ + CAN1->FMR &= ~FMR_FINIT; +} + +/** + * @brief Fills each CAN_InitStruct member with its default value. + * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which + * will be initialized. + * @retval None. + */ +void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct) +{ + /* Reset CAN init structure parameters values */ + + /* Initialize the time triggered communication mode */ + CAN_InitStruct->CAN_TTCM = DISABLE; + + /* Initialize the automatic bus-off management */ + CAN_InitStruct->CAN_ABOM = DISABLE; + + /* Initialize the automatic wake-up mode */ + CAN_InitStruct->CAN_AWUM = DISABLE; + + /* Initialize the no automatic retransmission */ + CAN_InitStruct->CAN_NART = DISABLE; + + /* Initialize the receive FIFO locked mode */ + CAN_InitStruct->CAN_RFLM = DISABLE; + + /* Initialize the transmit FIFO priority */ + CAN_InitStruct->CAN_TXFP = DISABLE; + + /* Initialize the CAN_Mode member */ + CAN_InitStruct->CAN_Mode = CAN_Mode_Normal; + + /* Initialize the CAN_SJW member */ + CAN_InitStruct->CAN_SJW = CAN_SJW_1tq; + + /* Initialize the CAN_BS1 member */ + CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq; + + /* Initialize the CAN_BS2 member */ + CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq; + + /* Initialize the CAN_Prescaler member */ + CAN_InitStruct->CAN_Prescaler = 1; +} + +/** + * @brief Select the start bank filter for slave CAN. + * @note This function applies only to STM32 Connectivity line devices. + * @param CAN_BankNumber: Select the start slave bank filter from 1..27. + * @retval None. + */ +void CAN_SlaveStartBank(uint8_t CAN_BankNumber) +{ + /* Check the parameters */ + assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber)); + + /* Enter Initialisation mode for the filter */ + CAN1->FMR |= FMR_FINIT; + + /* Select the start slave bank */ + CAN1->FMR &= (uint32_t)0xFFFFC0F1 ; + CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8; + + /* Leave Initialisation mode for the filter */ + CAN1->FMR &= ~FMR_FINIT; +} + +/** + * @brief Enables or disables the DBG Freeze for CAN. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param NewState: new state of the CAN peripheral. This parameter can + * be: ENABLE or DISABLE. + * @retval None. + */ +void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable Debug Freeze */ + CANx->MCR |= MCR_DBF; + } + else + { + /* Disable Debug Freeze */ + CANx->MCR &= ~MCR_DBF; + } +} + + +/** + * @brief Enables or disabes the CAN Time TriggerOperation communication mode. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param NewState : Mode new state , can be one of @ref FunctionalState. + * @note when enabled, Time stamp (TIME[15:0]) value is sent in the last + * two data bytes of the 8-byte message: TIME[7:0] in data byte 6 + * and TIME[15:8] in data byte 7 + * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be + * sent over the CAN bus. + * @retval None + */ +void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the TTCM mode */ + CANx->MCR |= CAN_MCR_TTCM; + + /* Set TGT bits */ + CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT); + CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT); + CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT); + } + else + { + /* Disable the TTCM mode */ + CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM); + + /* Reset TGT bits */ + CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT); + CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT); + CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT); + } +} +/** + * @brief Initiates the transmission of a message. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param TxMessage: pointer to a structure which contains CAN Id, CAN + * DLC and CAN data. + * @retval The number of the mailbox that is used for transmission + * or CAN_TxStatus_NoMailBox if there is no empty mailbox. + */ +uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage) +{ + uint8_t transmit_mailbox = 0; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_IDTYPE(TxMessage->IDE)); + assert_param(IS_CAN_RTR(TxMessage->RTR)); + assert_param(IS_CAN_DLC(TxMessage->DLC)); + + /* Select one empty transmit mailbox */ + if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) + { + transmit_mailbox = 0; + } + else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) + { + transmit_mailbox = 1; + } + else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) + { + transmit_mailbox = 2; + } + else + { + transmit_mailbox = CAN_TxStatus_NoMailBox; + } + + if (transmit_mailbox != CAN_TxStatus_NoMailBox) + { + /* Set up the Id */ + CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ; + if (TxMessage->IDE == CAN_Id_Standard) + { + assert_param(IS_CAN_STDID(TxMessage->StdId)); + CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \ + TxMessage->RTR); + } + else + { + assert_param(IS_CAN_EXTID(TxMessage->ExtId)); + CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \ + TxMessage->IDE | \ + TxMessage->RTR); + } + + /* Set up the DLC */ + TxMessage->DLC &= (uint8_t)0x0000000F; + CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0; + CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC; + + /* Set up the data field */ + CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | + ((uint32_t)TxMessage->Data[2] << 16) | + ((uint32_t)TxMessage->Data[1] << 8) | + ((uint32_t)TxMessage->Data[0])); + CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | + ((uint32_t)TxMessage->Data[6] << 16) | + ((uint32_t)TxMessage->Data[5] << 8) | + ((uint32_t)TxMessage->Data[4])); + /* Request transmission */ + CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ; + } + return transmit_mailbox; +} + +/** + * @brief Checks the transmission of a message. + * @param CANx: where x can be 1 or 2 to to select the + * CAN peripheral. + * @param TransmitMailbox: the number of the mailbox that is used for + * transmission. + * @retval CAN_TxStatus_Ok if the CAN driver transmits the message, CAN_TxStatus_Failed + * in an other case. + */ +uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox) +{ + uint32_t state = 0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox)); + + switch (TransmitMailbox) + { + case (CAN_TXMAILBOX_0): + state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0); + break; + case (CAN_TXMAILBOX_1): + state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1); + break; + case (CAN_TXMAILBOX_2): + state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2); + break; + default: + state = CAN_TxStatus_Failed; + break; + } + switch (state) + { + /* transmit pending */ + case (0x0): state = CAN_TxStatus_Pending; + break; + /* transmit failed */ + case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed; + break; + case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed; + break; + case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed; + break; + /* transmit succeeded */ + case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok; + break; + case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok; + break; + case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok; + break; + default: state = CAN_TxStatus_Failed; + break; + } + return (uint8_t) state; +} + +/** + * @brief Cancels a transmit request. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param Mailbox: Mailbox number. + * @retval None. + */ +void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox)); + /* abort transmission */ + switch (Mailbox) + { + case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0; + break; + case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1; + break; + case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2; + break; + default: + break; + } +} + + +/** + * @brief Receives a message. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. + * @param RxMessage: pointer to a structure receive message which contains + * CAN Id, CAN DLC, CAN datas and FMI number. + * @retval None. + */ +void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONumber)); + /* Get the Id */ + RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR; + if (RxMessage->IDE == CAN_Id_Standard) + { + RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21); + } + else + { + RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3); + } + + RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR; + /* Get the DLC */ + RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR; + /* Get the FMI */ + RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8); + /* Get the data field */ + RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR; + RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8); + RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16); + RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24); + RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR; + RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8); + RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16); + RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24); + /* Release the FIFO */ + /* Release FIFO0 */ + if (FIFONumber == CAN_FIFO0) + { + CANx->RF0R |= CAN_RF0R_RFOM0; + } + /* Release FIFO1 */ + else /* FIFONumber == CAN_FIFO1 */ + { + CANx->RF1R |= CAN_RF1R_RFOM1; + } +} + +/** + * @brief Releases the specified FIFO. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1. + * @retval None. + */ +void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONumber)); + /* Release FIFO0 */ + if (FIFONumber == CAN_FIFO0) + { + CANx->RF0R |= CAN_RF0R_RFOM0; + } + /* Release FIFO1 */ + else /* FIFONumber == CAN_FIFO1 */ + { + CANx->RF1R |= CAN_RF1R_RFOM1; + } +} + +/** + * @brief Returns the number of pending messages. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. + * @retval NbMessage : which is the number of pending message. + */ +uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber) +{ + uint8_t message_pending=0; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONumber)); + if (FIFONumber == CAN_FIFO0) + { + message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03); + } + else if (FIFONumber == CAN_FIFO1) + { + message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03); + } + else + { + message_pending = 0; + } + return message_pending; +} + + +/** + * @brief Select the CAN Operation mode. + * @param CAN_OperatingMode : CAN Operating Mode. This parameter can be one + * of @ref CAN_OperatingMode_TypeDef enumeration. + * @retval status of the requested mode which can be + * - CAN_ModeStatus_Failed CAN failed entering the specific mode + * - CAN_ModeStatus_Success CAN Succeed entering the specific mode + + */ +uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode) +{ + uint8_t status = CAN_ModeStatus_Failed; + + /* Timeout for INAK or also for SLAK bits*/ + uint32_t timeout = INAK_TIMEOUT; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode)); + + if (CAN_OperatingMode == CAN_OperatingMode_Initialization) + { + /* Request initialisation */ + CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ); + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0)) + { + timeout--; + } + if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) + { + status = CAN_ModeStatus_Failed; + } + else + { + status = CAN_ModeStatus_Success; + } + } + else if (CAN_OperatingMode == CAN_OperatingMode_Normal) + { + /* Request leave initialisation and sleep mode and enter Normal mode */ + CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ)); + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0)) + { + timeout--; + } + if ((CANx->MSR & CAN_MODE_MASK) != 0) + { + status = CAN_ModeStatus_Failed; + } + else + { + status = CAN_ModeStatus_Success; + } + } + else if (CAN_OperatingMode == CAN_OperatingMode_Sleep) + { + /* Request Sleep mode */ + CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0)) + { + timeout--; + } + if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) + { + status = CAN_ModeStatus_Failed; + } + else + { + status = CAN_ModeStatus_Success; + } + } + else + { + status = CAN_ModeStatus_Failed; + } + + return (uint8_t) status; +} + +/** + * @brief Enters the low power mode. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval status: CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed in an + * other case. + */ +uint8_t CAN_Sleep(CAN_TypeDef* CANx) +{ + uint8_t sleepstatus = CAN_Sleep_Failed; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Request Sleep mode */ + CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); + + /* Sleep mode status */ + if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK) + { + /* Sleep mode not entered */ + sleepstatus = CAN_Sleep_Ok; + } + /* return sleep mode status */ + return (uint8_t)sleepstatus; +} + +/** + * @brief Wakes the CAN up. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval status: CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed in an + * other case. + */ +uint8_t CAN_WakeUp(CAN_TypeDef* CANx) +{ + uint32_t wait_slak = SLAK_TIMEOUT; + uint8_t wakeupstatus = CAN_WakeUp_Failed; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Wake up request */ + CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP; + + /* Sleep mode status */ + while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00)) + { + wait_slak--; + } + if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK) + { + /* wake up done : Sleep mode exited */ + wakeupstatus = CAN_WakeUp_Ok; + } + /* return wakeup status */ + return (uint8_t)wakeupstatus; +} + + +/** + * @brief Returns the CANx's last error code (LEC). + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval CAN_ErrorCode: specifies the Error code : + * - CAN_ERRORCODE_NoErr No Error + * - CAN_ERRORCODE_StuffErr Stuff Error + * - CAN_ERRORCODE_FormErr Form Error + * - CAN_ERRORCODE_ACKErr Acknowledgment Error + * - CAN_ERRORCODE_BitRecessiveErr Bit Recessive Error + * - CAN_ERRORCODE_BitDominantErr Bit Dominant Error + * - CAN_ERRORCODE_CRCErr CRC Error + * - CAN_ERRORCODE_SoftwareSetErr Software Set Error + */ + +uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx) +{ + uint8_t errorcode=0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Get the error code*/ + errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC); + + /* Return the error code*/ + return errorcode; +} +/** + * @brief Returns the CANx Receive Error Counter (REC). + * @note In case of an error during reception, this counter is incremented + * by 1 or by 8 depending on the error condition as defined by the CAN + * standard. After every successful reception, the counter is + * decremented by 1 or reset to 120 if its value was higher than 128. + * When the counter value exceeds 127, the CAN controller enters the + * error passive state. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval CAN Receive Error Counter. + */ +uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx) +{ + uint8_t counter=0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Get the Receive Error Counter*/ + counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24); + + /* Return the Receive Error Counter*/ + return counter; +} + + +/** + * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC). + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval LSB of the 9-bit CAN Transmit Error Counter. + */ +uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx) +{ + uint8_t counter=0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ + counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16); + + /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ + return counter; +} + + +/** + * @brief Enables or disables the specified CANx interrupts. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled. + * This parameter can be: + * - CAN_IT_TME, + * - CAN_IT_FMP0, + * - CAN_IT_FF0, + * - CAN_IT_FOV0, + * - CAN_IT_FMP1, + * - CAN_IT_FF1, + * - CAN_IT_FOV1, + * - CAN_IT_EWG, + * - CAN_IT_EPV, + * - CAN_IT_LEC, + * - CAN_IT_ERR, + * - CAN_IT_WKU or + * - CAN_IT_SLK. + * @param NewState: new state of the CAN interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_IT(CAN_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected CANx interrupt */ + CANx->IER |= CAN_IT; + } + else + { + /* Disable the selected CANx interrupt */ + CANx->IER &= ~CAN_IT; + } +} +/** + * @brief Checks whether the specified CAN flag is set or not. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_FLAG: specifies the flag to check. + * This parameter can be one of the following flags: + * - CAN_FLAG_EWG + * - CAN_FLAG_EPV + * - CAN_FLAG_BOF + * - CAN_FLAG_RQCP0 + * - CAN_FLAG_RQCP1 + * - CAN_FLAG_RQCP2 + * - CAN_FLAG_FMP1 + * - CAN_FLAG_FF1 + * - CAN_FLAG_FOV1 + * - CAN_FLAG_FMP0 + * - CAN_FLAG_FF0 + * - CAN_FLAG_FOV0 + * - CAN_FLAG_WKU + * - CAN_FLAG_SLAK + * - CAN_FLAG_LEC + * @retval The new state of CAN_FLAG (SET or RESET). + */ +FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG) +{ + FlagStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_GET_FLAG(CAN_FLAG)); + + + if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */ + { + /* Check the status of the specified CAN flag */ + if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + /* Return the CAN_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the CAN's pending flags. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_FLAG: specifies the flag to clear. + * This parameter can be one of the following flags: + * - CAN_FLAG_RQCP0 + * - CAN_FLAG_RQCP1 + * - CAN_FLAG_RQCP2 + * - CAN_FLAG_FF1 + * - CAN_FLAG_FOV1 + * - CAN_FLAG_FF0 + * - CAN_FLAG_FOV0 + * - CAN_FLAG_WKU + * - CAN_FLAG_SLAK + * - CAN_FLAG_LEC + * @retval None. + */ +void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG) +{ + uint32_t flagtmp=0; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG)); + + if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */ + { + /* Clear the selected CAN flags */ + CANx->ESR = (uint32_t)RESET; + } + else /* MSR or TSR or RF0R or RF1R */ + { + flagtmp = CAN_FLAG & 0x000FFFFF; + + if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET) + { + /* Receive Flags */ + CANx->RF0R = (uint32_t)(flagtmp); + } + else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET) + { + /* Receive Flags */ + CANx->RF1R = (uint32_t)(flagtmp); + } + else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET) + { + /* Transmit Flags */ + CANx->TSR = (uint32_t)(flagtmp); + } + else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */ + { + /* Operating mode Flags */ + CANx->MSR = (uint32_t)(flagtmp); + } + } +} + +/** + * @brief Checks whether the specified CANx interrupt has occurred or not. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_IT: specifies the CAN interrupt source to check. + * This parameter can be one of the following flags: + * - CAN_IT_TME + * - CAN_IT_FMP0 + * - CAN_IT_FF0 + * - CAN_IT_FOV0 + * - CAN_IT_FMP1 + * - CAN_IT_FF1 + * - CAN_IT_FOV1 + * - CAN_IT_WKU + * - CAN_IT_SLK + * - CAN_IT_EWG + * - CAN_IT_EPV + * - CAN_IT_BOF + * - CAN_IT_LEC + * - CAN_IT_ERR + * @retval The current state of CAN_IT (SET or RESET). + */ +ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT) +{ + ITStatus itstatus = RESET; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_IT(CAN_IT)); + + /* check the enable interrupt bit */ + if((CANx->IER & CAN_IT) != RESET) + { + /* in case the Interrupt is enabled, .... */ + switch (CAN_IT) + { + case CAN_IT_TME: + /* Check CAN_TSR_RQCPx bits */ + itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2); + break; + case CAN_IT_FMP0: + /* Check CAN_RF0R_FMP0 bit */ + itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0); + break; + case CAN_IT_FF0: + /* Check CAN_RF0R_FULL0 bit */ + itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0); + break; + case CAN_IT_FOV0: + /* Check CAN_RF0R_FOVR0 bit */ + itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0); + break; + case CAN_IT_FMP1: + /* Check CAN_RF1R_FMP1 bit */ + itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1); + break; + case CAN_IT_FF1: + /* Check CAN_RF1R_FULL1 bit */ + itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1); + break; + case CAN_IT_FOV1: + /* Check CAN_RF1R_FOVR1 bit */ + itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1); + break; + case CAN_IT_WKU: + /* Check CAN_MSR_WKUI bit */ + itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI); + break; + case CAN_IT_SLK: + /* Check CAN_MSR_SLAKI bit */ + itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI); + break; + case CAN_IT_EWG: + /* Check CAN_ESR_EWGF bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF); + break; + case CAN_IT_EPV: + /* Check CAN_ESR_EPVF bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF); + break; + case CAN_IT_BOF: + /* Check CAN_ESR_BOFF bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF); + break; + case CAN_IT_LEC: + /* Check CAN_ESR_LEC bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC); + break; + case CAN_IT_ERR: + /* Check CAN_MSR_ERRI bit */ + itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI); + break; + default : + /* in case of error, return RESET */ + itstatus = RESET; + break; + } + } + else + { + /* in case the Interrupt is not enabled, return RESET */ + itstatus = RESET; + } + + /* Return the CAN_IT status */ + return itstatus; +} + +/** + * @brief Clears the CANx's interrupt pending bits. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_IT: specifies the interrupt pending bit to clear. + * - CAN_IT_TME + * - CAN_IT_FF0 + * - CAN_IT_FOV0 + * - CAN_IT_FF1 + * - CAN_IT_FOV1 + * - CAN_IT_WKU + * - CAN_IT_SLK + * - CAN_IT_EWG + * - CAN_IT_EPV + * - CAN_IT_BOF + * - CAN_IT_LEC + * - CAN_IT_ERR + * @retval None. + */ +void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_CLEAR_IT(CAN_IT)); + + switch (CAN_IT) + { + case CAN_IT_TME: + /* Clear CAN_TSR_RQCPx (rc_w1)*/ + CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2; + break; + case CAN_IT_FF0: + /* Clear CAN_RF0R_FULL0 (rc_w1)*/ + CANx->RF0R = CAN_RF0R_FULL0; + break; + case CAN_IT_FOV0: + /* Clear CAN_RF0R_FOVR0 (rc_w1)*/ + CANx->RF0R = CAN_RF0R_FOVR0; + break; + case CAN_IT_FF1: + /* Clear CAN_RF1R_FULL1 (rc_w1)*/ + CANx->RF1R = CAN_RF1R_FULL1; + break; + case CAN_IT_FOV1: + /* Clear CAN_RF1R_FOVR1 (rc_w1)*/ + CANx->RF1R = CAN_RF1R_FOVR1; + break; + case CAN_IT_WKU: + /* Clear CAN_MSR_WKUI (rc_w1)*/ + CANx->MSR = CAN_MSR_WKUI; + break; + case CAN_IT_SLK: + /* Clear CAN_MSR_SLAKI (rc_w1)*/ + CANx->MSR = CAN_MSR_SLAKI; + break; + case CAN_IT_EWG: + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : the corresponding Flag is cleared by hardware depending + of the CAN Bus status*/ + break; + case CAN_IT_EPV: + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : the corresponding Flag is cleared by hardware depending + of the CAN Bus status*/ + break; + case CAN_IT_BOF: + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : the corresponding Flag is cleared by hardware depending + of the CAN Bus status*/ + break; + case CAN_IT_LEC: + /* Clear LEC bits */ + CANx->ESR = RESET; + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + break; + case CAN_IT_ERR: + /*Clear LEC bits */ + CANx->ESR = RESET; + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending + of the CAN Bus status*/ + break; + default : + break; + } +} + +/** + * @brief Checks whether the CAN interrupt has occurred or not. + * @param CAN_Reg: specifies the CAN interrupt register to check. + * @param It_Bit: specifies the interrupt source bit to check. + * @retval The new state of the CAN Interrupt (SET or RESET). + */ +static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit) +{ + ITStatus pendingbitstatus = RESET; + + if ((CAN_Reg & It_Bit) != (uint32_t)RESET) + { + /* CAN_IT is set */ + pendingbitstatus = SET; + } + else + { + /* CAN_IT is reset */ + pendingbitstatus = RESET; + } + return pendingbitstatus; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c new file mode 100644 index 00000000..4dc615f0 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c @@ -0,0 +1,433 @@ +/** + ****************************************************************************** + * @file stm32f10x_cec.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the CEC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_cec.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup CEC + * @brief CEC driver modules + * @{ + */ + +/** @defgroup CEC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Defines + * @{ + */ + +/* ------------ CEC registers bit address in the alias region ----------- */ +#define CEC_OFFSET (CEC_BASE - PERIPH_BASE) + +/* --- CFGR Register ---*/ + +/* Alias word address of PE bit */ +#define CFGR_OFFSET (CEC_OFFSET + 0x00) +#define PE_BitNumber 0x00 +#define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4)) + +/* Alias word address of IE bit */ +#define IE_BitNumber 0x01 +#define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of TSOM bit */ +#define CSR_OFFSET (CEC_OFFSET + 0x10) +#define TSOM_BitNumber 0x00 +#define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4)) + +/* Alias word address of TEOM bit */ +#define TEOM_BitNumber 0x01 +#define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4)) + +#define CFGR_CLEAR_Mask (uint8_t)(0xF3) /* CFGR register Mask */ +#define FLAG_Mask ((uint32_t)0x00FFFFFF) /* CEC FLAG mask */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Macros + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Variables + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the CEC peripheral registers to their default reset + * values. + * @param None + * @retval None + */ +void CEC_DeInit(void) +{ + /* Enable CEC reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE); + /* Release CEC from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE); +} + + +/** + * @brief Initializes the CEC peripheral according to the specified + * parameters in the CEC_InitStruct. + * @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that + * contains the configuration information for the specified + * CEC peripheral. + * @retval None + */ +void CEC_Init(CEC_InitTypeDef* CEC_InitStruct) +{ + uint16_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(CEC_InitStruct->CEC_BitTimingMode)); + assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(CEC_InitStruct->CEC_BitPeriodMode)); + + /*---------------------------- CEC CFGR Configuration -----------------*/ + /* Get the CEC CFGR value */ + tmpreg = CEC->CFGR; + + /* Clear BTEM and BPEM bits */ + tmpreg &= CFGR_CLEAR_Mask; + + /* Configure CEC: Bit Timing Error and Bit Period Error */ + tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode); + + /* Write to CEC CFGR register*/ + CEC->CFGR = tmpreg; + +} + +/** + * @brief Enables or disables the specified CEC peripheral. + * @param NewState: new state of the CEC peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void CEC_Cmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CFGR_PE_BB = (uint32_t)NewState; + + if(NewState == DISABLE) + { + /* Wait until the PE bit is cleared by hardware (Idle Line detected) */ + while((CEC->CFGR & CEC_CFGR_PE) != (uint32_t)RESET) + { + } + } +} + +/** + * @brief Enables or disables the CEC interrupt. + * @param NewState: new state of the CEC interrupt. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void CEC_ITConfig(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CFGR_IE_BB = (uint32_t)NewState; +} + +/** + * @brief Defines the Own Address of the CEC device. + * @param CEC_OwnAddress: The CEC own address + * @retval None + */ +void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress) +{ + /* Check the parameters */ + assert_param(IS_CEC_ADDRESS(CEC_OwnAddress)); + + /* Set the CEC own address */ + CEC->OAR = CEC_OwnAddress; +} + +/** + * @brief Sets the CEC prescaler value. + * @param CEC_Prescaler: CEC prescaler new value + * @retval None + */ +void CEC_SetPrescaler(uint16_t CEC_Prescaler) +{ + /* Check the parameters */ + assert_param(IS_CEC_PRESCALER(CEC_Prescaler)); + + /* Set the Prescaler value*/ + CEC->PRES = CEC_Prescaler; +} + +/** + * @brief Transmits single data through the CEC peripheral. + * @param Data: the data to transmit. + * @retval None + */ +void CEC_SendDataByte(uint8_t Data) +{ + /* Transmit Data */ + CEC->TXD = Data ; +} + + +/** + * @brief Returns the most recent received data by the CEC peripheral. + * @param None + * @retval The received data. + */ +uint8_t CEC_ReceiveDataByte(void) +{ + /* Receive Data */ + return (uint8_t)(CEC->RXD); +} + +/** + * @brief Starts a new message. + * @param None + * @retval None + */ +void CEC_StartOfMessage(void) +{ + /* Starts of new message */ + *(__IO uint32_t *) CSR_TSOM_BB = (uint32_t)0x1; +} + +/** + * @brief Transmits message with or without an EOM bit. + * @param NewState: new state of the CEC Tx End Of Message. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void CEC_EndOfMessageCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + /* The data byte will be transmitted with or without an EOM bit*/ + *(__IO uint32_t *) CSR_TEOM_BB = (uint32_t)NewState; +} + +/** + * @brief Gets the CEC flag status + * @param CEC_FLAG: specifies the CEC flag to check. + * This parameter can be one of the following values: + * @arg CEC_FLAG_BTE: Bit Timing Error + * @arg CEC_FLAG_BPE: Bit Period Error + * @arg CEC_FLAG_RBTFE: Rx Block Transfer Finished Error + * @arg CEC_FLAG_SBE: Start Bit Error + * @arg CEC_FLAG_ACKE: Block Acknowledge Error + * @arg CEC_FLAG_LINE: Line Error + * @arg CEC_FLAG_TBTFE: Tx Block Transfer Finished Error + * @arg CEC_FLAG_TEOM: Tx End Of Message + * @arg CEC_FLAG_TERR: Tx Error + * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished + * @arg CEC_FLAG_RSOM: Rx Start Of Message + * @arg CEC_FLAG_REOM: Rx End Of Message + * @arg CEC_FLAG_RERR: Rx Error + * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished + * @retval The new state of CEC_FLAG (SET or RESET) + */ +FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t cecreg = 0, cecbase = 0; + + /* Check the parameters */ + assert_param(IS_CEC_GET_FLAG(CEC_FLAG)); + + /* Get the CEC peripheral base address */ + cecbase = (uint32_t)(CEC_BASE); + + /* Read flag register index */ + cecreg = CEC_FLAG >> 28; + + /* Get bit[23:0] of the flag */ + CEC_FLAG &= FLAG_Mask; + + if(cecreg != 0) + { + /* Flag in CEC ESR Register */ + CEC_FLAG = (uint32_t)(CEC_FLAG >> 16); + + /* Get the CEC ESR register address */ + cecbase += 0xC; + } + else + { + /* Get the CEC CSR register address */ + cecbase += 0x10; + } + + if(((*(__IO uint32_t *)cecbase) & CEC_FLAG) != (uint32_t)RESET) + { + /* CEC_FLAG is set */ + bitstatus = SET; + } + else + { + /* CEC_FLAG is reset */ + bitstatus = RESET; + } + + /* Return the CEC_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the CEC's pending flags. + * @param CEC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg CEC_FLAG_TERR: Tx Error + * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished + * @arg CEC_FLAG_RSOM: Rx Start Of Message + * @arg CEC_FLAG_REOM: Rx End Of Message + * @arg CEC_FLAG_RERR: Rx Error + * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished + * @retval None + */ +void CEC_ClearFlag(uint32_t CEC_FLAG) +{ + uint32_t tmp = 0x0; + + /* Check the parameters */ + assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG)); + + tmp = CEC->CSR & 0x2; + + /* Clear the selected CEC flags */ + CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_FLAG) & 0xFFFFFFFC) | tmp); +} + +/** + * @brief Checks whether the specified CEC interrupt has occurred or not. + * @param CEC_IT: specifies the CEC interrupt source to check. + * This parameter can be one of the following values: + * @arg CEC_IT_TERR: Tx Error + * @arg CEC_IT_TBTF: Tx Block Transfer Finished + * @arg CEC_IT_RERR: Rx Error + * @arg CEC_IT_RBTF: Rx Block Transfer Finished + * @retval The new state of CEC_IT (SET or RESET). + */ +ITStatus CEC_GetITStatus(uint8_t CEC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_CEC_GET_IT(CEC_IT)); + + /* Get the CEC IT enable bit status */ + enablestatus = (CEC->CFGR & (uint8_t)CEC_CFGR_IE) ; + + /* Check the status of the specified CEC interrupt */ + if (((CEC->CSR & CEC_IT) != (uint32_t)RESET) && enablestatus) + { + /* CEC_IT is set */ + bitstatus = SET; + } + else + { + /* CEC_IT is reset */ + bitstatus = RESET; + } + /* Return the CEC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the CEC's interrupt pending bits. + * @param CEC_IT: specifies the CEC interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg CEC_IT_TERR: Tx Error + * @arg CEC_IT_TBTF: Tx Block Transfer Finished + * @arg CEC_IT_RERR: Rx Error + * @arg CEC_IT_RBTF: Rx Block Transfer Finished + * @retval None + */ +void CEC_ClearITPendingBit(uint16_t CEC_IT) +{ + uint32_t tmp = 0x0; + + /* Check the parameters */ + assert_param(IS_CEC_GET_IT(CEC_IT)); + + tmp = CEC->CSR & 0x2; + + /* Clear the selected CEC interrupt pending bits */ + CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_IT) & 0xFFFFFFFC) | tmp); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c new file mode 100644 index 00000000..65017281 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c @@ -0,0 +1,160 @@ +/** + ****************************************************************************** + * @file stm32f10x_crc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the CRC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_crc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup CRC + * @brief CRC driver modules + * @{ + */ + +/** @defgroup CRC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Defines + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Functions + * @{ + */ + +/** + * @brief Resets the CRC Data register (DR). + * @param None + * @retval None + */ +void CRC_ResetDR(void) +{ + /* Reset CRC generator */ + CRC->CR = CRC_CR_RESET; +} + +/** + * @brief Computes the 32-bit CRC of a given data word(32-bit). + * @param Data: data word(32-bit) to compute its CRC + * @retval 32-bit CRC + */ +uint32_t CRC_CalcCRC(uint32_t Data) +{ + CRC->DR = Data; + + return (CRC->DR); +} + +/** + * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). + * @param pBuffer: pointer to the buffer containing the data to be computed + * @param BufferLength: length of the buffer to be computed + * @retval 32-bit CRC + */ +uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) +{ + uint32_t index = 0; + + for(index = 0; index < BufferLength; index++) + { + CRC->DR = pBuffer[index]; + } + return (CRC->DR); +} + +/** + * @brief Returns the current CRC value. + * @param None + * @retval 32-bit CRC + */ +uint32_t CRC_GetCRC(void) +{ + return (CRC->DR); +} + +/** + * @brief Stores a 8-bit data in the Independent Data(ID) register. + * @param IDValue: 8-bit value to be stored in the ID register + * @retval None + */ +void CRC_SetIDRegister(uint8_t IDValue) +{ + CRC->IDR = IDValue; +} + +/** + * @brief Returns the 8-bit data stored in the Independent Data(ID) register + * @param None + * @retval 8-bit value of the ID register + */ +uint8_t CRC_GetIDRegister(void) +{ + return (CRC->IDR); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c new file mode 100644 index 00000000..1cfc71de --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c @@ -0,0 +1,571 @@ +/** + ****************************************************************************** + * @file stm32f10x_dac.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the DAC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_dac.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup DAC + * @brief DAC driver modules + * @{ + */ + +/** @defgroup DAC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_Defines + * @{ + */ + +/* CR register Mask */ +#define CR_CLEAR_MASK ((uint32_t)0x00000FFE) + +/* DAC Dual Channels SWTRIG masks */ +#define DUAL_SWTRIG_SET ((uint32_t)0x00000003) +#define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC) + +/* DHR registers offsets */ +#define DHR12R1_OFFSET ((uint32_t)0x00000008) +#define DHR12R2_OFFSET ((uint32_t)0x00000014) +#define DHR12RD_OFFSET ((uint32_t)0x00000020) + +/* DOR register offset */ +#define DOR_OFFSET ((uint32_t)0x0000002C) +/** + * @} + */ + +/** @defgroup DAC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the DAC peripheral registers to their default reset values. + * @param None + * @retval None + */ +void DAC_DeInit(void) +{ + /* Enable DAC reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); + /* Release DAC from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); +} + +/** + * @brief Initializes the DAC peripheral according to the specified + * parameters in the DAC_InitStruct. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that + * contains the configuration information for the specified DAC channel. + * @retval None + */ +void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0; + /* Check the DAC parameters */ + assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger)); + assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration)); + assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude)); + assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer)); +/*---------------------------- DAC CR Configuration --------------------------*/ + /* Get the DAC CR value */ + tmpreg1 = DAC->CR; + /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ + tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel); + /* Configure for the selected DAC channel: buffer output, trigger, wave generation, + mask/amplitude for wave generation */ + /* Set TSELx and TENx bits according to DAC_Trigger value */ + /* Set WAVEx bits according to DAC_WaveGeneration value */ + /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */ + /* Set BOFFx bit according to DAC_OutputBuffer value */ + tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration | + DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer); + /* Calculate CR register value depending on DAC_Channel */ + tmpreg1 |= tmpreg2 << DAC_Channel; + /* Write to DAC CR */ + DAC->CR = tmpreg1; +} + +/** + * @brief Fills each DAC_InitStruct member with its default value. + * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct) +{ +/*--------------- Reset DAC init structure parameters values -----------------*/ + /* Initialize the DAC_Trigger member */ + DAC_InitStruct->DAC_Trigger = DAC_Trigger_None; + /* Initialize the DAC_WaveGeneration member */ + DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None; + /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */ + DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0; + /* Initialize the DAC_OutputBuffer member */ + DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable; +} + +/** + * @brief Enables or disables the specified DAC channel. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param NewState: new state of the DAC channel. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected DAC channel */ + DAC->CR |= (DAC_CR_EN1 << DAC_Channel); + } + else + { + /* Disable the selected DAC channel */ + DAC->CR &= ~(DAC_CR_EN1 << DAC_Channel); + } +} +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/** + * @brief Enables or disables the specified DAC interrupts. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled. + * This parameter can be the following values: + * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask + * @param NewState: new state of the specified DAC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_DAC_IT(DAC_IT)); + + if (NewState != DISABLE) + { + /* Enable the selected DAC interrupts */ + DAC->CR |= (DAC_IT << DAC_Channel); + } + else + { + /* Disable the selected DAC interrupts */ + DAC->CR &= (~(uint32_t)(DAC_IT << DAC_Channel)); + } +} +#endif + +/** + * @brief Enables or disables the specified DAC channel DMA request. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param NewState: new state of the selected DAC channel DMA request. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected DAC channel DMA request */ + DAC->CR |= (DAC_CR_DMAEN1 << DAC_Channel); + } + else + { + /* Disable the selected DAC channel DMA request */ + DAC->CR &= ~(DAC_CR_DMAEN1 << DAC_Channel); + } +} + +/** + * @brief Enables or disables the selected DAC channel software trigger. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param NewState: new state of the selected DAC channel software trigger. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable software trigger for the selected DAC channel */ + DAC->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4); + } + else + { + /* Disable software trigger for the selected DAC channel */ + DAC->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4)); + } +} + +/** + * @brief Enables or disables simultaneously the two DAC channels software + * triggers. + * @param NewState: new state of the DAC channels software triggers. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_DualSoftwareTriggerCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable software trigger for both DAC channels */ + DAC->SWTRIGR |= DUAL_SWTRIG_SET ; + } + else + { + /* Disable software trigger for both DAC channels */ + DAC->SWTRIGR &= DUAL_SWTRIG_RESET; + } +} + +/** + * @brief Enables or disables the selected DAC channel wave generation. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_Wave: Specifies the wave type to enable or disable. + * This parameter can be one of the following values: + * @arg DAC_Wave_Noise: noise wave generation + * @arg DAC_Wave_Triangle: triangle wave generation + * @param NewState: new state of the selected DAC channel wave generation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_WAVE(DAC_Wave)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected wave generation for the selected DAC channel */ + DAC->CR |= DAC_Wave << DAC_Channel; + } + else + { + /* Disable the selected wave generation for the selected DAC channel */ + DAC->CR &= ~(DAC_Wave << DAC_Channel); + } +} + +/** + * @brief Set the specified data holding register value for DAC channel1. + * @param DAC_Align: Specifies the data alignment for DAC channel1. + * This parameter can be one of the following values: + * @arg DAC_Align_8b_R: 8bit right data alignment selected + * @arg DAC_Align_12b_L: 12bit left data alignment selected + * @arg DAC_Align_12b_R: 12bit right data alignment selected + * @param Data : Data to be loaded in the selected data holding register. + * @retval None + */ +void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_ALIGN(DAC_Align)); + assert_param(IS_DAC_DATA(Data)); + + tmp = (uint32_t)DAC_BASE; + tmp += DHR12R1_OFFSET + DAC_Align; + + /* Set the DAC channel1 selected data holding register */ + *(__IO uint32_t *) tmp = Data; +} + +/** + * @brief Set the specified data holding register value for DAC channel2. + * @param DAC_Align: Specifies the data alignment for DAC channel2. + * This parameter can be one of the following values: + * @arg DAC_Align_8b_R: 8bit right data alignment selected + * @arg DAC_Align_12b_L: 12bit left data alignment selected + * @arg DAC_Align_12b_R: 12bit right data alignment selected + * @param Data : Data to be loaded in the selected data holding register. + * @retval None + */ +void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_ALIGN(DAC_Align)); + assert_param(IS_DAC_DATA(Data)); + + tmp = (uint32_t)DAC_BASE; + tmp += DHR12R2_OFFSET + DAC_Align; + + /* Set the DAC channel2 selected data holding register */ + *(__IO uint32_t *)tmp = Data; +} + +/** + * @brief Set the specified data holding register value for dual channel + * DAC. + * @param DAC_Align: Specifies the data alignment for dual channel DAC. + * This parameter can be one of the following values: + * @arg DAC_Align_8b_R: 8bit right data alignment selected + * @arg DAC_Align_12b_L: 12bit left data alignment selected + * @arg DAC_Align_12b_R: 12bit right data alignment selected + * @param Data2: Data for DAC Channel2 to be loaded in the selected data + * holding register. + * @param Data1: Data for DAC Channel1 to be loaded in the selected data + * holding register. + * @retval None + */ +void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1) +{ + uint32_t data = 0, tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_ALIGN(DAC_Align)); + assert_param(IS_DAC_DATA(Data1)); + assert_param(IS_DAC_DATA(Data2)); + + /* Calculate and set dual DAC data holding register value */ + if (DAC_Align == DAC_Align_8b_R) + { + data = ((uint32_t)Data2 << 8) | Data1; + } + else + { + data = ((uint32_t)Data2 << 16) | Data1; + } + + tmp = (uint32_t)DAC_BASE; + tmp += DHR12RD_OFFSET + DAC_Align; + + /* Set the dual DAC selected data holding register */ + *(__IO uint32_t *)tmp = data; +} + +/** + * @brief Returns the last data output value of the selected DAC channel. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @retval The selected DAC channel data output value. + */ +uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + + tmp = (uint32_t) DAC_BASE ; + tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2); + + /* Returns the DAC channel data output register value */ + return (uint16_t) (*(__IO uint32_t*) tmp); +} + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/** + * @brief Checks whether the specified DAC flag is set or not. + * @param DAC_Channel: thee selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_FLAG: specifies the flag to check. + * This parameter can be only of the following value: + * @arg DAC_FLAG_DMAUDR: DMA underrun flag + * @retval The new state of DAC_FLAG (SET or RESET). + */ +FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_FLAG(DAC_FLAG)); + + /* Check the status of the specified DAC flag */ + if ((DAC->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET) + { + /* DAC_FLAG is set */ + bitstatus = SET; + } + else + { + /* DAC_FLAG is reset */ + bitstatus = RESET; + } + /* Return the DAC_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the DAC channelx's pending flags. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_FLAG: specifies the flag to clear. + * This parameter can be of the following value: + * @arg DAC_FLAG_DMAUDR: DMA underrun flag + * @retval None + */ +void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_FLAG(DAC_FLAG)); + + /* Clear the selected DAC flags */ + DAC->SR = (DAC_FLAG << DAC_Channel); +} + +/** + * @brief Checks whether the specified DAC interrupt has occurred or not. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_IT: specifies the DAC interrupt source to check. + * This parameter can be the following values: + * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask + * @retval The new state of DAC_IT (SET or RESET). + */ +ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_IT(DAC_IT)); + + /* Get the DAC_IT enable bit status */ + enablestatus = (DAC->CR & (DAC_IT << DAC_Channel)) ; + + /* Check the status of the specified DAC interrupt */ + if (((DAC->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus) + { + /* DAC_IT is set */ + bitstatus = SET; + } + else + { + /* DAC_IT is reset */ + bitstatus = RESET; + } + /* Return the DAC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the DAC channelx's interrupt pending bits. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_IT: specifies the DAC interrupt pending bit to clear. + * This parameter can be the following values: + * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask + * @retval None + */ +void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_IT(DAC_IT)); + + /* Clear the selected DAC interrupt pending bits */ + DAC->SR = (DAC_IT << DAC_Channel); +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c new file mode 100644 index 00000000..96a8fde3 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c @@ -0,0 +1,162 @@ +/** + ****************************************************************************** + * @file stm32f10x_dbgmcu.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the DBGMCU firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_dbgmcu.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup DBGMCU + * @brief DBGMCU driver modules + * @{ + */ + +/** @defgroup DBGMCU_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Defines + * @{ + */ + +#define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Functions + * @{ + */ + +/** + * @brief Returns the device revision identifier. + * @param None + * @retval Device revision identifier + */ +uint32_t DBGMCU_GetREVID(void) +{ + return(DBGMCU->IDCODE >> 16); +} + +/** + * @brief Returns the device identifier. + * @param None + * @retval Device identifier + */ +uint32_t DBGMCU_GetDEVID(void) +{ + return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); +} + +/** + * @brief Configures the specified peripheral and low power mode behavior + * when the MCU under Debug mode. + * @param DBGMCU_Periph: specifies the peripheral and low power mode. + * This parameter can be any combination of the following values: + * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode + * @arg DBGMCU_STOP: Keep debugger connection during STOP mode + * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode + * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted + * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted + * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted + * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted + * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted + * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted + * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted + * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted + * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted + * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted + * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted + * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted + * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted + * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted + * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted + * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted + * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted + * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted + * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted + * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted + * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted + * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted + * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted + * @param NewState: new state of the specified peripheral in Debug mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + DBGMCU->CR |= DBGMCU_Periph; + } + else + { + DBGMCU->CR &= ~DBGMCU_Periph; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c new file mode 100644 index 00000000..bf072df3 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c @@ -0,0 +1,714 @@ +/** + ****************************************************************************** + * @file stm32f10x_dma.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the DMA firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_dma.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup DMA + * @brief DMA driver modules + * @{ + */ + +/** @defgroup DMA_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + +/** @defgroup DMA_Private_Defines + * @{ + */ + + +/* DMA1 Channelx interrupt pending bit masks */ +#define DMA1_Channel1_IT_Mask ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1)) +#define DMA1_Channel2_IT_Mask ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2)) +#define DMA1_Channel3_IT_Mask ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3)) +#define DMA1_Channel4_IT_Mask ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4)) +#define DMA1_Channel5_IT_Mask ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5)) +#define DMA1_Channel6_IT_Mask ((uint32_t)(DMA_ISR_GIF6 | DMA_ISR_TCIF6 | DMA_ISR_HTIF6 | DMA_ISR_TEIF6)) +#define DMA1_Channel7_IT_Mask ((uint32_t)(DMA_ISR_GIF7 | DMA_ISR_TCIF7 | DMA_ISR_HTIF7 | DMA_ISR_TEIF7)) + +/* DMA2 Channelx interrupt pending bit masks */ +#define DMA2_Channel1_IT_Mask ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1)) +#define DMA2_Channel2_IT_Mask ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2)) +#define DMA2_Channel3_IT_Mask ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3)) +#define DMA2_Channel4_IT_Mask ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4)) +#define DMA2_Channel5_IT_Mask ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5)) + +/* DMA2 FLAG mask */ +#define FLAG_Mask ((uint32_t)0x10000000) + +/* DMA registers Masks */ +#define CCR_CLEAR_Mask ((uint32_t)0xFFFF800F) + +/** + * @} + */ + +/** @defgroup DMA_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the DMAy Channelx registers to their default reset + * values. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @retval None + */ +void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + + /* Disable the selected DMAy Channelx */ + DMAy_Channelx->CCR &= (uint16_t)(~DMA_CCR1_EN); + + /* Reset DMAy Channelx control register */ + DMAy_Channelx->CCR = 0; + + /* Reset DMAy Channelx remaining bytes register */ + DMAy_Channelx->CNDTR = 0; + + /* Reset DMAy Channelx peripheral address register */ + DMAy_Channelx->CPAR = 0; + + /* Reset DMAy Channelx memory address register */ + DMAy_Channelx->CMAR = 0; + + if (DMAy_Channelx == DMA1_Channel1) + { + /* Reset interrupt pending bits for DMA1 Channel1 */ + DMA1->IFCR |= DMA1_Channel1_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel2) + { + /* Reset interrupt pending bits for DMA1 Channel2 */ + DMA1->IFCR |= DMA1_Channel2_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel3) + { + /* Reset interrupt pending bits for DMA1 Channel3 */ + DMA1->IFCR |= DMA1_Channel3_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel4) + { + /* Reset interrupt pending bits for DMA1 Channel4 */ + DMA1->IFCR |= DMA1_Channel4_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel5) + { + /* Reset interrupt pending bits for DMA1 Channel5 */ + DMA1->IFCR |= DMA1_Channel5_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel6) + { + /* Reset interrupt pending bits for DMA1 Channel6 */ + DMA1->IFCR |= DMA1_Channel6_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel7) + { + /* Reset interrupt pending bits for DMA1 Channel7 */ + DMA1->IFCR |= DMA1_Channel7_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel1) + { + /* Reset interrupt pending bits for DMA2 Channel1 */ + DMA2->IFCR |= DMA2_Channel1_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel2) + { + /* Reset interrupt pending bits for DMA2 Channel2 */ + DMA2->IFCR |= DMA2_Channel2_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel3) + { + /* Reset interrupt pending bits for DMA2 Channel3 */ + DMA2->IFCR |= DMA2_Channel3_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel4) + { + /* Reset interrupt pending bits for DMA2 Channel4 */ + DMA2->IFCR |= DMA2_Channel4_IT_Mask; + } + else + { + if (DMAy_Channelx == DMA2_Channel5) + { + /* Reset interrupt pending bits for DMA2 Channel5 */ + DMA2->IFCR |= DMA2_Channel5_IT_Mask; + } + } +} + +/** + * @brief Initializes the DMAy Channelx according to the specified + * parameters in the DMA_InitStruct. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param DMA_InitStruct: pointer to a DMA_InitTypeDef structure that + * contains the configuration information for the specified DMA Channel. + * @retval None + */ +void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + assert_param(IS_DMA_DIR(DMA_InitStruct->DMA_DIR)); + assert_param(IS_DMA_BUFFER_SIZE(DMA_InitStruct->DMA_BufferSize)); + assert_param(IS_DMA_PERIPHERAL_INC_STATE(DMA_InitStruct->DMA_PeripheralInc)); + assert_param(IS_DMA_MEMORY_INC_STATE(DMA_InitStruct->DMA_MemoryInc)); + assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(DMA_InitStruct->DMA_PeripheralDataSize)); + assert_param(IS_DMA_MEMORY_DATA_SIZE(DMA_InitStruct->DMA_MemoryDataSize)); + assert_param(IS_DMA_MODE(DMA_InitStruct->DMA_Mode)); + assert_param(IS_DMA_PRIORITY(DMA_InitStruct->DMA_Priority)); + assert_param(IS_DMA_M2M_STATE(DMA_InitStruct->DMA_M2M)); + +/*--------------------------- DMAy Channelx CCR Configuration -----------------*/ + /* Get the DMAy_Channelx CCR value */ + tmpreg = DMAy_Channelx->CCR; + /* Clear MEM2MEM, PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ + tmpreg &= CCR_CLEAR_Mask; + /* Configure DMAy Channelx: data transfer, data size, priority level and mode */ + /* Set DIR bit according to DMA_DIR value */ + /* Set CIRC bit according to DMA_Mode value */ + /* Set PINC bit according to DMA_PeripheralInc value */ + /* Set MINC bit according to DMA_MemoryInc value */ + /* Set PSIZE bits according to DMA_PeripheralDataSize value */ + /* Set MSIZE bits according to DMA_MemoryDataSize value */ + /* Set PL bits according to DMA_Priority value */ + /* Set the MEM2MEM bit according to DMA_M2M value */ + tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode | + DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc | + DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize | + DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M; + + /* Write to DMAy Channelx CCR */ + DMAy_Channelx->CCR = tmpreg; + +/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ + /* Write to DMAy Channelx CNDTR */ + DMAy_Channelx->CNDTR = DMA_InitStruct->DMA_BufferSize; + +/*--------------------------- DMAy Channelx CPAR Configuration ----------------*/ + /* Write to DMAy Channelx CPAR */ + DMAy_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr; + +/*--------------------------- DMAy Channelx CMAR Configuration ----------------*/ + /* Write to DMAy Channelx CMAR */ + DMAy_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr; +} + +/** + * @brief Fills each DMA_InitStruct member with its default value. + * @param DMA_InitStruct : pointer to a DMA_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct) +{ +/*-------------- Reset DMA init structure parameters values ------------------*/ + /* Initialize the DMA_PeripheralBaseAddr member */ + DMA_InitStruct->DMA_PeripheralBaseAddr = 0; + /* Initialize the DMA_MemoryBaseAddr member */ + DMA_InitStruct->DMA_MemoryBaseAddr = 0; + /* Initialize the DMA_DIR member */ + DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC; + /* Initialize the DMA_BufferSize member */ + DMA_InitStruct->DMA_BufferSize = 0; + /* Initialize the DMA_PeripheralInc member */ + DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable; + /* Initialize the DMA_MemoryInc member */ + DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable; + /* Initialize the DMA_PeripheralDataSize member */ + DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; + /* Initialize the DMA_MemoryDataSize member */ + DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + /* Initialize the DMA_Mode member */ + DMA_InitStruct->DMA_Mode = DMA_Mode_Normal; + /* Initialize the DMA_Priority member */ + DMA_InitStruct->DMA_Priority = DMA_Priority_Low; + /* Initialize the DMA_M2M member */ + DMA_InitStruct->DMA_M2M = DMA_M2M_Disable; +} + +/** + * @brief Enables or disables the specified DMAy Channelx. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param NewState: new state of the DMAy Channelx. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected DMAy Channelx */ + DMAy_Channelx->CCR |= DMA_CCR1_EN; + } + else + { + /* Disable the selected DMAy Channelx */ + DMAy_Channelx->CCR &= (uint16_t)(~DMA_CCR1_EN); + } +} + +/** + * @brief Enables or disables the specified DMAy Channelx interrupts. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param DMA_IT: specifies the DMA interrupts sources to be enabled + * or disabled. + * This parameter can be any combination of the following values: + * @arg DMA_IT_TC: Transfer complete interrupt mask + * @arg DMA_IT_HT: Half transfer interrupt mask + * @arg DMA_IT_TE: Transfer error interrupt mask + * @param NewState: new state of the specified DMA interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + assert_param(IS_DMA_CONFIG_IT(DMA_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected DMA interrupts */ + DMAy_Channelx->CCR |= DMA_IT; + } + else + { + /* Disable the selected DMA interrupts */ + DMAy_Channelx->CCR &= ~DMA_IT; + } +} + +/** + * @brief Sets the number of data units in the current DMAy Channelx transfer. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param DataNumber: The number of data units in the current DMAy Channelx + * transfer. + * @note This function can only be used when the DMAy_Channelx is disabled. + * @retval None. + */ +void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + +/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ + /* Write to DMAy Channelx CNDTR */ + DMAy_Channelx->CNDTR = DataNumber; +} + +/** + * @brief Returns the number of remaining data units in the current + * DMAy Channelx transfer. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @retval The number of remaining data units in the current DMAy Channelx + * transfer. + */ +uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + /* Return the number of remaining data units for DMAy Channelx */ + return ((uint16_t)(DMAy_Channelx->CNDTR)); +} + +/** + * @brief Checks whether the specified DMAy Channelx flag is set or not. + * @param DMAy_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. + * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. + * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. + * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. + * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. + * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. + * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. + * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. + * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. + * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. + * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. + * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. + * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. + * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. + * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. + * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. + * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. + * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. + * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. + * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. + * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. + * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. + * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. + * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. + * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. + * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. + * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. + * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. + * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. + * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. + * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. + * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. + * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. + * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. + * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. + * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. + * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. + * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. + * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. + * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. + * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. + * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. + * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. + * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. + * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. + * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. + * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. + * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. + * @retval The new state of DMAy_FLAG (SET or RESET). + */ +FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_DMA_GET_FLAG(DMAy_FLAG)); + + /* Calculate the used DMAy */ + if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) + { + /* Get DMA2 ISR register value */ + tmpreg = DMA2->ISR ; + } + else + { + /* Get DMA1 ISR register value */ + tmpreg = DMA1->ISR ; + } + + /* Check the status of the specified DMAy flag */ + if ((tmpreg & DMAy_FLAG) != (uint32_t)RESET) + { + /* DMAy_FLAG is set */ + bitstatus = SET; + } + else + { + /* DMAy_FLAG is reset */ + bitstatus = RESET; + } + + /* Return the DMAy_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the DMAy Channelx's pending flags. + * @param DMAy_FLAG: specifies the flag to clear. + * This parameter can be any combination (for the same DMA) of the following values: + * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. + * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. + * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. + * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. + * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. + * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. + * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. + * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. + * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. + * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. + * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. + * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. + * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. + * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. + * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. + * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. + * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. + * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. + * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. + * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. + * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. + * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. + * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. + * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. + * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. + * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. + * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. + * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. + * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. + * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. + * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. + * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. + * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. + * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. + * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. + * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. + * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. + * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. + * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. + * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. + * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. + * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. + * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. + * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. + * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. + * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. + * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. + * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. + * @retval None + */ +void DMA_ClearFlag(uint32_t DMAy_FLAG) +{ + /* Check the parameters */ + assert_param(IS_DMA_CLEAR_FLAG(DMAy_FLAG)); + + /* Calculate the used DMAy */ + if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) + { + /* Clear the selected DMAy flags */ + DMA2->IFCR = DMAy_FLAG; + } + else + { + /* Clear the selected DMAy flags */ + DMA1->IFCR = DMAy_FLAG; + } +} + +/** + * @brief Checks whether the specified DMAy Channelx interrupt has occurred or not. + * @param DMAy_IT: specifies the DMAy interrupt source to check. + * This parameter can be one of the following values: + * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. + * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. + * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. + * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. + * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. + * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. + * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. + * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. + * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. + * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. + * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. + * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. + * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. + * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. + * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. + * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. + * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. + * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. + * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. + * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. + * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. + * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. + * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. + * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. + * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. + * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. + * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. + * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. + * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. + * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. + * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. + * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. + * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. + * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. + * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. + * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. + * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. + * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. + * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. + * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. + * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. + * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. + * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. + * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. + * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. + * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. + * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. + * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. + * @retval The new state of DMAy_IT (SET or RESET). + */ +ITStatus DMA_GetITStatus(uint32_t DMAy_IT) +{ + ITStatus bitstatus = RESET; + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_DMA_GET_IT(DMAy_IT)); + + /* Calculate the used DMA */ + if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) + { + /* Get DMA2 ISR register value */ + tmpreg = DMA2->ISR; + } + else + { + /* Get DMA1 ISR register value */ + tmpreg = DMA1->ISR; + } + + /* Check the status of the specified DMAy interrupt */ + if ((tmpreg & DMAy_IT) != (uint32_t)RESET) + { + /* DMAy_IT is set */ + bitstatus = SET; + } + else + { + /* DMAy_IT is reset */ + bitstatus = RESET; + } + /* Return the DMA_IT status */ + return bitstatus; +} + +/** + * @brief Clears the DMAy Channelx's interrupt pending bits. + * @param DMAy_IT: specifies the DMAy interrupt pending bit to clear. + * This parameter can be any combination (for the same DMA) of the following values: + * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. + * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. + * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. + * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. + * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. + * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. + * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. + * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. + * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. + * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. + * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. + * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. + * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. + * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. + * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. + * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. + * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. + * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. + * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. + * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. + * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. + * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. + * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. + * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. + * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. + * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. + * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. + * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. + * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. + * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. + * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. + * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. + * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. + * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. + * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. + * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. + * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. + * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. + * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. + * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. + * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. + * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. + * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. + * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. + * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. + * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. + * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. + * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. + * @retval None + */ +void DMA_ClearITPendingBit(uint32_t DMAy_IT) +{ + /* Check the parameters */ + assert_param(IS_DMA_CLEAR_IT(DMAy_IT)); + + /* Calculate the used DMAy */ + if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) + { + /* Clear the selected DMAy interrupt pending bits */ + DMA2->IFCR = DMAy_IT; + } + else + { + /* Clear the selected DMAy interrupt pending bits */ + DMA1->IFCR = DMAy_IT; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c new file mode 100644 index 00000000..b6290d58 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c @@ -0,0 +1,269 @@ +/** + ****************************************************************************** + * @file stm32f10x_exti.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the EXTI firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_exti.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup EXTI + * @brief EXTI driver modules + * @{ + */ + +/** @defgroup EXTI_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Defines + * @{ + */ + +#define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the EXTI peripheral registers to their default reset values. + * @param None + * @retval None + */ +void EXTI_DeInit(void) +{ + EXTI->IMR = 0x00000000; + EXTI->EMR = 0x00000000; + EXTI->RTSR = 0x00000000; + EXTI->FTSR = 0x00000000; + EXTI->PR = 0x000FFFFF; +} + +/** + * @brief Initializes the EXTI peripheral according to the specified + * parameters in the EXTI_InitStruct. + * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure + * that contains the configuration information for the EXTI peripheral. + * @retval None + */ +void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) +{ + uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); + assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); + assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); + assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); + + tmp = (uint32_t)EXTI_BASE; + + if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) + { + /* Clear EXTI line configuration */ + EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; + EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; + + tmp += EXTI_InitStruct->EXTI_Mode; + + *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; + + /* Clear Rising Falling edge configuration */ + EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; + EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; + + /* Select the trigger for the selected external interrupts */ + if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) + { + /* Rising Falling edge */ + EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; + EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; + } + else + { + tmp = (uint32_t)EXTI_BASE; + tmp += EXTI_InitStruct->EXTI_Trigger; + + *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; + } + } + else + { + tmp += EXTI_InitStruct->EXTI_Mode; + + /* Disable the selected external lines */ + *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; + } +} + +/** + * @brief Fills each EXTI_InitStruct member with its reset value. + * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) +{ + EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; + EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; + EXTI_InitStruct->EXTI_LineCmd = DISABLE; +} + +/** + * @brief Generates a Software interrupt. + * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. + * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * @retval None + */ +void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) +{ + /* Check the parameters */ + assert_param(IS_EXTI_LINE(EXTI_Line)); + + EXTI->SWIER |= EXTI_Line; +} + +/** + * @brief Checks whether the specified EXTI line flag is set or not. + * @param EXTI_Line: specifies the EXTI line flag to check. + * This parameter can be: + * @arg EXTI_Linex: External interrupt line x where x(0..19) + * @retval The new state of EXTI_Line (SET or RESET). + */ +FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_GET_EXTI_LINE(EXTI_Line)); + + if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the EXTI's line pending flags. + * @param EXTI_Line: specifies the EXTI lines flags to clear. + * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * @retval None + */ +void EXTI_ClearFlag(uint32_t EXTI_Line) +{ + /* Check the parameters */ + assert_param(IS_EXTI_LINE(EXTI_Line)); + + EXTI->PR = EXTI_Line; +} + +/** + * @brief Checks whether the specified EXTI line is asserted or not. + * @param EXTI_Line: specifies the EXTI line to check. + * This parameter can be: + * @arg EXTI_Linex: External interrupt line x where x(0..19) + * @retval The new state of EXTI_Line (SET or RESET). + */ +ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + /* Check the parameters */ + assert_param(IS_GET_EXTI_LINE(EXTI_Line)); + + enablestatus = EXTI->IMR & EXTI_Line; + if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the EXTI's line pending bits. + * @param EXTI_Line: specifies the EXTI lines to clear. + * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * @retval None + */ +void EXTI_ClearITPendingBit(uint32_t EXTI_Line) +{ + /* Check the parameters */ + assert_param(IS_EXTI_LINE(EXTI_Line)); + + EXTI->PR = EXTI_Line; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c new file mode 100644 index 00000000..cdff9e9b --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c @@ -0,0 +1,1684 @@ +/** + ****************************************************************************** + * @file stm32f10x_flash.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the FLASH firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_flash.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup FLASH + * @brief FLASH driver modules + * @{ + */ + +/** @defgroup FLASH_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_Defines + * @{ + */ + +/* Flash Access Control Register bits */ +#define ACR_LATENCY_Mask ((uint32_t)0x00000038) +#define ACR_HLFCYA_Mask ((uint32_t)0xFFFFFFF7) +#define ACR_PRFTBE_Mask ((uint32_t)0xFFFFFFEF) + +/* Flash Access Control Register bits */ +#define ACR_PRFTBS_Mask ((uint32_t)0x00000020) + +/* Flash Control Register bits */ +#define CR_PG_Set ((uint32_t)0x00000001) +#define CR_PG_Reset ((uint32_t)0x00001FFE) +#define CR_PER_Set ((uint32_t)0x00000002) +#define CR_PER_Reset ((uint32_t)0x00001FFD) +#define CR_MER_Set ((uint32_t)0x00000004) +#define CR_MER_Reset ((uint32_t)0x00001FFB) +#define CR_OPTPG_Set ((uint32_t)0x00000010) +#define CR_OPTPG_Reset ((uint32_t)0x00001FEF) +#define CR_OPTER_Set ((uint32_t)0x00000020) +#define CR_OPTER_Reset ((uint32_t)0x00001FDF) +#define CR_STRT_Set ((uint32_t)0x00000040) +#define CR_LOCK_Set ((uint32_t)0x00000080) + +/* FLASH Mask */ +#define RDPRT_Mask ((uint32_t)0x00000002) +#define WRP0_Mask ((uint32_t)0x000000FF) +#define WRP1_Mask ((uint32_t)0x0000FF00) +#define WRP2_Mask ((uint32_t)0x00FF0000) +#define WRP3_Mask ((uint32_t)0xFF000000) +#define OB_USER_BFB2 ((uint16_t)0x0008) + +/* FLASH Keys */ +#define RDP_Key ((uint16_t)0x00A5) +#define FLASH_KEY1 ((uint32_t)0x45670123) +#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) + +/* FLASH BANK address */ +#define FLASH_BANK1_END_ADDRESS ((uint32_t)0x807FFFF) + +/* Delay definition */ +#define EraseTimeout ((uint32_t)0x000B0000) +#define ProgramTimeout ((uint32_t)0x00002000) +/** + * @} + */ + +/** @defgroup FLASH_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_Functions + * @{ + */ + +/** +@code + + This driver provides functions to configure and program the Flash memory of all STM32F10x devices, + including the latest STM32F10x_XL density devices. + + STM32F10x_XL devices feature up to 1 Mbyte with dual bank architecture for read-while-write (RWW) capability: + - bank1: fixed size of 512 Kbytes (256 pages of 2Kbytes each) + - bank2: up to 512 Kbytes (up to 256 pages of 2Kbytes each) + While other STM32F10x devices features only one bank with memory up to 512 Kbytes. + + In version V3.3.0, some functions were updated and new ones were added to support + STM32F10x_XL devices. Thus some functions manages all devices, while other are + dedicated for XL devices only. + + The table below presents the list of available functions depending on the used STM32F10x devices. + + *************************************************** + * Legacy functions used for all STM32F10x devices * + *************************************************** + +----------------------------------------------------------------------------------------------------------------------------------+ + | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | + | | devices | devices | | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_SetLatency | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_HalfCycleAccessCmd | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_PrefetchBufferCmd | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_Unlock | Yes | Yes | - For STM32F10X_XL devices: unlock Bank1 and Bank2. | + | | | | - For other devices: unlock Bank1 and it is equivalent | + | | | | to FLASH_UnlockBank1 function. | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_Lock | Yes | Yes | - For STM32F10X_XL devices: lock Bank1 and Bank2. | + | | | | - For other devices: lock Bank1 and it is equivalent | + | | | | to FLASH_LockBank1 function. | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ErasePage | Yes | Yes | - For STM32F10x_XL devices: erase a page in Bank1 and Bank2 | + | | | | - For other devices: erase a page in Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_EraseAllPages | Yes | Yes | - For STM32F10x_XL devices: erase all pages in Bank1 and Bank2 | + | | | | - For other devices: erase all pages in Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_EraseOptionBytes | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ProgramWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ProgramHalfWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ProgramOptionByteData | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_EnableWriteProtection | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ReadOutProtection | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_UserOptionByteConfig | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetUserOptionByte | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetWriteProtectionOptionByte | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetReadOutProtectionStatus | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetPrefetchBufferStatus | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ITConfig | Yes | Yes | - For STM32F10x_XL devices: enable Bank1 and Bank2's interrupts| + | | | | - For other devices: enable Bank1's interrupts | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetFlagStatus | Yes | Yes | - For STM32F10x_XL devices: return Bank1 and Bank2's flag status| + | | | | - For other devices: return Bank1's flag status | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ClearFlag | Yes | Yes | - For STM32F10x_XL devices: clear Bank1 and Bank2's flag | + | | | | - For other devices: clear Bank1's flag | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetStatus | Yes | Yes | - Return the status of Bank1 (for all devices) | + | | | | equivalent to FLASH_GetBank1Status function | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_WaitForLastOperation | Yes | Yes | - Wait for Bank1 last operation (for all devices) | + | | | | equivalent to: FLASH_WaitForLastBank1Operation function | + +----------------------------------------------------------------------------------------------------------------------------------+ + + ************************************************************************************************************************ + * New functions used for all STM32F10x devices to manage Bank1: * + * - These functions are mainly useful for STM32F10x_XL density devices, to have separate control for Bank1 and bank2 * + * - For other devices, these functions are optional (covered by functions listed above) * + ************************************************************************************************************************ + +----------------------------------------------------------------------------------------------------------------------------------+ + | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | + | | devices | devices | | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_UnlockBank1 | Yes | Yes | - Unlock Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_LockBank1 | Yes | Yes | - Lock Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_EraseAllBank1Pages | Yes | Yes | - Erase all pages in Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_GetBank1Status | Yes | Yes | - Return the status of Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_WaitForLastBank1Operation | Yes | Yes | - Wait for Bank1 last operation | + +----------------------------------------------------------------------------------------------------------------------------------+ + + ***************************************************************************** + * New Functions used only with STM32F10x_XL density devices to manage Bank2 * + ***************************************************************************** + +----------------------------------------------------------------------------------------------------------------------------------+ + | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | + | | devices | devices | | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_UnlockBank2 | Yes | No | - Unlock Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_LockBank2 | Yes | No | - Lock Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_EraseAllBank2Pages | Yes | No | - Erase all pages in Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_GetBank2Status | Yes | No | - Return the status of Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_WaitForLastBank2Operation | Yes | No | - Wait for Bank2 last operation | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_BootConfig | Yes | No | - Configure to boot from Bank1 or Bank2 | + +----------------------------------------------------------------------------------------------------------------------------------+ +@endcode +*/ + + +/** + * @brief Sets the code latency value. + * @note This function can be used for all STM32F10x devices. + * @param FLASH_Latency: specifies the FLASH Latency value. + * This parameter can be one of the following values: + * @arg FLASH_Latency_0: FLASH Zero Latency cycle + * @arg FLASH_Latency_1: FLASH One Latency cycle + * @arg FLASH_Latency_2: FLASH Two Latency cycles + * @retval None + */ +void FLASH_SetLatency(uint32_t FLASH_Latency) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_FLASH_LATENCY(FLASH_Latency)); + + /* Read the ACR register */ + tmpreg = FLASH->ACR; + + /* Sets the Latency value */ + tmpreg &= ACR_LATENCY_Mask; + tmpreg |= FLASH_Latency; + + /* Write the ACR register */ + FLASH->ACR = tmpreg; +} + +/** + * @brief Enables or disables the Half cycle flash access. + * @note This function can be used for all STM32F10x devices. + * @param FLASH_HalfCycleAccess: specifies the FLASH Half cycle Access mode. + * This parameter can be one of the following values: + * @arg FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable + * @arg FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable + * @retval None + */ +void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess) +{ + /* Check the parameters */ + assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess)); + + /* Enable or disable the Half cycle access */ + FLASH->ACR &= ACR_HLFCYA_Mask; + FLASH->ACR |= FLASH_HalfCycleAccess; +} + +/** + * @brief Enables or disables the Prefetch Buffer. + * @note This function can be used for all STM32F10x devices. + * @param FLASH_PrefetchBuffer: specifies the Prefetch buffer status. + * This parameter can be one of the following values: + * @arg FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable + * @arg FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable + * @retval None + */ +void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer) +{ + /* Check the parameters */ + assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer)); + + /* Enable or disable the Prefetch Buffer */ + FLASH->ACR &= ACR_PRFTBE_Mask; + FLASH->ACR |= FLASH_PrefetchBuffer; +} + +/** + * @brief Unlocks the FLASH Program Erase Controller. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function unlocks Bank1 and Bank2. + * - For all other devices it unlocks Bank1 and it is equivalent + * to FLASH_UnlockBank1 function.. + * @param None + * @retval None + */ +void FLASH_Unlock(void) +{ + /* Authorize the FPEC of Bank1 Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; + +#ifdef STM32F10X_XL + /* Authorize the FPEC of Bank2 Access */ + FLASH->KEYR2 = FLASH_KEY1; + FLASH->KEYR2 = FLASH_KEY2; +#endif /* STM32F10X_XL */ +} +/** + * @brief Unlocks the FLASH Bank1 Program Erase Controller. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function unlocks Bank1. + * - For all other devices it unlocks Bank1 and it is + * equivalent to FLASH_Unlock function. + * @param None + * @retval None + */ +void FLASH_UnlockBank1(void) +{ + /* Authorize the FPEC of Bank1 Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; +} + +#ifdef STM32F10X_XL +/** + * @brief Unlocks the FLASH Bank2 Program Erase Controller. + * @note This function can be used only for STM32F10X_XL density devices. + * @param None + * @retval None + */ +void FLASH_UnlockBank2(void) +{ + /* Authorize the FPEC of Bank2 Access */ + FLASH->KEYR2 = FLASH_KEY1; + FLASH->KEYR2 = FLASH_KEY2; + +} +#endif /* STM32F10X_XL */ + +/** + * @brief Locks the FLASH Program Erase Controller. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function Locks Bank1 and Bank2. + * - For all other devices it Locks Bank1 and it is equivalent + * to FLASH_LockBank1 function. + * @param None + * @retval None + */ +void FLASH_Lock(void) +{ + /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */ + FLASH->CR |= CR_LOCK_Set; + +#ifdef STM32F10X_XL + /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */ + FLASH->CR2 |= CR_LOCK_Set; +#endif /* STM32F10X_XL */ +} + +/** + * @brief Locks the FLASH Bank1 Program Erase Controller. + * @note this function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function Locks Bank1. + * - For all other devices it Locks Bank1 and it is equivalent + * to FLASH_Lock function. + * @param None + * @retval None + */ +void FLASH_LockBank1(void) +{ + /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */ + FLASH->CR |= CR_LOCK_Set; +} + +#ifdef STM32F10X_XL +/** + * @brief Locks the FLASH Bank2 Program Erase Controller. + * @note This function can be used only for STM32F10X_XL density devices. + * @param None + * @retval None + */ +void FLASH_LockBank2(void) +{ + /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */ + FLASH->CR2 |= CR_LOCK_Set; +} +#endif /* STM32F10X_XL */ + +/** + * @brief Erases a specified FLASH page. + * @note This function can be used for all STM32F10x devices. + * @param Page_Address: The page address to be erased. + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ErasePage(uint32_t Page_Address) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_FLASH_ADDRESS(Page_Address)); + +#ifdef STM32F10X_XL + if(Page_Address < FLASH_BANK1_END_ADDRESS) + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase the page */ + FLASH->CR|= CR_PER_Set; + FLASH->AR = Page_Address; + FLASH->CR|= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + /* Disable the PER Bit */ + FLASH->CR &= CR_PER_Reset; + } + } + else + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase the page */ + FLASH->CR2|= CR_PER_Set; + FLASH->AR2 = Page_Address; + FLASH->CR2|= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + /* Disable the PER Bit */ + FLASH->CR2 &= CR_PER_Reset; + } + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase the page */ + FLASH->CR|= CR_PER_Set; + FLASH->AR = Page_Address; + FLASH->CR|= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + /* Disable the PER Bit */ + FLASH->CR &= CR_PER_Reset; + } +#endif /* STM32F10X_XL */ + + /* Return the Erase Status */ + return status; +} + +/** + * @brief Erases all FLASH pages. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseAllPages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + +#ifdef STM32F10X_XL + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR |= CR_MER_Set; + FLASH->CR |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR &= CR_MER_Reset; + } + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR2 |= CR_MER_Set; + FLASH->CR2 |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR2 &= CR_MER_Reset; + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR |= CR_MER_Set; + FLASH->CR |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR &= CR_MER_Reset; + } +#endif /* STM32F10X_XL */ + + /* Return the Erase Status */ + return status; +} + +/** + * @brief Erases all Bank1 FLASH pages. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function erases all Bank1 pages. + * - For all other devices it erases all Bank1 pages and it is equivalent + * to FLASH_EraseAllPages function. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseAllBank1Pages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR |= CR_MER_Set; + FLASH->CR |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR &= CR_MER_Reset; + } + /* Return the Erase Status */ + return status; +} + +#ifdef STM32F10X_XL +/** + * @brief Erases all Bank2 FLASH pages. + * @note This function can be used only for STM32F10x_XL density devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseAllBank2Pages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR2 |= CR_MER_Set; + FLASH->CR2 |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR2 &= CR_MER_Reset; + } + /* Return the Erase Status */ + return status; +} +#endif /* STM32F10X_XL */ + +/** + * @brief Erases the FLASH option bytes. + * @note This functions erases all option bytes except the Read protection (RDP). + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseOptionBytes(void) +{ + uint16_t rdptmp = RDP_Key; + + FLASH_Status status = FLASH_COMPLETE; + + /* Get the actual read protection Option Byte value */ + if(FLASH_GetReadOutProtectionStatus() != RESET) + { + rdptmp = 0x00; + } + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + + /* if the previous operation is completed, proceed to erase the option bytes */ + FLASH->CR |= CR_OPTER_Set; + FLASH->CR |= CR_STRT_Set; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the erase operation is completed, disable the OPTER Bit */ + FLASH->CR &= CR_OPTER_Reset; + + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + /* Restore the last read protection Option Byte value */ + OB->RDP = (uint16_t)rdptmp; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + else + { + if (status != FLASH_TIMEOUT) + { + /* Disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + } + /* Return the erase status */ + return status; +} + +/** + * @brief Programs a word at a specified address. + * @note This function can be used for all STM32F10x devices. + * @param Address: specifies the address to be programmed. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_FLASH_ADDRESS(Address)); + +#ifdef STM32F10X_XL + if(Address < FLASH_BANK1_END_ADDRESS - 2) + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + } + } + else if(Address == (FLASH_BANK1_END_ADDRESS - 1)) + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + FLASH->CR2 |= CR_PG_Set; + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + } + else + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR2 |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + } + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + } +#endif /* STM32F10X_XL */ + + /* Return the Program Status */ + return status; +} + +/** + * @brief Programs a half word at a specified address. + * @note This function can be used for all STM32F10x devices. + * @param Address: specifies the address to be programmed. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_FLASH_ADDRESS(Address)); + +#ifdef STM32F10X_XL + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(Address < FLASH_BANK1_END_ADDRESS) + { + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new data */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + } + else + { + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new data */ + FLASH->CR2 |= CR_PG_Set; + + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new data */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } +#endif /* STM32F10X_XL */ + + /* Return the Program Status */ + return status; +} + +/** + * @brief Programs a half word at a specified Option Byte Data address. + * @note This function can be used for all STM32F10x devices. + * @param Address: specifies the address to be programmed. + * This parameter can be 0x1FFFF804 or 0x1FFFF806. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_OB_DATA_ADDRESS(Address)); + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + /* Enables the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + *(__IO uint16_t*)Address = Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the Option Byte Data Program Status */ + return status; +} + +/** + * @brief Write protects the desired pages + * @note This function can be used for all STM32F10x devices. + * @param FLASH_Pages: specifies the address of the pages to be write protected. + * This parameter can be: + * @arg For @b STM32_Low-density_devices: value between FLASH_WRProt_Pages0to3 and FLASH_WRProt_Pages28to31 + * @arg For @b STM32_Medium-density_devices: value between FLASH_WRProt_Pages0to3 + * and FLASH_WRProt_Pages124to127 + * @arg For @b STM32_High-density_devices: value between FLASH_WRProt_Pages0to1 and + * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to255 + * @arg For @b STM32_Connectivity_line_devices: value between FLASH_WRProt_Pages0to1 and + * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to127 + * @arg For @b STM32_XL-density_devices: value between FLASH_WRProt_Pages0to1 and + * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to511 + * @arg FLASH_WRProt_AllPages + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages) +{ + uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF; + + FLASH_Status status = FLASH_COMPLETE; + + /* Check the parameters */ + assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages)); + + FLASH_Pages = (uint32_t)(~FLASH_Pages); + WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask); + WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8); + WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16); + WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24); + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Authorizes the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + FLASH->CR |= CR_OPTPG_Set; + if(WRP0_Data != 0xFF) + { + OB->WRP0 = WRP0_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF)) + { + OB->WRP1 = WRP1_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF)) + { + OB->WRP2 = WRP2_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + + if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF)) + { + OB->WRP3 = WRP3_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the write protection operation Status */ + return status; +} + +/** + * @brief Enables or disables the read out protection. + * @note If the user has already programmed the other option bytes before calling + * this function, he must re-program them since this function erases all option bytes. + * @note This function can be used for all STM32F10x devices. + * @param Newstate: new state of the ReadOut Protection. + * This parameter can be: ENABLE or DISABLE. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* Authorizes the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + FLASH->CR |= CR_OPTER_Set; + FLASH->CR |= CR_STRT_Set; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the erase operation is completed, disable the OPTER Bit */ + FLASH->CR &= CR_OPTER_Reset; + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + if(NewState != DISABLE) + { + OB->RDP = 0x00; + } + else + { + OB->RDP = RDP_Key; + } + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + else + { + if(status != FLASH_TIMEOUT) + { + /* Disable the OPTER Bit */ + FLASH->CR &= CR_OPTER_Reset; + } + } + } + /* Return the protection operation Status */ + return status; +} + +/** + * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. + * @note This function can be used for all STM32F10x devices. + * @param OB_IWDG: Selects the IWDG mode + * This parameter can be one of the following values: + * @arg OB_IWDG_SW: Software IWDG selected + * @arg OB_IWDG_HW: Hardware IWDG selected + * @param OB_STOP: Reset event when entering STOP mode. + * This parameter can be one of the following values: + * @arg OB_STOP_NoRST: No reset generated when entering in STOP + * @arg OB_STOP_RST: Reset generated when entering in STOP + * @param OB_STDBY: Reset event when entering Standby mode. + * This parameter can be one of the following values: + * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY + * @arg OB_STDBY_RST: Reset generated when entering in STANDBY + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check the parameters */ + assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); + assert_param(IS_OB_STOP_SOURCE(OB_STOP)); + assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); + + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + + OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8))); + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the Option Byte program Status */ + return status; +} + +#ifdef STM32F10X_XL +/** + * @brief Configures to boot from Bank1 or Bank2. + * @note This function can be used only for STM32F10x_XL density devices. + * @param FLASH_BOOT: select the FLASH Bank to boot from. + * This parameter can be one of the following values: + * @arg FLASH_BOOT_Bank1: At startup, if boot pins are set in boot from user Flash + * position and this parameter is selected the device will boot from Bank1(Default). + * @arg FLASH_BOOT_Bank2: At startup, if boot pins are set in boot from user Flash + * position and this parameter is selected the device will boot from Bank2 or Bank1, + * depending on the activation of the bank. The active banks are checked in + * the following order: Bank2, followed by Bank1. + * The active bank is recognized by the value programmed at the base address + * of the respective bank (corresponding to the initial stack pointer value + * in the interrupt vector table). + * For more information, please refer to AN2606 from www.st.com. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT) +{ + FLASH_Status status = FLASH_COMPLETE; + assert_param(IS_FLASH_BOOT(FLASH_BOOT)); + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + + if(FLASH_BOOT == FLASH_BOOT_Bank1) + { + OB->USER |= OB_USER_BFB2; + } + else + { + OB->USER &= (uint16_t)(~(uint16_t)(OB_USER_BFB2)); + } + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the Option Byte program Status */ + return status; +} +#endif /* STM32F10X_XL */ + +/** + * @brief Returns the FLASH User Option Bytes values. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1) + * and RST_STDBY(Bit2). + */ +uint32_t FLASH_GetUserOptionByte(void) +{ + /* Return the User Option Byte */ + return (uint32_t)(FLASH->OBR >> 2); +} + +/** + * @brief Returns the FLASH Write Protection Option Bytes Register value. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval The FLASH Write Protection Option Bytes Register value + */ +uint32_t FLASH_GetWriteProtectionOptionByte(void) +{ + /* Return the Flash write protection Register value */ + return (uint32_t)(FLASH->WRPR); +} + +/** + * @brief Checks whether the FLASH Read Out Protection Status is set or not. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH ReadOut Protection Status(SET or RESET) + */ +FlagStatus FLASH_GetReadOutProtectionStatus(void) +{ + FlagStatus readoutstatus = RESET; + if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET) + { + readoutstatus = SET; + } + else + { + readoutstatus = RESET; + } + return readoutstatus; +} + +/** + * @brief Checks whether the FLASH Prefetch Buffer status is set or not. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH Prefetch Buffer Status (SET or RESET). + */ +FlagStatus FLASH_GetPrefetchBufferStatus(void) +{ + FlagStatus bitstatus = RESET; + + if ((FLASH->ACR & ACR_PRFTBS_Mask) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */ + return bitstatus; +} + +/** + * @brief Enables or disables the specified FLASH interrupts. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices, enables or disables the specified FLASH interrupts + for Bank1 and Bank2. + * - For other devices it enables or disables the specified FLASH interrupts for Bank1. + * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg FLASH_IT_ERROR: FLASH Error Interrupt + * @arg FLASH_IT_EOP: FLASH end of operation Interrupt + * @param NewState: new state of the specified Flash interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState) +{ +#ifdef STM32F10X_XL + /* Check the parameters */ + assert_param(IS_FLASH_IT(FLASH_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if((FLASH_IT & 0x80000000) != 0x0) + { + if(NewState != DISABLE) + { + /* Enable the interrupt sources */ + FLASH->CR2 |= (FLASH_IT & 0x7FFFFFFF); + } + else + { + /* Disable the interrupt sources */ + FLASH->CR2 &= ~(uint32_t)(FLASH_IT & 0x7FFFFFFF); + } + } + else + { + if(NewState != DISABLE) + { + /* Enable the interrupt sources */ + FLASH->CR |= FLASH_IT; + } + else + { + /* Disable the interrupt sources */ + FLASH->CR &= ~(uint32_t)FLASH_IT; + } + } +#else + /* Check the parameters */ + assert_param(IS_FLASH_IT(FLASH_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if(NewState != DISABLE) + { + /* Enable the interrupt sources */ + FLASH->CR |= FLASH_IT; + } + else + { + /* Disable the interrupt sources */ + FLASH->CR &= ~(uint32_t)FLASH_IT; + } +#endif /* STM32F10X_XL */ +} + +/** + * @brief Checks whether the specified FLASH flag is set or not. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices, this function checks whether the specified + * Bank1 or Bank2 flag is set or not. + * - For other devices, it checks whether the specified Bank1 flag is + * set or not. + * @param FLASH_FLAG: specifies the FLASH flag to check. + * This parameter can be one of the following values: + * @arg FLASH_FLAG_BSY: FLASH Busy flag + * @arg FLASH_FLAG_PGERR: FLASH Program error flag + * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag + * @arg FLASH_FLAG_EOP: FLASH End of Operation flag + * @arg FLASH_FLAG_OPTERR: FLASH Option Byte error flag + * @retval The new state of FLASH_FLAG (SET or RESET). + */ +FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) +{ + FlagStatus bitstatus = RESET; + +#ifdef STM32F10X_XL + /* Check the parameters */ + assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; + if(FLASH_FLAG == FLASH_FLAG_OPTERR) + { + if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH_FLAG & 0x80000000) != 0x0) + { + if((FLASH->SR2 & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + } +#else + /* Check the parameters */ + assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; + if(FLASH_FLAG == FLASH_FLAG_OPTERR) + { + if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } +#endif /* STM32F10X_XL */ + + /* Return the new state of FLASH_FLAG (SET or RESET) */ + return bitstatus; +} + +/** + * @brief Clears the FLASH's pending flags. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices, this function clears Bank1 or Bank2s pending flags + * - For other devices, it clears Bank1s pending flags. + * @param FLASH_FLAG: specifies the FLASH flags to clear. + * This parameter can be any combination of the following values: + * @arg FLASH_FLAG_PGERR: FLASH Program error flag + * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag + * @arg FLASH_FLAG_EOP: FLASH End of Operation flag + * @retval None + */ +void FLASH_ClearFlag(uint32_t FLASH_FLAG) +{ +#ifdef STM32F10X_XL + /* Check the parameters */ + assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; + + if((FLASH_FLAG & 0x80000000) != 0x0) + { + /* Clear the flags */ + FLASH->SR2 = FLASH_FLAG; + } + else + { + /* Clear the flags */ + FLASH->SR = FLASH_FLAG; + } + +#else + /* Check the parameters */ + assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; + + /* Clear the flags */ + FLASH->SR = FLASH_FLAG; +#endif /* STM32F10X_XL */ +} + +/** + * @brief Returns the FLASH Status. + * @note This function can be used for all STM32F10x devices, it is equivalent + * to FLASH_GetBank1Status function. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetStatus(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->SR & FLASH_FLAG_PGERR) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->SR & FLASH_FLAG_WRPRTERR) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + /* Return the Flash Status */ + return flashstatus; +} + +/** + * @brief Returns the FLASH Bank1 Status. + * @note This function can be used for all STM32F10x devices, it is equivalent + * to FLASH_GetStatus function. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetBank1Status(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->SR & FLASH_FLAG_BANK1_BSY) == FLASH_FLAG_BSY) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->SR & FLASH_FLAG_BANK1_PGERR) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->SR & FLASH_FLAG_BANK1_WRPRTERR) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + /* Return the Flash Status */ + return flashstatus; +} + +#ifdef STM32F10X_XL +/** + * @brief Returns the FLASH Bank2 Status. + * @note This function can be used for STM32F10x_XL density devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetBank2Status(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->SR2 & (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->SR2 & (FLASH_FLAG_BANK2_PGERR & 0x7FFFFFFF)) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->SR2 & (FLASH_FLAG_BANK2_WRPRTERR & 0x7FFFFFFF)) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + /* Return the Flash Status */ + return flashstatus; +} +#endif /* STM32F10X_XL */ +/** + * @brief Waits for a Flash operation to complete or a TIMEOUT to occur. + * @note This function can be used for all STM32F10x devices, + * it is equivalent to FLASH_WaitForLastBank1Operation. + * - For STM32F10X_XL devices this function waits for a Bank1 Flash operation + * to complete or a TIMEOUT to occur. + * - For all other devices it waits for a Flash operation to complete + * or a TIMEOUT to occur. + * @param Timeout: FLASH programming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check for the Flash Status */ + status = FLASH_GetBank1Status(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while((status == FLASH_BUSY) && (Timeout != 0x00)) + { + status = FLASH_GetBank1Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + /* Return the operation status */ + return status; +} + +/** + * @brief Waits for a Flash operation on Bank1 to complete or a TIMEOUT to occur. + * @note This function can be used for all STM32F10x devices, + * it is equivalent to FLASH_WaitForLastOperation. + * @param Timeout: FLASH programming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check for the Flash Status */ + status = FLASH_GetBank1Status(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while((status == FLASH_FLAG_BANK1_BSY) && (Timeout != 0x00)) + { + status = FLASH_GetBank1Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + /* Return the operation status */ + return status; +} + +#ifdef STM32F10X_XL +/** + * @brief Waits for a Flash operation on Bank2 to complete or a TIMEOUT to occur. + * @note This function can be used only for STM32F10x_XL density devices. + * @param Timeout: FLASH programming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check for the Flash Status */ + status = FLASH_GetBank2Status(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while((status == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) && (Timeout != 0x00)) + { + status = FLASH_GetBank2Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + /* Return the operation status */ + return status; +} +#endif /* STM32F10X_XL */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c new file mode 100644 index 00000000..51669ee3 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c @@ -0,0 +1,866 @@ +/** + ****************************************************************************** + * @file stm32f10x_fsmc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the FSMC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_fsmc.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup FSMC + * @brief FSMC driver modules + * @{ + */ + +/** @defgroup FSMC_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + +/** @defgroup FSMC_Private_Defines + * @{ + */ + +/* --------------------- FSMC registers bit mask ---------------------------- */ + +/* FSMC BCRx Mask */ +#define BCR_MBKEN_Set ((uint32_t)0x00000001) +#define BCR_MBKEN_Reset ((uint32_t)0x000FFFFE) +#define BCR_FACCEN_Set ((uint32_t)0x00000040) + +/* FSMC PCRx Mask */ +#define PCR_PBKEN_Set ((uint32_t)0x00000004) +#define PCR_PBKEN_Reset ((uint32_t)0x000FFFFB) +#define PCR_ECCEN_Set ((uint32_t)0x00000040) +#define PCR_ECCEN_Reset ((uint32_t)0x000FFFBF) +#define PCR_MemoryType_NAND ((uint32_t)0x00000008) +/** + * @} + */ + +/** @defgroup FSMC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the FSMC NOR/SRAM Banks registers to their default + * reset values. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 + * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 + * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 + * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 + * @retval None + */ +void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank) +{ + /* Check the parameter */ + assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); + + /* FSMC_Bank1_NORSRAM1 */ + if(FSMC_Bank == FSMC_Bank1_NORSRAM1) + { + FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB; + } + /* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */ + else + { + FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2; + } + FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF; + FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF; +} + +/** + * @brief Deinitializes the FSMC NAND Banks registers to their default reset values. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @retval None + */ +void FSMC_NANDDeInit(uint32_t FSMC_Bank) +{ + /* Check the parameter */ + assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + /* Set the FSMC_Bank2 registers to their reset values */ + FSMC_Bank2->PCR2 = 0x00000018; + FSMC_Bank2->SR2 = 0x00000040; + FSMC_Bank2->PMEM2 = 0xFCFCFCFC; + FSMC_Bank2->PATT2 = 0xFCFCFCFC; + } + /* FSMC_Bank3_NAND */ + else + { + /* Set the FSMC_Bank3 registers to their reset values */ + FSMC_Bank3->PCR3 = 0x00000018; + FSMC_Bank3->SR3 = 0x00000040; + FSMC_Bank3->PMEM3 = 0xFCFCFCFC; + FSMC_Bank3->PATT3 = 0xFCFCFCFC; + } +} + +/** + * @brief Deinitializes the FSMC PCCARD Bank registers to their default reset values. + * @param None + * @retval None + */ +void FSMC_PCCARDDeInit(void) +{ + /* Set the FSMC_Bank4 registers to their reset values */ + FSMC_Bank4->PCR4 = 0x00000018; + FSMC_Bank4->SR4 = 0x00000000; + FSMC_Bank4->PMEM4 = 0xFCFCFCFC; + FSMC_Bank4->PATT4 = 0xFCFCFCFC; + FSMC_Bank4->PIO4 = 0xFCFCFCFC; +} + +/** + * @brief Initializes the FSMC NOR/SRAM Banks according to the specified + * parameters in the FSMC_NORSRAMInitStruct. + * @param FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef + * structure that contains the configuration information for + * the FSMC NOR/SRAM specified Banks. + * @retval None + */ +void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) +{ + /* Check the parameters */ + assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank)); + assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux)); + assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType)); + assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth)); + assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode)); + assert_param(IS_FSMC_ASYNWAIT(FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait)); + assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity)); + assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode)); + assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive)); + assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation)); + assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal)); + assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode)); + assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst)); + assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime)); + assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime)); + assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime)); + assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration)); + assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision)); + assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency)); + assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode)); + + /* Bank1 NOR/SRAM control register configuration */ + FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] = + (uint32_t)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux | + FSMC_NORSRAMInitStruct->FSMC_MemoryType | + FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth | + FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode | + FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait | + FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity | + FSMC_NORSRAMInitStruct->FSMC_WrapMode | + FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive | + FSMC_NORSRAMInitStruct->FSMC_WriteOperation | + FSMC_NORSRAMInitStruct->FSMC_WaitSignal | + FSMC_NORSRAMInitStruct->FSMC_ExtendedMode | + FSMC_NORSRAMInitStruct->FSMC_WriteBurst; + + if(FSMC_NORSRAMInitStruct->FSMC_MemoryType == FSMC_MemoryType_NOR) + { + FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] |= (uint32_t)BCR_FACCEN_Set; + } + + /* Bank1 NOR/SRAM timing register configuration */ + FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank+1] = + (uint32_t)FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime << 4) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime << 8) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration << 16) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision << 20) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency << 24) | + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode; + + + /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ + if(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode == FSMC_ExtendedMode_Enable) + { + assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime)); + assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime)); + assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime)); + assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision)); + assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency)); + assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode)); + FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = + (uint32_t)FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime | + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime << 4 )| + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime << 8) | + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision << 20) | + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency << 24) | + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode; + } + else + { + FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = 0x0FFFFFFF; + } +} + +/** + * @brief Initializes the FSMC NAND Banks according to the specified + * parameters in the FSMC_NANDInitStruct. + * @param FSMC_NANDInitStruct : pointer to a FSMC_NANDInitTypeDef + * structure that contains the configuration information for the FSMC + * NAND specified Banks. + * @retval None + */ +void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) +{ + uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000; + + /* Check the parameters */ + assert_param( IS_FSMC_NAND_BANK(FSMC_NANDInitStruct->FSMC_Bank)); + assert_param( IS_FSMC_WAIT_FEATURE(FSMC_NANDInitStruct->FSMC_Waitfeature)); + assert_param( IS_FSMC_MEMORY_WIDTH(FSMC_NANDInitStruct->FSMC_MemoryDataWidth)); + assert_param( IS_FSMC_ECC_STATE(FSMC_NANDInitStruct->FSMC_ECC)); + assert_param( IS_FSMC_ECCPAGE_SIZE(FSMC_NANDInitStruct->FSMC_ECCPageSize)); + assert_param( IS_FSMC_TCLR_TIME(FSMC_NANDInitStruct->FSMC_TCLRSetupTime)); + assert_param( IS_FSMC_TAR_TIME(FSMC_NANDInitStruct->FSMC_TARSetupTime)); + assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); + assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); + + /* Set the tmppcr value according to FSMC_NANDInitStruct parameters */ + tmppcr = (uint32_t)FSMC_NANDInitStruct->FSMC_Waitfeature | + PCR_MemoryType_NAND | + FSMC_NANDInitStruct->FSMC_MemoryDataWidth | + FSMC_NANDInitStruct->FSMC_ECC | + FSMC_NANDInitStruct->FSMC_ECCPageSize | + (FSMC_NANDInitStruct->FSMC_TCLRSetupTime << 9 )| + (FSMC_NANDInitStruct->FSMC_TARSetupTime << 13); + + /* Set tmppmem value according to FSMC_CommonSpaceTimingStructure parameters */ + tmppmem = (uint32_t)FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | + (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + /* Set tmppatt value according to FSMC_AttributeSpaceTimingStructure parameters */ + tmppatt = (uint32_t)FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | + (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + if(FSMC_NANDInitStruct->FSMC_Bank == FSMC_Bank2_NAND) + { + /* FSMC_Bank2_NAND registers configuration */ + FSMC_Bank2->PCR2 = tmppcr; + FSMC_Bank2->PMEM2 = tmppmem; + FSMC_Bank2->PATT2 = tmppatt; + } + else + { + /* FSMC_Bank3_NAND registers configuration */ + FSMC_Bank3->PCR3 = tmppcr; + FSMC_Bank3->PMEM3 = tmppmem; + FSMC_Bank3->PATT3 = tmppatt; + } +} + +/** + * @brief Initializes the FSMC PCCARD Bank according to the specified + * parameters in the FSMC_PCCARDInitStruct. + * @param FSMC_PCCARDInitStruct : pointer to a FSMC_PCCARDInitTypeDef + * structure that contains the configuration information for the FSMC + * PCCARD Bank. + * @retval None + */ +void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) +{ + /* Check the parameters */ + assert_param(IS_FSMC_WAIT_FEATURE(FSMC_PCCARDInitStruct->FSMC_Waitfeature)); + assert_param(IS_FSMC_TCLR_TIME(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime)); + assert_param(IS_FSMC_TAR_TIME(FSMC_PCCARDInitStruct->FSMC_TARSetupTime)); + + assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); + + assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); + assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime)); + + /* Set the PCR4 register value according to FSMC_PCCARDInitStruct parameters */ + FSMC_Bank4->PCR4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_Waitfeature | + FSMC_MemoryDataWidth_16b | + (FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime << 9) | + (FSMC_PCCARDInitStruct->FSMC_TARSetupTime << 13); + + /* Set PMEM4 register value according to FSMC_CommonSpaceTimingStructure parameters */ + FSMC_Bank4->PMEM4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | + (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + /* Set PATT4 register value according to FSMC_AttributeSpaceTimingStructure parameters */ + FSMC_Bank4->PATT4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | + (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + /* Set PIO4 register value according to FSMC_IOSpaceTimingStructure parameters */ + FSMC_Bank4->PIO4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime | + (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime << 24); +} + +/** + * @brief Fills each FSMC_NORSRAMInitStruct member with its default value. + * @param FSMC_NORSRAMInitStruct: pointer to a FSMC_NORSRAMInitTypeDef + * structure which will be initialized. + * @retval None + */ +void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) +{ + /* Reset NOR/SRAM Init structure parameters values */ + FSMC_NORSRAMInitStruct->FSMC_Bank = FSMC_Bank1_NORSRAM1; + FSMC_NORSRAMInitStruct->FSMC_DataAddressMux = FSMC_DataAddressMux_Enable; + FSMC_NORSRAMInitStruct->FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; + FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStruct->FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStruct->FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStruct->FSMC_WaitSignal = FSMC_WaitSignal_Enable; + FSMC_NORSRAMInitStruct->FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStruct->FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime = 0xFF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime = 0xFF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; +} + +/** + * @brief Fills each FSMC_NANDInitStruct member with its default value. + * @param FSMC_NANDInitStruct: pointer to a FSMC_NANDInitTypeDef + * structure which will be initialized. + * @retval None + */ +void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) +{ + /* Reset NAND Init structure parameters values */ + FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND; + FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; + FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; + FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable; + FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes; + FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0; + FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; +} + +/** + * @brief Fills each FSMC_PCCARDInitStruct member with its default value. + * @param FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef + * structure which will be initialized. + * @retval None + */ +void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) +{ + /* Reset PCCARD Init structure parameters values */ + FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; + FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0; + FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; +} + +/** + * @brief Enables or disables the specified NOR/SRAM Memory Bank. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 + * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 + * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 + * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 + * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState) +{ + assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */ + FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_Set; + } + else + { + /* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */ + FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_Reset; + } +} + +/** + * @brief Enables or disables the specified NAND Memory Bank. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState) +{ + assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected NAND Bank by setting the PBKEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 |= PCR_PBKEN_Set; + } + else + { + FSMC_Bank3->PCR3 |= PCR_PBKEN_Set; + } + } + else + { + /* Disable the selected NAND Bank by clearing the PBKEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 &= PCR_PBKEN_Reset; + } + else + { + FSMC_Bank3->PCR3 &= PCR_PBKEN_Reset; + } + } +} + +/** + * @brief Enables or disables the PCCARD Memory Bank. + * @param NewState: new state of the PCCARD Memory Bank. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_PCCARDCmd(FunctionalState NewState) +{ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the PCCARD Bank by setting the PBKEN bit in the PCR4 register */ + FSMC_Bank4->PCR4 |= PCR_PBKEN_Set; + } + else + { + /* Disable the PCCARD Bank by clearing the PBKEN bit in the PCR4 register */ + FSMC_Bank4->PCR4 &= PCR_PBKEN_Reset; + } +} + +/** + * @brief Enables or disables the FSMC NAND ECC feature. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @param NewState: new state of the FSMC NAND ECC feature. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState) +{ + assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected NAND Bank ECC function by setting the ECCEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 |= PCR_ECCEN_Set; + } + else + { + FSMC_Bank3->PCR3 |= PCR_ECCEN_Set; + } + } + else + { + /* Disable the selected NAND Bank ECC function by clearing the ECCEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 &= PCR_ECCEN_Reset; + } + else + { + FSMC_Bank3->PCR3 &= PCR_ECCEN_Reset; + } + } +} + +/** + * @brief Returns the error correction code register value. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @retval The Error Correction Code (ECC) value. + */ +uint32_t FSMC_GetECC(uint32_t FSMC_Bank) +{ + uint32_t eccval = 0x00000000; + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + /* Get the ECCR2 register value */ + eccval = FSMC_Bank2->ECCR2; + } + else + { + /* Get the ECCR3 register value */ + eccval = FSMC_Bank3->ECCR3; + } + /* Return the error correction code value */ + return(eccval); +} + +/** + * @brief Enables or disables the specified FSMC interrupts. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_IT: specifies the FSMC interrupt sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. + * @arg FSMC_IT_Level: Level edge detection interrupt. + * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. + * @param NewState: new state of the specified FSMC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState) +{ + assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); + assert_param(IS_FSMC_IT(FSMC_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected FSMC_Bank2 interrupts */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->SR2 |= FSMC_IT; + } + /* Enable the selected FSMC_Bank3 interrupts */ + else if (FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 |= FSMC_IT; + } + /* Enable the selected FSMC_Bank4 interrupts */ + else + { + FSMC_Bank4->SR4 |= FSMC_IT; + } + } + else + { + /* Disable the selected FSMC_Bank2 interrupts */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + + FSMC_Bank2->SR2 &= (uint32_t)~FSMC_IT; + } + /* Disable the selected FSMC_Bank3 interrupts */ + else if (FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 &= (uint32_t)~FSMC_IT; + } + /* Disable the selected FSMC_Bank4 interrupts */ + else + { + FSMC_Bank4->SR4 &= (uint32_t)~FSMC_IT; + } + } +} + +/** + * @brief Checks whether the specified FSMC flag is set or not. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. + * @arg FSMC_FLAG_Level: Level detection Flag. + * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. + * @arg FSMC_FLAG_FEMPT: Fifo empty Flag. + * @retval The new state of FSMC_FLAG (SET or RESET). + */ +FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t tmpsr = 0x00000000; + + /* Check the parameters */ + assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); + assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + tmpsr = FSMC_Bank2->SR2; + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + tmpsr = FSMC_Bank3->SR3; + } + /* FSMC_Bank4_PCCARD*/ + else + { + tmpsr = FSMC_Bank4->SR4; + } + + /* Get the flag status */ + if ((tmpsr & FSMC_FLAG) != (uint16_t)RESET ) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the flag status */ + return bitstatus; +} + +/** + * @brief Clears the FSMC's pending flags. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. + * @arg FSMC_FLAG_Level: Level detection Flag. + * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. + * @retval None + */ +void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); + assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ; + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->SR2 &= ~FSMC_FLAG; + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 &= ~FSMC_FLAG; + } + /* FSMC_Bank4_PCCARD*/ + else + { + FSMC_Bank4->SR4 &= ~FSMC_FLAG; + } +} + +/** + * @brief Checks whether the specified FSMC interrupt has occurred or not. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_IT: specifies the FSMC interrupt source to check. + * This parameter can be one of the following values: + * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. + * @arg FSMC_IT_Level: Level edge detection interrupt. + * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. + * @retval The new state of FSMC_IT (SET or RESET). + */ +ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0; + + /* Check the parameters */ + assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); + assert_param(IS_FSMC_GET_IT(FSMC_IT)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + tmpsr = FSMC_Bank2->SR2; + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + tmpsr = FSMC_Bank3->SR3; + } + /* FSMC_Bank4_PCCARD*/ + else + { + tmpsr = FSMC_Bank4->SR4; + } + + itstatus = tmpsr & FSMC_IT; + + itenable = tmpsr & (FSMC_IT >> 3); + if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the FSMC's interrupt pending bits. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_IT: specifies the interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. + * @arg FSMC_IT_Level: Level edge detection interrupt. + * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. + * @retval None + */ +void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT) +{ + /* Check the parameters */ + assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); + assert_param(IS_FSMC_IT(FSMC_IT)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3); + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3); + } + /* FSMC_Bank4_PCCARD*/ + else + { + FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3); + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c new file mode 100644 index 00000000..457ff112 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c @@ -0,0 +1,650 @@ +/** + ****************************************************************************** + * @file stm32f10x_gpio.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the GPIO firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_gpio.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup GPIO + * @brief GPIO driver modules + * @{ + */ + +/** @defgroup GPIO_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_Defines + * @{ + */ + +/* ------------ RCC registers bit address in the alias region ----------------*/ +#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE) + +/* --- EVENTCR Register -----*/ + +/* Alias word address of EVOE bit */ +#define EVCR_OFFSET (AFIO_OFFSET + 0x00) +#define EVOE_BitNumber ((uint8_t)0x07) +#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4)) + + +/* --- MAPR Register ---*/ +/* Alias word address of MII_RMII_SEL bit */ +#define MAPR_OFFSET (AFIO_OFFSET + 0x04) +#define MII_RMII_SEL_BitNumber ((u8)0x17) +#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) + + +#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) +#define LSB_MASK ((uint16_t)0xFFFF) +#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) +#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) +#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) +#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) +/** + * @} + */ + +/** @defgroup GPIO_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the GPIOx peripheral registers to their default reset values. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @retval None + */ +void GPIO_DeInit(GPIO_TypeDef* GPIOx) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + if (GPIOx == GPIOA) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); + } + else if (GPIOx == GPIOB) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); + } + else if (GPIOx == GPIOC) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); + } + else if (GPIOx == GPIOD) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); + } + else if (GPIOx == GPIOE) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); + } + else if (GPIOx == GPIOF) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); + } + else + { + if (GPIOx == GPIOG) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); + } + } +} + +/** + * @brief Deinitializes the Alternate Functions (remap, event control + * and EXTI configuration) registers to their default reset values. + * @param None + * @retval None + */ +void GPIO_AFIODeInit(void) +{ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); +} + +/** + * @brief Initializes the GPIOx peripheral according to the specified + * parameters in the GPIO_InitStruct. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that + * contains the configuration information for the specified GPIO peripheral. + * @retval None + */ +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) +{ + uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; + uint32_t tmpreg = 0x00, pinmask = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); + assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); + +/*---------------------------- GPIO Mode Configuration -----------------------*/ + currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); + if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) + { + /* Check the parameters */ + assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); + /* Output mode */ + currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; + } +/*---------------------------- GPIO CRL Configuration ------------------------*/ + /* Configure the eight low port pins */ + if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) + { + tmpreg = GPIOx->CRL; + for (pinpos = 0x00; pinpos < 0x08; pinpos++) + { + pos = ((uint32_t)0x01) << pinpos; + /* Get the port pins position */ + currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; + if (currentpin == pos) + { + pos = pinpos << 2; + /* Clear the corresponding low control register bits */ + pinmask = ((uint32_t)0x0F) << pos; + tmpreg &= ~pinmask; + /* Write the mode configuration in the corresponding bits */ + tmpreg |= (currentmode << pos); + /* Reset the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) + { + GPIOx->BRR = (((uint32_t)0x01) << pinpos); + } + else + { + /* Set the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) + { + GPIOx->BSRR = (((uint32_t)0x01) << pinpos); + } + } + } + } + GPIOx->CRL = tmpreg; + } +/*---------------------------- GPIO CRH Configuration ------------------------*/ + /* Configure the eight high port pins */ + if (GPIO_InitStruct->GPIO_Pin > 0x00FF) + { + tmpreg = GPIOx->CRH; + for (pinpos = 0x00; pinpos < 0x08; pinpos++) + { + pos = (((uint32_t)0x01) << (pinpos + 0x08)); + /* Get the port pins position */ + currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); + if (currentpin == pos) + { + pos = pinpos << 2; + /* Clear the corresponding high control register bits */ + pinmask = ((uint32_t)0x0F) << pos; + tmpreg &= ~pinmask; + /* Write the mode configuration in the corresponding bits */ + tmpreg |= (currentmode << pos); + /* Reset the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) + { + GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08)); + } + /* Set the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) + { + GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08)); + } + } + } + GPIOx->CRH = tmpreg; + } +} + +/** + * @brief Fills each GPIO_InitStruct member with its default value. + * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) +{ + /* Reset GPIO init structure parameters values */ + GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; + GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; +} + +/** + * @brief Reads the specified input port pin. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to read. + * This parameter can be GPIO_Pin_x where x can be (0..15). + * @retval The input port pin value. + */ +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint8_t bitstatus = 0x00; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); + + if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) + { + bitstatus = (uint8_t)Bit_SET; + } + else + { + bitstatus = (uint8_t)Bit_RESET; + } + return bitstatus; +} + +/** + * @brief Reads the specified GPIO input data port. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @retval GPIO input data port value. + */ +uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + return ((uint16_t)GPIOx->IDR); +} + +/** + * @brief Reads the specified output data port bit. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to read. + * This parameter can be GPIO_Pin_x where x can be (0..15). + * @retval The output port pin value. + */ +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint8_t bitstatus = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); + + if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) + { + bitstatus = (uint8_t)Bit_SET; + } + else + { + bitstatus = (uint8_t)Bit_RESET; + } + return bitstatus; +} + +/** + * @brief Reads the specified GPIO output data port. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @retval GPIO output data port value. + */ +uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + return ((uint16_t)GPIOx->ODR); +} + +/** + * @brief Sets the selected data port bits. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bits to be written. + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * @retval None + */ +void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + GPIOx->BSRR = GPIO_Pin; +} + +/** + * @brief Clears the selected data port bits. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bits to be written. + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * @retval None + */ +void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + GPIOx->BRR = GPIO_Pin; +} + +/** + * @brief Sets or clears the selected data port bit. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to be written. + * This parameter can be one of GPIO_Pin_x where x can be (0..15). + * @param BitVal: specifies the value to be written to the selected bit. + * This parameter can be one of the BitAction enum values: + * @arg Bit_RESET: to clear the port pin + * @arg Bit_SET: to set the port pin + * @retval None + */ +void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); + assert_param(IS_GPIO_BIT_ACTION(BitVal)); + + if (BitVal != Bit_RESET) + { + GPIOx->BSRR = GPIO_Pin; + } + else + { + GPIOx->BRR = GPIO_Pin; + } +} + +/** + * @brief Writes data to the specified GPIO data port. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param PortVal: specifies the value to be written to the port output data register. + * @retval None + */ +void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + GPIOx->ODR = PortVal; +} + +/** + * @brief Locks GPIO Pins configuration registers. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to be written. + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * @retval None + */ +void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint32_t tmp = 0x00010000; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + tmp |= GPIO_Pin; + /* Set LCKK bit */ + GPIOx->LCKR = tmp; + /* Reset LCKK bit */ + GPIOx->LCKR = GPIO_Pin; + /* Set LCKK bit */ + GPIOx->LCKR = tmp; + /* Read LCKK bit*/ + tmp = GPIOx->LCKR; + /* Read LCKK bit*/ + tmp = GPIOx->LCKR; +} + +/** + * @brief Selects the GPIO pin used as Event output. + * @param GPIO_PortSource: selects the GPIO port to be used as source + * for Event output. + * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). + * @param GPIO_PinSource: specifies the pin for the Event output. + * This parameter can be GPIO_PinSourcex where x can be (0..15). + * @retval None + */ +void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) +{ + uint32_t tmpreg = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource)); + assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); + + tmpreg = AFIO->EVCR; + /* Clear the PORT[6:4] and PIN[3:0] bits */ + tmpreg &= EVCR_PORTPINCONFIG_MASK; + tmpreg |= (uint32_t)GPIO_PortSource << 0x04; + tmpreg |= GPIO_PinSource; + AFIO->EVCR = tmpreg; +} + +/** + * @brief Enables or disables the Event Output. + * @param NewState: new state of the Event output. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void GPIO_EventOutputCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState; +} + +/** + * @brief Changes the mapping of the specified pin. + * @param GPIO_Remap: selects the pin to remap. + * This parameter can be one of the following values: + * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping + * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping + * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping + * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping + * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping + * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping + * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping + * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping + * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping + * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping + * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping + * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping + * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping + * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping + * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping + * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping + * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping + * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration + * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping + * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping + * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping + * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping + * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices) + * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices) + * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST + * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled + * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP) + * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) + * When the SPI3/I2S3 is remapped using this function, the SWJ is configured + * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST. + * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected + * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices) + * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to + * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output. + * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) + * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices) + * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices) + * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices) + * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices) + * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) + * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) + * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) + * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) + * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices) + * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, + * only for High density Value line devices) + * @param NewState: new state of the port pin remapping. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) +{ + uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00; + + /* Check the parameters */ + assert_param(IS_GPIO_REMAP(GPIO_Remap)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if((GPIO_Remap & 0x80000000) == 0x80000000) + { + tmpreg = AFIO->MAPR2; + } + else + { + tmpreg = AFIO->MAPR; + } + + tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; + tmp = GPIO_Remap & LSB_MASK; + + if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) + { + tmpreg &= DBGAFR_SWJCFG_MASK; + AFIO->MAPR &= DBGAFR_SWJCFG_MASK; + } + else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) + { + tmp1 = ((uint32_t)0x03) << tmpmask; + tmpreg &= ~tmp1; + tmpreg |= ~DBGAFR_SWJCFG_MASK; + } + else + { + tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); + tmpreg |= ~DBGAFR_SWJCFG_MASK; + } + + if (NewState != DISABLE) + { + tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); + } + + if((GPIO_Remap & 0x80000000) == 0x80000000) + { + AFIO->MAPR2 = tmpreg; + } + else + { + AFIO->MAPR = tmpreg; + } +} + +/** + * @brief Selects the GPIO pin used as EXTI Line. + * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. + * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). + * @param GPIO_PinSource: specifies the EXTI line to be configured. + * This parameter can be GPIO_PinSourcex where x can be (0..15). + * @retval None + */ +void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) +{ + uint32_t tmp = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource)); + assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); + + tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); + AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; + AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); +} + +/** + * @brief Selects the Ethernet media interface. + * @note This function applies only to STM32 Connectivity line devices. + * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode. + * This parameter can be one of the following values: + * @arg GPIO_ETH_MediaInterface_MII: MII mode + * @arg GPIO_ETH_MediaInterface_RMII: RMII mode + * @retval None + */ +void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) +{ + assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); + + /* Configure MII_RMII selection bit */ + *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c new file mode 100644 index 00000000..4ea321c1 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c @@ -0,0 +1,1331 @@ +/** + ****************************************************************************** + * @file stm32f10x_i2c.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the I2C firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_i2c.h" +#include "stm32f10x_rcc.h" + + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup I2C + * @brief I2C driver modules + * @{ + */ + +/** @defgroup I2C_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_Defines + * @{ + */ + +/* I2C SPE mask */ +#define CR1_PE_Set ((uint16_t)0x0001) +#define CR1_PE_Reset ((uint16_t)0xFFFE) + +/* I2C START mask */ +#define CR1_START_Set ((uint16_t)0x0100) +#define CR1_START_Reset ((uint16_t)0xFEFF) + +/* I2C STOP mask */ +#define CR1_STOP_Set ((uint16_t)0x0200) +#define CR1_STOP_Reset ((uint16_t)0xFDFF) + +/* I2C ACK mask */ +#define CR1_ACK_Set ((uint16_t)0x0400) +#define CR1_ACK_Reset ((uint16_t)0xFBFF) + +/* I2C ENGC mask */ +#define CR1_ENGC_Set ((uint16_t)0x0040) +#define CR1_ENGC_Reset ((uint16_t)0xFFBF) + +/* I2C SWRST mask */ +#define CR1_SWRST_Set ((uint16_t)0x8000) +#define CR1_SWRST_Reset ((uint16_t)0x7FFF) + +/* I2C PEC mask */ +#define CR1_PEC_Set ((uint16_t)0x1000) +#define CR1_PEC_Reset ((uint16_t)0xEFFF) + +/* I2C ENPEC mask */ +#define CR1_ENPEC_Set ((uint16_t)0x0020) +#define CR1_ENPEC_Reset ((uint16_t)0xFFDF) + +/* I2C ENARP mask */ +#define CR1_ENARP_Set ((uint16_t)0x0010) +#define CR1_ENARP_Reset ((uint16_t)0xFFEF) + +/* I2C NOSTRETCH mask */ +#define CR1_NOSTRETCH_Set ((uint16_t)0x0080) +#define CR1_NOSTRETCH_Reset ((uint16_t)0xFF7F) + +/* I2C registers Masks */ +#define CR1_CLEAR_Mask ((uint16_t)0xFBF5) + +/* I2C DMAEN mask */ +#define CR2_DMAEN_Set ((uint16_t)0x0800) +#define CR2_DMAEN_Reset ((uint16_t)0xF7FF) + +/* I2C LAST mask */ +#define CR2_LAST_Set ((uint16_t)0x1000) +#define CR2_LAST_Reset ((uint16_t)0xEFFF) + +/* I2C FREQ mask */ +#define CR2_FREQ_Reset ((uint16_t)0xFFC0) + +/* I2C ADD0 mask */ +#define OAR1_ADD0_Set ((uint16_t)0x0001) +#define OAR1_ADD0_Reset ((uint16_t)0xFFFE) + +/* I2C ENDUAL mask */ +#define OAR2_ENDUAL_Set ((uint16_t)0x0001) +#define OAR2_ENDUAL_Reset ((uint16_t)0xFFFE) + +/* I2C ADD2 mask */ +#define OAR2_ADD2_Reset ((uint16_t)0xFF01) + +/* I2C F/S mask */ +#define CCR_FS_Set ((uint16_t)0x8000) + +/* I2C CCR mask */ +#define CCR_CCR_Set ((uint16_t)0x0FFF) + +/* I2C FLAG mask */ +#define FLAG_Mask ((uint32_t)0x00FFFFFF) + +/* I2C Interrupt Enable mask */ +#define ITEN_Mask ((uint32_t)0x07000000) + +/** + * @} + */ + +/** @defgroup I2C_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the I2Cx peripheral registers to their default reset values. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @retval None + */ +void I2C_DeInit(I2C_TypeDef* I2Cx) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + + if (I2Cx == I2C1) + { + /* Enable I2C1 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); + /* Release I2C1 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); + } + else + { + /* Enable I2C2 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); + /* Release I2C2 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); + } +} + +/** + * @brief Initializes the I2Cx peripheral according to the specified + * parameters in the I2C_InitStruct. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that + * contains the configuration information for the specified I2C peripheral. + * @retval None + */ +void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) +{ + uint16_t tmpreg = 0, freqrange = 0; + uint16_t result = 0x04; + uint32_t pclk1 = 8000000; + RCC_ClocksTypeDef rcc_clocks; + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed)); + assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode)); + assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle)); + assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1)); + assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack)); + assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress)); + +/*---------------------------- I2Cx CR2 Configuration ------------------------*/ + /* Get the I2Cx CR2 value */ + tmpreg = I2Cx->CR2; + /* Clear frequency FREQ[5:0] bits */ + tmpreg &= CR2_FREQ_Reset; + /* Get pclk1 frequency value */ + RCC_GetClocksFreq(&rcc_clocks); + pclk1 = rcc_clocks.PCLK1_Frequency; + /* Set frequency bits depending on pclk1 value */ + freqrange = (uint16_t)(pclk1 / 1000000); + tmpreg |= freqrange; + /* Write to I2Cx CR2 */ + I2Cx->CR2 = tmpreg; + +/*---------------------------- I2Cx CCR Configuration ------------------------*/ + /* Disable the selected I2C peripheral to configure TRISE */ + I2Cx->CR1 &= CR1_PE_Reset; + /* Reset tmpreg value */ + /* Clear F/S, DUTY and CCR[11:0] bits */ + tmpreg = 0; + + /* Configure speed in standard mode */ + if (I2C_InitStruct->I2C_ClockSpeed <= 100000) + { + /* Standard mode speed calculate */ + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1)); + /* Test if CCR value is under 0x4*/ + if (result < 0x04) + { + /* Set minimum allowed value */ + result = 0x04; + } + /* Set speed value for standard mode */ + tmpreg |= result; + /* Set Maximum Rise Time for standard mode */ + I2Cx->TRISE = freqrange + 1; + } + /* Configure speed in fast mode */ + else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/ + { + if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2) + { + /* Fast mode speed calculate: Tlow/Thigh = 2 */ + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3)); + } + else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/ + { + /* Fast mode speed calculate: Tlow/Thigh = 16/9 */ + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25)); + /* Set DUTY bit */ + result |= I2C_DutyCycle_16_9; + } + + /* Test if CCR value is under 0x1*/ + if ((result & CCR_CCR_Set) == 0) + { + /* Set minimum allowed value */ + result |= (uint16_t)0x0001; + } + /* Set speed value and set F/S bit for fast mode */ + tmpreg |= (uint16_t)(result | CCR_FS_Set); + /* Set Maximum Rise Time for fast mode */ + I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1); + } + + /* Write to I2Cx CCR */ + I2Cx->CCR = tmpreg; + /* Enable the selected I2C peripheral */ + I2Cx->CR1 |= CR1_PE_Set; + +/*---------------------------- I2Cx CR1 Configuration ------------------------*/ + /* Get the I2Cx CR1 value */ + tmpreg = I2Cx->CR1; + /* Clear ACK, SMBTYPE and SMBUS bits */ + tmpreg &= CR1_CLEAR_Mask; + /* Configure I2Cx: mode and acknowledgement */ + /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */ + /* Set ACK bit according to I2C_Ack value */ + tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack); + /* Write to I2Cx CR1 */ + I2Cx->CR1 = tmpreg; + +/*---------------------------- I2Cx OAR1 Configuration -----------------------*/ + /* Set I2Cx Own Address1 and acknowledged address */ + I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1); +} + +/** + * @brief Fills each I2C_InitStruct member with its default value. + * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized. + * @retval None + */ +void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct) +{ +/*---------------- Reset I2C init structure parameters values ----------------*/ + /* initialize the I2C_ClockSpeed member */ + I2C_InitStruct->I2C_ClockSpeed = 5000; + /* Initialize the I2C_Mode member */ + I2C_InitStruct->I2C_Mode = I2C_Mode_I2C; + /* Initialize the I2C_DutyCycle member */ + I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2; + /* Initialize the I2C_OwnAddress1 member */ + I2C_InitStruct->I2C_OwnAddress1 = 0; + /* Initialize the I2C_Ack member */ + I2C_InitStruct->I2C_Ack = I2C_Ack_Disable; + /* Initialize the I2C_AcknowledgedAddress member */ + I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; +} + +/** + * @brief Enables or disables the specified I2C peripheral. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C peripheral */ + I2Cx->CR1 |= CR1_PE_Set; + } + else + { + /* Disable the selected I2C peripheral */ + I2Cx->CR1 &= CR1_PE_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C DMA requests. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C DMA transfer. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C DMA requests */ + I2Cx->CR2 |= CR2_DMAEN_Set; + } + else + { + /* Disable the selected I2C DMA requests */ + I2Cx->CR2 &= CR2_DMAEN_Reset; + } +} + +/** + * @brief Specifies if the next DMA transfer will be the last one. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C DMA last transfer. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Next DMA transfer is the last transfer */ + I2Cx->CR2 |= CR2_LAST_Set; + } + else + { + /* Next DMA transfer is not the last transfer */ + I2Cx->CR2 &= CR2_LAST_Reset; + } +} + +/** + * @brief Generates I2Cx communication START condition. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C START condition generation. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Generate a START condition */ + I2Cx->CR1 |= CR1_START_Set; + } + else + { + /* Disable the START condition generation */ + I2Cx->CR1 &= CR1_START_Reset; + } +} + +/** + * @brief Generates I2Cx communication STOP condition. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C STOP condition generation. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Generate a STOP condition */ + I2Cx->CR1 |= CR1_STOP_Set; + } + else + { + /* Disable the STOP condition generation */ + I2Cx->CR1 &= CR1_STOP_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C acknowledge feature. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C Acknowledgement. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the acknowledgement */ + I2Cx->CR1 |= CR1_ACK_Set; + } + else + { + /* Disable the acknowledgement */ + I2Cx->CR1 &= CR1_ACK_Reset; + } +} + +/** + * @brief Configures the specified I2C own address2. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param Address: specifies the 7bit I2C own address2. + * @retval None. + */ +void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) +{ + uint16_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + + /* Get the old register value */ + tmpreg = I2Cx->OAR2; + + /* Reset I2Cx Own address2 bit [7:1] */ + tmpreg &= OAR2_ADD2_Reset; + + /* Set I2Cx Own address2 */ + tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE); + + /* Store the new register value */ + I2Cx->OAR2 = tmpreg; +} + +/** + * @brief Enables or disables the specified I2C dual addressing mode. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C dual addressing mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable dual addressing mode */ + I2Cx->OAR2 |= OAR2_ENDUAL_Set; + } + else + { + /* Disable dual addressing mode */ + I2Cx->OAR2 &= OAR2_ENDUAL_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C general call feature. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C General call. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable generall call */ + I2Cx->CR1 |= CR1_ENGC_Set; + } + else + { + /* Disable generall call */ + I2Cx->CR1 &= CR1_ENGC_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C interrupts. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg I2C_IT_BUF: Buffer interrupt mask + * @arg I2C_IT_EVT: Event interrupt mask + * @arg I2C_IT_ERR: Error interrupt mask + * @param NewState: new state of the specified I2C interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_I2C_CONFIG_IT(I2C_IT)); + + if (NewState != DISABLE) + { + /* Enable the selected I2C interrupts */ + I2Cx->CR2 |= I2C_IT; + } + else + { + /* Disable the selected I2C interrupts */ + I2Cx->CR2 &= (uint16_t)~I2C_IT; + } +} + +/** + * @brief Sends a data byte through the I2Cx peripheral. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param Data: Byte to be transmitted.. + * @retval None + */ +void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + /* Write in the DR register the data to be sent */ + I2Cx->DR = Data; +} + +/** + * @brief Returns the most recent received data by the I2Cx peripheral. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @retval The value of the received data. + */ +uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + /* Return the data in the DR register */ + return (uint8_t)I2Cx->DR; +} + +/** + * @brief Transmits the address byte to select the slave device. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param Address: specifies the slave address which will be transmitted + * @param I2C_Direction: specifies whether the I2C device will be a + * Transmitter or a Receiver. This parameter can be one of the following values + * @arg I2C_Direction_Transmitter: Transmitter mode + * @arg I2C_Direction_Receiver: Receiver mode + * @retval None. + */ +void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_DIRECTION(I2C_Direction)); + /* Test on the direction to set/reset the read/write bit */ + if (I2C_Direction != I2C_Direction_Transmitter) + { + /* Set the address bit0 for read */ + Address |= OAR1_ADD0_Set; + } + else + { + /* Reset the address bit0 for write */ + Address &= OAR1_ADD0_Reset; + } + /* Send the address */ + I2Cx->DR = Address; +} + +/** + * @brief Reads the specified I2C register and returns its value. + * @param I2C_Register: specifies the register to read. + * This parameter can be one of the following values: + * @arg I2C_Register_CR1: CR1 register. + * @arg I2C_Register_CR2: CR2 register. + * @arg I2C_Register_OAR1: OAR1 register. + * @arg I2C_Register_OAR2: OAR2 register. + * @arg I2C_Register_DR: DR register. + * @arg I2C_Register_SR1: SR1 register. + * @arg I2C_Register_SR2: SR2 register. + * @arg I2C_Register_CCR: CCR register. + * @arg I2C_Register_TRISE: TRISE register. + * @retval The value of the read register. + */ +uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_REGISTER(I2C_Register)); + + tmp = (uint32_t) I2Cx; + tmp += I2C_Register; + + /* Return the selected register value */ + return (*(__IO uint16_t *) tmp); +} + +/** + * @brief Enables or disables the specified I2C software reset. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C software reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Peripheral under reset */ + I2Cx->CR1 |= CR1_SWRST_Set; + } + else + { + /* Peripheral not under reset */ + I2Cx->CR1 &= CR1_SWRST_Reset; + } +} + +/** + * @brief Selects the specified I2C NACK position in master receiver mode. + * This function is useful in I2C Master Receiver mode when the number + * of data to be received is equal to 2. In this case, this function + * should be called (with parameter I2C_NACKPosition_Next) before data + * reception starts,as described in the 2-byte reception procedure + * recommended in Reference Manual in Section: Master receiver. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_NACKPosition: specifies the NACK position. + * This parameter can be one of the following values: + * @arg I2C_NACKPosition_Next: indicates that the next byte will be the last + * received byte. + * @arg I2C_NACKPosition_Current: indicates that current byte is the last + * received byte. + * + * @note This function configures the same bit (POS) as I2C_PECPositionConfig() + * but is intended to be used in I2C mode while I2C_PECPositionConfig() + * is intended to used in SMBUS mode. + * + * @retval None + */ +void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_NACK_POSITION(I2C_NACKPosition)); + + /* Check the input parameter */ + if (I2C_NACKPosition == I2C_NACKPosition_Next) + { + /* Next byte in shift register is the last received byte */ + I2Cx->CR1 |= I2C_NACKPosition_Next; + } + else + { + /* Current byte in shift register is the last received byte */ + I2Cx->CR1 &= I2C_NACKPosition_Current; + } +} + +/** + * @brief Drives the SMBusAlert pin high or low for the specified I2C. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_SMBusAlert: specifies SMBAlert pin level. + * This parameter can be one of the following values: + * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low + * @arg I2C_SMBusAlert_High: SMBAlert pin driven high + * @retval None + */ +void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert)); + if (I2C_SMBusAlert == I2C_SMBusAlert_Low) + { + /* Drive the SMBusAlert pin Low */ + I2Cx->CR1 |= I2C_SMBusAlert_Low; + } + else + { + /* Drive the SMBusAlert pin High */ + I2Cx->CR1 &= I2C_SMBusAlert_High; + } +} + +/** + * @brief Enables or disables the specified I2C PEC transfer. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C PEC transmission. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C PEC transmission */ + I2Cx->CR1 |= CR1_PEC_Set; + } + else + { + /* Disable the selected I2C PEC transmission */ + I2Cx->CR1 &= CR1_PEC_Reset; + } +} + +/** + * @brief Selects the specified I2C PEC position. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_PECPosition: specifies the PEC position. + * This parameter can be one of the following values: + * @arg I2C_PECPosition_Next: indicates that the next byte is PEC + * @arg I2C_PECPosition_Current: indicates that current byte is PEC + * + * @note This function configures the same bit (POS) as I2C_NACKPositionConfig() + * but is intended to be used in SMBUS mode while I2C_NACKPositionConfig() + * is intended to used in I2C mode. + * + * @retval None + */ +void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition)); + if (I2C_PECPosition == I2C_PECPosition_Next) + { + /* Next byte in shift register is PEC */ + I2Cx->CR1 |= I2C_PECPosition_Next; + } + else + { + /* Current byte in shift register is PEC */ + I2Cx->CR1 &= I2C_PECPosition_Current; + } +} + +/** + * @brief Enables or disables the PEC value calculation of the transferred bytes. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx PEC value calculation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C PEC calculation */ + I2Cx->CR1 |= CR1_ENPEC_Set; + } + else + { + /* Disable the selected I2C PEC calculation */ + I2Cx->CR1 &= CR1_ENPEC_Reset; + } +} + +/** + * @brief Returns the PEC value for the specified I2C. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @retval The PEC value. + */ +uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + /* Return the selected I2C PEC value */ + return ((I2Cx->SR2) >> 8); +} + +/** + * @brief Enables or disables the specified I2C ARP. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx ARP. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C ARP */ + I2Cx->CR1 |= CR1_ENARP_Set; + } + else + { + /* Disable the selected I2C ARP */ + I2Cx->CR1 &= CR1_ENARP_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C Clock stretching. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx Clock stretching. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState == DISABLE) + { + /* Enable the selected I2C Clock stretching */ + I2Cx->CR1 |= CR1_NOSTRETCH_Set; + } + else + { + /* Disable the selected I2C Clock stretching */ + I2Cx->CR1 &= CR1_NOSTRETCH_Reset; + } +} + +/** + * @brief Selects the specified I2C fast mode duty cycle. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_DutyCycle: specifies the fast mode duty cycle. + * This parameter can be one of the following values: + * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2 + * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9 + * @retval None + */ +void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle)); + if (I2C_DutyCycle != I2C_DutyCycle_16_9) + { + /* I2C fast mode Tlow/Thigh=2 */ + I2Cx->CCR &= I2C_DutyCycle_2; + } + else + { + /* I2C fast mode Tlow/Thigh=16/9 */ + I2Cx->CCR |= I2C_DutyCycle_16_9; + } +} + + + +/** + * @brief + **************************************************************************************** + * + * I2C State Monitoring Functions + * + **************************************************************************************** + * This I2C driver provides three different ways for I2C state monitoring + * depending on the application requirements and constraints: + * + * + * 1) Basic state monitoring: + * Using I2C_CheckEvent() function: + * It compares the status registers (SR1 and SR2) content to a given event + * (can be the combination of one or more flags). + * It returns SUCCESS if the current status includes the given flags + * and returns ERROR if one or more flags are missing in the current status. + * - When to use: + * - This function is suitable for most applications as well as for startup + * activity since the events are fully described in the product reference manual + * (RM0008). + * - It is also suitable for users who need to define their own events. + * - Limitations: + * - If an error occurs (ie. error flags are set besides to the monitored flags), + * the I2C_CheckEvent() function may return SUCCESS despite the communication + * hold or corrupted real state. + * In this case, it is advised to use error interrupts to monitor the error + * events and handle them in the interrupt IRQ handler. + * + * @note + * For error management, it is advised to use the following functions: + * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). + * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. + * Where x is the peripheral instance (I2C1, I2C2 ...) + * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() + * in order to determine which error occured. + * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() + * and/or I2C_GenerateStop() in order to clear the error flag and source, + * and return to correct communication status. + * + * + * 2) Advanced state monitoring: + * Using the function I2C_GetLastEvent() which returns the image of both status + * registers in a single word (uint32_t) (Status Register 2 value is shifted left + * by 16 bits and concatenated to Status Register 1). + * - When to use: + * - This function is suitable for the same applications above but it allows to + * overcome the mentioned limitation of I2C_GetFlagStatus() function. + * The returned value could be compared to events already defined in the + * library (stm32f10x_i2c.h) or to custom values defined by user. + * - This function is suitable when multiple flags are monitored at the same time. + * - At the opposite of I2C_CheckEvent() function, this function allows user to + * choose when an event is accepted (when all events flags are set and no + * other flags are set or just when the needed flags are set like + * I2C_CheckEvent() function). + * - Limitations: + * - User may need to define his own events. + * - Same remark concerning the error management is applicable for this + * function if user decides to check only regular communication flags (and + * ignores error flags). + * + * + * 3) Flag-based state monitoring: + * Using the function I2C_GetFlagStatus() which simply returns the status of + * one single flag (ie. I2C_FLAG_RXNE ...). + * - When to use: + * - This function could be used for specific applications or in debug phase. + * - It is suitable when only one flag checking is needed (most I2C events + * are monitored through multiple flags). + * - Limitations: + * - When calling this function, the Status register is accessed. Some flags are + * cleared when the status register is accessed. So checking the status + * of one Flag, may clear other ones. + * - Function may need to be called twice or more in order to monitor one + * single event. + * + * For detailed description of Events, please refer to section I2C_Events in + * stm32f10x_i2c.h file. + * + */ + +/** + * + * 1) Basic state monitoring + ******************************************************************************* + */ + +/** + * @brief Checks whether the last I2Cx Event is equal to the one passed + * as parameter. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_EVENT: specifies the event to be checked. + * This parameter can be one of the following values: + * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2 + * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2 + * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2 + * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3 + * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3 + * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3 + * @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2 + * @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4 + * @arg I2C_EVENT_MASTER_MODE_SELECT : EV5 + * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6 + * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6 + * @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7 + * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8 + * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2 + * @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9 + * + * @note: For detailed description of Events, please refer to section + * I2C_Events in stm32f10x_i2c.h file. + * + * @retval An ErrorStatus enumeration value: + * - SUCCESS: Last event is equal to the I2C_EVENT + * - ERROR: Last event is different from the I2C_EVENT + */ +ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) +{ + uint32_t lastevent = 0; + uint32_t flag1 = 0, flag2 = 0; + ErrorStatus status = ERROR; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_EVENT(I2C_EVENT)); + + /* Read the I2Cx status register */ + flag1 = I2Cx->SR1; + flag2 = I2Cx->SR2; + flag2 = flag2 << 16; + + /* Get the last event value from I2C status register */ + lastevent = (flag1 | flag2) & FLAG_Mask; + + /* Check whether the last event contains the I2C_EVENT */ + if ((lastevent & I2C_EVENT) == I2C_EVENT) + { + /* SUCCESS: last event is equal to I2C_EVENT */ + status = SUCCESS; + } + else + { + /* ERROR: last event is different from I2C_EVENT */ + status = ERROR; + } + /* Return status */ + return status; +} + +/** + * + * 2) Advanced state monitoring + ******************************************************************************* + */ + +/** + * @brief Returns the last I2Cx Event. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * + * @note: For detailed description of Events, please refer to section + * I2C_Events in stm32f10x_i2c.h file. + * + * @retval The last event + */ +uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) +{ + uint32_t lastevent = 0; + uint32_t flag1 = 0, flag2 = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + + /* Read the I2Cx status register */ + flag1 = I2Cx->SR1; + flag2 = I2Cx->SR2; + flag2 = flag2 << 16; + + /* Get the last event value from I2C status register */ + lastevent = (flag1 | flag2) & FLAG_Mask; + + /* Return status */ + return lastevent; +} + +/** + * + * 3) Flag-based state monitoring + ******************************************************************************* + */ + +/** + * @brief Checks whether the specified I2C flag is set or not. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg I2C_FLAG_DUALF: Dual flag (Slave mode) + * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode) + * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode) + * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode) + * @arg I2C_FLAG_TRA: Transmitter/Receiver flag + * @arg I2C_FLAG_BUSY: Bus busy flag + * @arg I2C_FLAG_MSL: Master/Slave flag + * @arg I2C_FLAG_SMBALERT: SMBus Alert flag + * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag + * @arg I2C_FLAG_PECERR: PEC error in reception flag + * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) + * @arg I2C_FLAG_AF: Acknowledge failure flag + * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) + * @arg I2C_FLAG_BERR: Bus error flag + * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter) + * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag + * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode) + * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode) + * @arg I2C_FLAG_BTF: Byte transfer finished flag + * @arg I2C_FLAG_ADDR: Address sent flag (Master mode) "ADSL" + * Address matched flag (Slave mode)"ENDA" + * @arg I2C_FLAG_SB: Start bit flag (Master mode) + * @retval The new state of I2C_FLAG (SET or RESET). + */ +FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) +{ + FlagStatus bitstatus = RESET; + __IO uint32_t i2creg = 0, i2cxbase = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); + + /* Get the I2Cx peripheral base address */ + i2cxbase = (uint32_t)I2Cx; + + /* Read flag register index */ + i2creg = I2C_FLAG >> 28; + + /* Get bit[23:0] of the flag */ + I2C_FLAG &= FLAG_Mask; + + if(i2creg != 0) + { + /* Get the I2Cx SR1 register address */ + i2cxbase += 0x14; + } + else + { + /* Flag in I2Cx SR2 Register */ + I2C_FLAG = (uint32_t)(I2C_FLAG >> 16); + /* Get the I2Cx SR2 register address */ + i2cxbase += 0x18; + } + + if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET) + { + /* I2C_FLAG is set */ + bitstatus = SET; + } + else + { + /* I2C_FLAG is reset */ + bitstatus = RESET; + } + + /* Return the I2C_FLAG status */ + return bitstatus; +} + + + +/** + * @brief Clears the I2Cx's pending flags. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg I2C_FLAG_SMBALERT: SMBus Alert flag + * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag + * @arg I2C_FLAG_PECERR: PEC error in reception flag + * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) + * @arg I2C_FLAG_AF: Acknowledge failure flag + * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) + * @arg I2C_FLAG_BERR: Bus error flag + * + * @note + * - STOPF (STOP detection) is cleared by software sequence: a read operation + * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation + * to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). + * - ADD10 (10-bit header sent) is cleared by software sequence: a read + * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the + * second byte of the address in DR register. + * - BTF (Byte Transfer Finished) is cleared by software sequence: a read + * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a + * read/write to I2C_DR register (I2C_SendData()). + * - ADDR (Address sent) is cleared by software sequence: a read operation to + * I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to + * I2C_SR2 register ((void)(I2Cx->SR2)). + * - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1 + * register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR + * register (I2C_SendData()). + * @retval None + */ +void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) +{ + uint32_t flagpos = 0; + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); + /* Get the I2C flag position */ + flagpos = I2C_FLAG & FLAG_Mask; + /* Clear the selected I2C flag */ + I2Cx->SR1 = (uint16_t)~flagpos; +} + +/** + * @brief Checks whether the specified I2C interrupt has occurred or not. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_IT: specifies the interrupt source to check. + * This parameter can be one of the following values: + * @arg I2C_IT_SMBALERT: SMBus Alert flag + * @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag + * @arg I2C_IT_PECERR: PEC error in reception flag + * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode) + * @arg I2C_IT_AF: Acknowledge failure flag + * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode) + * @arg I2C_IT_BERR: Bus error flag + * @arg I2C_IT_TXE: Data register empty flag (Transmitter) + * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag + * @arg I2C_IT_STOPF: Stop detection flag (Slave mode) + * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode) + * @arg I2C_IT_BTF: Byte transfer finished flag + * @arg I2C_IT_ADDR: Address sent flag (Master mode) "ADSL" + * Address matched flag (Slave mode)"ENDAD" + * @arg I2C_IT_SB: Start bit flag (Master mode) + * @retval The new state of I2C_IT (SET or RESET). + */ +ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_GET_IT(I2C_IT)); + + /* Check if the interrupt source is enabled or not */ + enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CR2)) ; + + /* Get bit[23:0] of the flag */ + I2C_IT &= FLAG_Mask; + + /* Check the status of the specified I2C flag */ + if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus) + { + /* I2C_IT is set */ + bitstatus = SET; + } + else + { + /* I2C_IT is reset */ + bitstatus = RESET; + } + /* Return the I2C_IT status */ + return bitstatus; +} + +/** + * @brief Clears the I2Cxs interrupt pending bits. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_IT: specifies the interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg I2C_IT_SMBALERT: SMBus Alert interrupt + * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt + * @arg I2C_IT_PECERR: PEC error in reception interrupt + * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode) + * @arg I2C_IT_AF: Acknowledge failure interrupt + * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode) + * @arg I2C_IT_BERR: Bus error interrupt + * + * @note + * - STOPF (STOP detection) is cleared by software sequence: a read operation + * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to + * I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). + * - ADD10 (10-bit header sent) is cleared by software sequence: a read + * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second + * byte of the address in I2C_DR register. + * - BTF (Byte Transfer Finished) is cleared by software sequence: a read + * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a + * read/write to I2C_DR register (I2C_SendData()). + * - ADDR (Address sent) is cleared by software sequence: a read operation to + * I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to + * I2C_SR2 register ((void)(I2Cx->SR2)). + * - SB (Start Bit) is cleared by software sequence: a read operation to + * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to + * I2C_DR register (I2C_SendData()). + * @retval None + */ +void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) +{ + uint32_t flagpos = 0; + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_CLEAR_IT(I2C_IT)); + /* Get the I2C flag position */ + flagpos = I2C_IT & FLAG_Mask; + /* Clear the selected I2C flag */ + I2Cx->SR1 = (uint16_t)~flagpos; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c new file mode 100644 index 00000000..c7cbf7ec --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c @@ -0,0 +1,190 @@ +/** + ****************************************************************************** + * @file stm32f10x_iwdg.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the IWDG firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_iwdg.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup IWDG + * @brief IWDG driver modules + * @{ + */ + +/** @defgroup IWDG_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_Defines + * @{ + */ + +/* ---------------------- IWDG registers bit mask ----------------------------*/ + +/* KR register bit mask */ +#define KR_KEY_Reload ((uint16_t)0xAAAA) +#define KR_KEY_Enable ((uint16_t)0xCCCC) + +/** + * @} + */ + +/** @defgroup IWDG_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_Functions + * @{ + */ + +/** + * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. + * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. + * This parameter can be one of the following values: + * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers + * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers + * @retval None + */ +void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) +{ + /* Check the parameters */ + assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); + IWDG->KR = IWDG_WriteAccess; +} + +/** + * @brief Sets IWDG Prescaler value. + * @param IWDG_Prescaler: specifies the IWDG Prescaler value. + * This parameter can be one of the following values: + * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 + * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 + * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 + * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 + * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 + * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 + * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 + * @retval None + */ +void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) +{ + /* Check the parameters */ + assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); + IWDG->PR = IWDG_Prescaler; +} + +/** + * @brief Sets IWDG Reload value. + * @param Reload: specifies the IWDG Reload value. + * This parameter must be a number between 0 and 0x0FFF. + * @retval None + */ +void IWDG_SetReload(uint16_t Reload) +{ + /* Check the parameters */ + assert_param(IS_IWDG_RELOAD(Reload)); + IWDG->RLR = Reload; +} + +/** + * @brief Reloads IWDG counter with value defined in the reload register + * (write access to IWDG_PR and IWDG_RLR registers disabled). + * @param None + * @retval None + */ +void IWDG_ReloadCounter(void) +{ + IWDG->KR = KR_KEY_Reload; +} + +/** + * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). + * @param None + * @retval None + */ +void IWDG_Enable(void) +{ + IWDG->KR = KR_KEY_Enable; +} + +/** + * @brief Checks whether the specified IWDG flag is set or not. + * @param IWDG_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg IWDG_FLAG_PVU: Prescaler Value Update on going + * @arg IWDG_FLAG_RVU: Reload Value Update on going + * @retval The new state of IWDG_FLAG (SET or RESET). + */ +FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_IWDG_FLAG(IWDG_FLAG)); + if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the flag status */ + return bitstatus; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c new file mode 100644 index 00000000..a5a5c572 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c @@ -0,0 +1,307 @@ +/** + ****************************************************************************** + * @file stm32f10x_pwr.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the PWR firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup PWR + * @brief PWR driver modules + * @{ + */ + +/** @defgroup PWR_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_Defines + * @{ + */ + +/* --------- PWR registers bit address in the alias region ---------- */ +#define PWR_OFFSET (PWR_BASE - PERIPH_BASE) + +/* --- CR Register ---*/ + +/* Alias word address of DBP bit */ +#define CR_OFFSET (PWR_OFFSET + 0x00) +#define DBP_BitNumber 0x08 +#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) + +/* Alias word address of PVDE bit */ +#define PVDE_BitNumber 0x04 +#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of EWUP bit */ +#define CSR_OFFSET (PWR_OFFSET + 0x04) +#define EWUP_BitNumber 0x08 +#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4)) + +/* ------------------ PWR registers bit mask ------------------------ */ + +/* CR register bit mask */ +#define CR_DS_MASK ((uint32_t)0xFFFFFFFC) +#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F) + + +/** + * @} + */ + +/** @defgroup PWR_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the PWR peripheral registers to their default reset values. + * @param None + * @retval None + */ +void PWR_DeInit(void) +{ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); +} + +/** + * @brief Enables or disables access to the RTC and backup registers. + * @param NewState: new state of the access to the RTC and backup registers. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void PWR_BackupAccessCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the Power Voltage Detector(PVD). + * @param NewState: new state of the PVD. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void PWR_PVDCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; +} + +/** + * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + * @param PWR_PVDLevel: specifies the PVD detection level + * This parameter can be one of the following values: + * @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V + * @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V + * @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V + * @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V + * @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V + * @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V + * @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V + * @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V + * @retval None + */ +void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); + tmpreg = PWR->CR; + /* Clear PLS[7:5] bits */ + tmpreg &= CR_PLS_MASK; + /* Set PLS[7:5] bits according to PWR_PVDLevel value */ + tmpreg |= PWR_PVDLevel; + /* Store the new value */ + PWR->CR = tmpreg; +} + +/** + * @brief Enables or disables the WakeUp Pin functionality. + * @param NewState: new state of the WakeUp Pin functionality. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void PWR_WakeUpPinCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState; +} + +/** + * @brief Enters STOP mode. + * @param PWR_Regulator: specifies the regulator state in STOP mode. + * This parameter can be one of the following values: + * @arg PWR_Regulator_ON: STOP mode with regulator ON + * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode + * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. + * This parameter can be one of the following values: + * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction + * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction + * @retval None + */ +void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_PWR_REGULATOR(PWR_Regulator)); + assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); + + /* Select the regulator state in STOP mode ---------------------------------*/ + tmpreg = PWR->CR; + /* Clear PDDS and LPDS bits */ + tmpreg &= CR_DS_MASK; + /* Set LPDS bit according to PWR_Regulator value */ + tmpreg |= PWR_Regulator; + /* Store the new value */ + PWR->CR = tmpreg; + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SCB->SCR |= SCB_SCR_SLEEPDEEP; + + /* Select STOP mode entry --------------------------------------------------*/ + if(PWR_STOPEntry == PWR_STOPEntry_WFI) + { + /* Request Wait For Interrupt */ + __WFI(); + } + else + { + /* Request Wait For Event */ + __WFE(); + } + + /* Reset SLEEPDEEP bit of Cortex System Control Register */ + SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); +} + +/** + * @brief Enters STANDBY mode. + * @param None + * @retval None + */ +void PWR_EnterSTANDBYMode(void) +{ + /* Clear Wake-up flag */ + PWR->CR |= PWR_CR_CWUF; + /* Select STANDBY mode */ + PWR->CR |= PWR_CR_PDDS; + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SCB->SCR |= SCB_SCR_SLEEPDEEP; +/* This option is used to ensure that store operations are completed */ +#if defined ( __CC_ARM ) + __force_stores(); +#endif + /* Request Wait For Interrupt */ + __WFI(); +} + +/** + * @brief Checks whether the specified PWR flag is set or not. + * @param PWR_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg PWR_FLAG_WU: Wake Up flag + * @arg PWR_FLAG_SB: StandBy flag + * @arg PWR_FLAG_PVDO: PVD Output + * @retval The new state of PWR_FLAG (SET or RESET). + */ +FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); + + if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the flag status */ + return bitstatus; +} + +/** + * @brief Clears the PWR's pending flags. + * @param PWR_FLAG: specifies the flag to clear. + * This parameter can be one of the following values: + * @arg PWR_FLAG_WU: Wake Up flag + * @arg PWR_FLAG_SB: StandBy flag + * @retval None + */ +void PWR_ClearFlag(uint32_t PWR_FLAG) +{ + /* Check the parameters */ + assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); + + PWR->CR |= PWR_FLAG << 2; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c new file mode 100644 index 00000000..a29034bd --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c @@ -0,0 +1,1470 @@ +/** + ****************************************************************************** + * @file stm32f10x_rcc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the RCC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup RCC + * @brief RCC driver modules + * @{ + */ + +/** @defgroup RCC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Private_Defines + * @{ + */ + +/* ------------ RCC registers bit address in the alias region ----------- */ +#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) + +/* --- CR Register ---*/ + +/* Alias word address of HSION bit */ +#define CR_OFFSET (RCC_OFFSET + 0x00) +#define HSION_BitNumber 0x00 +#define CR_HSION_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BitNumber * 4)) + +/* Alias word address of PLLON bit */ +#define PLLON_BitNumber 0x18 +#define CR_PLLON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BitNumber * 4)) + +#ifdef STM32F10X_CL + /* Alias word address of PLL2ON bit */ + #define PLL2ON_BitNumber 0x1A + #define CR_PLL2ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL2ON_BitNumber * 4)) + + /* Alias word address of PLL3ON bit */ + #define PLL3ON_BitNumber 0x1C + #define CR_PLL3ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL3ON_BitNumber * 4)) +#endif /* STM32F10X_CL */ + +/* Alias word address of CSSON bit */ +#define CSSON_BitNumber 0x13 +#define CR_CSSON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BitNumber * 4)) + +/* --- CFGR Register ---*/ + +/* Alias word address of USBPRE bit */ +#define CFGR_OFFSET (RCC_OFFSET + 0x04) + +#ifndef STM32F10X_CL + #define USBPRE_BitNumber 0x16 + #define CFGR_USBPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BitNumber * 4)) +#else + #define OTGFSPRE_BitNumber 0x16 + #define CFGR_OTGFSPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (OTGFSPRE_BitNumber * 4)) +#endif /* STM32F10X_CL */ + +/* --- BDCR Register ---*/ + +/* Alias word address of RTCEN bit */ +#define BDCR_OFFSET (RCC_OFFSET + 0x20) +#define RTCEN_BitNumber 0x0F +#define BDCR_RTCEN_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BitNumber * 4)) + +/* Alias word address of BDRST bit */ +#define BDRST_BitNumber 0x10 +#define BDCR_BDRST_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of LSION bit */ +#define CSR_OFFSET (RCC_OFFSET + 0x24) +#define LSION_BitNumber 0x00 +#define CSR_LSION_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BitNumber * 4)) + +#ifdef STM32F10X_CL +/* --- CFGR2 Register ---*/ + + /* Alias word address of I2S2SRC bit */ + #define CFGR2_OFFSET (RCC_OFFSET + 0x2C) + #define I2S2SRC_BitNumber 0x11 + #define CFGR2_I2S2SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S2SRC_BitNumber * 4)) + + /* Alias word address of I2S3SRC bit */ + #define I2S3SRC_BitNumber 0x12 + #define CFGR2_I2S3SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S3SRC_BitNumber * 4)) +#endif /* STM32F10X_CL */ + +/* ---------------------- RCC registers bit mask ------------------------ */ + +/* CR register bit mask */ +#define CR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF) +#define CR_HSEBYP_Set ((uint32_t)0x00040000) +#define CR_HSEON_Reset ((uint32_t)0xFFFEFFFF) +#define CR_HSEON_Set ((uint32_t)0x00010000) +#define CR_HSITRIM_Mask ((uint32_t)0xFFFFFF07) + +/* CFGR register bit mask */ +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) + #define CFGR_PLL_Mask ((uint32_t)0xFFC2FFFF) +#else + #define CFGR_PLL_Mask ((uint32_t)0xFFC0FFFF) +#endif /* STM32F10X_CL */ + +#define CFGR_PLLMull_Mask ((uint32_t)0x003C0000) +#define CFGR_PLLSRC_Mask ((uint32_t)0x00010000) +#define CFGR_PLLXTPRE_Mask ((uint32_t)0x00020000) +#define CFGR_SWS_Mask ((uint32_t)0x0000000C) +#define CFGR_SW_Mask ((uint32_t)0xFFFFFFFC) +#define CFGR_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F) +#define CFGR_HPRE_Set_Mask ((uint32_t)0x000000F0) +#define CFGR_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF) +#define CFGR_PPRE1_Set_Mask ((uint32_t)0x00000700) +#define CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF) +#define CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800) +#define CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF) +#define CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000) + +/* CSR register bit mask */ +#define CSR_RMVF_Set ((uint32_t)0x01000000) + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) +/* CFGR2 register bit mask */ + #define CFGR2_PREDIV1SRC ((uint32_t)0x00010000) + #define CFGR2_PREDIV1 ((uint32_t)0x0000000F) +#endif +#ifdef STM32F10X_CL + #define CFGR2_PREDIV2 ((uint32_t)0x000000F0) + #define CFGR2_PLL2MUL ((uint32_t)0x00000F00) + #define CFGR2_PLL3MUL ((uint32_t)0x0000F000) +#endif /* STM32F10X_CL */ + +/* RCC Flag Mask */ +#define FLAG_Mask ((uint8_t)0x1F) + +/* CIR register byte 2 (Bits[15:8]) base address */ +#define CIR_BYTE2_ADDRESS ((uint32_t)0x40021009) + +/* CIR register byte 3 (Bits[23:16]) base address */ +#define CIR_BYTE3_ADDRESS ((uint32_t)0x4002100A) + +/* CFGR register byte 4 (Bits[31:24]) base address */ +#define CFGR_BYTE4_ADDRESS ((uint32_t)0x40021007) + +/* BDCR register base address */ +#define BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET) + +/** + * @} + */ + +/** @defgroup RCC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Private_Variables + * @{ + */ + +static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; +static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8}; + +/** + * @} + */ + +/** @defgroup RCC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Private_Functions + * @{ + */ + +/** + * @brief Resets the RCC clock configuration to the default reset state. + * @param None + * @retval None + */ +void RCC_DeInit(void) +{ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +} + +/** + * @brief Configures the External High Speed oscillator (HSE). + * @note HSE can not be stopped if it is used directly or through the PLL as system clock. + * @param RCC_HSE: specifies the new state of the HSE. + * This parameter can be one of the following values: + * @arg RCC_HSE_OFF: HSE oscillator OFF + * @arg RCC_HSE_ON: HSE oscillator ON + * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock + * @retval None + */ +void RCC_HSEConfig(uint32_t RCC_HSE) +{ + /* Check the parameters */ + assert_param(IS_RCC_HSE(RCC_HSE)); + /* Reset HSEON and HSEBYP bits before configuring the HSE ------------------*/ + /* Reset HSEON bit */ + RCC->CR &= CR_HSEON_Reset; + /* Reset HSEBYP bit */ + RCC->CR &= CR_HSEBYP_Reset; + /* Configure HSE (RCC_HSE_OFF is already covered by the code section above) */ + switch(RCC_HSE) + { + case RCC_HSE_ON: + /* Set HSEON bit */ + RCC->CR |= CR_HSEON_Set; + break; + + case RCC_HSE_Bypass: + /* Set HSEBYP and HSEON bits */ + RCC->CR |= CR_HSEBYP_Set | CR_HSEON_Set; + break; + + default: + break; + } +} + +/** + * @brief Waits for HSE start-up. + * @param None + * @retval An ErrorStatus enumuration value: + * - SUCCESS: HSE oscillator is stable and ready to use + * - ERROR: HSE oscillator not yet ready + */ +ErrorStatus RCC_WaitForHSEStartUp(void) +{ + __IO uint32_t StartUpCounter = 0; + ErrorStatus status = ERROR; + FlagStatus HSEStatus = RESET; + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY); + StartUpCounter++; + } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET)); + + if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET) + { + status = SUCCESS; + } + else + { + status = ERROR; + } + return (status); +} + +/** + * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value. + * @param HSICalibrationValue: specifies the calibration trimming value. + * This parameter must be a number between 0 and 0x1F. + * @retval None + */ +void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_CALIBRATION_VALUE(HSICalibrationValue)); + tmpreg = RCC->CR; + /* Clear HSITRIM[4:0] bits */ + tmpreg &= CR_HSITRIM_Mask; + /* Set the HSITRIM[4:0] bits according to HSICalibrationValue value */ + tmpreg |= (uint32_t)HSICalibrationValue << 3; + /* Store the new value */ + RCC->CR = tmpreg; +} + +/** + * @brief Enables or disables the Internal High Speed oscillator (HSI). + * @note HSI can not be stopped if it is used directly or through the PLL as system clock. + * @param NewState: new state of the HSI. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_HSICmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_HSION_BB = (uint32_t)NewState; +} + +/** + * @brief Configures the PLL clock source and multiplication factor. + * @note This function must be used only when the PLL is disabled. + * @param RCC_PLLSource: specifies the PLL entry clock source. + * For @b STM32_Connectivity_line_devices or @b STM32_Value_line_devices, + * this parameter can be one of the following values: + * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry + * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry + * @arg RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL clock entry + * @arg RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 selected as PLL clock entry + * @param RCC_PLLMul: specifies the PLL multiplication factor. + * For @b STM32_Connectivity_line_devices, this parameter can be RCC_PLLMul_x where x:{[4,9], 6_5} + * For @b other_STM32_devices, this parameter can be RCC_PLLMul_x where x:[2,16] + * @retval None + */ +void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource)); + assert_param(IS_RCC_PLL_MUL(RCC_PLLMul)); + + tmpreg = RCC->CFGR; + /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ + tmpreg &= CFGR_PLL_Mask; + /* Set the PLL configuration bits */ + tmpreg |= RCC_PLLSource | RCC_PLLMul; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Enables or disables the PLL. + * @note The PLL can not be disabled if it is used as system clock. + * @param NewState: new state of the PLL. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_PLLCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CR_PLLON_BB = (uint32_t)NewState; +} + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) +/** + * @brief Configures the PREDIV1 division factor. + * @note + * - This function must be used only when the PLL is disabled. + * - This function applies only to STM32 Connectivity line and Value line + * devices. + * @param RCC_PREDIV1_Source: specifies the PREDIV1 clock source. + * This parameter can be one of the following values: + * @arg RCC_PREDIV1_Source_HSE: HSE selected as PREDIV1 clock + * @arg RCC_PREDIV1_Source_PLL2: PLL2 selected as PREDIV1 clock + * @note + * For @b STM32_Value_line_devices this parameter is always RCC_PREDIV1_Source_HSE + * @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor. + * This parameter can be RCC_PREDIV1_Divx where x:[1,16] + * @retval None + */ +void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PREDIV1_SOURCE(RCC_PREDIV1_Source)); + assert_param(IS_RCC_PREDIV1(RCC_PREDIV1_Div)); + + tmpreg = RCC->CFGR2; + /* Clear PREDIV1[3:0] and PREDIV1SRC bits */ + tmpreg &= ~(CFGR2_PREDIV1 | CFGR2_PREDIV1SRC); + /* Set the PREDIV1 clock source and division factor */ + tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} +#endif + +#ifdef STM32F10X_CL +/** + * @brief Configures the PREDIV2 division factor. + * @note + * - This function must be used only when both PLL2 and PLL3 are disabled. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_PREDIV2_Div: specifies the PREDIV2 clock division factor. + * This parameter can be RCC_PREDIV2_Divx where x:[1,16] + * @retval None + */ +void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PREDIV2(RCC_PREDIV2_Div)); + + tmpreg = RCC->CFGR2; + /* Clear PREDIV2[3:0] bits */ + tmpreg &= ~CFGR2_PREDIV2; + /* Set the PREDIV2 division factor */ + tmpreg |= RCC_PREDIV2_Div; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} + +/** + * @brief Configures the PLL2 multiplication factor. + * @note + * - This function must be used only when the PLL2 is disabled. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_PLL2Mul: specifies the PLL2 multiplication factor. + * This parameter can be RCC_PLL2Mul_x where x:{[8,14], 16, 20} + * @retval None + */ +void RCC_PLL2Config(uint32_t RCC_PLL2Mul) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PLL2_MUL(RCC_PLL2Mul)); + + tmpreg = RCC->CFGR2; + /* Clear PLL2Mul[3:0] bits */ + tmpreg &= ~CFGR2_PLL2MUL; + /* Set the PLL2 configuration bits */ + tmpreg |= RCC_PLL2Mul; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} + + +/** + * @brief Enables or disables the PLL2. + * @note + * - The PLL2 can not be disabled if it is used indirectly as system clock + * (i.e. it is used as PLL clock entry that is used as System clock). + * - This function applies only to STM32 Connectivity line devices. + * @param NewState: new state of the PLL2. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_PLL2Cmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CR_PLL2ON_BB = (uint32_t)NewState; +} + + +/** + * @brief Configures the PLL3 multiplication factor. + * @note + * - This function must be used only when the PLL3 is disabled. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_PLL3Mul: specifies the PLL3 multiplication factor. + * This parameter can be RCC_PLL3Mul_x where x:{[8,14], 16, 20} + * @retval None + */ +void RCC_PLL3Config(uint32_t RCC_PLL3Mul) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PLL3_MUL(RCC_PLL3Mul)); + + tmpreg = RCC->CFGR2; + /* Clear PLL3Mul[3:0] bits */ + tmpreg &= ~CFGR2_PLL3MUL; + /* Set the PLL3 configuration bits */ + tmpreg |= RCC_PLL3Mul; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} + + +/** + * @brief Enables or disables the PLL3. + * @note This function applies only to STM32 Connectivity line devices. + * @param NewState: new state of the PLL3. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_PLL3Cmd(FunctionalState NewState) +{ + /* Check the parameters */ + + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_PLL3ON_BB = (uint32_t)NewState; +} +#endif /* STM32F10X_CL */ + +/** + * @brief Configures the system clock (SYSCLK). + * @param RCC_SYSCLKSource: specifies the clock source used as system clock. + * This parameter can be one of the following values: + * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock + * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock + * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock + * @retval None + */ +void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_SYSCLK_SOURCE(RCC_SYSCLKSource)); + tmpreg = RCC->CFGR; + /* Clear SW[1:0] bits */ + tmpreg &= CFGR_SW_Mask; + /* Set SW[1:0] bits according to RCC_SYSCLKSource value */ + tmpreg |= RCC_SYSCLKSource; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Returns the clock source used as system clock. + * @param None + * @retval The clock source used as system clock. The returned value can + * be one of the following: + * - 0x00: HSI used as system clock + * - 0x04: HSE used as system clock + * - 0x08: PLL used as system clock + */ +uint8_t RCC_GetSYSCLKSource(void) +{ + return ((uint8_t)(RCC->CFGR & CFGR_SWS_Mask)); +} + +/** + * @brief Configures the AHB clock (HCLK). + * @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from + * the system clock (SYSCLK). + * This parameter can be one of the following values: + * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK + * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2 + * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4 + * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8 + * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16 + * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64 + * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128 + * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256 + * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512 + * @retval None + */ +void RCC_HCLKConfig(uint32_t RCC_SYSCLK) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_HCLK(RCC_SYSCLK)); + tmpreg = RCC->CFGR; + /* Clear HPRE[3:0] bits */ + tmpreg &= CFGR_HPRE_Reset_Mask; + /* Set HPRE[3:0] bits according to RCC_SYSCLK value */ + tmpreg |= RCC_SYSCLK; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Configures the Low Speed APB clock (PCLK1). + * @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from + * the AHB clock (HCLK). + * This parameter can be one of the following values: + * @arg RCC_HCLK_Div1: APB1 clock = HCLK + * @arg RCC_HCLK_Div2: APB1 clock = HCLK/2 + * @arg RCC_HCLK_Div4: APB1 clock = HCLK/4 + * @arg RCC_HCLK_Div8: APB1 clock = HCLK/8 + * @arg RCC_HCLK_Div16: APB1 clock = HCLK/16 + * @retval None + */ +void RCC_PCLK1Config(uint32_t RCC_HCLK) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_PCLK(RCC_HCLK)); + tmpreg = RCC->CFGR; + /* Clear PPRE1[2:0] bits */ + tmpreg &= CFGR_PPRE1_Reset_Mask; + /* Set PPRE1[2:0] bits according to RCC_HCLK value */ + tmpreg |= RCC_HCLK; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Configures the High Speed APB clock (PCLK2). + * @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from + * the AHB clock (HCLK). + * This parameter can be one of the following values: + * @arg RCC_HCLK_Div1: APB2 clock = HCLK + * @arg RCC_HCLK_Div2: APB2 clock = HCLK/2 + * @arg RCC_HCLK_Div4: APB2 clock = HCLK/4 + * @arg RCC_HCLK_Div8: APB2 clock = HCLK/8 + * @arg RCC_HCLK_Div16: APB2 clock = HCLK/16 + * @retval None + */ +void RCC_PCLK2Config(uint32_t RCC_HCLK) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_PCLK(RCC_HCLK)); + tmpreg = RCC->CFGR; + /* Clear PPRE2[2:0] bits */ + tmpreg &= CFGR_PPRE2_Reset_Mask; + /* Set PPRE2[2:0] bits according to RCC_HCLK value */ + tmpreg |= RCC_HCLK << 3; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Enables or disables the specified RCC interrupts. + * @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled. + * + * For @b STM32_Connectivity_line_devices, this parameter can be any combination + * of the following values + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt + * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt + * + * For @b other_STM32_devices, this parameter can be any combination of the + * following values + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * + * @param NewState: new state of the specified RCC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_IT(RCC_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Perform Byte access to RCC_CIR bits to enable the selected interrupts */ + *(__IO uint8_t *) CIR_BYTE2_ADDRESS |= RCC_IT; + } + else + { + /* Perform Byte access to RCC_CIR bits to disable the selected interrupts */ + *(__IO uint8_t *) CIR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT; + } +} + +#ifndef STM32F10X_CL +/** + * @brief Configures the USB clock (USBCLK). + * @param RCC_USBCLKSource: specifies the USB clock source. This clock is + * derived from the PLL output. + * This parameter can be one of the following values: + * @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB + * clock source + * @arg RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source + * @retval None + */ +void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_USBCLK_SOURCE(RCC_USBCLKSource)); + + *(__IO uint32_t *) CFGR_USBPRE_BB = RCC_USBCLKSource; +} +#else +/** + * @brief Configures the USB OTG FS clock (OTGFSCLK). + * This function applies only to STM32 Connectivity line devices. + * @param RCC_OTGFSCLKSource: specifies the USB OTG FS clock source. + * This clock is derived from the PLL output. + * This parameter can be one of the following values: + * @arg RCC_OTGFSCLKSource_PLLVCO_Div3: PLL VCO clock divided by 2 selected as USB OTG FS clock source + * @arg RCC_OTGFSCLKSource_PLLVCO_Div2: PLL VCO clock divided by 2 selected as USB OTG FS clock source + * @retval None + */ +void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_OTGFSCLK_SOURCE(RCC_OTGFSCLKSource)); + + *(__IO uint32_t *) CFGR_OTGFSPRE_BB = RCC_OTGFSCLKSource; +} +#endif /* STM32F10X_CL */ + +/** + * @brief Configures the ADC clock (ADCCLK). + * @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from + * the APB2 clock (PCLK2). + * This parameter can be one of the following values: + * @arg RCC_PCLK2_Div2: ADC clock = PCLK2/2 + * @arg RCC_PCLK2_Div4: ADC clock = PCLK2/4 + * @arg RCC_PCLK2_Div6: ADC clock = PCLK2/6 + * @arg RCC_PCLK2_Div8: ADC clock = PCLK2/8 + * @retval None + */ +void RCC_ADCCLKConfig(uint32_t RCC_PCLK2) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_ADCCLK(RCC_PCLK2)); + tmpreg = RCC->CFGR; + /* Clear ADCPRE[1:0] bits */ + tmpreg &= CFGR_ADCPRE_Reset_Mask; + /* Set ADCPRE[1:0] bits according to RCC_PCLK2 value */ + tmpreg |= RCC_PCLK2; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +#ifdef STM32F10X_CL +/** + * @brief Configures the I2S2 clock source(I2S2CLK). + * @note + * - This function must be called before enabling I2S2 APB clock. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_I2S2CLKSource: specifies the I2S2 clock source. + * This parameter can be one of the following values: + * @arg RCC_I2S2CLKSource_SYSCLK: system clock selected as I2S2 clock entry + * @arg RCC_I2S2CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S2 clock entry + * @retval None + */ +void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_I2S2CLK_SOURCE(RCC_I2S2CLKSource)); + + *(__IO uint32_t *) CFGR2_I2S2SRC_BB = RCC_I2S2CLKSource; +} + +/** + * @brief Configures the I2S3 clock source(I2S2CLK). + * @note + * - This function must be called before enabling I2S3 APB clock. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_I2S3CLKSource: specifies the I2S3 clock source. + * This parameter can be one of the following values: + * @arg RCC_I2S3CLKSource_SYSCLK: system clock selected as I2S3 clock entry + * @arg RCC_I2S3CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S3 clock entry + * @retval None + */ +void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_I2S3CLK_SOURCE(RCC_I2S3CLKSource)); + + *(__IO uint32_t *) CFGR2_I2S3SRC_BB = RCC_I2S3CLKSource; +} +#endif /* STM32F10X_CL */ + +/** + * @brief Configures the External Low Speed oscillator (LSE). + * @param RCC_LSE: specifies the new state of the LSE. + * This parameter can be one of the following values: + * @arg RCC_LSE_OFF: LSE oscillator OFF + * @arg RCC_LSE_ON: LSE oscillator ON + * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock + * @retval None + */ +void RCC_LSEConfig(uint8_t RCC_LSE) +{ + /* Check the parameters */ + assert_param(IS_RCC_LSE(RCC_LSE)); + /* Reset LSEON and LSEBYP bits before configuring the LSE ------------------*/ + /* Reset LSEON bit */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; + /* Reset LSEBYP bit */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; + /* Configure LSE (RCC_LSE_OFF is already covered by the code section above) */ + switch(RCC_LSE) + { + case RCC_LSE_ON: + /* Set LSEON bit */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_ON; + break; + + case RCC_LSE_Bypass: + /* Set LSEBYP and LSEON bits */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_Bypass | RCC_LSE_ON; + break; + + default: + break; + } +} + +/** + * @brief Enables or disables the Internal Low Speed oscillator (LSI). + * @note LSI can not be disabled if the IWDG is running. + * @param NewState: new state of the LSI. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_LSICmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CSR_LSION_BB = (uint32_t)NewState; +} + +/** + * @brief Configures the RTC clock (RTCCLK). + * @note Once the RTC clock is selected it can't be changed unless the Backup domain is reset. + * @param RCC_RTCCLKSource: specifies the RTC clock source. + * This parameter can be one of the following values: + * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock + * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock + * @arg RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128 selected as RTC clock + * @retval None + */ +void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource)); + /* Select the RTC clock source */ + RCC->BDCR |= RCC_RTCCLKSource; +} + +/** + * @brief Enables or disables the RTC clock. + * @note This function must be used only after the RTC clock was selected using the RCC_RTCCLKConfig function. + * @param NewState: new state of the RTC clock. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_RTCCLKCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) BDCR_RTCEN_BB = (uint32_t)NewState; +} + +/** + * @brief Returns the frequencies of different on chip clocks. + * @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold + * the clocks frequencies. + * @note The result of this function could be not correct when using + * fractional value for HSE crystal. + * @retval None + */ +void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & CFGR_SWS_Mask; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + RCC_Clocks->SYSCLK_Frequency = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & CFGR_PLLMull_Mask; + pllsource = RCC->CFGR & CFGR_PLLSRC_Mask; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & CFGR_PLLXTPRE_Mask) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE >> 1) * pllmull; + } + else + { + RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { /* HSE oscillator clock selected as PREDIV1 clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & CFGR2_PLL2MUL) >> 8 ) + 2; + RCC_Clocks->SYSCLK_Frequency = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; + break; + } + + /* Compute HCLK, PCLK1, PCLK2 and ADCCLK clocks frequencies ----------------*/ + /* Get HCLK prescaler */ + tmp = RCC->CFGR & CFGR_HPRE_Set_Mask; + tmp = tmp >> 4; + presc = APBAHBPrescTable[tmp]; + /* HCLK clock frequency */ + RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc; + /* Get PCLK1 prescaler */ + tmp = RCC->CFGR & CFGR_PPRE1_Set_Mask; + tmp = tmp >> 8; + presc = APBAHBPrescTable[tmp]; + /* PCLK1 clock frequency */ + RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc; + /* Get PCLK2 prescaler */ + tmp = RCC->CFGR & CFGR_PPRE2_Set_Mask; + tmp = tmp >> 11; + presc = APBAHBPrescTable[tmp]; + /* PCLK2 clock frequency */ + RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc; + /* Get ADCCLK prescaler */ + tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask; + tmp = tmp >> 14; + presc = ADCPrescTable[tmp]; + /* ADCCLK clock frequency */ + RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc; +} + +/** + * @brief Enables or disables the AHB peripheral clock. + * @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock. + * + * For @b STM32_Connectivity_line_devices, this parameter can be any combination + * of the following values: + * @arg RCC_AHBPeriph_DMA1 + * @arg RCC_AHBPeriph_DMA2 + * @arg RCC_AHBPeriph_SRAM + * @arg RCC_AHBPeriph_FLITF + * @arg RCC_AHBPeriph_CRC + * @arg RCC_AHBPeriph_OTG_FS + * @arg RCC_AHBPeriph_ETH_MAC + * @arg RCC_AHBPeriph_ETH_MAC_Tx + * @arg RCC_AHBPeriph_ETH_MAC_Rx + * + * For @b other_STM32_devices, this parameter can be any combination of the + * following values: + * @arg RCC_AHBPeriph_DMA1 + * @arg RCC_AHBPeriph_DMA2 + * @arg RCC_AHBPeriph_SRAM + * @arg RCC_AHBPeriph_FLITF + * @arg RCC_AHBPeriph_CRC + * @arg RCC_AHBPeriph_FSMC + * @arg RCC_AHBPeriph_SDIO + * + * @note SRAM and FLITF clock can be disabled only during sleep mode. + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_AHB_PERIPH(RCC_AHBPeriph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + RCC->AHBENR |= RCC_AHBPeriph; + } + else + { + RCC->AHBENR &= ~RCC_AHBPeriph; + } +} + +/** + * @brief Enables or disables the High Speed APB (APB2) peripheral clock. + * @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock. + * This parameter can be any combination of the following values: + * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, + * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, + * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, + * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, + * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, + * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17, + * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11 + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB2ENR |= RCC_APB2Periph; + } + else + { + RCC->APB2ENR &= ~RCC_APB2Periph; + } +} + +/** + * @brief Enables or disables the Low Speed APB (APB1) peripheral clock. + * @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock. + * This parameter can be any combination of the following values: + * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, + * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, + * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, + * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, + * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, + * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, + * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC, + * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14 + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB1ENR |= RCC_APB1Periph; + } + else + { + RCC->APB1ENR &= ~RCC_APB1Periph; + } +} + +#ifdef STM32F10X_CL +/** + * @brief Forces or releases AHB peripheral reset. + * @note This function applies only to STM32 Connectivity line devices. + * @param RCC_AHBPeriph: specifies the AHB peripheral to reset. + * This parameter can be any combination of the following values: + * @arg RCC_AHBPeriph_OTG_FS + * @arg RCC_AHBPeriph_ETH_MAC + * @param NewState: new state of the specified peripheral reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_AHB_PERIPH_RESET(RCC_AHBPeriph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + RCC->AHBRSTR |= RCC_AHBPeriph; + } + else + { + RCC->AHBRSTR &= ~RCC_AHBPeriph; + } +} +#endif /* STM32F10X_CL */ + +/** + * @brief Forces or releases High Speed APB (APB2) peripheral reset. + * @param RCC_APB2Periph: specifies the APB2 peripheral to reset. + * This parameter can be any combination of the following values: + * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, + * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, + * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, + * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, + * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, + * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17, + * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11 + * @param NewState: new state of the specified peripheral reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB2RSTR |= RCC_APB2Periph; + } + else + { + RCC->APB2RSTR &= ~RCC_APB2Periph; + } +} + +/** + * @brief Forces or releases Low Speed APB (APB1) peripheral reset. + * @param RCC_APB1Periph: specifies the APB1 peripheral to reset. + * This parameter can be any combination of the following values: + * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, + * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, + * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, + * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, + * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, + * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, + * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC, + * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14 + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB1RSTR |= RCC_APB1Periph; + } + else + { + RCC->APB1RSTR &= ~RCC_APB1Periph; + } +} + +/** + * @brief Forces or releases the Backup domain reset. + * @param NewState: new state of the Backup domain reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_BackupResetCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) BDCR_BDRST_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the Clock Security System. + * @param NewState: new state of the Clock Security System.. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_ClockSecuritySystemCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)NewState; +} + +/** + * @brief Selects the clock source to output on MCO pin. + * @param RCC_MCO: specifies the clock source to output. + * + * For @b STM32_Connectivity_line_devices, this parameter can be one of the + * following values: + * @arg RCC_MCO_NoClock: No clock selected + * @arg RCC_MCO_SYSCLK: System clock selected + * @arg RCC_MCO_HSI: HSI oscillator clock selected + * @arg RCC_MCO_HSE: HSE oscillator clock selected + * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected + * @arg RCC_MCO_PLL2CLK: PLL2 clock selected + * @arg RCC_MCO_PLL3CLK_Div2: PLL3 clock divided by 2 selected + * @arg RCC_MCO_XT1: External 3-25 MHz oscillator clock selected + * @arg RCC_MCO_PLL3CLK: PLL3 clock selected + * + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_MCO_NoClock: No clock selected + * @arg RCC_MCO_SYSCLK: System clock selected + * @arg RCC_MCO_HSI: HSI oscillator clock selected + * @arg RCC_MCO_HSE: HSE oscillator clock selected + * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected + * + * @retval None + */ +void RCC_MCOConfig(uint8_t RCC_MCO) +{ + /* Check the parameters */ + assert_param(IS_RCC_MCO(RCC_MCO)); + + /* Perform Byte access to MCO bits to select the MCO source */ + *(__IO uint8_t *) CFGR_BYTE4_ADDRESS = RCC_MCO; +} + +/** + * @brief Checks whether the specified RCC flag is set or not. + * @param RCC_FLAG: specifies the flag to check. + * + * For @b STM32_Connectivity_line_devices, this parameter can be one of the + * following values: + * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready + * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready + * @arg RCC_FLAG_PLLRDY: PLL clock ready + * @arg RCC_FLAG_PLL2RDY: PLL2 clock ready + * @arg RCC_FLAG_PLL3RDY: PLL3 clock ready + * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready + * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready + * @arg RCC_FLAG_PINRST: Pin reset + * @arg RCC_FLAG_PORRST: POR/PDR reset + * @arg RCC_FLAG_SFTRST: Software reset + * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset + * @arg RCC_FLAG_WWDGRST: Window Watchdog reset + * @arg RCC_FLAG_LPWRRST: Low Power reset + * + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready + * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready + * @arg RCC_FLAG_PLLRDY: PLL clock ready + * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready + * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready + * @arg RCC_FLAG_PINRST: Pin reset + * @arg RCC_FLAG_PORRST: POR/PDR reset + * @arg RCC_FLAG_SFTRST: Software reset + * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset + * @arg RCC_FLAG_WWDGRST: Window Watchdog reset + * @arg RCC_FLAG_LPWRRST: Low Power reset + * + * @retval The new state of RCC_FLAG (SET or RESET). + */ +FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG) +{ + uint32_t tmp = 0; + uint32_t statusreg = 0; + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_RCC_FLAG(RCC_FLAG)); + + /* Get the RCC register index */ + tmp = RCC_FLAG >> 5; + if (tmp == 1) /* The flag to check is in CR register */ + { + statusreg = RCC->CR; + } + else if (tmp == 2) /* The flag to check is in BDCR register */ + { + statusreg = RCC->BDCR; + } + else /* The flag to check is in CSR register */ + { + statusreg = RCC->CSR; + } + + /* Get the flag position */ + tmp = RCC_FLAG & FLAG_Mask; + if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + /* Return the flag status */ + return bitstatus; +} + +/** + * @brief Clears the RCC reset flags. + * @note The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, + * RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST + * @param None + * @retval None + */ +void RCC_ClearFlag(void) +{ + /* Set RMVF bit to clear the reset flags */ + RCC->CSR |= CSR_RMVF_Set; +} + +/** + * @brief Checks whether the specified RCC interrupt has occurred or not. + * @param RCC_IT: specifies the RCC interrupt source to check. + * + * For @b STM32_Connectivity_line_devices, this parameter can be one of the + * following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt + * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt + * @arg RCC_IT_CSS: Clock Security System interrupt + * + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_CSS: Clock Security System interrupt + * + * @retval The new state of RCC_IT (SET or RESET). + */ +ITStatus RCC_GetITStatus(uint8_t RCC_IT) +{ + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_RCC_GET_IT(RCC_IT)); + + /* Check the status of the specified RCC interrupt */ + if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + /* Return the RCC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the RCC's interrupt pending bits. + * @param RCC_IT: specifies the interrupt pending bit to clear. + * + * For @b STM32_Connectivity_line_devices, this parameter can be any combination + * of the following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt + * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt + * @arg RCC_IT_CSS: Clock Security System interrupt + * + * For @b other_STM32_devices, this parameter can be any combination of the + * following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * + * @arg RCC_IT_CSS: Clock Security System interrupt + * @retval None + */ +void RCC_ClearITPendingBit(uint8_t RCC_IT) +{ + /* Check the parameters */ + assert_param(IS_RCC_CLEAR_IT(RCC_IT)); + + /* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt + pending bits */ + *(__IO uint8_t *) CIR_BYTE3_ADDRESS = RCC_IT; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c new file mode 100644 index 00000000..f05aef57 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c @@ -0,0 +1,339 @@ +/** + ****************************************************************************** + * @file stm32f10x_rtc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the RTC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_rtc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup RTC + * @brief RTC driver modules + * @{ + */ + +/** @defgroup RTC_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + +/** @defgroup RTC_Private_Defines + * @{ + */ +#define RTC_LSB_MASK ((uint32_t)0x0000FFFF) /*!< RTC LSB Mask */ +#define PRLH_MSB_MASK ((uint32_t)0x000F0000) /*!< RTC Prescaler MSB Mask */ + +/** + * @} + */ + +/** @defgroup RTC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Private_Functions + * @{ + */ + +/** + * @brief Enables or disables the specified RTC interrupts. + * @param RTC_IT: specifies the RTC interrupts sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg RTC_IT_OW: Overflow interrupt + * @arg RTC_IT_ALR: Alarm interrupt + * @arg RTC_IT_SEC: Second interrupt + * @param NewState: new state of the specified RTC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RTC_IT(RTC_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + RTC->CRH |= RTC_IT; + } + else + { + RTC->CRH &= (uint16_t)~RTC_IT; + } +} + +/** + * @brief Enters the RTC configuration mode. + * @param None + * @retval None + */ +void RTC_EnterConfigMode(void) +{ + /* Set the CNF flag to enter in the Configuration Mode */ + RTC->CRL |= RTC_CRL_CNF; +} + +/** + * @brief Exits from the RTC configuration mode. + * @param None + * @retval None + */ +void RTC_ExitConfigMode(void) +{ + /* Reset the CNF flag to exit from the Configuration Mode */ + RTC->CRL &= (uint16_t)~((uint16_t)RTC_CRL_CNF); +} + +/** + * @brief Gets the RTC counter value. + * @param None + * @retval RTC counter value. + */ +uint32_t RTC_GetCounter(void) +{ + uint16_t tmp = 0; + tmp = RTC->CNTL; + return (((uint32_t)RTC->CNTH << 16 ) | tmp) ; +} + +/** + * @brief Sets the RTC counter value. + * @param CounterValue: RTC counter new value. + * @retval None + */ +void RTC_SetCounter(uint32_t CounterValue) +{ + RTC_EnterConfigMode(); + /* Set RTC COUNTER MSB word */ + RTC->CNTH = CounterValue >> 16; + /* Set RTC COUNTER LSB word */ + RTC->CNTL = (CounterValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/** + * @brief Sets the RTC prescaler value. + * @param PrescalerValue: RTC prescaler new value. + * @retval None + */ +void RTC_SetPrescaler(uint32_t PrescalerValue) +{ + /* Check the parameters */ + assert_param(IS_RTC_PRESCALER(PrescalerValue)); + + RTC_EnterConfigMode(); + /* Set RTC PRESCALER MSB word */ + RTC->PRLH = (PrescalerValue & PRLH_MSB_MASK) >> 16; + /* Set RTC PRESCALER LSB word */ + RTC->PRLL = (PrescalerValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/** + * @brief Sets the RTC alarm value. + * @param AlarmValue: RTC alarm new value. + * @retval None + */ +void RTC_SetAlarm(uint32_t AlarmValue) +{ + RTC_EnterConfigMode(); + /* Set the ALARM MSB word */ + RTC->ALRH = AlarmValue >> 16; + /* Set the ALARM LSB word */ + RTC->ALRL = (AlarmValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/** + * @brief Gets the RTC divider value. + * @param None + * @retval RTC Divider value. + */ +uint32_t RTC_GetDivider(void) +{ + uint32_t tmp = 0x00; + tmp = ((uint32_t)RTC->DIVH & (uint32_t)0x000F) << 16; + tmp |= RTC->DIVL; + return tmp; +} + +/** + * @brief Waits until last write operation on RTC registers has finished. + * @note This function must be called before any write to RTC registers. + * @param None + * @retval None + */ +void RTC_WaitForLastTask(void) +{ + /* Loop until RTOFF flag is set */ + while ((RTC->CRL & RTC_FLAG_RTOFF) == (uint16_t)RESET) + { + } +} + +/** + * @brief Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL) + * are synchronized with RTC APB clock. + * @note This function must be called before any read operation after an APB reset + * or an APB clock stop. + * @param None + * @retval None + */ +void RTC_WaitForSynchro(void) +{ + /* Clear RSF flag */ + RTC->CRL &= (uint16_t)~RTC_FLAG_RSF; + /* Loop until RSF flag is set */ + while ((RTC->CRL & RTC_FLAG_RSF) == (uint16_t)RESET) + { + } +} + +/** + * @brief Checks whether the specified RTC flag is set or not. + * @param RTC_FLAG: specifies the flag to check. + * This parameter can be one the following values: + * @arg RTC_FLAG_RTOFF: RTC Operation OFF flag + * @arg RTC_FLAG_RSF: Registers Synchronized flag + * @arg RTC_FLAG_OW: Overflow flag + * @arg RTC_FLAG_ALR: Alarm flag + * @arg RTC_FLAG_SEC: Second flag + * @retval The new state of RTC_FLAG (SET or RESET). + */ +FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG) +{ + FlagStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_RTC_GET_FLAG(RTC_FLAG)); + + if ((RTC->CRL & RTC_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the RTC's pending flags. + * @param RTC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg RTC_FLAG_RSF: Registers Synchronized flag. This flag is cleared only after + * an APB reset or an APB Clock stop. + * @arg RTC_FLAG_OW: Overflow flag + * @arg RTC_FLAG_ALR: Alarm flag + * @arg RTC_FLAG_SEC: Second flag + * @retval None + */ +void RTC_ClearFlag(uint16_t RTC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_RTC_CLEAR_FLAG(RTC_FLAG)); + + /* Clear the corresponding RTC flag */ + RTC->CRL &= (uint16_t)~RTC_FLAG; +} + +/** + * @brief Checks whether the specified RTC interrupt has occurred or not. + * @param RTC_IT: specifies the RTC interrupts sources to check. + * This parameter can be one of the following values: + * @arg RTC_IT_OW: Overflow interrupt + * @arg RTC_IT_ALR: Alarm interrupt + * @arg RTC_IT_SEC: Second interrupt + * @retval The new state of the RTC_IT (SET or RESET). + */ +ITStatus RTC_GetITStatus(uint16_t RTC_IT) +{ + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_RTC_GET_IT(RTC_IT)); + + bitstatus = (ITStatus)(RTC->CRL & RTC_IT); + if (((RTC->CRH & RTC_IT) != (uint16_t)RESET) && (bitstatus != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the RTC's interrupt pending bits. + * @param RTC_IT: specifies the interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg RTC_IT_OW: Overflow interrupt + * @arg RTC_IT_ALR: Alarm interrupt + * @arg RTC_IT_SEC: Second interrupt + * @retval None + */ +void RTC_ClearITPendingBit(uint16_t RTC_IT) +{ + /* Check the parameters */ + assert_param(IS_RTC_IT(RTC_IT)); + + /* Clear the corresponding RTC pending bit */ + RTC->CRL &= (uint16_t)~RTC_IT; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c new file mode 100644 index 00000000..bc1719d7 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c @@ -0,0 +1,799 @@ +/** + ****************************************************************************** + * @file stm32f10x_sdio.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the SDIO firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_sdio.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup SDIO + * @brief SDIO driver modules + * @{ + */ + +/** @defgroup SDIO_Private_TypesDefinitions + * @{ + */ + +/* ------------ SDIO registers bit address in the alias region ----------- */ +#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) + +/* --- CLKCR Register ---*/ + +/* Alias word address of CLKEN bit */ +#define CLKCR_OFFSET (SDIO_OFFSET + 0x04) +#define CLKEN_BitNumber 0x08 +#define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) + +/* --- CMD Register ---*/ + +/* Alias word address of SDIOSUSPEND bit */ +#define CMD_OFFSET (SDIO_OFFSET + 0x0C) +#define SDIOSUSPEND_BitNumber 0x0B +#define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) + +/* Alias word address of ENCMDCOMPL bit */ +#define ENCMDCOMPL_BitNumber 0x0C +#define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) + +/* Alias word address of NIEN bit */ +#define NIEN_BitNumber 0x0D +#define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) + +/* Alias word address of ATACMD bit */ +#define ATACMD_BitNumber 0x0E +#define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) + +/* --- DCTRL Register ---*/ + +/* Alias word address of DMAEN bit */ +#define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) +#define DMAEN_BitNumber 0x03 +#define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) + +/* Alias word address of RWSTART bit */ +#define RWSTART_BitNumber 0x08 +#define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) + +/* Alias word address of RWSTOP bit */ +#define RWSTOP_BitNumber 0x09 +#define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) + +/* Alias word address of RWMOD bit */ +#define RWMOD_BitNumber 0x0A +#define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) + +/* Alias word address of SDIOEN bit */ +#define SDIOEN_BitNumber 0x0B +#define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) + +/* ---------------------- SDIO registers bit mask ------------------------ */ + +/* --- CLKCR Register ---*/ + +/* CLKCR register clear mask */ +#define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) + +/* --- PWRCTRL Register ---*/ + +/* SDIO PWRCTRL Mask */ +#define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) + +/* --- DCTRL Register ---*/ + +/* SDIO DCTRL Clear Mask */ +#define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) + +/* --- CMD Register ---*/ + +/* CMD Register clear mask */ +#define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) + +/* SDIO RESP Registers Address */ +#define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) + +/** + * @} + */ + +/** @defgroup SDIO_Private_Defines + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the SDIO peripheral registers to their default reset values. + * @param None + * @retval None + */ +void SDIO_DeInit(void) +{ + SDIO->POWER = 0x00000000; + SDIO->CLKCR = 0x00000000; + SDIO->ARG = 0x00000000; + SDIO->CMD = 0x00000000; + SDIO->DTIMER = 0x00000000; + SDIO->DLEN = 0x00000000; + SDIO->DCTRL = 0x00000000; + SDIO->ICR = 0x00C007FF; + SDIO->MASK = 0x00000000; +} + +/** + * @brief Initializes the SDIO peripheral according to the specified + * parameters in the SDIO_InitStruct. + * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure + * that contains the configuration information for the SDIO peripheral. + * @retval None + */ +void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); + assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); + assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); + assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); + assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); + +/*---------------------------- SDIO CLKCR Configuration ------------------------*/ + /* Get the SDIO CLKCR value */ + tmpreg = SDIO->CLKCR; + + /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ + tmpreg &= CLKCR_CLEAR_MASK; + + /* Set CLKDIV bits according to SDIO_ClockDiv value */ + /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ + /* Set BYPASS bit according to SDIO_ClockBypass value */ + /* Set WIDBUS bits according to SDIO_BusWide value */ + /* Set NEGEDGE bits according to SDIO_ClockEdge value */ + /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ + tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | + SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | + SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); + + /* Write to SDIO CLKCR */ + SDIO->CLKCR = tmpreg; +} + +/** + * @brief Fills each SDIO_InitStruct member with its default value. + * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which + * will be initialized. + * @retval None + */ +void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) +{ + /* SDIO_InitStruct members default value */ + SDIO_InitStruct->SDIO_ClockDiv = 0x00; + SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; +} + +/** + * @brief Enables or disables the SDIO Clock. + * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_ClockCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; +} + +/** + * @brief Sets the power status of the controller. + * @param SDIO_PowerState: new state of the Power state. + * This parameter can be one of the following values: + * @arg SDIO_PowerState_OFF + * @arg SDIO_PowerState_ON + * @retval None + */ +void SDIO_SetPowerState(uint32_t SDIO_PowerState) +{ + /* Check the parameters */ + assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); + + SDIO->POWER &= PWR_PWRCTRL_MASK; + SDIO->POWER |= SDIO_PowerState; +} + +/** + * @brief Gets the power status of the controller. + * @param None + * @retval Power status of the controller. The returned value can + * be one of the following: + * - 0x00: Power OFF + * - 0x02: Power UP + * - 0x03: Power ON + */ +uint32_t SDIO_GetPowerState(void) +{ + return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); +} + +/** + * @brief Enables or disables the SDIO interrupts. + * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. + * This parameter can be one or a combination of the following values: + * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt + * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt + * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt + * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt + * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt + * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt + * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt + * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt + * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt + * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide + * bus mode interrupt + * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt + * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt + * @arg SDIO_IT_TXACT: Data transmit in progress interrupt + * @arg SDIO_IT_RXACT: Data receive in progress interrupt + * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt + * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt + * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt + * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt + * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt + * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt + * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt + * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt + * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt + * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt + * @param NewState: new state of the specified SDIO interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SDIO_IT(SDIO_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the SDIO interrupts */ + SDIO->MASK |= SDIO_IT; + } + else + { + /* Disable the SDIO interrupts */ + SDIO->MASK &= ~SDIO_IT; + } +} + +/** + * @brief Enables or disables the SDIO DMA request. + * @param NewState: new state of the selected SDIO DMA request. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_DMACmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; +} + +/** + * @brief Initializes the SDIO Command according to the specified + * parameters in the SDIO_CmdInitStruct and send the command. + * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef + * structure that contains the configuration information for the SDIO command. + * @retval None + */ +void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); + assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); + assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); + assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); + +/*---------------------------- SDIO ARG Configuration ------------------------*/ + /* Set the SDIO Argument value */ + SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; + +/*---------------------------- SDIO CMD Configuration ------------------------*/ + /* Get the SDIO CMD value */ + tmpreg = SDIO->CMD; + /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ + tmpreg &= CMD_CLEAR_MASK; + /* Set CMDINDEX bits according to SDIO_CmdIndex value */ + /* Set WAITRESP bits according to SDIO_Response value */ + /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ + /* Set CPSMEN bits according to SDIO_CPSM value */ + tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response + | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; + + /* Write to SDIO CMD */ + SDIO->CMD = tmpreg; +} + +/** + * @brief Fills each SDIO_CmdInitStruct member with its default value. + * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef + * structure which will be initialized. + * @retval None + */ +void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) +{ + /* SDIO_CmdInitStruct members default value */ + SDIO_CmdInitStruct->SDIO_Argument = 0x00; + SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; + SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; + SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; +} + +/** + * @brief Returns command index of last command for which response received. + * @param None + * @retval Returns the command index of the last command response received. + */ +uint8_t SDIO_GetCommandResponse(void) +{ + return (uint8_t)(SDIO->RESPCMD); +} + +/** + * @brief Returns response received from the card for the last command. + * @param SDIO_RESP: Specifies the SDIO response register. + * This parameter can be one of the following values: + * @arg SDIO_RESP1: Response Register 1 + * @arg SDIO_RESP2: Response Register 2 + * @arg SDIO_RESP3: Response Register 3 + * @arg SDIO_RESP4: Response Register 4 + * @retval The Corresponding response register value. + */ +uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_RESP(SDIO_RESP)); + + tmp = SDIO_RESP_ADDR + SDIO_RESP; + + return (*(__IO uint32_t *) tmp); +} + +/** + * @brief Initializes the SDIO data path according to the specified + * parameters in the SDIO_DataInitStruct. + * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that + * contains the configuration information for the SDIO command. + * @retval None + */ +void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); + assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); + assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); + assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); + assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); + +/*---------------------------- SDIO DTIMER Configuration ---------------------*/ + /* Set the SDIO Data TimeOut value */ + SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; + +/*---------------------------- SDIO DLEN Configuration -----------------------*/ + /* Set the SDIO DataLength value */ + SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; + +/*---------------------------- SDIO DCTRL Configuration ----------------------*/ + /* Get the SDIO DCTRL value */ + tmpreg = SDIO->DCTRL; + /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ + tmpreg &= DCTRL_CLEAR_MASK; + /* Set DEN bit according to SDIO_DPSM value */ + /* Set DTMODE bit according to SDIO_TransferMode value */ + /* Set DTDIR bit according to SDIO_TransferDir value */ + /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ + tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir + | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; + + /* Write to SDIO DCTRL */ + SDIO->DCTRL = tmpreg; +} + +/** + * @brief Fills each SDIO_DataInitStruct member with its default value. + * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which + * will be initialized. + * @retval None + */ +void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) +{ + /* SDIO_DataInitStruct members default value */ + SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; + SDIO_DataInitStruct->SDIO_DataLength = 0x00; + SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; + SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; +} + +/** + * @brief Returns number of remaining data bytes to be transferred. + * @param None + * @retval Number of remaining data bytes to be transferred + */ +uint32_t SDIO_GetDataCounter(void) +{ + return SDIO->DCOUNT; +} + +/** + * @brief Read one data word from Rx FIFO. + * @param None + * @retval Data received + */ +uint32_t SDIO_ReadData(void) +{ + return SDIO->FIFO; +} + +/** + * @brief Write one data word to Tx FIFO. + * @param Data: 32-bit data word to write. + * @retval None + */ +void SDIO_WriteData(uint32_t Data) +{ + SDIO->FIFO = Data; +} + +/** + * @brief Returns the number of words left to be written to or read from FIFO. + * @param None + * @retval Remaining number of words. + */ +uint32_t SDIO_GetFIFOCount(void) +{ + return SDIO->FIFOCNT; +} + +/** + * @brief Starts the SD I/O Read Wait operation. + * @param NewState: new state of the Start SDIO Read Wait operation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_StartSDIOReadWait(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; +} + +/** + * @brief Stops the SD I/O Read Wait operation. + * @param NewState: new state of the Stop SDIO Read Wait operation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_StopSDIOReadWait(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; +} + +/** + * @brief Sets one of the two options of inserting read wait interval. + * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. + * This parameter can be: + * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK + * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2 + * @retval None + */ +void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) +{ + /* Check the parameters */ + assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); + + *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; +} + +/** + * @brief Enables or disables the SD I/O Mode Operation. + * @param NewState: new state of SDIO specific operation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_SetSDIOOperation(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the SD I/O Mode suspend command sending. + * @param NewState: new state of the SD I/O Mode suspend command. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the command completion signal. + * @param NewState: new state of command completion signal. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_CommandCompletionCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the CE-ATA interrupt. + * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_CEATAITCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); +} + +/** + * @brief Sends CE-ATA command (CMD61). + * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_SendCEATACmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; +} + +/** + * @brief Checks whether the specified SDIO flag is set or not. + * @param SDIO_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) + * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) + * @arg SDIO_FLAG_CTIMEOUT: Command response timeout + * @arg SDIO_FLAG_DTIMEOUT: Data timeout + * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error + * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error + * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) + * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) + * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) + * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide + * bus mode. + * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) + * @arg SDIO_FLAG_CMDACT: Command transfer in progress + * @arg SDIO_FLAG_TXACT: Data transmit in progress + * @arg SDIO_FLAG_RXACT: Data receive in progress + * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty + * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full + * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full + * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full + * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty + * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty + * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO + * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO + * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received + * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 + * @retval The new state of SDIO_FLAG (SET or RESET). + */ +FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) +{ + FlagStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_SDIO_FLAG(SDIO_FLAG)); + + if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the SDIO's pending flags. + * @param SDIO_FLAG: specifies the flag to clear. + * This parameter can be one or a combination of the following values: + * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) + * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) + * @arg SDIO_FLAG_CTIMEOUT: Command response timeout + * @arg SDIO_FLAG_DTIMEOUT: Data timeout + * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error + * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error + * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) + * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) + * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) + * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide + * bus mode + * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) + * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received + * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 + * @retval None + */ +void SDIO_ClearFlag(uint32_t SDIO_FLAG) +{ + /* Check the parameters */ + assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); + + SDIO->ICR = SDIO_FLAG; +} + +/** + * @brief Checks whether the specified SDIO interrupt has occurred or not. + * @param SDIO_IT: specifies the SDIO interrupt source to check. + * This parameter can be one of the following values: + * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt + * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt + * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt + * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt + * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt + * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt + * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt + * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt + * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt + * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide + * bus mode interrupt + * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt + * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt + * @arg SDIO_IT_TXACT: Data transmit in progress interrupt + * @arg SDIO_IT_RXACT: Data receive in progress interrupt + * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt + * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt + * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt + * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt + * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt + * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt + * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt + * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt + * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt + * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt + * @retval The new state of SDIO_IT (SET or RESET). + */ +ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) +{ + ITStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_SDIO_GET_IT(SDIO_IT)); + if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the SDIO's interrupt pending bits. + * @param SDIO_IT: specifies the interrupt pending bit to clear. + * This parameter can be one or a combination of the following values: + * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt + * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt + * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt + * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt + * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt + * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt + * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt + * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt + * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt + * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide + * bus mode interrupt + * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt + * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 + * @retval None + */ +void SDIO_ClearITPendingBit(uint32_t SDIO_IT) +{ + /* Check the parameters */ + assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); + + SDIO->ICR = SDIO_IT; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c new file mode 100644 index 00000000..4ec65b2d --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c @@ -0,0 +1,908 @@ +/** + ****************************************************************************** + * @file stm32f10x_spi.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the SPI firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_spi.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup SPI + * @brief SPI driver modules + * @{ + */ + +/** @defgroup SPI_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + + +/** @defgroup SPI_Private_Defines + * @{ + */ + +/* SPI SPE mask */ +#define CR1_SPE_Set ((uint16_t)0x0040) +#define CR1_SPE_Reset ((uint16_t)0xFFBF) + +/* I2S I2SE mask */ +#define I2SCFGR_I2SE_Set ((uint16_t)0x0400) +#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF) + +/* SPI CRCNext mask */ +#define CR1_CRCNext_Set ((uint16_t)0x1000) + +/* SPI CRCEN mask */ +#define CR1_CRCEN_Set ((uint16_t)0x2000) +#define CR1_CRCEN_Reset ((uint16_t)0xDFFF) + +/* SPI SSOE mask */ +#define CR2_SSOE_Set ((uint16_t)0x0004) +#define CR2_SSOE_Reset ((uint16_t)0xFFFB) + +/* SPI registers Masks */ +#define CR1_CLEAR_Mask ((uint16_t)0x3040) +#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) + +/* SPI or I2S mode selection masks */ +#define SPI_Mode_Select ((uint16_t)0xF7FF) +#define I2S_Mode_Select ((uint16_t)0x0800) + +/* I2S clock source selection masks */ +#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000)) +#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000)) +#define I2S_MUL_MASK ((uint32_t)(0x0000F000)) +#define I2S_DIV_MASK ((uint32_t)(0x000000F0)) + +/** + * @} + */ + +/** @defgroup SPI_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the SPIx peripheral registers to their default + * reset values (Affects also the I2Ss). + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @retval None + */ +void SPI_I2S_DeInit(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + if (SPIx == SPI1) + { + /* Enable SPI1 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); + /* Release SPI1 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); + } + else if (SPIx == SPI2) + { + /* Enable SPI2 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); + /* Release SPI2 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); + } + else + { + if (SPIx == SPI3) + { + /* Enable SPI3 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); + /* Release SPI3 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); + } + } +} + +/** + * @brief Initializes the SPIx peripheral according to the specified + * parameters in the SPI_InitStruct. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that + * contains the configuration information for the specified SPI peripheral. + * @retval None + */ +void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) +{ + uint16_t tmpreg = 0; + + /* check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Check the SPI parameters */ + assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction)); + assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode)); + assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize)); + assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL)); + assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA)); + assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS)); + assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler)); + assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit)); + assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial)); + +/*---------------------------- SPIx CR1 Configuration ------------------------*/ + /* Get the SPIx CR1 value */ + tmpreg = SPIx->CR1; + /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */ + tmpreg &= CR1_CLEAR_Mask; + /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler + master/salve mode, CPOL and CPHA */ + /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */ + /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */ + /* Set LSBFirst bit according to SPI_FirstBit value */ + /* Set BR bits according to SPI_BaudRatePrescaler value */ + /* Set CPOL bit according to SPI_CPOL value */ + /* Set CPHA bit according to SPI_CPHA value */ + tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | + SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | + SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | + SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); + /* Write to SPIx CR1 */ + SPIx->CR1 = tmpreg; + + /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ + SPIx->I2SCFGR &= SPI_Mode_Select; + +/*---------------------------- SPIx CRCPOLY Configuration --------------------*/ + /* Write to SPIx CRCPOLY */ + SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial; +} + +/** + * @brief Initializes the SPIx peripheral according to the specified + * parameters in the I2S_InitStruct. + * @param SPIx: where x can be 2 or 3 to select the SPI peripheral + * (configured in I2S mode). + * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that + * contains the configuration information for the specified SPI peripheral + * configured in I2S mode. + * @note + * The function calculates the optimal prescaler needed to obtain the most + * accurate audio frequency (depending on the I2S clock source, the PLL values + * and the product configuration). But in case the prescaler value is greater + * than 511, the default value (0x02) will be configured instead. * + * @retval None + */ +void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) +{ + uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; + uint32_t tmp = 0; + RCC_ClocksTypeDef RCC_Clocks; + uint32_t sourceclock = 0; + + /* Check the I2S parameters */ + assert_param(IS_SPI_23_PERIPH(SPIx)); + assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode)); + assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard)); + assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat)); + assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput)); + assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq)); + assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL)); + +/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ + /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ + SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; + SPIx->I2SPR = 0x0002; + + /* Get the I2SCFGR register value */ + tmpreg = SPIx->I2SCFGR; + + /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ + if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) + { + i2sodd = (uint16_t)0; + i2sdiv = (uint16_t)2; + } + /* If the requested audio frequency is not the default, compute the prescaler */ + else + { + /* Check the frame length (For the Prescaler computing) */ + if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) + { + /* Packet length is 16 bits */ + packetlength = 1; + } + else + { + /* Packet length is 32 bits */ + packetlength = 2; + } + + /* Get the I2S clock source mask depending on the peripheral number */ + if(((uint32_t)SPIx) == SPI2_BASE) + { + /* The mask is relative to I2S2 */ + tmp = I2S2_CLOCK_SRC; + } + else + { + /* The mask is relative to I2S3 */ + tmp = I2S3_CLOCK_SRC; + } + + /* Check the I2S clock source configuration depending on the Device: + Only Connectivity line devices have the PLL3 VCO clock */ +#ifdef STM32F10X_CL + if((RCC->CFGR2 & tmp) != 0) + { + /* Get the configuration bits of RCC PLL3 multiplier */ + tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12); + + /* Get the value of the PLL3 multiplier */ + if((tmp > 5) && (tmp < 15)) + { + /* Multiplier is between 8 and 14 (value 15 is forbidden) */ + tmp += 2; + } + else + { + if (tmp == 15) + { + /* Multiplier is 20 */ + tmp = 20; + } + } + /* Get the PREDIV2 value */ + sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1); + + /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */ + sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2); + } + else + { + /* I2S Clock source is System clock: Get System Clock frequency */ + RCC_GetClocksFreq(&RCC_Clocks); + + /* Get the source clock value: based on System Clock value */ + sourceclock = RCC_Clocks.SYSCLK_Frequency; + } +#else /* STM32F10X_HD */ + /* I2S Clock source is System clock: Get System Clock frequency */ + RCC_GetClocksFreq(&RCC_Clocks); + + /* Get the source clock value: based on System Clock value */ + sourceclock = RCC_Clocks.SYSCLK_Frequency; +#endif /* STM32F10X_CL */ + + /* Compute the Real divider depending on the MCLK output state with a floating point */ + if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) + { + /* MCLK output is enabled */ + tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); + } + else + { + /* MCLK output is disabled */ + tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); + } + + /* Remove the floating point */ + tmp = tmp / 10; + + /* Check the parity of the divider */ + i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); + + /* Compute the i2sdiv prescaler */ + i2sdiv = (uint16_t)((tmp - i2sodd) / 2); + + /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ + i2sodd = (uint16_t) (i2sodd << 8); + } + + /* Test if the divider is 1 or 0 or greater than 0xFF */ + if ((i2sdiv < 2) || (i2sdiv > 0xFF)) + { + /* Set the default values */ + i2sdiv = 2; + i2sodd = 0; + } + + /* Write to SPIx I2SPR register the computed value */ + SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); + + /* Configure the I2S with the SPI_InitStruct values */ + tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \ + (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ + (uint16_t)I2S_InitStruct->I2S_CPOL)))); + + /* Write to SPIx I2SCFGR */ + SPIx->I2SCFGR = tmpreg; +} + +/** + * @brief Fills each SPI_InitStruct member with its default value. + * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized. + * @retval None + */ +void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) +{ +/*--------------- Reset SPI init structure parameters values -----------------*/ + /* Initialize the SPI_Direction member */ + SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; + /* initialize the SPI_Mode member */ + SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; + /* initialize the SPI_DataSize member */ + SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; + /* Initialize the SPI_CPOL member */ + SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; + /* Initialize the SPI_CPHA member */ + SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; + /* Initialize the SPI_NSS member */ + SPI_InitStruct->SPI_NSS = SPI_NSS_Hard; + /* Initialize the SPI_BaudRatePrescaler member */ + SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; + /* Initialize the SPI_FirstBit member */ + SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; + /* Initialize the SPI_CRCPolynomial member */ + SPI_InitStruct->SPI_CRCPolynomial = 7; +} + +/** + * @brief Fills each I2S_InitStruct member with its default value. + * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized. + * @retval None + */ +void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) +{ +/*--------------- Reset I2S init structure parameters values -----------------*/ + /* Initialize the I2S_Mode member */ + I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; + + /* Initialize the I2S_Standard member */ + I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; + + /* Initialize the I2S_DataFormat member */ + I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; + + /* Initialize the I2S_MCLKOutput member */ + I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; + + /* Initialize the I2S_AudioFreq member */ + I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; + + /* Initialize the I2S_CPOL member */ + I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; +} + +/** + * @brief Enables or disables the specified SPI peripheral. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI peripheral */ + SPIx->CR1 |= CR1_SPE_Set; + } + else + { + /* Disable the selected SPI peripheral */ + SPIx->CR1 &= CR1_SPE_Reset; + } +} + +/** + * @brief Enables or disables the specified SPI peripheral (in I2S mode). + * @param SPIx: where x can be 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_23_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI peripheral (in I2S mode) */ + SPIx->I2SCFGR |= I2SCFGR_I2SE_Set; + } + else + { + /* Disable the selected SPI peripheral (in I2S mode) */ + SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset; + } +} + +/** + * @brief Enables or disables the specified SPI/I2S interrupts. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled. + * This parameter can be one of the following values: + * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask + * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask + * @arg SPI_I2S_IT_ERR: Error interrupt mask + * @param NewState: new state of the specified SPI/I2S interrupt. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) +{ + uint16_t itpos = 0, itmask = 0 ; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT)); + + /* Get the SPI/I2S IT index */ + itpos = SPI_I2S_IT >> 4; + + /* Set the IT mask */ + itmask = (uint16_t)1 << (uint16_t)itpos; + + if (NewState != DISABLE) + { + /* Enable the selected SPI/I2S interrupt */ + SPIx->CR2 |= itmask; + } + else + { + /* Disable the selected SPI/I2S interrupt */ + SPIx->CR2 &= (uint16_t)~itmask; + } +} + +/** + * @brief Enables or disables the SPIx/I2Sx DMA interface. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request + * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request + * @param NewState: new state of the selected SPI/I2S DMA transfer request. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq)); + if (NewState != DISABLE) + { + /* Enable the selected SPI/I2S DMA requests */ + SPIx->CR2 |= SPI_I2S_DMAReq; + } + else + { + /* Disable the selected SPI/I2S DMA requests */ + SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq; + } +} + +/** + * @brief Transmits a Data through the SPIx/I2Sx peripheral. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param Data : Data to be transmitted. + * @retval None + */ +void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Write in the DR register the data to be sent */ + SPIx->DR = Data; +} + +/** + * @brief Returns the most recent received data by the SPIx/I2Sx peripheral. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @retval The value of the received data. + */ +uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Return the data in the DR register */ + return SPIx->DR; +} + +/** + * @brief Configures internally by software the NSS pin for the selected SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. + * This parameter can be one of the following values: + * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally + * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally + * @retval None + */ +void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft)); + if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) + { + /* Set NSS pin internally by software */ + SPIx->CR1 |= SPI_NSSInternalSoft_Set; + } + else + { + /* Reset NSS pin internally by software */ + SPIx->CR1 &= SPI_NSSInternalSoft_Reset; + } +} + +/** + * @brief Enables or disables the SS output for the selected SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx SS output. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI SS output */ + SPIx->CR2 |= CR2_SSOE_Set; + } + else + { + /* Disable the selected SPI SS output */ + SPIx->CR2 &= CR2_SSOE_Reset; + } +} + +/** + * @brief Configures the data size for the selected SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_DataSize: specifies the SPI data size. + * This parameter can be one of the following values: + * @arg SPI_DataSize_16b: Set data frame format to 16bit + * @arg SPI_DataSize_8b: Set data frame format to 8bit + * @retval None + */ +void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_DATASIZE(SPI_DataSize)); + /* Clear DFF bit */ + SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b; + /* Set new DFF bit value */ + SPIx->CR1 |= SPI_DataSize; +} + +/** + * @brief Transmit the SPIx CRC value. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @retval None + */ +void SPI_TransmitCRC(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Enable the selected SPI CRC transmission */ + SPIx->CR1 |= CR1_CRCNext_Set; +} + +/** + * @brief Enables or disables the CRC value calculation of the transferred bytes. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx CRC value calculation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI CRC calculation */ + SPIx->CR1 |= CR1_CRCEN_Set; + } + else + { + /* Disable the selected SPI CRC calculation */ + SPIx->CR1 &= CR1_CRCEN_Reset; + } +} + +/** + * @brief Returns the transmit or the receive CRC register value for the specified SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_CRC: specifies the CRC register to be read. + * This parameter can be one of the following values: + * @arg SPI_CRC_Tx: Selects Tx CRC register + * @arg SPI_CRC_Rx: Selects Rx CRC register + * @retval The selected CRC register value.. + */ +uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) +{ + uint16_t crcreg = 0; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_CRC(SPI_CRC)); + if (SPI_CRC != SPI_CRC_Rx) + { + /* Get the Tx CRC register */ + crcreg = SPIx->TXCRCR; + } + else + { + /* Get the Rx CRC register */ + crcreg = SPIx->RXCRCR; + } + /* Return the selected CRC register */ + return crcreg; +} + +/** + * @brief Returns the CRC Polynomial register value for the specified SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @retval The CRC Polynomial register value. + */ +uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Return the CRC polynomial register */ + return SPIx->CRCPR; +} + +/** + * @brief Selects the data transfer direction in bi-directional mode for the specified SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_Direction: specifies the data transfer direction in bi-directional mode. + * This parameter can be one of the following values: + * @arg SPI_Direction_Tx: Selects Tx transmission direction + * @arg SPI_Direction_Rx: Selects Rx receive direction + * @retval None + */ +void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_DIRECTION(SPI_Direction)); + if (SPI_Direction == SPI_Direction_Tx) + { + /* Set the Tx only mode */ + SPIx->CR1 |= SPI_Direction_Tx; + } + else + { + /* Set the Rx only mode */ + SPIx->CR1 &= SPI_Direction_Rx; + } +} + +/** + * @brief Checks whether the specified SPI/I2S flag is set or not. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check. + * This parameter can be one of the following values: + * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. + * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. + * @arg SPI_I2S_FLAG_BSY: Busy flag. + * @arg SPI_I2S_FLAG_OVR: Overrun flag. + * @arg SPI_FLAG_MODF: Mode Fault flag. + * @arg SPI_FLAG_CRCERR: CRC Error flag. + * @arg I2S_FLAG_UDR: Underrun Error flag. + * @arg I2S_FLAG_CHSIDE: Channel Side flag. + * @retval The new state of SPI_I2S_FLAG (SET or RESET). + */ +FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG)); + /* Check the status of the specified SPI/I2S flag */ + if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET) + { + /* SPI_I2S_FLAG is set */ + bitstatus = SET; + } + else + { + /* SPI_I2S_FLAG is reset */ + bitstatus = RESET; + } + /* Return the SPI_I2S_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the SPIx CRC Error (CRCERR) flag. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * @param SPI_I2S_FLAG: specifies the SPI flag to clear. + * This function clears only CRCERR flag. + * @note + * - OVR (OverRun error) flag is cleared by software sequence: a read + * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read + * operation to SPI_SR register (SPI_I2S_GetFlagStatus()). + * - UDR (UnderRun error) flag is cleared by a read operation to + * SPI_SR register (SPI_I2S_GetFlagStatus()). + * - MODF (Mode Fault) flag is cleared by software sequence: a read/write + * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a + * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). + * @retval None + */ +void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG)); + + /* Clear the selected SPI CRC Error (CRCERR) flag */ + SPIx->SR = (uint16_t)~SPI_I2S_FLAG; +} + +/** + * @brief Checks whether the specified SPI/I2S interrupt has occurred or not. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check. + * This parameter can be one of the following values: + * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. + * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. + * @arg SPI_I2S_IT_OVR: Overrun interrupt. + * @arg SPI_IT_MODF: Mode Fault interrupt. + * @arg SPI_IT_CRCERR: CRC Error interrupt. + * @arg I2S_IT_UDR: Underrun Error interrupt. + * @retval The new state of SPI_I2S_IT (SET or RESET). + */ +ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) +{ + ITStatus bitstatus = RESET; + uint16_t itpos = 0, itmask = 0, enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT)); + + /* Get the SPI/I2S IT index */ + itpos = 0x01 << (SPI_I2S_IT & 0x0F); + + /* Get the SPI/I2S IT mask */ + itmask = SPI_I2S_IT >> 4; + + /* Set the IT mask */ + itmask = 0x01 << itmask; + + /* Get the SPI_I2S_IT enable bit status */ + enablestatus = (SPIx->CR2 & itmask) ; + + /* Check the status of the specified SPI/I2S interrupt */ + if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus) + { + /* SPI_I2S_IT is set */ + bitstatus = SET; + } + else + { + /* SPI_I2S_IT is reset */ + bitstatus = RESET; + } + /* Return the SPI_I2S_IT status */ + return bitstatus; +} + +/** + * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. + * This function clears only CRCERR interrupt pending bit. + * @note + * - OVR (OverRun Error) interrupt pending bit is cleared by software + * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData()) + * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()). + * - UDR (UnderRun Error) interrupt pending bit is cleared by a read + * operation to SPI_SR register (SPI_I2S_GetITStatus()). + * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence: + * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus()) + * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable + * the SPI). + * @retval None + */ +void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) +{ + uint16_t itpos = 0; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT)); + + /* Get the SPI IT index */ + itpos = 0x01 << (SPI_I2S_IT & 0x0F); + + /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */ + SPIx->SR = (uint16_t)~itpos; +} +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c new file mode 100644 index 00000000..bfb4dd1d --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c @@ -0,0 +1,2890 @@ +/** + ****************************************************************************** + * @file stm32f10x_tim.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the TIM firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_tim.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup TIM + * @brief TIM driver modules + * @{ + */ + +/** @defgroup TIM_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Defines + * @{ + */ + +/* ---------------------- TIM registers bit mask ------------------------ */ +#define SMCR_ETR_Mask ((uint16_t)0x00FF) +#define CCMR_Offset ((uint16_t)0x0018) +#define CCER_CCE_Set ((uint16_t)0x0001) +#define CCER_CCNE_Set ((uint16_t)0x0004) + +/** + * @} + */ + +/** @defgroup TIM_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_FunctionPrototypes + * @{ + */ + +static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +/** + * @} + */ + +/** @defgroup TIM_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the TIMx peripheral registers to their default reset values. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @retval None + */ +void TIM_DeInit(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + + if (TIMx == TIM1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); + } + else if (TIMx == TIM2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); + } + else if (TIMx == TIM3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); + } + else if (TIMx == TIM4) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); + } + else if (TIMx == TIM5) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); + } + else if (TIMx == TIM6) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); + } + else if (TIMx == TIM7) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE); + } + else if (TIMx == TIM8) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE); + } + else if (TIMx == TIM9) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE); + } + else if (TIMx == TIM10) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE); + } + else if (TIMx == TIM11) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE); + } + else if (TIMx == TIM12) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, DISABLE); + } + else if (TIMx == TIM13) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, DISABLE); + } + else if (TIMx == TIM14) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE); + } + else if (TIMx == TIM15) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE); + } + else if (TIMx == TIM16) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE); + } + else + { + if (TIMx == TIM17) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE); + } + } +} + +/** + * @brief Initializes the TIMx Time Base Unit peripheral according to + * the specified parameters in the TIM_TimeBaseInitStruct. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef + * structure that contains the configuration information for the + * specified TIM peripheral. + * @retval None + */ +void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) +{ + uint16_t tmpcr1 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode)); + assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision)); + + tmpcr1 = TIMx->CR1; + + if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM2) || (TIMx == TIM3)|| + (TIMx == TIM4) || (TIMx == TIM5)) + { + /* Select the Counter Mode */ + tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); + tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode; + } + + if((TIMx != TIM6) && (TIMx != TIM7)) + { + /* Set the clock division */ + tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD)); + tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; + } + + TIMx->CR1 = tmpcr1; + + /* Set the Autoreload value */ + TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; + + /* Set the Prescaler value */ + TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; + + if ((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| (TIMx == TIM16) || (TIMx == TIM17)) + { + /* Set the Repetition Counter value */ + TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; + } + + /* Generate an update event to reload the Prescaler and the Repetition counter + values immediately */ + TIMx->EGR = TIM_PSCReloadMode_Immediate; +} + +/** + * @brief Initializes the TIMx Channel1 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 1: Reset the CC1E Bit */ + TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E); + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR1; + + /* Reset the Output Compare Mode Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S)); + + /* Select the Output Compare Mode */ + tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P)); + /* Set the Output Compare Polarity */ + tmpccer |= TIM_OCInitStruct->TIM_OCPolarity; + + /* Set the Output State */ + tmpccer |= TIM_OCInitStruct->TIM_OutputState; + + if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| + (TIMx == TIM16)|| (TIMx == TIM17)) + { + assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); + assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + + /* Reset the Output N Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NP)); + /* Set the Output N Polarity */ + tmpccer |= TIM_OCInitStruct->TIM_OCNPolarity; + + /* Reset the Output N State */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NE)); + /* Set the Output N State */ + tmpccer |= TIM_OCInitStruct->TIM_OutputNState; + + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N)); + + /* Set the Output Idle state */ + tmpcr2 |= TIM_OCInitStruct->TIM_OCIdleState; + /* Set the Output N Idle state */ + tmpcr2 |= TIM_OCInitStruct->TIM_OCNIdleState; + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIMx Channel2 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select + * the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E)); + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR1; + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)); + + /* Select the Output Compare Mode */ + tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P)); + /* Set the Output Compare Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4); + + /* Set the Output State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4); + + if((TIMx == TIM1) || (TIMx == TIM8)) + { + assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); + assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + + /* Reset the Output N Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP)); + /* Set the Output N Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4); + + /* Reset the Output N State */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE)); + /* Set the Output N State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4); + + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N)); + + /* Set the Output Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2); + /* Set the Output N Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2); + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIMx Channel3 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E)); + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR2 register value */ + tmpccmrx = TIMx->CCMR2; + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC3S)); + /* Select the Output Compare Mode */ + tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P)); + /* Set the Output Compare Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8); + + /* Set the Output State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8); + + if((TIMx == TIM1) || (TIMx == TIM8)) + { + assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); + assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + + /* Reset the Output N Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NP)); + /* Set the Output N Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8); + /* Reset the Output N State */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NE)); + + /* Set the Output N State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8); + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3N)); + /* Set the Output Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4); + /* Set the Output N Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4); + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIMx Channel4 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 2: Reset the CC4E Bit */ + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E)); + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR2 register value */ + tmpccmrx = TIMx->CCMR2; + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC4S)); + + /* Select the Output Compare Mode */ + tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P)); + /* Set the Output Compare Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12); + + /* Set the Output State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12); + + if((TIMx == TIM1) || (TIMx == TIM8)) + { + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + /* Reset the Output Compare IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS4)); + /* Set the Output Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6); + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIM peripheral according to the specified + * parameters in the TIM_ICInitStruct. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + /* Check the parameters */ + assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel)); + assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler)); + assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter)); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity)); + } + else + { + assert_param(IS_TIM_IC_POLARITY_LITE(TIM_ICInitStruct->TIM_ICPolarity)); + } + if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) + { + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + /* TI1 Configuration */ + TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2) + { + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* TI2 Configuration */ + TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3) + { + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* TI3 Configuration */ + TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else + { + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* TI4 Configuration */ + TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } +} + +/** + * @brief Configures the TIM peripheral according to the specified + * parameters in the TIM_ICInitStruct to measure an external PWM signal. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + uint16_t icoppositepolarity = TIM_ICPolarity_Rising; + uint16_t icoppositeselection = TIM_ICSelection_DirectTI; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Select the Opposite Input Polarity */ + if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising) + { + icoppositepolarity = TIM_ICPolarity_Falling; + } + else + { + icoppositepolarity = TIM_ICPolarity_Rising; + } + /* Select the Opposite Input */ + if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI) + { + icoppositeselection = TIM_ICSelection_IndirectTI; + } + else + { + icoppositeselection = TIM_ICSelection_DirectTI; + } + if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) + { + /* TI1 Configuration */ + TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + /* TI2 Configuration */ + TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else + { + /* TI2 Configuration */ + TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + /* TI1 Configuration */ + TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } +} + +/** + * @brief Configures the: Break feature, dead time, Lock level, the OSSI, + * the OSSR State and the AOE(automatic output enable). + * @param TIMx: where x can be 1 or 8 to select the TIM + * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that + * contains the BDTR Register configuration information for the TIM peripheral. + * @retval None + */ +void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_TIM_OSSR_STATE(TIM_BDTRInitStruct->TIM_OSSRState)); + assert_param(IS_TIM_OSSI_STATE(TIM_BDTRInitStruct->TIM_OSSIState)); + assert_param(IS_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->TIM_LOCKLevel)); + assert_param(IS_TIM_BREAK_STATE(TIM_BDTRInitStruct->TIM_Break)); + assert_param(IS_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->TIM_BreakPolarity)); + assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->TIM_AutomaticOutput)); + /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State, + the OSSI State, the dead time value and the Automatic Output Enable Bit */ + TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState | TIM_BDTRInitStruct->TIM_OSSIState | + TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime | + TIM_BDTRInitStruct->TIM_Break | TIM_BDTRInitStruct->TIM_BreakPolarity | + TIM_BDTRInitStruct->TIM_AutomaticOutput; +} + +/** + * @brief Fills each TIM_TimeBaseInitStruct member with its default value. + * @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef + * structure which will be initialized. + * @retval None + */ +void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) +{ + /* Set the default configuration */ + TIM_TimeBaseInitStruct->TIM_Period = 0xFFFF; + TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000; + TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000; +} + +/** + * @brief Fills each TIM_OCInitStruct member with its default value. + * @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will + * be initialized. + * @retval None + */ +void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + /* Set the default configuration */ + TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing; + TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable; + TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable; + TIM_OCInitStruct->TIM_Pulse = 0x0000; + TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High; + TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High; + TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset; + TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset; +} + +/** + * @brief Fills each TIM_ICInitStruct member with its default value. + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure which will + * be initialized. + * @retval None + */ +void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + /* Set the default configuration */ + TIM_ICInitStruct->TIM_Channel = TIM_Channel_1; + TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising; + TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI; + TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1; + TIM_ICInitStruct->TIM_ICFilter = 0x00; +} + +/** + * @brief Fills each TIM_BDTRInitStruct member with its default value. + * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which + * will be initialized. + * @retval None + */ +void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) +{ + /* Set the default configuration */ + TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable; + TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable; + TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF; + TIM_BDTRInitStruct->TIM_DeadTime = 0x00; + TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable; + TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low; + TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable; +} + +/** + * @brief Enables or disables the specified TIM peripheral. + * @param TIMx: where x can be 1 to 17 to select the TIMx peripheral. + * @param NewState: new state of the TIMx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the TIM Counter */ + TIMx->CR1 |= TIM_CR1_CEN; + } + else + { + /* Disable the TIM Counter */ + TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN)); + } +} + +/** + * @brief Enables or disables the TIM peripheral Main Outputs. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIMx peripheral. + * @param NewState: new state of the TIM peripheral Main Outputs. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the TIM Main Output */ + TIMx->BDTR |= TIM_BDTR_MOE; + } + else + { + /* Disable the TIM Main Output */ + TIMx->BDTR &= (uint16_t)(~((uint16_t)TIM_BDTR_MOE)); + } +} + +/** + * @brief Enables or disables the specified TIM interrupts. + * @param TIMx: where x can be 1 to 17 to select the TIMx peripheral. + * @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg TIM_IT_Update: TIM update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * @note + * - TIM6 and TIM7 can only generate an update interrupt. + * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, + * TIM_IT_CC2 or TIM_IT_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @param NewState: new state of the TIM interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_IT(TIM_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the Interrupt sources */ + TIMx->DIER |= TIM_IT; + } + else + { + /* Disable the Interrupt sources */ + TIMx->DIER &= (uint16_t)~TIM_IT; + } +} + +/** + * @brief Configures the TIMx event to be generate by software. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_EventSource: specifies the event source. + * This parameter can be one or more of the following values: + * @arg TIM_EventSource_Update: Timer update Event source + * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source + * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source + * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source + * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source + * @arg TIM_EventSource_COM: Timer COM event source + * @arg TIM_EventSource_Trigger: Timer Trigger Event source + * @arg TIM_EventSource_Break: Timer Break event source + * @note + * - TIM6 and TIM7 can only generate an update event. + * - TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1 and TIM8. + * @retval None + */ +void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource)); + + /* Set the event sources */ + TIMx->EGR = TIM_EventSource; +} + +/** + * @brief Configures the TIMx's DMA interface. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 15, 16 or 17 to select + * the TIM peripheral. + * @param TIM_DMABase: DMA Base address. + * This parameter can be one of the following values: + * @arg TIM_DMABase_CR, TIM_DMABase_CR2, TIM_DMABase_SMCR, + * TIM_DMABase_DIER, TIM1_DMABase_SR, TIM_DMABase_EGR, + * TIM_DMABase_CCMR1, TIM_DMABase_CCMR2, TIM_DMABase_CCER, + * TIM_DMABase_CNT, TIM_DMABase_PSC, TIM_DMABase_ARR, + * TIM_DMABase_RCR, TIM_DMABase_CCR1, TIM_DMABase_CCR2, + * TIM_DMABase_CCR3, TIM_DMABase_CCR4, TIM_DMABase_BDTR, + * TIM_DMABase_DCR. + * @param TIM_DMABurstLength: DMA Burst length. + * This parameter can be one value between: + * TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. + * @retval None + */ +void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST4_PERIPH(TIMx)); + assert_param(IS_TIM_DMA_BASE(TIM_DMABase)); + assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength)); + /* Set the DMA Base and the DMA Burst Length */ + TIMx->DCR = TIM_DMABase | TIM_DMABurstLength; +} + +/** + * @brief Enables or disables the TIMx's DMA Requests. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 6, 7, 8, 15, 16 or 17 + * to select the TIM peripheral. + * @param TIM_DMASource: specifies the DMA Request sources. + * This parameter can be any combination of the following values: + * @arg TIM_DMA_Update: TIM update Interrupt source + * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source + * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source + * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source + * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source + * @arg TIM_DMA_COM: TIM Commutation DMA source + * @arg TIM_DMA_Trigger: TIM Trigger DMA source + * @param NewState: new state of the DMA Request sources. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST9_PERIPH(TIMx)); + assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the DMA sources */ + TIMx->DIER |= TIM_DMASource; + } + else + { + /* Disable the DMA sources */ + TIMx->DIER &= (uint16_t)~TIM_DMASource; + } +} + +/** + * @brief Configures the TIMx internal Clock + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 + * to select the TIM peripheral. + * @retval None + */ +void TIM_InternalClockConfig(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Disable slave mode to clock the prescaler directly with the internal clock */ + TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); +} + +/** + * @brief Configures the TIMx Internal Trigger as External Clock + * @param TIMx: where x can be 1, 2, 3, 4, 5, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ITRSource: Trigger source. + * This parameter can be one of the following values: + * @param TIM_TS_ITR0: Internal Trigger 0 + * @param TIM_TS_ITR1: Internal Trigger 1 + * @param TIM_TS_ITR2: Internal Trigger 2 + * @param TIM_TS_ITR3: Internal Trigger 3 + * @retval None + */ +void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource)); + /* Select the Internal Trigger */ + TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource); + /* Select the External clock mode1 */ + TIMx->SMCR |= TIM_SlaveMode_External1; +} + +/** + * @brief Configures the TIMx Trigger as External Clock + * @param TIMx: where x can be 1, 2, 3, 4, 5, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_TIxExternalCLKSource: Trigger source. + * This parameter can be one of the following values: + * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector + * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1 + * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2 + * @param TIM_ICPolarity: specifies the TIx Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param ICFilter : specifies the filter value. + * This parameter must be a value between 0x0 and 0xF. + * @retval None + */ +void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, + uint16_t TIM_ICPolarity, uint16_t ICFilter) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_TIXCLK_SOURCE(TIM_TIxExternalCLKSource)); + assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity)); + assert_param(IS_TIM_IC_FILTER(ICFilter)); + /* Configure the Timer Input Clock Source */ + if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2) + { + TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); + } + else + { + TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); + } + /* Select the Trigger source */ + TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource); + /* Select the External clock mode1 */ + TIMx->SMCR |= TIM_SlaveMode_External1; +} + +/** + * @brief Configures the External clock Mode1 + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * @param TIM_ExtTRGPolarity: The external Trigger Polarity. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * @param ExtTRGFilter: External Trigger Filter. + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter) +{ + uint16_t tmpsmcr = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); + assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); + assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); + /* Configure the ETR Clock source */ + TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); + + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + /* Reset the SMS Bits */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); + /* Select the External clock mode1 */ + tmpsmcr |= TIM_SlaveMode_External1; + /* Select the Trigger selection : ETRF */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS)); + tmpsmcr |= TIM_TS_ETRF; + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; +} + +/** + * @brief Configures the External clock Mode2 + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * @param TIM_ExtTRGPolarity: The external Trigger Polarity. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * @param ExtTRGFilter: External Trigger Filter. + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, + uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); + assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); + assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); + /* Configure the ETR Clock source */ + TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); + /* Enable the External clock mode2 */ + TIMx->SMCR |= TIM_SMCR_ECE; +} + +/** + * @brief Configures the TIMx External Trigger (ETR). + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * @param TIM_ExtTRGPolarity: The external Trigger Polarity. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * @param ExtTRGFilter: External Trigger Filter. + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter) +{ + uint16_t tmpsmcr = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); + assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); + assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); + tmpsmcr = TIMx->SMCR; + /* Reset the ETR Bits */ + tmpsmcr &= SMCR_ETR_Mask; + /* Set the Prescaler, the Filter value and the Polarity */ + tmpsmcr |= (uint16_t)(TIM_ExtTRGPrescaler | (uint16_t)(TIM_ExtTRGPolarity | (uint16_t)(ExtTRGFilter << (uint16_t)8))); + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; +} + +/** + * @brief Configures the TIMx Prescaler. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param Prescaler: specifies the Prescaler Register value + * @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode + * This parameter can be one of the following values: + * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. + * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediately. + * @retval None + */ +void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode)); + /* Set the Prescaler value */ + TIMx->PSC = Prescaler; + /* Set or reset the UG Bit */ + TIMx->EGR = TIM_PSCReloadMode; +} + +/** + * @brief Specifies the TIMx Counter Mode to be used. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_CounterMode: specifies the Counter Mode to be used + * This parameter can be one of the following values: + * @arg TIM_CounterMode_Up: TIM Up Counting Mode + * @arg TIM_CounterMode_Down: TIM Down Counting Mode + * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1 + * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2 + * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3 + * @retval None + */ +void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode) +{ + uint16_t tmpcr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode)); + tmpcr1 = TIMx->CR1; + /* Reset the CMS and DIR Bits */ + tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); + /* Set the Counter Mode */ + tmpcr1 |= TIM_CounterMode; + /* Write to TIMx CR1 register */ + TIMx->CR1 = tmpcr1; +} + +/** + * @brief Selects the Input Trigger source + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_InputTriggerSource: The Input Trigger source. + * This parameter can be one of the following values: + * @arg TIM_TS_ITR0: Internal Trigger 0 + * @arg TIM_TS_ITR1: Internal Trigger 1 + * @arg TIM_TS_ITR2: Internal Trigger 2 + * @arg TIM_TS_ITR3: Internal Trigger 3 + * @arg TIM_TS_TI1F_ED: TI1 Edge Detector + * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 + * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + * @arg TIM_TS_ETRF: External Trigger input + * @retval None + */ +void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) +{ + uint16_t tmpsmcr = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource)); + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + /* Reset the TS Bits */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS)); + /* Set the Input Trigger source */ + tmpsmcr |= TIM_InputTriggerSource; + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; +} + +/** + * @brief Configures the TIMx Encoder Interface. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_EncoderMode: specifies the TIMx Encoder Mode. + * This parameter can be one of the following values: + * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level. + * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level. + * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending + * on the level of the other input. + * @param TIM_IC1Polarity: specifies the IC1 Polarity + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Falling: IC Falling edge. + * @arg TIM_ICPolarity_Rising: IC Rising edge. + * @param TIM_IC2Polarity: specifies the IC2 Polarity + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Falling: IC Falling edge. + * @arg TIM_ICPolarity_Rising: IC Rising edge. + * @retval None + */ +void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, + uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity) +{ + uint16_t tmpsmcr = 0; + uint16_t tmpccmr1 = 0; + uint16_t tmpccer = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST5_PERIPH(TIMx)); + assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode)); + assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity)); + assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity)); + + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = TIMx->CCMR1; + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + + /* Set the encoder Mode */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); + tmpsmcr |= TIM_EncoderMode; + + /* Select the Capture Compare 1 and the Capture Compare 2 as input */ + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S))); + tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0; + + /* Set the TI1 and the TI2 Polarities */ + tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2P))); + tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4)); + + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmr1; + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Forces the TIMx output 1 waveform to active or inactive level. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC1REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF. + * @retval None + */ +void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC1M Bits */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M); + /* Configure The Forced output Mode */ + tmpccmr1 |= TIM_ForcedAction; + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Forces the TIMx output 2 waveform to active or inactive level. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC2REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF. + * @retval None + */ +void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2M Bits */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M); + /* Configure The Forced output Mode */ + tmpccmr1 |= (uint16_t)(TIM_ForcedAction << 8); + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Forces the TIMx output 3 waveform to active or inactive level. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC3REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF. + * @retval None + */ +void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC1M Bits */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M); + /* Configure The Forced output Mode */ + tmpccmr2 |= TIM_ForcedAction; + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Forces the TIMx output 4 waveform to active or inactive level. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC4REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF. + * @retval None + */ +void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC2M Bits */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M); + /* Configure The Forced output Mode */ + tmpccmr2 |= (uint16_t)(TIM_ForcedAction << 8); + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Enables or disables TIMx peripheral Preload register on ARR. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param NewState: new state of the TIMx peripheral Preload register + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the ARR Preload Bit */ + TIMx->CR1 |= TIM_CR1_ARPE; + } + else + { + /* Reset the ARR Preload Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE); + } +} + +/** + * @brief Selects the TIM peripheral Commutation event. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIMx peripheral + * @param NewState: new state of the Commutation event. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the COM Bit */ + TIMx->CR2 |= TIM_CR2_CCUS; + } + else + { + /* Reset the COM Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCUS); + } +} + +/** + * @brief Selects the TIMx peripheral Capture Compare DMA source. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 15, 16 or 17 to select + * the TIM peripheral. + * @param NewState: new state of the Capture Compare DMA source + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST4_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the CCDS Bit */ + TIMx->CR2 |= TIM_CR2_CCDS; + } + else + { + /* Reset the CCDS Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS); + } +} + +/** + * @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8 or 15 + * to select the TIMx peripheral + * @param NewState: new state of the Capture Compare Preload Control bit + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST5_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the CCPC Bit */ + TIMx->CR2 |= TIM_CR2_CCPC; + } + else + { + /* Reset the CCPC Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCPC); + } +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR1. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC1PE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr1 |= TIM_OCPreload; + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR2. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select + * the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2PE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8); + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR3. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC3PE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr2 |= TIM_OCPreload; + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR4. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC4PE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr2 |= (uint16_t)(TIM_OCPreload << 8); + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Configures the TIMx Output Compare 1 Fast feature. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC1FE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr1 |= TIM_OCFast; + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Configures the TIMx Output Compare 2 Fast feature. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select + * the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2FE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr1 |= (uint16_t)(TIM_OCFast << 8); + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Configures the TIMx Output Compare 3 Fast feature. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR2 register value */ + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC3FE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr2 |= TIM_OCFast; + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Configures the TIMx Output Compare 4 Fast feature. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR2 register value */ + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC4FE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr2 |= (uint16_t)(TIM_OCFast << 8); + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Clears or safeguards the OCREF1 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + + tmpccmr1 = TIMx->CCMR1; + + /* Reset the OC1CE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr1 |= TIM_OCClear; + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Clears or safeguards the OCREF2 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2CE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr1 |= (uint16_t)(TIM_OCClear << 8); + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Clears or safeguards the OCREF3 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC3CE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr2 |= TIM_OCClear; + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Clears or safeguards the OCREF4 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC4CE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr2 |= (uint16_t)(TIM_OCClear << 8); + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Configures the TIMx channel 1 polarity. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC1 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC1P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P); + tmpccer |= TIM_OCPolarity; + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx Channel 1N polarity. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIM peripheral. + * @param TIM_OCNPolarity: specifies the OC1N Polarity + * This parameter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); + + tmpccer = TIMx->CCER; + /* Set or Reset the CC1NP Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1NP); + tmpccer |= TIM_OCNPolarity; + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx channel 2 polarity. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC2 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC2P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 4); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx Channel 2N polarity. + * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. + * @param TIM_OCNPolarity: specifies the OC2N Polarity + * This parameter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST1_PERIPH(TIMx)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); + + tmpccer = TIMx->CCER; + /* Set or Reset the CC2NP Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2NP); + tmpccer |= (uint16_t)(TIM_OCNPolarity << 4); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx channel 3 polarity. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC3 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC3P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 8); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx Channel 3N polarity. + * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. + * @param TIM_OCNPolarity: specifies the OC3N Polarity + * This parameter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST1_PERIPH(TIMx)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); + + tmpccer = TIMx->CCER; + /* Set or Reset the CC3NP Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3NP); + tmpccer |= (uint16_t)(TIM_OCNPolarity << 8); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx channel 4 polarity. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC4 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC4P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 12); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Enables or disables the TIM Capture Compare Channel x. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_Channel: specifies the TIM Channel + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @arg TIM_Channel_4: TIM Channel 4 + * @param TIM_CCx: specifies the TIM Channel CCxE bit new state. + * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable. + * @retval None + */ +void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) +{ + uint16_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_CHANNEL(TIM_Channel)); + assert_param(IS_TIM_CCX(TIM_CCx)); + + tmp = CCER_CCE_Set << TIM_Channel; + + /* Reset the CCxE Bit */ + TIMx->CCER &= (uint16_t)~ tmp; + + /* Set or reset the CCxE Bit */ + TIMx->CCER |= (uint16_t)(TIM_CCx << TIM_Channel); +} + +/** + * @brief Enables or disables the TIM Capture Compare Channel xN. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIM peripheral. + * @param TIM_Channel: specifies the TIM Channel + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state. + * This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable. + * @retval None + */ +void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) +{ + uint16_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_TIM_COMPLEMENTARY_CHANNEL(TIM_Channel)); + assert_param(IS_TIM_CCXN(TIM_CCxN)); + + tmp = CCER_CCNE_Set << TIM_Channel; + + /* Reset the CCxNE Bit */ + TIMx->CCER &= (uint16_t) ~tmp; + + /* Set or reset the CCxNE Bit */ + TIMx->CCER |= (uint16_t)(TIM_CCxN << TIM_Channel); +} + +/** + * @brief Selects the TIM Output Compare Mode. + * @note This function disables the selected channel before changing the Output + * Compare Mode. + * User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_Channel: specifies the TIM Channel + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @arg TIM_Channel_4: TIM Channel 4 + * @param TIM_OCMode: specifies the TIM Output Compare Mode. + * This parameter can be one of the following values: + * @arg TIM_OCMode_Timing + * @arg TIM_OCMode_Active + * @arg TIM_OCMode_Toggle + * @arg TIM_OCMode_PWM1 + * @arg TIM_OCMode_PWM2 + * @arg TIM_ForcedAction_Active + * @arg TIM_ForcedAction_InActive + * @retval None + */ +void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode) +{ + uint32_t tmp = 0; + uint16_t tmp1 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_CHANNEL(TIM_Channel)); + assert_param(IS_TIM_OCM(TIM_OCMode)); + + tmp = (uint32_t) TIMx; + tmp += CCMR_Offset; + + tmp1 = CCER_CCE_Set << (uint16_t)TIM_Channel; + + /* Disable the Channel: Reset the CCxE Bit */ + TIMx->CCER &= (uint16_t) ~tmp1; + + if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3)) + { + tmp += (TIM_Channel>>1); + + /* Reset the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M); + + /* Configure the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp |= TIM_OCMode; + } + else + { + tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1; + + /* Reset the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M); + + /* Configure the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8); + } +} + +/** + * @brief Enables or Disables the TIMx Update event. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param NewState: new state of the TIMx UDIS bit + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the Update Disable Bit */ + TIMx->CR1 |= TIM_CR1_UDIS; + } + else + { + /* Reset the Update Disable Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS); + } +} + +/** + * @brief Configures the TIMx Update Request Interrupt source. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_UpdateSource: specifies the Update source. + * This parameter can be one of the following values: + * @arg TIM_UpdateSource_Regular: Source of update is the counter overflow/underflow + or the setting of UG bit, or an update generation + through the slave mode controller. + * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. + * @retval None + */ +void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource)); + if (TIM_UpdateSource != TIM_UpdateSource_Global) + { + /* Set the URS Bit */ + TIMx->CR1 |= TIM_CR1_URS; + } + else + { + /* Reset the URS Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS); + } +} + +/** + * @brief Enables or disables the TIMx's Hall sensor interface. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param NewState: new state of the TIMx Hall sensor interface. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the TI1S Bit */ + TIMx->CR2 |= TIM_CR2_TI1S; + } + else + { + /* Reset the TI1S Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S); + } +} + +/** + * @brief Selects the TIMx's One Pulse Mode. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_OPMode: specifies the OPM Mode to be used. + * This parameter can be one of the following values: + * @arg TIM_OPMode_Single + * @arg TIM_OPMode_Repetitive + * @retval None + */ +void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_OPM_MODE(TIM_OPMode)); + /* Reset the OPM Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM); + /* Configure the OPM Mode */ + TIMx->CR1 |= TIM_OPMode; +} + +/** + * @brief Selects the TIMx Trigger Output Mode. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_TRGOSource: specifies the Trigger Output source. + * This paramter can be one of the following values: + * + * - For all TIMx + * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO). + * + * - For all TIMx except TIM6 and TIM7 + * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag + * is to be set, as soon as a capture or compare match occurs (TRGO). + * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). + * + * @retval None + */ +void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST7_PERIPH(TIMx)); + assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource)); + /* Reset the MMS Bits */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS); + /* Select the TRGO source */ + TIMx->CR2 |= TIM_TRGOSource; +} + +/** + * @brief Selects the TIMx Slave Mode. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_SlaveMode: specifies the Timer Slave Mode. + * This parameter can be one of the following values: + * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes + * the counter and triggers an update of the registers. + * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high. + * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI. + * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter. + * @retval None + */ +void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode)); + /* Reset the SMS Bits */ + TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS); + /* Select the Slave Mode */ + TIMx->SMCR |= TIM_SlaveMode; +} + +/** + * @brief Sets or Resets the TIMx Master/Slave Mode. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode. + * This parameter can be one of the following values: + * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer + * and its slaves (through TRGO). + * @arg TIM_MasterSlaveMode_Disable: No action + * @retval None + */ +void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode)); + /* Reset the MSM Bit */ + TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM); + + /* Set or Reset the MSM Bit */ + TIMx->SMCR |= TIM_MasterSlaveMode; +} + +/** + * @brief Sets the TIMx Counter Register value + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param Counter: specifies the Counter register new value. + * @retval None + */ +void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Set the Counter Register value */ + TIMx->CNT = Counter; +} + +/** + * @brief Sets the TIMx Autoreload Register value + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param Autoreload: specifies the Autoreload register new value. + * @retval None + */ +void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Set the Autoreload Register value */ + TIMx->ARR = Autoreload; +} + +/** + * @brief Sets the TIMx Capture Compare1 Register value + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param Compare1: specifies the Capture Compare1 register new value. + * @retval None + */ +void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + /* Set the Capture Compare1 Register value */ + TIMx->CCR1 = Compare1; +} + +/** + * @brief Sets the TIMx Capture Compare2 Register value + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param Compare2: specifies the Capture Compare2 register new value. + * @retval None + */ +void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Set the Capture Compare2 Register value */ + TIMx->CCR2 = Compare2; +} + +/** + * @brief Sets the TIMx Capture Compare3 Register value + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param Compare3: specifies the Capture Compare3 register new value. + * @retval None + */ +void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Set the Capture Compare3 Register value */ + TIMx->CCR3 = Compare3; +} + +/** + * @brief Sets the TIMx Capture Compare4 Register value + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param Compare4: specifies the Capture Compare4 register new value. + * @retval None + */ +void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Set the Capture Compare4 Register value */ + TIMx->CCR4 = Compare4; +} + +/** + * @brief Sets the TIMx Input Capture 1 prescaler. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture1 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC1PSC Bits */ + TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC); + /* Set the IC1PSC value */ + TIMx->CCMR1 |= TIM_ICPSC; +} + +/** + * @brief Sets the TIMx Input Capture 2 prescaler. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture2 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC2PSC Bits */ + TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC); + /* Set the IC2PSC value */ + TIMx->CCMR1 |= (uint16_t)(TIM_ICPSC << 8); +} + +/** + * @brief Sets the TIMx Input Capture 3 prescaler. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture3 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC3PSC Bits */ + TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC); + /* Set the IC3PSC value */ + TIMx->CCMR2 |= TIM_ICPSC; +} + +/** + * @brief Sets the TIMx Input Capture 4 prescaler. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture4 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC4PSC Bits */ + TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC); + /* Set the IC4PSC value */ + TIMx->CCMR2 |= (uint16_t)(TIM_ICPSC << 8); +} + +/** + * @brief Sets the TIMx Clock Division value. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select + * the TIM peripheral. + * @param TIM_CKD: specifies the clock division value. + * This parameter can be one of the following value: + * @arg TIM_CKD_DIV1: TDTS = Tck_tim + * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim + * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim + * @retval None + */ +void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_CKD_DIV(TIM_CKD)); + /* Reset the CKD Bits */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD); + /* Set the CKD value */ + TIMx->CR1 |= TIM_CKD; +} + +/** + * @brief Gets the TIMx Input Capture 1 value. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @retval Capture Compare 1 Register value. + */ +uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + /* Get the Capture 1 Register value */ + return TIMx->CCR1; +} + +/** + * @brief Gets the TIMx Input Capture 2 value. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @retval Capture Compare 2 Register value. + */ +uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Get the Capture 2 Register value */ + return TIMx->CCR2; +} + +/** + * @brief Gets the TIMx Input Capture 3 value. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @retval Capture Compare 3 Register value. + */ +uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Get the Capture 3 Register value */ + return TIMx->CCR3; +} + +/** + * @brief Gets the TIMx Input Capture 4 value. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @retval Capture Compare 4 Register value. + */ +uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Get the Capture 4 Register value */ + return TIMx->CCR4; +} + +/** + * @brief Gets the TIMx Counter value. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @retval Counter Register value. + */ +uint16_t TIM_GetCounter(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Get the Counter Register value */ + return TIMx->CNT; +} + +/** + * @brief Gets the TIMx Prescaler value. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @retval Prescaler Register value. + */ +uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Get the Prescaler Register value */ + return TIMx->PSC; +} + +/** + * @brief Checks whether the specified TIM flag is set or not. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg TIM_FLAG_Update: TIM update Flag + * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag + * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag + * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag + * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag + * @arg TIM_FLAG_COM: TIM Commutation Flag + * @arg TIM_FLAG_Trigger: TIM Trigger Flag + * @arg TIM_FLAG_Break: TIM Break Flag + * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag + * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag + * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag + * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag + * @note + * - TIM6 and TIM7 can have only one update flag. + * - TIM9, TIM12 and TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, + * TIM_FLAG_CC2 or TIM_FLAG_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. + * - TIM_FLAG_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_FLAG_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval The new state of TIM_FLAG (SET or RESET). + */ +FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) +{ + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_GET_FLAG(TIM_FLAG)); + + if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the TIMx's pending flags. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_FLAG: specifies the flag bit to clear. + * This parameter can be any combination of the following values: + * @arg TIM_FLAG_Update: TIM update Flag + * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag + * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag + * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag + * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag + * @arg TIM_FLAG_COM: TIM Commutation Flag + * @arg TIM_FLAG_Trigger: TIM Trigger Flag + * @arg TIM_FLAG_Break: TIM Break Flag + * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag + * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag + * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag + * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag + * @note + * - TIM6 and TIM7 can have only one update flag. + * - TIM9, TIM12 and TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, + * TIM_FLAG_CC2 or TIM_FLAG_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. + * - TIM_FLAG_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_FLAG_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval None + */ +void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG)); + + /* Clear the flags */ + TIMx->SR = (uint16_t)~TIM_FLAG; +} + +/** + * @brief Checks whether the TIM interrupt has occurred or not. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_IT: specifies the TIM interrupt source to check. + * This parameter can be one of the following values: + * @arg TIM_IT_Update: TIM update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * @note + * - TIM6 and TIM7 can generate only an update interrupt. + * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, + * TIM_IT_CC2 or TIM_IT_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval The new state of the TIM_IT(SET or RESET). + */ +ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) +{ + ITStatus bitstatus = RESET; + uint16_t itstatus = 0x0, itenable = 0x0; + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_GET_IT(TIM_IT)); + + itstatus = TIMx->SR & TIM_IT; + + itenable = TIMx->DIER & TIM_IT; + if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the TIMx's interrupt pending bits. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_IT: specifies the pending bit to clear. + * This parameter can be any combination of the following values: + * @arg TIM_IT_Update: TIM1 update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * @note + * - TIM6 and TIM7 can generate only an update interrupt. + * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, + * TIM_IT_CC2 or TIM_IT_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval None + */ +void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_IT(TIM_IT)); + /* Clear the IT pending Bit */ + TIMx->SR = (uint16_t)~TIM_IT; +} + +/** + * @brief Configure the TI1 as Input. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. + * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. + * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr1 = 0, tmpccer = 0; + /* Disable the Channel 1: Reset the CC1E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); + tmpccmr1 = TIMx->CCMR1; + tmpccer = TIMx->CCER; + /* Select the Input and set the filter */ + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F))); + tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); + } + else + { + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); + } + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1; + TIMx->CCER = tmpccer; +} + +/** + * @brief Configure the TI2 as Input. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. + * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. + * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0; + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E); + tmpccmr1 = TIMx->CCMR1; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 4); + /* Select the Input and set the filter */ + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F))); + tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12); + tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC2E); + } + else + { + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P | TIM_CCER_CC2NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC2E); + } + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1 ; + TIMx->CCER = tmpccer; +} + +/** + * @brief Configure the TI3 as Input. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. + * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. + * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; + /* Disable the Channel 3: Reset the CC3E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E); + tmpccmr2 = TIMx->CCMR2; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 8); + /* Select the Input and set the filter */ + tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F))); + tmpccmr2 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC3E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC3E); + } + else + { + /* Select the Polarity and set the CC3E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC3NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC3E); + } + + /* Write to TIMx CCMR2 and CCER registers */ + TIMx->CCMR2 = tmpccmr2; + TIMx->CCER = tmpccer; +} + +/** + * @brief Configure the TI4 as Input. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. + * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. + * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; + + /* Disable the Channel 4: Reset the CC4E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E); + tmpccmr2 = TIMx->CCMR2; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 12); + /* Select the Input and set the filter */ + tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F))); + tmpccmr2 |= (uint16_t)(TIM_ICSelection << 8); + tmpccmr2 |= (uint16_t)(TIM_ICFilter << 12); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC4E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC4E); + } + else + { + /* Select the Polarity and set the CC4E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC4NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC4E); + } + /* Write to TIMx CCMR2 and CCER registers */ + TIMx->CCMR2 = tmpccmr2; + TIMx->CCER = tmpccer; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c new file mode 100644 index 00000000..e794eae6 --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c @@ -0,0 +1,1058 @@ +/** + ****************************************************************************** + * @file stm32f10x_usart.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the USART firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_usart.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup USART + * @brief USART driver modules + * @{ + */ + +/** @defgroup USART_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_Defines + * @{ + */ + +#define CR1_UE_Set ((uint16_t)0x2000) /*!< USART Enable Mask */ +#define CR1_UE_Reset ((uint16_t)0xDFFF) /*!< USART Disable Mask */ + +#define CR1_WAKE_Mask ((uint16_t)0xF7FF) /*!< USART WakeUp Method Mask */ + +#define CR1_RWU_Set ((uint16_t)0x0002) /*!< USART mute mode Enable Mask */ +#define CR1_RWU_Reset ((uint16_t)0xFFFD) /*!< USART mute mode Enable Mask */ +#define CR1_SBK_Set ((uint16_t)0x0001) /*!< USART Break Character send Mask */ +#define CR1_CLEAR_Mask ((uint16_t)0xE9F3) /*!< USART CR1 Mask */ +#define CR2_Address_Mask ((uint16_t)0xFFF0) /*!< USART address Mask */ + +#define CR2_LINEN_Set ((uint16_t)0x4000) /*!< USART LIN Enable Mask */ +#define CR2_LINEN_Reset ((uint16_t)0xBFFF) /*!< USART LIN Disable Mask */ + +#define CR2_LBDL_Mask ((uint16_t)0xFFDF) /*!< USART LIN Break detection Mask */ +#define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /*!< USART CR2 STOP Bits Mask */ +#define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /*!< USART CR2 Clock Mask */ + +#define CR3_SCEN_Set ((uint16_t)0x0020) /*!< USART SC Enable Mask */ +#define CR3_SCEN_Reset ((uint16_t)0xFFDF) /*!< USART SC Disable Mask */ + +#define CR3_NACK_Set ((uint16_t)0x0010) /*!< USART SC NACK Enable Mask */ +#define CR3_NACK_Reset ((uint16_t)0xFFEF) /*!< USART SC NACK Disable Mask */ + +#define CR3_HDSEL_Set ((uint16_t)0x0008) /*!< USART Half-Duplex Enable Mask */ +#define CR3_HDSEL_Reset ((uint16_t)0xFFF7) /*!< USART Half-Duplex Disable Mask */ + +#define CR3_IRLP_Mask ((uint16_t)0xFFFB) /*!< USART IrDA LowPower mode Mask */ +#define CR3_CLEAR_Mask ((uint16_t)0xFCFF) /*!< USART CR3 Mask */ + +#define CR3_IREN_Set ((uint16_t)0x0002) /*!< USART IrDA Enable Mask */ +#define CR3_IREN_Reset ((uint16_t)0xFFFD) /*!< USART IrDA Disable Mask */ +#define GTPR_LSB_Mask ((uint16_t)0x00FF) /*!< Guard Time Register LSB Mask */ +#define GTPR_MSB_Mask ((uint16_t)0xFF00) /*!< Guard Time Register MSB Mask */ +#define IT_Mask ((uint16_t)0x001F) /*!< USART Interrupt Mask */ + +/* USART OverSampling-8 Mask */ +#define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */ +#define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */ + +/* USART One Bit Sampling Mask */ +#define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */ +#define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */ + +/** + * @} + */ + +/** @defgroup USART_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the USARTx peripheral registers to their default reset values. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @retval None + */ +void USART_DeInit(USART_TypeDef* USARTx) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + if (USARTx == USART1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE); + } + else if (USARTx == USART2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); + } + else if (USARTx == USART3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); + } + else if (USARTx == UART4) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); + } + else + { + if (USARTx == UART5) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); + } + } +} + +/** + * @brief Initializes the USARTx peripheral according to the specified + * parameters in the USART_InitStruct . + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * that contains the configuration information for the specified USART + * peripheral. + * @retval None + */ +void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) +{ + uint32_t tmpreg = 0x00, apbclock = 0x00; + uint32_t integerdivider = 0x00; + uint32_t fractionaldivider = 0x00; + uint32_t usartxbase = 0; + RCC_ClocksTypeDef RCC_ClocksStatus; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate)); + assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength)); + assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits)); + assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity)); + assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode)); + assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl)); + /* The hardware flow control is available only for USART1, USART2 and USART3 */ + if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + usartxbase = (uint32_t)USARTx; + +/*---------------------------- USART CR2 Configuration -----------------------*/ + tmpreg = USARTx->CR2; + /* Clear STOP[13:12] bits */ + tmpreg &= CR2_STOP_CLEAR_Mask; + /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/ + /* Set STOP[13:12] bits according to USART_StopBits value */ + tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits; + + /* Write to USART CR2 */ + USARTx->CR2 = (uint16_t)tmpreg; + +/*---------------------------- USART CR1 Configuration -----------------------*/ + tmpreg = USARTx->CR1; + /* Clear M, PCE, PS, TE and RE bits */ + tmpreg &= CR1_CLEAR_Mask; + /* Configure the USART Word Length, Parity and mode ----------------------- */ + /* Set the M bits according to USART_WordLength value */ + /* Set PCE and PS bits according to USART_Parity value */ + /* Set TE and RE bits according to USART_Mode value */ + tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity | + USART_InitStruct->USART_Mode; + /* Write to USART CR1 */ + USARTx->CR1 = (uint16_t)tmpreg; + +/*---------------------------- USART CR3 Configuration -----------------------*/ + tmpreg = USARTx->CR3; + /* Clear CTSE and RTSE bits */ + tmpreg &= CR3_CLEAR_Mask; + /* Configure the USART HFC -------------------------------------------------*/ + /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */ + tmpreg |= USART_InitStruct->USART_HardwareFlowControl; + /* Write to USART CR3 */ + USARTx->CR3 = (uint16_t)tmpreg; + +/*---------------------------- USART BRR Configuration -----------------------*/ + /* Configure the USART Baud Rate -------------------------------------------*/ + RCC_GetClocksFreq(&RCC_ClocksStatus); + if (usartxbase == USART1_BASE) + { + apbclock = RCC_ClocksStatus.PCLK2_Frequency; + } + else + { + apbclock = RCC_ClocksStatus.PCLK1_Frequency; + } + + /* Determine the integer part */ + if ((USARTx->CR1 & CR1_OVER8_Set) != 0) + { + /* Integer part computing in case Oversampling mode is 8 Samples */ + integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate))); + } + else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ + { + /* Integer part computing in case Oversampling mode is 16 Samples */ + integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate))); + } + tmpreg = (integerdivider / 100) << 4; + + /* Determine the fractional part */ + fractionaldivider = integerdivider - (100 * (tmpreg >> 4)); + + /* Implement the fractional part in the register */ + if ((USARTx->CR1 & CR1_OVER8_Set) != 0) + { + tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07); + } + else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ + { + tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F); + } + + /* Write to USART BRR */ + USARTx->BRR = (uint16_t)tmpreg; +} + +/** + * @brief Fills each USART_InitStruct member with its default value. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * which will be initialized. + * @retval None + */ +void USART_StructInit(USART_InitTypeDef* USART_InitStruct) +{ + /* USART_InitStruct members default value */ + USART_InitStruct->USART_BaudRate = 9600; + USART_InitStruct->USART_WordLength = USART_WordLength_8b; + USART_InitStruct->USART_StopBits = USART_StopBits_1; + USART_InitStruct->USART_Parity = USART_Parity_No ; + USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None; +} + +/** + * @brief Initializes the USARTx peripheral Clock according to the + * specified parameters in the USART_ClockInitStruct . + * @param USARTx: where x can be 1, 2, 3 to select the USART peripheral. + * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef + * structure that contains the configuration information for the specified + * USART peripheral. + * @note The Smart Card and Synchronous modes are not available for UART4 and UART5. + * @retval None + */ +void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct) +{ + uint32_t tmpreg = 0x00; + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock)); + assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL)); + assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA)); + assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit)); + +/*---------------------------- USART CR2 Configuration -----------------------*/ + tmpreg = USARTx->CR2; + /* Clear CLKEN, CPOL, CPHA and LBCL bits */ + tmpreg &= CR2_CLOCK_CLEAR_Mask; + /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/ + /* Set CLKEN bit according to USART_Clock value */ + /* Set CPOL bit according to USART_CPOL value */ + /* Set CPHA bit according to USART_CPHA value */ + /* Set LBCL bit according to USART_LastBit value */ + tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | + USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit; + /* Write to USART CR2 */ + USARTx->CR2 = (uint16_t)tmpreg; +} + +/** + * @brief Fills each USART_ClockInitStruct member with its default value. + * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef + * structure which will be initialized. + * @retval None + */ +void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) +{ + /* USART_ClockInitStruct members default value */ + USART_ClockInitStruct->USART_Clock = USART_Clock_Disable; + USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low; + USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge; + USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable; +} + +/** + * @brief Enables or disables the specified USART peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USARTx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected USART by setting the UE bit in the CR1 register */ + USARTx->CR1 |= CR1_UE_Set; + } + else + { + /* Disable the selected USART by clearing the UE bit in the CR1 register */ + USARTx->CR1 &= CR1_UE_Reset; + } +} + +/** + * @brief Enables or disables the specified USART interrupts. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IT: specifies the USART interrupt sources to be enabled or disabled. + * This parameter can be one of the following values: + * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) + * @arg USART_IT_LBD: LIN Break detection interrupt + * @arg USART_IT_TXE: Transmit Data Register empty interrupt + * @arg USART_IT_TC: Transmission complete interrupt + * @arg USART_IT_RXNE: Receive Data register not empty interrupt + * @arg USART_IT_IDLE: Idle line detection interrupt + * @arg USART_IT_PE: Parity Error interrupt + * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) + * @param NewState: new state of the specified USARTx interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState) +{ + uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00; + uint32_t usartxbase = 0x00; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_CONFIG_IT(USART_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + /* The CTS interrupt is not available for UART4 and UART5 */ + if (USART_IT == USART_IT_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + usartxbase = (uint32_t)USARTx; + + /* Get the USART register index */ + usartreg = (((uint8_t)USART_IT) >> 0x05); + + /* Get the interrupt position */ + itpos = USART_IT & IT_Mask; + itmask = (((uint32_t)0x01) << itpos); + + if (usartreg == 0x01) /* The IT is in CR1 register */ + { + usartxbase += 0x0C; + } + else if (usartreg == 0x02) /* The IT is in CR2 register */ + { + usartxbase += 0x10; + } + else /* The IT is in CR3 register */ + { + usartxbase += 0x14; + } + if (NewState != DISABLE) + { + *(__IO uint32_t*)usartxbase |= itmask; + } + else + { + *(__IO uint32_t*)usartxbase &= ~itmask; + } +} + +/** + * @brief Enables or disables the USARTs DMA interface. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_DMAReq: specifies the DMA request. + * This parameter can be any combination of the following values: + * @arg USART_DMAReq_Tx: USART DMA transmit request + * @arg USART_DMAReq_Rx: USART DMA receive request + * @param NewState: new state of the DMA Request sources. + * This parameter can be: ENABLE or DISABLE. + * @note The DMA mode is not available for UART5 except in the STM32 + * High density value line devices(STM32F10X_HD_VL). + * @retval None + */ +void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_DMAREQ(USART_DMAReq)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the DMA transfer for selected requests by setting the DMAT and/or + DMAR bits in the USART CR3 register */ + USARTx->CR3 |= USART_DMAReq; + } + else + { + /* Disable the DMA transfer for selected requests by clearing the DMAT and/or + DMAR bits in the USART CR3 register */ + USARTx->CR3 &= (uint16_t)~USART_DMAReq; + } +} + +/** + * @brief Sets the address of the USART node. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_Address: Indicates the address of the USART node. + * @retval None + */ +void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_ADDRESS(USART_Address)); + + /* Clear the USART address */ + USARTx->CR2 &= CR2_Address_Mask; + /* Set the USART address node */ + USARTx->CR2 |= USART_Address; +} + +/** + * @brief Selects the USART WakeUp method. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_WakeUp: specifies the USART wakeup method. + * This parameter can be one of the following values: + * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection + * @arg USART_WakeUp_AddressMark: WakeUp by an address mark + * @retval None + */ +void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_WAKEUP(USART_WakeUp)); + + USARTx->CR1 &= CR1_WAKE_Mask; + USARTx->CR1 |= USART_WakeUp; +} + +/** + * @brief Determines if the USART is in mute mode or not. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART mute mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the USART mute mode by setting the RWU bit in the CR1 register */ + USARTx->CR1 |= CR1_RWU_Set; + } + else + { + /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */ + USARTx->CR1 &= CR1_RWU_Reset; + } +} + +/** + * @brief Sets the USART LIN Break detection length. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_LINBreakDetectLength: specifies the LIN break detection length. + * This parameter can be one of the following values: + * @arg USART_LINBreakDetectLength_10b: 10-bit break detection + * @arg USART_LINBreakDetectLength_11b: 11-bit break detection + * @retval None + */ +void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength)); + + USARTx->CR2 &= CR2_LBDL_Mask; + USARTx->CR2 |= USART_LINBreakDetectLength; +} + +/** + * @brief Enables or disables the USARTs LIN mode. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART LIN mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ + USARTx->CR2 |= CR2_LINEN_Set; + } + else + { + /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */ + USARTx->CR2 &= CR2_LINEN_Reset; + } +} + +/** + * @brief Transmits single data through the USARTx peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param Data: the data to transmit. + * @retval None + */ +void USART_SendData(USART_TypeDef* USARTx, uint16_t Data) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_DATA(Data)); + + /* Transmit Data */ + USARTx->DR = (Data & (uint16_t)0x01FF); +} + +/** + * @brief Returns the most recent received data by the USARTx peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @retval The received data. + */ +uint16_t USART_ReceiveData(USART_TypeDef* USARTx) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + /* Receive Data */ + return (uint16_t)(USARTx->DR & (uint16_t)0x01FF); +} + +/** + * @brief Transmits break characters. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @retval None + */ +void USART_SendBreak(USART_TypeDef* USARTx) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + /* Send break characters */ + USARTx->CR1 |= CR1_SBK_Set; +} + +/** + * @brief Sets the specified USART guard time. + * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. + * @param USART_GuardTime: specifies the guard time. + * @note The guard time bits are not available for UART4 and UART5. + * @retval None + */ +void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime) +{ + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + + /* Clear the USART Guard time */ + USARTx->GTPR &= GTPR_LSB_Mask; + /* Set the USART guard time */ + USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08); +} + +/** + * @brief Sets the system clock prescaler. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_Prescaler: specifies the prescaler clock. + * @note The function is used for IrDA mode with UART4 and UART5. + * @retval None + */ +void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + /* Clear the USART prescaler */ + USARTx->GTPR &= GTPR_MSB_Mask; + /* Set the USART prescaler */ + USARTx->GTPR |= USART_Prescaler; +} + +/** + * @brief Enables or disables the USARTs Smart Card mode. + * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. + * @param NewState: new state of the Smart Card mode. + * This parameter can be: ENABLE or DISABLE. + * @note The Smart Card mode is not available for UART4 and UART5. + * @retval None + */ +void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the SC mode by setting the SCEN bit in the CR3 register */ + USARTx->CR3 |= CR3_SCEN_Set; + } + else + { + /* Disable the SC mode by clearing the SCEN bit in the CR3 register */ + USARTx->CR3 &= CR3_SCEN_Reset; + } +} + +/** + * @brief Enables or disables NACK transmission. + * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. + * @param NewState: new state of the NACK transmission. + * This parameter can be: ENABLE or DISABLE. + * @note The Smart Card mode is not available for UART4 and UART5. + * @retval None + */ +void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the NACK transmission by setting the NACK bit in the CR3 register */ + USARTx->CR3 |= CR3_NACK_Set; + } + else + { + /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */ + USARTx->CR3 &= CR3_NACK_Reset; + } +} + +/** + * @brief Enables or disables the USARTs Half Duplex communication. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART Communication. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ + USARTx->CR3 |= CR3_HDSEL_Set; + } + else + { + /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */ + USARTx->CR3 &= CR3_HDSEL_Reset; + } +} + + +/** + * @brief Enables or disables the USART's 8x oversampling mode. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART one bit sampling method. + * This parameter can be: ENABLE or DISABLE. + * @note + * This function has to be called before calling USART_Init() + * function in order to have correct baudrate Divider value. + * @retval None + */ +void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */ + USARTx->CR1 |= CR1_OVER8_Set; + } + else + { + /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */ + USARTx->CR1 &= CR1_OVER8_Reset; + } +} + +/** + * @brief Enables or disables the USART's one bit sampling method. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART one bit sampling method. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */ + USARTx->CR3 |= CR3_ONEBITE_Set; + } + else + { + /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */ + USARTx->CR3 &= CR3_ONEBITE_Reset; + } +} + +/** + * @brief Configures the USART's IrDA interface. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IrDAMode: specifies the IrDA mode. + * This parameter can be one of the following values: + * @arg USART_IrDAMode_LowPower + * @arg USART_IrDAMode_Normal + * @retval None + */ +void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_IRDA_MODE(USART_IrDAMode)); + + USARTx->CR3 &= CR3_IRLP_Mask; + USARTx->CR3 |= USART_IrDAMode; +} + +/** + * @brief Enables or disables the USART's IrDA interface. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the IrDA mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the IrDA mode by setting the IREN bit in the CR3 register */ + USARTx->CR3 |= CR3_IREN_Set; + } + else + { + /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */ + USARTx->CR3 &= CR3_IREN_Reset; + } +} + +/** + * @brief Checks whether the specified USART flag is set or not. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) + * @arg USART_FLAG_LBD: LIN Break detection flag + * @arg USART_FLAG_TXE: Transmit data register empty flag + * @arg USART_FLAG_TC: Transmission Complete flag + * @arg USART_FLAG_RXNE: Receive data register not empty flag + * @arg USART_FLAG_IDLE: Idle Line detection flag + * @arg USART_FLAG_ORE: OverRun Error flag + * @arg USART_FLAG_NE: Noise Error flag + * @arg USART_FLAG_FE: Framing Error flag + * @arg USART_FLAG_PE: Parity Error flag + * @retval The new state of USART_FLAG (SET or RESET). + */ +FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_FLAG(USART_FLAG)); + /* The CTS flag is not available for UART4 and UART5 */ + if (USART_FLAG == USART_FLAG_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the USARTx's pending flags. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). + * @arg USART_FLAG_LBD: LIN Break detection flag. + * @arg USART_FLAG_TC: Transmission Complete flag. + * @arg USART_FLAG_RXNE: Receive data register not empty flag. + * + * @note + * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun + * error) and IDLE (Idle line detected) flags are cleared by software + * sequence: a read operation to USART_SR register (USART_GetFlagStatus()) + * followed by a read operation to USART_DR register (USART_ReceiveData()). + * - RXNE flag can be also cleared by a read to the USART_DR register + * (USART_ReceiveData()). + * - TC flag can be also cleared by software sequence: a read operation to + * USART_SR register (USART_GetFlagStatus()) followed by a write operation + * to USART_DR register (USART_SendData()). + * - TXE flag is cleared only by a write to the USART_DR register + * (USART_SendData()). + * @retval None + */ +void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_CLEAR_FLAG(USART_FLAG)); + /* The CTS flag is not available for UART4 and UART5 */ + if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + USARTx->SR = (uint16_t)~USART_FLAG; +} + +/** + * @brief Checks whether the specified USART interrupt has occurred or not. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IT: specifies the USART interrupt source to check. + * This parameter can be one of the following values: + * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) + * @arg USART_IT_LBD: LIN Break detection interrupt + * @arg USART_IT_TXE: Tansmit Data Register empty interrupt + * @arg USART_IT_TC: Transmission complete interrupt + * @arg USART_IT_RXNE: Receive Data register not empty interrupt + * @arg USART_IT_IDLE: Idle line detection interrupt + * @arg USART_IT_ORE: OverRun Error interrupt + * @arg USART_IT_NE: Noise Error interrupt + * @arg USART_IT_FE: Framing Error interrupt + * @arg USART_IT_PE: Parity Error interrupt + * @retval The new state of USART_IT (SET or RESET). + */ +ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT) +{ + uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00; + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_GET_IT(USART_IT)); + /* The CTS interrupt is not available for UART4 and UART5 */ + if (USART_IT == USART_IT_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + /* Get the USART register index */ + usartreg = (((uint8_t)USART_IT) >> 0x05); + /* Get the interrupt position */ + itmask = USART_IT & IT_Mask; + itmask = (uint32_t)0x01 << itmask; + + if (usartreg == 0x01) /* The IT is in CR1 register */ + { + itmask &= USARTx->CR1; + } + else if (usartreg == 0x02) /* The IT is in CR2 register */ + { + itmask &= USARTx->CR2; + } + else /* The IT is in CR3 register */ + { + itmask &= USARTx->CR3; + } + + bitpos = USART_IT >> 0x08; + bitpos = (uint32_t)0x01 << bitpos; + bitpos &= USARTx->SR; + if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/** + * @brief Clears the USARTx's interrupt pending bits. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IT: specifies the interrupt pending bit to clear. + * This parameter can be one of the following values: + * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) + * @arg USART_IT_LBD: LIN Break detection interrupt + * @arg USART_IT_TC: Transmission complete interrupt. + * @arg USART_IT_RXNE: Receive Data register not empty interrupt. + * + * @note + * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun + * error) and IDLE (Idle line detected) pending bits are cleared by + * software sequence: a read operation to USART_SR register + * (USART_GetITStatus()) followed by a read operation to USART_DR register + * (USART_ReceiveData()). + * - RXNE pending bit can be also cleared by a read to the USART_DR register + * (USART_ReceiveData()). + * - TC pending bit can be also cleared by software sequence: a read + * operation to USART_SR register (USART_GetITStatus()) followed by a write + * operation to USART_DR register (USART_SendData()). + * - TXE pending bit is cleared only by a write to the USART_DR register + * (USART_SendData()). + * @retval None + */ +void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT) +{ + uint16_t bitpos = 0x00, itmask = 0x00; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_CLEAR_IT(USART_IT)); + /* The CTS interrupt is not available for UART4 and UART5 */ + if (USART_IT == USART_IT_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + bitpos = USART_IT >> 0x08; + itmask = ((uint16_t)0x01 << (uint16_t)bitpos); + USARTx->SR = (uint16_t)~itmask; +} +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c new file mode 100644 index 00000000..4a901e4e --- /dev/null +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c @@ -0,0 +1,224 @@ +/** + ****************************************************************************** + * @file stm32f10x_wwdg.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the WWDG firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_wwdg.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup WWDG + * @brief WWDG driver modules + * @{ + */ + +/** @defgroup WWDG_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_Defines + * @{ + */ + +/* ----------- WWDG registers bit address in the alias region ----------- */ +#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) + +/* Alias word address of EWI bit */ +#define CFR_OFFSET (WWDG_OFFSET + 0x04) +#define EWI_BitNumber 0x09 +#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) + +/* --------------------- WWDG registers bit mask ------------------------ */ + +/* CR register bit mask */ +#define CR_WDGA_Set ((uint32_t)0x00000080) + +/* CFR register bit mask */ +#define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) +#define CFR_W_Mask ((uint32_t)0xFFFFFF80) +#define BIT_Mask ((uint8_t)0x7F) + +/** + * @} + */ + +/** @defgroup WWDG_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the WWDG peripheral registers to their default reset values. + * @param None + * @retval None + */ +void WWDG_DeInit(void) +{ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); +} + +/** + * @brief Sets the WWDG Prescaler. + * @param WWDG_Prescaler: specifies the WWDG Prescaler. + * This parameter can be one of the following values: + * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 + * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 + * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 + * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 + * @retval None + */ +void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); + /* Clear WDGTB[1:0] bits */ + tmpreg = WWDG->CFR & CFR_WDGTB_Mask; + /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ + tmpreg |= WWDG_Prescaler; + /* Store the new value */ + WWDG->CFR = tmpreg; +} + +/** + * @brief Sets the WWDG window value. + * @param WindowValue: specifies the window value to be compared to the downcounter. + * This parameter value must be lower than 0x80. + * @retval None + */ +void WWDG_SetWindowValue(uint8_t WindowValue) +{ + __IO uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); + /* Clear W[6:0] bits */ + + tmpreg = WWDG->CFR & CFR_W_Mask; + + /* Set W[6:0] bits according to WindowValue value */ + tmpreg |= WindowValue & (uint32_t) BIT_Mask; + + /* Store the new value */ + WWDG->CFR = tmpreg; +} + +/** + * @brief Enables the WWDG Early Wakeup interrupt(EWI). + * @param None + * @retval None + */ +void WWDG_EnableIT(void) +{ + *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; +} + +/** + * @brief Sets the WWDG counter value. + * @param Counter: specifies the watchdog counter value. + * This parameter must be a number between 0x40 and 0x7F. + * @retval None + */ +void WWDG_SetCounter(uint8_t Counter) +{ + /* Check the parameters */ + assert_param(IS_WWDG_COUNTER(Counter)); + /* Write to T[6:0] bits to configure the counter value, no need to do + a read-modify-write; writing a 0 to WDGA bit does nothing */ + WWDG->CR = Counter & BIT_Mask; +} + +/** + * @brief Enables WWDG and load the counter value. + * @param Counter: specifies the watchdog counter value. + * This parameter must be a number between 0x40 and 0x7F. + * @retval None + */ +void WWDG_Enable(uint8_t Counter) +{ + /* Check the parameters */ + assert_param(IS_WWDG_COUNTER(Counter)); + WWDG->CR = CR_WDGA_Set | Counter; +} + +/** + * @brief Checks whether the Early Wakeup interrupt flag is set or not. + * @param None + * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) + */ +FlagStatus WWDG_GetFlagStatus(void) +{ + return (FlagStatus)(WWDG->SR); +} + +/** + * @brief Clears Early Wakeup interrupt flag. + * @param None + * @retval None + */ +void WWDG_ClearFlag(void) +{ + WWDG->SR = (uint32_t)RESET; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/output/pro.bin b/firmware/stm32-esp/output/pro.bin new file mode 100644 index 0000000000000000000000000000000000000000..d69c2399e0b54ff929a572231eb8529b85b0afe2 GIT binary patch literal 14508 zcmch84R{;XmG-@(ku;WNdlWk$Cng@*P9i6Sia=WjLNk^e+0G9(kakN;w@RB*rGF?C zs1trNPC_duq$EJw&~|qdpe?k}b-cKnmYOJODS@`EoRBS)Ql`7K27CEBPE4f8*64fB zm248a?X&xQ&-0CP&zyViIp>~x&bfE)+;I*$nYNNM#phv41xgjlKe(7OG@mK#UDusn zrVP4^^iP*FrL~SJABXJ!@3JxQxBHyk$do%#{)n<(`P;nzTiajDdeh9h<1Fi7?XSW| zhu}X~htcjr-5&YNUoC9C6h1mWz)hCri#z8{9#6EhhBG7TV0F|Jm7}%MLdGg+QFUm^ zn|4?4s6&=5))uf>D|?{JV&#n%i*%22`R~)$qV1#UpPlxsJ966d!He4-Id%GS{=oi8 z3H55;I$`*JcDmXTnJ}vPq}0YH9ar!0e8bZ=+PkiObo<{uGU<*>U)$|*PP*^z8omEw zdD6RXp;P*Yu2I*A+ea^W|KOP7{KA;q`<2T3D%(eUFAR@vpY^>-iT`M_ip&z!E7yGF||i;UJ>*EK3H<=>8sx*U&;du8bX_U&K4$)04^ zH?ofYp*O61nZ~1MM-qb=S;P_XrfCeU>ExK~+%P6P{{6xy=KM>m^a^n$hBSZcm~>5I z=$Cb`m{ ziih5g-AvwLi=^L$e#*2&ds|i8=n?q{GySNK9qs<-)68Jaj~-66>vf$>IjmWnCEC>| z`*X$=%XuyGy?j{xX`;RJ;IGCtIgpbld^zv9|1b{(B1+`pF)#n+MO~w8eb=a}g%2~0 zc-h#`y45z;{D_czM>DmlgEjNMIL>6{w|ZUcIOF&EKiWDc!iTA6$^vWcebH}4eFqQb zdQV9v>^P+@-2*RNmzAScQGL|IT1U(IbJ52hO8YubNIFTr zd~<|5)!L1%ufD0QWVl0e?L#Asxz@PXx=b^!Tio%$8*a9*UA_GA@R<{Z%x!jE3saV( zXp7`mv@2Ln8Yh46)sK#A4lU<6T^re>C)$gxft+NqK%yP@(`n+6_UcNc7BOVaa=JI( zYH{8hOSJdK10{?xb#QiPGVB>{o6Q3n#&-Lph7qYc3oz@}r>aDoTx$FLIc=YQs!X); zz^@!6_wjSuu764$Voh9UL6qfO=TWBh#XH^XB!}&(&lv-Wb_ujuaZi}RkH|5>QC8we z46-IRzxHb0;BNFqL(sl1%L8=3H!I;@$e0BdJewx$rGm4~sWB^Xc0=9k1I~+IKjG8{ zCoQXx*<}|pU$wie8<)CQ7c!Iio2+uFklASShC=2>d+3dXUdZfyn(VysMvtxzhU1m1 z=jh(e ztYBM(d}h3m7<4ZvYxcbSO#HyON0!Ih8wPZoFu|^`cO{~Gu6JD$iM|##St{9HoFsJRlfzG<;2Ie(qPaN55Y~^E2+Y@HP zg(g}>g-pZto^Q>2Wx#2+`5)VG?T(C2Chc)gT2vl5jM>mc1dhW1-w|Pu7w6bhKsD=1t3@yEZ+)Nx8Y>=H$&+M7@FZ z&1%&7#g8{sYN13+H2lThL?QD?;nJQfqMkM>D|uUxJ(27mw`0!rb~C0WIn!Rm{X;0X z0LL6*<(-|$j!2hf20GTW#$D@`jhK=2xZ8Nt&C@AI?xeDj))Qs@uJy!!31rJV%XGJBD%jU+*!%~_pD$YKJ z_R!$mRogf7I9t3ZT^-*QsgC(BDv!(Yha=@NzS-ACcq4G%8s+jp+!22;5{NZkR2z53 zAB)t+S~siB&a|)16K8QL;)#WZ0&yws15Yg|92}t`wpneH;yWV};f(rJ2Y0$>RaG_K zuLmrL?CcD*-4p+ISGb>sv zGK8bh?uBBI7_4eM+QS#{9=2#+x(1PuCd^M9ecSxREYHz#Sw5k!?D>wqt!IwDC^C!l zaWl}H#VqY%Rz3f!u9q2%jhk93%ho4`5MlOZy<>)EfaZORnNp_`K@l-$EaxOzVvt+z z$=O%W7Be%1nOS?X8nbRHUkFwW`#M@TOPl$a6j*N@*}P3)2aMJ&YzxhQ(|E73JfML4 znn^85v(s_nKd{!;X6G9T#O7M$|A$dpkZY8a7j$!Lb5064AkkZ(r$~)f$gF#sc`3i{ z?sp>NYXWhs+Rc+J5N_C=W!hRmuI|mZ7fi$O#4RtMznV2KOv@+=iX%o;ivD{YdOuL|qTxS6;JvZv8iJI5>G~oUd1h9I@YyIASl2 zK-)yZcU{~uVO%CP$zyw4FFSZ${96w9$+FegM|kYn5x2PiY{Vh%hewLGvsqi1A8}x1 zS22vo;)fXX4zdP*AG>d12ajVHdnu1~P3-?9M-S{$wwFKHS;zOX2Yo;04?Y+^JxexE@M*gY@G1K^;MZ*qIA}Kj4%jKc-L?w&xP2wyV?ye?wgmiP zoBG;sKLdEX?Ew6yeGKqc!SjGUANXE70Qgm#_7=MYJ!yM@-)(;iaGT)SYJUm%9dxvc1nef9?dKWHxo3<>@& z0oMpUo%RaQqxK@efS~IFUL{(uuwMiH{dNz$_w6Z~dCjO-JgpA?8}4O-GiV>x2ht?ODJtuzLZk?Kc4bPyTMe3gJVKy#=`2{w3gl%#%G&08@P<4^{QCTd06&yp z4tQOjvaUN%*}GQsvMNu}Zx^slP+EmlozQ=!fGuKN?-e{t#fT~d{bB)|1zeE-GxRiy z-t8&Mmb)jXv*pZB6N4_S&}AJwxiYyn!U78R6<^9RYf0W=((c=x-%$5>`0NQ<`ya=e zkLR)@uw0us7LdS>Dc5tu0t*Zi$|e9W3ZgKNwz^=GvZ3HO50(Db>32g5lq6 zntk(!Zmu)2yWI3pmZjDitt&bBs!J^ohAW3_jIIeQ(QTBO4cdXX%OZVOmZj610-AcW zrgh(pXRU*>?v5X)H+6w_HE0tfMSJWndb?-y*@6q_JUqsg-ssL~d>(s`<5lbuIN$3w z9mC)NCYgNCv*XNtXq;7vR>t;}T7gL>+jDH3DeWuytIMOzY>UR~q&>6E`rOX(`dpvI ztl8PC+M;dW2}`donalU}wtW}a`{uHJ+uF*`^rDPI`oEpFLuw?iL=O| zDMyE%B!4q&{ZASD4A$%=Z%%#Oi0+DB82x6r`Ghnnh_Vsji7c;)yI4Uh%wj07`6Q^gVcHub#Z513Sx2YKX`50FN0c zy|a0YS)Z9&3fY@-1V5LXzXtJjA=dBRpDYAjC-%R+wY9KJO838A-PJsN0DI~s+u_M+R-2>4U+L;s*E>|Ua@hSM|P}up>G~du0*?S)uD`RS~ zJpK8)w+56YubfcExuRGF<nr_Ww%9>(2HJ3>z7I@a0c;cB7W>$5i z^-7-J8@_&63CaV@;B|zloV<)BChGOOf{?25pukGwYQc zy?x|z`(3V+!Q{qdGOQeLHsXfUEY|qTR10ol)-Q52YyT+Vf8>HmeO~G`t-im@1$%%G zFzYwDIQRwx$FP7e~;XU}EjgX&z?Xl`~=Y?ZWO4oOcg6 zI)s-#og+VlbD>i2AOA_QPjzrfCuLcOQP%kThT7;cME$}1>>2$2{IQ1Fjb#B9`MEp) z`x*Qz`HIG4;C}}Ez4>Pve2o=?=k~mBhJI__+te8SbweQfJh;Aq75w#q>Wkk#LDb`* z{u`*DJdgStP+tV~!{% z6TocOHmnP5;r^(hsAv9@lW(6oKA?n* zfkNhodDJX=hGLxUG?OtGl#NNpf`jmq=hD7`?ymMTg`V$aCF3KF8*p0n)>JTQC~Qn; z8}XENl^vWsdy06au~yzU&~?VVd5f{6aVa=o5}X^8=W}$Nst-?dJPVGStP43G>qaDk zIOY52EK#amEHDax!0 zWL6b2%U`0tPf+VXod>E~qAnKH#h@+$RVh(5LA?T0I`D;!cuG4@)4!H9v62-}+48s-++1)!i5kgDqV@!8 zO{h6U?YnkpMw1Mi{_*LeO&=_2+F7!xU2tzN*;FNJca&^eD{8l%V^cLWeI9!cnq%1Q zS$AeDN>3qOn_nM{Jlo;2a9)2Yz<4J zDWl-GAr>0AbVtLU3f8RejyrV~XOCyI%7I&Cas7%>YCex;uWx+ZwS&OBVeu1vQx zUnxi!x6D}6?yOtqkNGjOO|~D;DmycGN_t>-)~oN%R_I+5v4FhS`2Y{>&iYm9F>1ee ziU;VPn3#-gxVokxs#L zCeMTFa1Hu6K2@Z=1&VvPh>zrP;ya8yx-E7m`|-ltw7Xu*8vCVSpw#{w@Xi&||5B2E z0hC##)?-4t70)L-^ITpE(EXWw>`vw2g4>u$+8jaOaM#2ZcPK=SxjA^`FGfr10oj5siuHqBsdS8Uc4xjG2*T!>=&J<;wEpEm81bMF= zCooTB71nyD9+9Ekd?M=s=F%(Ia%3LPbk6dIR^%SD9yxna0P#@~9o+#;QYk|nD#hof zJmnp;ww&EM#AK#h$bVOq2RdXsGu!3?8GY5;GPL`3n(=eG{g9oj&g*iC9C&L=37`$S z=juhu>v+@IAG0&JNX!kK$0r8AjI&K1NW#{`7>5E|pCez#NSgyW zd4W#WUZ~bz?R+eR(SChuyasKmET~1=JtceV@(W=ftzcY-j}Q$y7bPFPI>o<6)+!7> zMj@+JVQnR><-*!!=UD46S^I~xu728Yh+OWV?+4|b<*Qi(zS9IN(%{W-T6wi4nH)y>-|GNdwV9ri|w_w)Ca_4@xVAes=R(x;4w|(?m zMW>PUCXO@1id8Ye5KeSIFCEk5Uq%_2v7Tc0PgtvAuWt#7Be(=$U#&RtWt zc7M1c{b;y6-9K)0De2nP`@+t&A5ap|G2CD!9IKLZBC|nrr3pIH4HNnop9f7cb|$yo z?MX^^?+<&RMM+n#+5`CtKuJJ8T(*UOnFo5eg(#;k#`<_U3dV`QV$qowMMbGW(LrxR z>7aMk3)Wy3eUSEI%=$q#d64e<*`E#gI;5meE_+e!+_mo7y88yO>s=(B2v4w9ZYUzU zmkEfi3)hhtT7t@X{d}p^kN1Dn&-F9?Ok|7w=;!ov#Uc9k zMscL?hUfPaDfRPG_P-m?mG2tQ{F#1IrGC8U^y4~2bA|GQzN_qXB14b~;>&Jd>jb-| z7cuYc3zRVN9X;tOeMhI00sYKpW*s>luEtj)Ctu*oIZyG$-n6v1BE5ZQwO;1=s?L%j zz5F0M$nkAAF|@s}T0cGFK%0ec!;r2nNy|KNKb}pb%?(0&~91Vx#mn^lcK+w}4 zEBI=1?$&bvcXNx9LFJ!h%7Ba?EA@jiGF|6}{ z%yv!uAymkG50v?nFVGI5Eg+u$nX|vV8qe!A*Fv`~1!p>IXO`Q~u06KqwXF6q-tabe zS@X(6cS+z0nzTzeoGnWJ_AC$nakz-%BuMNMLbv^HB-SGZtJAM#-`Iv{%ik@F>hRt# z&lWPTWQ+K-XPsLAZFXi^PSRqD&|S1!h+)561(_$$kvVu4dxb(#=83Z$yoJoYlVr)A z;Fp4v!*=GvY`^#(f9uQr(4(ZKU~SqFT$GlBSEil8HR(R{J6XIrV;9`mqu~sK!TuF_ ztw*m*4QPpq;OP?*Y`INvRS7PCiR=8++6eSM3bfVsOde>K0r} zgf6AT<(lET0$eout4yW^jdQJTpPgx= z-Z^?_TK{%Cv-0eV#IO)rL%?rob6 z7%2QW~QpWtLCVi{fpkHb*=4VZ*xvaui zs&m6()aeWLI>U`8naX02I`^tKG+oyi(=|=6H>jnIxmdm7!X59X_^mJq;yOo|D8(N& z2vY=tRVL+PErLLr=~vXM>MK%3K7T5pH|R~eUx!NYG~qYbU`%2a%*R%w@T6tS4Wc&b zjiA>H{Bqp^JOpvURK>)c~!e5RpkXA_HcyW+WFWYpPmj0AbBP{G73od- zC9s`A1C6*rzs!&XKl!jIH7yOMn1%~f*izI}&O$;nal(f>ORY#PXATtjRPcE9M$#i} zKHrAvu>|yhu9@}wr|nt5YB3hdnI_mnIRoG7)C1Y6A?noA3IjH<4`AGGL{&p^qgOW~ z03LlAV!aF!z*&n9s;+?^(gUdlI`9-KxVD-)Od>3SZ55)Z6Hc_PCSfG4qlimImQDXa z(2G<+$#CjU-I0PIMk?#FPWix~k8qbhjW=NoB<3&#zo5%{y%?tkCdqVmJG))ovPPqY zEc{6Pvc6E1FaRM^xpBpZ;GGgk@{)R!uo zMILH#rd&GF>5|#)CY)Bf3RV%(wcE|21v*1lOv6u~W_s7X{#OWG=~9pH|u!ke07 zYMwR?iKWu-lUEef9o`VgYwXl@C$G?LSrKf6#`g31XVj{bDKNg7oaHwa@4rsG$YE#6V*SVSsuf9Db$rFH{k?>l1=OfF3J z7S{fp~+23 z6J(l5zJ8y&gWA=kD%znR?+HHHpDYf%j?!(a8Y`Ge?5wiI*QV}(Oj~6O)v@!tM{QHv zlw{E!qB*>dnRuYeIiXmF3zQ(DaQ;jOr9H!S_ z{d!H)g+Eto5_1sh=Y2eR8F+pZLjJ_$hT50JRtEMgL9nU-)zM z>o2xLnq8PukweA)1b zCe0uEZM6w6UK$)tKaHyVUB7o)ip-4d<4wGcehjk!7EiGxm$}SJ`HL(TbwMGSQr)MB zS%XjZMQO+%qh^w=D&~;z5c_xDEPl^X7L)JT4q+5VP5$L_tz3J~{G$xuyq4FB5efb# zyrDnIy|4gRF<;2zrQW8{BjW-xg74A~`(P3MSeB*|FR;5s?cL*ZqJ;}i(m*;5>Vf?V z{wed z36s=c3|g#h8I#G5#8nstQ^B^I};P z|70(7;UBUm3+sw9C7vo&3kF6<11zvAvqUd4aYJ<*2^YiP7pA?AJzlq3S*N7sp zp`?gzm?rr5*Diy#nC@)C-LJ};pZD5ifUNdSmyiY=!R^^kWUv9(~*;EUS+dss(gKY;t7$n$M$U+3*yz8BzOk*(35Mgvr0joF3G<1tUeP)iYm;nC-1tMV`q|yNrNt}PV zO~&q`C=?DOl}EBPRK&<(P}~d?Mlu2d6SPtUF)R^5Axo3;-52)5vV + + + + + + + + diff --git a/firmware/stm32-esp/project/pro.uvgui.LS-PC b/firmware/stm32-esp/project/pro.uvgui.LS-PC new file mode 100644 index 00000000..45aedf3e --- /dev/null +++ b/firmware/stm32-esp/project/pro.uvgui.LS-PC @@ -0,0 +1,3642 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
+ + + + + + 38003 + Registers + 140 130 + + + 346 + Code Coverage + 1008 160 + + + 204 + Performance Analyzer + 1168 + + + + + + 35141 + Event Statistics + + 200 50 700 + + + 1506 + Symbols + + 80 80 80 + + + 1936 + Watch 1 + + 200 133 133 + + + 1937 + Watch 2 + + 200 133 133 + + + 1935 + Call Stack + Locals + + 200 133 133 + + + 2506 + Trace Data + + 75 135 130 95 70 230 200 150 + + + 466 + Source Browser + 500 + 166 + + + + + + + + 0 + 0 + 0 + 50 + 16 + + + + + + + 44 + 2 + 3 + + -1 + -1 + + + -1 + -1 + + + 72 + -258 + 1676 + 1174 + + + + 0 + + 563 + 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000400000003000000010000003A433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C6D61696E2E6300000000066D61696E2E6300000000C5D4F200FFFFFFFF43433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C706D5F75617274332E63000000000A706D5F75617274332E6300000000FFDC7800FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000BECEA100FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000F0A0A100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD5000100000000000000020000001A0000006F00000080070000D2030000 + + + + 0 + Build + + -1 + -1 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F4000000530000008E050000DF000000 + + + 16 + FBFFFFFFC0000000950400004C010000 + + + + 1005 + 1005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D7FEFFFF530000001A000000EC030000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 109 + 109 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D7FEFFFF530000001A000000EC030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 1465 + 1465 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 1936 + 1936 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 10060000090200009B0C000098030000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 195 + 195 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D7FEFFFF530000001A000000EC030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 196 + 196 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D7FEFFFF530000001A000000EC030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 00000000EC0300007C070000B7040000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 00000000FC0100008E050000A5020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 00000000EC0300007C07000066050000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 35141 + 35141 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 38003 + 38003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000007000000012010000B6030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 00000000EC0300007C07000066050000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 436 + 436 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 1D00000035020000250600008D030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 437 + 437 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 440 + 440 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 463 + 463 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 1D00000035020000250600008D030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 466 + 466 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 1D00000035020000250600008D030000 + + + 16 + 010100001D0100001D0200004F030000 + + + + 470 + 470 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + F7000000730000008B050000C0000000 + + + 16 + 010100001D010000C8030000A9010000 + + + + 50000 + 50000 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50001 + 50001 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50002 + 50002 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50003 + 50003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50004 + 50004 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50005 + 50005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50006 + 50006 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50007 + 50007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50008 + 50008 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50009 + 50009 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50010 + 50010 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50011 + 50011 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50012 + 50012 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50013 + 50013 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50014 + 50014 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50015 + 50015 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50016 + 50016 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50017 + 50017 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50018 + 50018 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 50019 + 50019 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + A1040000730000008B050000F6010000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 972 + 0 + 8192 + 2 + + 16 + 030000001C000000DA03000038000000 + + + 16 + 64020000F40000003806000031010000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000D103000080070000EA030000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 1 + 0 + 0 + 0 + 478 + 0 + 8192 + 0 + + 16 + 0700000000000000F00100001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 0 + 0 + 0 + 0 + 626 + 0 + 8192 + 1 + + 16 + 000000001C0000007D02000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 824 + 824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001C0200008B05000086020000 + + + 16 + 010100001D010000F1010000E5010000 + + + + 3355 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFFF4000000DF0000008E050000E3000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000FBFFFFFFC0000000950400004C010000F4000000530000008E050000DF0000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF9A040000530000009E04000015020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C3000001800040000000000000A5030000C000000095040000820200009E040000530000008E0500001502000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF120100005300000016010000B603000000000000020000000400000001000000B8FEFFFF2D060000FFFFFFFF01000000739400000180001000000000000007FFFFFFC00000001900000023040000000000005300000012010000B603000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000F80100008E050000FC01000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000007FFFFFF69020000950400001203000000000000FC0100008E050000A502000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC7020000FC010000CB020000A502000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000001102000028060000150200000000000001000000040000000100000002FDFFFF8A000000FFFFFFFF03000000B4010000D2010000CF0100000180008000000000000021FFFFFF820200002F050000190400001A0000001502000028060000AC0300000000000040820046030000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000007000000C7000000008000000100000000000000080400007C0700008205000001000000010000000100000077940000008000000100000000000000080400007C07000082050000010000000100000001000000C5000000008000000100000000000000080400007C070000D3040000010000000100000001000000ED0300000010000001000000D7FEFFFF6F0000001A000000080400000100000000000000010000006D0000000010000001000000D7FEFFFF6F0000001A00000008040000000000000000000000000000C30000000010000001000000D7FEFFFF6F0000001A00000008040000000000000000000000000000C40000000010000001000000D7FEFFFF6F0000001A0000000804000000000000010000000000000000000000 + + + 59392 + File + + 2860 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000004000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000001153696D4C43445F53686F775F504D325F35960000000000000011001153696D4C43445F53686F775F504D325F350844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000400160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65CC030000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 966 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000004001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000000000000100000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF00010000000000000001000000000000000100000001807202000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A000000000000000000000000000000000100000001000000018072020000000000000B0000000000000000000000000000000001000000010000000180BE010000000000000C000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2373 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000007200000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 1920 + 1080 + + + + 1 + Debug + + -1 + -1 + 1 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + CD0300005300000080070000B6030000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1005 + 1005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 76FFFFFF530000001A000000D1030000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 109 + 109 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000073000000A700000055020000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 1465 + 1465 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1936 + 1936 + 1 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + CD0300007000000080070000B6030000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 195 + 195 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000073000000A700000055020000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 196 + 196 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000073000000A700000055020000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 1D00000083030000C1050000A8030000 + + + 16 + 22000000390000001A0200009A000000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 1A0000004C02000080070000B6030000 + + + 16 + 22000000390000001A0200009A000000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 1D00000083030000C1050000A8030000 + + + 16 + 22000000390000001A0200009A000000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 35141 + 35141 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 38003 + 38003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 76FFFFFF530000001A000000D1030000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 1A000000B603000080070000FD030000 + + + 16 + 22000000390000001A0200009A000000 + + + + 436 + 436 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 1D00000083030000C1050000A8030000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 437 + 437 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 440 + 440 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 463 + 463 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 1D00000083030000C1050000A8030000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 466 + 466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 1D00000083030000C1050000A8030000 + + + 16 + 2200000039000000EB000000BE010000 + + + + 470 + 470 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + B10000006F0000008F04000094000000 + + + 16 + 22000000390000001A0200009A000000 + + + + 50000 + 50000 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50001 + 50001 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50002 + 50002 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50003 + 50003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50004 + 50004 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50005 + 50005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50006 + 50006 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50007 + 50007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50008 + 50008 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50009 + 50009 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50010 + 50010 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50011 + 50011 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50012 + 50012 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50013 + 50013 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50014 + 50014 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50015 + 50015 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50016 + 50016 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50017 + 50017 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50018 + 50018 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 50019 + 50019 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4A0300006F000000EE0300004C010000 + + + 16 + 2200000039000000CC000000C6000000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 345 + 0 + 8192 + 0 + + 16 + 0000000000000000D70300001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000D103000080070000EA030000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 0 + 0 + 0 + 0 + 303 + 0 + 8192 + 1 + + 16 + 000000001C000000E901000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 1 + 0 + 0 + 0 + 321 + 0 + 8192 + 2 + + 16 + 020000001C0000007F02000038000000 + + + 16 + 0A0000000A0000005301000064000000 + + + + 824 + 824 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + D0030000730000006F0A00009E010000 + + + 16 + 3701000010020000DC0700007A030000 + + + + 3438 + 000000000C000000000000000040000001000000FFFFFFFFFFFFFFFFC903000053000000CD030000B603000001000000020000100400000001000000000000000000000000000000000000000000000001000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB090000FFFF02000B004354616262656450616E6500400000010000003701000010020000DC0700007A030000CD0300005300000080070000B603000000000000404100560F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031010000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFF0500000000000000000000000000000000000000000000000000000001000000FFFFFFFF8F07000001000000FFFFFFFF8F070000000000000020000000000000FFFFFFFFFFFFFFFFAE000000B300000092040000B7000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D60100004589000001800020000000000000AE0000006B00000092040000CF000000AE0000004F00000092040000B30000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF430300004F000000470300006B010000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C3000001800040000000000000470300006B000000F103000087010000470300004F000000F10300006B01000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFFAA00000053000000AE00000074020000000000000200000004000000010000000000000000000000FFFFFFFF030000006D000000C3000000C400000001800010000000000000000000006F000000AA000000900200000000000053000000AA0000007402000000000000404100460300000005426F6F6B73000000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7300000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657300000000C400000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF6D00000001000000FFFFFFFF6D000000000000000080000000000000FFFFFFFFFFFFFFFF1A00000048020000800700004C0200000000000001000010040000000100000044FEFFFF9201000000000000000000000000000001000000C60000000000000001000000000000000000000001000000FFFFFFFF480300003E0300004C030000B303000000000000020000000400000000000000000000000000000000000000000000000000000001000000C600000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000005F030000C405000063030000000000000100000004000000010000000000000000000000FFFFFFFF05000000C5000000C7000000B4010000D2010000CF010000018000800000000000001A0000007F030000C4050000E30300001A00000063030000C4050000C70300000000000040820046050000000C4275696C64204F757470757400000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC50000000000000003000000ED030000001000000100000076FFFFFF6F0000001A000000ED03000001000000000000000000000073940000001000000100000076FFFFFF6F0000001A000000ED0300000000000001000000010000007794000000800000010000001A000000D2030000800700001904000001000000010000000100000000000000 + + + 59392 + File + + 2848 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000844656275674C6F67960000000000000011000844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740E54696D335F4D305F4152525365740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000100150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C6559010000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 955 + 00200000000000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000000002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050FFFFFFFF00960000000000000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000000240000000000000000000000000000000001000000010000000180A8010000000000004E00000000000000000000000000000000010000000100000001807202000000000000530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C642F010000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF00010000000000000001000000000000000100000001807202000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A000000000000000000000000000000000100000001000000018072020000000000000B0000000000000000000000000000000001000000010000000180BE010000000000000C000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2362 + 00200000010000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000004002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000020000002D0000000000000000000000000000000001000000010000000180F07F0000020000002E0000000000000000000000000000000001000000010000000180E8880000020000003700000000000000000000000000000000010000000100000001803B010000020000002F0000000000000000000000000000000001000000010000000180BB8A00000200000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000002000100310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F0100000200000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000002000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000020000007200000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000002000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756741010000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 1920 + 1080 + + + + + + 1 + 0 + + 100 + 3 + + ..\user\main.c + 22 + 25 + 59 + 1 + + 0 + + + ..\user\show\pm_uart3.c + 21 + 1 + 32 + 1 + + 0 + + + ..\user\show\simulation_lcd.c + 20 + 1057 + 1063 + 1 + + 0 + + + C:\Users\LS-PC\Desktop\ShowEnvir-V2.0-20210829\user\show\simulation_lcd.h + 0 + 64 + 56 + 1 + + 0 + + + + + diff --git a/firmware/stm32-esp/project/pro.uvgui.RJYF-PC b/firmware/stm32-esp/project/pro.uvgui.RJYF-PC new file mode 100644 index 00000000..85b8f3b2 --- /dev/null +++ b/firmware/stm32-esp/project/pro.uvgui.RJYF-PC @@ -0,0 +1,3696 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
+ + + + + + 38003 + Registers + 188 122 + + + 346 + Code Coverage + 1408 818 + + + 204 + Performance Analyzer + 1568 235 235 188 + + + + + + 35141 + Event Statistics + + 200 50 700 + + + 1506 + Symbols + + 106 106 106 + + + 1936 + Watch 1 + + 200 288 133 + + + 1937 + Watch 2 + + 200 133 133 + + + 1935 + Call Stack + Locals + + 200 133 133 + + + 2506 + Trace Data + + 75 135 130 95 70 230 200 150 + + + 466 + Source Browser + 500 + 166 + + + + + + + + 0 + 0 + 0 + 50 + 16 + + + + + + + 44 + 2 + 3 + + -32000 + -32000 + + + -1 + -1 + + + 60 + 1079 + 2741 + 1422 + + + + 0 + + 1181 + 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000A000000020000000100000048433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C6E6574776F726B666C6F772E63000000000D6E6574776F726B666C6F772E6300000000C5D4F200FFFFFFFF4A433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C657370383236365F75617274322E63000000000F657370383236365F75617274322E6300000000FFDC7800FFFFFFFF3C433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C6D61696E2E6300000000066D61696E2E6300000000BECEA100FFFFFFFF49433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C636F6D5C75617274325F726563656976652E63000000000F75617274325F726563656976652E6300000000F0A0A100FFFFFFFF47433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C646174615C62617369635F646174612E68000000000C62617369635F646174612E6800000000BCA8E100FFFFFFFF46433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C64726976655C6273705F706F72742E63000000000A6273705F706F72742E63000000009CC1B600FFFFFFFF44433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C626174746572792E630000000009626174746572792E6300000000D9ADC200FFFFFFFF45433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C706D5F75617274332E63000000000A706D5F75617274332E6300000000EAD6A300FFFFFFFF4B433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000EAD6A300FFFFFFFF4B433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000B3A6BE00FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD500010000000000000002000000470100006F000000000A00003A050000 + + + + 0 + Build + + -1 + -1 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 44010000530000006E07000015010000 + + + 16 + 440100006F0000006E07000031010000 + + + + 1005 + 1005 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000007300000040010000FF040000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 109 + 109 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000007300000040010000FF040000 + + + 16 + 85000000A100000001020000AB030000 + + + + 1465 + 1465 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 1936 + 1936 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 195 + 195 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000007300000040010000FF040000 + + + 16 + 85000000A100000001020000AB030000 + + + + 196 + 196 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000007300000040010000FF040000 + + + 16 + 85000000A100000001020000AB030000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 0000000030050000000A000015060000 + + + 16 + 9FFEFFFF3A0500009F08000001070000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 00000000D40200006E070000B3030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 000000001E050000000A000003060000 + + + 16 + 9FFEFFFF3A0500009F08000001070000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 35141 + 35141 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 38003 + 38003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000730000003D010000FF040000 + + + 16 + 85000000A100000001020000AB030000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000AD030000F107000010050000 + + + 16 + 9FFEFFFF3A0500009F08000001070000 + + + + 436 + 436 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000AD030000F107000010050000 + + + 16 + 9FFEFFFF3A0500009F08000001070000 + + + + 437 + 437 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 440 + 440 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 463 + 463 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000AD030000F107000010050000 + + + 16 + 9FFEFFFF3A0500009F08000001070000 + + + + 466 + 466 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000AD030000F107000010050000 + + + 16 + 9FFEFFFF3A0500009F08000001070000 + + + + 470 + 470 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 47010000730000006B070000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 50000 + 50000 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50001 + 50001 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50002 + 50002 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50003 + 50003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50004 + 50004 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50005 + 50005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50006 + 50006 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50007 + 50007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50008 + 50008 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50009 + 50009 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50010 + 50010 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50011 + 50011 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50012 + 50012 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50013 + 50013 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50014 + 50014 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50015 + 50015 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50016 + 50016 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50017 + 50017 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50018 + 50018 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50019 + 50019 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 957 + 0 + 8192 + 0 + + 16 + 0000000000000000C80300001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0000000039050000000A000052050000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 1 + 0 + 0 + 0 + 478 + 0 + 8192 + 1 + + 16 + 010000001C000000EA01000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 0 + 0 + 0 + 0 + 626 + 0 + 8192 + 2 + + 16 + 00000000380000007D02000054000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 824 + 824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000F40200006B07000094030000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 3337 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFF44010000150100006E07000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000440100006F0000006E0700003101000044010000530000006E070000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFF4301000053000000470100001E05000001000000020000100400000001000000C2FEFFFFB7080000FFFFFFFF05000000ED0300006D000000C3000000C40000007394000001800010000001000000000000006F000000400100003A0500000000000053000000430100001E0500000000000040410056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273000000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF00000000D00200006E070000D402000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000F00200006E070000CF03000000000000D40200006E070000B303000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFB7030000D4020000BB030000B303000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF0000000089030000F40700008D03000000000000010000000400000001000000000000000000000000000000000000000000000001000000FFFFFFFF04000000B4010000D2010000CF010000779400000180008000000000000000000000A9030000F40700004B050000000000008D030000F40700002F0500000000000040820046040000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000002000000C50000000080000001000000000000004C050000000A000031060000010000000000000001000000C70000000080000001000000000000003A050000000A00001F06000000000000010000000000000000000000 + + + 59392 + File + + 2544 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE8030000000000000000000000000000000000000000000000010000000100000096000000020020500000000009553347657454696D65960000000000000014000D53696D756C6174696F6E4C43440F53696D4C43445F447261774C696E650953696D4C43445F523308506F7765725F424C09553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640C43616E416C6C4672616D65730000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 966 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF00010000000000000001000000000000000100000001807202000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A000000000000000000000000000000000100000001000000018072020000000000000B0000000000000000000000000000000001000000010000000180BE010000000000000C000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2373 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720000000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7200000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720000000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720000000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730000000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72000000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 2560 + 1440 + + + + 1 + Debug + + -1 + -1 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4401000053000000000A000015010000 + + + 16 + 440100006F000000000A000031010000 + + + + 1005 + 1005 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000730000003D0100001A050000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 109 + 109 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000730000003D0100001A050000 + + + 16 + 85000000A100000001020000AB030000 + + + + 1465 + 1465 + 1 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000FD0900001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1936 + 1936 + 1 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000FD0900001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 195 + 195 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000730000003D0100001A050000 + + + 16 + 85000000A100000001020000AB030000 + + + + 196 + 196 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000730000003D0100001A050000 + + + 16 + 85000000A100000001020000AB030000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 03000000110300006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 00000000EA020000000A000039050000 + + + 16 + 85000000A10000003C04000063010000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000110300006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 35141 + 35141 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 38003 + 38003 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000730000003D0100001A050000 + + + 16 + 85000000A100000001020000AB030000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000110300006B07000094030000 + + + 16 + 85000000A10000003C04000063010000 + + + + 436 + 436 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000110300006B07000094030000 + + + 16 + 85000000A100000001020000AB030000 + + + + 437 + 437 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 440 + 440 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 463 + 463 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000110300006B07000094030000 + + + 16 + 85000000A100000001020000AB030000 + + + + 466 + 466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 03000000110300006B07000094030000 + + + 16 + 85000000A100000001020000AB030000 + + + + 470 + 470 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4701000073000000FD090000F6000000 + + + 16 + 85000000A10000003C04000063010000 + + + + 50000 + 50000 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50001 + 50001 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50002 + 50002 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50003 + 50003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50004 + 50004 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50005 + 50005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50006 + 50006 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50007 + 50007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50008 + 50008 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50009 + 50009 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50010 + 50010 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50011 + 50011 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50012 + 50012 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50013 + 50013 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50014 + 50014 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50015 + 50015 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50016 + 50016 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50017 + 50017 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50018 + 50018 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 50019 + 50019 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 31060000730000006B070000CE020000 + + + 16 + 85000000A1000000C5010000B1010000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 957 + 0 + 8192 + 0 + + 16 + 0000000000000000C80300001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0000000039050000000A000052050000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 0 + 0 + 0 + 0 + 478 + 0 + 8192 + 1 + + 16 + 000000001C000000E901000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 1 + 0 + 0 + 0 + 626 + 0 + 8192 + 2 + + 16 + 050000001C0000008202000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 824 + 824 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + F407000073000000940B00001A050000 + + + 16 + E0070000C4020000D40F000013050000 + + + + 3415 + 000000000C000000000000000020000000000000FFFFFFFFFFFFFFFF4401000015010000000A000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000440100006F000000000A0000310100004401000053000000000A0000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFF40010000530000004401000039050000010000000200001004000000010000000000000000000000FFFFFFFF05000000ED0300006D000000C3000000C40000007394000001800010000001000000000000006F0000004001000055050000000000005300000040010000390500000000000040410056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73000000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7300000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657300000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273010000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF00000000E6020000000A0000EA02000000000000010000000400000001000000FBFCFFFFAB01000000000000000000000000000001000000C60000000000000001000000000000000000000001000000FFFFFFFF000500005A040000040500003905000000000000020000000400000000000000000000000000000000000000000000000000000001000000C600000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF00000000ED0200006E070000F1020000000000000100000004000000010000000000000000000000FFFFFFFF06000000C5000000C7000000B4010000D2010000CF0100007794000001800080000000000000000000000D0300006E070000CF03000000000000F10200006E070000B30300000000000040820046060000000C4275696C64204F757470757400000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0642726F777365000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC5000000000000000040000001000000FFFFFFFFFFFFFFFFED07000053000000F10700003905000001000000020000100400000001000000A2F9FFFF5302000000000000000000000000000001000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB090000018000400000010000005A0600006F000000000A000055050000F107000053000000000A00003905000000000000404100560F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031010000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203101000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFF0500000000000000000000000000000000000000000000000000000001000000FFFFFFFF8F07000001000000FFFFFFFF8F070000000000000000000000000000 + + + 59392 + File + + 2563 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE8030000000000000000000000000000000000000000000000010000000100000096000000020020500000000009553347657454696D659600000000000000140009553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640C43616E416C6C4672616D65730D43616E46696C74657253656C311243414E5F4143465F49445F5245475F53454C1143616E52784275664E6F7453746F7265641043414E5F52455345545F454E41424C450000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000100150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 955 + 00200000000000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000000002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050FFFFFFFF00960000000000000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000000240000000000000000000000000000000001000000010000000180A8010000000000004E00000000000000000000000000000000010000000100000001807202000000000000530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF00010000000000000001000000000000000100000001807202000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A000000000000000000000000000000000100000001000000018072020000000000000B0000000000000000000000000000000001000000010000000180BE010000000000000C000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2362 + 00200000010000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000004002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000020000002D0000000000000000000000000000000001000000010000000180F07F0000020000002E0000000000000000000000000000000001000000010000000180E8880000020000003700000000000000000000000000000000010000000100000001803B010000020001002F0000000000000000000000000000000001000000010000000180BB8A00000200000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000002000100310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F0100000200010032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000002000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000020000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000002000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 2560 + 1440 + + + + + + 1 + 0 + + 100 + 2 + + ..\user\show\networkflow.c + 0 + 1 + 14 + 1 + + 0 + + + ..\user\show\esp8266_uart2.c + 12 + 48 + 102 + 1 + + 0 + + + ..\user\main.c + 16 + 10 + 37 + 1 + 2 + 0 + + + ..\user\com\uart2_receive.c + 28 + 32 + 32 + 1 + + 0 + + + ..\user\data\basic_data.h + 23 + 21 + 31 + 1 + + 0 + + + ..\user\drive\bsp_port.c + 11 + 13 + 24 + 1 + + 0 + + + ..\user\show\battery.c + 0 + 47 + 56 + 1 + + 0 + + + ..\user\show\pm_uart3.c + 34 + 7 + 70 + 1 + + 0 + + + ..\user\show\simulation_lcd.h + 20 + 62 + 66 + 1 + + 0 + + + ..\user\show\simulation_lcd.c + 8 + 1 + 5 + 1 + + 0 + + + + + diff --git a/firmware/stm32-esp/project/pro.uvgui.RJYS-PC b/firmware/stm32-esp/project/pro.uvgui.RJYS-PC new file mode 100644 index 00000000..e60b2e3c --- /dev/null +++ b/firmware/stm32-esp/project/pro.uvgui.RJYS-PC @@ -0,0 +1,1919 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
+ + + + + + 38003 + Registers + 122 78 + + + 346 + Code Coverage + 860 160 + + + 204 + Performance Analyzer + 1020 + + + + + + 35141 + Event Statistics + + 200 50 700 + + + 1506 + Symbols + + 70 70 70 + + + 1936 + Watch 1 + + 200 133 133 + + + 1937 + Watch 2 + + 200 133 133 + + + 1935 + Call Stack + Locals + + 200 133 133 + + + 2506 + Trace Data + + 75 135 130 95 70 230 200 150 + + + 466 + Source Browser + 500 + 300 + + + + + + + + 1 + 1 + 0 + 0 + -1 + + + + + + + 44 + 2 + 3 + + -32000 + -32000 + + + -1 + -1 + + + 39 + 47 + 1475 + 1052 + + + + 0 + + 807 + 01000000040000000100000001000000010000000100000000000000020000000000000001000000010000000000000028000000280000000100000006000000000000000100000044433A5C55736572735C524A59532D50435C4465736B746F705C53686F77456E7669724170702056312E302032303230303833302D313230305C757365725C6D61696E2E6300000000066D61696E2E6300000000C5D4F200FFFFFFFF53433A5C55736572735C524A59532D50435C4465736B746F705C53686F77456E7669724170702056312E302032303230303833302D313230305C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000FFDC7800FFFFFFFF53433A5C55736572735C524A59532D50435C4465736B746F705C53686F77456E7669724170702056312E302032303230303833302D313230305C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000BECEA100FFFFFFFF48433A5C55736572735C524A59532D50435C4465736B746F705C53686F77456E7669724170702056312E302032303230303833302D313230305C757365725C73686F775C6C63642E6300000000056C63642E6300000000F0A0A100FFFFFFFF48433A5C55736572735C524A59532D50435C4465736B746F705C53686F77456E7669724170702056312E302032303230303833302D313230305C757365725C73686F775C6C63642E6800000000056C63642E6800000000BCA8E100FFFFFFFF54433A5C55736572735C524A59532D50435C4465736B746F705C53686F77456E7669724170702056312E302032303230303833302D313230305C757365725C73686F775C73696D756C6174696F6E5F666F6E742E68000000001173696D756C6174696F6E5F666F6E742E68000000009CC1B600FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD500010000000000000002000000160000006600000090060000C9030000 + + + + 0 + Build + + -1 + -1 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D60000004F000000DC040000DA000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1005 + 1005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4AFFFFFF4F00000016000000B2030000 + + + 16 + A4000000BB0000007601000080010000 + + + + 109 + 109 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4AFFFFFF4F00000016000000A9030000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 1465 + 1465 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000001C020000DC040000A7020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1466 + 1466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1467 + 1467 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1468 + 1468 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1506 + 1506 + 0 + 0 + 0 + 0 + 32767 + 0 + 16384 + 0 + + 16 + 0D04000066000000D9040000FB000000 + + + 16 + A4000000BB0000007601000080010000 + + + + 1913 + 1913 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D900000066000000D9040000C1000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1935 + 1935 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 030000001F020000D90400008E020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 1936 + 1936 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 1937 + 1937 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 1939 + 1939 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1940 + 1940 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1941 + 1941 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 1942 + 1942 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 195 + 195 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4AFFFFFF4F00000016000000A9030000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 196 + 196 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 4AFFFFFF4F00000016000000A9030000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 197 + 197 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 16000000B90300009006000030040000 + + + 16 + A4000000BB0000001203000046010000 + + + + 198 + 198 + 0 + 0 + 0 + 0 + 32767 + 0 + 32768 + 0 + + 16 + 0000000008020000DC040000A7020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 199 + 199 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000004B030000D9040000A6030000 + + + 16 + A4000000BB0000001203000046010000 + + + + 203 + 203 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + D600000063000000DC040000DA000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 204 + 204 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D900000066000000D9040000C1000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 221 + 221 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000000000000000000000000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 2506 + 2506 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0A04000063000000DC04000018020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 2507 + 2507 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 000000001C020000DC04000093020000 + + + 16 + A4000000BB0000001203000046010000 + + + + 343 + 343 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D900000066000000D9040000C1000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 346 + 346 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D900000066000000D9040000C1000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 35141 + 35141 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D600000063000000DC040000DA000000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35824 + 35824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D900000066000000D9040000C1000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 35885 + 35885 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35886 + 35886 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35887 + 35887 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35888 + 35888 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35889 + 35889 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35890 + 35890 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35891 + 35891 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35892 + 35892 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35893 + 35893 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35894 + 35894 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35895 + 35895 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35896 + 35896 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35897 + 35897 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35898 + 35898 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35899 + 35899 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35900 + 35900 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35901 + 35901 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35902 + 35902 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35903 + 35903 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35904 + 35904 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 35905 + 35905 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 38003 + 38003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0300000066000000CF0000008E020000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 38007 + 38007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0000000048030000DC040000BF030000 + + + 16 + A4000000BB0000001203000046010000 + + + + 436 + 436 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000004B030000D9040000A6030000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 437 + 437 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 440 + 440 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 463 + 463 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000004B030000D9040000A6030000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 466 + 466 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000004B030000D9040000A6030000 + + + 16 + A4000000BB0000009C010000EA020000 + + + + 470 + 470 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + D900000066000000D9040000C1000000 + + + 16 + A4000000BB0000001203000046010000 + + + + 50000 + 50000 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50001 + 50001 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50002 + 50002 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50003 + 50003 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50004 + 50004 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50005 + 50005 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50006 + 50006 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50007 + 50007 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50008 + 50008 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50009 + 50009 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50010 + 50010 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50011 + 50011 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50012 + 50012 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50013 + 50013 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50014 + 50014 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50015 + 50015 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50016 + 50016 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50017 + 50017 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50018 + 50018 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 50019 + 50019 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 0D04000066000000D904000070010000 + + + 16 + A4000000BB0000007601000080010000 + + + + 59392 + 59392 + 1 + 0 + 0 + 0 + 32767 + 0 + 8192 + 0 + + 16 + 0000000000000000C40300001C000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59393 + 0 + 1 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 00000000C803000090060000DB030000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59399 + 59399 + 1 + 0 + 0 + 0 + 32767 + 0 + 8192 + 1 + + 16 + 000000001C000000E701000038000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 59400 + 59400 + 0 + 0 + 0 + 0 + 32767 + 0 + 8192 + 2 + + 16 + 00000000380000006F02000054000000 + + + 16 + 0A0000000A0000006E0000006E000000 + + + + 824 + 824 + 0 + 0 + 0 + 0 + 32767 + 0 + 4096 + 0 + + 16 + 030000001F020000D90400007A020000 + + + 16 + A4000000BB0000007601000080010000 + + + + 3345 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFFD6000000DA000000DC040000DE000000000000000100001004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000A4000000BB0000001203000046010000D60000004F000000DC040000DA0000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF060400004F0000000A04000018020000000000000200001004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C3000001800040000000000000A4000000BB00000076010000800100000A0400004F000000DC0400001802000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFFD20000004F000000D6000000A9030000000000000200001004000000010000000000000000000000FFFFFFFF010000007394000001800010000000000000A4000000BB0000007601000080010000000000004F000000D2000000A903000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF0000000004020000DC0400000802000000000000010000100400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB09000001800080000000000000A4000000BB00000076010000800100000000000008020000DC040000A702000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFF6E0200000802000072020000A702000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF00000000300300008405000034030000000000000100001004000000010000000000000000000000FFFFFFFF05000000C7000000B4010000D2010000CF0100007794000001800080000000000000A4000000BB0000001203000046010000000000003403000084050000BF0300000000000040820046050000000D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC700000001000000FFFFFFFFC70000000000000005000000C5000000008000000100000016000000D00300009006000047040000010000000100000001000000ED03000000100000010000004AFFFFFF6600000016000000C90300000100000000000000010000006D00000000100000010000004AFFFFFF6600000016000000C0030000000000000000000000000000C300000000100000010000004AFFFFFF6600000016000000C0030000000000000000000000000000C400000000100000010000004AFFFFFF6600000016000000C003000000000000010000000000000000000000 + + + 59392 + File + + 2388 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000C506F736974696F6E4D61726B960000000000000008000C506F736974696F6E4D61726B0C43686172676553746174757312497076345374725472616E7366657244656310534F4654574152455F56455253494F4E1867697A50726F746F636F6C476574446576696365496E666F1470726F746F636F6C446576696365496E666F5F740A48616E64526573756C740B5265737461727454696D650000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000000000000010000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65FF7F0000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E1000000000000FFFFFFFF000100000000000000010000000000000001000000018001E1000000000000FFFFFFFF000100000000000000010000000000000001000000018003E1000000000000FFFFFFFF0001000000000000000100000000000000010000000180CD7F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF000000000000000000010000000000000001000000018023E1000000000000FFFFFFFF000100000000000000010000000000000001000000018022E1000000000000FFFFFFFF000100000000000000010000000000000001000000018025E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802BE1000000000000FFFFFFFF00010000000000000001000000000000000100000001802CE1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001807A8A000000000000FFFFFFFF00010000000000000001000000000000000100000001807B8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180D3B0000000000000FFFFFFFF000100000000000000010000000000000001000000018015B1000000000000FFFFFFFF0001000000000000000100000000000000010000000180F4B0000000000000FFFFFFFF000100000000000000010000000000000001000000018036B1000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FF88000000000000FFFFFFFF0001000000000000000100000000000000010000000180FE88000000000000FFFFFFFF00010000000000000001000000000000000100000001800B81000000000000FFFFFFFF00010000000000000001000000000000000100000001800C81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180F088000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE7F000000000000FFFFFFFF000100000000000000010000000000000001000000018024E1000000000000FFFFFFFF00010000000000000001000000000000000100000001800A81000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001802280000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C488000000000000FFFFFFFF0001000000000000000100000000000000010000000180C988000000000000FFFFFFFF0001000000000000000100000000000000010000000180C788000000000000FFFFFFFF0001000000000000000100000000000000010000000180C888000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180DD88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180FB7F000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 1423 + 2800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000000000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000000000C0000000000000000000000000000000001000000010000000180F4B00000000000000D000000000000000000000000000000000100000001000000018036B10000000000000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF880000000000000F0000000000000000000000000000000001000000010000000180FE880000000000001000000000000000000000000000000000010000000100000001800B810000000000001100000000000000000000000000000000010000000100000001800C810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F088000000000000130000000000000000000000000000000001000000010000000180EE7F00000000000014000000000000000000000000000000000100000001000000018024E10000000000001500000000000000000000000000000000010000000100000001800A810000000000001600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018022800000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000180000000000000000000000000000000001000000010000000180C988000000000000190000000000000000000000000000000001000000010000000180C7880000000000001A0000000000000000000000000000000001000000010000000180C8880000000000001B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180DD880000000000001C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001D000000000000000000000000000000000100000001000000 + + + + 59399 + Build + + 966 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000000000000100000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64FF7F0000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000FFFFFFFF0001000000000000000100000000000000010000000180D07F000000000000FFFFFFFF00010000000000000001000000000000000100000001803080000000000000FFFFFFFF00010000000000000001000000000000000100000001809E8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D17F000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001804C8A000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001806680000000000000FFFFFFFF0001000000000000000100000000000000010000000180EB88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180C07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180B08A000000000000FFFFFFFF0001000000000000000100000000000000010000000180A801000000000000FFFFFFFF00010000000000000001000000000000000100000001807202000000000000FFFFFFFF0001000000000000000100000000000000010000000180BE01000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 583 + 1000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F000000000000000000000000000000000000000000000001000000010000000180D07F00000000000001000000000000000000000000000000000100000001000000018030800000000000000200000000000000000000000000000000010000000100000001809E8A000000000000030000000000000000000000000000000001000000010000000180D17F0000000000000400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000000500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001806680000000000000060000000000000000000000000000000001000000010000000180EB880000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000080000000000000000000000000000000001000000010000000180B08A000000000000090000000000000000000000000000000001000000010000000180A8010000000000000A000000000000000000000000000000000100000001000000018072020000000000000B0000000000000000000000000000000001000000010000000180BE010000000000000C000000000000000000000000000000000100000001000000 + + + + 59400 + Debug + + 2373 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000000000000100000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000000000001000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000000000000100000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000000000000100000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000000000000100000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F720100000000000000000000000100000001000000000000000000000001000000000000000000054465627567FF7F0000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC88000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801780000000000000FFFFFFFF00010000000000000001000000000000000100000001801D80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001801A80000000000000FFFFFFFF00010000000000000001000000000000000100000001801B80000000000000FFFFFFFF0001000000000000000100000000000000010000000180E57F000000000000FFFFFFFF00010000000000000001000000000000000100000001801C80000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800089000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF0000000000000000000100000000000000010000000180E48B000000000000FFFFFFFF0001000000000000000100000000000000010000000180F07F000000000000FFFFFFFF0001000000000000000100000000000000010000000180E888000000000000FFFFFFFF00010000000000000001000000000000000100000001803B01000000000000FFFFFFFF0001000000000000000100000000000000010000000180BB8A000000000000FFFFFFFF0001000000000000000100000000000000010000000180D88B000000000000FFFFFFFF0001000000000000000100000000000000010000000180D28B000000000000FFFFFFFF00010000000000000001000000000000000100000001809307000000000000FFFFFFFF0001000000000000000100000000000000010000000180658A000000000000FFFFFFFF0001000000000000000100000000000000010000000180C18A000000000000FFFFFFFF0001000000000000000100000000000000010000000180EE8B000000000000FFFFFFFF00010000000000000001000000000000000100000001800000000000000000FFFFFFFF00000000000000000001000000000000000100000001800189000000000000FFFFFFFF000100000000000000010000000000000001000000 + + + 898 + 1900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000000000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000000100000000000000000000000000000000010000000100000001801D800000000000000200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000000300000000000000000000000000000000010000000100000001801B80000000000000040000000000000000000000000000000001000000010000000180E57F0000000000000500000000000000000000000000000000010000000100000001801C800000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000000700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B000000000000080000000000000000000000000000000001000000010000000180F07F000000000000090000000000000000000000000000000001000000010000000180E8880000000000000A00000000000000000000000000000000010000000100000001803B010000000000000B0000000000000000000000000000000001000000010000000180BB8A0000000000000C0000000000000000000000000000000001000000010000000180D88B0000000000000D0000000000000000000000000000000001000000010000000180D28B0000000000000E000000000000000000000000000000000100000001000000018093070000000000000F0000000000000000000000000000000001000000010000000180658A000000000000100000000000000000000000000000000001000000010000000180C18A000000000000110000000000000000000000000000000001000000010000000180EE8B0000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180018900000000000013000000000000000000000000000000000100000001000000 + + + + 0 + 1680 + 1050 + + + + + + 1 + 0 + + 100 + 0 + + ..\user\main.c + 0 + 1 + 1 + 1 + + 0 + + + ..\user\show\simulation_lcd.c + 0 + 53 + 239 + 1 + 21,45,69,82,95,109,124,166,175,181,249,264,400,428,472,483,598,672,784,819,828,860 + 0 + + + ..\user\show\simulation_lcd.h + 20 + 1 + 1 + 1 + + 0 + + + ..\user\show\lcd.c + 28 + 322 + 826 + 1 + 287,333,342,623,638,652,666,683,718,727,759 + 0 + + + ..\user\show\lcd.h + 16 + 1 + 32 + 1 + + 0 + + + ..\user\show\simulation_font.h + 38 + 1 + 110 + 1 + 10,109 + 0 + + + + + diff --git a/firmware/stm32-esp/project/pro.uvopt b/firmware/stm32-esp/project/pro.uvopt new file mode 100644 index 00000000..fec0131d --- /dev/null +++ b/firmware/stm32-esp/project/pro.uvopt @@ -0,0 +1,1019 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + pro + 0x4 + ARM-ADS + + 8000000 + + 1 + 1 + 1 + 0 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + ..\output\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + + 0 + Reference Manual + DATASHTS\ST\STM32F10xxx.PDF + + + 1 + Technical Reference Manual + datashts\arm\cortex_m3\r1p1\DDI0337E_CORTEX_M3_R1P1_TRM.PDF + + + 2 + Generic User Guide + datashts\arm\cortex_m3\r2p1\DUI0552A_CORTEX_M3_DGUG.PDF + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 6 + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + 0 + CMSIS_AGDI + -X"CMSIS-DAP" -U0424BE49DC424594DEFB537AA1C1A434 -O78 -S0 -C0 -P00 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000 + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + (105=-1,-1,-1,-1,0) + + + 0 + ST-LINKIII-KEIL_SWO + -U183B14000F144A37514D4E00 -O78 -SF1800 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -N00("ARM CoreSight SW-DP") -D00(1BA01477) -L00(0) -TO131090 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000 + + + 0 + JL2CM3 + -U-O14 -O15 -S5 -ZTIFSpeedSel1000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000 + + + 0 + UL2CM3 + UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000) + + + + + + 0 + 1 + DevParam,0x0A + + + + 0 + + + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + startup + 0 + 0 + 0 + 0 + + 1 + 1 + 2 + 0 + 0 + 0 + ..\libraries\cmsis\startup\startup_stm32f10x_hd.s + startup_stm32f10x_hd.s + 0 + 0 + + + + + cmsis + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\libraries\cmsis\core_cm3.c + core_cm3.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\libraries\cmsis\system_stm32f10x.c + system_stm32f10x.c + 0 + 0 + + + + + fwlib + 0 + 0 + 0 + 0 + + 3 + 4 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\misc.c + misc.c + 0 + 0 + + + 3 + 5 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_adc.c + stm32f10x_adc.c + 0 + 0 + + + 3 + 6 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_bkp.c + stm32f10x_bkp.c + 0 + 0 + + + 3 + 7 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_can.c + stm32f10x_can.c + 0 + 0 + + + 3 + 8 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_cec.c + stm32f10x_cec.c + 0 + 0 + + + 3 + 9 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_crc.c + stm32f10x_crc.c + 0 + 0 + + + 3 + 10 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_dac.c + stm32f10x_dac.c + 0 + 0 + + + 3 + 11 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_dbgmcu.c + stm32f10x_dbgmcu.c + 0 + 0 + + + 3 + 12 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_dma.c + stm32f10x_dma.c + 0 + 0 + + + 3 + 13 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_exti.c + stm32f10x_exti.c + 0 + 0 + + + 3 + 14 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_flash.c + stm32f10x_flash.c + 0 + 0 + + + 3 + 15 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_fsmc.c + stm32f10x_fsmc.c + 0 + 0 + + + 3 + 16 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_gpio.c + stm32f10x_gpio.c + 0 + 0 + + + 3 + 17 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_i2c.c + stm32f10x_i2c.c + 0 + 0 + + + 3 + 18 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_iwdg.c + stm32f10x_iwdg.c + 0 + 0 + + + 3 + 19 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_pwr.c + stm32f10x_pwr.c + 0 + 0 + + + 3 + 20 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_rcc.c + stm32f10x_rcc.c + 0 + 0 + + + 3 + 21 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_rtc.c + stm32f10x_rtc.c + 0 + 0 + + + 3 + 22 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_sdio.c + stm32f10x_sdio.c + 0 + 0 + + + 3 + 23 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_spi.c + stm32f10x_spi.c + 0 + 0 + + + 3 + 24 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_tim.c + stm32f10x_tim.c + 0 + 0 + + + 3 + 25 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_usart.c + stm32f10x_usart.c + 0 + 0 + + + 3 + 26 + 1 + 0 + 0 + 0 + ..\libraries\fwlib\src\stm32f10x_wwdg.c + stm32f10x_wwdg.c + 0 + 0 + + + + + user + 1 + 0 + 0 + 0 + + 4 + 27 + 1 + 0 + 0 + 0 + ..\user\main.c + main.c + 0 + 0 + + + 4 + 28 + 1 + 0 + 0 + 0 + ..\user\stm32f10x_it.c + stm32f10x_it.c + 0 + 0 + + + 4 + 29 + 5 + 0 + 0 + 0 + ..\user\main.h + main.h + 0 + 0 + + + + + user/drive + 0 + 0 + 0 + 0 + + 5 + 30 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_adc.c + bsp_adc.c + 0 + 0 + + + 5 + 31 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_clock.c + bsp_clock.c + 0 + 0 + + + 5 + 32 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_port.c + bsp_port.c + 0 + 0 + + + 5 + 33 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_timer3.c + bsp_timer3.c + 0 + 0 + + + 5 + 34 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_tool.c + bsp_tool.c + 0 + 0 + + + 5 + 35 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_uart1.c + bsp_uart1.c + 0 + 0 + + + 5 + 36 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_uart2.c + bsp_uart2.c + 0 + 0 + + + 5 + 37 + 1 + 0 + 0 + 0 + ..\user\drive\bsp_uart3.c + bsp_uart3.c + 0 + 0 + + + + + user/com + 0 + 0 + 0 + 0 + + 6 + 38 + 1 + 0 + 0 + 0 + ..\user\com\uart1_receive.c + uart1_receive.c + 0 + 0 + + + 6 + 39 + 1 + 0 + 0 + 0 + ..\user\com\uart2_receive.c + uart2_receive.c + 0 + 0 + + + 6 + 40 + 1 + 0 + 0 + 0 + ..\user\com\uart3_receive.c + uart3_receive.c + 0 + 0 + + + + + user/data + 0 + 0 + 0 + 0 + + 7 + 41 + 1 + 0 + 0 + 0 + ..\user\data\basic_data.c + basic_data.c + 0 + 0 + + + + + user/show + 0 + 0 + 0 + 0 + + 8 + 42 + 1 + 0 + 0 + 0 + ..\user\show\battery.c + battery.c + 0 + 0 + + + 8 + 43 + 1 + 0 + 0 + 0 + ..\user\show\dev_work.c + dev_work.c + 0 + 0 + + + 8 + 44 + 1 + 0 + 0 + 0 + ..\user\show\esp8266_uart2.c + esp8266_uart2.c + 0 + 0 + + + 8 + 45 + 1 + 0 + 0 + 0 + ..\user\show\esp8266_work.c + esp8266_work.c + 0 + 0 + + + 8 + 46 + 1 + 0 + 0 + 0 + ..\user\show\pm_uart3.c + pm_uart3.c + 0 + 0 + + + 8 + 47 + 1 + 0 + 0 + 0 + ..\user\show\simulation_lcd.c + simulation_lcd.c + 0 + 0 + + + 8 + 48 + 1 + 0 + 0 + 0 + ..\user\show\stmflash.c + stmflash.c + 0 + 0 + + + + + user/cjson + 1 + 0 + 0 + 0 + + 9 + 49 + 1 + 0 + 0 + 0 + ..\user\cjson\cJSON.c + cJSON.c + 0 + 0 + + + + + user/mqtt + 1 + 0 + 0 + 0 + + 10 + 50 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTConnectClient.c + MQTTConnectClient.c + 0 + 0 + + + 10 + 51 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTConnectServer.c + MQTTConnectServer.c + 0 + 0 + + + 10 + 52 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTDeserializePublish.c + MQTTDeserializePublish.c + 0 + 0 + + + 10 + 53 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTFormat.c + MQTTFormat.c + 0 + 0 + + + 10 + 54 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTPacket.c + MQTTPacket.c + 0 + 0 + + + 10 + 55 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTSerializePublish.c + MQTTSerializePublish.c + 0 + 0 + + + 10 + 56 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTSubscribeClient.c + MQTTSubscribeClient.c + 0 + 0 + + + 10 + 57 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTSubscribeServer.c + MQTTSubscribeServer.c + 0 + 0 + + + 10 + 58 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTUnsubscribeClient.c + MQTTUnsubscribeClient.c + 0 + 0 + + + 10 + 59 + 1 + 0 + 0 + 0 + ..\user\mqtt\MQTTUnsubscribeServer.c + MQTTUnsubscribeServer.c + 0 + 0 + + + + diff --git a/firmware/stm32-esp/project/pro.uvproj b/firmware/stm32-esp/project/pro.uvproj new file mode 100644 index 00000000..c5b6d0ce --- /dev/null +++ b/firmware/stm32-esp/project/pro.uvproj @@ -0,0 +1,770 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + pro + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + STM32F103RE + STMicroelectronics + IRAM(0x20000000-0x2000FFFF) IROM(0x8000000-0x807FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3") + + "STARTUP\ST\STM32F10x\startup_stm32f10x_hd.s" ("STM32 High Density Line Startup Code") + UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000) + 4229 + stm32f10x.h + + + + + + + + + + SFD\ST\STM32F1xx\STM32F103xx.sfr + 0 + 0 + + + + ST\STM32F10x\ + ST\STM32F10x\ + + 0 + 0 + 0 + 0 + 1 + + ..\output\ + pro + 1 + 0 + 1 + 1 + 1 + ..\output\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + D:\Tools\Keil_v5\ARM\ARMCC\bin\fromelf.exe --bin -o ../output/pro.bin ../output/pro.axf + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP + DCM.DLL + -pCM3 + SARMCM3.DLL + + TCM.DLL + -pCM3 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + + + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + + 0 + 6 + + + + + + + + + + + + + + STLink\ST-LINKIII-KEIL_SWO.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + 1 + Segger\JL2CM3.dll + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M3" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 8 + 1 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 1 + 0x8000000 + 0x80000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x80000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 2 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 3 + 3 + 1 + 1 + 0 + 0 + 0 + + + STM32F10X_HD,USE_STDPERIPH_DRIVER + + ..\libraries\cmsis\startup;..\libraries\fwlib\inc;..\libraries\cmsis;..\user;..\user\com;..\user\data;..\user\drive;..\user\show;..\user\cjson;..\user\mqtt + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + + startup + + + startup_stm32f10x_hd.s + 2 + ..\libraries\cmsis\startup\startup_stm32f10x_hd.s + + + + + cmsis + + + core_cm3.c + 1 + ..\libraries\cmsis\core_cm3.c + + + system_stm32f10x.c + 1 + ..\libraries\cmsis\system_stm32f10x.c + + + + + fwlib + + + misc.c + 1 + ..\libraries\fwlib\src\misc.c + + + stm32f10x_adc.c + 1 + ..\libraries\fwlib\src\stm32f10x_adc.c + + + stm32f10x_bkp.c + 1 + ..\libraries\fwlib\src\stm32f10x_bkp.c + + + stm32f10x_can.c + 1 + ..\libraries\fwlib\src\stm32f10x_can.c + + + stm32f10x_cec.c + 1 + ..\libraries\fwlib\src\stm32f10x_cec.c + + + stm32f10x_crc.c + 1 + ..\libraries\fwlib\src\stm32f10x_crc.c + + + stm32f10x_dac.c + 1 + ..\libraries\fwlib\src\stm32f10x_dac.c + + + stm32f10x_dbgmcu.c + 1 + ..\libraries\fwlib\src\stm32f10x_dbgmcu.c + + + stm32f10x_dma.c + 1 + ..\libraries\fwlib\src\stm32f10x_dma.c + + + stm32f10x_exti.c + 1 + ..\libraries\fwlib\src\stm32f10x_exti.c + + + stm32f10x_flash.c + 1 + ..\libraries\fwlib\src\stm32f10x_flash.c + + + stm32f10x_fsmc.c + 1 + ..\libraries\fwlib\src\stm32f10x_fsmc.c + + + stm32f10x_gpio.c + 1 + ..\libraries\fwlib\src\stm32f10x_gpio.c + + + stm32f10x_i2c.c + 1 + ..\libraries\fwlib\src\stm32f10x_i2c.c + + + stm32f10x_iwdg.c + 1 + ..\libraries\fwlib\src\stm32f10x_iwdg.c + + + stm32f10x_pwr.c + 1 + ..\libraries\fwlib\src\stm32f10x_pwr.c + + + stm32f10x_rcc.c + 1 + ..\libraries\fwlib\src\stm32f10x_rcc.c + + + stm32f10x_rtc.c + 1 + ..\libraries\fwlib\src\stm32f10x_rtc.c + + + stm32f10x_sdio.c + 1 + ..\libraries\fwlib\src\stm32f10x_sdio.c + + + stm32f10x_spi.c + 1 + ..\libraries\fwlib\src\stm32f10x_spi.c + + + stm32f10x_tim.c + 1 + ..\libraries\fwlib\src\stm32f10x_tim.c + + + stm32f10x_usart.c + 1 + ..\libraries\fwlib\src\stm32f10x_usart.c + + + stm32f10x_wwdg.c + 1 + ..\libraries\fwlib\src\stm32f10x_wwdg.c + + + + + user + + + main.c + 1 + ..\user\main.c + + + stm32f10x_it.c + 1 + ..\user\stm32f10x_it.c + + + main.h + 5 + ..\user\main.h + + + + + user/drive + + + bsp_adc.c + 1 + ..\user\drive\bsp_adc.c + + + bsp_clock.c + 1 + ..\user\drive\bsp_clock.c + + + bsp_port.c + 1 + ..\user\drive\bsp_port.c + + + bsp_timer3.c + 1 + ..\user\drive\bsp_timer3.c + + + bsp_tool.c + 1 + ..\user\drive\bsp_tool.c + + + bsp_uart1.c + 1 + ..\user\drive\bsp_uart1.c + + + bsp_uart2.c + 1 + ..\user\drive\bsp_uart2.c + + + bsp_uart3.c + 1 + ..\user\drive\bsp_uart3.c + + + + + user/com + + + uart1_receive.c + 1 + ..\user\com\uart1_receive.c + + + uart2_receive.c + 1 + ..\user\com\uart2_receive.c + + + uart3_receive.c + 1 + ..\user\com\uart3_receive.c + + + + + user/data + + + basic_data.c + 1 + ..\user\data\basic_data.c + + + + + user/show + + + battery.c + 1 + ..\user\show\battery.c + + + dev_work.c + 1 + ..\user\show\dev_work.c + + + esp8266_uart2.c + 1 + ..\user\show\esp8266_uart2.c + + + esp8266_work.c + 1 + ..\user\show\esp8266_work.c + + + pm_uart3.c + 1 + ..\user\show\pm_uart3.c + + + simulation_lcd.c + 1 + ..\user\show\simulation_lcd.c + + + stmflash.c + 1 + ..\user\show\stmflash.c + + + + + user/cjson + + + cJSON.c + 1 + ..\user\cjson\cJSON.c + + + + + user/mqtt + + + MQTTConnectClient.c + 1 + ..\user\mqtt\MQTTConnectClient.c + + + MQTTConnectServer.c + 1 + ..\user\mqtt\MQTTConnectServer.c + + + MQTTDeserializePublish.c + 1 + ..\user\mqtt\MQTTDeserializePublish.c + + + MQTTFormat.c + 1 + ..\user\mqtt\MQTTFormat.c + + + MQTTPacket.c + 1 + ..\user\mqtt\MQTTPacket.c + + + MQTTSerializePublish.c + 1 + ..\user\mqtt\MQTTSerializePublish.c + + + MQTTSubscribeClient.c + 1 + ..\user\mqtt\MQTTSubscribeClient.c + + + MQTTSubscribeServer.c + 1 + ..\user\mqtt\MQTTSubscribeServer.c + + + MQTTUnsubscribeClient.c + 1 + ..\user\mqtt\MQTTUnsubscribeClient.c + + + MQTTUnsubscribeServer.c + 1 + ..\user\mqtt\MQTTUnsubscribeServer.c + + + + + + + + diff --git a/firmware/stm32-esp/user/cjson/cJSON.c b/firmware/stm32-esp/user/cjson/cJSON.c new file mode 100644 index 00000000..4faeb208 --- /dev/null +++ b/firmware/stm32-esp/user/cjson/cJSON.c @@ -0,0 +1,727 @@ +#include +#include +#include +#include +#include +#include +#include +#include "cJSON.h" + +static const char *ep; + +const char *cJSON_GetErrorPtr(void) +{return ep;} + +static int cJSON_strcasecmp(const char *s1,const char *s2){ + if (!s1) return (s1==s2)?0:1;if (!s2) return 1; + for(; tolower(*s1) == tolower(*s2); ++s1, ++s2) if(*s1 == 0) return 0; + return tolower(*(const unsigned char *)s1) - tolower(*(const unsigned char *)s2); +} + +static void *(*cJSON_malloc)(size_t sz) = malloc; +static void (*cJSON_free)(void *ptr) = free; + +static char* cJSON_strdup(const char* str){ + size_t len; + char* copy; + + len = strlen(str) + 1; + copy = (char *)cJSON_malloc(len); + + if (!copy) + return 0; + memcpy(copy,str,len); + return copy; +} + +void cJSON_InitHooks(cJSON_Hooks* hooks){ + if (!hooks) { /* Reset hooks */ + cJSON_malloc = malloc; + cJSON_free = free; + return; + } + + cJSON_malloc = (hooks->malloc_fn)?hooks->malloc_fn:malloc; + cJSON_free = (hooks->free_fn)?hooks->free_fn:free; +} + +/* Internal constructor. */ +static cJSON *cJSON_New_Item(void){ + cJSON* node = (cJSON*)cJSON_malloc(sizeof(cJSON)); + if (node) memset(node,0,sizeof(cJSON)); + return node; +} + +/* Delete a cJSON structure. */ +void cJSON_Delete(cJSON *c){ + cJSON *next; + while (c) + { + next=c->next; + if (!(c->type&cJSON_IsReference) && c->child) cJSON_Delete(c->child); + if (!(c->type&cJSON_IsReference) && c->valuestring) cJSON_free(c->valuestring); + if (!(c->type&cJSON_StringIsConst) && c->string) cJSON_free(c->string); + cJSON_free(c); + c=next; + } +} + +/* Parse the input text to generate a number, and populate the result into item. */ +static const char *parse_number(cJSON *item,const char *num){ + double n=0,sign=1,scale=0;int subscale=0,signsubscale=1; + + if (*num=='-') sign=-1,num++; /* Has sign? */ + if (*num=='0') num++; /* is zero */ + if (*num>='1' && *num<='9') do n=(n*10.0)+(*num++ -'0'); while (*num>='0' && *num<='9'); /* Number? */ + if (*num=='.' && num[1]>='0' && num[1]<='9') {num++; do n=(n*10.0)+(*num++ -'0'),scale--; while (*num>='0' && *num<='9');} /* Fractional part? */ + if (*num=='e' || *num=='E') /* Exponent? */ + { num++;if (*num=='+') num++; else if (*num=='-') signsubscale=-1,num++; /* With sign? */ + while (*num>='0' && *num<='9') subscale=(subscale*10)+(*num++ - '0'); /* Number? */ + } + + n=sign*n*pow(10.0,(scale+subscale*signsubscale)); /* number = +/- number.fraction * 10^+/- exponent */ + + item->valuedouble=n; + item->valueint=(int)n; + item->type=cJSON_Number; + return num; +} + +static int pow2gt (int x) { --x; x|=x>>1; x|=x>>2; x|=x>>4; x|=x>>8; x|=x>>16; return x+1; } + +typedef struct {char *buffer; int length; int offset; } printbuffer; + +static char* ensure(printbuffer *p,int needed){ + char *newbuffer;int newsize; + if (!p || !p->buffer) return 0; + needed+=p->offset; + if (needed<=p->length) return p->buffer+p->offset; + + newsize=pow2gt(needed); + newbuffer=(char*)cJSON_malloc(newsize); + if (!newbuffer) {cJSON_free(p->buffer);p->length=0,p->buffer=0;return 0;} + if (newbuffer) memcpy(newbuffer,p->buffer,p->length); + cJSON_free(p->buffer); + p->length=newsize; + p->buffer=newbuffer; + return newbuffer+p->offset; +} + +static int update(printbuffer *p){ + char *str; + if (!p || !p->buffer) return 0; + str=p->buffer+p->offset; + return p->offset+strlen(str); +} + +/* Render the number nicely from the given item into a string. */ +static char *print_number(cJSON *item,printbuffer *p){ + char *str=0; + double d=item->valuedouble; + if (d==0) + { + if (p) str=ensure(p,2); + else str=(char*)cJSON_malloc(2); /* special case for 0. */ + if (str) strcpy(str,"0"); + } + else if (fabs(((double)item->valueint)-d)<=DBL_EPSILON && d<=INT_MAX && d>=INT_MIN) + { + if (p) str=ensure(p,21); + else str=(char*)cJSON_malloc(21); /* 2^64+1 can be represented in 21 chars. */ + if(str) sprintf(str,"%d",item->valueint); + } + else + { + if (p) str=ensure(p,64); + else str=(char*)cJSON_malloc(64); /* This is a nice tradeoff. */ + if (str) + { + if (fabs(floor(d)-d)<=DBL_EPSILON && fabs(d)<1.0e60)sprintf(str,"%.0f",d); + else if (fabs(d)<1.0e-6 || fabs(d)>1.0e9) sprintf(str,"%e",d); + else sprintf(str,"%f",d); + } + } + return str; +} + +static unsigned parse_hex4(const char *str){ + unsigned h=0; + if (*str>='0' && *str<='9') h+=(*str)-'0'; else if (*str>='A' && *str<='F') h+=10+(*str)-'A'; else if (*str>='a' && *str<='f') h+=10+(*str)-'a'; else return 0; + h=h<<4;str++; + if (*str>='0' && *str<='9') h+=(*str)-'0'; else if (*str>='A' && *str<='F') h+=10+(*str)-'A'; else if (*str>='a' && *str<='f') h+=10+(*str)-'a'; else return 0; + h=h<<4;str++; + if (*str>='0' && *str<='9') h+=(*str)-'0'; else if (*str>='A' && *str<='F') h+=10+(*str)-'A'; else if (*str>='a' && *str<='f') h+=10+(*str)-'a'; else return 0; + h=h<<4;str++; + if (*str>='0' && *str<='9') h+=(*str)-'0'; else if (*str>='A' && *str<='F') h+=10+(*str)-'A'; else if (*str>='a' && *str<='f') h+=10+(*str)-'a'; else return 0; + return h; +} + +/* Parse the input text into an unescaped cstring, and populate item. */ +static const unsigned char firstByteMark[7] = { 0x00, 0x00, 0xC0, 0xE0, 0xF0, 0xF8, 0xFC }; +static const char *parse_string(cJSON *item,const char *str){ + const char *ptr=str+1;char *ptr2;char *out;int len=0;unsigned uc,uc2; + if (*str!='\"') {ep=str;return 0;} /* not a string! */ + + while (*ptr!='\"' && *ptr && ++len) if (*ptr++ == '\\') ptr++; /* Skip escaped quotes. */ + + out=(char*)cJSON_malloc(len+1); /* 这大概是我们需要的长度. */ + if (!out) return 0; + + ptr=str+1;ptr2=out; + while (*ptr!='\"' && *ptr) + { + if (*ptr!='\\') *ptr2++=*ptr++; + else + { + ptr++; + switch (*ptr) + { + case 'b': *ptr2++='\b'; break; + case 'f': *ptr2++='\f'; break; + case 'n': *ptr2++='\n'; break; + case 'r': *ptr2++='\r'; break; + case 't': *ptr2++='\t'; break; + case 'u': /* transcode utf16 to utf8. */ + uc=parse_hex4(ptr+1);ptr+=4; /* get the unicode char. */ + + if ((uc>=0xDC00 && uc<=0xDFFF) || uc==0) break; /* check for invalid. */ + + if (uc>=0xD800 && uc<=0xDBFF) /* UTF16 surrogate pairs. */ + { + if (ptr[1]!='\\' || ptr[2]!='u') break; /* missing second-half of surrogate. */ + uc2=parse_hex4(ptr+3);ptr+=6; + if (uc2<0xDC00 || uc2>0xDFFF) break; /* invalid second-half of surrogate. */ + uc=0x10000 + (((uc&0x3FF)<<10) | (uc2&0x3FF)); + } + + len=4;if (uc<0x80) len=1;else if (uc<0x800) len=2;else if (uc<0x10000) len=3; ptr2+=len; + + switch (len) { + case 4: *--ptr2 =((uc | 0x80) & 0xBF); uc >>= 6; + case 3: *--ptr2 =((uc | 0x80) & 0xBF); uc >>= 6; + case 2: *--ptr2 =((uc | 0x80) & 0xBF); uc >>= 6; + case 1: *--ptr2 =(uc | firstByteMark[len]); + } + ptr2+=len; + break; + default: *ptr2++=*ptr; break; + } + ptr++; + } + } + *ptr2=0; + if (*ptr=='\"') ptr++; + item->valuestring=out; + item->type=cJSON_String; + return ptr; +} + +/* Render the cstring provided to an escaped version that can be printed. */ +static char *print_string_ptr(const char *str,printbuffer *p){ + const char *ptr;char *ptr2,*out;int len=0,flag=0;unsigned char token; + + for (ptr=str;*ptr;ptr++) flag|=((*ptr>0 && *ptr<32)||(*ptr=='\"')||(*ptr=='\\'))?1:0; + if (!flag) + { + len=ptr-str; + if (p) out=ensure(p,len+3); + else out=(char*)cJSON_malloc(len+3); + if (!out) return 0; + ptr2=out;*ptr2++='\"'; + strcpy(ptr2,str); + ptr2[len]='\"'; + ptr2[len+1]=0; + return out; + } + + if (!str) + { + if (p) out=ensure(p,3); + else out=(char*)cJSON_malloc(3); + if (!out) return 0; + strcpy(out,"\"\""); + return out; + } + ptr = str; + while ( (token==*ptr) && (++len) ) + { + if (strchr("\"\\\b\f\n\r\t",token)) + len++; + else if (token < 32) len+=5; + ptr++; + } + + if (p) out=ensure(p,len+3); + else out=(char*)cJSON_malloc(len+3); + if (!out) return 0; + + ptr2=out;ptr=str; + *ptr2++='\"'; + while (*ptr) + { + if ((unsigned char)*ptr>31 && *ptr!='\"' && *ptr!='\\') *ptr2++=*ptr++; + else + { + *ptr2++='\\'; + switch (token=*ptr++) + { + case '\\': *ptr2++='\\'; break; + case '\"': *ptr2++='\"'; break; + case '\b': *ptr2++='b'; break; + case '\f': *ptr2++='f'; break; + case '\n': *ptr2++='n'; break; + case '\r': *ptr2++='r'; break; + case '\t': *ptr2++='t'; break; + default: sprintf(ptr2,"u%04x",token);ptr2+=5; break; /* escape and print */ + } + } + } + *ptr2++='\"';*ptr2++=0; + return out; +} +/* Invote print_string_ptr (which is useful) on an item. */ +static char *print_string(cJSON *item,printbuffer *p) {return print_string_ptr(item->valuestring,p);} + +/* Predeclare these prototypes. */ +static const char *parse_value(cJSON *item,const char *value); +static char *print_value(cJSON *item,int depth,int fmt,printbuffer *p); +static const char *parse_array(cJSON *item,const char *value); +static char *print_array(cJSON *item,int depth,int fmt,printbuffer *p); +static const char *parse_object(cJSON *item,const char *value); +static char *print_object(cJSON *item,int depth,int fmt,printbuffer *p); + +/* Utility to jump whitespace and cr/lf */ +static const char *skip(const char *in) +{ + while (in && *in && (unsigned char)*in<=32) + in++; + return in; +} + +/* Parse an object - create a new root, and populate. */ +cJSON *cJSON_ParseWithOpts(const char *value,const char **return_parse_end,int require_null_terminated){ + const char *end=0; + cJSON *c=cJSON_New_Item(); + ep=0; + if (!c) return 0; /* memory fail */ + + end=parse_value(c,skip(value)); + if (!end) {cJSON_Delete(c);return 0;} /* parse failure. ep is set. */ + + /* if we require null-terminated JSON without appended garbage, skip and then check for a null terminator */ + if (require_null_terminated) {end=skip(end);if (*end) {cJSON_Delete(c);ep=end;return 0;}} + if (return_parse_end) *return_parse_end=end; + return c; +} +/* Default options for cJSON_Parse */ +cJSON *cJSON_Parse(const char *value) {return cJSON_ParseWithOpts(value,0,0);} + +/* Render a cJSON item/entity/structure to text. */ +char *cJSON_Print(cJSON *item) {return print_value(item,0,1,0);} +char *cJSON_PrintUnformatted(cJSON *item) {return print_value(item,0,0,0);} + +char *cJSON_PrintBuffered(cJSON *item,int prebuffer,int fmt){ + printbuffer p; + p.buffer = (char*)cJSON_malloc(prebuffer); + p.length = prebuffer; + p.offset = 0; + return print_value(item,0,fmt,&p); +// return p.buffer; +} + + +/* Parser core - when encountering text, process appropriately. */ +static const char *parse_value(cJSON *item,const char *value){ + if (!value) return 0; /* Fail on null. */ + if (!strncmp(value,"null",4)) { item->type=cJSON_NULL; return value+4; } + if (!strncmp(value,"false",5)) { item->type=cJSON_False; return value+5; } + if (!strncmp(value,"true",4)) { item->type=cJSON_True; item->valueint=1; return value+4; } + if (*value=='\"') { return parse_string(item,value); } + if (*value=='-' || (*value>='0' && *value<='9')) { return parse_number(item,value); } + if (*value=='[') { return parse_array(item,value); } + if (*value=='{') { return parse_object(item,value); } + + ep=value;return 0; /* failure. */ +} + +/* Render a value to text. */ +static char *print_value(cJSON *item,int depth,int fmt,printbuffer *p){ + char *out=0; + if (!item) return 0; + if (p) + { + switch ((item->type)&255) + { + case cJSON_NULL: {out=ensure(p,5); if (out) strcpy(out,"null"); break;} + case cJSON_False: {out=ensure(p,6); if (out) strcpy(out,"false"); break;} + case cJSON_True: {out=ensure(p,5); if (out) strcpy(out,"true"); break;} + case cJSON_Number: out=print_number(item,p);break; + case cJSON_String: out=print_string(item,p);break; + case cJSON_Array: out=print_array(item,depth,fmt,p);break; + case cJSON_Object: out=print_object(item,depth,fmt,p);break; + } + } + else + { + switch ((item->type)&255) + { + case cJSON_NULL: out=cJSON_strdup("null"); break; + case cJSON_False: out=cJSON_strdup("false");break; + case cJSON_True: out=cJSON_strdup("true"); break; + case cJSON_Number: out=print_number(item,0); break; + case cJSON_String: out=print_string(item,0); break; + case cJSON_Array: out=print_array(item,depth,fmt,0); break; + case cJSON_Object: out=print_object(item,depth,fmt,0);break; + } + } + return out; +} + +/* Build an array from input text. */ +static const char *parse_array(cJSON *item,const char *value){ + cJSON *child; + if (*value!='[') {ep=value;return 0;} /* not an array! */ + + item->type=cJSON_Array; + value=skip(value+1); + if (*value==']') return value+1; /* empty array. */ + + item->child=child = cJSON_New_Item(); + if (!item->child) return 0; /* memory fail */ + value=skip(parse_value(child,skip(value))); /* skip any spacing, get the value. */ + if (!value) return 0; + + while (*value==',') + { + cJSON *new_item; + new_item = cJSON_New_Item(); + if (!new_item) + return 0; /* memory fail */ + child->next=new_item;new_item->prev=child;child=new_item; + value=skip(parse_value(child,skip(value+1))); + if (!value) + return 0; /* memory fail */ + } + + if (*value==']') return value+1; /* end of array */ + ep=value;return 0; /* malformed. */ +} + +/* Render an array to text */ +static char *print_array(cJSON *item,int depth,int fmt,printbuffer *p){ + char **entries; + char *out=0,*ptr,*ret;int len=5; + cJSON *child=item->child; + int numentries=0,i=0,fail=0; + size_t tmplen=0; + + /* How many entries in the array? */ + while (child) numentries++,child=child->next; + /* Explicitly handle numentries==0 */ + if (!numentries) + { + if (p) out=ensure(p,3); + else out=(char*)cJSON_malloc(3); + if (out) strcpy(out,"[]"); + return out; + } + + if (p) + { + /* Compose the output array. */ + i=p->offset; + ptr=ensure(p,1);if (!ptr) return 0; *ptr='['; p->offset++; + child=item->child; + while (child && !fail) + { + print_value(child,depth+1,fmt,p); + p->offset=update(p); + if (child->next) {len=fmt?2:1;ptr=ensure(p,len+1);if (!ptr) return 0;*ptr++=',';if(fmt)*ptr++=' ';*ptr=0;p->offset+=len;} + child=child->next; + } + ptr=ensure(p,2);if (!ptr) return 0; *ptr++=']';*ptr=0; + out=(p->buffer)+i; + } + else + { + /* Allocate an array to hold the values for each */ + entries=(char**)cJSON_malloc(numentries*sizeof(char*)); + if (!entries) return 0; + memset(entries,0,numentries*sizeof(char*)); + /* Retrieve all the results: */ + child=item->child; + while (child && !fail) + { + ret=print_value(child,depth+1,fmt,0); + entries[i++]=ret; + if (ret) len+=strlen(ret)+2+(fmt?1:0); else fail=1; + child=child->next; + } + + /* If we didn't fail, try to malloc the output string */ + if (!fail) out=(char*)cJSON_malloc(len); + /* If that fails, we fail. */ + if (!out) fail=1; + + /* Handle failure. */ + if (fail) + { + for (i=0;itype=cJSON_Object; + value=skip(value+1); + if (*value=='}') return value+1; /* empty array. */ + + item->child=child=cJSON_New_Item(); + if (!item->child) return 0; + value=skip(parse_string(child,skip(value))); + if (!value) return 0; + child->string=child->valuestring;child->valuestring=0; + if (*value!=':') {ep=value;return 0;} /* fail! */ + value=skip(parse_value(child,skip(value+1))); /* skip any spacing, get the value. */ + if (!value) return 0; + + while (*value==',') + { + cJSON *new_item; + new_item=cJSON_New_Item(); + if (!new_item) + return 0; /* memory fail */ + child->next=new_item;new_item->prev=child;child=new_item; + value=skip(parse_string(child,skip(value+1))); + if (!value) + return 0; + child->string=child->valuestring;child->valuestring=0; + if (*value!=':') + {ep=value;return 0;} /* fail! */ + value=skip(parse_value(child,skip(value+1))); /* skip any spacing, get the value. */ + if (!value) + return 0; + } + + if (*value=='}') return value+1; /* end of array */ + ep=value;return 0; /* malformed. */ +} + +/* Render an object to text. */ +static char *print_object(cJSON *item,int depth,int fmt,printbuffer *p){ + char **entries=0,**names=0; + char *out=0,*ptr,*ret,*str;int len=7,i=0,j; + cJSON *child=item->child; + int numentries=0,fail=0; + size_t tmplen=0; + /* Count the number of entries. */ + while (child) numentries++,child=child->next; + /* Explicitly handle empty object case */ + if (!numentries) + { + if (p) out=ensure(p,fmt?depth+4:3); + else out=(char*)cJSON_malloc(fmt?depth+4:3); + if (!out) return 0; + ptr=out;*ptr++='{'; + if (fmt) {*ptr++='\n';for (i=0;ioffset; + len=fmt?2:1; ptr=ensure(p,len+1); if (!ptr) return 0; + *ptr++='{'; if (fmt) *ptr++='\n'; *ptr=0; p->offset+=len; + child=item->child;depth++; + while (child) + { + if (fmt) + { + ptr=ensure(p,depth); if (!ptr) return 0; + for (j=0;joffset+=depth; + } + print_string_ptr(child->string,p); + p->offset=update(p); + + len=fmt?2:1; + ptr=ensure(p,len); if (!ptr) return 0; + *ptr++=':';if (fmt) *ptr++='\t'; + p->offset+=len; + + print_value(child,depth,fmt,p); + p->offset=update(p); + + len=(fmt?1:0)+(child->next?1:0); + ptr=ensure(p,len+1); if (!ptr) return 0; + if (child->next) *ptr++=','; + if (fmt) *ptr++='\n';*ptr=0; + p->offset+=len; + child=child->next; + } + ptr=ensure(p,fmt?(depth+1):2); if (!ptr) return 0; + if (fmt) for (i=0;ibuffer)+i; + } + else + { + /* Allocate space for the names and the objects */ + entries=(char**)cJSON_malloc(numentries*sizeof(char*)); + if (!entries) return 0; + names=(char**)cJSON_malloc(numentries*sizeof(char*)); + if (!names) {cJSON_free(entries);return 0;} + memset(entries,0,sizeof(char*)*numentries); + memset(names,0,sizeof(char*)*numentries); + + /* Collect all the results into our arrays: */ + child=item->child;depth++;if (fmt) len+=depth; + while (child) + { + names[i]=str=print_string_ptr(child->string,0); + entries[i++]=ret=print_value(child,depth,fmt,0); + if (str && ret) len+=strlen(ret)+strlen(str)+2+(fmt?2+depth:0); else fail=1; + child=child->next; + } + + /* Try to allocate the output string */ + if (!fail) out=(char*)cJSON_malloc(len); + if (!out) fail=1; + + /* Handle failure */ + if (fail) + { + for (i=0;ichild;int i=0;while(c)i++,c=c->next;return i;} +cJSON *cJSON_GetArrayItem(cJSON *array,int item) {cJSON *c=array->child; while (c && item>0) item--,c=c->next; return c;} +cJSON *cJSON_GetObjectItem(cJSON *object,const char *string) {cJSON *c=object->child; while (c && cJSON_strcasecmp(c->string,string)) c=c->next; return c;} + +/* Utility for array list handling. */ +static void suffix_object(cJSON *prev,cJSON *item) {prev->next=item;item->prev=prev;} +/* Utility for handling references. */ +static cJSON *create_reference(cJSON *item) {cJSON *ref=cJSON_New_Item();if (!ref) return 0;memcpy(ref,item,sizeof(cJSON));ref->string=0;ref->type|=cJSON_IsReference;ref->next=ref->prev=0;return ref;} + +/* Add item to array/object. */ +void cJSON_AddItemToArray(cJSON *array, cJSON *item) {cJSON *c=array->child;if (!item) return; if (!c) {array->child=item;} else {while (c && c->next) c=c->next; suffix_object(c,item);}} +void cJSON_AddItemToObject(cJSON *object,const char *string,cJSON *item) {if (!item) return; if (item->string) cJSON_free(item->string);item->string=cJSON_strdup(string);cJSON_AddItemToArray(object,item);} +void cJSON_AddItemToObjectCS(cJSON *object,const char *string,cJSON *item) {if (!item) return; if (!(item->type&cJSON_StringIsConst) && item->string) cJSON_free(item->string);item->string=(char*)string;item->type|=cJSON_StringIsConst;cJSON_AddItemToArray(object,item);} +void cJSON_AddItemReferenceToArray(cJSON *array, cJSON *item) {cJSON_AddItemToArray(array,create_reference(item));} +void cJSON_AddItemReferenceToObject(cJSON *object,const char *string,cJSON *item) {cJSON_AddItemToObject(object,string,create_reference(item));} + +cJSON *cJSON_DetachItemFromArray(cJSON *array,int which) {cJSON *c=array->child;while (c && which>0) c=c->next,which--;if (!c) return 0; + if (c->prev) c->prev->next=c->next;if (c->next) c->next->prev=c->prev;if (c==array->child) array->child=c->next;c->prev=c->next=0;return c;} +void cJSON_DeleteItemFromArray(cJSON *array,int which) {cJSON_Delete(cJSON_DetachItemFromArray(array,which));} +cJSON *cJSON_DetachItemFromObject(cJSON *object,const char *string) {int i=0;cJSON *c=object->child;while (c && cJSON_strcasecmp(c->string,string)) i++,c=c->next;if (c) return cJSON_DetachItemFromArray(object,i);return 0;} +void cJSON_DeleteItemFromObject(cJSON *object,const char *string) {cJSON_Delete(cJSON_DetachItemFromObject(object,string));} + +/* Replace array/object items with new ones. */ +void cJSON_InsertItemInArray(cJSON *array,int which,cJSON *newitem) {cJSON *c=array->child;while (c && which>0) c=c->next,which--;if (!c) {cJSON_AddItemToArray(array,newitem);return;} + newitem->next=c;newitem->prev=c->prev;c->prev=newitem;if (c==array->child) array->child=newitem; else newitem->prev->next=newitem;} +void cJSON_ReplaceItemInArray(cJSON *array,int which,cJSON *newitem) {cJSON *c=array->child;while (c && which>0) c=c->next,which--;if (!c) return; + newitem->next=c->next;newitem->prev=c->prev;if (newitem->next) newitem->next->prev=newitem; + if (c==array->child) array->child=newitem; else newitem->prev->next=newitem;c->next=c->prev=0;cJSON_Delete(c);} +void cJSON_ReplaceItemInObject(cJSON *object,const char *string,cJSON *newitem){int i=0;cJSON *c=object->child;while(c && cJSON_strcasecmp(c->string,string))i++,c=c->next;if(c){newitem->string=cJSON_strdup(string);cJSON_ReplaceItemInArray(object,i,newitem);}} + +/* Create basic types: */ +cJSON *cJSON_CreateNull(void) {cJSON *item=cJSON_New_Item();if(item)item->type=cJSON_NULL;return item;} +cJSON *cJSON_CreateTrue(void) {cJSON *item=cJSON_New_Item();if(item)item->type=cJSON_True;return item;} +cJSON *cJSON_CreateFalse(void) {cJSON *item=cJSON_New_Item();if(item)item->type=cJSON_False;return item;} +cJSON *cJSON_CreateBool(int b) {cJSON *item=cJSON_New_Item();if(item)item->type=b?cJSON_True:cJSON_False;return item;} +cJSON *cJSON_CreateNumber(double num) {cJSON *item=cJSON_New_Item();if(item){item->type=cJSON_Number;item->valuedouble=num;item->valueint=(int)num;}return item;} +cJSON *cJSON_CreateString(const char *string) {cJSON *item=cJSON_New_Item();if(item){item->type=cJSON_String;item->valuestring=cJSON_strdup(string);}return item;} +cJSON *cJSON_CreateArray(void) {cJSON *item=cJSON_New_Item();if(item)item->type=cJSON_Array;return item;} +cJSON *cJSON_CreateObject(void) {cJSON *item=cJSON_New_Item();if(item)item->type=cJSON_Object;return item;} + +/* Create Arrays: */ +cJSON *cJSON_CreateIntArray(const int *numbers,int count) {int i;cJSON *n=0,*p=0,*a=cJSON_CreateArray();for(i=0;a && ichild=n;else suffix_object(p,n);p=n;}return a;} +cJSON *cJSON_CreateFloatArray(const float *numbers,int count) {int i;cJSON *n=0,*p=0,*a=cJSON_CreateArray();for(i=0;a && ichild=n;else suffix_object(p,n);p=n;}return a;} +cJSON *cJSON_CreateDoubleArray(const double *numbers,int count) {int i;cJSON *n=0,*p=0,*a=cJSON_CreateArray();for(i=0;a && ichild=n;else suffix_object(p,n);p=n;}return a;} +cJSON *cJSON_CreateStringArray(const char **strings,int count) {int i;cJSON *n=0,*p=0,*a=cJSON_CreateArray();for(i=0;a && ichild=n;else suffix_object(p,n);p=n;}return a;} + +/* Duplication */ +cJSON *cJSON_Duplicate(cJSON *item,int recurse){ + cJSON *newitem,*cptr,*nptr=0,*newchild; + /* Bail on bad ptr */ + if (!item) return 0; + /* Create new item */ + newitem=cJSON_New_Item(); + if (!newitem) return 0; + /* Copy over all vars */ + newitem->type=item->type&(~cJSON_IsReference),newitem->valueint=item->valueint,newitem->valuedouble=item->valuedouble; + if (item->valuestring) {newitem->valuestring=cJSON_strdup(item->valuestring); if (!newitem->valuestring) {cJSON_Delete(newitem);return 0;}} + if (item->string) {newitem->string=cJSON_strdup(item->string); if (!newitem->string) {cJSON_Delete(newitem);return 0;}} + /* If non-recursive, then we're done! */ + if (!recurse) return newitem; + /* Walk the ->next chain for the child. */ + cptr=item->child; + while (cptr) + { + newchild=cJSON_Duplicate(cptr,1); /* Duplicate (with recurse) each item in the ->next chain */ + if (!newchild) {cJSON_Delete(newitem);return 0;} + if (nptr) {nptr->next=newchild,newchild->prev=nptr;nptr=newchild;} /* If newitem->child already set, then crosswire ->prev and ->next and move on */ + else {newitem->child=newchild;nptr=newchild;} /* Set newitem->child and move to it */ + cptr=cptr->next; + } + return newitem; +} + +void cJSON_Minify(char *json){ + char *into=json; + while (*json) + { + if (*json==' ') json++; + else if (*json=='\t') json++; /* Whitespace characters. */ + else if (*json=='\r') json++; + else if (*json=='\n') json++; + else if (*json=='/' && json[1]=='/') while (*json && *json!='\n') json++; /* double-slash comments, to end of line. */ + else if (*json=='/' && json[1]=='*') {while (*json && !(*json=='*' && json[1]=='/')) json++;json+=2;} /* multiline comments. */ + else if (*json=='\"'){*into++=*json++;while (*json && *json!='\"'){if (*json=='\\') *into++=*json++;*into++=*json++;}*into++=*json++;} /* string literals, which are \" sensitive. */ + else *into++=*json++; /* All other characters. */ + } + *into=0; /* and null-terminate. */ +} diff --git a/firmware/stm32-esp/user/cjson/cJSON.h b/firmware/stm32-esp/user/cjson/cJSON.h new file mode 100644 index 00000000..77b3d44a --- /dev/null +++ b/firmware/stm32-esp/user/cjson/cJSON.h @@ -0,0 +1,126 @@ +#ifndef _cJSON_H_ +#define _cJSON_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif + +/* cJSON Types: */ +#define cJSON_False 0 +#define cJSON_True 1 +#define cJSON_NULL 2 +#define cJSON_Number 3 +#define cJSON_String 4 +#define cJSON_Array 5 +#define cJSON_Object 6 + +#define cJSON_IsReference 256 +#define cJSON_StringIsConst 512 + +/* The cJSON structure: */ +typedef struct cJSON { + struct cJSON *next,*prev; /* next/prev allow you to walk array/object chains. Alternatively, use GetArraySize/GetArrayItem/GetObjectItem */ + struct cJSON *child; /* An array or object item will have a child pointer pointing to a chain of the items in the array/object. */ + + int type; /* The type of the item, as above. */ + + char *valuestring; /* The item's string, if type==cJSON_String */ + int valueint; /* The item's number, if type==cJSON_Number */ + double valuedouble; /* The item's number, if type==cJSON_Number */ + + char *string; /* The item's name string, if this item is the child of, or is in the list of subitems of an object. */ +} cJSON; + +typedef struct cJSON_Hooks { + void *(*malloc_fn)(size_t sz); + void (*free_fn)(void *ptr); +} cJSON_Hooks; + +/* 向cJSON提供malloc、realloc和free函数 */ +extern void cJSON_InitHooks(cJSON_Hooks* hooks); + +/* 提供一个JSON块，然后返回一个可以查询的cJSON对象。完成后调用cJSON_Delete */ +extern cJSON *cJSON_Parse(const char *value); +/* 将cJSON实体呈现为用于传输/存储的文本。完成后释放char* */ +extern char *cJSON_Print(cJSON *item); +/* 将cJSON实体呈现为用于传输/存储的文本，而不进行任何格式化。完成后释放char* */ +extern char *cJSON_PrintUnformatted(cJSON *item); +/* 使用缓冲策略将cJSON实体呈现为文本。预缓冲是对最终大小的猜测。猜测减少了重新分配。fmt=0表示无格式,=1表示有格式 */ +extern char *cJSON_PrintBuffered(cJSON *item,int prebuffer,int fmt); +/* 删除一个cJSON实体和所有子实体 */ +extern void cJSON_Delete(cJSON *c); + +/* 返回数组(或对象)中的项数 */ +extern int cJSON_GetArraySize(cJSON *array); +/* 从数组“数组”中检索项目编号“项目”。如果不成功，返回NULL */ +extern cJSON *cJSON_GetArrayItem(cJSON *array,int item); +/* 从对象中获取项目“string”。不区分大小写 */ +extern cJSON *cJSON_GetObjectItem(cJSON *object,const char *string); + +/* 用于分析失败的语法。这将返回一个指向解析错误的指针。你可能需要回头看几个字才能理解它。当cJSON_Parse()返回0时定义。当cJSON_Parse()成功时为0 */ +extern const char *cJSON_GetErrorPtr(void); + +/* 这些调用创建适当类型的cJSON项 */ +extern cJSON *cJSON_CreateNull(void); +extern cJSON *cJSON_CreateTrue(void); +extern cJSON *cJSON_CreateFalse(void); +extern cJSON *cJSON_CreateBool(int b); +extern cJSON *cJSON_CreateNumber(double num); +extern cJSON *cJSON_CreateString(const char *string); +extern cJSON *cJSON_CreateArray(void); +extern cJSON *cJSON_CreateObject(void); + +/* 这些实用程序创建一个计数项数组 */ +extern cJSON *cJSON_CreateIntArray(const int *numbers,int count); +extern cJSON *cJSON_CreateFloatArray(const float *numbers,int count); +extern cJSON *cJSON_CreateDoubleArray(const double *numbers,int count); +extern cJSON *cJSON_CreateStringArray(const char **strings,int count); + +/* 向指定的数组/对象追加项 */ +extern void cJSON_AddItemToArray(cJSON *array, cJSON *item); +extern void cJSON_AddItemToObject(cJSON *object,const char *string,cJSON *item); +extern void cJSON_AddItemToObjectCS(cJSON *object,const char *string,cJSON *item); /* Use this when string is definitely const (i.e. a literal, or as good as), and will definitely survive the cJSON object */ +/* Append reference to item to the specified array/object. Use this when you want to add an existing cJSON to a new cJSON, but don't want to corrupt your existing cJSON. */ +extern void cJSON_AddItemReferenceToArray(cJSON *array, cJSON *item); +extern void cJSON_AddItemReferenceToObject(cJSON *object,const char *string,cJSON *item); + +/* 从数组/对象中删除/分离项 */ +extern cJSON *cJSON_DetachItemFromArray(cJSON *array,int which); +extern void cJSON_DeleteItemFromArray(cJSON *array,int which); +extern cJSON *cJSON_DetachItemFromObject(cJSON *object,const char *string); +extern void cJSON_DeleteItemFromObject(cJSON *object,const char *string); + +/* Update array items. */ +extern void cJSON_InsertItemInArray(cJSON *array,int which,cJSON *newitem); /* Shifts pre-existing items to the right. */ +extern void cJSON_ReplaceItemInArray(cJSON *array,int which,cJSON *newitem); +extern void cJSON_ReplaceItemInObject(cJSON *object,const char *string,cJSON *newitem); + +/* 复制一个cJSON项目 */ +extern cJSON *cJSON_Duplicate(cJSON *item,int recurse); +/* Duplicate will create a new, identical cJSON item to the one you pass, in new memory that will +need to be released. With recurse!=0, it will duplicate any children connected to the item. +The item->next and ->prev pointers are always zero on return from Duplicate. */ + +/* ParseWithOpts允许您要求(并检查)JSON是否以null结尾，并检索指向解析后的最终字节的指针 */ +extern cJSON *cJSON_ParseWithOpts(const char *value,const char **return_parse_end,int require_null_terminated); + +extern void cJSON_Minify(char *json); + +/* 用于快速创建内容的宏 */ +#define cJSON_AddNullToObject(object,name) cJSON_AddItemToObject(object, name, cJSON_CreateNull()) +#define cJSON_AddTrueToObject(object,name) cJSON_AddItemToObject(object, name, cJSON_CreateTrue()) +#define cJSON_AddFalseToObject(object,name) cJSON_AddItemToObject(object, name, cJSON_CreateFalse()) +#define cJSON_AddBoolToObject(object,name,b) cJSON_AddItemToObject(object, name, cJSON_CreateBool(b)) +#define cJSON_AddNumberToObject(object,name,n) cJSON_AddItemToObject(object, name, cJSON_CreateNumber(n)) +#define cJSON_AddStringToObject(object,name,s) cJSON_AddItemToObject(object, name, cJSON_CreateString(s)) + +/* 在分配整数值时，也需要将其传播到valuedouble */ +#define cJSON_SetIntValue(object,val) ((object)?(object)->valueint=(object)->valuedouble=(val):(val)) +#define cJSON_SetNumberValue(object,val) ((object)?(object)->valueint=(object)->valuedouble=(val):(val)) + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/firmware/stm32-esp/user/com/uart1_receive.c b/firmware/stm32-esp/user/com/uart1_receive.c new file mode 100644 index 00000000..0857cb9f --- /dev/null +++ b/firmware/stm32-esp/user/com/uart1_receive.c @@ -0,0 +1,40 @@ +#include "uart1_receive.h" + +void BSP_UART1ReceiveInfor(void) +{ + if(UART1ReadFlag&0x8000) + { + UART1ReadFlag = 0; + memset((void *)UART1ReadBuf,0,sizeof(UART1ReadBuf)); + } +} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart1_receive.h b/firmware/stm32-esp/user/com/uart1_receive.h new file mode 100644 index 00000000..67e532ff --- /dev/null +++ b/firmware/stm32-esp/user/com/uart1_receive.h @@ -0,0 +1,27 @@ +#ifndef _UART1_RECEIVE_H_ +#define _UART1_RECEIVE_H_ + +#include "stm32f10x.h" + +#include "bsp_uart1.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +void Sys_Usart1RecMessage(void); + +#endif + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart2_receive.c b/firmware/stm32-esp/user/com/uart2_receive.c new file mode 100644 index 00000000..5b66475e --- /dev/null +++ b/firmware/stm32-esp/user/com/uart2_receive.c @@ -0,0 +1,81 @@ +#include "uart2_receive.h" + +uint8_t txLen = 0; +uint8_t txBuf[20] = {0}; + +static uint8_t Server_CheckSum(uint8_t * buf) +{ + uint8_t len = 0,i = 0; + uint16_t CheckSum = 0; + len = buf[2] - 2; + + for( i = 0; i < len; i++) + CheckSum += buf[i+2]; + + return (uint8_t)CheckSum; +} + +void Server_Protocol(void) +{ + if(UART2ReadFlag&0x8000) + { + if(UART2ReadBuf[0]==0xAA && UART2ReadBuf[1]==0xBB) + { + // 校验和 + switch(UART2ReadBuf[3]) + { + case 0x90 : { } break; // 返回配网结果 + case 0x91 : { DevParam.Server = UART2ReadBuf[8]; } break; // 返回网络状态 + + case 0x94 : { } break; // 返回上报属性结果 + case 0x95 : { } break; // 返回上报事件结果 + + case 0x96 : { } break; // 下发控制 + case 0x97 : { } break; // 下发获取状态 + default : break; + } + } + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf,0,sizeof(UART2ReadBuf)); + } + + // 间隔2秒上报设备状态 + if( (DevParam.Server==2) && (DevParam.ServerUpdateTime>=2000) ) + { + txLen = 0; + txBuf[txLen++] = 0xAA; txBuf[txLen++] = 0xBB; + txBuf[txLen++] = 0x00; // 数据长度，帧头后有效数据长度 + txBuf[txLen++] = 0x84; // 上报属性 + txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x02; txBuf[txLen++] = 0x03; txBuf[txLen++] = 0x04; // 客户端ID + + /////////参数//////// + txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x01; + txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x01; + /////////////////////// + + txBuf[txLen++] = 0x00; // 校验和 + txBuf[txLen++] = 0x5F; // 帧尾 + + txBuf[2] = txLen-2; // 数据长度 + txBuf[txLen-2] = Server_CheckSum(txBuf);// 校验和 + + // 发送 + ESP8266_SendData( txBuf, txLen); + + DevParam.ServerUpdateTime = 0; + } +} + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart2_receive.h b/firmware/stm32-esp/user/com/uart2_receive.h new file mode 100644 index 00000000..a977226b --- /dev/null +++ b/firmware/stm32-esp/user/com/uart2_receive.h @@ -0,0 +1,21 @@ +#ifndef _UART2_RECEIVE_H_ +#define _UART2_RECEIVE_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_uart2.h" + + +#endif + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart3_receive.c b/firmware/stm32-esp/user/com/uart3_receive.c new file mode 100644 index 00000000..98fad439 --- /dev/null +++ b/firmware/stm32-esp/user/com/uart3_receive.c @@ -0,0 +1,28 @@ +#include "uart3_receive.h" + +void BSP_UART3ReceiveInfor(void) +{ +// Sys_Usart3RecComplete(System_1ms); +// if(Usart3ReadFlag&0x8000) +// { +// Sys_Usart3SendStr("uart3:"); +// Sys_Usart3SendData(Usart3ReadBuf,(Usart3ReadFlag&(~(1<<15)))); +// +// Usart3ReadFlag = 0; +// memset((void *)Usart3ReadBuf,0,sizeof(Usart3ReadBuf)); +// } +} + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart3_receive.h b/firmware/stm32-esp/user/com/uart3_receive.h new file mode 100644 index 00000000..e007392a --- /dev/null +++ b/firmware/stm32-esp/user/com/uart3_receive.h @@ -0,0 +1,24 @@ +#ifndef _UART3_RECEIVE_H_ +#define _UART3_RECEIVE_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_uart3.h" + + +void BSP_UART3ReceiveInfor(void); + + +#endif + + + + + + + + + + diff --git a/firmware/stm32-esp/user/data/basic_data.c b/firmware/stm32-esp/user/data/basic_data.c new file mode 100644 index 00000000..366ded34 --- /dev/null +++ b/firmware/stm32-esp/user/data/basic_data.c @@ -0,0 +1,18 @@ +#include "basic_data.h" + +uint8_t UART1ReadBuf[100] = {0}; +uint16_t UART1ReadFlag = 0; + +uint8_t UART2ReadBuf[100] = {0}; +uint16_t UART2ReadFlag = 0; + +uint8_t UART3ReadBuf[100] = {0}; +uint16_t UART3ReadFlag = 0; + +DevParam_t DevParam = {0}; + + + + + + diff --git a/firmware/stm32-esp/user/data/basic_data.h b/firmware/stm32-esp/user/data/basic_data.h new file mode 100644 index 00000000..3e56b2aa --- /dev/null +++ b/firmware/stm32-esp/user/data/basic_data.h @@ -0,0 +1,65 @@ +#ifndef _BASIC_DATA_H_ +#define _BASIC_DATA_H_ + +#include "stm32f10x.h" + +#define Device_LCD 1 + +extern uint8_t UART1ReadBuf[100]; +extern uint16_t UART1ReadFlag; + +extern uint8_t UART2ReadBuf[100]; +extern uint16_t UART2ReadFlag; + +extern uint8_t UART3ReadBuf[100]; +extern uint16_t UART3ReadFlag; + +typedef enum +{ + RunPhase_Standby = 0x01, + RunPhase_Runing = 0x02, + RunPhase_Close = 0x03 +}RunPhase_E; + +typedef struct +{ + uint16_t U3GetTime; + + uint8_t BatCheck; // 电池检测 + float BatVoltage; // 电池电压 + uint8_t BatSOC; // 电池SOC + uint8_t ShortBatSOC;// 显示电池SOC + uint8_t BatCharging;// 电池充电中 + + uint16_t BatInforGetTime; // 电池信息获取时间 + uint16_t BatIconRefreshTime;// 电池图标刷新时间 + + uint16_t AirInforGetTime; // 空气信息获取时间 + + uint16_t ESP8266SendTime; + + // 运行阶段 + RunPhase_E RunPhase; + RunPhase_E ShortRunPhase; + + uint8_t SideBeat; // 侧边标识 + uint16_t SideBeatTime; // 侧边跳动时间 + + uint16_t Server; + uint16_t ServerUpdateTime; + + uint16_t ShowPM1_0; + uint16_t ShowPM2_5; + uint16_t ShowPM10; + + uint16_t PM1_0; + uint16_t PM2_5; + uint16_t PM10; +}DevParam_t; +extern DevParam_t DevParam; + +#endif + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_adc.c b/firmware/stm32-esp/user/drive/bsp_adc.c new file mode 100644 index 00000000..592c59d8 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_adc.c @@ -0,0 +1,70 @@ +#include "bsp_adc.h" + +void BSP_ADCInit(void) +{ + ADC_InitTypeDef ADC_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA, ENABLE); + + RCC_ADCCLKConfig(RCC_PCLK2_Div6); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; + GPIO_Init(GPIOA,&GPIO_InitStructure); + + ADC_DeInit(ADC1); + + /* ADC1 configuration ------------------------------------------------------*/ + ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; + ADC_InitStructure.ADC_ScanConvMode = DISABLE; + ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; + ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; + ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; + ADC_InitStructure.ADC_NbrOfChannel = 1; + ADC_Init(ADC1, &ADC_InitStructure); + + ADC_Cmd(ADC1, ENABLE); + + ADC_ResetCalibration(ADC1); + while(ADC_GetResetCalibrationStatus(ADC1)); + ADC_StartCalibration(ADC1); + while(ADC_GetCalibrationStatus(ADC1)); + ADC_SoftwareStartConvCmd(ADC1,ENABLE); +} + +float ADC_GetSimpleData(void) +{ + float SimpleVoltage = 0; + uint8_t x = 0; + uint32_t total = 0; + for( x = 0;x < 5; x++) + { + // 开启转换,等待DMA传输结束 + ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 1, ADC_SampleTime_239Cycles5 ); + ADC_SoftwareStartConvCmd(ADC1, ENABLE); + while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC )){}//等待转换结束 + total += ADC_GetConversionValue(ADC1); + Delay_ms(2); + } + total = (uint32_t)(total/5); + SimpleVoltage = (float)total*3.3/4096.0*2.0; + return SimpleVoltage; +} + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_adc.h b/firmware/stm32-esp/user/drive/bsp_adc.h new file mode 100644 index 00000000..9a0ff8a8 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_adc.h @@ -0,0 +1,17 @@ +#ifndef _BSP_ADC_H_ +#define _BSP_ADC_H_ + +#include "stm32f10x.h" +#include "string.h" + +#include "bsp_port.h" + +#include "bsp_timer3.h" + +#include "basic_data.h" + +void BSP_ADCInit(void); +float ADC_GetSimpleData(void); + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_clock.c b/firmware/stm32-esp/user/drive/bsp_clock.c new file mode 100644 index 00000000..422c5ec2 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_clock.c @@ -0,0 +1,53 @@ +#include "bsp_clock.h" + +static uint8_t fac_us = 0; +static uint16_t fac_ms = 0; + +//功能：systick初始化 +void BSP_ClockInit(void) +{ + SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); //选择外部时钟 HCLK/8 + fac_us=SystemCoreClock/8000000;//为系统时钟的1/8 + fac_ms = (uint16_t)fac_us*1000; +} + +//功能：毫秒级延时,最多1864ms +void Delay_ms(uint32_t nms) +{ + uint32_t temp = 0; + SysTick->LOAD=(uint32_t)nms*fac_ms;//时间加载(SysTick->LOAD为24bit) + SysTick->VAL =0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; + } + while( (temp&0x01) && (!(temp&(1<<16))) );//等待时间到达 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 +} + +//功能：微秒级延时，最多1800ms +void Delay_us(uint32_t nus) +{ + uint32_t temp; + SysTick->LOAD=nus*fac_us; //时间加载 + SysTick->VAL=0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; + } + while( (temp&0x01) && (!(temp&(1<<16))) );//等待时间到达 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 +} + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_clock.h b/firmware/stm32-esp/user/drive/bsp_clock.h new file mode 100644 index 00000000..3c1a418b --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_clock.h @@ -0,0 +1,12 @@ +#ifndef _BSP_CLOCK_H_ +#define _BSP_CLOCK_H_ + +#include "stm32f10x.h" + +void Delay_ms(uint32_t nms); +void Delay_us(uint32_t nus); + +void BSP_ClockInit(void); + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_port.c b/firmware/stm32-esp/user/drive/bsp_port.c new file mode 100644 index 00000000..7ebe5bc5 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_port.c @@ -0,0 +1,74 @@ +#include "bsp_port.h" + +// 禁用JTAG引脚,保留SWD引脚 +void Sys_DisableJTAGEnableSWD(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE); //开启AFIO时钟 + GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable,ENABLE); //禁止JTAG功能 +} + +// PM 初始化 +void BSP_PowerInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + EXTI_InitTypeDef EXTI_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC,ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1|GPIO_Pin_12|GPIO_Pin_13; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOB,&GPIO_InitStructure); + + Power_PMD4(0); Power_3V3(0); Power_LCD(0); + + // 唤醒/正在充电指示/充电完成 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_14; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + /* Configure one bit for preemption priority */ + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); + + /* 配置P[A|B|C|D|E]0为中断源 */ + NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource15); + EXTI_InitStructure.EXTI_Line = EXTI15_10_IRQn; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; //下降沿中断 + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); +} + +void EXTI15_10_IRQHandler(void) +{ + if(EXTI_GetITStatus(EXTI_Line15) != RESET) + { + EXTI_ClearITPendingBit(EXTI_Line15); + + if(DevParam.RunPhase == 0) + { + BSP_Restart(); + } + } +} + +// mcu 重新启动 +void BSP_Restart(void){ + __set_FAULTMASK(1); + NVIC_SystemReset(); +} + + + diff --git a/firmware/stm32-esp/user/drive/bsp_port.h b/firmware/stm32-esp/user/drive/bsp_port.h new file mode 100644 index 00000000..23c0a77f --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_port.h @@ -0,0 +1,34 @@ +#ifndef _BSP_PORT_H_ +#define _BSP_PORT_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "bsp_timer3.h" + +#include "basic_data.h" + +// 禁用JTAG引脚,保留SWD引脚 +void Sys_DisableJTAGEnableSWD(void); + +#define Power_PMD4(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_1) :GPIO_ResetBits(GPIOB,GPIO_Pin_1) // PM2.5 +#define Power_LCD(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_12):GPIO_ResetBits(GPIOB,GPIO_Pin_12)// LCD +#define Power_3V3(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_13):GPIO_ResetBits(GPIOB,GPIO_Pin_13)// 3.3V + +#define Read_BatCharging() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_13)// 电池充电中状态，低电平有效 +#define Read_BatComplete() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_14)// 电池充电完成状态，低电平有效 +#define Read_BootKey() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_15)// 开机按键 +void BSP_PowerInit(void); +void Dev_ReadIndicate(void); + +// 重启 +void BSP_Restart(void); + + + +#endif + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_timer3.c b/firmware/stm32-esp/user/drive/bsp_timer3.c new file mode 100644 index 00000000..a19201ee --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_timer3.c @@ -0,0 +1,123 @@ +#include "bsp_timer3.h" + +/*如果Period=N*10，那么每隔N毫秒中断一次。*/ +void BSP_Timer3Init(void){ + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); //时钟使能 + + TIM_TimeBaseStructure.TIM_Period = 9; //设置在下一个更新事件装入活动的自动重装载寄存器周期的值 计数到N*10为Nms + TIM_TimeBaseStructure.TIM_Prescaler =(7200-1); //设置用来作为TIMx时钟频率除数的预分频值 10Khz的计数频率 + TIM_TimeBaseStructure.TIM_ClockDivision = 0; //设置时钟分割:TDTS = Tck_tim + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIM向上计数模式 + TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); //根据TIM_TimeBaseInitStruct中指定的参数初始化TIMx的时间基数单位 + + TIM_ITConfig( //使能或者失能指定的TIM中断 + TIM3, //TIM3 + TIM_IT_Update| //TIM 中断源 + TIM_IT_Trigger,//TIM 触发中断源 + ENABLE //使能 + ); + /*配置中断优先级*/ + NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; //TIM3中断 + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //先占优先级0级 + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //从优先级3级 + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQ通道被使能 + NVIC_Init(&NVIC_InitStructure);//根据NVIC_InitStruct中指定的参数初始化外设NVIC寄存器 + + TIM_Cmd(TIM3, ENABLE); //使能TIMx外设 +} + +uint16_t UART2Count = 0; +uint8_t UART2RecTime = 0; + +uint16_t UART3Count = 0; +uint8_t UART3RecTime = 0; + +void TIM3_IRQHandler(void) //TIM3中断服务程序 +{ + if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET)//检查指定的TIM中断发生与否 + { + TIM_ClearITPendingBit(TIM3,TIM_IT_Update); //清除TIMx的中断标志位 + + // 串口2接收判断 + if((UART2ReadFlag!=0)&&(!(UART2ReadFlag&0x8000))) + { + if(UART2RecTime<=200) + UART2RecTime++; + if(UART2RecTime >= 20) + { + if(UART2Count == UART2ReadFlag) + { + UART2ReadFlag |= (1 << 15); + UART2Count = 0; + UART2RecTime = 0; + } + else + { + UART2Count = UART2ReadFlag; + UART2RecTime = 0; + } + } + } + else { UART2RecTime = 0; UART2Count = 0; } + // 串口3接收判断 + if((UART3ReadFlag!=0)&&(!(UART3ReadFlag&0x8000))) + { + if(UART3RecTime <= 100) + UART3RecTime++; + if(UART3RecTime >= 20) + { + if(UART3Count == UART3ReadFlag) + { + UART3ReadFlag |= (1 << 15); + UART3Count = 0; + UART3RecTime = 0; + } + else + { + UART3Count = UART3ReadFlag; + UART3RecTime = 0; + } + } + } + else { UART3RecTime = 0; UART3Count = 0; } + + // 空气信息获取时间 + if(DevParam.AirInforGetTime<65000) + DevParam.AirInforGetTime++; + // 电池图标刷新时间 + if(DevParam.BatIconRefreshTime<65000) + DevParam.BatIconRefreshTime++; + // 电池信息获取时间 + if(DevParam.BatInforGetTime<65000) + DevParam.BatInforGetTime++; + // 侧边跳动时间 + if(DevParam.SideBeatTime<65000) + DevParam.SideBeatTime++; + // 上报到服务器状态时间 + if(DevParam.ServerUpdateTime<65000) + DevParam.ServerUpdateTime++; + // 发送时间 + if(DevParam.ESP8266SendTime<65000) + DevParam.ESP8266SendTime++; + } +} + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_timer3.h b/firmware/stm32-esp/user/drive/bsp_timer3.h new file mode 100644 index 00000000..8efc8ba1 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_timer3.h @@ -0,0 +1,15 @@ +#ifndef _BSP_TIMER3_H_ +#define _BSP_TIMER3_H_ + +#include "stm32f10x.h" + +#include "bsp_uart3.h" + +#include "esp8266_uart2.h" + +#include "basic_data.h" + +void BSP_Timer3Init(void); + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_tool.c b/firmware/stm32-esp/user/drive/bsp_tool.c new file mode 100644 index 00000000..1d31fd69 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_tool.c @@ -0,0 +1,2 @@ +#include "bsp_tool.h" + diff --git a/firmware/stm32-esp/user/drive/bsp_tool.h b/firmware/stm32-esp/user/drive/bsp_tool.h new file mode 100644 index 00000000..fcb2c4fe --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_tool.h @@ -0,0 +1,11 @@ +#ifndef _BSP_TOOL_H_ +#define _BSP_TOOL_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "basic_data.h" + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_uart1.c b/firmware/stm32-esp/user/drive/bsp_uart1.c new file mode 100644 index 00000000..e1d6f012 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_uart1.c @@ -0,0 +1,107 @@ +#include "bsp_uart1.h" + +void BSP_UART1SendStr(char *ch){ + uint16_t i = 0,j = 0; + j = strlen(ch); + + for(i = 0;i < j;i++) + { + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET){}; + USART_SendData(USART1,ch[i]); + } + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); +} + +// 发送数据 +void BSP_UART1SendData(uint8_t *ch,uint16_t len){ + uint16_t i; + for(i = 0;i < len;i++) + { + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET){}; + USART_SendData(USART1,ch[i]); + } + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); +} + +void BSP_UART1Init(uint32_t bound){ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + //使能USART1,GPIOA + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOA,ENABLE); + + //USART1_TX GPIOA.9 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + //USART1_RX GPIOA.10初始化 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + //Usart1 NVIC 配置 + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + //USART 初始化设置 + USART_InitStructure.USART_BaudRate = bound; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART1,&USART_InitStructure); + + USART_ITConfig(USART1,USART_IT_RXNE,ENABLE); + USART_Cmd(USART1, ENABLE); +} + +// 读取USARTx->SR能避免莫名其妙的错误 +uint8_t Usart1ReadBuf[100] = {0}; +uint16_t Usart1ReadFlag = 0; +void USART1_IRQHandler(void){ + uint8_t res = 0; + if(USART_GetITStatus(USART1,USART_IT_RXNE) != RESET) + { + res =USART_ReceiveData(USART1); + + // 是否存在数据没有处理 + if( (Usart1ReadFlag&0x8000)==0 ) + { + Usart1ReadBuf[Usart1ReadFlag] = res; + Usart1ReadFlag++; + + // 判断是否接收结束 + if(Usart1ReadFlag>=90) + { + Usart1ReadFlag |= (1 << 15); + } + } + } + //溢出-如果发生溢出需要先读SR,再读DR,则可清除不断入中断的问题 + if( USART_GetFlagStatus(USART1,USART_FLAG_ORE)==SET ) + { + USART_ReceiveData(USART1); + USART_ClearFlag(USART1,USART_FLAG_ORE); + } + USART_ClearFlag(USART1,USART_IT_RXNE); +} + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_uart1.h b/firmware/stm32-esp/user/drive/bsp_uart1.h new file mode 100644 index 00000000..f5c03333 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_uart1.h @@ -0,0 +1,22 @@ +#ifndef _BSP_UART1_H_ +#define _BSP_UART1_H_ + +#include "stm32f10x.h" +#include "bsp_clock.h" + +#include "stdio.h" +#include "string.h" +#include "stdarg.h" + +#include "bsp_timer3.h" + + +void Sys_SendLog(const char *fmt, ...); + +// 判断串口01接收完成 +void BSP_UART1RecComplete(uint64_t Std_1ms); +void BSP_UART1SendStr(char *ch); +void BSP_UART1SendData(uint8_t *ch,uint16_t len); +void BSP_UART1Init(uint32_t bound); + +#endif diff --git a/firmware/stm32-esp/user/drive/bsp_uart2.c b/firmware/stm32-esp/user/drive/bsp_uart2.c new file mode 100644 index 00000000..077dd0bb --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_uart2.c @@ -0,0 +1,111 @@ +#include "bsp_uart2.h" + +// 串口2 PA2 TX PA3 RX +void Dev_UART2SendStr(char* fmt,...){ + uint8_t tbuf[200] = {0}; + uint16_t i = 0,j = 0; + + va_list ap; + va_start(ap,fmt); + vsprintf((char*)tbuf, fmt, ap); + va_end(ap); + + j = strlen((const char*)tbuf); + + for( i = 0; i < j; i++) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, tbuf[i]); + } + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET); +} +// 发送数据 +void Dev_UART2SendData(uint8_t *ch,uint16_t len){ + uint16_t i = 0; + for(i = 0;i < len;i++) + { + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2,ch[i]); + } + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET); +} + +void BSP_UART2Init(uint32_t bound) +{ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + //使能USART,GPIO + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2,ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + // NVIC 配置 + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + + NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + // USART 配置 + USART_InitStructure.USART_BaudRate = bound; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART2, &USART_InitStructure); + + USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);//开启串口接受中断 + USART_Cmd(USART2, ENABLE); //使能串口 +} + +/*读取USARTx->SR能避免莫名其妙的错误*/ +void USART2_IRQHandler(void) +{ + uint8_t res = 0; + if(USART_GetITStatus(USART2, USART_IT_RXNE)!=RESET) + { + res = USART_ReceiveData(USART2); + + // 是否存在数据没有处理 + if( (UART2ReadFlag&0x8000)==0 ) + { + UART2ReadBuf[UART2ReadFlag++] = res; + if(UART2ReadFlag>=90) + { + UART2ReadFlag |= (1 << 15); + } + } + } + /*溢出-如果发生溢出需要先读SR,再读DR寄存器则可清除不断入中断的问题*/ + if( USART_GetFlagStatus(USART2, USART_FLAG_ORE)==SET ) + { + USART_ReceiveData(USART2); + USART_ClearFlag(USART2, USART_FLAG_ORE); + } + USART_ClearFlag(USART2, USART_IT_RXNE); +} + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_uart2.h b/firmware/stm32-esp/user/drive/bsp_uart2.h new file mode 100644 index 00000000..b3f7bffd --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_uart2.h @@ -0,0 +1,19 @@ +#ifndef _BSP_UART2_H_ +#define _BSP_UART2_H_ + +#include "stm32f10x.h" +#include "bsp_clock.h" + +#include "stdio.h" +#include "string.h" +#include "stdarg.h" + +#include "bsp_timer3.h" + +#include "basic_data.h" + +void Dev_UART2SendStr(char* fmt,...); +void Dev_UART2SendData(uint8_t *ch, uint16_t len); +void BSP_UART2Init(uint32_t bound); + +#endif diff --git a/firmware/stm32-esp/user/drive/bsp_uart3.c b/firmware/stm32-esp/user/drive/bsp_uart3.c new file mode 100644 index 00000000..f29dca5d --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_uart3.c @@ -0,0 +1,109 @@ +#include "bsp_uart3.h" + +// 串口3 PB10 TX PB11 RX +void BSP_UART3SendStr(char *ch){ + uint16_t i = 0,j = 0; + j = strlen(ch); + + for(i = 0;i < j;i++) + { + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET){}; + USART_SendData(USART3,ch[i]); + } + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET); +} + +// 发送数据 +void BSP_UART3SendData(uint8_t *ch,uint16_t len){ + uint16_t i = 0; + for(i = 0;i < len;i++) + { + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET){}; + USART_SendData(USART3,ch[i]); + } + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET); +} + +void BSP_UART3Init(uint32_t bound){ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + //使能USART3,GPIOB + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3,ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + + //USART3_TX GPIOB10 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOB, &GPIO_InitStructure); + + //USART3_RX GPIOB11 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOB, &GPIO_InitStructure); + + //Usart3 NVIC 配置 + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + + NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + //USART 初始化设置 + USART_InitStructure.USART_BaudRate = bound; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART3, &USART_InitStructure); + + USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);//开启串口接受中断 + USART_Cmd(USART3, ENABLE); //使能串口 +} + +// 读取USARTx->SR能避免莫名其妙的错误 +uint8_t Usart3ReadBuf[60] = {0}; +uint16_t Usart3ReadFlag = 0; +void USART3_IRQHandler(void) +{ + uint8_t res = 0; + if(USART_GetITStatus(USART3, USART_IT_RXNE) != RESET) + { + res = USART_ReceiveData(USART3); + + // 是否存在数据没有处理 + if( (Usart3ReadFlag&0x8000)==0 ) + { + Usart3ReadBuf[Usart3ReadFlag] = res; + Usart3ReadFlag++; + if(Usart3ReadFlag>=59) + { + Usart3ReadFlag |= (1 << 15); + } + } + } + //溢出-如果发生溢出需要先读SR,再读DR寄存器则可清除不断入中断的问题 + if( USART_GetFlagStatus(USART3,USART_FLAG_ORE)==SET ) + { + USART_ReceiveData(USART3); + USART_ClearFlag(USART3,USART_FLAG_ORE); + } + USART_ClearFlag(USART3,USART_IT_RXNE); +} + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_uart3.h b/firmware/stm32-esp/user/drive/bsp_uart3.h new file mode 100644 index 00000000..cff599f4 --- /dev/null +++ b/firmware/stm32-esp/user/drive/bsp_uart3.h @@ -0,0 +1,18 @@ +#ifndef _BSP_UART3_H_ +#define _BSP_UART3_H_ + +#include "stm32f10x.h" +#include "bsp_clock.h" + +#include "stdio.h" +#include "string.h" + +#include "basic_data.h" + +// 判断串口03接收完成 +void BSP_UART3SendStr(char *ch); +void BSP_UART3SendData(uint8_t *ch,uint16_t len); +void BSP_UART3Init(uint32_t bound); + +#endif + diff --git a/firmware/stm32-esp/user/main.c b/firmware/stm32-esp/user/main.c new file mode 100644 index 00000000..7067220b --- /dev/null +++ b/firmware/stm32-esp/user/main.c @@ -0,0 +1,67 @@ +#include "main.h" + +/************************ + ESP8266 UART2 + PMD4 UART3 +************************/ +int main() +{ + BSP_ClockInit(); + + BSP_Timer3Init(); + + // 电源控制部分 + BSP_PowerInit(); + Delay_ms(200); + + // 电池电压ADC + BSP_ADCInit(); + + // LCD + #ifdef Device_LCD + Delay_ms(500); + + SimLCD_Init(); + + DevParam.AirInforGetTime = 3000; + DevParam.BatIconRefreshTime= 3000; + DevParam.BatInforGetTime = 3000; + DevParam.SideBeatTime = 3000; + + DevParam.ShowPM1_0 = 200; + DevParam.ShowPM2_5 = 200; + DevParam.ShowPM10 = 200; + #endif + while(1) + { + // 网络配网部分 + ESP8266_NetWorkFlow(); + + // 网络数据接收处理 + ESP8266_NetReceiveInfor(); + + // 电池，获取电池信息 + Bat_GetWorkInfor(); + + // 读取电路板状态 + Dev_ScanExtIndicate(); + + // 切换工作模式 + Dev_SwitchWorkMode(); + + // 系统正常运行处理流程 + if(DevParam.RunPhase == RunPhase_Runing) + { + // 显示部分，侧边跳动 + Show_BroadSideBeat(); + + // PMD4，获取空气信息 + PMD4_GetAirInfor(); + } + + // 显示部分，电池图标刷新 + Show_BatIconRefresh(); + } +} + + diff --git a/firmware/stm32-esp/user/main.h b/firmware/stm32-esp/user/main.h new file mode 100644 index 00000000..9bfcac83 --- /dev/null +++ b/firmware/stm32-esp/user/main.h @@ -0,0 +1,28 @@ +#ifndef _MAIN_H_ +#define _MAIN_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "bsp_tool.h" + +#include "bsp_adc.h" + +#include "pm_uart3.h" + +#include "uart2_receive.h" + +#include "simulation_lcd.h" + +#include "esp8266_work.h" + +#include "dev_work.h" + +#include "battery.h" + +#endif diff --git a/firmware/stm32-esp/user/mqtt/MQTTConnect.h b/firmware/stm32-esp/user/mqtt/MQTTConnect.h new file mode 100644 index 00000000..e928c7d0 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTConnect.h @@ -0,0 +1,126 @@ +#ifndef _MQTTCONNECT_H_ +#define _MQTTCONNECT_H_ + +#include "MQTTPacket.h" + +enum connack_return_codes +{ + MQTT_CONNECTION_ACCEPTED = 0, + MQTT_UNNACCEPTABLE_PROTOCOL = 1, + MQTT_CLIENTID_REJECTED = 2, + MQTT_SERVER_UNAVAILABLE = 3, + MQTT_BAD_USERNAME_OR_PASSWORD = 4, + MQTT_NOT_AUTHORIZED = 5, +}; + +#if !defined(DLLImport) + #define DLLImport +#endif +#if !defined(DLLExport) + #define DLLExport +#endif + +typedef union +{ + unsigned char all; /**< all connect flags */ +#if defined(REVERSED) + struct + { + unsigned int username : 1; /**< 3.1 user name */ + unsigned int password : 1; /**< 3.1 password */ + unsigned int willRetain : 1; /**< will retain setting */ + unsigned int willQoS : 2; /**< will QoS value */ + unsigned int will : 1; /**< will flag */ + unsigned int cleansession : 1; /**< clean session flag */ + unsigned int : 1; /**< unused */ + } bits; +#else + struct + { + unsigned int : 1; /**< unused */ + unsigned int cleansession : 1; /**< cleansession flag */ + unsigned int will : 1; /**< will flag */ + unsigned int willQoS : 2; /**< will QoS value */ + unsigned int willRetain : 1; /**< will retain setting */ + unsigned int password : 1; /**< 3.1 password */ + unsigned int username : 1; /**< 3.1 user name */ + } bits; +#endif +} MQTTConnectFlags; /**< connect flags byte */ + +/** + * Defines the MQTT "Last Will and Testament" (LWT) settings for + * the connect packet. + */ +typedef struct +{ + /** The eyecatcher for this structure. must be MQTW. */ + char struct_id[4]; + /** The version number of this structure. Must be 0 */ + int struct_version; + /** The LWT topic to which the LWT message will be published. */ + MQTTString topicName; + /** The LWT payload. */ + MQTTString message; + /** + * The retained flag for the LWT message (see MQTTAsync_message.retained). + */ + unsigned char retained; + /** + * The quality of service setting for the LWT message (see + * MQTTAsync_message.qos and @ref qos). + */ + char qos; +} MQTTPacket_willOptions; + +#define MQTTPacket_willOptions_initializer { {'M', 'Q', 'T', 'W'}, 0, {NULL, {0, NULL}}, {NULL, {0, NULL}}, 0, 0 } + +typedef struct +{ + /** The eyecatcher for this structure. must be MQTC. */ + char struct_id[4]; + /** The version number of this structure. Must be 0 */ + int struct_version; + /** Version of MQTT to be used. 3 = 3.1 4 = 3.1.1 + */ + unsigned char MQTTVersion; + MQTTString clientID; + unsigned short keepAliveInterval; + unsigned char cleansession; + unsigned char willFlag; + MQTTPacket_willOptions will; + MQTTString username; + MQTTString password; +} MQTTPacket_connectData; + +typedef union +{ + unsigned char all; /**< all connack flags */ +#if defined(REVERSED) + struct + { + unsigned int reserved : 7; /**< unused */ + unsigned int sessionpresent : 1; /**< session present flag */ + } bits; +#else + struct + { + unsigned int sessionpresent : 1; /**< session present flag */ + unsigned int reserved: 7; /**< unused */ + } bits; +#endif +} MQTTConnackFlags; /**< connack flags byte */ + +#define MQTTPacket_connectData_initializer { {'M', 'Q', 'T', 'C'}, 0, 4, {NULL, {0, NULL}}, 60, 1, 0, \ + MQTTPacket_willOptions_initializer, {NULL, {0, NULL}}, {NULL, {0, NULL}} } + +DLLExport int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options); +DLLExport int MQTTDeserialize_connect(MQTTPacket_connectData* data, unsigned char* buf, int len); + +DLLExport int MQTTSerialize_connack(unsigned char* buf, int buflen, unsigned char connack_rc, unsigned char sessionPresent); +DLLExport int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen); + +DLLExport int MQTTSerialize_disconnect(unsigned char* buf, int buflen); +DLLExport int MQTTSerialize_pingreq(unsigned char* buf, int buflen); + +#endif /* MQTTCONNECT_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTConnectClient.c b/firmware/stm32-esp/user/mqtt/MQTTConnectClient.c new file mode 100644 index 00000000..2c6c223e --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTConnectClient.c @@ -0,0 +1,181 @@ +#include "MQTTPacket.h" +#include "StackTrace.h" + +#include +/** + * Determines the length of the MQTT connect packet that would be produced using the supplied connect options. + * @param options the options to be used to build the connect packet + * @return the length of buffer needed to contain the serialized version of the packet + */ +int MQTTSerialize_connectLength(MQTTPacket_connectData* options){ + int len = 0; + + FUNC_ENTRY; + + if (options->MQTTVersion == 3) + len = 12; /* variable depending on MQTT or MQIsdp */ + else if (options->MQTTVersion == 4) + len = 10; + + len += MQTTstrlen(options->clientID)+2; + if (options->willFlag) + len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2; + if (options->username.cstring || options->username.lenstring.data) + len += MQTTstrlen(options->username)+2; + if (options->password.cstring || options->password.lenstring.data) + len += MQTTstrlen(options->password)+2; + + FUNC_EXIT_RC(len); + return len; +} +/** + * Serializes the connect options into the buffer. + * @param buf the buffer into which the packet will be serialized + * @param len the length in bytes of the supplied buffer + * @param options the options to be used to build the connect packet + * @return serialized length, or error if 0 + */ +int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options){ + unsigned char *ptr = buf; + MQTTHeader header = {0}; + MQTTConnectFlags flags = {0}; + int len = 0; + int rc = -1; + + FUNC_ENTRY; + if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + + header.byte = 0; + header.bits.type = CONNECT; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, len); /* write remaining length */ + + if (options->MQTTVersion == 4) + { + writeCString(&ptr, "MQTT"); + writeChar(&ptr, (char) 4); + } + else + { + writeCString(&ptr, "MQIsdp"); + writeChar(&ptr, (char) 3); + } + + flags.all = 0; + flags.bits.cleansession = options->cleansession; + flags.bits.will = (options->willFlag) ? 1 : 0; + if (flags.bits.will) + { + flags.bits.willQoS = options->will.qos; + flags.bits.willRetain = options->will.retained; + } + + if (options->username.cstring || options->username.lenstring.data) + flags.bits.username = 1; + if (options->password.cstring || options->password.lenstring.data) + flags.bits.password = 1; + + writeChar(&ptr, flags.all); + writeInt(&ptr, options->keepAliveInterval); + writeMQTTString(&ptr, options->clientID); + if (options->willFlag) + { + writeMQTTString(&ptr, options->will.topicName); + writeMQTTString(&ptr, options->will.message); + } + if (flags.bits.username) + writeMQTTString(&ptr, options->username); + if (flags.bits.password) + writeMQTTString(&ptr, options->password); + + rc = ptr - buf; + + exit: FUNC_EXIT_RC(rc); + return rc; +} +/** + * Deserializes the supplied (wire) buffer into connack data - return code + * @param sessionPresent the session present flag returned (only for MQTT 3.1.1) + * @param connack_rc returned integer value of the connack return code + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param len the length in bytes of the data in the supplied buffer + * @return error code. 1 is success, 0 is failure + */ +int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen){ + MQTTHeader header = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = NULL; + int rc = 0; + int mylen; + MQTTConnackFlags flags = {0}; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + if (header.bits.type != CONNACK) + goto exit; + + curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ + enddata = curdata + mylen; + if (enddata - curdata < 2) + goto exit; + + flags.all = readChar(&curdata); + *sessionPresent = flags.bits.sessionpresent; + *connack_rc = readChar(&curdata); + + rc = 1; +exit: + FUNC_EXIT_RC(rc); + return rc; +} +/** + * Serializes a 0-length packet into the supplied buffer, ready for writing to a socket + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer, to avoid overruns + * @param packettype the message type + * @return serialized length, or error if 0 + */ +int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype){ + MQTTHeader header = {0}; + int rc = -1; + unsigned char *ptr = buf; + + FUNC_ENTRY; + if (buflen < 2) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + header.byte = 0; + header.bits.type = packettype; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */ + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} +/** + * Serializes a disconnect packet into the supplied buffer, ready for writing to a socket + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer, to avoid overruns + * @return serialized length, or error if 0 + */ +int MQTTSerialize_disconnect(unsigned char* buf, int buflen){ + return MQTTSerialize_zero(buf, buflen, DISCONNECT); +} +/** + * Serializes a disconnect packet into the supplied buffer, ready for writing to a socket + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer, to avoid overruns + * @return serialized length, or error if 0 + */ +int MQTTSerialize_pingreq(unsigned char* buf, int buflen){ + return MQTTSerialize_zero(buf, buflen, PINGREQ); +} diff --git a/firmware/stm32-esp/user/mqtt/MQTTConnectServer.c b/firmware/stm32-esp/user/mqtt/MQTTConnectServer.c new file mode 100644 index 00000000..439dfe7b --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTConnectServer.c @@ -0,0 +1,125 @@ +#include "StackTrace.h" +#include "MQTTPacket.h" +#include + +#define min(a, b) ((a < b) ? a : b) + +/** + * Validates MQTT protocol name and version combinations + * @param protocol the MQTT protocol name as an MQTTString + * @param version the MQTT protocol version number, as in the connect packet + * @return correct MQTT combination? 1 is true, 0 is false + */ +int MQTTPacket_checkVersion(MQTTString* protocol, int version){ + int rc = 0; + if (version == 3 && memcmp(protocol->lenstring.data, "MQIsdp", + min(6, protocol->lenstring.len)) == 0) + rc = 1; + else if (version == 4 && memcmp(protocol->lenstring.data, "MQTT", + min(4, protocol->lenstring.len)) == 0) + rc = 1; + return rc; +} +/** + * Deserializes the supplied (wire) buffer into connect data structure + * @param data the connect data structure to be filled out + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param len the length in bytes of the data in the supplied buffer + * @return error code. 1 is success, 0 is failure + */ +int MQTTDeserialize_connect(MQTTPacket_connectData* data, unsigned char* buf, int len){ + MQTTHeader header = {0}; + MQTTConnectFlags flags = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = &buf[len]; + int rc = 0; + MQTTString Protocol; + int version; + int mylen = 0; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + if (header.bits.type != CONNECT) + goto exit; + + curdata += MQTTPacket_decodeBuf(curdata, &mylen); /* read remaining length */ + + if (!readMQTTLenString(&Protocol, &curdata, enddata) || + enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */ + goto exit; + + version = (int)readChar(&curdata); /* Protocol version */ + /* If we don't recognize the protocol version, we don't parse the connect packet on the + * basis that we don't know what the format will be. + */ + if (MQTTPacket_checkVersion(&Protocol, version)) + { + flags.all = readChar(&curdata); + data->cleansession = flags.bits.cleansession; + data->keepAliveInterval = readInt(&curdata); + if (!readMQTTLenString(&data->clientID, &curdata, enddata)) + goto exit; + data->willFlag = flags.bits.will; + if (flags.bits.will) + { + data->will.qos = flags.bits.willQoS; + data->will.retained = flags.bits.willRetain; + if (!readMQTTLenString(&data->will.topicName, &curdata, enddata) || + !readMQTTLenString(&data->will.message, &curdata, enddata)) + goto exit; + } + if (flags.bits.username) + { + if (enddata - curdata < 3 || !readMQTTLenString(&data->username, &curdata, enddata)) + goto exit; /* username flag set, but no username supplied - invalid */ + if (flags.bits.password && + (enddata - curdata < 3 || !readMQTTLenString(&data->password, &curdata, enddata))) + goto exit; /* password flag set, but no password supplied - invalid */ + } + else if (flags.bits.password) + goto exit; /* password flag set without username - invalid */ + rc = 1; + } +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + +/** + * Serializes the connack packet into the supplied buffer. + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param connack_rc the integer connack return code to be used + * @param sessionPresent the MQTT 3.1.1 sessionPresent flag + * @return serialized length, or error if 0 + */ +int MQTTSerialize_connack(unsigned char* buf, int buflen, unsigned char connack_rc, unsigned char sessionPresent){ + MQTTHeader header = {0}; + int rc = 0; + unsigned char *ptr = buf; + MQTTConnackFlags flags = {0}; + + FUNC_ENTRY; + if (buflen < 2) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + header.byte = 0; + header.bits.type = CONNACK; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */ + + flags.all = 0; + flags.bits.sessionpresent = sessionPresent; + writeChar(&ptr, flags.all); + writeChar(&ptr, connack_rc); + + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + diff --git a/firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c b/firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c new file mode 100644 index 00000000..610d8f1c --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c @@ -0,0 +1,105 @@ +/******************************************************************************* + * Copyright (c) 2014 IBM Corp. + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * and Eclipse Distribution License v1.0 which accompany this distribution. + * + * The Eclipse Public License is available at + * http://www.eclipse.org/legal/epl-v10.html + * and the Eclipse Distribution License is available at + * http://www.eclipse.org/org/documents/edl-v10.php. + * + * Contributors: + * Ian Craggs - initial API and implementation and/or initial documentation + *******************************************************************************/ + +#include "StackTrace.h" +#include "MQTTPacket.h" +#include + +#define min(a, b) ((a < b) ? 1 : 0) + +/** + * Deserializes the supplied (wire) buffer into publish data + * @param dup returned integer - the MQTT dup flag + * @param qos returned integer - the MQTT QoS value + * @param retained returned integer - the MQTT retained flag + * @param packetid returned integer - the MQTT packet identifier + * @param topicName returned MQTTString - the MQTT topic in the publish + * @param payload returned byte buffer - the MQTT publish payload + * @param payloadlen returned integer - the length of the MQTT payload + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @return error code. 1 is success + */ +int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName, + unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen){ + MQTTHeader header = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = NULL; + int rc = 0; + int mylen = 0; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + if (header.bits.type != PUBLISH) + goto exit; + *dup = header.bits.dup; + *qos = header.bits.qos; + *retained = header.bits.retain; + + curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ + enddata = curdata + mylen; + + if (!readMQTTLenString(topicName, &curdata, enddata) || + enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */ + goto exit; + + if (*qos > 0) + *packetid = readInt(&curdata); + + *payloadlen = enddata - curdata; + *payload = curdata; + rc = 1; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + + +/** + * Deserializes the supplied (wire) buffer into an ack + * @param packettype returned integer - the MQTT packet type + * @param dup returned integer - the MQTT dup flag + * @param packetid returned integer - the MQTT packet identifier + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @return error code. 1 is success, 0 is failure + */ +int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen){ + MQTTHeader header = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = NULL; + int rc = 0; + int mylen; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + *dup = header.bits.dup; + *packettype = header.bits.type; + + curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ + enddata = curdata + mylen; + + if (enddata - curdata < 2) + goto exit; + *packetid = readInt(&curdata); + + rc = 1; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + diff --git a/firmware/stm32-esp/user/mqtt/MQTTFormat.c b/firmware/stm32-esp/user/mqtt/MQTTFormat.c new file mode 100644 index 00000000..e8484d1e --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTFormat.c @@ -0,0 +1,233 @@ +#include "StackTrace.h" +#include "MQTTPacket.h" + +#include "string.h" + +const char* MQTTPacket_names[] = +{ + "RESERVED", "CONNECT", "CONNACK", "PUBLISH", "PUBACK", "PUBREC", "PUBREL", + "PUBCOMP", "SUBSCRIBE", "SUBACK", "UNSUBSCRIBE", "UNSUBACK", + "PINGREQ", "PINGRESP", "DISCONNECT" +}; + +const char* MQTTPacket_getName(unsigned short packetid) { + return MQTTPacket_names[packetid]; +} + +int MQTTStringFormat_connect(char* strbuf, int strbuflen, MQTTPacket_connectData* data){ + int strindex = 0; + + strindex = snprintf(strbuf, strbuflen, + "CONNECT MQTT version %d, client id %.*s, clean session %d, keep alive %d", + (int)data->MQTTVersion, data->clientID.lenstring.len, data->clientID.lenstring.data, + (int)data->cleansession, data->keepAliveInterval); + if (data->willFlag) + strindex += snprintf(&strbuf[strindex], strbuflen - strindex, + ", will QoS %d, will retain %d, will topic %.*s, will message %.*s", + data->will.qos, data->will.retained, + data->will.topicName.lenstring.len, data->will.topicName.lenstring.data, + data->will.message.lenstring.len, data->will.message.lenstring.data); + if (data->username.lenstring.data && data->username.lenstring.len > 0) + strindex += snprintf(&strbuf[strindex], strbuflen - strindex, + ", user name %.*s", data->username.lenstring.len, data->username.lenstring.data); + if (data->password.lenstring.data && data->password.lenstring.len > 0) + strindex += snprintf(&strbuf[strindex], strbuflen - strindex, + ", password %.*s", data->password.lenstring.len, data->password.lenstring.data); + return strindex; +} + + +int MQTTStringFormat_connack(char* strbuf, int strbuflen, unsigned char connack_rc, unsigned char sessionPresent){ + int strindex = snprintf(strbuf, strbuflen, "CONNACK session present %d, rc %d", sessionPresent, connack_rc); + return strindex; +} + + +int MQTTStringFormat_publish(char* strbuf, int strbuflen, unsigned char dup, int qos, unsigned char retained, + unsigned short packetid, MQTTString topicName, unsigned char* payload, int payloadlen){ + int strindex = snprintf(strbuf, strbuflen, + "PUBLISH dup %d, QoS %d, retained %d, packet id %d, topic %.*s, payload length %d, payload %.*s", + dup, qos, retained, packetid, + (topicName.lenstring.len < 20) ? topicName.lenstring.len : 20, topicName.lenstring.data, + payloadlen, (payloadlen < 20) ? payloadlen : 20, payload); + return strindex; +} + + +int MQTTStringFormat_ack(char* strbuf, int strbuflen, unsigned char packettype, unsigned char dup, unsigned short packetid){ + int strindex = snprintf(strbuf, strbuflen, "%s, packet id %d", MQTTPacket_names[packettype], packetid); + if (dup) + strindex += snprintf(strbuf + strindex, strbuflen - strindex, ", dup %d", dup); + return strindex; +} + + +int MQTTStringFormat_subscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, int count, + MQTTString topicFilters[], int requestedQoSs[]){ + return snprintf(strbuf, strbuflen, + "SUBSCRIBE dup %d, packet id %d count %d topic %.*s qos %d", + dup, packetid, count, + topicFilters[0].lenstring.len, topicFilters[0].lenstring.data, + requestedQoSs[0]); +} + + +int MQTTStringFormat_suback(char* strbuf, int strbuflen, unsigned short packetid, int count, int* grantedQoSs){ + return snprintf(strbuf, strbuflen, + "SUBACK packet id %d count %d granted qos %d", packetid, count, grantedQoSs[0]); +} + + +int MQTTStringFormat_unsubscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, + int count, MQTTString topicFilters[]){ + return snprintf(strbuf, strbuflen, + "UNSUBSCRIBE dup %d, packet id %d count %d topic %.*s", + dup, packetid, count, + topicFilters[0].lenstring.len, topicFilters[0].lenstring.data); +} + + +#if defined(MQTT_CLIENT) +char* MQTTFormat_toClientString(char* strbuf, int strbuflen, unsigned char* buf, int buflen){ + int index = 0; + int rem_length = 0; + MQTTHeader header = {0}; + int strindex = 0; + + header.byte = buf[index++]; + index += MQTTPacket_decodeBuf(&buf[index], &rem_length); + + switch (header.bits.type) + { + + case CONNACK: + { + unsigned char sessionPresent, connack_rc; + if (MQTTDeserialize_connack(&sessionPresent, &connack_rc, buf, buflen) == 1) + strindex = MQTTStringFormat_connack(strbuf, strbuflen, connack_rc, sessionPresent); + } + break; + case PUBLISH: + { + unsigned char dup, retained, *payload; + unsigned short packetid; + int qos, payloadlen; + MQTTString topicName = MQTTString_initializer; + if (MQTTDeserialize_publish(&dup, &qos, &retained, &packetid, &topicName, + &payload, &payloadlen, buf, buflen) == 1) + strindex = MQTTStringFormat_publish(strbuf, strbuflen, dup, qos, retained, packetid, + topicName, payload, payloadlen); + } + break; + case PUBACK: + case PUBREC: + case PUBREL: + case PUBCOMP: + { + unsigned char packettype, dup; + unsigned short packetid; + if (MQTTDeserialize_ack(&packettype, &dup, &packetid, buf, buflen) == 1) + strindex = MQTTStringFormat_ack(strbuf, strbuflen, packettype, dup, packetid); + } + break; + case SUBACK: + { + unsigned short packetid; + int maxcount = 1, count = 0; + int grantedQoSs[1]; + if (MQTTDeserialize_suback(&packetid, maxcount, &count, grantedQoSs, buf, buflen) == 1) + strindex = MQTTStringFormat_suback(strbuf, strbuflen, packetid, count, grantedQoSs); + } + break; + case UNSUBACK: + { + unsigned short packetid; + if (MQTTDeserialize_unsuback(&packetid, buf, buflen) == 1) + strindex = MQTTStringFormat_ack(strbuf, strbuflen, UNSUBACK, 0, packetid); + } + break; + case PINGREQ: + case PINGRESP: + case DISCONNECT: + strindex = snprintf(strbuf, strbuflen, "%s", MQTTPacket_names[header.bits.type]); + break; + } + return strbuf; +} +#endif + +#if defined(MQTT_SERVER) +char* MQTTFormat_toServerString(char* strbuf, int strbuflen, unsigned char* buf, int buflen){ + int index = 0; + int rem_length = 0; + MQTTHeader header = {0}; + int strindex = 0; + + header.byte = buf[index++]; + index += MQTTPacket_decodeBuf(&buf[index], &rem_length); + + switch (header.bits.type) + { + case CONNECT: + { + MQTTPacket_connectData data; + int rc; + if ((rc = MQTTDeserialize_connect(&data, buf, buflen)) == 1) + strindex = MQTTStringFormat_connect(strbuf, strbuflen, &data); + } + break; + case PUBLISH: + { + unsigned char dup, retained, *payload; + unsigned short packetid; + int qos, payloadlen; + MQTTString topicName = MQTTString_initializer; + if (MQTTDeserialize_publish(&dup, &qos, &retained, &packetid, &topicName, + &payload, &payloadlen, buf, buflen) == 1) + strindex = MQTTStringFormat_publish(strbuf, strbuflen, dup, qos, retained, packetid, + topicName, payload, payloadlen); + } + break; + case PUBACK: + case PUBREC: + case PUBREL: + case PUBCOMP: + { + unsigned char packettype, dup; + unsigned short packetid; + if (MQTTDeserialize_ack(&packettype, &dup, &packetid, buf, buflen) == 1) + strindex = MQTTStringFormat_ack(strbuf, strbuflen, packettype, dup, packetid); + } + break; + case SUBSCRIBE: + { + unsigned char dup; + unsigned short packetid; + int maxcount = 1, count = 0; + MQTTString topicFilters[1]; + int requestedQoSs[1]; + if (MQTTDeserialize_subscribe(&dup, &packetid, maxcount, &count, + topicFilters, requestedQoSs, buf, buflen) == 1) + strindex = MQTTStringFormat_subscribe(strbuf, strbuflen, dup, packetid, count, topicFilters, requestedQoSs);; + } + break; + case UNSUBSCRIBE: + { + unsigned char dup; + unsigned short packetid; + int maxcount = 1, count = 0; + MQTTString topicFilters[1]; + if (MQTTDeserialize_unsubscribe(&dup, &packetid, maxcount, &count, topicFilters, buf, buflen) == 1) + strindex = MQTTStringFormat_unsubscribe(strbuf, strbuflen, dup, packetid, count, topicFilters); + } + break; + case PINGREQ: + case PINGRESP: + case DISCONNECT: + strindex = snprintf(strbuf, strbuflen, "%s", MQTTPacket_names[header.bits.type]); + break; + } + strbuf[strbuflen] = '\0'; + return strbuf; +} +#endif diff --git a/firmware/stm32-esp/user/mqtt/MQTTFormat.h b/firmware/stm32-esp/user/mqtt/MQTTFormat.h new file mode 100644 index 00000000..ecfefee2 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTFormat.h @@ -0,0 +1,37 @@ +/******************************************************************************* + * Copyright (c) 2014 IBM Corp. + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * and Eclipse Distribution License v1.0 which accompany this distribution. + * + * The Eclipse Public License is available at + * http://www.eclipse.org/legal/epl-v10.html + * and the Eclipse Distribution License is available at + * http://www.eclipse.org/org/documents/edl-v10.php. + * + * Contributors: + * Ian Craggs - initial API and implementation and/or initial documentation + *******************************************************************************/ + +#if !defined(_MQTTFORMAT_H_) +#define _MQTTFORMAT_H_ + +#include "StackTrace.h" +#include "MQTTPacket.h" + +const char* MQTTPacket_getName(unsigned short packetid); +int MQTTStringFormat_connect(char* strbuf, int strbuflen, MQTTPacket_connectData* data); +int MQTTStringFormat_connack(char* strbuf, int strbuflen, unsigned char connack_rc, unsigned char sessionPresent); +int MQTTStringFormat_publish(char* strbuf, int strbuflen, unsigned char dup, int qos, unsigned char retained, + unsigned short packetid, MQTTString topicName, unsigned char* payload, int payloadlen); +int MQTTStringFormat_ack(char* strbuf, int strbuflen, unsigned char packettype, unsigned char dup, unsigned short packetid); +int MQTTStringFormat_subscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, int count, + MQTTString topicFilters[], int requestedQoSs[]); +int MQTTStringFormat_suback(char* strbuf, int strbuflen, unsigned short packetid, int count, int* grantedQoSs); +int MQTTStringFormat_unsubscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, + int count, MQTTString topicFilters[]); +char* MQTTFormat_toClientString(char* strbuf, int strbuflen, unsigned char* buf, int buflen); +char* MQTTFormat_toServerString(char* strbuf, int strbuflen, unsigned char* buf, int buflen); + +#endif diff --git a/firmware/stm32-esp/user/mqtt/MQTTPacket.c b/firmware/stm32-esp/user/mqtt/MQTTPacket.c new file mode 100644 index 00000000..ae3f41a3 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTPacket.c @@ -0,0 +1,365 @@ +#include "StackTrace.h" +#include "MQTTPacket.h" + +#include + +/** + * Encodes the message length according to the MQTT algorithm + * @param buf the buffer into which the encoded data is written + * @param length the length to be encoded + * @return the number of bytes written to buffer + */ +int MQTTPacket_encode(unsigned char* buf, int length){ + int rc = 0; + + FUNC_ENTRY; + do + { + char d = length % 128; + length /= 128; + /* if there are more digits to encode, set the top bit of this digit */ + if (length > 0) + d |= 0x80; + buf[rc++] = d; + } while (length > 0); + FUNC_EXIT_RC(rc); + return rc; +} + +/** + * Decodes the message length according to the MQTT algorithm + * @param getcharfn pointer to function to read the next character from the data source + * @param value the decoded length returned + * @return the number of bytes read from the socket + */ +int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value){ + unsigned char c; + int multiplier = 1; + int len = 0; +#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4 + + FUNC_ENTRY; + *value = 0; + do + { + int rc = MQTTPACKET_READ_ERROR; + + if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES) + { + rc = MQTTPACKET_READ_ERROR; /* bad data */ + goto exit; + } + rc = (*getcharfn)(&c, 1); + if (rc != 1) + goto exit; + *value += (c & 127) * multiplier; + multiplier *= 128; + } while ((c & 128) != 0); +exit: + FUNC_EXIT_RC(len); + return len; +} + +int MQTTPacket_len(int rem_len){ + rem_len += 1; /* header byte */ + + /* now remaining_length field */ + if (rem_len < 128) + rem_len += 1; + else if (rem_len < 16384) + rem_len += 2; + else if (rem_len < 2097151) + rem_len += 3; + else + rem_len += 4; + return rem_len; +} + +static unsigned char* bufptr; +int bufchar(unsigned char* c, int count){ + int i; + + for (i = 0; i < count; ++i) + *c = *bufptr++; + return count; +} + +int MQTTPacket_decodeBuf(unsigned char* buf, int* value){ + bufptr = buf; + return MQTTPacket_decode(bufchar, value); +} + +/** + * Calculates an integer from two bytes read from the input buffer + * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned + * @return the integer value calculated + */ +int readInt(unsigned char** pptr){ + unsigned char* ptr = *pptr; + int len = 256*(*ptr) + (*(ptr+1)); + *pptr += 2; + return len; +} + +/** + * Reads one character from the input buffer. + * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned + * @return the character read + */ +char readChar(unsigned char** pptr){ + char c = **pptr; + (*pptr)++; + return c; +} + +/** + * Writes one character to an output buffer. + * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned + * @param c the character to write + */ +void writeChar(unsigned char** pptr, char c){ + **pptr = c; + (*pptr)++; +} + +/** + * Writes an integer as 2 bytes to an output buffer. + * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned + * @param anInt the integer to write + */ +void writeInt(unsigned char** pptr, int anInt){ + **pptr = (unsigned char)(anInt / 256); + (*pptr)++; + **pptr = (unsigned char)(anInt % 256); + (*pptr)++; +} + +/** + * Writes a "UTF" string to an output buffer. Converts C string to length-delimited. + * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned + * @param string the C string to write + */ +void writeCString(unsigned char** pptr, const char* string){ + int len = strlen(string); + writeInt(pptr, len); + memcpy(*pptr, string, len); + *pptr += len; +} + +int getLenStringLen(char* ptr){ + int len = 256*((unsigned char)(*ptr)) + (unsigned char)(*(ptr+1)); + return len; +} + +void writeMQTTString(unsigned char** pptr, MQTTString mqttstring){ + if (mqttstring.lenstring.len > 0) + { + writeInt(pptr, mqttstring.lenstring.len); + memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len); + *pptr += mqttstring.lenstring.len; + } + else if (mqttstring.cstring) + writeCString(pptr, mqttstring.cstring); + else + writeInt(pptr, 0); +} +/** + * @param mqttstring the MQTTString structure into which the data is to be read + * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned + * @param enddata pointer to the end of the data: do not read beyond + * @return 1 if successful, 0 if not + */ +int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata){ + int rc = 0; + + FUNC_ENTRY; + /* the first two bytes are the length of the string */ + if (enddata - (*pptr) > 1) /* enough length to read the integer? */ + { + mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */ + if (&(*pptr)[mqttstring->lenstring.len] <= enddata) + { + mqttstring->lenstring.data = (char*)*pptr; + *pptr += mqttstring->lenstring.len; + rc = 1; + } + } + mqttstring->cstring = NULL; + FUNC_EXIT_RC(rc); + return rc; +} + + +/** + * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string + * @param mqttstring the string to return the length of + * @return the length of the string + */ +int MQTTstrlen(MQTTString mqttstring){ + int rc = 0; + + if (mqttstring.cstring) + rc = strlen(mqttstring.cstring); + else + rc = mqttstring.lenstring.len; + return rc; +} + + +/** + * Compares an MQTTString to a C string + * @param a the MQTTString to compare + * @param bptr the C string to compare + * @return boolean - equal or not + */ +int MQTTPacket_equals(MQTTString* a, char* bptr){ + int alen = 0, + blen = 0; + char *aptr; + + if (a->cstring) + { + aptr = a->cstring; + alen = strlen(a->cstring); + } + else + { + aptr = a->lenstring.data; + alen = a->lenstring.len; + } + blen = strlen(bptr); + + return (alen == blen) && (strncmp(aptr, bptr, alen) == 0); +} + + +/** + * Helper function to read packet data from some source into a buffer + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param getfn pointer to a function which will read any number of bytes from the needed source + * @return integer MQTT packet type, or -1 on error + * @note the whole message must fit into the caller's buffer + */ +int MQTTPacket_read(unsigned char* buf, int buflen, int (*getfn)(unsigned char*, int)){ + int rc = -1; + MQTTHeader header = {0}; + int len = 0; + int rem_len = 0; + + /* 1. 读取头字节。这里面有包类型 */ + if ((*getfn)(buf, 1) != 1) + goto exit; + + len = 1; + // 解码 + /* 2. 读剩下的长度。它本身是可变的 */ + MQTTPacket_decode(getfn, &rem_len); + /* 将原始的剩余长度放回缓冲区 */ + len += MQTTPacket_encode(buf + 1, rem_len); + + /* 3. read the rest of the buffer using a callback to supply the rest of the data */ + if((rem_len + len) > buflen) + goto exit; + if (rem_len && ((*getfn)(buf + len, rem_len) != rem_len)) + goto exit; + + header.byte = buf[0]; + rc = header.bits.type; +exit: + return rc; +} + +/** + * Decodes the message length according to the MQTT algorithm, non-blocking + * @param trp pointer to a transport structure holding what is needed to solve getting data from it + * @param value the decoded length returned + * @return integer the number of bytes read from the socket, 0 for call again, or -1 on error + */ +static int MQTTPacket_decodenb(MQTTTransport *trp){ + unsigned char c; + int rc = MQTTPACKET_READ_ERROR; + + FUNC_ENTRY; + if(trp->len == 0){ /* initialize on first call */ + trp->multiplier = 1; + trp->rem_len = 0; + } + do { + int frc; + if (trp->len >= MAX_NO_OF_REMAINING_LENGTH_BYTES) + goto exit; + if ((frc=(*trp->getfn)(trp->sck, &c, 1)) == -1) + goto exit; + if (frc == 0){ + rc = 0; + goto exit; + } + ++(trp->len); + trp->rem_len += (c & 127) * trp->multiplier; + trp->multiplier *= 128; + } while ((c & 128) != 0); + rc = trp->len; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + +/** + * Helper function to read packet data from some source into a buffer, non-blocking + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param trp pointer to a transport structure holding what is needed to solve getting data from it + * @return integer MQTT packet type, 0 for call again, or -1 on error + * @note the whole message must fit into the caller's buffer + */ +int MQTTPacket_readnb(unsigned char* buf, int buflen, MQTTTransport *trp){ + int rc = -1, frc; + MQTTHeader header = {0}; + + switch(trp->state){ + default: + trp->state = 0; + /*FALLTHROUGH*/ + case 0: + /* read the header byte. This has the packet type in it */ + if ((frc=(*trp->getfn)(trp->sck, buf, 1)) == -1) + goto exit; + if (frc == 0) + return 0; + trp->len = 0; + ++trp->state; + /*FALLTHROUGH*/ + /* read the remaining length. This is variable in itself */ + case 1: + if((frc=MQTTPacket_decodenb(trp)) == MQTTPACKET_READ_ERROR) + goto exit; + if(frc == 0) + return 0; + trp->len = 1 + MQTTPacket_encode(buf + 1, trp->rem_len); /* put the original remaining length back into the buffer */ + if((trp->rem_len + trp->len) > buflen) + goto exit; + ++trp->state; + /*FALLTHROUGH*/ + case 2: + if(trp->rem_len){ + /* read the rest of the buffer using a callback to supply the rest of the data */ + if ((frc=(*trp->getfn)(trp->sck, buf + trp->len, trp->rem_len)) == -1) + goto exit; + if (frc == 0) + return 0; + trp->rem_len -= frc; + trp->len += frc; + if(trp->rem_len) + return 0; + } + header.byte = buf[0]; + rc = header.bits.type; + break; + } + +exit: + trp->state = 0; + return rc; +} + diff --git a/firmware/stm32-esp/user/mqtt/MQTTPacket.h b/firmware/stm32-esp/user/mqtt/MQTTPacket.h new file mode 100644 index 00000000..f333bb3b --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTPacket.h @@ -0,0 +1,116 @@ +#ifndef _MQTTPACKET_H_ +#define _MQTTPACKET_H_ + +#if defined(__cplusplus) /* If this is a C++ compiler, use C linkage */ +extern "C" { +#endif + +#if defined(WIN32_DLL) || defined(WIN64_DLL) + #define DLLImport __declspec(dllimport) + #define DLLExport __declspec(dllexport) +#elif defined(LINUX_SO) + #define DLLImport extern + #define DLLExport __attribute__ ((visibility ("default"))) +#else + #define DLLImport + #define DLLExport +#endif + +enum errors +{ + MQTTPACKET_BUFFER_TOO_SHORT = -2, + MQTTPACKET_READ_ERROR = -1, + MQTTPACKET_READ_COMPLETE +}; + +enum msgTypes +{ + CONNECT = 1, CONNACK, PUBLISH, PUBACK, PUBREC, PUBREL, + PUBCOMP, SUBSCRIBE, SUBACK, UNSUBSCRIBE, UNSUBACK, + PINGREQ, PINGRESP, DISCONNECT +}; + +/** + * Bitfields for the MQTT header byte. + */ +typedef union +{ + unsigned char byte; /**< the whole byte */ +#if defined(REVERSED) + struct + { + unsigned int type : 4; /**< message type nibble */ + unsigned int dup : 1; /**< DUP flag bit */ + unsigned int qos : 2; /**< QoS value, 0, 1 or 2 */ + unsigned int retain : 1; /**< retained flag bit */ + } bits; +#else + struct + { + unsigned int retain : 1; /**< retained flag bit */ + unsigned int qos : 2; /**< QoS value, 0, 1 or 2 */ + unsigned int dup : 1; /**< DUP flag bit */ + unsigned int type : 4; /**< message type nibble */ + } bits; +#endif +} MQTTHeader; + +typedef struct +{ + int len; + char* data; +} MQTTLenString; + +typedef struct +{ + char* cstring; + MQTTLenString lenstring; +} MQTTString; + +#define MQTTString_initializer {NULL, {0, NULL}} + +int MQTTstrlen(MQTTString mqttstring); + +#include "MQTTConnect.h" +#include "MQTTPublish.h" +#include "MQTTSubscribe.h" +#include "MQTTUnsubscribe.h" +#include "MQTTFormat.h" + +DLLExport int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char type, unsigned char dup, unsigned short packetid); +DLLExport int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen); + +int MQTTPacket_len(int rem_len); +DLLExport int MQTTPacket_equals(MQTTString* a, char* b); + +DLLExport int MQTTPacket_encode(unsigned char* buf, int length); +int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value); +int MQTTPacket_decodeBuf(unsigned char* buf, int* value); + +int readInt(unsigned char** pptr); +char readChar(unsigned char** pptr); +void writeChar(unsigned char** pptr, char c); +void writeInt(unsigned char** pptr, int anInt); +int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata); +void writeCString(unsigned char** pptr, const char* string); +void writeMQTTString(unsigned char** pptr, MQTTString mqttstring); + +DLLExport int MQTTPacket_read(unsigned char* buf, int buflen, int (*getfn)(unsigned char*, int)); + +typedef struct { + int (*getfn)(void *, unsigned char*, int); /* must return -1 for error, 0 for call again, or the number of bytes read */ + void *sck; /* pointer to whatever the system may use to identify the transport */ + int multiplier; + int rem_len; + int len; + char state; +}MQTTTransport; + +int MQTTPacket_readnb(unsigned char* buf, int buflen, MQTTTransport *trp); + +#ifdef __cplusplus /* If this is a C++ compiler, use C linkage */ +} +#endif + + +#endif /* MQTTPACKET_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTPublish.h b/firmware/stm32-esp/user/mqtt/MQTTPublish.h new file mode 100644 index 00000000..ebe479dd --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTPublish.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * Copyright (c) 2014 IBM Corp. + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * and Eclipse Distribution License v1.0 which accompany this distribution. + * + * The Eclipse Public License is available at + * http://www.eclipse.org/legal/epl-v10.html + * and the Eclipse Distribution License is available at + * http://www.eclipse.org/org/documents/edl-v10.php. + * + * Contributors: + * Ian Craggs - initial API and implementation and/or initial documentation + * Xiang Rong - 442039 Add makefile to Embedded C client + *******************************************************************************/ + +#ifndef MQTTPUBLISH_H_ +#define MQTTPUBLISH_H_ + +#if !defined(DLLImport) + #define DLLImport +#endif +#if !defined(DLLExport) + #define DLLExport +#endif + +DLLExport int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid, + MQTTString topicName, unsigned char* payload, int payloadlen); + +DLLExport int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName, + unsigned char** payload, int* payloadlen, unsigned char* buf, int len); + +DLLExport int MQTTSerialize_puback(unsigned char* buf, int buflen, unsigned short packetid); +DLLExport int MQTTSerialize_pubrel(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid); +DLLExport int MQTTSerialize_pubcomp(unsigned char* buf, int buflen, unsigned short packetid); + +#endif /* MQTTPUBLISH_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c b/firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c new file mode 100644 index 00000000..5bdda7e9 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c @@ -0,0 +1,145 @@ +#include "MQTTPacket.h" +#include "StackTrace.h" + +#include + +/** + * Determines the length of the MQTT publish packet that would be produced using the supplied parameters + * @param qos the MQTT QoS of the publish (packetid is omitted for QoS 0) + * @param topicName the topic name to be used in the publish + * @param payloadlen the length of the payload to be sent + * @return the length of buffer needed to contain the serialized version of the packet + */ +int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen){ + int len = 0; + + len += 2 + MQTTstrlen(topicName) + payloadlen; + if (qos > 0) + len += 2; /* packetid */ + return len; +} + + +/** + * Serializes the supplied publish data into the supplied buffer, ready for sending + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param dup integer - the MQTT dup flag + * @param qos integer - the MQTT QoS value + * @param retained integer - the MQTT retained flag + * @param packetid integer - the MQTT packet identifier + * @param topicName MQTTString - the MQTT topic in the publish + * @param payload byte buffer - the MQTT publish payload + * @param payloadlen integer - the length of the MQTT payload + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid, + MQTTString topicName, unsigned char* payload, int payloadlen){ + unsigned char *ptr = buf; + MQTTHeader header = {0}; + int rem_len = 0; + int rc = 0; + + FUNC_ENTRY; + if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + + header.bits.type = PUBLISH; + header.bits.dup = dup; + header.bits.qos = qos; + header.bits.retain = retained; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */; + + writeMQTTString(&ptr, topicName); + + if (qos > 0) + writeInt(&ptr, packetid); + + memcpy(ptr, payload, payloadlen); + ptr += payloadlen; + + rc = ptr - buf; + +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + + +/** + * Serializes the ack packet into the supplied buffer. + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param type the MQTT packet type + * @param dup the MQTT dup flag + * @param packetid the MQTT packet identifier + * @return serialized length, or error if 0 + */ +int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid){ + MQTTHeader header = {0}; + int rc = 0; + unsigned char *ptr = buf; + + FUNC_ENTRY; + if (buflen < 4) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + header.bits.type = packettype; + header.bits.dup = dup; + header.bits.qos = (packettype == PUBREL) ? 1 : 0; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */ + writeInt(&ptr, packetid); + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + +/** + * Serializes a puback packet into the supplied buffer. + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param packetid integer - the MQTT packet identifier + * @return serialized length, or error if 0 + */ +int MQTTSerialize_puback(unsigned char* buf, int buflen, unsigned short packetid){ + return MQTTSerialize_ack(buf, buflen, PUBACK, 0, packetid); +} + + +/** + * Serializes a pubrel packet into the supplied buffer. + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param dup integer - the MQTT dup flag + * @param packetid integer - the MQTT packet identifier + * @return serialized length, or error if 0 + */ +int MQTTSerialize_pubrel(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid){ + return MQTTSerialize_ack(buf, buflen, PUBREL, dup, packetid); +} + + +/** + * Serializes a pubrel packet into the supplied buffer. + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param packetid integer - the MQTT packet identifier + * @return serialized length, or error if 0 + */ +int MQTTSerialize_pubcomp(unsigned char* buf, int buflen, unsigned short packetid){ + return MQTTSerialize_ack(buf, buflen, PUBCOMP, 0, packetid); +} + + diff --git a/firmware/stm32-esp/user/mqtt/MQTTSubscribe.h b/firmware/stm32-esp/user/mqtt/MQTTSubscribe.h new file mode 100644 index 00000000..aa918268 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTSubscribe.h @@ -0,0 +1,39 @@ +/******************************************************************************* + * Copyright (c) 2014 IBM Corp. + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * and Eclipse Distribution License v1.0 which accompany this distribution. + * + * The Eclipse Public License is available at + * http://www.eclipse.org/legal/epl-v10.html + * and the Eclipse Distribution License is available at + * http://www.eclipse.org/org/documents/edl-v10.php. + * + * Contributors: + * Ian Craggs - initial API and implementation and/or initial documentation + * Xiang Rong - 442039 Add makefile to Embedded C client + *******************************************************************************/ + +#ifndef MQTTSUBSCRIBE_H_ +#define MQTTSUBSCRIBE_H_ + +#if !defined(DLLImport) + #define DLLImport +#endif +#if !defined(DLLExport) + #define DLLExport +#endif + +DLLExport int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, + int count, MQTTString topicFilters[], int requestedQoSs[]); + +DLLExport int MQTTDeserialize_subscribe(unsigned char* dup, unsigned short* packetid, + int maxcount, int* count, MQTTString topicFilters[], int requestedQoSs[], unsigned char* buf, int len); + +DLLExport int MQTTSerialize_suback(unsigned char* buf, int buflen, unsigned short packetid, int count, int* grantedQoSs); + +DLLExport int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int len); + + +#endif /* MQTTSUBSCRIBE_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c b/firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c new file mode 100644 index 00000000..3d56ffc7 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c @@ -0,0 +1,118 @@ +#include "MQTTPacket.h" +#include "StackTrace.h" + +#include + +/** + * Determines the length of the MQTT subscribe packet that would be produced using the supplied parameters + * @param count the number of topic filter strings in topicFilters + * @param topicFilters the array of topic filter strings to be used in the publish + * @return the length of buffer needed to contain the serialized version of the packet + */ +int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[]){ + int i; + int len = 2; /* packetid */ + + for (i = 0; i < count; ++i) + len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */ + return len; +} + + +/** + * Serializes the supplied subscribe data into the supplied buffer, ready for sending + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied bufferr + * @param dup integer - the MQTT dup flag + * @param packetid integer - the MQTT packet identifier + * @param count - number of members in the topicFilters and reqQos arrays + * @param topicFilters - array of topic filter names + * @param requestedQoSs - array of requested QoS + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count, + MQTTString topicFilters[], int requestedQoSs[]){ + unsigned char *ptr = buf; + MQTTHeader header = {0}; + int rem_len = 0; + int rc = 0; + int i = 0; + + FUNC_ENTRY; + if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + + header.byte = 0; + header.bits.type = SUBSCRIBE; + header.bits.dup = dup; + header.bits.qos = 1; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */; + + writeInt(&ptr, packetid); + + for (i = 0; i < count; ++i) + { + writeMQTTString(&ptr, topicFilters[i]); + writeChar(&ptr, requestedQoSs[i]); + } + + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + + +/** + * Deserializes the supplied (wire) buffer into suback data + * @param packetid returned integer - the MQTT packet identifier + * @param maxcount - the maximum number of members allowed in the grantedQoSs array + * @param count returned integer - number of members in the grantedQoSs array + * @param grantedQoSs returned array of integers - the granted qualities of service + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @return error code. 1 is success, 0 is failure + */ +int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen){ + MQTTHeader header = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = NULL; + int rc = 0; + int mylen; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + if (header.bits.type != SUBACK) + goto exit; + + curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ + enddata = curdata + mylen; + if (enddata - curdata < 2) + goto exit; + + *packetid = readInt(&curdata); + + *count = 0; + while (curdata < enddata) + { + if (*count > maxcount) + { + rc = -1; + goto exit; + } + grantedQoSs[(*count)++] = readChar(&curdata); + } + + rc = 1; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + diff --git a/firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c b/firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c new file mode 100644 index 00000000..ed61ace5 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c @@ -0,0 +1,92 @@ +#include "MQTTPacket.h" +#include "StackTrace.h" + +#include +/** + * Deserializes the supplied (wire) buffer into subscribe data + * @param dup integer returned - the MQTT dup flag + * @param packetid integer returned - the MQTT packet identifier + * @param maxcount - the maximum number of members allowed in the topicFilters and requestedQoSs arrays + * @param count - number of members in the topicFilters and requestedQoSs arrays + * @param topicFilters - array of topic filter names + * @param requestedQoSs - array of requested QoS + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTDeserialize_subscribe(unsigned char* dup, unsigned short* packetid, int maxcount, int* count, MQTTString topicFilters[], + int requestedQoSs[], unsigned char* buf, int buflen){ + MQTTHeader header = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = NULL; + int rc = -1; + int mylen = 0; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + if (header.bits.type != SUBSCRIBE) + goto exit; + *dup = header.bits.dup; + + curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ + enddata = curdata + mylen; + + *packetid = readInt(&curdata); + + *count = 0; + while (curdata < enddata) + { + if (!readMQTTLenString(&topicFilters[*count], &curdata, enddata)) + goto exit; + if (curdata >= enddata) /* do we have enough data to read the req_qos version byte? */ + goto exit; + requestedQoSs[*count] = readChar(&curdata); + (*count)++; + } + + rc = 1; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + +/** + * Serializes the supplied suback data into the supplied buffer, ready for sending + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param packetid integer - the MQTT packet identifier + * @param count - number of members in the grantedQoSs array + * @param grantedQoSs - array of granted QoS + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTSerialize_suback(unsigned char* buf, int buflen, unsigned short packetid, int count, int* grantedQoSs){ + MQTTHeader header = {0}; + int rc = -1; + unsigned char *ptr = buf; + int i; + + FUNC_ENTRY; + if (buflen < 2 + count) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + header.byte = 0; + header.bits.type = SUBACK; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, 2 + count); /* write remaining length */ + + writeInt(&ptr, packetid); + + for (i = 0; i < count; ++i) + writeChar(&ptr, grantedQoSs[i]); + + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + diff --git a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h new file mode 100644 index 00000000..355ca9a4 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h @@ -0,0 +1,38 @@ +/******************************************************************************* + * Copyright (c) 2014 IBM Corp. + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * and Eclipse Distribution License v1.0 which accompany this distribution. + * + * The Eclipse Public License is available at + * http://www.eclipse.org/legal/epl-v10.html + * and the Eclipse Distribution License is available at + * http://www.eclipse.org/org/documents/edl-v10.php. + * + * Contributors: + * Ian Craggs - initial API and implementation and/or initial documentation + * Xiang Rong - 442039 Add makefile to Embedded C client + *******************************************************************************/ + +#ifndef MQTTUNSUBSCRIBE_H_ +#define MQTTUNSUBSCRIBE_H_ + +#if !defined(DLLImport) + #define DLLImport +#endif +#if !defined(DLLExport) + #define DLLExport +#endif + +DLLExport int MQTTSerialize_unsubscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, + int count, MQTTString topicFilters[]); + +DLLExport int MQTTDeserialize_unsubscribe(unsigned char* dup, unsigned short* packetid, int max_count, int* count, MQTTString topicFilters[], + unsigned char* buf, int len); + +DLLExport int MQTTSerialize_unsuback(unsigned char* buf, int buflen, unsigned short packetid); + +DLLExport int MQTTDeserialize_unsuback(unsigned short* packetid, unsigned char* buf, int len); + +#endif /* MQTTUNSUBSCRIBE_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c new file mode 100644 index 00000000..30e20e8f --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c @@ -0,0 +1,87 @@ +#include "MQTTPacket.h" +#include "StackTrace.h" + +#include + +/** + * Determines the length of the MQTT unsubscribe packet that would be produced using the supplied parameters + * @param count the number of topic filter strings in topicFilters + * @param topicFilters the array of topic filter strings to be used in the publish + * @return the length of buffer needed to contain the serialized version of the packet + */ +int MQTTSerialize_unsubscribeLength(int count, MQTTString topicFilters[]){ + int i; + int len = 2; /* packetid */ + + for (i = 0; i < count; ++i) + len += 2 + MQTTstrlen(topicFilters[i]); /* length + topic*/ + return len; +} + + +/** + * Serializes the supplied unsubscribe data into the supplied buffer, ready for sending + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @param dup integer - the MQTT dup flag + * @param packetid integer - the MQTT packet identifier + * @param count - number of members in the topicFilters array + * @param topicFilters - array of topic filter names + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTSerialize_unsubscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, + int count, MQTTString topicFilters[]){ + unsigned char *ptr = buf; + MQTTHeader header = {0}; + int rem_len = 0; + int rc = -1; + int i = 0; + + FUNC_ENTRY; + if (MQTTPacket_len(rem_len = MQTTSerialize_unsubscribeLength(count, topicFilters)) > buflen) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + + header.byte = 0; + header.bits.type = UNSUBSCRIBE; + header.bits.dup = dup; + header.bits.qos = 1; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */; + + writeInt(&ptr, packetid); + + for (i = 0; i < count; ++i) + writeMQTTString(&ptr, topicFilters[i]); + + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + +/** + * Deserializes the supplied (wire) buffer into unsuback data + * @param packetid returned integer - the MQTT packet identifier + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @return error code. 1 is success, 0 is failure + */ +int MQTTDeserialize_unsuback(unsigned short* packetid, unsigned char* buf, int buflen){ + unsigned char type = 0; + unsigned char dup = 0; + int rc = 0; + + FUNC_ENTRY; + rc = MQTTDeserialize_ack(&type, &dup, packetid, buf, buflen); + if (type == UNSUBACK) + rc = 1; + FUNC_EXIT_RC(rc); + return rc; +} + + diff --git a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c new file mode 100644 index 00000000..565c7e87 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c @@ -0,0 +1,83 @@ +#include "MQTTPacket.h" +#include "StackTrace.h" + +#include + +/** + * Deserializes the supplied (wire) buffer into unsubscribe data + * @param dup integer returned - the MQTT dup flag + * @param packetid integer returned - the MQTT packet identifier + * @param maxcount - the maximum number of members allowed in the topicFilters and requestedQoSs arrays + * @param count - number of members in the topicFilters and requestedQoSs arrays + * @param topicFilters - array of topic filter names + * @param buf the raw buffer data, of the correct length determined by the remaining length field + * @param buflen the length in bytes of the data in the supplied buffer + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTDeserialize_unsubscribe(unsigned char* dup, unsigned short* packetid, int maxcount, int* count, MQTTString topicFilters[], + unsigned char* buf, int len){ + MQTTHeader header = {0}; + unsigned char* curdata = buf; + unsigned char* enddata = NULL; + int rc = 0; + int mylen = 0; + + FUNC_ENTRY; + header.byte = readChar(&curdata); + if (header.bits.type != UNSUBSCRIBE) + goto exit; + *dup = header.bits.dup; + + curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ + enddata = curdata + mylen; + + *packetid = readInt(&curdata); + + *count = 0; + while (curdata < enddata) + { + if (!readMQTTLenString(&topicFilters[*count], &curdata, enddata)) + goto exit; + (*count)++; + } + + rc = 1; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + +/** + * Serializes the supplied unsuback data into the supplied buffer, ready for sending + * @param buf the buffer into which the packet will be serialized + * @param buflen the length in bytes of the supplied buffer + * @param packetid integer - the MQTT packet identifier + * @return the length of the serialized data. <= 0 indicates error + */ +int MQTTSerialize_unsuback(unsigned char* buf, int buflen, unsigned short packetid){ + MQTTHeader header = {0}; + int rc = 0; + unsigned char *ptr = buf; + + FUNC_ENTRY; + if (buflen < 2) + { + rc = MQTTPACKET_BUFFER_TOO_SHORT; + goto exit; + } + header.byte = 0; + header.bits.type = UNSUBACK; + writeChar(&ptr, header.byte); /* write header */ + + ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */ + + writeInt(&ptr, packetid); + + rc = ptr - buf; +exit: + FUNC_EXIT_RC(rc); + return rc; +} + + diff --git a/firmware/stm32-esp/user/mqtt/StackTrace.h b/firmware/stm32-esp/user/mqtt/StackTrace.h new file mode 100644 index 00000000..03496fe0 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/StackTrace.h @@ -0,0 +1,61 @@ +#ifndef STACKTRACE_H_ +#define STACKTRACE_H_ + +#include +#define NOSTACKTRACE 1 + +#if defined(NOSTACKTRACE) +#define FUNC_ENTRY +#define FUNC_ENTRY_NOLOG +#define FUNC_ENTRY_MED +#define FUNC_ENTRY_MAX +#define FUNC_EXIT +#define FUNC_EXIT_NOLOG +#define FUNC_EXIT_MED +#define FUNC_EXIT_MAX +#define FUNC_EXIT_RC(x) +#define FUNC_EXIT_MED_RC(x) +#define FUNC_EXIT_MAX_RC(x) + +#else + +#if defined(WIN32) +#define inline __inline +#define FUNC_ENTRY StackTrace_entry(__FUNCTION__, __LINE__, TRACE_MINIMUM) +#define FUNC_ENTRY_NOLOG StackTrace_entry(__FUNCTION__, __LINE__, -1) +#define FUNC_ENTRY_MED StackTrace_entry(__FUNCTION__, __LINE__, TRACE_MEDIUM) +#define FUNC_ENTRY_MAX StackTrace_entry(__FUNCTION__, __LINE__, TRACE_MAXIMUM) +#define FUNC_EXIT StackTrace_exit(__FUNCTION__, __LINE__, NULL, TRACE_MINIMUM) +#define FUNC_EXIT_NOLOG StackTrace_exit(__FUNCTION__, __LINE__, -1) +#define FUNC_EXIT_MED StackTrace_exit(__FUNCTION__, __LINE__, NULL, TRACE_MEDIUM) +#define FUNC_EXIT_MAX StackTrace_exit(__FUNCTION__, __LINE__, NULL, TRACE_MAXIMUM) +#define FUNC_EXIT_RC(x) StackTrace_exit(__FUNCTION__, __LINE__, &x, TRACE_MINIMUM) +#define FUNC_EXIT_MED_RC(x) StackTrace_exit(__FUNCTION__, __LINE__, &x, TRACE_MEDIUM) +#define FUNC_EXIT_MAX_RC(x) StackTrace_exit(__FUNCTION__, __LINE__, &x, TRACE_MAXIMUM) +#else +#define FUNC_ENTRY StackTrace_entry(__func__, __LINE__, TRACE_MINIMUM) +#define FUNC_ENTRY_NOLOG StackTrace_entry(__func__, __LINE__, -1) +#define FUNC_ENTRY_MED StackTrace_entry(__func__, __LINE__, TRACE_MEDIUM) +#define FUNC_ENTRY_MAX StackTrace_entry(__func__, __LINE__, TRACE_MAXIMUM) +#define FUNC_EXIT StackTrace_exit(__func__, __LINE__, NULL, TRACE_MINIMUM) +#define FUNC_EXIT_NOLOG StackTrace_exit(__func__, __LINE__, NULL, -1) +#define FUNC_EXIT_MED StackTrace_exit(__func__, __LINE__, NULL, TRACE_MEDIUM) +#define FUNC_EXIT_MAX StackTrace_exit(__func__, __LINE__, NULL, TRACE_MAXIMUM) +#define FUNC_EXIT_RC(x) StackTrace_exit(__func__, __LINE__, &x, TRACE_MINIMUM) +#define FUNC_EXIT_MED_RC(x) StackTrace_exit(__func__, __LINE__, &x, TRACE_MEDIUM) +#define FUNC_EXIT_MAX_RC(x) StackTrace_exit(__func__, __LINE__, &x, TRACE_MAXIMUM) + +void StackTrace_entry(const char* name, int line, int trace); +void StackTrace_exit(const char* name, int line, void* return_value, int trace); + +void StackTrace_printStack(FILE* dest); +char* StackTrace_get(unsigned long); + +#endif + +#endif + + + + +#endif /* STACKTRACE_H_ */ diff --git a/firmware/stm32-esp/user/show/battery.c b/firmware/stm32-esp/user/show/battery.c new file mode 100644 index 00000000..6d9b2768 --- /dev/null +++ b/firmware/stm32-esp/user/show/battery.c @@ -0,0 +1,220 @@ +#include "battery.h" + +/*电池，获取电池信息*/ +void Bat_GetWorkInfor(void) +{ + /***读取正在充电指示***/ + if(Read_BatCharging()==0) + DevParam.BatCharging = 1; + else + DevParam.BatCharging = 0; + + if(DevParam.BatInforGetTime >= 300) + { + if(DevParam.BatCheck < 100) + DevParam.BatCheck++; + /***获取电池电压***/ + DevParam.BatVoltage = ADC_GetSimpleData(); + if(DevParam.BatVoltage >= 3.58) + { + /***转换电池容量***/ + if(DevParam.BatVoltage>=4.16) + DevParam.ShortBatSOC = 100; + else if(DevParam.BatVoltage>=4.08) + DevParam.ShortBatSOC = 90; + else if(DevParam.BatVoltage>=3.97) + DevParam.ShortBatSOC = 80; + else if(DevParam.BatVoltage>=3.90) + DevParam.ShortBatSOC = 70; + else if(DevParam.BatVoltage>=3.84) + DevParam.ShortBatSOC = 60; + else if(DevParam.BatVoltage>=3.79) + DevParam.ShortBatSOC = 50; + else if(DevParam.BatVoltage>=3.76) + DevParam.ShortBatSOC = 40; + else if(DevParam.BatVoltage>=3.73) + DevParam.ShortBatSOC = 30; + else if(DevParam.BatVoltage>=3.71) + DevParam.ShortBatSOC = 20; + else if(DevParam.BatVoltage>=3.65) + DevParam.ShortBatSOC = 10; + } + else + { + DevParam.ShortBatSOC = 0; + } + DevParam.BatInforGetTime = 0; + } +} +/*显示部分，电池图标外形刷新*/ +void Show_BatIconShapeRefresh(void) +{ + #ifdef Device_LCD + // 电池外形 + SimLCD_PointColor = SimLCDColor_WHITE; + SimLCD_DrawLine( 200, 9, 222, 9); + SimLCD_DrawLine( 200, 21, 222, 21); + + SimLCD_DrawLine( 200, 9, 200, 21); + SimLCD_DrawLine( 222, 9, 222, 21); + + SimLCD_DrawLine( 197, 13, 200, 13); // 上横线 + SimLCD_DrawLine( 197, 13, 197, 17); // 中横线 + SimLCD_DrawLine( 197, 17, 200, 17); // 下横线 + #endif +} +/*显示部分，电池图标刷新*/ +void Show_BatIconRefresh(void) +{ + if((DevParam.BatIconRefreshTime>=500)&&(DevParam.BatCheck>=2)) + { + #ifdef Device_LCD + uint8_t i = 0; + uint16_t FontColor = 0; + if( (DevParam.BatCharging==1)&&(DevParam.RunPhase!=0) ) + {// 充电中，电池图标变成绿色 + FontColor = SimLCDColor_GREEN; + } + else if(DevParam.RunPhase==RunPhase_Runing) + {// 其他，电池图标变成白色 + FontColor = SimLCDColor_WHITE; + } + // 显示SOC + if(DevParam.ShortBatSOC!=DevParam.BatSOC) + { + if( DevParam.ShortBatSOC >= 80 ) { + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 60 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 40 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 20 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 1 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + Power_LCD(1); + DevParam.BatSOC =DevParam.ShortBatSOC; + } + #endif + DevParam.BatIconRefreshTime = 0; + } +} +/*显示部分，侧边跳动*/ +void Show_BroadSideBeat(void) +{ + if(DevParam.SideBeatTime>=2000) + { + #ifdef Device_LCD + uint8_t i = 0; + if(DevParam.SideBeat==1) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 0; i < 13; i++) + SimLCD_DrawLine( 0, i, 32, i); + DevParam.SideBeat = 2; + } + else if(DevParam.SideBeat==2) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 15; i < 28; i++) + SimLCD_DrawLine( 0, i, 24, i); + DevParam.SideBeat = 3; + } + else if(DevParam.SideBeat==3) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 30; i < 43; i++) + SimLCD_DrawLine( 0, i, 16, i); + DevParam.SideBeat = 4; + } + else if(DevParam.SideBeat==4) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 45; i < 58; i++) + SimLCD_DrawLine( 0, i, 8, i); + DevParam.SideBeat = 5; + } + else if(DevParam.SideBeat==5) { + SimLCD_PointColor = SimLCDColor_BLACK; + for(i = 0; i < 13; i++) + SimLCD_DrawLine( 0, i, 32, i); + for(i = 15; i < 28; i++) + SimLCD_DrawLine( 0, i, 24, i); + for(i = 30; i < 43; i++) + SimLCD_DrawLine( 0, i, 16, i); + for(i = 45; i < 58; i++) + SimLCD_DrawLine( 0, i, 8, i); + DevParam.SideBeat = 1; + } + #endif + DevParam.SideBeatTime = 0; + } +} + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/battery.h b/firmware/stm32-esp/user/show/battery.h new file mode 100644 index 00000000..b6f3acc8 --- /dev/null +++ b/firmware/stm32-esp/user/show/battery.h @@ -0,0 +1,31 @@ +#ifndef _BATTERY_H_ +#define _BATTERY_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "bsp_adc.h" + +#include "simulation_lcd.h" + +/*电池，获取电池信息*/ +void Bat_GetWorkInfor(void); +/*显示部分，电池图标外形刷新*/ +void Show_BatIconShapeRefresh(void); +/*显示部分，电池图标刷新*/ +void Show_BatIconRefresh(void); +/*显示部分，侧边跳动*/ +void Show_BroadSideBeat(void); +#endif + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/dev_work.c b/firmware/stm32-esp/user/show/dev_work.c new file mode 100644 index 00000000..1ff2a4c0 --- /dev/null +++ b/firmware/stm32-esp/user/show/dev_work.c @@ -0,0 +1,127 @@ +#include "dev_work.h" + +void Dev_ScanExtIndicate(void) +{ + /*开机检测*/ + if(DevParam.RunPhase==0) + { + if(Read_BootKey()) + { + Delay_ms(200); + if(Read_BootKey()) + { + while(Read_BootKey()); + DevParam.ShortRunPhase = RunPhase_Runing; + } + } + else + { + DevParam.ShortRunPhase = RunPhase_Standby; + } + } + // 待机模式 + if(DevParam.RunPhase==RunPhase_Standby) + { + if(Read_BootKey()) + { + Delay_ms(200); + if(Read_BootKey()) + { + while(Read_BootKey()); + DevParam.ShortRunPhase = RunPhase_Runing; + } + } + } + // 运行模式 + if(DevParam.RunPhase==RunPhase_Runing) + { + if(Read_BootKey()) + { + Delay_ms(200); + if(Read_BootKey()) + { + while(Read_BootKey()); + + // 关机/进入待机状态 + if(DevParam.BatCharging) + DevParam.ShortRunPhase = RunPhase_Standby; + else + DevParam.ShortRunPhase = RunPhase_Close; + } + } + } +} + +/*切换工作模式*/ +void Dev_SwitchWorkMode(void) +{ + if(DevParam.RunPhase!=DevParam.ShortRunPhase) + { + if(DevParam.ShortRunPhase == RunPhase_Runing) + { + // 显示初始化 + #ifdef Device_LCD + Power_LCD(0); + + /*显示部分，基础外形刷新*/ + Show_BasicShapeRefresh(); + + /*显示部分，电池图标外形刷新*/ + if(DevParam.RunPhase == 0) + Show_BatIconShapeRefresh(); + else + Power_LCD(1); + #endif + + // 侧边跳动初始化 + DevParam.SideBeat = 1; + + /*空气检测仪初始化*/ + PMD4_Init(); + + DevParam.RunPhase = RunPhase_Runing; + } + if(DevParam.ShortRunPhase == RunPhase_Standby) + { + Power_PMD4(0); + + #ifdef Device_LCD + Power_LCD(0); + + if(DevParam.RunPhase==0) + { + /*显示部分，电池图标外形刷新*/ + Show_BatIconShapeRefresh(); + } + else if(DevParam.RunPhase==RunPhase_Runing) + { + // 进行清屏操作 + SimLCD_Clear(SimLCDColor_BLACK); + + /*显示部分，电池图标外形刷新*/ + Show_BatIconShapeRefresh(); + + // 数据部分清零 + DevParam.BatSOC = 0; + + Power_LCD(1); + } + #endif + + DevParam.RunPhase = RunPhase_Standby; + } + // 关机模式 + if(DevParam.ShortRunPhase == RunPhase_Close) + { + Delay_ms(1000); + Power_PMD4(0); + Power_LCD(0); + Power_3V3(0); + DevParam.RunPhase = RunPhase_Close; + while(1); + } + } +} + + + diff --git a/firmware/stm32-esp/user/show/dev_work.h b/firmware/stm32-esp/user/show/dev_work.h new file mode 100644 index 00000000..64c2131d --- /dev/null +++ b/firmware/stm32-esp/user/show/dev_work.h @@ -0,0 +1,29 @@ +#ifndef _DEV_WORK_H_ +#define _DEV_WORK_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "bsp_adc.h" + +#include "simulation_lcd.h" + +#include "battery.h" + +#include "pm_uart3.h" + +void Dev_ScanExtIndicate(void); +void Dev_SwitchWorkMode(void); +#endif + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/esp8266_uart2.c b/firmware/stm32-esp/user/show/esp8266_uart2.c new file mode 100644 index 00000000..7637c6ab --- /dev/null +++ b/firmware/stm32-esp/user/show/esp8266_uart2.c @@ -0,0 +1,253 @@ +#include "esp8266_uart2.h" + +//检测应答命令 +static uint8_t* ESP8266_CheckCmd(uint8_t *str) +{ + char *strx = 0; + if(UART2ReadFlag&0x8000) + { + UART2ReadBuf[UART2ReadFlag&0x7FFF] = 0;//添加结束符 + strx = strstr((const char*)UART2ReadBuf,(const char*)str); + } + return (uint8_t*)strx; +} + +//cmd:发送的命令字符串 +//ack:期待的应答结果,如果为空,则表示不需要等待应答 +//返回值:0,发送成功 1,发送失败 +static uint8_t ESP8266_SendCmd(uint8_t *cmd,uint8_t *ack,uint16_t waittime) { + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + + Dev_UART2SendStr("%s\r\n", cmd);//发送命令 + if(ack&&waittime) //需要等待应答 + { + while(--waittime) //等待倒计时 + { + Delay_ms(10); + if(UART2ReadFlag&0x8000) + { + if(ESP8266_CheckCmd(ack)) + { + UART2ReadFlag = 0; + return 0; + } + else + { + UART2ReadFlag = 0; + return 1; + } + } + } + if(waittime==0) + { + return 1; + } + } + return 1; +} +uint8_t ESP8266_SendStr(char* fmt,...) +{ + uint8_t tbuf[200] = {0}; + uint16_t i = 0,j = 0; + + va_list ap; + va_start(ap, fmt); + vsprintf((char*)tbuf, fmt, ap); + va_end(ap); + + j = strlen((const char*)tbuf); + + for( i = 0; i < j; i++) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + USART_SendData(USART2, tbuf[i]); + } + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + + return 0; +} +uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len) +{ + uint16_t i = 0; + for( i = 0; i < len; i++) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + USART_SendData(USART2, tbuf[i]); + } + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + return 0; +} +// STA模式下获取本地IP +void ESP8266_GetLocalIP(uint8_t* ipbuf){ + uint8_t *p,*p1; + + if(ESP8266_SendCmd( (uint8_t *)"AT+CIFSR", (uint8_t *)"OK", 50)) + { + ipbuf[0] = 0; + return; + } + + p = ESP8266_CheckCmd((uint8_t *)"\""); + p1 = (uint8_t *)strstr((const char*)(p+1),"\""); + *p1=0; + sprintf((char*)ipbuf,"%s",p+1); +} + +//退出透传模式 0,退出成功; 1,退出失败 +uint8_t ESP8266_QuitTrans(void){ + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, '+'); + Delay_ms(15); + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, '+'); + Delay_ms(15); + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, '+'); + Delay_ms(500); //等待500ms + return ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",20);//退出透传判断 +} + +//获取连接状态 0,未连接;1,连接成功. +uint8_t ESP8266_ConstaCheck(void){ + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTATUS",(uint8_t *)"OK",50)); + return 0; +} + +uint8_t ESP8266_APInit(char *name, char *password){ + uint8_t Sbuf[60] ={0}; + + // UART2 + BSP_UART2Init(115200); + + Delay_ms(1000); + Delay_ms(1000); + + while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) + {//退出透传 + ESP8266_QuitTrans(); + + //关闭透传模式 + ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); + Delay_ms(1000); + } + + // 关闭回显 + while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); + + // 设置波特率 + while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); + + Delay_ms(10); + + // 设置WIFI AP模式 + while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=2",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); + + // 延时4秒等待重启成功 + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + + memset(Sbuf, 0 , sizeof(Sbuf)); + sprintf((char*)Sbuf, "AT+CWSAP=\"%s\",\"%s\",1,4", name, password); + while(ESP8266_SendCmd(Sbuf, (uint8_t *)"OK", 1000)); + + #ifdef TCP_Mode + + #endif + #ifdef UDP_Mode + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"255.255.255.255\",60156,42254,0",(uint8_t *)"OK",500)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",300)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",200)); + #endif + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + return 0; +} +uint8_t ESP8266_STAConnect(char *name, char *password){ + uint8_t Sbuf[60] ={0}; + + memset(Sbuf, 0 , sizeof(Sbuf)); + sprintf((char*)Sbuf,"AT+CWJAP=\"%s\",\"%s\"", name, password); + if(ESP8266_SendCmd( Sbuf, (uint8_t *)"WIFI GOT IP", 100)){ + return 1; + } + else { + #ifdef TCP_Mode + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"TCP\",\"192.168.0.102\",8086",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); + #endif + #ifdef UDP_Mode + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"192.168.1.6\",8086,8086,0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); + #endif + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + return 0; + } +} +uint8_t ESP8266_STAInit(void){ + // 初始化串口 + BSP_UART2Init(115200); + + // 延时2秒等待串口初始化完成 + Delay_ms(1000); + Delay_ms(1000); + while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) + { + //退出透传 + ESP8266_QuitTrans(); + + //关闭透传模式 + ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); + Delay_ms(800); + } + // 关闭回显 + while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); + + // 设置波特率 + while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); + + Delay_ms(10); + + // 设置WIFI STA模式 + while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=1",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); + + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + + + + return 1; +} + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/esp8266_uart2.h b/firmware/stm32-esp/user/show/esp8266_uart2.h new file mode 100644 index 00000000..64895e76 --- /dev/null +++ b/firmware/stm32-esp/user/show/esp8266_uart2.h @@ -0,0 +1,23 @@ +#ifndef _ESP8266_UART2_H_ +#define _ESP8266_UART2_H_ + +#include "stm32f10x.h" + +#include "bsp_uart2.h" + +#include "stdio.h" +#include "string.h" +#include "stdarg.h" + +//#define TCP_Mode 1 +#define UDP_Mode 1 + +uint8_t ESP8266_SendStr(char* fmt,...); +uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len); +uint8_t ESP8266_APInit(char *name, char *password); +uint8_t ESP8266_STAInit(void); +uint8_t ESP8266_STAConnect(char *name, char *password); + +#endif + + diff --git a/firmware/stm32-esp/user/show/esp8266_work.c b/firmware/stm32-esp/user/show/esp8266_work.c new file mode 100644 index 00000000..d7757dda --- /dev/null +++ b/firmware/stm32-esp/user/show/esp8266_work.c @@ -0,0 +1,269 @@ +#include "esp8266_work.h" + +/**************************** + 配网流程 + 1、将无线设备初始化为AP模式，默认设置为 + 2、 +****************************/ +static uint8_t NetWorkFlow = 1; +static uint32_t Nport = 0; +static uint8_t Nssid[20] = {0}; +static uint8_t Npassword[20] = {0}; + +MQTTPacket_connectData MQTT_ConnectData = MQTTPacket_connectData_initializer; +char MQTT_ClientId[150] = {0}; +char MQTT_Username[65] = {0}; +char MQTT_Password[65] = {0}; + +volatile uint16_t MQTT_ReadBufLen = 0; + +int ESP8266_WaitData(unsigned char* buf, int count) +{ + while(1) + { + if(UART2ReadFlag&0x8000) + { + memcpy(buf, (void*)&UART2ReadBuf[MQTT_ReadBufLen], count); + MQTT_ReadBufLen += count; + return count; + } + Delay_ms(10); + } +} + +uint8_t MQTT_UserSubscribe(char *pSubTopic) { + uint8_t buf[200] = {0}; + uint32_t buflen = sizeof(buf); + int32_t msgid = 1; + int32_t req_qos = 0; // 服务质量 + + MQTTString topicString = MQTTString_initializer; + topicString.cstring = pSubTopic; + + // 订阅格式化 + MQTTSerialize_subscribe(buf, buflen, 0, msgid, 1, &topicString, &req_qos); + + // 发送订阅 + UART2ReadFlag = 0; + ESP8266_SendStr((char *)buf); + if (MQTTPacket_read(buf, buflen, ESP8266_WaitData)==SUBACK) /* wait for suback */ + { + unsigned short submsgid; + int subcount; + int granted_qos; + + MQTTDeserialize_suback(&submsgid, 1, &subcount, &granted_qos, buf, buflen); + if (granted_qos != 0) + { + //Sys_SendLog("granted qos != 0, %d\n", granted_qos); + return 0; + } + else + { + //Sys_SendLog("granted qos = 0\n"); + return 1; + } + } + else + { + //Sys_SendLog("no suback received!\r\n"); + return 0; + } +} +// MQTT_Publish("/mqtt/topic/0", "hello0"); +void MQTT_UserPublish(char *pPubTopic, char *payload, int payloadlen) { + uint8_t buf[400] = {0}; + int buflen = sizeof(buf); + MQTTString topicString = MQTTString_initializer; + int len = 0; + + topicString.cstring = pPubTopic; + len += MQTTSerialize_publish((unsigned char *)(buf + len), buflen - len, 0, 0, 0, 0, topicString, (unsigned char *)payload, payloadlen); + ESP8266_SendStr((char *)buf); +} +uint8_t buf[400] = {0}; +int buflen = 0; +void ESP8266_NetWorkFlow(void) +{ + // 第一步，初始化为AP + if(NetWorkFlow == 1) { + ESP8266_APInit("XiaoYi_IOT_AirBox", "asdqwe9867"); + NetWorkFlow = 2; + } + // 第二步，持续发送UDP广播 + else if(NetWorkFlow == 2) { + if(DevParam.ESP8266SendTime >= 2000) + { + ESP8266_SendStr("{\"code\":\"0\",\"msg\":\"start connect\"}"); + DevParam.ESP8266SendTime = 0; + } + } + // 第三步，返回接受成功信息 + else if(NetWorkFlow == 3) { + ESP8266_SendStr("{\"code\":\"1\",\"msg\":\"getWifiInfo:success\"}"); + NetWorkFlow = 4; + } + // 第四步，连接家庭无线 + else if(NetWorkFlow == 4) { + ESP8266_STAInit(); + while(ESP8266_STAConnect((char *)Nssid, (char *)Npassword)); + NetWorkFlow = 5; + } + else if(NetWorkFlow == 5) { + MQTT_ConnectData.MQTTVersion = 4; // 3.1.1 + MQTT_ConnectData.keepAliveInterval = 60; // 设置心跳包间隔时间 + MQTT_ConnectData.clientID.cstring = (char *)MQTT_ClientId;// 客户端ID + MQTT_ConnectData.username.cstring = (char *)MQTT_Username;// 用户名 + MQTT_ConnectData.password.cstring = (char *)MQTT_Password;// 密码 + MQTT_ConnectData.cleansession = 0; // 清除会话 + + //rc = aiotMqttSign(product_key, device_name, device_secret, \ + //MQTT_ConnectData.clientID.cstring, MQTT_ConnectData.username.cstring, MQTT_ConnectData.password.cstring); + //if (rc < 0) { + //Sys_SendLog("aiotMqttSign -%0x4x\n", -rc); + //return -1; + //} + + // 网络连接 + //char *host = "a1ykSq0uPgd.iot-as-mqtt.cn-shanghai.aliyuncs.com"; + //int port = 1883; + //transport_open( host, port); + + // 发送 登录数据 + // 将连接字符串格式化一下，现在还没有发送 + memset(buf, 0 ,sizeof(buf)); + buflen = sizeof(buf); + + MQTTSerialize_connect( buf, buflen, &MQTT_ConnectData); + UART2ReadFlag = 0; + ESP8266_SendStr((char *)buf); + + // 等待connack + if (MQTTPacket_read(buf, buflen, ESP8266_WaitData) == CONNACK){ + unsigned char sessionPresent, connack_rc; + if (MQTTDeserialize_connack(&sessionPresent, &connack_rc, buf, buflen) != 1 || connack_rc != 0) + { + //Sys_SendLog("Unable to connect,return code %d\r\n", connack_rc); + //return -1; + } + } + /*订阅*/ + MQTT_UserSubscribe("status/set/7CDFA1049ADA"); //更新设备状态 + MQTT_UserSubscribe("status/get/7CDFA1049ADA"); //获取设备状态 + MQTT_UserSubscribe("setting/set/7CDFA1049ADA");//更新设备配置 + MQTT_UserSubscribe("setting/get/7CDFA1049ADA");//获取设备配置 + } + else if(NetWorkFlow == 10) + { + if(DevParam.ESP8266SendTime >= 2000) + { + MQTTSerialize_pingreq(buf, buflen);// 发送心跳 + ESP8266_SendStr((char *)buf); + DevParam.ESP8266SendTime = 0; + } + // 发布设备状态 + else if(DevParam.ESP8266SendTime>=1500){ + // /a1ykSq0uPgd/qmvH76OCy2FeGp9DDMPx/user/update + // 0x00 00000001 0032 0100 001223 + char txBuf[30] = {0}; + char txLen = 0; + //txBuf[txLen++] = COMMAND_REPORT;// 属性上报 + txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x01;// ID + //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0); // INT16 + //txBuf[txLen++] = DeviceData.prop_bool; // BOOL + //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0);// FLOAT + + MQTT_UserPublish("device_info", txBuf, txLen); + DevParam.ESP8266SendTime = 0; + } + } +} + +cJSON *root = NULL; +char JsonString[100] = {0}; +uint16_t init = 0; +uint16_t i = 0; + +uint8_t rbuf[256] = {0}; +uint8_t rlen = 0; +void ESP8266_NetReceiveInfor(void) +{ + if(UART2ReadFlag&0x8000) + { + if(NetWorkFlow == 2) { + // {"port":"60156","ssid":"xxx","password":"xxxx"} + if(UART2ReadBuf[0] == '{') + { + for(i = 0;;i++) + { + JsonString[i] = UART2ReadBuf[i]; + if(UART2ReadBuf[i] == '}') + { + // 解析数据 + root = cJSON_Parse((char *)JsonString); + if(root == NULL) + { + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART3ReadFlag = 0; + return; + } + Nport = cJSON_GetObjectItem(root, "port")->valuedouble; + if(Nport==60156) + { + sprintf((char *)Nssid, "%s",cJSON_GetObjectItem(root, "ssid")->valuestring); + sprintf((char *)Npassword,"%s",cJSON_GetObjectItem(root, "password")->valuestring); + // 进入无线第三步 + NetWorkFlow = 3; + } + cJSON_Delete(root); + memset(JsonString, 0, sizeof(JsonString)); + break; + } + } + } + } + if(NetWorkFlow == 10) + { + rlen = UART2ReadFlag&(~(1<<15)); + memcpy(rbuf, (void*)&UART2ReadBuf, rlen); + memset(UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART2ReadFlag = 0; + + if (strstr((char *)rbuf, "CLOSED")) + { + + } + else + { + if (0xD0 == *rbuf) + { + //Sys_SendLog("MQTT Heart Beat \r\n"); + } + else + { +// strncpy(Topic, (void*)(rbuf+4), rbuf[3]); +// printf("Topic: %s\r\n", Topic); +// strncpy(message,(void*)(rbuf+4+rbuf[3]),rbuf[1]-rbuf[3]-2); +// printf("Message: %s\r\n", message); +// memset(rbuf, 0, sizeof(rbuf)); + } + } + } + } +} + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/esp8266_work.h b/firmware/stm32-esp/user/show/esp8266_work.h new file mode 100644 index 00000000..19be3ab4 --- /dev/null +++ b/firmware/stm32-esp/user/show/esp8266_work.h @@ -0,0 +1,18 @@ +#ifndef _ESP8266_WORK_H_ +#define _ESP8266_WORK_H_ + +#include "stm32f10x.h" + +#include "esp8266_uart2.h" + +#include "cJSON.h" + +#include "MQTTPacket.h" + +#include "MQTTConnect.h" + +void ESP8266_NetWorkFlow(void); +void ESP8266_NetReceiveInfor(void); +#endif + + diff --git a/firmware/stm32-esp/user/show/pm_uart3.c b/firmware/stm32-esp/user/show/pm_uart3.c new file mode 100644 index 00000000..ce7abc55 --- /dev/null +++ b/firmware/stm32-esp/user/show/pm_uart3.c @@ -0,0 +1,196 @@ +#include "pm_uart3.h" + +// 校验 +// 校验正确--0xff 校验错误--0x00 +uint8_t PMD4_CheckSum(uint8_t *data) { + uint8_t i = 0, result = 0; + uint16_t sum = 0; + + if( (data[0] == 0x42) && (data[1] == 0x4d) ) + { + for(i = 0; i < 30; i++) + { + sum += data[i]; + } + if( sum == ((data[30]<<8) + data[31]) ) + { + result = 0xff; + } + } + return result; +} +// PM 初始化 +void PMD4_Init(void) { + BSP_UART3Init(9600); + + Power_PMD4(1); + Delay_ms(20); +} + +// 请求获取空气信息 +void PMD4_ReqGetAirInfor(uint8_t Code) { + uint16_t sum = 0; + uint8_t data[20] = {0}; + uint8_t i = 0; + + data[0] = 0x42; + data[1] = 0x4d; + + data[2] = Code; + + data[3] = 0x00; + data[4] = 0x00; + + for(i = 0; i < 5; i++) + { + sum += data[i]; + } + data[5] = (uint8_t)(sum>>8); + data[6] = (uint8_t)(sum>>0); + + BSP_UART3SendData(data, 7); +} +/*PMD4，获取空气信息*/ +void PMD4_GetAirInfor(void) +{ + #ifdef Device_LCD + uint16_t x = 0, y = 0; + uint8_t i = 0; + #endif + + if(UART3ReadFlag&0x8000) + { + if( PMD4_CheckSum(UART3ReadBuf)==0xff) + { + DevParam.PM1_0 = (uint16_t)(UART3ReadBuf[4]<<8) + (uint16_t)(UART3ReadBuf[5]<<0); + DevParam.PM2_5 = (uint16_t)(UART3ReadBuf[6]<<8) + (uint16_t)(UART3ReadBuf[7]<<0); + DevParam.PM10 = (uint16_t)(UART3ReadBuf[8]<<8) + (uint16_t)(UART3ReadBuf[9]<<0); + } + UART3ReadFlag = 0; + memset((void *)UART3ReadBuf, 0, sizeof(UART3ReadBuf)); + } + if(DevParam.AirInforGetTime >= 2000) + { + PMD4_ReqGetAirInfor(0xE2); + DevParam.AirInforGetTime = 0; + } + /**********显示实时空气信息*****************/ + #ifdef Device_LCD + // PM1.0 + if(DevParam.ShowPM1_0 != DevParam.PM1_0) + { + x = (uint16_t)(SimLCD.width/2/2-20); + y = 260; + + // 1 + i = (uint8_t)(DevParam.PM1_0/100); + SimLCD_NewShowChar( (x+8), y, (i + 16)); + // 1 + i = (uint8_t)(DevParam.PM1_0/10%10); + SimLCD_NewShowChar( (x+16), y, (i + 16)); + // 0 + i = (uint8_t)(DevParam.PM1_0%10); + SimLCD_NewShowChar( (x+24), y, (i + 16)); + + DevParam.ShowPM1_0 = DevParam.PM1_0; + } + // PM2.5 + if(DevParam.ShowPM2_5 != DevParam.PM2_5) + { + x = (uint16_t)(SimLCD.width/2-20); + y = 80; + + // 1 + i = (uint8_t)(DevParam.PM2_5/100); + SimLCD_NewShowChar( (x+8), y, (i + 16)); + // 1 + i = (uint8_t)(DevParam.PM2_5/10%10); + SimLCD_NewShowChar( (x+16), y, (i + 16)); + // 0 + i = (uint8_t)(DevParam.PM2_5%10); + SimLCD_NewShowChar( (x+24), y, (i + 16)); + + DevParam.ShowPM2_5 = DevParam.PM2_5; + } + // PM10 + if(DevParam.PM10 != DevParam.ShowPM10) + { + x = (uint16_t)(SimLCD.width/2/2*3-16); + y = 260; + + // 1 + i = (uint8_t)(DevParam.PM10/100); + SimLCD_NewShowChar( (x+8), y, (i + 16)); + // 1 + i = (uint8_t)(DevParam.PM10/10%10); + SimLCD_NewShowChar( (x+16), y, (i + 16)); + // 0 + i = (uint8_t)(DevParam.PM10%10); + SimLCD_NewShowChar( (x+24), y, (i + 16)); + + DevParam.ShowPM10 = DevParam.PM10; + } + #endif +} +/*显示部分，基础外形刷新*/ +void Show_BasicShapeRefresh(void) +{ + #ifdef Device_LCD + uint16_t x = 0, y = 0; + + // 画上边内圆 + x = (uint16_t)(SimLCD.width/2); + y = (uint16_t)(SimLCD.height/3) + 10; + + // 填充圆环 r0外圆 r1内圆 + SimLCD_PointColor = SimLCDColor_CYAN; + SimLCD_FillTorus( x, y, 100, 90); + + // 画下边两个圆 + x = (uint16_t)(SimLCD.width/2/2*3); + y = (uint16_t)(SimLCD.height/3*2) + (uint16_t)(SimLCD.height/3/2); + + // 填充圆环 r0外圆 r1内圆 + SimLCD_PointColor = SimLCDColor_YELLOW; + SimLCD_FillTorus( x, y, 50, 45); + + x = (uint16_t)(SimLCD.width/2/2); + y = (uint16_t)(SimLCD.height/3*2) + (uint16_t)(SimLCD.height/3/2); + SimLCD_PointColor = SimLCDColor_LIGHTGREEN; + SimLCD_FillTorus( x, y, 50, 45); + + // 显示字符串 PM2.5 ug/m3 PM1.0 PM10 + x = (uint16_t)(SimLCD.width/2-24); + y = 40; + SimLCD_Show_PM2_5( x, y); + + x = (uint16_t)(SimLCD.width/2-20); + y = 180; + SimLCD_Show_ug_m3( x, y); + x = (uint16_t)(SimLCD.width/2/2-20); + y = 230; + SimLCD_Show_PM1_0( x, y); + x = (uint16_t)(SimLCD.width/2/2*3-16); + y = 230; + SimLCD_Show_PM10( x, y); + #endif +} + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/pm_uart3.h b/firmware/stm32-esp/user/show/pm_uart3.h new file mode 100644 index 00000000..cb07f78e --- /dev/null +++ b/firmware/stm32-esp/user/show/pm_uart3.h @@ -0,0 +1,28 @@ +#ifndef _PM_UART3_H_ +#define _PM_UART3_H_ + +#include "stm32f10x.h" + +#include "bsp_uart3.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "simulation_lcd.h" + +void PMD4_Init(void); +/*PMD4，获取空气信息*/ +void PMD4_GetAirInfor(void); +/*显示部分，基础外形刷新*/ +void Show_BasicShapeRefresh(void); +#endif + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/simulation_font.h b/firmware/stm32-esp/user/show/simulation_font.h new file mode 100644 index 00000000..ca1a88a7 --- /dev/null +++ b/firmware/stm32-esp/user/show/simulation_font.h @@ -0,0 +1,270 @@ +#ifndef _SIMULATION_FONT_H_ +#define _SIMULATION_FONT_H_ + +//常用ASCII表 +//偏移量32 +//ASCII字符集: !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ +//PC2LCD2002取模方式设置：阴码+逐列式+顺向+C51格式 +//总共：3个字符集（12*12、16*16和24*24），用户可以自行新增其他分辨率的字符集。 +//每个字符所占用的字节数为:(size/8+((size%8)?1:0))*(size/2),其中size:是字库生成时的点阵大小(12/16/24...) + +const unsigned char Simulation_Asc1206[95][12]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x3F,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x40,0x00,0x00,0x00},/*""",2*/ +{0x09,0x00,0x0B,0xC0,0x3D,0x00,0x0B,0xC0,0x3D,0x00,0x09,0x00},/*"#",3*/ +{0x18,0xC0,0x24,0x40,0x7F,0xE0,0x22,0x40,0x31,0x80,0x00,0x00},/*"$",4*/ +{0x18,0x00,0x24,0xC0,0x1B,0x00,0x0D,0x80,0x32,0x40,0x01,0x80},/*"%",5*/ +{0x03,0x80,0x1C,0x40,0x27,0x40,0x1C,0x80,0x07,0x40,0x00,0x40},/*"&",6*/ +{0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x20,0x40,0x40,0x20},/*"(",8*/ +{0x00,0x00,0x40,0x20,0x20,0x40,0x1F,0x80,0x00,0x00,0x00,0x00},/*")",9*/ +{0x09,0x00,0x06,0x00,0x1F,0x80,0x06,0x00,0x09,0x00,0x00,0x00},/*"*",10*/ +{0x04,0x00,0x04,0x00,0x3F,0x80,0x04,0x00,0x04,0x00,0x00,0x00},/*"+",11*/ +{0x00,0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x20,0x01,0xC0,0x06,0x00,0x38,0x00,0x40,0x00,0x00,0x00},/*"/",15*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x10,0x40,0x3F,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x18,0xC0,0x21,0x40,0x22,0x40,0x24,0x40,0x18,0x40,0x00,0x00},/*"2",18*/ +{0x10,0x80,0x20,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"3",19*/ +{0x02,0x00,0x0D,0x00,0x11,0x00,0x3F,0xC0,0x01,0x40,0x00,0x00},/*"4",20*/ +{0x3C,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x23,0x80,0x00,0x00},/*"5",21*/ +{0x1F,0x80,0x24,0x40,0x24,0x40,0x34,0x40,0x03,0x80,0x00,0x00},/*"6",22*/ +{0x30,0x00,0x20,0x00,0x27,0xC0,0x38,0x00,0x20,0x00,0x00,0x00},/*"7",23*/ +{0x1B,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"8",24*/ +{0x1C,0x00,0x22,0xC0,0x22,0x40,0x22,0x40,0x1F,0x80,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x08,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x04,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x04,0x00,0x0A,0x00,0x11,0x00,0x20,0x80,0x40,0x40},/*"<",28*/ +{0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x40,0x40,0x20,0x80,0x11,0x00,0x0A,0x00,0x04,0x00},/*">",30*/ +{0x18,0x00,0x20,0x00,0x23,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"?",31*/ +{0x1F,0x80,0x20,0x40,0x27,0x40,0x29,0x40,0x1F,0x40,0x00,0x00},/*"@",32*/ +{0x00,0x40,0x07,0xC0,0x39,0x00,0x0F,0x00,0x01,0xC0,0x00,0x40},/*"A",33*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"B",34*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x30,0x80,0x00,0x00},/*"C",35*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"D",36*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x40,0x30,0xC0,0x00,0x00},/*"E",37*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x00,0x30,0x00,0x00,0x00},/*"F",38*/ +{0x0F,0x00,0x10,0x80,0x20,0x40,0x22,0x40,0x33,0x80,0x02,0x00},/*"G",39*/ +{0x20,0x40,0x3F,0xC0,0x04,0x00,0x04,0x00,0x3F,0xC0,0x20,0x40},/*"H",40*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x00,0x00},/*"I",41*/ +{0x00,0x60,0x20,0x20,0x20,0x20,0x3F,0xC0,0x20,0x00,0x20,0x00},/*"J",42*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x0B,0x00,0x30,0xC0,0x20,0x40},/*"K",43*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x00,0x40,0x00,0x40,0x00,0xC0},/*"L",44*/ +{0x3F,0xC0,0x3C,0x00,0x03,0xC0,0x3C,0x00,0x3F,0xC0,0x00,0x00},/*"M",45*/ +{0x20,0x40,0x3F,0xC0,0x0C,0x40,0x23,0x00,0x3F,0xC0,0x20,0x00},/*"N",46*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"O",47*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"P",48*/ +{0x1F,0x80,0x21,0x40,0x21,0x40,0x20,0xE0,0x1F,0xA0,0x00,0x00},/*"Q",49*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x26,0x00,0x19,0xC0,0x00,0x40},/*"R",50*/ +{0x18,0xC0,0x24,0x40,0x24,0x40,0x22,0x40,0x31,0x80,0x00,0x00},/*"S",51*/ +{0x30,0x00,0x20,0x40,0x3F,0xC0,0x20,0x40,0x30,0x00,0x00,0x00},/*"T",52*/ +{0x20,0x00,0x3F,0x80,0x00,0x40,0x00,0x40,0x3F,0x80,0x20,0x00},/*"U",53*/ +{0x20,0x00,0x3E,0x00,0x01,0xC0,0x07,0x00,0x38,0x00,0x20,0x00},/*"V",54*/ +{0x38,0x00,0x07,0xC0,0x3C,0x00,0x07,0xC0,0x38,0x00,0x00,0x00},/*"W",55*/ +{0x20,0x40,0x39,0xC0,0x06,0x00,0x39,0xC0,0x20,0x40,0x00,0x00},/*"X",56*/ +{0x20,0x00,0x38,0x40,0x07,0xC0,0x38,0x40,0x20,0x00,0x00,0x00},/*"Y",57*/ +{0x30,0x40,0x21,0xC0,0x26,0x40,0x38,0x40,0x20,0xC0,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x7F,0xE0,0x40,0x20,0x40,0x20,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x70,0x00,0x0C,0x00,0x03,0x80,0x00,0x40,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x20,0x40,0x20,0x7F,0xE0,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x20,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10},/*"_",63*/ +{0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x02,0x80,0x05,0x40,0x05,0x40,0x03,0xC0,0x00,0x40},/*"a",65*/ +{0x20,0x00,0x3F,0xC0,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x06,0x40,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x24,0x40,0x3F,0xC0,0x00,0x40},/*"d",68*/ +{0x00,0x00,0x03,0x80,0x05,0x40,0x05,0x40,0x03,0x40,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x04,0x40,0x1F,0xC0,0x24,0x40,0x24,0x40,0x20,0x00},/*"f",70*/ +{0x00,0x00,0x02,0xE0,0x05,0x50,0x05,0x50,0x06,0x50,0x04,0x20},/*"g",71*/ +{0x20,0x40,0x3F,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"h",72*/ +{0x00,0x00,0x04,0x40,0x27,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x10,0x00,0x10,0x04,0x10,0x27,0xE0,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x20,0x40,0x3F,0xC0,0x01,0x40,0x07,0x00,0x04,0xC0,0x04,0x40},/*"k",75*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x00,0x40,0x00,0x40,0x00,0x00},/*"l",76*/ +{0x07,0xC0,0x04,0x00,0x07,0xC0,0x04,0x00,0x03,0xC0,0x00,0x00},/*"m",77*/ +{0x04,0x40,0x07,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"n",78*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"o",79*/ +{0x04,0x10,0x07,0xF0,0x04,0x50,0x04,0x40,0x03,0x80,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x50,0x07,0xF0,0x00,0x10},/*"q",81*/ +{0x04,0x40,0x07,0xC0,0x02,0x40,0x04,0x00,0x04,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x06,0x40,0x05,0x40,0x05,0x40,0x04,0xC0,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x04,0x00,0x1F,0x80,0x04,0x40,0x00,0x40,0x00,0x00},/*"t",84*/ +{0x04,0x00,0x07,0x80,0x00,0x40,0x04,0x40,0x07,0xC0,0x00,0x40},/*"u",85*/ +{0x04,0x00,0x07,0x00,0x04,0xC0,0x01,0x80,0x06,0x00,0x04,0x00},/*"v",86*/ +{0x06,0x00,0x01,0xC0,0x07,0x00,0x01,0xC0,0x06,0x00,0x00,0x00},/*"w",87*/ +{0x04,0x40,0x06,0xC0,0x01,0x00,0x06,0xC0,0x04,0x40,0x00,0x00},/*"x",88*/ +{0x04,0x10,0x07,0x10,0x04,0xE0,0x01,0x80,0x06,0x00,0x04,0x00},/*"y",89*/ +{0x00,0x00,0x04,0x40,0x05,0xC0,0x06,0x40,0x04,0x40,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x04,0x00,0x7B,0xE0,0x40,0x20,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x20,0x7B,0xE0,0x04,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x40,0x00,0x80,0x00,0x40,0x00,0x20,0x00,0x20,0x00,0x40,0x00},/*"~",94*/ +}; + +const unsigned char Simulation_Asc1608[95][16]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xCC,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x00,0x00},/*""",2*/ +{0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x0E,0x18,0x11,0x04,0x3F,0xFF,0x10,0x84,0x0C,0x78,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x0F,0x00,0x10,0x84,0x0F,0x38,0x00,0xC0,0x07,0x78,0x18,0x84,0x00,0x78,0x00,0x00},/*"%",5*/ +{0x00,0x78,0x0F,0x84,0x10,0xC4,0x11,0x24,0x0E,0x98,0x00,0xE4,0x00,0x84,0x00,0x08},/*"&",6*/ +{0x08,0x00,0x68,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x18,0x18,0x20,0x04,0x40,0x02,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x40,0x02,0x20,0x04,0x18,0x18,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x02,0x40,0x02,0x40,0x01,0x80,0x0F,0xF0,0x01,0x80,0x02,0x40,0x02,0x40,0x00,0x00},/*"*",10*/ +{0x00,0x80,0x00,0x80,0x00,0x80,0x0F,0xF8,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00},/*"+",11*/ +{0x00,0x01,0x00,0x0D,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},/*"-",13*/ +{0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x06,0x00,0x18,0x00,0x60,0x01,0x80,0x06,0x00,0x18,0x00,0x20,0x00},/*"/",15*/ +{0x00,0x00,0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x08,0x04,0x08,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x0E,0x0C,0x10,0x14,0x10,0x24,0x10,0x44,0x11,0x84,0x0E,0x0C,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x0C,0x18,0x10,0x04,0x11,0x04,0x11,0x04,0x12,0x88,0x0C,0x70,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0xE0,0x03,0x20,0x04,0x24,0x08,0x24,0x1F,0xFC,0x00,0x24,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x1F,0x98,0x10,0x84,0x11,0x04,0x11,0x04,0x10,0x88,0x10,0x70,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x07,0xF0,0x08,0x88,0x11,0x04,0x11,0x04,0x18,0x88,0x00,0x70,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x1C,0x00,0x10,0x00,0x10,0xFC,0x13,0x00,0x1C,0x00,0x10,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x0E,0x38,0x11,0x44,0x10,0x84,0x10,0x84,0x11,0x44,0x0E,0x38,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x07,0x00,0x08,0x8C,0x10,0x44,0x10,0x44,0x08,0x88,0x07,0xF0,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x03,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10,0x04,0x00,0x00},/*"<",28*/ +{0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x10,0x04,0x08,0x08,0x04,0x10,0x02,0x20,0x01,0x40,0x00,0x80,0x00,0x00},/*">",30*/ +{0x00,0x00,0x0E,0x00,0x12,0x00,0x10,0x0C,0x10,0x6C,0x10,0x80,0x0F,0x00,0x00,0x00},/*"?",31*/ +{0x03,0xE0,0x0C,0x18,0x13,0xE4,0x14,0x24,0x17,0xC4,0x08,0x28,0x07,0xD0,0x00,0x00},/*"@",32*/ +{0x00,0x04,0x00,0x3C,0x03,0xC4,0x1C,0x40,0x07,0x40,0x00,0xE4,0x00,0x1C,0x00,0x04},/*"A",33*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x11,0x04,0x0E,0x88,0x00,0x70,0x00,0x00},/*"B",34*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x04,0x10,0x08,0x1C,0x10,0x00,0x00},/*"C",35*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"D",36*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x17,0xC4,0x10,0x04,0x08,0x18,0x00,0x00},/*"E",37*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x17,0xC0,0x10,0x00,0x08,0x00,0x00,0x00},/*"F",38*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x44,0x1C,0x78,0x00,0x40,0x00,0x00},/*"G",39*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x00,0x80,0x00,0x80,0x10,0x84,0x1F,0xFC,0x10,0x04},/*"H",40*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x03,0x00,0x01,0x10,0x01,0x10,0x01,0x1F,0xFE,0x10,0x00,0x10,0x00,0x00,0x00},/*"J",42*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x03,0x80,0x14,0x64,0x18,0x1C,0x10,0x04,0x00,0x00},/*"K",43*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x0C,0x00,0x00},/*"L",44*/ +{0x10,0x04,0x1F,0xFC,0x1F,0x00,0x00,0xFC,0x1F,0x00,0x1F,0xFC,0x10,0x04,0x00,0x00},/*"M",45*/ +{0x10,0x04,0x1F,0xFC,0x0C,0x04,0x03,0x00,0x00,0xE0,0x10,0x18,0x1F,0xFC,0x10,0x00},/*"N",46*/ +{0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"O",47*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x10,0x80,0x10,0x80,0x10,0x80,0x0F,0x00,0x00,0x00},/*"P",48*/ +{0x07,0xF0,0x08,0x18,0x10,0x24,0x10,0x24,0x10,0x1C,0x08,0x0A,0x07,0xF2,0x00,0x00},/*"Q",49*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x11,0xC0,0x11,0x30,0x0E,0x0C,0x00,0x04},/*"R",50*/ +{0x00,0x00,0x0E,0x1C,0x11,0x04,0x10,0x84,0x10,0x84,0x10,0x44,0x1C,0x38,0x00,0x00},/*"S",51*/ +{0x18,0x00,0x10,0x00,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x00,0x18,0x00,0x00,0x00},/*"T",52*/ +{0x10,0x00,0x1F,0xF8,0x10,0x04,0x00,0x04,0x00,0x04,0x10,0x04,0x1F,0xF8,0x10,0x00},/*"U",53*/ +{0x10,0x00,0x1E,0x00,0x11,0xE0,0x00,0x1C,0x00,0x70,0x13,0x80,0x1C,0x00,0x10,0x00},/*"V",54*/ +{0x1F,0xC0,0x10,0x3C,0x00,0xE0,0x1F,0x00,0x00,0xE0,0x10,0x3C,0x1F,0xC0,0x00,0x00},/*"W",55*/ +{0x10,0x04,0x18,0x0C,0x16,0x34,0x01,0xC0,0x01,0xC0,0x16,0x34,0x18,0x0C,0x10,0x04},/*"X",56*/ +{0x10,0x00,0x1C,0x00,0x13,0x04,0x00,0xFC,0x13,0x04,0x1C,0x00,0x10,0x00,0x00,0x00},/*"Y",57*/ +{0x08,0x04,0x10,0x1C,0x10,0x64,0x10,0x84,0x13,0x04,0x1C,0x04,0x10,0x18,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x40,0x02,0x40,0x02,0x40,0x02,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x30,0x00,0x0C,0x00,0x03,0x80,0x00,0x60,0x00,0x1C,0x00,0x03,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x40,0x02,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01},/*"_",63*/ +{0x00,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x00,0x98,0x01,0x24,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xFC,0x00,0x04},/*"a",65*/ +{0x10,0x00,0x1F,0xFC,0x00,0x88,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x11,0x08,0x1F,0xFC,0x00,0x04},/*"d",68*/ +{0x00,0x00,0x00,0xF8,0x01,0x44,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xC8,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x01,0x04,0x01,0x04,0x0F,0xFC,0x11,0x04,0x11,0x04,0x11,0x00,0x18,0x00},/*"f",70*/ +{0x00,0x00,0x00,0xD6,0x01,0x29,0x01,0x29,0x01,0x29,0x01,0xC9,0x01,0x06,0x00,0x00},/*"g",71*/ +{0x10,0x04,0x1F,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"h",72*/ +{0x00,0x00,0x01,0x04,0x19,0x04,0x19,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x03,0x00,0x01,0x01,0x01,0x19,0x01,0x19,0xFE,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x10,0x04,0x1F,0xFC,0x00,0x24,0x00,0x40,0x01,0xB4,0x01,0x0C,0x01,0x04,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x01,0x04,0x01,0xFC,0x01,0x04,0x01,0x00,0x01,0xFC,0x01,0x04,0x01,0x00,0x00,0xFC},/*"m",77*/ +{0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"n",78*/ +{0x00,0x00,0x00,0xF8,0x01,0x04,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0xF8,0x00,0x00},/*"o",79*/ +{0x01,0x01,0x01,0xFF,0x00,0x85,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x05,0x01,0xFF,0x00,0x01},/*"q",81*/ +{0x01,0x04,0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x04,0x01,0x00,0x01,0x80,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0xCC,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x98,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xF8,0x01,0x04,0x01,0x04,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x01,0x00,0x01,0xF8,0x00,0x04,0x00,0x04,0x00,0x04,0x01,0x08,0x01,0xFC,0x00,0x04},/*"u",85*/ +{0x01,0x00,0x01,0x80,0x01,0x70,0x00,0x0C,0x00,0x10,0x01,0x60,0x01,0x80,0x01,0x00},/*"v",86*/ +{0x01,0xF0,0x01,0x0C,0x00,0x30,0x01,0xC0,0x00,0x30,0x01,0x0C,0x01,0xF0,0x01,0x00},/*"w",87*/ +{0x00,0x00,0x01,0x04,0x01,0x8C,0x00,0x74,0x01,0x70,0x01,0x8C,0x01,0x04,0x00,0x00},/*"x",88*/ +{0x01,0x01,0x01,0x81,0x01,0x71,0x00,0x0E,0x00,0x18,0x01,0x60,0x01,0x80,0x01,0x00},/*"y",89*/ +{0x00,0x00,0x01,0x84,0x01,0x0C,0x01,0x34,0x01,0x44,0x01,0x84,0x01,0x0C,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x3E,0xFC,0x40,0x02,0x40,0x02},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x3E,0xFC,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x60,0x00,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x20,0x00},/*"~",94*/ +}; + +const unsigned char Simulation_Asc3636[5][36]= { +{0x00,0x00,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xF8,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x04,0x0C,0x00,0x06,0x0C,0x00,0x06,0x1C,0x00,0x03,0xF8,0x00,0x01,0xF0, +0x00,0x00,0x00,0x00},/*"P",0*/ +{0x00,0x00,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xF8,0x0F,0xF0,0x00,0x00,0xFF,0x80,0x00,0x07,0xF8,0x00,0x07,0xF8,0x01,0xFF,0x00,0x0F,0xE0,0x00,0x0F,0xFF,0xF8,0x0F,0xFF, +0xF8,0x00,0x00,0x00},/*"M",1*/ +{0x00,0x00,0x00,0x01,0x80,0x10,0x07,0x80,0x70,0x06,0x00,0xF0,0x0C,0x01,0xD0,0x0C,0x03,0x90,0x0C,0x07,0x10,0x0E,0x1C,0x10,0x07,0xF8,0x10,0x03,0xE0,0x10,0x00,0x00, +0x10,0x00,0x00,0x00},/*"2",2*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00},/*".",3*/ +{0x00,0x00,0x80,0x00,0x38,0xE0,0x07,0xF8,0x70,0x07,0xB0,0x10,0x04,0x20,0x18,0x04,0x20,0x18,0x04,0x30,0x18,0x04,0x30,0x30,0x04,0x3C,0xF0,0x04,0x1F,0xE0,0x00,0x03, +0x00,0x00,0x00,0x00},/*"5",4*/ +}; + +const unsigned char Simulation_Asc3838[10][90]= { +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFC,0x00,0x00, + 0x00,0x3F,0xFF,0xC0,0x00,0x00,0x7F,0xFF,0xF0,0x00, + 0x00,0xFC,0x01,0xF8,0x00,0x01,0xE0,0x00,0x78,0x00, + 0x03,0xC0,0x00,0x1C,0x00,0x03,0x80,0x00,0x1C,0x00, + 0x03,0x00,0x00,0x0E,0x00,0x03,0x00,0x00,0x0E,0x00, + 0x03,0x80,0x00,0x1C,0x00,0x03,0xC0,0x00,0x3C,0x00, + 0x01,0xF0,0x00,0x78,0x00,0x00,0xFF,0xFF,0xF0,0x00, + 0x00,0x7F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"0",0*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x70, +0x00,0x00,0x00,0x00,0xE0,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"1",1*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x70,0x00,0x1C,0x00,0x00,0xF8,0x00,0x3C,0x00,0x01,0xE0,0x00,0x7C,0x00,0x03,0xC0,0x00,0xFC,0x00,0x03,0x80, +0x01,0xEC,0x00,0x03,0x80,0x03,0xCC,0x00,0x03,0x80,0x0F,0x0C,0x00,0x03,0x80,0x1E,0x0C,0x00,0x03,0x80,0x3C,0x0C,0x00,0x03,0x80,0xF8,0x0C,0x00,0x01,0xE7,0xE0,0x0C, +0x00,0x01,0xFF,0xC0,0x0C,0x00,0x00,0xFF,0x00,0x0C,0x00,0x00,0x18,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"2",2*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x30,0x00,0xE0,0x00,0x00,0x70,0x00,0xF0,0x00,0x01,0xF0,0x00,0x78,0x00,0x01,0xC0,0x00,0x3C,0x00,0x03,0x80, +0x00,0x1C,0x00,0x03,0x80,0x60,0x0C,0x00,0x03,0x00,0xE0,0x0C,0x00,0x03,0x00,0xE0,0x0C,0x00,0x03,0x80,0xE0,0x1C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x01,0xE7,0xB8,0x78, +0x00,0x01,0xFF,0x3F,0xF8,0x00,0x00,0xFE,0x1F,0xF0,0x00,0x00,0x18,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"3",3*/ + +{0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x07,0x80,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x3F,0x80,0x00,0x00,0x00,0x7B,0x80,0x00,0x00,0x01,0xE3,0x80,0x00,0x00,0x03, +0xC3,0x80,0x00,0x00,0x0F,0x83,0x80,0x00,0x00,0x1E,0x03,0x80,0x00,0x00,0x7C,0x03,0x80,0x00,0x00,0xF0,0x03,0x80,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC, +0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00},/*"4",4*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0xE0,0x00,0x00,0x07,0xE0,0xF0,0x00,0x00,0xFF,0xE0,0x78,0x00,0x03,0xFF,0xC0,0x1C,0x00,0x03,0xF1,0x80,0x1C,0x00,0x03,0x83, +0x80,0x0E,0x00,0x03,0x83,0x80,0x0E,0x00,0x03,0x83,0x80,0x0E,0x00,0x03,0x83,0x80,0x0C,0x00,0x03,0x83,0x80,0x1C,0x00,0x03,0x81,0xC0,0x3C,0x00,0x03,0x81,0xE0,0x78, +0x00,0x03,0x80,0xFF,0xF8,0x00,0x03,0x80,0x7F,0xE0,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"5",5*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00,0x3F,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x03,0xF8,0xF8,0x00,0x00,0x07,0xE0,0x3C,0x00,0x00,0x1F, +0xC0,0x1C,0x00,0x00,0x3F,0x80,0x0C,0x00,0x00,0xF9,0x80,0x0E,0x00,0x01,0xF1,0x80,0x0E,0x00,0x03,0xC1,0x80,0x0E,0x00,0x03,0x01,0xC0,0x0C,0x00,0x02,0x01,0xC0,0x1C, +0x00,0x00,0x00,0xE0,0x7C,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xF0,0x00,0x00,0x00,0x1F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00},/*"6",6*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x1C,0x00,0x03,0x80, +0x00,0xFC,0x00,0x03,0x80,0x07,0xFC,0x00,0x03,0x80,0x1F,0xE0,0x00,0x03,0x80,0x7F,0x00,0x00,0x03,0x81,0xF8,0x00,0x00,0x03,0x87,0xE0,0x00,0x00,0x03,0x9F,0x00,0x00, +0x00,0x03,0xFC,0x00,0x00,0x00,0x03,0xF0,0x00,0x00,0x00,0x03,0xE0,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"7",7*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x00,0x00,0x7E,0x1F,0xF0,0x00,0x00,0xFF,0xBF,0xF8,0x00,0x01,0xE7,0xF8,0x3C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x03,0x80, +0xE0,0x0C,0x00,0x03,0x80,0xE0,0x0E,0x00,0x03,0x00,0xE0,0x0E,0x00,0x03,0x80,0xE0,0x0E,0x00,0x03,0x80,0xE0,0x0C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x01,0xE7,0xB8,0x3C, +0x00,0x00,0xFF,0x3F,0xF8,0x00,0x00,0x7E,0x1F,0xF0,0x00,0x00,0x00,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"8",8*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x00,0x00,0x00,0x7F,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x01,0xE0,0x78,0x00,0x00,0x03,0xC0,0x38,0x06,0x00,0x03,0x80, +0x18,0x1E,0x00,0x03,0x80,0x18,0x7E,0x00,0x03,0x80,0x19,0xF8,0x00,0x03,0x80,0x1F,0xE0,0x00,0x03,0x80,0x3F,0xC0,0x00,0x03,0xC0,0x7F,0x00,0x00,0x01,0xE1,0xFC,0x00, +0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xC0,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"9",9*/ + +}; +#endif + + diff --git a/firmware/stm32-esp/user/show/simulation_lcd.c b/firmware/stm32-esp/user/show/simulation_lcd.c new file mode 100644 index 00000000..1d18330f --- /dev/null +++ b/firmware/stm32-esp/user/show/simulation_lcd.c @@ -0,0 +1,1157 @@ +#include "simulation_lcd.h" +#include "simulation_font.h" + +// LCD的画笔颜色和背景色 +uint16_t SimLCD_PointColor = 0x0000;// 画笔颜色 +uint16_t SimLCD_BackColor = 0xFFFF;// 背景色 + +// 管理LCD参数 默认为竖屏 +SimLCD_t SimLCD = {0}; + +// 读出数据控制线 +#define Simulation_RD(x) (x)?(GPIOB->BSRR = (1<<6)):(GPIOB->BRR = (1<<6)) +// 写入数据控制线 +#define Simulation_WR(x) (x)?(GPIOB->BSRR = (1<<7)):(GPIOB->BRR = (1<<7)) +// 数据/命令选择管脚(1:数据读写,0:命令读写) +#define Simulation_RS(x) (x)?(GPIOB->BSRR = (1<<8)):(GPIOB->BRR = (1<<8)) +// 片选信号线 +#define Simulation_CS(x) (x)?(GPIOB->BSRR = (1<<9)):(GPIOB->BRR = (1<<9)) + +// 16位双向数据线 1 输入 2 输出 +static uint8_t PortDir = 0; +static void Simulation_SetOut(void) { + if( PortDir != 2 ) + { + GPIO_InitTypeDef GPIO_InitStructure; + + // PC0/1/2/3/4/5/6/7 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + // PA5/6/7/8/9/10/11/12 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA,&GPIO_InitStructure); + + PortDir = 2; + } +} +static void Simulation_SetIn(void) { + if( PortDir != 1 ) + { + GPIO_InitTypeDef GPIO_InitStructure; + + // PC0/1/2/3/4/5/6/7 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + // PA5/6/7/8/9/10/11/12 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA,&GPIO_InitStructure); + + PortDir = 1; + } +} +static void Simulation_WriteData(uint16_t data) { + uint16_t flag = 0; + flag = (data>>0)&0x00FF; + GPIOC->BSRR = flag; + flag = (~flag)&0x00FF; + GPIOC->BRR = flag; + + flag = 0; + flag = (uint16_t)(((data>>8)&0x00FF)<<5); + GPIOA->BSRR = flag; + flag = (uint16_t)(((~((data>>8)&0x00FF))&0x00FF)<<5); + GPIOA->BRR = flag; +} +static uint16_t Simulation_ReadData(void) { + uint16_t flag1 = 0; + uint16_t flag2 = 0; + flag1 = GPIOC->IDR; + flag2 = (uint16_t)(flag1&0x00FF); + + flag1 = 0; + flag1 = GPIOA->IDR; + flag2 = flag2 + (uint16_t)((flag1<<3)&0xFF00); + + return flag2; +} + +static void SimLCD_WriteCmd(uint16_t data) { + Simulation_SetOut(); + + Simulation_RS(0); + Simulation_RD(1); + Simulation_CS(0); + Delay_us(1); + Simulation_WriteData(data); + Delay_us(1); + Simulation_WR(0); + Delay_us(1); + Simulation_WR(1); + Simulation_CS(1); +} +static void SimLCD_WriteData(uint16_t data) { + Simulation_SetOut(); + + Simulation_RS(1); + Simulation_RD(1); + Simulation_CS(0); + Delay_us(1); + Simulation_WriteData(data); + Delay_us(1); + Simulation_WR(0); + Delay_us(1); + Simulation_WR(1); + Simulation_CS(1); +} + +static uint16_t SimLCD_ReadData(void) { + uint16_t flag = 0; + + Simulation_SetIn(); + + Simulation_RS(1); + Simulation_WR(1); + Simulation_RD(0); + Simulation_CS(0); + Delay_us(1); + flag = Simulation_ReadData(); + Delay_us(1); + Simulation_RD(1); + Simulation_CS(1); + return flag; +} +// 开始写GRAM +void SimLCD_WriteRAMPrepare(void){ + SimLCD_WriteCmd(SimLCD.wramcmd); +} + +// LCD写GRAM +// RGB_Code:颜色值 +void SimLCD_WriteRAM(uint16_t RGB_Code){ + SimLCD_WriteData(RGB_Code); +} + +//从ILI93xx读出的数据为GBR格式，而我们写入的时候为RGB格式。 +//通过该函数转换 +//c:GBR格式的颜色值 +//返回值：RGB格式的颜色值 +uint16_t SimLCD_BGR2RGB(uint16_t c){ + uint16_t r,g,b,rgb; + b = (c>>0)&0x1f; + g = (c>>5)&0x3f; + r = (c>>11)&0x1f; + rgb=(b<<11)+(g<<5)+(r<<0); + return(rgb); +} +// 当mdk -O1时间优化时需要设置 +void SimLCD_Delay(u8 i){ + while(i--); +} +//设置光标位置 +//Xpos:横坐标 +//Ypos:纵坐标 +void SimLCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { + if( (SimLCD.id==0X9341) || (SimLCD.id==0X6804) ) + { + SimLCD_WriteCmd(SimLCD.setxcmd); /* 设置X坐标 */ + SimLCD_WriteData( Xpos >> 8 ); /* 先高8位，然后低8位 */ + SimLCD_WriteData( Xpos & 0x00ff ); /* 设置起始点和结束点*/ + + SimLCD_WriteCmd( SimLCD.setycmd ); /* 设置Y坐标*/ + SimLCD_WriteData( Ypos >> 8 ); + SimLCD_WriteData( Ypos & 0x00ff ); + } + else + { + if(SimLCD.dir==1) + Xpos = SimLCD.width-1-Xpos;// 横屏其实就是调转x,y坐标 + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData( Xpos ); + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData( Ypos ); + } +} +// 读取个某点的颜色值 +// x,y:坐标 +// 返回值:此点的颜色 +uint16_t SimLCD_ReadPoint(uint16_t x, uint16_t y) { + uint16_t r = 0,g = 0,b = 0; + if( (x>=SimLCD.width) || (y>=SimLCD.height) ) return 0; // 超过了范围,直接返回 + SimLCD_SetCursor(x, y); + if( (SimLCD.id==0X9341) || (SimLCD.id==0X6804) ) + SimLCD_WriteCmd(0X2E); // 9341/6804 发送读GRAM指令 + else + SimLCD_WriteCmd(SimLCD_R34); //其他IC发送读GRAM指令 + if(SimLCD.id==0X9320) + SimLCD_Delay(2); // FOR 9320,延时2us + + if(SimLCD_ReadData()) + r = 0; // dummy Read + SimLCD_Delay(2); + r = SimLCD_ReadData(); //实际坐标颜色 + if(SimLCD.id==0X9341) // 9341要分2次读出 + { + SimLCD_Delay(2); + b = 0; + b = SimLCD_ReadData(); + g = r&0xFF;//对于9341,第一次读取的是RG的值,R在前,G在后,各占8位 + g <<= 8; + } + else if(SimLCD.id==0X6804) + r = SimLCD_ReadData();//6804第二次读取的才是真实值 + if(SimLCD.id==0X9325||SimLCD.id==0X4535||SimLCD.id==0X4531||SimLCD.id==0X8989||SimLCD.id==0XB505) + return r;//这几种IC直接返回颜色值 + else if(SimLCD.id==0X9341) + return (((r>>11)<<11)|((g>>10)<<5)|(b>>11)); //ILI9341需要公式转换一下 + else + return SimLCD_BGR2RGB(r); //其他IC +} +//LCD开启显示 +void SimLCD_DisplayOn(void){ + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + SimLCD_WriteCmd(0X29); //开启显示 + else + { + //开启显示 + SimLCD_WriteCmd(SimLCD_R7); + SimLCD_WriteData(0x0173); + } +} +//LCD关闭显示 +void SimLCD_DisplayOff(void){ + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + SimLCD_WriteCmd(0X28); + else + { + SimLCD_WriteCmd(SimLCD_R7); + SimLCD_WriteData(0x0); + } +} + +//设置LCD的自动扫描方向 +//注意:其他函数可能会受到此函数设置的影响(尤其是9341/6804这两个奇葩), +//所以,一般设置为L2R_U2D即可,如果设置为其他扫描方式,可能导致显示不正常. +//dir:0~7,代表8个方向(具体定义见lcd.h) +//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341等IC已经实际测试 +void SimLCD_ScanDir(uint8_t dir) { + uint16_t regval = 0, temp = 0; + uint8_t dirreg = 0; + // 横屏时，对6804不改变扫描方向！ + if(SimLCD.dir==1 && SimLCD.id!=0X6804) { + switch(dir)//方向转换 + { + case 0:dir=6;break; + case 1:dir=7;break; + case 2:dir=4;break; + case 3:dir=5;break; + case 4:dir=1;break; + case 5:dir=0;break; + case 6:dir=3;break; + case 7:dir=2;break; + } + } + // 9341/6804,很特殊 + if(SimLCD.id==0x9341||SimLCD.id==0X6804) { + switch(dir) + { + case SimLCD_L2R_U2D://从左到右,从上到下 + regval|=(0<<7)|(0<<6)|(0<<5); + break; + case SimLCD_L2R_D2U://从左到右,从下到上 + regval|=(1<<7)|(0<<6)|(0<<5); + break; + case SimLCD_R2L_U2D://从右到左,从上到下 + regval|=(0<<7)|(1<<6)|(0<<5); + break; + case SimLCD_R2L_D2U://从右到左,从下到上 + regval|=(1<<7)|(1<<6)|(0<<5); + break; + case SimLCD_U2D_L2R://从上到下,从左到右 + regval|=(0<<7)|(0<<6)|(1<<5); + break; + case SimLCD_U2D_R2L://从上到下,从右到左 + regval|=(0<<7)|(1<<6)|(1<<5); + break; + case SimLCD_D2U_L2R://从下到上,从左到右 + regval|=(1<<7)|(0<<6)|(1<<5); + break; + case SimLCD_D2U_R2L://从下到上,从右到左 + regval|=(1<<7)|(1<<6)|(1<<5); + break; + } + dirreg = 0X36; + regval|= 0X08;// BGR + if(SimLCD.id==0X6804) + regval |= 0x02; // 6804的BIT6和9341的反了 + + SimLCD_WriteCmd(dirreg); + SimLCD_WriteData(regval); + + if(regval&0X20) + { + if(SimLCD.width < SimLCD.height)//交换X,Y + { + temp = SimLCD.width; + SimLCD.width = SimLCD.height; + SimLCD.height= temp; + } + }else + { + if(SimLCD.width > SimLCD.height)//交换X,Y + { + temp = SimLCD.width; + SimLCD.width = SimLCD.height; + SimLCD.height = temp; + } + } + + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData(0); + SimLCD_WriteData(0); + SimLCD_WriteData((SimLCD.width-1)>>8); + SimLCD_WriteData((SimLCD.width-1)&0XFF); + + SimLCD_WriteCmd(SimLCD.setycmd); + SimLCD_WriteData(0); + SimLCD_WriteData(0); + SimLCD_WriteData((SimLCD.height-1)>>8); + SimLCD_WriteData((SimLCD.height-1)&0XFF); + } + else { + switch(dir) + { + case SimLCD_L2R_U2D://从左到右,从上到下 + regval|=(1<<5)|(1<<4)|(0<<3); + break; + case SimLCD_L2R_D2U://从左到右,从下到上 + regval|=(0<<5)|(1<<4)|(0<<3); + break; + case SimLCD_R2L_U2D://从右到左,从上到下 + regval|=(1<<5)|(0<<4)|(0<<3); + break; + case SimLCD_R2L_D2U://从右到左,从下到上 + regval|=(0<<5)|(0<<4)|(0<<3); + break; + case SimLCD_U2D_L2R://从上到下,从左到右 + regval|=(1<<5)|(1<<4)|(1<<3); + break; + case SimLCD_U2D_R2L://从上到下,从右到左 + regval|=(1<<5)|(0<<4)|(1<<3); + break; + case SimLCD_D2U_L2R://从下到上,从左到右 + regval|=(0<<5)|(1<<4)|(1<<3); + break; + case SimLCD_D2U_R2L://从下到上,从右到左 + regval|=(0<<5)|(0<<4)|(1<<3); + break; + } + if(SimLCD.id==0x8989)//8989 IC + { + dirreg=0X11; + regval|=0X6040; //65K + }else//其他驱动IC + { + dirreg=0X03; + regval|=1<<12; + } + SimLCD_WriteCmd(dirreg); + SimLCD_WriteData(regval); + } +} +//画点 +//x,y:坐标 +//POINT_COLOR:此点的颜色 +void SimLCD_DrawPoint(uint16_t x, uint16_t y) { + SimLCD_SetCursor(x,y); //设置光标位置 + SimLCD_WriteRAMPrepare(); //开始写入GRAM + SimLCD_WriteData(SimLCD_PointColor); +} +//快速画点 +//x,y:坐标 +//color:颜色 +void SimLCD_FastDrawPoint(uint16_t x,uint16_t y,uint16_t color) { + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + { + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData(x>>8); + SimLCD_WriteData(x&0XFF); + + SimLCD_WriteCmd(SimLCD.setycmd); + SimLCD_WriteData(y>>8); + SimLCD_WriteData(y&0XFF); + } + else + { + if(SimLCD.dir==1) + x = SimLCD.width-1-x;//横屏其实就是调转x,y坐标 + + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData(x); + + SimLCD_WriteCmd(SimLCD.setycmd); + SimLCD_WriteData(y); + } + SimLCD_WriteCmd(SimLCD.wramcmd); + SimLCD_WriteData(color); +} + +// 设置LCD显示方向（6804不支持横屏显示） +// dir:0,竖屏；1,横屏 +void SimLCD_DisplayDir(uint8_t dir) { + if(dir==0)//竖屏 + { + SimLCD.dir = 0; //竖屏 + SimLCD.width = 240;//--宽度 + SimLCD.height= 320;//--高度 + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + { + SimLCD.wramcmd=0X2C; //--开始写grammer指令 + SimLCD.setxcmd=0X2A; + SimLCD.setycmd=0X2B; + if(SimLCD.id==0X6804) + { + SimLCD.width =320; + SimLCD.height=480; + } + } + } + else if(SimLCD.id!=0X6804)//6804不支持横屏显示 + { + SimLCD.dir =1;//横屏 + SimLCD.width =320; + SimLCD.height=240; + if(SimLCD.id==0X9341) + { + SimLCD.wramcmd=0X2C; + SimLCD.setxcmd=0X2A; + SimLCD.setycmd=0X2B; + }else if(SimLCD.id==0X8989) + { + SimLCD.wramcmd = SimLCD_R34; + SimLCD.setxcmd = 0X4F; + SimLCD.setycmd = 0X4E; + }else + { + SimLCD.wramcmd = SimLCD_R34; + SimLCD.setxcmd = SimLCD_R33; + SimLCD.setycmd = SimLCD_R32; + } + } + SimLCD_ScanDir(SimLCD_DefScanDir); //默认扫描方向 +} +//清屏函数 +//color:要清屏的填充色 +void SimLCD_Clear(uint16_t color) { + uint32_t index=0; + uint32_t totalpoint = SimLCD.width; + totalpoint *= SimLCD.height; // 得到总点数 + + SimLCD_SetCursor(0x0000, 0x0000); // 设置光标位置 + + SimLCD_WriteRAMPrepare(); // 开始写入GRAM + for(index = 0; index < totalpoint; index++) + SimLCD_WriteData(color); +} +static void SimLCD9341_Init(void){ + SimLCD_WriteCmd(0xCF); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0xC1); + SimLCD_WriteData(0X30); + + SimLCD_WriteCmd(0xED); + SimLCD_WriteData(0x64); + SimLCD_WriteData(0x03); + SimLCD_WriteData(0X12); + SimLCD_WriteData(0X81); + + SimLCD_WriteCmd(0xE8); + SimLCD_WriteData(0x85); + SimLCD_WriteData(0x10); + SimLCD_WriteData(0x7A); + + SimLCD_WriteCmd(0xCB); + SimLCD_WriteData(0x39); + SimLCD_WriteData(0x2C); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x34); + SimLCD_WriteData(0x02); + + SimLCD_WriteCmd(0xF7); + SimLCD_WriteData(0x20); + + SimLCD_WriteCmd(0xEA); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + + SimLCD_WriteCmd(0xC0); //Power control + SimLCD_WriteData(0x1B); //VRH[5:0] + + SimLCD_WriteCmd(0xC1); //Power control + SimLCD_WriteData(0x01); //SAP[2:0];BT[3:0] + + SimLCD_WriteCmd(0xC5); //VCM control + SimLCD_WriteData(0x30); //-3F + SimLCD_WriteData(0x30); //=3C + + SimLCD_WriteCmd(0xC7); //VCM control2 + SimLCD_WriteData(0XB7); + + SimLCD_WriteCmd(0x36); //Memory Access Control + SimLCD_WriteData(0x48); + + SimLCD_WriteCmd(0x3A); + SimLCD_WriteData(0x55); + + SimLCD_WriteCmd(0xB1); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x1A); + + SimLCD_WriteCmd(0xB6); //Display Function Control + SimLCD_WriteData(0x0A); + SimLCD_WriteData(0xA2); + + SimLCD_WriteCmd(0xF2); //3Gamma Function Disable + SimLCD_WriteData(0x00); + + SimLCD_WriteCmd(0x26); //Gamma curve selected + SimLCD_WriteData(0x01); + + SimLCD_WriteCmd(0xE0); //Set Gamma + SimLCD_WriteData(0x0F); + SimLCD_WriteData(0x2A); + SimLCD_WriteData(0x28); + SimLCD_WriteData(0x08); + SimLCD_WriteData(0x0E); + SimLCD_WriteData(0x08); + SimLCD_WriteData(0x54); + SimLCD_WriteData(0XA9); + SimLCD_WriteData(0x43); + SimLCD_WriteData(0x0A); + SimLCD_WriteData(0x0F); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + + SimLCD_WriteCmd(0XE1); //Set Gamma + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x15); + SimLCD_WriteData(0x17); + SimLCD_WriteData(0x07); + SimLCD_WriteData(0x11); + SimLCD_WriteData(0x06); + SimLCD_WriteData(0x2B); + SimLCD_WriteData(0x56); + SimLCD_WriteData(0x3C); + SimLCD_WriteData(0x05); + SimLCD_WriteData(0x10); + SimLCD_WriteData(0x0F); + SimLCD_WriteData(0x3F); + SimLCD_WriteData(0x3F); + SimLCD_WriteData(0x0F); + + SimLCD_WriteCmd(0x2B); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x01); + SimLCD_WriteData(0x3f); + + SimLCD_WriteCmd(0x2A); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0xef); + + SimLCD_WriteCmd(0x11); //Exit Sleep + Delay_ms(120); + SimLCD_WriteCmd(0x29); //display on +} + +static void SimLCD6804_Init(void){ + SimLCD_WriteCmd(0X11); + Delay_ms(20); + + SimLCD_WriteCmd(0XD0);//VCI1 VCL VGH VGL DDVDH VREG1OUT power amplitude setting + SimLCD_WriteData(0X07); + SimLCD_WriteData(0X42); + SimLCD_WriteData(0X1D); + + SimLCD_WriteCmd(0XD1);//VCOMH VCOM_AC amplitude setting + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X1a); + SimLCD_WriteData(0X09); + + SimLCD_WriteCmd(0XD2);//Operational Amplifier Circuit Constant Current Adjust , charge pump frequency setting + SimLCD_WriteData(0X01); + SimLCD_WriteData(0X22); + + SimLCD_WriteCmd(0XC0);//REV SM GS + SimLCD_WriteData(0X10); + SimLCD_WriteData(0X3B); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X02); + SimLCD_WriteData(0X11); + + SimLCD_WriteCmd(0XC5);// Frame rate setting = 72HZ when setting 0x03 + SimLCD_WriteData(0X03); + + SimLCD_WriteCmd(0XC8);//Gamma setting + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X25); + SimLCD_WriteData(0X21); + SimLCD_WriteData(0X05); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X0a); + SimLCD_WriteData(0X65); + SimLCD_WriteData(0X25); + SimLCD_WriteData(0X77); + SimLCD_WriteData(0X50); + SimLCD_WriteData(0X0f); + SimLCD_WriteData(0X00); + + SimLCD_WriteCmd(0XF8); + SimLCD_WriteData(0X01); + + SimLCD_WriteCmd(0XFE); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X02); + + SimLCD_WriteCmd(0X20);//Exit invert mode + + SimLCD_WriteCmd(0X36); + SimLCD_WriteData(0X08);//原来是a + + SimLCD_WriteCmd(0X3A); + SimLCD_WriteData(0X55);//16位模式 + + SimLCD_WriteCmd(0X2B); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X01); + SimLCD_WriteData(0X3F); + + SimLCD_WriteCmd(0X2A); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X01); + SimLCD_WriteData(0XDF); + Delay_ms(120); + SimLCD_WriteCmd(0X29); +} +//初始化lcd +//该初始化函数可以初始化各种ILI93XX液晶,但是其他函数是基于ILI9320的!!! +//在其他型号的驱动芯片上没有测试! +/******************************************************* + CS： TFTLCD 片选信号。 + WR：向 TFTLCD 写入数据。 + RD：从 TFTLCD 读取数据。 + D[15:0]: 16 位双向数据线。 + RST：硬复位 TFTLCD。 + RS：命令/数据标志（ 0，读写命令； 1，读写数据） +*******************************************************/ +void SimLCD_Init(void) { + GPIO_InitTypeDef GPIO_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC,ENABLE); + // B6/B7/B8/B9 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOB,&GPIO_InitStructure); + + Simulation_CS(1);Simulation_RD(1);Simulation_WR(1);Simulation_RS(1); + + // 设置端口位输出模式 + Simulation_SetOut(); + + Delay_ms(50); + Delay_ms(50); + // 读到ID不正确,新增lcddev.id==0X9300判断，因为9341在未被复位的情况下会被读成9300 + if( (SimLCD.id<0XFF) || (SimLCD.id==0XFFFF) || (SimLCD.id==0X9300) ) + { + //尝试9341 ID的读取 + SimLCD_WriteCmd(0xD3); + SimLCD_ReadData(); //dummy read + SimLCD_ReadData(); //读到0X00 + SimLCD.id = ((SimLCD_ReadData()<<8)&0xff00);//读取93 + SimLCD.id |= (SimLCD_ReadData()&0x00ff); //读取41 + if(SimLCD.id!=0x9341) //非9341,尝试是不是6804 + { + SimLCD_WriteCmd(0xBF); + SimLCD_ReadData(); //dummy read + SimLCD_ReadData(); //读回0X01 + SimLCD.id = ((SimLCD_ReadData()<<8)&0xff00);//读取0X68 + SimLCD.id |= (SimLCD_ReadData()&0x00ff); //读取0X04 + } + if(SimLCD.id!=0x9341&&SimLCD.id!=0x6804) + SimLCD.id=0x9341;//新增，用于识别9341 + } + // 9341初始化 + if(SimLCD.id==0X9341) + SimLCD9341_Init(); + // 6804初始化 + else if(SimLCD.id==0x6804) + SimLCD6804_Init(); + + SimLCD_DisplayDir(0); // 默认为竖屏 + SimLCD_Clear(SimLCDColor_BLACK); +} + +#if 1 +void SimLCD_AllPic(uint16_t *PIC) { + uint32_t index=0; + uint32_t totalpoint=SimLCD.width; + totalpoint*=SimLCD.height; //得到总点数 + SimLCD_SetCursor(0x00,0x0000);//设置光标位置 + SimLCD_WriteRAMPrepare(); //开始写入GRAM + for(index=0;index < 320*480;index++) + SimLCD_WriteData(PIC[index]); +} +#endif + +//在指定区域内填充单个颜色 +//(sx,sy),(ex,ey):填充矩形对角坐标,区域大小为:(ex-sx+1)*(ey-sy+1) +//color:要填充的颜色 +void SimLCD_Fill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t color) { + uint16_t i,j; + uint16_t xlen=0; + xlen=ex-sx+1; + for(i=sy;i<=ey;i++) + { + SimLCD_SetCursor(sx,i); // 设置光标位置 + SimLCD_WriteRAMPrepare();// 开始写入GRAM + for(j = 0;j < xlen; j++) // 设置光标位置 + SimLCD_WriteData(color); + } +} +//在指定区域内填充指定颜色块 +//(sx,sy),(ex,ey):填充矩形对角坐标,区域大小为:(ex-sx+1)*(ey-sy+1) +//color:要填充的颜色 +void SimLCD_ColorFill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t *color) { + uint16_t height,width; + uint16_t i,j; + width=ex-sx+1; //得到填充的宽度 + height=ey-sy+1; //高度 + for(i = 0;i < height;i++) + { + SimLCD_SetCursor(sx,sy+i); //设置光标位置 + SimLCD_WriteRAMPrepare(); //开始写入GRAM + for(j = 0;j < width;j++) + SimLCD_WriteData(color[i*width+j]); + } +} +//画线 +//x1,y1:起点坐标 +//x2,y2:终点坐标 +void SimLCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { + uint16_t t = 0; + int xerr=0,yerr=0,delta_x,delta_y,distance; + int incx,incy,uRow,uCol; + delta_x=x2-x1; //计算坐标增量 + delta_y=y2-y1; + uRow=x1; + uCol=y1; + if(delta_x>0)incx=1; //设置单步方向 + else if(delta_x==0)incx=0;//垂直线 + else {incx=-1;delta_x=-delta_x;} + if(delta_y>0)incy=1; + else if(delta_y==0)incy=0;//水平线 + else{incy=-1;delta_y=-delta_y;} + if( delta_x>delta_y)distance=delta_x; //选取基本增量坐标轴 + else distance=delta_y; + for(t=0;t<=distance+1;t++ )//画线输出 + { + SimLCD_DrawPoint(uRow,uCol);//画点 + xerr+=delta_x; + yerr+=delta_y; + if(xerr>distance) + { + xerr-=distance; + uRow+=incx; + } + if(yerr>distance) + { + yerr-=distance; + uCol+=incy; + } + } +} +//画矩形 +//(x1,y1),(x2,y2):矩形的对角坐标 +void SimLCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { + SimLCD_DrawLine(x1,y1,x2,y1); + SimLCD_DrawLine(x1,y1,x1,y2); + SimLCD_DrawLine(x1,y2,x2,y2); + SimLCD_DrawLine(x2,y1,x2,y2); +} + +//在指定位置画一个指定大小的圆 +//(x,y):中心点 +//r :半径 +void SimLCD_DrawCircle(uint16_t x0,uint16_t y0,uint8_t r) { + int a = 0,b = 0; + int di = 0; + a = 0; b = r; + di = 3-(r<<1); //判断下个点位置的标志 + while(a <= b) + { + SimLCD_DrawPoint(x0+a,y0-b); //5 + SimLCD_DrawPoint(x0+b,y0-a); //0 + SimLCD_DrawPoint(x0+b,y0+a); //4 + SimLCD_DrawPoint(x0+a,y0+b); //6 + SimLCD_DrawPoint(x0-a,y0+b); //1 + SimLCD_DrawPoint(x0-b,y0+a); + SimLCD_DrawPoint(x0-a,y0-b); //2 + SimLCD_DrawPoint(x0-b,y0-a); //7 + a++; + + //使用Bresenham算法画圆 + if(di<0) di +=4*a+6; + else + { + di+=10+4*(a-b); + b--; + } + } +} + +#if 1 +//-在指定位置显示一个字符 +//-x,y:起始坐标 +//-num:要显示的字符:" "--->"~" +//-size:字体大小 12/16 这是字体的高度 +//-mode:叠加方式(1)还是非叠加方式(0) +void SimLCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint8_t mode) { + uint8_t temp = 0, t1 = 0, t = 0; + uint16_t y0 = y, colortemp = SimLCD_PointColor; + + // 设置窗口 + num=num-' '; //得到偏移后的值 + if(!mode) //非叠加方式 + { + for(t = 0;t < size;t++) + { + if(size==12) + temp=Simulation_Asc1206[num][t];//调用1206字体 + else + temp=Simulation_Asc1608[num][t];//调用1608字体 + + for(t1=0;t1<8;t1++) + { + if(temp&0x80) + SimLCD_PointColor = colortemp; + else + SimLCD_PointColor = SimLCD_BackColor; + + SimLCD_DrawPoint(x,y); + temp<<=1; + y++; + if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 + if((y-y0)==size) //--达到高度值 + { + y=y0; + x++; + if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 + break; + } + } + } + } + else//叠加方式 + { + for(t=0;t=SimLCD.height){SimLCD_PointColor=colortemp;return;}//超区域了 + if((y-y0)==size) + { + y=y0; + x++; + if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 + break; + } + } + } + } + SimLCD_PointColor = colortemp; +} +#endif +//m^n函数 +//返回值:m^n次方. +uint32_t SimLCD_Pow(uint8_t m,uint8_t n) { + uint32_t result = 1; + while(n--)result*=m; + return result; +} +/* 显示数字,高位为0,则不显示 + x,y :起点坐标 + len :数字的位数 + size:字体大小 + color:颜色 + num:数值(0~4294967295); +*/ +void SimLCD_ShowNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size) { + uint8_t t = 0, temp = 0, enshow = 0; + for(t = 0; t < len; t++) + { + temp=(num/SimLCD_Pow(10,len-t-1))%10; + if(enshow==0&&t<(len-1)) + { + if(temp==0) + { + SimLCD_ShowChar(x+(size/2)*t,y,' ',size,1); + continue; + } + else enshow=1; + + } + SimLCD_ShowChar(x+(size/2)*t,y,temp+'0',size,1); + } +} +/* 显示数字,高位为0,还是显示 + x,y:起点坐标 + num:数值(0~999999999); + len:长度(即要显示的位数) + size:字体大小 + mode: + [7]:0,不填充;1,填充0. + [6:1]:保留 + [0]:0,非叠加显示;1,叠加显示. +*/ +void SimLCD_ShowxNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size,uint8_t mode) { + uint8_t t = 0, temp = 0, enshow = 0; + for(t = 0;t < len; t++) + { + temp=(num/SimLCD_Pow(10,len-t-1))%10; + if(enshow==0&&t<(len-1)) + { + if(temp==0) + { + if(mode&0X80) + SimLCD_ShowChar(x+(size/2)*t,y,'0',size,mode&0X01); + else + SimLCD_ShowChar(x+(size/2)*t,y,' ',size,mode&0X01); + continue; + } + else + enshow=1; + } + SimLCD_ShowChar(x+(size/2)*t,y,temp+'0',size,mode&0X01); + } +} +/* 显示字符串 + x,y:起点坐标 + width,height:区域大小 + size:字体大小 + *p:字符串起始地址 +*/ +void SimLCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p) { + uint8_t x0 = x; + width+=x; + height+=y; + while((*p<='~')&&(*p>=' '))//判断是不是非法字符! + { + if(x>=width){x=x0;y+=size;} + if(y>=height)break;//退出 + SimLCD_ShowChar(x,y,*p,size,0); + x+=size/2; + p++; + } +} +void SimLCD_NewShowChar(uint16_t x, uint16_t y, uint16_t ziti){ + uint8_t temp = 0, t = 0, t1 = 0; + uint16_t y0 = y; + for(t = 0;t < 16;t++) + { + temp = Simulation_Asc1608[ziti][t];//调用1608字体 + + for(t1 = 0; t1 < 8; t1++) + { + if(temp&0x80) + SimLCD_PointColor = SimLCDColor_WHITE; + else + SimLCD_PointColor = SimLCDColor_BLACK; + SimLCD_DrawPoint(x, y); + temp<<=1; + y++; + if(x>=SimLCD.width){SimLCD_PointColor=SimLCDColor_WHITE;return;}//超区域了 + if((y-y0)==16) //--达到高度值 + { + y=y0; + x++; + if(x>=SimLCD.width){SimLCD_PointColor=SimLCDColor_WHITE;return;}//超区域了 + break; + } + } + } +} + +void SimLCD_NewShowNum32(uint16_t x, uint16_t y, uint16_t ziti){ + uint8_t temp = 0, t = 0, t1 = 0; + uint16_t y0 = y; + for(t = 0;t < 36;t++) + { + temp = Simulation_Asc3838[ziti][t]; + + for(t1 = 0; t1 < 8; t1++) + { + if(temp&0x80) + SimLCD_PointColor = SimLCDColor_WHITE; + else + SimLCD_PointColor = SimLCDColor_BLACK; + SimLCD_DrawPoint(x, y); + temp<<=1; + y++; + if((y-y0)==32) //--达到高度值 + { + y=y0; + x++; + break; + } + } + } +} + +// 写到LCD的PM2.5 +void SimLCD_ShowPM2_5(uint16_t x, uint16_t y, uint16_t ziti){ + uint8_t temp = 0, t = 0, t1 = 0; + uint16_t y0 = y; + for(t = 0;t < 36;t++) + { + temp = Simulation_Asc3636[ziti][t];//调用1608字体 + + for(t1 = 0; t1 < 8; t1++) + { + if(temp&0x80) + SimLCD_PointColor = SimLCDColor_WHITE; + else + SimLCD_PointColor = SimLCDColor_BLACK; + SimLCD_DrawPoint(x, y); + temp <<= 1; + y++; + if((y-y0)==24) //--达到高度值 + { + y=y0; + x++; + break; + } + } + } +} + +void SimLCD_Show_PM2_5(uint16_t x, uint16_t y) { + // P + SimLCD_ShowPM2_5( (x+0), y, 0); + // M + SimLCD_ShowPM2_5( (x+12), y, 1); + // 2 + SimLCD_ShowPM2_5( (x+24), y, 2); + // . + SimLCD_ShowPM2_5( (x+36), y, 3); + // 5 + SimLCD_ShowPM2_5( (x+48), y, 4); +} + +void SimLCD_Show_ug_m3(uint16_t x, uint16_t y) { + // u + SimLCD_NewShowChar( (x+0), y, 85); + // g + SimLCD_NewShowChar( (x+8), y, 71); + // / + SimLCD_NewShowChar( (x+16), y, 15); + // m + SimLCD_NewShowChar( (x+24), y, 77); + // 3 + SimLCD_NewShowChar( (x+32), y, 19); +} + +void SimLCD_Show_PM1_0(uint16_t x, uint16_t y) { + // P + SimLCD_NewShowChar( (x+0), y, 48); + // M + SimLCD_NewShowChar( (x+8), y, 45); + // 1 + SimLCD_NewShowChar( (x+16), y, 17); + // . + SimLCD_NewShowChar( (x+24), y, 14); + // 0 + SimLCD_NewShowChar( (x+32), y, 16); +} + +void SimLCD_Show_PM10(uint16_t x, uint16_t y) { + // P + SimLCD_NewShowChar( (x+0), y, 48); + // M + SimLCD_NewShowChar( (x+8), y, 45); + // 1 + SimLCD_NewShowChar( (x+16), y, 17); + // 0 + SimLCD_NewShowChar( (x+24), y, 16); +} + +//x0,y0:坐标 +//r半径 +//color:颜色 +void SimLCD_FillCircle(uint16_t x0,uint16_t y0,uint16_t r0) { + uint16_t x,y,r = r0; + for(y = y0 - r;y < y0 +r;y++) + { + for(x=x0 - r;x < x0+r;x++) + { + if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) <= r*r) + { + SimLCD_DrawPoint(x,y); + } + } + } +} +// 填充圆环 r0外圆 r1内圆 +void SimLCD_FillTorus(uint16_t x0,uint16_t y0,uint16_t r0,uint16_t r1) { + uint16_t x = 0,y = 0,r = r0; + + uint32_t area0 = 0,area1 = 0; + + if(r0 < r1) + return; + + area0 = r0 * r0; area1 = r1 * r1; + + for(y = y0 - r; y < y0+r; y++) + { + for(x=x0 - r; x < x0+r; x++) + { + // 外圆填充 + if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) <= area0) + { + // 内圆填充 + if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) > area1) + SimLCD_DrawPoint(x,y); + } + } + } +} + + + + + + diff --git a/firmware/stm32-esp/user/show/simulation_lcd.h b/firmware/stm32-esp/user/show/simulation_lcd.h new file mode 100644 index 00000000..36449217 --- /dev/null +++ b/firmware/stm32-esp/user/show/simulation_lcd.h @@ -0,0 +1,206 @@ +#ifndef _SIMULATION_LCD_H_ +#define _SIMULATION_LCD_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "stdlib.h" + +typedef struct +{ + uint16_t width; // LCD 宽度 + uint16_t height; // LCD 高度 + uint16_t id; // LCD ID + uint8_t dir; // 横屏还是竖屏控制：0，竖屏；1，横屏。 + + uint8_t wramcmd; // 开始写gram指令 + uint8_t setxcmd; // 设置x坐标指令 + uint8_t setycmd; // 设置y坐标指令 +}SimLCD_t; +extern SimLCD_t SimLCD; //管理LCD重要参数 + +//LCD的画笔颜色和背景色 +extern uint16_t SimLCD_PointColor;// 画笔颜色 +extern uint16_t SimLCD_BackColor;// 背景色 + +//扫描方向定义 +#define SimLCD_L2R_U2D 0 //从左到右,从上到下 +#define SimLCD_L2R_D2U 1 //从左到右,从下到上 +#define SimLCD_R2L_U2D 2 //从右到左,从上到下 +#define SimLCD_R2L_D2U 3 //从右到左,从下到上 + +#define SimLCD_U2D_L2R 4 //从上到下,从左到右 +#define SimLCD_U2D_R2L 5 //从上到下,从右到左 +#define SimLCD_D2U_L2R 6 //从下到上,从左到右 +#define SimLCD_D2U_R2L 7 //从下到上,从右到左 + +// 默认的扫描方向 +#define SimLCD_DefScanDir SimLCD_L2R_U2D + +void SimLCD_Init(void); +void SimLCD_Clear(uint16_t color); +void SimLCD_DrawPoint(uint16_t x, uint16_t y); +uint16_t SimLCD_ReadPoint(uint16_t x, uint16_t y); +void SimLCD_Fill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t color); +void SimLCD_ColorFill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t *color); +void SimLCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); +void SimLCD_DrawCircle(uint16_t x0,uint16_t y0,uint8_t r); +void SimLCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); +void SimLCD_ShowNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size); +void SimLCD_ShowxNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size,uint8_t mode); +void SimLCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p); + +void SimLCD_FillTorus(uint16_t x0,uint16_t y0,uint16_t r0,uint16_t r1); + +void SimLCD_Show_PM2_5(uint16_t x, uint16_t y); +void SimLCD_Show_ug_m3(uint16_t x, uint16_t y); +void SimLCD_Show_PM1_0(uint16_t x, uint16_t y); +void SimLCD_Show_PM10(uint16_t x, uint16_t y); + +void SimLCD_NewShowChar(uint16_t x, uint16_t y, uint16_t ziti); +void SimLCD_NewShowNum32(uint16_t x, uint16_t y, uint16_t ziti); + +//画笔颜色 +#define SimLCDColor_WHITE 0xFFFF +#define SimLCDColor_BLACK 0x0000 +#define SimLCDColor_BLUE 0x001F +#define SimLCDColor_BRED 0XF81F +#define SimLCDColor_GRED 0XFFE0 +#define SimLCDColor_GBLUE 0X07FF +#define SimLCDColor_RED 0xF800 +#define SimLCDColor_MAGENTA 0xF81F +#define SimLCDColor_GREEN 0x07E0 +#define SimLCDColor_CYAN 0x7FFF +#define SimLCDColor_YELLOW 0xFFE0 +#define SimLCDColor_BROWN 0XBC40 //棕色 +#define SimLCDColor_BRRED 0XFC07 //棕红色 +#define SimLCDColor_GRAY 0X8430 //灰色 +//GUI颜色 +#define SimLCDColor_DARKBLUE 0X01CF //深蓝色 +#define SimLCDColor_LIGHTBLUE 0X7D7C //浅蓝色 +#define SimLCDColor_GRAYBLUE 0X5458 //灰蓝色 +//以上三色为PANEL的颜色 +#define SimLCDColor_LIGHTGREEN 0X841F //浅绿色 +//#define SimLCDColor_LIGHTGRAY 0XEF5B //浅灰色(PANNEL) +#define SimLCDColor_LGRAY 0XC618 //浅灰色(PANNEL),窗体背景色 + +#define SimLCDColor_LGRAYBLUE 0XA651 //浅灰蓝色(中间层颜色) +#define SimLCDColor_LBBLUE 0X2B12 //浅棕蓝色(选择条目的反色) + +//9320/9325 LCD寄存器 +#define SimLCD_R0 0x00 +#define SimLCD_R1 0x01 +#define SimLCD_R2 0x02 +#define SimLCD_R3 0x03 +#define SimLCD_R4 0x04 +#define SimLCD_R5 0x05 +#define SimLCD_R6 0x06 +#define SimLCD_R7 0x07 +#define SimLCD_R8 0x08 +#define SimLCD_R9 0x09 +#define SimLCD_R10 0x0A +#define SimLCD_R12 0x0C +#define SimLCD_R13 0x0D +#define SimLCD_R14 0x0E +#define SimLCD_R15 0x0F +#define SimLCD_R16 0x10 +#define SimLCD_R17 0x11 +#define SimLCD_R18 0x12 +#define SimLCD_R19 0x13 +#define SimLCD_R20 0x14 +#define SimLCD_R21 0x15 +#define SimLCD_R22 0x16 +#define SimLCD_R23 0x17 +#define SimLCD_R24 0x18 +#define SimLCD_R25 0x19 +#define SimLCD_R26 0x1A +#define SimLCD_R27 0x1B +#define SimLCD_R28 0x1C +#define SimLCD_R29 0x1D +#define SimLCD_R30 0x1E +#define SimLCD_R31 0x1F +#define SimLCD_R32 0x20 +#define SimLCD_R33 0x21 +#define SimLCD_R34 0x22 +#define SimLCD_R36 0x24 +#define SimLCD_R37 0x25 +#define SimLCD_R40 0x28 +#define SimLCD_R41 0x29 +#define SimLCD_R43 0x2B +#define SimLCD_R45 0x2D +#define SimLCD_R48 0x30 +#define SimLCD_R49 0x31 +#define SimLCD_R50 0x32 +#define SimLCD_R51 0x33 +#define SimLCD_R52 0x34 +#define SimLCD_R53 0x35 +#define SimLCD_R54 0x36 +#define SimLCD_R55 0x37 +#define SimLCD_R56 0x38 +#define SimLCD_R57 0x39 +#define SimLCD_R59 0x3B +#define SimLCD_R60 0x3C +#define SimLCD_R61 0x3D +#define SimLCD_R62 0x3E +#define SimLCD_R63 0x3F +#define SimLCD_R64 0x40 +#define SimLCD_R65 0x41 +#define SimLCD_R66 0x42 +#define SimLCD_R67 0x43 +#define SimLCD_R68 0x44 +#define SimLCD_R69 0x45 +#define SimLCD_R70 0x46 +#define SimLCD_R71 0x47 +#define SimLCD_R72 0x48 +#define SimLCD_R73 0x49 +#define SimLCD_R74 0x4A +#define SimLCD_R75 0x4B +#define SimLCD_R76 0x4C +#define SimLCD_R77 0x4D +#define SimLCD_R78 0x4E +#define SimLCD_R79 0x4F +#define SimLCD_R80 0x50 +#define SimLCD_R81 0x51 +#define SimLCD_R82 0x52 +#define SimLCD_R83 0x53 +#define SimLCD_R96 0x60 +#define SimLCD_R97 0x61 +#define SimLCD_R106 0x6A +#define SimLCD_R118 0x76 +#define SimLCD_R128 0x80 +#define SimLCD_R129 0x81 +#define SimLCD_R130 0x82 +#define SimLCD_R131 0x83 +#define SimLCD_R132 0x84 +#define SimLCD_R133 0x85 +#define SimLCD_R134 0x86 +#define SimLCD_R135 0x87 +#define SimLCD_R136 0x88 +#define SimLCD_R137 0x89 +#define SimLCD_R139 0x8B +#define SimLCD_R140 0x8C +#define SimLCD_R141 0x8D +#define SimLCD_R143 0x8F +#define SimLCD_R144 0x90 +#define SimLCD_R145 0x91 +#define SimLCD_R146 0x92 +#define SimLCD_R147 0x93 +#define SimLCD_R148 0x94 +#define SimLCD_R149 0x95 +#define SimLCD_R150 0x96 +#define SimLCD_R151 0x97 +#define SimLCD_R152 0x98 +#define SimLCD_R153 0x99 +#define SimLCD_R154 0x9A +#define SimLCD_R157 0x9D +#define SimLCD_R192 0xC0 +#define SimLCD_R193 0xC1 +#define SimLCD_R229 0xE5 + +#endif + + + + + diff --git a/firmware/stm32-esp/user/show/stmflash.c b/firmware/stm32-esp/user/show/stmflash.c new file mode 100644 index 00000000..f9fb705c --- /dev/null +++ b/firmware/stm32-esp/user/show/stmflash.c @@ -0,0 +1,116 @@ +#include "stmflash.h" + +//读取指定地址的半字(16位数据) +//faddr:读地址(此地址必须为2的倍数!!) +//返回值:对应数据. +u16 STMFLASH_ReadHalfWord(u32 faddr) +{ + return *(vu16*)faddr; +} +#if STM32_FLASH_WREN //如果使能了写 +//不检查的写入 +//WriteAddr:起始地址 +//pBuffer:数据指针 +//NumToWrite:半字(16位)数 +void STMFLASH_Write_NoCheck(u32 WriteAddr,u16 *pBuffer,u16 NumToWrite) +{ + u16 i; + for(i=0;i=(STM32_FLASH_BASE+1024*STM32_FLASH_SIZE)))return;//非法地址 + FLASH_Unlock(); //解锁 + offaddr=WriteAddr-STM32_FLASH_BASE; //实际偏移地址. + secpos=offaddr/STM_SECTOR_SIZE; //扇区地址 0~127 for STM32F103RBT6 + secoff=(offaddr%STM_SECTOR_SIZE)/2; //在扇区内的偏移(2个字节为基本单位.) + secremain=STM_SECTOR_SIZE/2-secoff; //扇区剩余空间大小 + if(NumToWrite<=secremain)secremain=NumToWrite;//不大于该扇区范围 + while(1) + { + STMFLASH_Read(secpos*STM_SECTOR_SIZE+STM32_FLASH_BASE,STMFLASH_BUF,STM_SECTOR_SIZE/2);//读出整个扇区的内容 + for(i=0;i(STM_SECTOR_SIZE/2))secremain=STM_SECTOR_SIZE/2;//下一个扇区还是写不完 + else secremain=NumToWrite;//下一个扇区可以写完了 + } + }; + FLASH_Lock();//上锁 +} +#endif + +//从指定地址开始读出指定长度的数据 +//ReadAddr:起始地址 +//pBuffer:数据指针 +//NumToWrite:半字(16位)数 +void STMFLASH_Read(u32 ReadAddr,u16 *pBuffer,u16 NumToRead) +{ + u16 i; + for(i=0;i
© COPYRIGHT 2011 STMicroelectronics
+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_cec.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/user/stm32f10x_it.c b/firmware/stm32-esp/user/stm32f10x_it.c new file mode 100644 index 00000000..18acee17 --- /dev/null +++ b/firmware/stm32-esp/user/stm32f10x_it.c @@ -0,0 +1,160 @@ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and + * peripherals interrupt service routine. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_it.h" + +/** @addtogroup STM32F10x_StdPeriph_Template + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M3 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSVC exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ +} + +/******************************************************************************/ +/* STM32F10x Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f10x_xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles PPP interrupt request. + * @param None + * @retval None + */ +/*void PPP_IRQHandler(void) +{ +}*/ + +/** + * @} + */ + + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/user/stm32f10x_it.h b/firmware/stm32-esp/user/stm32f10x_it.h new file mode 100644 index 00000000..88902626 --- /dev/null +++ b/firmware/stm32-esp/user/stm32f10x_it.h @@ -0,0 +1,54 @@ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IT_H +#define __STM32F10x_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_IT_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ From 2365b8aab7c37c7deab649f7d97c6ff2c8cc20dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=9C=88=E6=98=8EL=E6=98=9F=E7=A8=80?= <1443685018@qq.com> Date: Wed, 1 Sep 2021 06:04:46 +0000 Subject: [PATCH 4/9] =?UTF-8?q?=E5=88=A0=E9=99=A4=E6=96=87=E4=BB=B6=20firm?= =?UTF-8?q?ware/stm32-esp/.keep?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- firmware/stm32-esp/.keep | 0 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 firmware/stm32-esp/.keep diff --git a/firmware/stm32-esp/.keep b/firmware/stm32-esp/.keep deleted file mode 100644 index e69de29b..00000000 From 5c972932692ff4f5ed6bad8c620537a7d121f0a3 Mon Sep 17 00:00:00 2001 From: yueming Date: Wed, 1 Sep 2021 18:05:49 +0800 Subject: [PATCH 5/9] =?UTF-8?q?=E9=85=8D=E7=BD=91=E9=83=A8=E5=88=86?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- firmware/stm32-esp/README.md | 10 + firmware/stm32-esp/libraries/cmsis/core_cm3.c | 1568 +- firmware/stm32-esp/libraries/cmsis/core_cm3.h | 3636 ++-- .../cmsis/startup/startup_stm32f10x_hd.s | 716 +- .../stm32-esp/libraries/cmsis/stm32f10x.h | 16672 ++++++++-------- .../libraries/cmsis/system_stm32f10x.c | 2188 +- .../libraries/cmsis/system_stm32f10x.h | 196 +- firmware/stm32-esp/libraries/fwlib/inc/misc.h | 440 +- .../libraries/fwlib/inc/stm32f10x_adc.h | 966 +- .../libraries/fwlib/inc/stm32f10x_bkp.h | 390 +- .../libraries/fwlib/inc/stm32f10x_can.h | 1394 +- .../libraries/fwlib/inc/stm32f10x_cec.h | 420 +- .../libraries/fwlib/inc/stm32f10x_crc.h | 188 +- .../libraries/fwlib/inc/stm32f10x_dac.h | 634 +- .../libraries/fwlib/inc/stm32f10x_dbgmcu.h | 238 +- .../libraries/fwlib/inc/stm32f10x_dma.h | 878 +- .../libraries/fwlib/inc/stm32f10x_exti.h | 368 +- .../libraries/fwlib/inc/stm32f10x_flash.h | 852 +- .../libraries/fwlib/inc/stm32f10x_fsmc.h | 1466 +- .../libraries/fwlib/inc/stm32f10x_gpio.h | 770 +- .../libraries/fwlib/inc/stm32f10x_i2c.h | 1368 +- .../libraries/fwlib/inc/stm32f10x_iwdg.h | 280 +- .../libraries/fwlib/inc/stm32f10x_pwr.h | 312 +- .../libraries/fwlib/inc/stm32f10x_rcc.h | 1454 +- .../libraries/fwlib/inc/stm32f10x_rtc.h | 270 +- .../libraries/fwlib/inc/stm32f10x_sdio.h | 1062 +- .../libraries/fwlib/inc/stm32f10x_spi.h | 974 +- .../libraries/fwlib/inc/stm32f10x_tim.h | 2328 +-- .../libraries/fwlib/inc/stm32f10x_usart.h | 824 +- .../libraries/fwlib/inc/stm32f10x_wwdg.h | 230 +- firmware/stm32-esp/libraries/fwlib/src/misc.c | 450 +- .../libraries/fwlib/src/stm32f10x_adc.c | 2614 +-- .../libraries/fwlib/src/stm32f10x_bkp.c | 616 +- .../libraries/fwlib/src/stm32f10x_can.c | 2830 +-- .../libraries/fwlib/src/stm32f10x_cec.c | 866 +- .../libraries/fwlib/src/stm32f10x_crc.c | 320 +- .../libraries/fwlib/src/stm32f10x_dac.c | 1142 +- .../libraries/fwlib/src/stm32f10x_dbgmcu.c | 324 +- .../libraries/fwlib/src/stm32f10x_dma.c | 1428 +- .../libraries/fwlib/src/stm32f10x_exti.c | 538 +- .../libraries/fwlib/src/stm32f10x_flash.c | 3368 ++-- .../libraries/fwlib/src/stm32f10x_fsmc.c | 1732 +- .../libraries/fwlib/src/stm32f10x_gpio.c | 1300 +- .../libraries/fwlib/src/stm32f10x_i2c.c | 2662 +-- .../libraries/fwlib/src/stm32f10x_iwdg.c | 380 +- .../libraries/fwlib/src/stm32f10x_pwr.c | 614 +- .../libraries/fwlib/src/stm32f10x_rcc.c | 2940 +-- .../libraries/fwlib/src/stm32f10x_rtc.c | 678 +- .../libraries/fwlib/src/stm32f10x_sdio.c | 1598 +- .../libraries/fwlib/src/stm32f10x_spi.c | 1816 +- .../libraries/fwlib/src/stm32f10x_tim.c | 5780 +++--- .../libraries/fwlib/src/stm32f10x_usart.c | 2116 +- .../libraries/fwlib/src/stm32f10x_wwdg.c | 448 +- firmware/stm32-esp/output/pro.hex | 3278 ++- .../stm32-esp/project/EventRecorderStub.scvd | 18 +- firmware/stm32-esp/project/pro.uvgui.LS-PC | 52 +- firmware/stm32-esp/project/pro.uvgui.RJYF-PC | 147 +- firmware/stm32-esp/project/pro.uvopt | 4 +- firmware/stm32-esp/user/com/uart1_receive.c | 80 +- firmware/stm32-esp/user/com/uart1_receive.h | 54 +- firmware/stm32-esp/user/com/uart2_receive.c | 162 +- firmware/stm32-esp/user/com/uart2_receive.h | 42 +- firmware/stm32-esp/user/com/uart3_receive.c | 56 +- firmware/stm32-esp/user/com/uart3_receive.h | 48 +- firmware/stm32-esp/user/data/basic_data.c | 36 +- firmware/stm32-esp/user/data/basic_data.h | 133 +- firmware/stm32-esp/user/drive/bsp_adc.c | 140 +- firmware/stm32-esp/user/drive/bsp_adc.h | 34 +- firmware/stm32-esp/user/drive/bsp_clock.c | 106 +- firmware/stm32-esp/user/drive/bsp_clock.h | 24 +- firmware/stm32-esp/user/drive/bsp_port.c | 148 +- firmware/stm32-esp/user/drive/bsp_port.h | 68 +- firmware/stm32-esp/user/drive/bsp_timer3.c | 246 +- firmware/stm32-esp/user/drive/bsp_timer3.h | 30 +- firmware/stm32-esp/user/drive/bsp_tool.c | 4 +- firmware/stm32-esp/user/drive/bsp_tool.h | 22 +- firmware/stm32-esp/user/drive/bsp_uart1.c | 214 +- firmware/stm32-esp/user/drive/bsp_uart1.h | 44 +- firmware/stm32-esp/user/drive/bsp_uart2.c | 222 +- firmware/stm32-esp/user/drive/bsp_uart2.h | 38 +- firmware/stm32-esp/user/drive/bsp_uart3.c | 218 +- firmware/stm32-esp/user/drive/bsp_uart3.h | 36 +- firmware/stm32-esp/user/main.c | 133 +- firmware/stm32-esp/user/main.h | 56 +- firmware/stm32-esp/user/show/battery.c | 440 +- firmware/stm32-esp/user/show/battery.h | 62 +- firmware/stm32-esp/user/show/dev_work.c | 254 +- firmware/stm32-esp/user/show/dev_work.h | 58 +- firmware/stm32-esp/user/show/esp8266_uart2.c | 506 +- firmware/stm32-esp/user/show/esp8266_uart2.h | 46 +- firmware/stm32-esp/user/show/esp8266_work.c | 567 +- firmware/stm32-esp/user/show/esp8266_work.h | 36 +- firmware/stm32-esp/user/show/pm_uart3.c | 392 +- firmware/stm32-esp/user/show/pm_uart3.h | 56 +- .../stm32-esp/user/show/simulation_font.h | 540 +- firmware/stm32-esp/user/show/simulation_lcd.c | 2314 +-- firmware/stm32-esp/user/show/simulation_lcd.h | 412 +- firmware/stm32-esp/user/show/stmflash.c | 232 +- firmware/stm32-esp/user/show/stmflash.h | 88 +- firmware/stm32-esp/user/stm32f10x_conf.h | 154 +- firmware/stm32-esp/user/stm32f10x_it.c | 320 +- firmware/stm32-esp/user/stm32f10x_it.h | 108 +- 102 files changed, 45984 insertions(+), 46146 deletions(-) create mode 100644 firmware/stm32-esp/README.md diff --git a/firmware/stm32-esp/README.md b/firmware/stm32-esp/README.md new file mode 100644 index 00000000..5bdfbe35 --- /dev/null +++ b/firmware/stm32-esp/README.md @@ -0,0 +1,10 @@ + +### 一、项目简介 + + +
+ +### 二、相关开发板 + +
+ \ No newline at end of file diff --git a/firmware/stm32-esp/libraries/cmsis/core_cm3.c b/firmware/stm32-esp/libraries/cmsis/core_cm3.c index fcff0d13..56fddc52 100644 --- a/firmware/stm32-esp/libraries/cmsis/core_cm3.c +++ b/firmware/stm32-esp/libraries/cmsis/core_cm3.c @@ -1,784 +1,784 @@ -/**************************************************************************//** - * @file core_cm3.c - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File - * @version V1.30 - * @date 30. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#include - -/* define compiler specific symbols */ -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -__ASM uint32_t __get_PSP(void) -{ - mrs r0, psp - bx lr -} - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -__ASM void __set_PSP(uint32_t topOfProcStack) -{ - msr psp, r0 - bx lr -} - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -__ASM uint32_t __get_MSP(void) -{ - mrs r0, msp - bx lr -} - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -__ASM void __set_MSP(uint32_t mainStackPointer) -{ - msr msp, r0 - bx lr -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -__ASM uint32_t __REV16(uint16_t value) -{ - rev16 r0, r0 - bx lr -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -__ASM int32_t __REVSH(int16_t value) -{ - revsh r0, r0 - bx lr -} - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -__ASM void __CLREX(void) -{ - clrex -} - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -__ASM uint32_t __get_BASEPRI(void) -{ - mrs r0, basepri - bx lr -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -__ASM void __set_BASEPRI(uint32_t basePri) -{ - msr basepri, r0 - bx lr -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -__ASM uint32_t __get_PRIMASK(void) -{ - mrs r0, primask - bx lr -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -__ASM void __set_PRIMASK(uint32_t priMask) -{ - msr primask, r0 - bx lr -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -__ASM uint32_t __get_FAULTMASK(void) -{ - mrs r0, faultmask - bx lr -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -__ASM void __set_FAULTMASK(uint32_t faultMask) -{ - msr faultmask, r0 - bx lr -} - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -__ASM uint32_t __get_CONTROL(void) -{ - mrs r0, control - bx lr -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -__ASM void __set_CONTROL(uint32_t control) -{ - msr control, r0 - bx lr -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ -#pragma diag_suppress=Pe940 - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) -{ - __ASM("mrs r0, psp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM("msr psp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) -{ - __ASM("mrs r0, msp"); - __ASM("bx lr"); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM("msr msp, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - __ASM("rev16 r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - __ASM("rbit r0, r0"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit values) - */ -uint8_t __LDREXB(uint8_t *addr) -{ - __ASM("ldrexb r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -uint16_t __LDREXH(uint16_t *addr) -{ - __ASM("ldrexh r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -uint32_t __LDREXW(uint32_t *addr) -{ - __ASM("ldrex r0, [r0]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - __ASM("strexb r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - __ASM("strexh r0, r0, [r1]"); - __ASM("bx lr"); -} - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - __ASM("strex r0, r0, [r1]"); - __ASM("bx lr"); -} - -#pragma diag_default=Pe940 - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -uint32_t __get_PSP(void) __attribute__( ( naked ) ); -uint32_t __get_PSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, psp\n\t" - "MOV r0, %0 \n\t" - "BX lr \n\t" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); -void __set_PSP(uint32_t topOfProcStack) -{ - __ASM volatile ("MSR psp, %0\n\t" - "BX lr \n\t" : : "r" (topOfProcStack) ); -} - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -uint32_t __get_MSP(void) __attribute__( ( naked ) ); -uint32_t __get_MSP(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, msp\n\t" - "MOV r0, %0 \n\t" - "BX lr \n\t" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); -void __set_MSP(uint32_t topOfMainStack) -{ - __ASM volatile ("MSR msp, %0\n\t" - "BX lr \n\t" : : "r" (topOfMainStack) ); -} - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -uint32_t __get_BASEPRI(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -void __set_BASEPRI(uint32_t value) -{ - __ASM volatile ("MSR basepri, %0" : : "r" (value) ); -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -uint32_t __get_PRIMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, primask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -void __set_PRIMASK(uint32_t priMask) -{ - __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -uint32_t __get_FAULTMASK(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -void __set_FAULTMASK(uint32_t faultMask) -{ - __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); -} - -/** - * @brief Return the Control Register value -* -* @return Control value - * - * Return the content of the control register - */ -uint32_t __get_CONTROL(void) -{ - uint32_t result=0; - - __ASM volatile ("MRS %0, control" : "=r" (result) ); - return(result); -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -void __set_CONTROL(uint32_t control) -{ - __ASM volatile ("MSR control, %0" : : "r" (control) ); -} - - -/** - * @brief Reverse byte order in integer value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in integer value - */ -uint32_t __REV(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -uint32_t __REV16(uint16_t value) -{ - uint32_t result=0; - - __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -int32_t __REVSH(int16_t value) -{ - uint32_t result=0; - - __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -uint32_t __RBIT(uint32_t value) -{ - uint32_t result=0; - - __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); - return(result); -} - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit value - */ -uint8_t __LDREXB(uint8_t *addr) -{ - uint8_t result=0; - - __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -uint16_t __LDREXH(uint16_t *addr) -{ - uint16_t result=0; - - __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -uint32_t __LDREXW(uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); - return(result); -} - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -uint32_t __STREXB(uint8_t value, uint8_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -uint32_t __STREXH(uint16_t value, uint16_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -uint32_t __STREXW(uint32_t value, uint32_t *addr) -{ - uint32_t result=0; - - __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); - return(result); -} - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif +/**************************************************************************//** + * @file core_cm3.c + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File + * @version V1.30 + * @date 30. October 2009 + * + * @note + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * @par + * ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * @par + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + +#include + +/* define compiler specific symbols */ +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + +/* ################### Compiler specific Intrinsics ########################### */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +__ASM uint32_t __get_PSP(void) +{ + mrs r0, psp + bx lr +} + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +__ASM void __set_PSP(uint32_t topOfProcStack) +{ + msr psp, r0 + bx lr +} + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +__ASM uint32_t __get_MSP(void) +{ + mrs r0, msp + bx lr +} + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +__ASM void __set_MSP(uint32_t mainStackPointer) +{ + msr msp, r0 + bx lr +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +__ASM uint32_t __REV16(uint16_t value) +{ + rev16 r0, r0 + bx lr +} + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +__ASM int32_t __REVSH(int16_t value) +{ + revsh r0, r0 + bx lr +} + + +#if (__ARMCC_VERSION < 400000) + +/** + * @brief Remove the exclusive lock created by ldrex + * + * Removes the exclusive lock which is created by ldrex. + */ +__ASM void __CLREX(void) +{ + clrex +} + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +__ASM uint32_t __get_BASEPRI(void) +{ + mrs r0, basepri + bx lr +} + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +__ASM void __set_BASEPRI(uint32_t basePri) +{ + msr basepri, r0 + bx lr +} + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +__ASM uint32_t __get_PRIMASK(void) +{ + mrs r0, primask + bx lr +} + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +__ASM void __set_PRIMASK(uint32_t priMask) +{ + msr primask, r0 + bx lr +} + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +__ASM uint32_t __get_FAULTMASK(void) +{ + mrs r0, faultmask + bx lr +} + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +__ASM void __set_FAULTMASK(uint32_t faultMask) +{ + msr faultmask, r0 + bx lr +} + +/** + * @brief Return the Control Register value + * + * @return Control value + * + * Return the content of the control register + */ +__ASM uint32_t __get_CONTROL(void) +{ + mrs r0, control + bx lr +} + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +__ASM void __set_CONTROL(uint32_t control) +{ + msr control, r0 + bx lr +} + +#endif /* __ARMCC_VERSION */ + + + +#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ +#pragma diag_suppress=Pe940 + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +uint32_t __get_PSP(void) +{ + __ASM("mrs r0, psp"); + __ASM("bx lr"); +} + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +void __set_PSP(uint32_t topOfProcStack) +{ + __ASM("msr psp, r0"); + __ASM("bx lr"); +} + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +uint32_t __get_MSP(void) +{ + __ASM("mrs r0, msp"); + __ASM("bx lr"); +} + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +void __set_MSP(uint32_t topOfMainStack) +{ + __ASM("msr msp, r0"); + __ASM("bx lr"); +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +uint32_t __REV16(uint16_t value) +{ + __ASM("rev16 r0, r0"); + __ASM("bx lr"); +} + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +uint32_t __RBIT(uint32_t value) +{ + __ASM("rbit r0, r0"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit values) + */ +uint8_t __LDREXB(uint8_t *addr) +{ + __ASM("ldrexb r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +uint16_t __LDREXH(uint16_t *addr) +{ + __ASM("ldrexh r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +uint32_t __LDREXW(uint32_t *addr) +{ + __ASM("ldrex r0, [r0]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +uint32_t __STREXB(uint8_t value, uint8_t *addr) +{ + __ASM("strexb r0, r0, [r1]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +uint32_t __STREXH(uint16_t value, uint16_t *addr) +{ + __ASM("strexh r0, r0, [r1]"); + __ASM("bx lr"); +} + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +uint32_t __STREXW(uint32_t value, uint32_t *addr) +{ + __ASM("strex r0, r0, [r1]"); + __ASM("bx lr"); +} + +#pragma diag_default=Pe940 + + +#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +uint32_t __get_PSP(void) __attribute__( ( naked ) ); +uint32_t __get_PSP(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, psp\n\t" + "MOV r0, %0 \n\t" + "BX lr \n\t" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) ); +void __set_PSP(uint32_t topOfProcStack) +{ + __ASM volatile ("MSR psp, %0\n\t" + "BX lr \n\t" : : "r" (topOfProcStack) ); +} + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +uint32_t __get_MSP(void) __attribute__( ( naked ) ); +uint32_t __get_MSP(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, msp\n\t" + "MOV r0, %0 \n\t" + "BX lr \n\t" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +void __set_MSP(uint32_t topOfMainStack) __attribute__( ( naked ) ); +void __set_MSP(uint32_t topOfMainStack) +{ + __ASM volatile ("MSR msp, %0\n\t" + "BX lr \n\t" : : "r" (topOfMainStack) ); +} + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +uint32_t __get_BASEPRI(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, basepri_max" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +void __set_BASEPRI(uint32_t value) +{ + __ASM volatile ("MSR basepri, %0" : : "r" (value) ); +} + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +uint32_t __get_PRIMASK(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, primask" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +void __set_PRIMASK(uint32_t priMask) +{ + __ASM volatile ("MSR primask, %0" : : "r" (priMask) ); +} + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +uint32_t __get_FAULTMASK(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +void __set_FAULTMASK(uint32_t faultMask) +{ + __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) ); +} + +/** + * @brief Return the Control Register value +* +* @return Control value + * + * Return the content of the control register + */ +uint32_t __get_CONTROL(void) +{ + uint32_t result=0; + + __ASM volatile ("MRS %0, control" : "=r" (result) ); + return(result); +} + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +void __set_CONTROL(uint32_t control) +{ + __ASM volatile ("MSR control, %0" : : "r" (control) ); +} + + +/** + * @brief Reverse byte order in integer value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in integer value + */ +uint32_t __REV(uint32_t value) +{ + uint32_t result=0; + + __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +uint32_t __REV16(uint16_t value) +{ + uint32_t result=0; + + __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +int32_t __REVSH(int16_t value) +{ + uint32_t result=0; + + __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +uint32_t __RBIT(uint32_t value) +{ + uint32_t result=0; + + __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); + return(result); +} + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit value + */ +uint8_t __LDREXB(uint8_t *addr) +{ + uint8_t result=0; + + __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +uint16_t __LDREXH(uint16_t *addr) +{ + uint16_t result=0; + + __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +uint32_t __LDREXW(uint32_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) ); + return(result); +} + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +uint32_t __STREXB(uint8_t value, uint8_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +uint32_t __STREXH(uint16_t value, uint16_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +uint32_t __STREXW(uint32_t value, uint32_t *addr) +{ + uint32_t result=0; + + __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) ); + return(result); +} + + +#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ +/* TASKING carm specific functions */ + +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all instrinsics, + * Including the CMSIS ones. + */ + +#endif diff --git a/firmware/stm32-esp/libraries/cmsis/core_cm3.h b/firmware/stm32-esp/libraries/cmsis/core_cm3.h index 7ab7b4b4..2b6b51a7 100644 --- a/firmware/stm32-esp/libraries/cmsis/core_cm3.h +++ b/firmware/stm32-esp/libraries/cmsis/core_cm3.h @@ -1,1818 +1,1818 @@ -/**************************************************************************//** - * @file core_cm3.h - * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File - * @version V1.30 - * @date 30. October 2009 - * - * @note - * Copyright (C) 2009 ARM Limited. All rights reserved. - * - * @par - * ARM Limited (ARM) is supplying this software for use with Cortex-M - * processor based microcontrollers. This file can be freely distributed - * within development tools that are supporting such ARM based processors. - * - * @par - * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED - * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. - * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR - * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. - * - ******************************************************************************/ - -#ifndef __CM3_CORE_H__ -#define __CM3_CORE_H__ - -/** @addtogroup CMSIS_CM3_core_LintCinfiguration CMSIS CM3 Core Lint Configuration - * - * List of Lint messages which will be suppressed and not shown: - * - Error 10: \n - * register uint32_t __regBasePri __asm("basepri"); \n - * Error 10: Expecting ';' - * . - * - Error 530: \n - * return(__regBasePri); \n - * Warning 530: Symbol '__regBasePri' (line 264) not initialized - * . - * - Error 550: \n - * __regBasePri = (basePri & 0x1ff); \n - * Warning 550: Symbol '__regBasePri' (line 271) not accessed - * . - * - Error 754: \n - * uint32_t RESERVED0[24]; \n - * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced - * . - * - Error 750: \n - * #define __CM3_CORE_H__ \n - * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced - * . - * - Error 528: \n - * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n - * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced - * . - * - Error 751: \n - * } InterruptType_Type; \n - * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced - * . - * Note: To re-enable a Message, insert a space before 'lint' * - * - */ - -/*lint -save */ -/*lint -e10 */ -/*lint -e530 */ -/*lint -e550 */ -/*lint -e754 */ -/*lint -e750 */ -/*lint -e528 */ -/*lint -e751 */ - - -/** @addtogroup CMSIS_CM3_core_definitions CM3 Core Definitions - This file defines all structures and symbols for CMSIS core: - - CMSIS version number - - Cortex-M core registers and bitfields - - Cortex-M core peripheral base address - @{ - */ - -#ifdef __cplusplus - extern "C" { -#endif - -#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ -#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ -#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ - -#define __CORTEX_M (0x03) /*!< Cortex core */ - -#include /* Include standard types */ - -#if defined (__ICCARM__) - #include /* IAR Intrinsics */ -#endif - - -#ifndef __NVIC_PRIO_BITS - #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ -#endif - - - - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ - -#ifdef __cplusplus - #define __I volatile /*!< defines 'read only' permissions */ -#else - #define __I volatile const /*!< defines 'read only' permissions */ -#endif -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - - - -/******************************************************************************* - * Register Abstraction - ******************************************************************************/ -/** @addtogroup CMSIS_CM3_core_register CMSIS CM3 Core Register - @{ -*/ - - -/** @addtogroup CMSIS_CM3_NVIC CMSIS CM3 NVIC - memory mapped structure for Nested Vectored Interrupt Controller (NVIC) - @{ - */ -typedef struct -{ - __IO uint32_t ISER[8]; /*!< Offset: 0x000 Interrupt Set Enable Register */ - uint32_t RESERVED0[24]; - __IO uint32_t ICER[8]; /*!< Offset: 0x080 Interrupt Clear Enable Register */ - uint32_t RSERVED1[24]; - __IO uint32_t ISPR[8]; /*!< Offset: 0x100 Interrupt Set Pending Register */ - uint32_t RESERVED2[24]; - __IO uint32_t ICPR[8]; /*!< Offset: 0x180 Interrupt Clear Pending Register */ - uint32_t RESERVED3[24]; - __IO uint32_t IABR[8]; /*!< Offset: 0x200 Interrupt Active bit Register */ - uint32_t RESERVED4[56]; - __IO uint8_t IP[240]; /*!< Offset: 0x300 Interrupt Priority Register (8Bit wide) */ - uint32_t RESERVED5[644]; - __O uint32_t STIR; /*!< Offset: 0xE00 Software Trigger Interrupt Register */ -} NVIC_Type; -/*@}*/ /* end of group CMSIS_CM3_NVIC */ - - -/** @addtogroup CMSIS_CM3_SCB CMSIS CM3 SCB - memory mapped structure for System Control Block (SCB) - @{ - */ -typedef struct -{ - __I uint32_t CPUID; /*!< Offset: 0x00 CPU ID Base Register */ - __IO uint32_t ICSR; /*!< Offset: 0x04 Interrupt Control State Register */ - __IO uint32_t VTOR; /*!< Offset: 0x08 Vector Table Offset Register */ - __IO uint32_t AIRCR; /*!< Offset: 0x0C Application Interrupt / Reset Control Register */ - __IO uint32_t SCR; /*!< Offset: 0x10 System Control Register */ - __IO uint32_t CCR; /*!< Offset: 0x14 Configuration Control Register */ - __IO uint8_t SHP[12]; /*!< Offset: 0x18 System Handlers Priority Registers (4-7, 8-11, 12-15) */ - __IO uint32_t SHCSR; /*!< Offset: 0x24 System Handler Control and State Register */ - __IO uint32_t CFSR; /*!< Offset: 0x28 Configurable Fault Status Register */ - __IO uint32_t HFSR; /*!< Offset: 0x2C Hard Fault Status Register */ - __IO uint32_t DFSR; /*!< Offset: 0x30 Debug Fault Status Register */ - __IO uint32_t MMFAR; /*!< Offset: 0x34 Mem Manage Address Register */ - __IO uint32_t BFAR; /*!< Offset: 0x38 Bus Fault Address Register */ - __IO uint32_t AFSR; /*!< Offset: 0x3C Auxiliary Fault Status Register */ - __I uint32_t PFR[2]; /*!< Offset: 0x40 Processor Feature Register */ - __I uint32_t DFR; /*!< Offset: 0x48 Debug Feature Register */ - __I uint32_t ADR; /*!< Offset: 0x4C Auxiliary Feature Register */ - __I uint32_t MMFR[4]; /*!< Offset: 0x50 Memory Model Feature Register */ - __I uint32_t ISAR[5]; /*!< Offset: 0x60 ISA Feature Register */ -} SCB_Type; - -/* SCB CPUID Register Definitions */ -#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */ -#define SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ - -#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */ -#define SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ - -#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */ -#define SCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ - -#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */ -#define SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */ -#define SCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ - -#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */ -#define SCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ - -#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */ -#define SCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ - -#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */ -#define SCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ - -#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */ -#define SCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ - -#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */ -#define SCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ - -#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */ -#define SCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ - -#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */ -#define SCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ - -#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */ -#define SCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ - -#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */ -#define SCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */ - -/* SCB Interrupt Control State Register Definitions */ -#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */ -#define SCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ - -#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */ -#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ - -/* SCB Application Interrupt and Reset Control Register Definitions */ -#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */ -#define SCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ - -#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */ -#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ - -#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */ -#define SCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ - -#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */ -#define SCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ - -#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */ -#define SCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ - -#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */ -#define SCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ - -#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */ -#define SCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */ - -/* SCB System Control Register Definitions */ -#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */ -#define SCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ - -#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */ -#define SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ - -#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */ -#define SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ - -/* SCB Configuration Control Register Definitions */ -#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ -#define SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ - -#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */ -#define SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ - -#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */ -#define SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ - -#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ -#define SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ - -#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */ -#define SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ - -#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */ -#define SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */ - -/* SCB System Handler Control and State Register Definitions */ -#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */ -#define SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ - -#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */ -#define SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ - -#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */ -#define SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ - -#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */ -#define SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ - -#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */ -#define SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ - -#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */ -#define SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ - -#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */ -#define SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ - -#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */ -#define SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ - -#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */ -#define SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ - -#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */ -#define SCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ - -#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */ -#define SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ - -#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */ -#define SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ - -#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */ -#define SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ - -#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */ -#define SCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */ - -/* SCB Configurable Fault Status Registers Definitions */ -#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */ -#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ - -#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */ -#define SCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ - -#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */ -#define SCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ - -/* SCB Hard Fault Status Registers Definitions */ -#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */ -#define SCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ - -#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */ -#define SCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ - -#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */ -#define SCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ - -/* SCB Debug Fault Status Register Definitions */ -#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */ -#define SCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ - -#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */ -#define SCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ - -#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */ -#define SCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ - -#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */ -#define SCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ - -#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */ -#define SCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */ -/*@}*/ /* end of group CMSIS_CM3_SCB */ - - -/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick - memory mapped structure for SysTick - @{ - */ -typedef struct -{ - __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */ - __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */ - __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */ - __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */ -} SysTick_Type; - -/* SysTick Control / Status Register Definitions */ -#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */ -#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ - -#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */ -#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ - -#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */ -#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ - -#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */ -#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */ - -/* SysTick Reload Register Definitions */ -#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */ -#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */ - -/* SysTick Current Register Definitions */ -#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */ -#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */ - -/* SysTick Calibration Register Definitions */ -#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */ -#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ - -#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */ -#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ - -#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */ -#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */ -/*@}*/ /* end of group CMSIS_CM3_SysTick */ - - -/** @addtogroup CMSIS_CM3_ITM CMSIS CM3 ITM - memory mapped structure for Instrumentation Trace Macrocell (ITM) - @{ - */ -typedef struct -{ - __O union - { - __O uint8_t u8; /*!< Offset: ITM Stimulus Port 8-bit */ - __O uint16_t u16; /*!< Offset: ITM Stimulus Port 16-bit */ - __O uint32_t u32; /*!< Offset: ITM Stimulus Port 32-bit */ - } PORT [32]; /*!< Offset: 0x00 ITM Stimulus Port Registers */ - uint32_t RESERVED0[864]; - __IO uint32_t TER; /*!< Offset: ITM Trace Enable Register */ - uint32_t RESERVED1[15]; - __IO uint32_t TPR; /*!< Offset: ITM Trace Privilege Register */ - uint32_t RESERVED2[15]; - __IO uint32_t TCR; /*!< Offset: ITM Trace Control Register */ - uint32_t RESERVED3[29]; - __IO uint32_t IWR; /*!< Offset: ITM Integration Write Register */ - __IO uint32_t IRR; /*!< Offset: ITM Integration Read Register */ - __IO uint32_t IMCR; /*!< Offset: ITM Integration Mode Control Register */ - uint32_t RESERVED4[43]; - __IO uint32_t LAR; /*!< Offset: ITM Lock Access Register */ - __IO uint32_t LSR; /*!< Offset: ITM Lock Status Register */ - uint32_t RESERVED5[6]; - __I uint32_t PID4; /*!< Offset: ITM Peripheral Identification Register #4 */ - __I uint32_t PID5; /*!< Offset: ITM Peripheral Identification Register #5 */ - __I uint32_t PID6; /*!< Offset: ITM Peripheral Identification Register #6 */ - __I uint32_t PID7; /*!< Offset: ITM Peripheral Identification Register #7 */ - __I uint32_t PID0; /*!< Offset: ITM Peripheral Identification Register #0 */ - __I uint32_t PID1; /*!< Offset: ITM Peripheral Identification Register #1 */ - __I uint32_t PID2; /*!< Offset: ITM Peripheral Identification Register #2 */ - __I uint32_t PID3; /*!< Offset: ITM Peripheral Identification Register #3 */ - __I uint32_t CID0; /*!< Offset: ITM Component Identification Register #0 */ - __I uint32_t CID1; /*!< Offset: ITM Component Identification Register #1 */ - __I uint32_t CID2; /*!< Offset: ITM Component Identification Register #2 */ - __I uint32_t CID3; /*!< Offset: ITM Component Identification Register #3 */ -} ITM_Type; - -/* ITM Trace Privilege Register Definitions */ -#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */ -#define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */ - -/* ITM Trace Control Register Definitions */ -#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */ -#define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ - -#define ITM_TCR_ATBID_Pos 16 /*!< ITM TCR: ATBID Position */ -#define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) /*!< ITM TCR: ATBID Mask */ - -#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */ -#define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ - -#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */ -#define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ - -#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */ -#define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ - -#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */ -#define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ - -#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */ -#define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ - -#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */ -#define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */ - -/* ITM Integration Write Register Definitions */ -#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */ -#define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */ - -/* ITM Integration Read Register Definitions */ -#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */ -#define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */ - -/* ITM Integration Mode Control Register Definitions */ -#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */ -#define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */ - -/* ITM Lock Status Register Definitions */ -#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */ -#define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ - -#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */ -#define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ - -#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */ -#define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */ -/*@}*/ /* end of group CMSIS_CM3_ITM */ - - -/** @addtogroup CMSIS_CM3_InterruptType CMSIS CM3 Interrupt Type - memory mapped structure for Interrupt Type - @{ - */ -typedef struct -{ - uint32_t RESERVED0; - __I uint32_t ICTR; /*!< Offset: 0x04 Interrupt Control Type Register */ -#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) - __IO uint32_t ACTLR; /*!< Offset: 0x08 Auxiliary Control Register */ -#else - uint32_t RESERVED1; -#endif -} InterruptType_Type; - -/* Interrupt Controller Type Register Definitions */ -#define InterruptType_ICTR_INTLINESNUM_Pos 0 /*!< InterruptType ICTR: INTLINESNUM Position */ -#define InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos) /*!< InterruptType ICTR: INTLINESNUM Mask */ - -/* Auxiliary Control Register Definitions */ -#define InterruptType_ACTLR_DISFOLD_Pos 2 /*!< InterruptType ACTLR: DISFOLD Position */ -#define InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos) /*!< InterruptType ACTLR: DISFOLD Mask */ - -#define InterruptType_ACTLR_DISDEFWBUF_Pos 1 /*!< InterruptType ACTLR: DISDEFWBUF Position */ -#define InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos) /*!< InterruptType ACTLR: DISDEFWBUF Mask */ - -#define InterruptType_ACTLR_DISMCYCINT_Pos 0 /*!< InterruptType ACTLR: DISMCYCINT Position */ -#define InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos) /*!< InterruptType ACTLR: DISMCYCINT Mask */ -/*@}*/ /* end of group CMSIS_CM3_InterruptType */ - - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) -/** @addtogroup CMSIS_CM3_MPU CMSIS CM3 MPU - memory mapped structure for Memory Protection Unit (MPU) - @{ - */ -typedef struct -{ - __I uint32_t TYPE; /*!< Offset: 0x00 MPU Type Register */ - __IO uint32_t CTRL; /*!< Offset: 0x04 MPU Control Register */ - __IO uint32_t RNR; /*!< Offset: 0x08 MPU Region RNRber Register */ - __IO uint32_t RBAR; /*!< Offset: 0x0C MPU Region Base Address Register */ - __IO uint32_t RASR; /*!< Offset: 0x10 MPU Region Attribute and Size Register */ - __IO uint32_t RBAR_A1; /*!< Offset: 0x14 MPU Alias 1 Region Base Address Register */ - __IO uint32_t RASR_A1; /*!< Offset: 0x18 MPU Alias 1 Region Attribute and Size Register */ - __IO uint32_t RBAR_A2; /*!< Offset: 0x1C MPU Alias 2 Region Base Address Register */ - __IO uint32_t RASR_A2; /*!< Offset: 0x20 MPU Alias 2 Region Attribute and Size Register */ - __IO uint32_t RBAR_A3; /*!< Offset: 0x24 MPU Alias 3 Region Base Address Register */ - __IO uint32_t RASR_A3; /*!< Offset: 0x28 MPU Alias 3 Region Attribute and Size Register */ -} MPU_Type; - -/* MPU Type Register */ -#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */ -#define MPU_TYPE_IREGION_Msk (0xFFul << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ - -#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */ -#define MPU_TYPE_DREGION_Msk (0xFFul << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ - -#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */ -#define MPU_TYPE_SEPARATE_Msk (1ul << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */ - -/* MPU Control Register */ -#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */ -#define MPU_CTRL_PRIVDEFENA_Msk (1ul << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ - -#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */ -#define MPU_CTRL_HFNMIENA_Msk (1ul << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ - -#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */ -#define MPU_CTRL_ENABLE_Msk (1ul << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */ - -/* MPU Region Number Register */ -#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */ -#define MPU_RNR_REGION_Msk (0xFFul << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */ - -/* MPU Region Base Address Register */ -#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */ -#define MPU_RBAR_ADDR_Msk (0x7FFFFFFul << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ - -#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */ -#define MPU_RBAR_VALID_Msk (1ul << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ - -#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */ -#define MPU_RBAR_REGION_Msk (0xFul << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */ - -/* MPU Region Attribute and Size Register */ -#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: XN Position */ -#define MPU_RASR_XN_Msk (1ul << MPU_RASR_XN_Pos) /*!< MPU RASR: XN Mask */ - -#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: AP Position */ -#define MPU_RASR_AP_Msk (7ul << MPU_RASR_AP_Pos) /*!< MPU RASR: AP Mask */ - -#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: TEX Position */ -#define MPU_RASR_TEX_Msk (7ul << MPU_RASR_TEX_Pos) /*!< MPU RASR: TEX Mask */ - -#define MPU_RASR_S_Pos 18 /*!< MPU RASR: Shareable bit Position */ -#define MPU_RASR_S_Msk (1ul << MPU_RASR_S_Pos) /*!< MPU RASR: Shareable bit Mask */ - -#define MPU_RASR_C_Pos 17 /*!< MPU RASR: Cacheable bit Position */ -#define MPU_RASR_C_Msk (1ul << MPU_RASR_C_Pos) /*!< MPU RASR: Cacheable bit Mask */ - -#define MPU_RASR_B_Pos 16 /*!< MPU RASR: Bufferable bit Position */ -#define MPU_RASR_B_Msk (1ul << MPU_RASR_B_Pos) /*!< MPU RASR: Bufferable bit Mask */ - -#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */ -#define MPU_RASR_SRD_Msk (0xFFul << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ - -#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */ -#define MPU_RASR_SIZE_Msk (0x1Ful << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ - -#define MPU_RASR_ENA_Pos 0 /*!< MPU RASR: Region enable bit Position */ -#define MPU_RASR_ENA_Msk (0x1Ful << MPU_RASR_ENA_Pos) /*!< MPU RASR: Region enable bit Disable Mask */ - -/*@}*/ /* end of group CMSIS_CM3_MPU */ -#endif - - -/** @addtogroup CMSIS_CM3_CoreDebug CMSIS CM3 Core Debug - memory mapped structure for Core Debug Register - @{ - */ -typedef struct -{ - __IO uint32_t DHCSR; /*!< Offset: 0x00 Debug Halting Control and Status Register */ - __O uint32_t DCRSR; /*!< Offset: 0x04 Debug Core Register Selector Register */ - __IO uint32_t DCRDR; /*!< Offset: 0x08 Debug Core Register Data Register */ - __IO uint32_t DEMCR; /*!< Offset: 0x0C Debug Exception and Monitor Control Register */ -} CoreDebug_Type; - -/* Debug Halting Control and Status Register */ -#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */ -#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ - -#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */ -#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ - -#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ -#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ - -#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */ -#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ - -#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */ -#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ - -#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */ -#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ - -#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */ -#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ - -#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ -#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ - -#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */ -#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ - -#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */ -#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ - -#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */ -#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ - -#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */ -#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ - -/* Debug Core Register Selector Register */ -#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */ -#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ - -#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */ -#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */ - -/* Debug Exception and Monitor Control Register */ -#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */ -#define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ - -#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */ -#define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ - -#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */ -#define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ - -#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */ -#define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ - -#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */ -#define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ - -#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */ -#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ - -#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */ -#define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ - -#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */ -#define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ - -#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */ -#define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ - -#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */ -#define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ - -#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */ -#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ - -#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */ -#define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ - -#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */ -#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ -/*@}*/ /* end of group CMSIS_CM3_CoreDebug */ - - -/* Memory mapping of Cortex-M3 Hardware */ -#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ -#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ -#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ -#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ -#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ -#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ - -#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ -#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ -#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ -#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ -#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ -#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ - -#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) - #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ - #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_register */ - - -/******************************************************************************* - * Hardware Abstraction Layer - ******************************************************************************/ - -#if defined ( __CC_ARM ) - #define __ASM __asm /*!< asm keyword for ARM Compiler */ - #define __INLINE __inline /*!< inline keyword for ARM Compiler */ - -#elif defined ( __ICCARM__ ) - #define __ASM __asm /*!< asm keyword for IAR Compiler */ - #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ - -#elif defined ( __GNUC__ ) - #define __ASM __asm /*!< asm keyword for GNU Compiler */ - #define __INLINE inline /*!< inline keyword for GNU Compiler */ - -#elif defined ( __TASKING__ ) - #define __ASM __asm /*!< asm keyword for TASKING Compiler */ - #define __INLINE inline /*!< inline keyword for TASKING Compiler */ - -#endif - - -/* ################### Compiler specific Intrinsics ########################### */ - -#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ -/* ARM armcc specific functions */ - -#define __enable_fault_irq __enable_fiq -#define __disable_fault_irq __disable_fiq - -#define __NOP __nop -#define __WFI __wfi -#define __WFE __wfe -#define __SEV __sev -#define __ISB() __isb(0) -#define __DSB() __dsb(0) -#define __DMB() __dmb(0) -#define __REV __rev -#define __RBIT __rbit -#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) -#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) -#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) -#define __STREXB(value, ptr) __strex(value, ptr) -#define __STREXH(value, ptr) __strex(value, ptr) -#define __STREXW(value, ptr) __strex(value, ptr) - - -/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ -/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ -/* intrinsic void __enable_irq(); */ -/* intrinsic void __disable_irq(); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - - -#if (__ARMCC_VERSION < 400000) - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -extern void __CLREX(void); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -#else /* (__ARMCC_VERSION >= 400000) */ - -/** - * @brief Remove the exclusive lock created by ldrex - * - * Removes the exclusive lock which is created by ldrex. - */ -#define __CLREX __clrex - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -static __INLINE uint32_t __get_BASEPRI(void) -{ - register uint32_t __regBasePri __ASM("basepri"); - return(__regBasePri); -} - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -static __INLINE void __set_BASEPRI(uint32_t basePri) -{ - register uint32_t __regBasePri __ASM("basepri"); - __regBasePri = (basePri & 0xff); -} - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -static __INLINE uint32_t __get_PRIMASK(void) -{ - register uint32_t __regPriMask __ASM("primask"); - return(__regPriMask); -} - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -static __INLINE void __set_PRIMASK(uint32_t priMask) -{ - register uint32_t __regPriMask __ASM("primask"); - __regPriMask = (priMask); -} - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -static __INLINE uint32_t __get_FAULTMASK(void) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - return(__regFaultMask); -} - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -static __INLINE void __set_FAULTMASK(uint32_t faultMask) -{ - register uint32_t __regFaultMask __ASM("faultmask"); - __regFaultMask = (faultMask & 1); -} - -/** - * @brief Return the Control Register value - * - * @return Control value - * - * Return the content of the control register - */ -static __INLINE uint32_t __get_CONTROL(void) -{ - register uint32_t __regControl __ASM("control"); - return(__regControl); -} - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -static __INLINE void __set_CONTROL(uint32_t control) -{ - register uint32_t __regControl __ASM("control"); - __regControl = control; -} - -#endif /* __ARMCC_VERSION */ - - - -#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ -/* IAR iccarm specific functions */ - -#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ -#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ - -static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } - -#define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ -static __INLINE void __WFI() { __ASM ("wfi"); } -static __INLINE void __WFE() { __ASM ("wfe"); } -static __INLINE void __SEV() { __ASM ("sev"); } -static __INLINE void __CLREX() { __ASM ("clrex"); } - -/* intrinsic void __ISB(void) */ -/* intrinsic void __DSB(void) */ -/* intrinsic void __DMB(void) */ -/* intrinsic void __set_PRIMASK(); */ -/* intrinsic void __get_PRIMASK(); */ -/* intrinsic void __set_FAULTMASK(); */ -/* intrinsic void __get_FAULTMASK(); */ -/* intrinsic uint32_t __REV(uint32_t value); */ -/* intrinsic uint32_t __REVSH(uint32_t value); */ -/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ -/* intrinsic unsigned long __LDREX(unsigned long *); */ - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit values) - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - - -#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ -/* GNU gcc specific functions */ - -static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } -static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } - -static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } -static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } - -static __INLINE void __NOP() { __ASM volatile ("nop"); } -static __INLINE void __WFI() { __ASM volatile ("wfi"); } -static __INLINE void __WFE() { __ASM volatile ("wfe"); } -static __INLINE void __SEV() { __ASM volatile ("sev"); } -static __INLINE void __ISB() { __ASM volatile ("isb"); } -static __INLINE void __DSB() { __ASM volatile ("dsb"); } -static __INLINE void __DMB() { __ASM volatile ("dmb"); } -static __INLINE void __CLREX() { __ASM volatile ("clrex"); } - - -/** - * @brief Return the Process Stack Pointer - * - * @return ProcessStackPointer - * - * Return the actual process stack pointer - */ -extern uint32_t __get_PSP(void); - -/** - * @brief Set the Process Stack Pointer - * - * @param topOfProcStack Process Stack Pointer - * - * Assign the value ProcessStackPointer to the MSP - * (process stack pointer) Cortex processor register - */ -extern void __set_PSP(uint32_t topOfProcStack); - -/** - * @brief Return the Main Stack Pointer - * - * @return Main Stack Pointer - * - * Return the current value of the MSP (main stack pointer) - * Cortex processor register - */ -extern uint32_t __get_MSP(void); - -/** - * @brief Set the Main Stack Pointer - * - * @param topOfMainStack Main Stack Pointer - * - * Assign the value mainStackPointer to the MSP - * (main stack pointer) Cortex processor register - */ -extern void __set_MSP(uint32_t topOfMainStack); - -/** - * @brief Return the Base Priority value - * - * @return BasePriority - * - * Return the content of the base priority register - */ -extern uint32_t __get_BASEPRI(void); - -/** - * @brief Set the Base Priority value - * - * @param basePri BasePriority - * - * Set the base priority register - */ -extern void __set_BASEPRI(uint32_t basePri); - -/** - * @brief Return the Priority Mask value - * - * @return PriMask - * - * Return state of the priority mask bit from the priority mask register - */ -extern uint32_t __get_PRIMASK(void); - -/** - * @brief Set the Priority Mask value - * - * @param priMask PriMask - * - * Set the priority mask bit in the priority mask register - */ -extern void __set_PRIMASK(uint32_t priMask); - -/** - * @brief Return the Fault Mask value - * - * @return FaultMask - * - * Return the content of the fault mask register - */ -extern uint32_t __get_FAULTMASK(void); - -/** - * @brief Set the Fault Mask value - * - * @param faultMask faultMask value - * - * Set the fault mask register - */ -extern void __set_FAULTMASK(uint32_t faultMask); - -/** - * @brief Return the Control Register value -* -* @return Control value - * - * Return the content of the control register - */ -extern uint32_t __get_CONTROL(void); - -/** - * @brief Set the Control Register value - * - * @param control Control value - * - * Set the control register - */ -extern void __set_CONTROL(uint32_t control); - -/** - * @brief Reverse byte order in integer value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in integer value - */ -extern uint32_t __REV(uint32_t value); - -/** - * @brief Reverse byte order in unsigned short value - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in unsigned short value - */ -extern uint32_t __REV16(uint16_t value); - -/** - * @brief Reverse byte order in signed short value with sign extension to integer - * - * @param value value to reverse - * @return reversed value - * - * Reverse byte order in signed short value with sign extension to integer - */ -extern int32_t __REVSH(int16_t value); - -/** - * @brief Reverse bit order of value - * - * @param value value to reverse - * @return reversed value - * - * Reverse bit order of value - */ -extern uint32_t __RBIT(uint32_t value); - -/** - * @brief LDR Exclusive (8 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 8 bit value - */ -extern uint8_t __LDREXB(uint8_t *addr); - -/** - * @brief LDR Exclusive (16 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 16 bit values - */ -extern uint16_t __LDREXH(uint16_t *addr); - -/** - * @brief LDR Exclusive (32 bit) - * - * @param *addr address pointer - * @return value of (*address) - * - * Exclusive LDR command for 32 bit values - */ -extern uint32_t __LDREXW(uint32_t *addr); - -/** - * @brief STR Exclusive (8 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 8 bit values - */ -extern uint32_t __STREXB(uint8_t value, uint8_t *addr); - -/** - * @brief STR Exclusive (16 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 16 bit values - */ -extern uint32_t __STREXH(uint16_t value, uint16_t *addr); - -/** - * @brief STR Exclusive (32 bit) - * - * @param value value to store - * @param *addr address pointer - * @return successful / failed - * - * Exclusive STR command for 32 bit values - */ -extern uint32_t __STREXW(uint32_t value, uint32_t *addr); - - -#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ -/* TASKING carm specific functions */ - -/* - * The CMSIS functions have been implemented as intrinsics in the compiler. - * Please use "carm -?i" to get an up to date list of all instrinsics, - * Including the CMSIS ones. - */ - -#endif - - -/** @addtogroup CMSIS_CM3_Core_FunctionInterface CMSIS CM3 Core Function Interface - Core Function Interface containing: - - Core NVIC Functions - - Core SysTick Functions - - Core Reset Functions -*/ -/*@{*/ - -/* ########################## NVIC functions #################################### */ - -/** - * @brief Set the Priority Grouping in NVIC Interrupt Controller - * - * @param PriorityGroup is priority grouping field - * - * Set the priority grouping field using the required unlock sequence. - * The parameter priority_grouping is assigned to the field - * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. - */ -static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) -{ - uint32_t reg_value; - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - - reg_value = SCB->AIRCR; /* read old register configuration */ - reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ - reg_value = (reg_value | - (0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ - SCB->AIRCR = reg_value; -} - -/** - * @brief Get the Priority Grouping from NVIC Interrupt Controller - * - * @return priority grouping field - * - * Get the priority grouping from NVIC Interrupt Controller. - * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. - */ -static __INLINE uint32_t NVIC_GetPriorityGrouping(void) -{ - return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */ -} - -/** - * @brief Enable Interrupt in NVIC Interrupt Controller - * - * @param IRQn The positive number of the external interrupt to enable - * - * Enable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) -{ - NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ -} - -/** - * @brief Disable the interrupt line for external interrupt specified - * - * @param IRQn The positive number of the external interrupt to disable - * - * Disable a device specific interupt in the NVIC interrupt controller. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) -{ - NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ -} - -/** - * @brief Read the interrupt pending bit for a device specific interrupt source - * - * @param IRQn The number of the device specifc interrupt - * @return 1 = interrupt pending, 0 = interrupt not pending - * - * Read the pending register in NVIC and return 1 if its status is pending, - * otherwise it returns 0 - */ -static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) -{ - return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ -} - -/** - * @brief Set the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for set pending - * - * Set the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ -} - -/** - * @brief Clear the pending bit for an external interrupt - * - * @param IRQn The number of the interrupt for clear pending - * - * Clear the pending bit for the specified interrupt. - * The interrupt number cannot be a negative value. - */ -static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) -{ - NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ -} - -/** - * @brief Read the active bit for an external interrupt - * - * @param IRQn The number of the interrupt for read active bit - * @return 1 = interrupt active, 0 = interrupt not active - * - * Read the active register in NVIC and returns 1 if its status is active, - * otherwise it returns 0. - */ -static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) -{ - return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ -} - -/** - * @brief Set the priority for an interrupt - * - * @param IRQn The number of the interrupt for set priority - * @param priority The priority to set - * - * Set the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) -{ - if(IRQn < 0) { - SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ - else { - NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ -} - -/** - * @brief Read the priority for an interrupt - * - * @param IRQn The number of the interrupt for get priority - * @return The priority for the interrupt - * - * Read the priority for the specified interrupt. The interrupt - * number can be positive to specify an external (device specific) - * interrupt, or negative to specify an internal (core) interrupt. - * - * The returned priority value is automatically aligned to the implemented - * priority bits of the microcontroller. - * - * Note: The priority cannot be set for every core interrupt. - */ -static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) -{ - - if(IRQn < 0) { - return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ - else { - return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ -} - - -/** - * @brief Encode the priority for an interrupt - * - * @param PriorityGroup The used priority group - * @param PreemptPriority The preemptive priority value (starting from 0) - * @param SubPriority The sub priority value (starting from 0) - * @return The encoded priority for the interrupt - * - * Encode the priority for an interrupt with the given priority group, - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The returned priority value can be used for NVIC_SetPriority(...) function - */ -static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - return ( - ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | - ((SubPriority & ((1 << (SubPriorityBits )) - 1))) - ); -} - - -/** - * @brief Decode the priority of an interrupt - * - * @param Priority The priority for the interrupt - * @param PriorityGroup The used priority group - * @param pPreemptPriority The preemptive priority value (starting from 0) - * @param pSubPriority The sub priority value (starting from 0) - * - * Decode an interrupt priority value with the given priority group to - * preemptive priority value and sub priority value. - * In case of a conflict between priority grouping and available - * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. - * - * The priority value can be retrieved with NVIC_GetPriority(...) function - */ -static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) -{ - uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ - uint32_t PreemptPriorityBits; - uint32_t SubPriorityBits; - - PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; - SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; - - *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); - *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); -} - - - -/* ################################## SysTick function ############################################ */ - -#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) - -/** - * @brief Initialize and start the SysTick counter and its interrupt. - * - * @param ticks number of ticks between two interrupts - * @return 1 = failed, 0 = successful - * - * Initialise the system tick timer and its interrupt and start the - * system tick timer / counter in free running mode to generate - * periodical interrupts. - */ -static __INLINE uint32_t SysTick_Config(uint32_t ticks) -{ - if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */ - - SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */ - NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ - SysTick->VAL = 0; /* Load the SysTick Counter Value */ - SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - SysTick_CTRL_TICKINT_Msk | - SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ - return (0); /* Function successful */ -} - -#endif - - - - -/* ################################## Reset function ############################################ */ - -/** - * @brief Initiate a system reset request. - * - * Initiate a system reset request to reset the MCU - */ -static __INLINE void NVIC_SystemReset(void) -{ - SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | - (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | - SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */ - __DSB(); /* Ensure completion of memory access */ - while(1); /* wait until reset */ -} - -/*@}*/ /* end of group CMSIS_CM3_Core_FunctionInterface */ - - - -/* ##################################### Debug In/Output function ########################################### */ - -/** @addtogroup CMSIS_CM3_CoreDebugInterface CMSIS CM3 Core Debug Interface - Core Debug Interface containing: - - Core Debug Receive / Transmit Functions - - Core Debug Defines - - Core Debug Variables -*/ -/*@{*/ - -extern volatile int ITM_RxBuffer; /*!< variable to receive characters */ -#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */ - - -/** - * @brief Outputs a character via the ITM channel 0 - * - * @param ch character to output - * @return character to output - * - * The function outputs a character via the ITM channel 0. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE uint32_t ITM_SendChar (uint32_t ch) -{ - if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */ - (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ - (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ - { - while (ITM->PORT[0].u32 == 0); - ITM->PORT[0].u8 = (uint8_t) ch; - } - return (ch); -} - - -/** - * @brief Inputs a character via variable ITM_RxBuffer - * - * @return received character, -1 = no character received - * - * The function inputs a character via variable ITM_RxBuffer. - * The function returns when no debugger is connected that has booked the output. - * It is blocking when a debugger is connected, but the previous character send is not transmitted. - */ -static __INLINE int ITM_ReceiveChar (void) { - int ch = -1; /* no character available */ - - if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { - ch = ITM_RxBuffer; - ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ - } - - return (ch); -} - - -/** - * @brief Check if a character via variable ITM_RxBuffer is available - * - * @return 1 = character available, 0 = no character available - * - * The function checks variable ITM_RxBuffer whether a character is available or not. - * The function returns '1' if a character is available and '0' if no character is available. - */ -static __INLINE int ITM_CheckChar (void) { - - if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { - return (0); /* no character available */ - } else { - return (1); /* character available */ - } -} - -/*@}*/ /* end of group CMSIS_CM3_core_DebugInterface */ - - -#ifdef __cplusplus -} -#endif - -/*@}*/ /* end of group CMSIS_CM3_core_definitions */ - -#endif /* __CM3_CORE_H__ */ - -/*lint -restore */ +/**************************************************************************//** + * @file core_cm3.h + * @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File + * @version V1.30 + * @date 30. October 2009 + * + * @note + * Copyright (C) 2009 ARM Limited. All rights reserved. + * + * @par + * ARM Limited (ARM) is supplying this software for use with Cortex-M + * processor based microcontrollers. This file can be freely distributed + * within development tools that are supporting such ARM based processors. + * + * @par + * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED + * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. + * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR + * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. + * + ******************************************************************************/ + +#ifndef __CM3_CORE_H__ +#define __CM3_CORE_H__ + +/** @addtogroup CMSIS_CM3_core_LintCinfiguration CMSIS CM3 Core Lint Configuration + * + * List of Lint messages which will be suppressed and not shown: + * - Error 10: \n + * register uint32_t __regBasePri __asm("basepri"); \n + * Error 10: Expecting ';' + * . + * - Error 530: \n + * return(__regBasePri); \n + * Warning 530: Symbol '__regBasePri' (line 264) not initialized + * . + * - Error 550: \n + * __regBasePri = (basePri & 0x1ff); \n + * Warning 550: Symbol '__regBasePri' (line 271) not accessed + * . + * - Error 754: \n + * uint32_t RESERVED0[24]; \n + * Info 754: local structure member '' (line 109, file ./cm3_core.h) not referenced + * . + * - Error 750: \n + * #define __CM3_CORE_H__ \n + * Info 750: local macro '__CM3_CORE_H__' (line 43, file./cm3_core.h) not referenced + * . + * - Error 528: \n + * static __INLINE void NVIC_DisableIRQ(uint32_t IRQn) \n + * Warning 528: Symbol 'NVIC_DisableIRQ(unsigned int)' (line 419, file ./cm3_core.h) not referenced + * . + * - Error 751: \n + * } InterruptType_Type; \n + * Info 751: local typedef 'InterruptType_Type' (line 170, file ./cm3_core.h) not referenced + * . + * Note: To re-enable a Message, insert a space before 'lint' * + * + */ + +/*lint -save */ +/*lint -e10 */ +/*lint -e530 */ +/*lint -e550 */ +/*lint -e754 */ +/*lint -e750 */ +/*lint -e528 */ +/*lint -e751 */ + + +/** @addtogroup CMSIS_CM3_core_definitions CM3 Core Definitions + This file defines all structures and symbols for CMSIS core: + - CMSIS version number + - Cortex-M core registers and bitfields + - Cortex-M core peripheral base address + @{ + */ + +#ifdef __cplusplus + extern "C" { +#endif + +#define __CM3_CMSIS_VERSION_MAIN (0x01) /*!< [31:16] CMSIS HAL main version */ +#define __CM3_CMSIS_VERSION_SUB (0x30) /*!< [15:0] CMSIS HAL sub version */ +#define __CM3_CMSIS_VERSION ((__CM3_CMSIS_VERSION_MAIN << 16) | __CM3_CMSIS_VERSION_SUB) /*!< CMSIS HAL version number */ + +#define __CORTEX_M (0x03) /*!< Cortex core */ + +#include /* Include standard types */ + +#if defined (__ICCARM__) + #include /* IAR Intrinsics */ +#endif + + +#ifndef __NVIC_PRIO_BITS + #define __NVIC_PRIO_BITS 4 /*!< standard definition for NVIC Priority Bits */ +#endif + + + + +/** + * IO definitions + * + * define access restrictions to peripheral registers + */ + +#ifdef __cplusplus + #define __I volatile /*!< defines 'read only' permissions */ +#else + #define __I volatile const /*!< defines 'read only' permissions */ +#endif +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + + + +/******************************************************************************* + * Register Abstraction + ******************************************************************************/ +/** @addtogroup CMSIS_CM3_core_register CMSIS CM3 Core Register + @{ +*/ + + +/** @addtogroup CMSIS_CM3_NVIC CMSIS CM3 NVIC + memory mapped structure for Nested Vectored Interrupt Controller (NVIC) + @{ + */ +typedef struct +{ + __IO uint32_t ISER[8]; /*!< Offset: 0x000 Interrupt Set Enable Register */ + uint32_t RESERVED0[24]; + __IO uint32_t ICER[8]; /*!< Offset: 0x080 Interrupt Clear Enable Register */ + uint32_t RSERVED1[24]; + __IO uint32_t ISPR[8]; /*!< Offset: 0x100 Interrupt Set Pending Register */ + uint32_t RESERVED2[24]; + __IO uint32_t ICPR[8]; /*!< Offset: 0x180 Interrupt Clear Pending Register */ + uint32_t RESERVED3[24]; + __IO uint32_t IABR[8]; /*!< Offset: 0x200 Interrupt Active bit Register */ + uint32_t RESERVED4[56]; + __IO uint8_t IP[240]; /*!< Offset: 0x300 Interrupt Priority Register (8Bit wide) */ + uint32_t RESERVED5[644]; + __O uint32_t STIR; /*!< Offset: 0xE00 Software Trigger Interrupt Register */ +} NVIC_Type; +/*@}*/ /* end of group CMSIS_CM3_NVIC */ + + +/** @addtogroup CMSIS_CM3_SCB CMSIS CM3 SCB + memory mapped structure for System Control Block (SCB) + @{ + */ +typedef struct +{ + __I uint32_t CPUID; /*!< Offset: 0x00 CPU ID Base Register */ + __IO uint32_t ICSR; /*!< Offset: 0x04 Interrupt Control State Register */ + __IO uint32_t VTOR; /*!< Offset: 0x08 Vector Table Offset Register */ + __IO uint32_t AIRCR; /*!< Offset: 0x0C Application Interrupt / Reset Control Register */ + __IO uint32_t SCR; /*!< Offset: 0x10 System Control Register */ + __IO uint32_t CCR; /*!< Offset: 0x14 Configuration Control Register */ + __IO uint8_t SHP[12]; /*!< Offset: 0x18 System Handlers Priority Registers (4-7, 8-11, 12-15) */ + __IO uint32_t SHCSR; /*!< Offset: 0x24 System Handler Control and State Register */ + __IO uint32_t CFSR; /*!< Offset: 0x28 Configurable Fault Status Register */ + __IO uint32_t HFSR; /*!< Offset: 0x2C Hard Fault Status Register */ + __IO uint32_t DFSR; /*!< Offset: 0x30 Debug Fault Status Register */ + __IO uint32_t MMFAR; /*!< Offset: 0x34 Mem Manage Address Register */ + __IO uint32_t BFAR; /*!< Offset: 0x38 Bus Fault Address Register */ + __IO uint32_t AFSR; /*!< Offset: 0x3C Auxiliary Fault Status Register */ + __I uint32_t PFR[2]; /*!< Offset: 0x40 Processor Feature Register */ + __I uint32_t DFR; /*!< Offset: 0x48 Debug Feature Register */ + __I uint32_t ADR; /*!< Offset: 0x4C Auxiliary Feature Register */ + __I uint32_t MMFR[4]; /*!< Offset: 0x50 Memory Model Feature Register */ + __I uint32_t ISAR[5]; /*!< Offset: 0x60 ISA Feature Register */ +} SCB_Type; + +/* SCB CPUID Register Definitions */ +#define SCB_CPUID_IMPLEMENTER_Pos 24 /*!< SCB CPUID: IMPLEMENTER Position */ +#define SCB_CPUID_IMPLEMENTER_Msk (0xFFul << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB CPUID: IMPLEMENTER Mask */ + +#define SCB_CPUID_VARIANT_Pos 20 /*!< SCB CPUID: VARIANT Position */ +#define SCB_CPUID_VARIANT_Msk (0xFul << SCB_CPUID_VARIANT_Pos) /*!< SCB CPUID: VARIANT Mask */ + +#define SCB_CPUID_PARTNO_Pos 4 /*!< SCB CPUID: PARTNO Position */ +#define SCB_CPUID_PARTNO_Msk (0xFFFul << SCB_CPUID_PARTNO_Pos) /*!< SCB CPUID: PARTNO Mask */ + +#define SCB_CPUID_REVISION_Pos 0 /*!< SCB CPUID: REVISION Position */ +#define SCB_CPUID_REVISION_Msk (0xFul << SCB_CPUID_REVISION_Pos) /*!< SCB CPUID: REVISION Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_ICSR_NMIPENDSET_Pos 31 /*!< SCB ICSR: NMIPENDSET Position */ +#define SCB_ICSR_NMIPENDSET_Msk (1ul << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB ICSR: NMIPENDSET Mask */ + +#define SCB_ICSR_PENDSVSET_Pos 28 /*!< SCB ICSR: PENDSVSET Position */ +#define SCB_ICSR_PENDSVSET_Msk (1ul << SCB_ICSR_PENDSVSET_Pos) /*!< SCB ICSR: PENDSVSET Mask */ + +#define SCB_ICSR_PENDSVCLR_Pos 27 /*!< SCB ICSR: PENDSVCLR Position */ +#define SCB_ICSR_PENDSVCLR_Msk (1ul << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB ICSR: PENDSVCLR Mask */ + +#define SCB_ICSR_PENDSTSET_Pos 26 /*!< SCB ICSR: PENDSTSET Position */ +#define SCB_ICSR_PENDSTSET_Msk (1ul << SCB_ICSR_PENDSTSET_Pos) /*!< SCB ICSR: PENDSTSET Mask */ + +#define SCB_ICSR_PENDSTCLR_Pos 25 /*!< SCB ICSR: PENDSTCLR Position */ +#define SCB_ICSR_PENDSTCLR_Msk (1ul << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB ICSR: PENDSTCLR Mask */ + +#define SCB_ICSR_ISRPREEMPT_Pos 23 /*!< SCB ICSR: ISRPREEMPT Position */ +#define SCB_ICSR_ISRPREEMPT_Msk (1ul << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB ICSR: ISRPREEMPT Mask */ + +#define SCB_ICSR_ISRPENDING_Pos 22 /*!< SCB ICSR: ISRPENDING Position */ +#define SCB_ICSR_ISRPENDING_Msk (1ul << SCB_ICSR_ISRPENDING_Pos) /*!< SCB ICSR: ISRPENDING Mask */ + +#define SCB_ICSR_VECTPENDING_Pos 12 /*!< SCB ICSR: VECTPENDING Position */ +#define SCB_ICSR_VECTPENDING_Msk (0x1FFul << SCB_ICSR_VECTPENDING_Pos) /*!< SCB ICSR: VECTPENDING Mask */ + +#define SCB_ICSR_RETTOBASE_Pos 11 /*!< SCB ICSR: RETTOBASE Position */ +#define SCB_ICSR_RETTOBASE_Msk (1ul << SCB_ICSR_RETTOBASE_Pos) /*!< SCB ICSR: RETTOBASE Mask */ + +#define SCB_ICSR_VECTACTIVE_Pos 0 /*!< SCB ICSR: VECTACTIVE Position */ +#define SCB_ICSR_VECTACTIVE_Msk (0x1FFul << SCB_ICSR_VECTACTIVE_Pos) /*!< SCB ICSR: VECTACTIVE Mask */ + +/* SCB Interrupt Control State Register Definitions */ +#define SCB_VTOR_TBLBASE_Pos 29 /*!< SCB VTOR: TBLBASE Position */ +#define SCB_VTOR_TBLBASE_Msk (0x1FFul << SCB_VTOR_TBLBASE_Pos) /*!< SCB VTOR: TBLBASE Mask */ + +#define SCB_VTOR_TBLOFF_Pos 7 /*!< SCB VTOR: TBLOFF Position */ +#define SCB_VTOR_TBLOFF_Msk (0x3FFFFFul << SCB_VTOR_TBLOFF_Pos) /*!< SCB VTOR: TBLOFF Mask */ + +/* SCB Application Interrupt and Reset Control Register Definitions */ +#define SCB_AIRCR_VECTKEY_Pos 16 /*!< SCB AIRCR: VECTKEY Position */ +#define SCB_AIRCR_VECTKEY_Msk (0xFFFFul << SCB_AIRCR_VECTKEY_Pos) /*!< SCB AIRCR: VECTKEY Mask */ + +#define SCB_AIRCR_VECTKEYSTAT_Pos 16 /*!< SCB AIRCR: VECTKEYSTAT Position */ +#define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFul << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB AIRCR: VECTKEYSTAT Mask */ + +#define SCB_AIRCR_ENDIANESS_Pos 15 /*!< SCB AIRCR: ENDIANESS Position */ +#define SCB_AIRCR_ENDIANESS_Msk (1ul << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB AIRCR: ENDIANESS Mask */ + +#define SCB_AIRCR_PRIGROUP_Pos 8 /*!< SCB AIRCR: PRIGROUP Position */ +#define SCB_AIRCR_PRIGROUP_Msk (7ul << SCB_AIRCR_PRIGROUP_Pos) /*!< SCB AIRCR: PRIGROUP Mask */ + +#define SCB_AIRCR_SYSRESETREQ_Pos 2 /*!< SCB AIRCR: SYSRESETREQ Position */ +#define SCB_AIRCR_SYSRESETREQ_Msk (1ul << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB AIRCR: SYSRESETREQ Mask */ + +#define SCB_AIRCR_VECTCLRACTIVE_Pos 1 /*!< SCB AIRCR: VECTCLRACTIVE Position */ +#define SCB_AIRCR_VECTCLRACTIVE_Msk (1ul << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB AIRCR: VECTCLRACTIVE Mask */ + +#define SCB_AIRCR_VECTRESET_Pos 0 /*!< SCB AIRCR: VECTRESET Position */ +#define SCB_AIRCR_VECTRESET_Msk (1ul << SCB_AIRCR_VECTRESET_Pos) /*!< SCB AIRCR: VECTRESET Mask */ + +/* SCB System Control Register Definitions */ +#define SCB_SCR_SEVONPEND_Pos 4 /*!< SCB SCR: SEVONPEND Position */ +#define SCB_SCR_SEVONPEND_Msk (1ul << SCB_SCR_SEVONPEND_Pos) /*!< SCB SCR: SEVONPEND Mask */ + +#define SCB_SCR_SLEEPDEEP_Pos 2 /*!< SCB SCR: SLEEPDEEP Position */ +#define SCB_SCR_SLEEPDEEP_Msk (1ul << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB SCR: SLEEPDEEP Mask */ + +#define SCB_SCR_SLEEPONEXIT_Pos 1 /*!< SCB SCR: SLEEPONEXIT Position */ +#define SCB_SCR_SLEEPONEXIT_Msk (1ul << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB SCR: SLEEPONEXIT Mask */ + +/* SCB Configuration Control Register Definitions */ +#define SCB_CCR_STKALIGN_Pos 9 /*!< SCB CCR: STKALIGN Position */ +#define SCB_CCR_STKALIGN_Msk (1ul << SCB_CCR_STKALIGN_Pos) /*!< SCB CCR: STKALIGN Mask */ + +#define SCB_CCR_BFHFNMIGN_Pos 8 /*!< SCB CCR: BFHFNMIGN Position */ +#define SCB_CCR_BFHFNMIGN_Msk (1ul << SCB_CCR_BFHFNMIGN_Pos) /*!< SCB CCR: BFHFNMIGN Mask */ + +#define SCB_CCR_DIV_0_TRP_Pos 4 /*!< SCB CCR: DIV_0_TRP Position */ +#define SCB_CCR_DIV_0_TRP_Msk (1ul << SCB_CCR_DIV_0_TRP_Pos) /*!< SCB CCR: DIV_0_TRP Mask */ + +#define SCB_CCR_UNALIGN_TRP_Pos 3 /*!< SCB CCR: UNALIGN_TRP Position */ +#define SCB_CCR_UNALIGN_TRP_Msk (1ul << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB CCR: UNALIGN_TRP Mask */ + +#define SCB_CCR_USERSETMPEND_Pos 1 /*!< SCB CCR: USERSETMPEND Position */ +#define SCB_CCR_USERSETMPEND_Msk (1ul << SCB_CCR_USERSETMPEND_Pos) /*!< SCB CCR: USERSETMPEND Mask */ + +#define SCB_CCR_NONBASETHRDENA_Pos 0 /*!< SCB CCR: NONBASETHRDENA Position */ +#define SCB_CCR_NONBASETHRDENA_Msk (1ul << SCB_CCR_NONBASETHRDENA_Pos) /*!< SCB CCR: NONBASETHRDENA Mask */ + +/* SCB System Handler Control and State Register Definitions */ +#define SCB_SHCSR_USGFAULTENA_Pos 18 /*!< SCB SHCSR: USGFAULTENA Position */ +#define SCB_SHCSR_USGFAULTENA_Msk (1ul << SCB_SHCSR_USGFAULTENA_Pos) /*!< SCB SHCSR: USGFAULTENA Mask */ + +#define SCB_SHCSR_BUSFAULTENA_Pos 17 /*!< SCB SHCSR: BUSFAULTENA Position */ +#define SCB_SHCSR_BUSFAULTENA_Msk (1ul << SCB_SHCSR_BUSFAULTENA_Pos) /*!< SCB SHCSR: BUSFAULTENA Mask */ + +#define SCB_SHCSR_MEMFAULTENA_Pos 16 /*!< SCB SHCSR: MEMFAULTENA Position */ +#define SCB_SHCSR_MEMFAULTENA_Msk (1ul << SCB_SHCSR_MEMFAULTENA_Pos) /*!< SCB SHCSR: MEMFAULTENA Mask */ + +#define SCB_SHCSR_SVCALLPENDED_Pos 15 /*!< SCB SHCSR: SVCALLPENDED Position */ +#define SCB_SHCSR_SVCALLPENDED_Msk (1ul << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB SHCSR: SVCALLPENDED Mask */ + +#define SCB_SHCSR_BUSFAULTPENDED_Pos 14 /*!< SCB SHCSR: BUSFAULTPENDED Position */ +#define SCB_SHCSR_BUSFAULTPENDED_Msk (1ul << SCB_SHCSR_BUSFAULTPENDED_Pos) /*!< SCB SHCSR: BUSFAULTPENDED Mask */ + +#define SCB_SHCSR_MEMFAULTPENDED_Pos 13 /*!< SCB SHCSR: MEMFAULTPENDED Position */ +#define SCB_SHCSR_MEMFAULTPENDED_Msk (1ul << SCB_SHCSR_MEMFAULTPENDED_Pos) /*!< SCB SHCSR: MEMFAULTPENDED Mask */ + +#define SCB_SHCSR_USGFAULTPENDED_Pos 12 /*!< SCB SHCSR: USGFAULTPENDED Position */ +#define SCB_SHCSR_USGFAULTPENDED_Msk (1ul << SCB_SHCSR_USGFAULTPENDED_Pos) /*!< SCB SHCSR: USGFAULTPENDED Mask */ + +#define SCB_SHCSR_SYSTICKACT_Pos 11 /*!< SCB SHCSR: SYSTICKACT Position */ +#define SCB_SHCSR_SYSTICKACT_Msk (1ul << SCB_SHCSR_SYSTICKACT_Pos) /*!< SCB SHCSR: SYSTICKACT Mask */ + +#define SCB_SHCSR_PENDSVACT_Pos 10 /*!< SCB SHCSR: PENDSVACT Position */ +#define SCB_SHCSR_PENDSVACT_Msk (1ul << SCB_SHCSR_PENDSVACT_Pos) /*!< SCB SHCSR: PENDSVACT Mask */ + +#define SCB_SHCSR_MONITORACT_Pos 8 /*!< SCB SHCSR: MONITORACT Position */ +#define SCB_SHCSR_MONITORACT_Msk (1ul << SCB_SHCSR_MONITORACT_Pos) /*!< SCB SHCSR: MONITORACT Mask */ + +#define SCB_SHCSR_SVCALLACT_Pos 7 /*!< SCB SHCSR: SVCALLACT Position */ +#define SCB_SHCSR_SVCALLACT_Msk (1ul << SCB_SHCSR_SVCALLACT_Pos) /*!< SCB SHCSR: SVCALLACT Mask */ + +#define SCB_SHCSR_USGFAULTACT_Pos 3 /*!< SCB SHCSR: USGFAULTACT Position */ +#define SCB_SHCSR_USGFAULTACT_Msk (1ul << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB SHCSR: USGFAULTACT Mask */ + +#define SCB_SHCSR_BUSFAULTACT_Pos 1 /*!< SCB SHCSR: BUSFAULTACT Position */ +#define SCB_SHCSR_BUSFAULTACT_Msk (1ul << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB SHCSR: BUSFAULTACT Mask */ + +#define SCB_SHCSR_MEMFAULTACT_Pos 0 /*!< SCB SHCSR: MEMFAULTACT Position */ +#define SCB_SHCSR_MEMFAULTACT_Msk (1ul << SCB_SHCSR_MEMFAULTACT_Pos) /*!< SCB SHCSR: MEMFAULTACT Mask */ + +/* SCB Configurable Fault Status Registers Definitions */ +#define SCB_CFSR_USGFAULTSR_Pos 16 /*!< SCB CFSR: Usage Fault Status Register Position */ +#define SCB_CFSR_USGFAULTSR_Msk (0xFFFFul << SCB_CFSR_USGFAULTSR_Pos) /*!< SCB CFSR: Usage Fault Status Register Mask */ + +#define SCB_CFSR_BUSFAULTSR_Pos 8 /*!< SCB CFSR: Bus Fault Status Register Position */ +#define SCB_CFSR_BUSFAULTSR_Msk (0xFFul << SCB_CFSR_BUSFAULTSR_Pos) /*!< SCB CFSR: Bus Fault Status Register Mask */ + +#define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB CFSR: Memory Manage Fault Status Register Position */ +#define SCB_CFSR_MEMFAULTSR_Msk (0xFFul << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB CFSR: Memory Manage Fault Status Register Mask */ + +/* SCB Hard Fault Status Registers Definitions */ +#define SCB_HFSR_DEBUGEVT_Pos 31 /*!< SCB HFSR: DEBUGEVT Position */ +#define SCB_HFSR_DEBUGEVT_Msk (1ul << SCB_HFSR_DEBUGEVT_Pos) /*!< SCB HFSR: DEBUGEVT Mask */ + +#define SCB_HFSR_FORCED_Pos 30 /*!< SCB HFSR: FORCED Position */ +#define SCB_HFSR_FORCED_Msk (1ul << SCB_HFSR_FORCED_Pos) /*!< SCB HFSR: FORCED Mask */ + +#define SCB_HFSR_VECTTBL_Pos 1 /*!< SCB HFSR: VECTTBL Position */ +#define SCB_HFSR_VECTTBL_Msk (1ul << SCB_HFSR_VECTTBL_Pos) /*!< SCB HFSR: VECTTBL Mask */ + +/* SCB Debug Fault Status Register Definitions */ +#define SCB_DFSR_EXTERNAL_Pos 4 /*!< SCB DFSR: EXTERNAL Position */ +#define SCB_DFSR_EXTERNAL_Msk (1ul << SCB_DFSR_EXTERNAL_Pos) /*!< SCB DFSR: EXTERNAL Mask */ + +#define SCB_DFSR_VCATCH_Pos 3 /*!< SCB DFSR: VCATCH Position */ +#define SCB_DFSR_VCATCH_Msk (1ul << SCB_DFSR_VCATCH_Pos) /*!< SCB DFSR: VCATCH Mask */ + +#define SCB_DFSR_DWTTRAP_Pos 2 /*!< SCB DFSR: DWTTRAP Position */ +#define SCB_DFSR_DWTTRAP_Msk (1ul << SCB_DFSR_DWTTRAP_Pos) /*!< SCB DFSR: DWTTRAP Mask */ + +#define SCB_DFSR_BKPT_Pos 1 /*!< SCB DFSR: BKPT Position */ +#define SCB_DFSR_BKPT_Msk (1ul << SCB_DFSR_BKPT_Pos) /*!< SCB DFSR: BKPT Mask */ + +#define SCB_DFSR_HALTED_Pos 0 /*!< SCB DFSR: HALTED Position */ +#define SCB_DFSR_HALTED_Msk (1ul << SCB_DFSR_HALTED_Pos) /*!< SCB DFSR: HALTED Mask */ +/*@}*/ /* end of group CMSIS_CM3_SCB */ + + +/** @addtogroup CMSIS_CM3_SysTick CMSIS CM3 SysTick + memory mapped structure for SysTick + @{ + */ +typedef struct +{ + __IO uint32_t CTRL; /*!< Offset: 0x00 SysTick Control and Status Register */ + __IO uint32_t LOAD; /*!< Offset: 0x04 SysTick Reload Value Register */ + __IO uint32_t VAL; /*!< Offset: 0x08 SysTick Current Value Register */ + __I uint32_t CALIB; /*!< Offset: 0x0C SysTick Calibration Register */ +} SysTick_Type; + +/* SysTick Control / Status Register Definitions */ +#define SysTick_CTRL_COUNTFLAG_Pos 16 /*!< SysTick CTRL: COUNTFLAG Position */ +#define SysTick_CTRL_COUNTFLAG_Msk (1ul << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysTick CTRL: COUNTFLAG Mask */ + +#define SysTick_CTRL_CLKSOURCE_Pos 2 /*!< SysTick CTRL: CLKSOURCE Position */ +#define SysTick_CTRL_CLKSOURCE_Msk (1ul << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysTick CTRL: CLKSOURCE Mask */ + +#define SysTick_CTRL_TICKINT_Pos 1 /*!< SysTick CTRL: TICKINT Position */ +#define SysTick_CTRL_TICKINT_Msk (1ul << SysTick_CTRL_TICKINT_Pos) /*!< SysTick CTRL: TICKINT Mask */ + +#define SysTick_CTRL_ENABLE_Pos 0 /*!< SysTick CTRL: ENABLE Position */ +#define SysTick_CTRL_ENABLE_Msk (1ul << SysTick_CTRL_ENABLE_Pos) /*!< SysTick CTRL: ENABLE Mask */ + +/* SysTick Reload Register Definitions */ +#define SysTick_LOAD_RELOAD_Pos 0 /*!< SysTick LOAD: RELOAD Position */ +#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFul << SysTick_LOAD_RELOAD_Pos) /*!< SysTick LOAD: RELOAD Mask */ + +/* SysTick Current Register Definitions */ +#define SysTick_VAL_CURRENT_Pos 0 /*!< SysTick VAL: CURRENT Position */ +#define SysTick_VAL_CURRENT_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick VAL: CURRENT Mask */ + +/* SysTick Calibration Register Definitions */ +#define SysTick_CALIB_NOREF_Pos 31 /*!< SysTick CALIB: NOREF Position */ +#define SysTick_CALIB_NOREF_Msk (1ul << SysTick_CALIB_NOREF_Pos) /*!< SysTick CALIB: NOREF Mask */ + +#define SysTick_CALIB_SKEW_Pos 30 /*!< SysTick CALIB: SKEW Position */ +#define SysTick_CALIB_SKEW_Msk (1ul << SysTick_CALIB_SKEW_Pos) /*!< SysTick CALIB: SKEW Mask */ + +#define SysTick_CALIB_TENMS_Pos 0 /*!< SysTick CALIB: TENMS Position */ +#define SysTick_CALIB_TENMS_Msk (0xFFFFFFul << SysTick_VAL_CURRENT_Pos) /*!< SysTick CALIB: TENMS Mask */ +/*@}*/ /* end of group CMSIS_CM3_SysTick */ + + +/** @addtogroup CMSIS_CM3_ITM CMSIS CM3 ITM + memory mapped structure for Instrumentation Trace Macrocell (ITM) + @{ + */ +typedef struct +{ + __O union + { + __O uint8_t u8; /*!< Offset: ITM Stimulus Port 8-bit */ + __O uint16_t u16; /*!< Offset: ITM Stimulus Port 16-bit */ + __O uint32_t u32; /*!< Offset: ITM Stimulus Port 32-bit */ + } PORT [32]; /*!< Offset: 0x00 ITM Stimulus Port Registers */ + uint32_t RESERVED0[864]; + __IO uint32_t TER; /*!< Offset: ITM Trace Enable Register */ + uint32_t RESERVED1[15]; + __IO uint32_t TPR; /*!< Offset: ITM Trace Privilege Register */ + uint32_t RESERVED2[15]; + __IO uint32_t TCR; /*!< Offset: ITM Trace Control Register */ + uint32_t RESERVED3[29]; + __IO uint32_t IWR; /*!< Offset: ITM Integration Write Register */ + __IO uint32_t IRR; /*!< Offset: ITM Integration Read Register */ + __IO uint32_t IMCR; /*!< Offset: ITM Integration Mode Control Register */ + uint32_t RESERVED4[43]; + __IO uint32_t LAR; /*!< Offset: ITM Lock Access Register */ + __IO uint32_t LSR; /*!< Offset: ITM Lock Status Register */ + uint32_t RESERVED5[6]; + __I uint32_t PID4; /*!< Offset: ITM Peripheral Identification Register #4 */ + __I uint32_t PID5; /*!< Offset: ITM Peripheral Identification Register #5 */ + __I uint32_t PID6; /*!< Offset: ITM Peripheral Identification Register #6 */ + __I uint32_t PID7; /*!< Offset: ITM Peripheral Identification Register #7 */ + __I uint32_t PID0; /*!< Offset: ITM Peripheral Identification Register #0 */ + __I uint32_t PID1; /*!< Offset: ITM Peripheral Identification Register #1 */ + __I uint32_t PID2; /*!< Offset: ITM Peripheral Identification Register #2 */ + __I uint32_t PID3; /*!< Offset: ITM Peripheral Identification Register #3 */ + __I uint32_t CID0; /*!< Offset: ITM Component Identification Register #0 */ + __I uint32_t CID1; /*!< Offset: ITM Component Identification Register #1 */ + __I uint32_t CID2; /*!< Offset: ITM Component Identification Register #2 */ + __I uint32_t CID3; /*!< Offset: ITM Component Identification Register #3 */ +} ITM_Type; + +/* ITM Trace Privilege Register Definitions */ +#define ITM_TPR_PRIVMASK_Pos 0 /*!< ITM TPR: PRIVMASK Position */ +#define ITM_TPR_PRIVMASK_Msk (0xFul << ITM_TPR_PRIVMASK_Pos) /*!< ITM TPR: PRIVMASK Mask */ + +/* ITM Trace Control Register Definitions */ +#define ITM_TCR_BUSY_Pos 23 /*!< ITM TCR: BUSY Position */ +#define ITM_TCR_BUSY_Msk (1ul << ITM_TCR_BUSY_Pos) /*!< ITM TCR: BUSY Mask */ + +#define ITM_TCR_ATBID_Pos 16 /*!< ITM TCR: ATBID Position */ +#define ITM_TCR_ATBID_Msk (0x7Ful << ITM_TCR_ATBID_Pos) /*!< ITM TCR: ATBID Mask */ + +#define ITM_TCR_TSPrescale_Pos 8 /*!< ITM TCR: TSPrescale Position */ +#define ITM_TCR_TSPrescale_Msk (3ul << ITM_TCR_TSPrescale_Pos) /*!< ITM TCR: TSPrescale Mask */ + +#define ITM_TCR_SWOENA_Pos 4 /*!< ITM TCR: SWOENA Position */ +#define ITM_TCR_SWOENA_Msk (1ul << ITM_TCR_SWOENA_Pos) /*!< ITM TCR: SWOENA Mask */ + +#define ITM_TCR_DWTENA_Pos 3 /*!< ITM TCR: DWTENA Position */ +#define ITM_TCR_DWTENA_Msk (1ul << ITM_TCR_DWTENA_Pos) /*!< ITM TCR: DWTENA Mask */ + +#define ITM_TCR_SYNCENA_Pos 2 /*!< ITM TCR: SYNCENA Position */ +#define ITM_TCR_SYNCENA_Msk (1ul << ITM_TCR_SYNCENA_Pos) /*!< ITM TCR: SYNCENA Mask */ + +#define ITM_TCR_TSENA_Pos 1 /*!< ITM TCR: TSENA Position */ +#define ITM_TCR_TSENA_Msk (1ul << ITM_TCR_TSENA_Pos) /*!< ITM TCR: TSENA Mask */ + +#define ITM_TCR_ITMENA_Pos 0 /*!< ITM TCR: ITM Enable bit Position */ +#define ITM_TCR_ITMENA_Msk (1ul << ITM_TCR_ITMENA_Pos) /*!< ITM TCR: ITM Enable bit Mask */ + +/* ITM Integration Write Register Definitions */ +#define ITM_IWR_ATVALIDM_Pos 0 /*!< ITM IWR: ATVALIDM Position */ +#define ITM_IWR_ATVALIDM_Msk (1ul << ITM_IWR_ATVALIDM_Pos) /*!< ITM IWR: ATVALIDM Mask */ + +/* ITM Integration Read Register Definitions */ +#define ITM_IRR_ATREADYM_Pos 0 /*!< ITM IRR: ATREADYM Position */ +#define ITM_IRR_ATREADYM_Msk (1ul << ITM_IRR_ATREADYM_Pos) /*!< ITM IRR: ATREADYM Mask */ + +/* ITM Integration Mode Control Register Definitions */ +#define ITM_IMCR_INTEGRATION_Pos 0 /*!< ITM IMCR: INTEGRATION Position */ +#define ITM_IMCR_INTEGRATION_Msk (1ul << ITM_IMCR_INTEGRATION_Pos) /*!< ITM IMCR: INTEGRATION Mask */ + +/* ITM Lock Status Register Definitions */ +#define ITM_LSR_ByteAcc_Pos 2 /*!< ITM LSR: ByteAcc Position */ +#define ITM_LSR_ByteAcc_Msk (1ul << ITM_LSR_ByteAcc_Pos) /*!< ITM LSR: ByteAcc Mask */ + +#define ITM_LSR_Access_Pos 1 /*!< ITM LSR: Access Position */ +#define ITM_LSR_Access_Msk (1ul << ITM_LSR_Access_Pos) /*!< ITM LSR: Access Mask */ + +#define ITM_LSR_Present_Pos 0 /*!< ITM LSR: Present Position */ +#define ITM_LSR_Present_Msk (1ul << ITM_LSR_Present_Pos) /*!< ITM LSR: Present Mask */ +/*@}*/ /* end of group CMSIS_CM3_ITM */ + + +/** @addtogroup CMSIS_CM3_InterruptType CMSIS CM3 Interrupt Type + memory mapped structure for Interrupt Type + @{ + */ +typedef struct +{ + uint32_t RESERVED0; + __I uint32_t ICTR; /*!< Offset: 0x04 Interrupt Control Type Register */ +#if ((defined __CM3_REV) && (__CM3_REV >= 0x200)) + __IO uint32_t ACTLR; /*!< Offset: 0x08 Auxiliary Control Register */ +#else + uint32_t RESERVED1; +#endif +} InterruptType_Type; + +/* Interrupt Controller Type Register Definitions */ +#define InterruptType_ICTR_INTLINESNUM_Pos 0 /*!< InterruptType ICTR: INTLINESNUM Position */ +#define InterruptType_ICTR_INTLINESNUM_Msk (0x1Ful << InterruptType_ICTR_INTLINESNUM_Pos) /*!< InterruptType ICTR: INTLINESNUM Mask */ + +/* Auxiliary Control Register Definitions */ +#define InterruptType_ACTLR_DISFOLD_Pos 2 /*!< InterruptType ACTLR: DISFOLD Position */ +#define InterruptType_ACTLR_DISFOLD_Msk (1ul << InterruptType_ACTLR_DISFOLD_Pos) /*!< InterruptType ACTLR: DISFOLD Mask */ + +#define InterruptType_ACTLR_DISDEFWBUF_Pos 1 /*!< InterruptType ACTLR: DISDEFWBUF Position */ +#define InterruptType_ACTLR_DISDEFWBUF_Msk (1ul << InterruptType_ACTLR_DISDEFWBUF_Pos) /*!< InterruptType ACTLR: DISDEFWBUF Mask */ + +#define InterruptType_ACTLR_DISMCYCINT_Pos 0 /*!< InterruptType ACTLR: DISMCYCINT Position */ +#define InterruptType_ACTLR_DISMCYCINT_Msk (1ul << InterruptType_ACTLR_DISMCYCINT_Pos) /*!< InterruptType ACTLR: DISMCYCINT Mask */ +/*@}*/ /* end of group CMSIS_CM3_InterruptType */ + + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) +/** @addtogroup CMSIS_CM3_MPU CMSIS CM3 MPU + memory mapped structure for Memory Protection Unit (MPU) + @{ + */ +typedef struct +{ + __I uint32_t TYPE; /*!< Offset: 0x00 MPU Type Register */ + __IO uint32_t CTRL; /*!< Offset: 0x04 MPU Control Register */ + __IO uint32_t RNR; /*!< Offset: 0x08 MPU Region RNRber Register */ + __IO uint32_t RBAR; /*!< Offset: 0x0C MPU Region Base Address Register */ + __IO uint32_t RASR; /*!< Offset: 0x10 MPU Region Attribute and Size Register */ + __IO uint32_t RBAR_A1; /*!< Offset: 0x14 MPU Alias 1 Region Base Address Register */ + __IO uint32_t RASR_A1; /*!< Offset: 0x18 MPU Alias 1 Region Attribute and Size Register */ + __IO uint32_t RBAR_A2; /*!< Offset: 0x1C MPU Alias 2 Region Base Address Register */ + __IO uint32_t RASR_A2; /*!< Offset: 0x20 MPU Alias 2 Region Attribute and Size Register */ + __IO uint32_t RBAR_A3; /*!< Offset: 0x24 MPU Alias 3 Region Base Address Register */ + __IO uint32_t RASR_A3; /*!< Offset: 0x28 MPU Alias 3 Region Attribute and Size Register */ +} MPU_Type; + +/* MPU Type Register */ +#define MPU_TYPE_IREGION_Pos 16 /*!< MPU TYPE: IREGION Position */ +#define MPU_TYPE_IREGION_Msk (0xFFul << MPU_TYPE_IREGION_Pos) /*!< MPU TYPE: IREGION Mask */ + +#define MPU_TYPE_DREGION_Pos 8 /*!< MPU TYPE: DREGION Position */ +#define MPU_TYPE_DREGION_Msk (0xFFul << MPU_TYPE_DREGION_Pos) /*!< MPU TYPE: DREGION Mask */ + +#define MPU_TYPE_SEPARATE_Pos 0 /*!< MPU TYPE: SEPARATE Position */ +#define MPU_TYPE_SEPARATE_Msk (1ul << MPU_TYPE_SEPARATE_Pos) /*!< MPU TYPE: SEPARATE Mask */ + +/* MPU Control Register */ +#define MPU_CTRL_PRIVDEFENA_Pos 2 /*!< MPU CTRL: PRIVDEFENA Position */ +#define MPU_CTRL_PRIVDEFENA_Msk (1ul << MPU_CTRL_PRIVDEFENA_Pos) /*!< MPU CTRL: PRIVDEFENA Mask */ + +#define MPU_CTRL_HFNMIENA_Pos 1 /*!< MPU CTRL: HFNMIENA Position */ +#define MPU_CTRL_HFNMIENA_Msk (1ul << MPU_CTRL_HFNMIENA_Pos) /*!< MPU CTRL: HFNMIENA Mask */ + +#define MPU_CTRL_ENABLE_Pos 0 /*!< MPU CTRL: ENABLE Position */ +#define MPU_CTRL_ENABLE_Msk (1ul << MPU_CTRL_ENABLE_Pos) /*!< MPU CTRL: ENABLE Mask */ + +/* MPU Region Number Register */ +#define MPU_RNR_REGION_Pos 0 /*!< MPU RNR: REGION Position */ +#define MPU_RNR_REGION_Msk (0xFFul << MPU_RNR_REGION_Pos) /*!< MPU RNR: REGION Mask */ + +/* MPU Region Base Address Register */ +#define MPU_RBAR_ADDR_Pos 5 /*!< MPU RBAR: ADDR Position */ +#define MPU_RBAR_ADDR_Msk (0x7FFFFFFul << MPU_RBAR_ADDR_Pos) /*!< MPU RBAR: ADDR Mask */ + +#define MPU_RBAR_VALID_Pos 4 /*!< MPU RBAR: VALID Position */ +#define MPU_RBAR_VALID_Msk (1ul << MPU_RBAR_VALID_Pos) /*!< MPU RBAR: VALID Mask */ + +#define MPU_RBAR_REGION_Pos 0 /*!< MPU RBAR: REGION Position */ +#define MPU_RBAR_REGION_Msk (0xFul << MPU_RBAR_REGION_Pos) /*!< MPU RBAR: REGION Mask */ + +/* MPU Region Attribute and Size Register */ +#define MPU_RASR_XN_Pos 28 /*!< MPU RASR: XN Position */ +#define MPU_RASR_XN_Msk (1ul << MPU_RASR_XN_Pos) /*!< MPU RASR: XN Mask */ + +#define MPU_RASR_AP_Pos 24 /*!< MPU RASR: AP Position */ +#define MPU_RASR_AP_Msk (7ul << MPU_RASR_AP_Pos) /*!< MPU RASR: AP Mask */ + +#define MPU_RASR_TEX_Pos 19 /*!< MPU RASR: TEX Position */ +#define MPU_RASR_TEX_Msk (7ul << MPU_RASR_TEX_Pos) /*!< MPU RASR: TEX Mask */ + +#define MPU_RASR_S_Pos 18 /*!< MPU RASR: Shareable bit Position */ +#define MPU_RASR_S_Msk (1ul << MPU_RASR_S_Pos) /*!< MPU RASR: Shareable bit Mask */ + +#define MPU_RASR_C_Pos 17 /*!< MPU RASR: Cacheable bit Position */ +#define MPU_RASR_C_Msk (1ul << MPU_RASR_C_Pos) /*!< MPU RASR: Cacheable bit Mask */ + +#define MPU_RASR_B_Pos 16 /*!< MPU RASR: Bufferable bit Position */ +#define MPU_RASR_B_Msk (1ul << MPU_RASR_B_Pos) /*!< MPU RASR: Bufferable bit Mask */ + +#define MPU_RASR_SRD_Pos 8 /*!< MPU RASR: Sub-Region Disable Position */ +#define MPU_RASR_SRD_Msk (0xFFul << MPU_RASR_SRD_Pos) /*!< MPU RASR: Sub-Region Disable Mask */ + +#define MPU_RASR_SIZE_Pos 1 /*!< MPU RASR: Region Size Field Position */ +#define MPU_RASR_SIZE_Msk (0x1Ful << MPU_RASR_SIZE_Pos) /*!< MPU RASR: Region Size Field Mask */ + +#define MPU_RASR_ENA_Pos 0 /*!< MPU RASR: Region enable bit Position */ +#define MPU_RASR_ENA_Msk (0x1Ful << MPU_RASR_ENA_Pos) /*!< MPU RASR: Region enable bit Disable Mask */ + +/*@}*/ /* end of group CMSIS_CM3_MPU */ +#endif + + +/** @addtogroup CMSIS_CM3_CoreDebug CMSIS CM3 Core Debug + memory mapped structure for Core Debug Register + @{ + */ +typedef struct +{ + __IO uint32_t DHCSR; /*!< Offset: 0x00 Debug Halting Control and Status Register */ + __O uint32_t DCRSR; /*!< Offset: 0x04 Debug Core Register Selector Register */ + __IO uint32_t DCRDR; /*!< Offset: 0x08 Debug Core Register Data Register */ + __IO uint32_t DEMCR; /*!< Offset: 0x0C Debug Exception and Monitor Control Register */ +} CoreDebug_Type; + +/* Debug Halting Control and Status Register */ +#define CoreDebug_DHCSR_DBGKEY_Pos 16 /*!< CoreDebug DHCSR: DBGKEY Position */ +#define CoreDebug_DHCSR_DBGKEY_Msk (0xFFFFul << CoreDebug_DHCSR_DBGKEY_Pos) /*!< CoreDebug DHCSR: DBGKEY Mask */ + +#define CoreDebug_DHCSR_S_RESET_ST_Pos 25 /*!< CoreDebug DHCSR: S_RESET_ST Position */ +#define CoreDebug_DHCSR_S_RESET_ST_Msk (1ul << CoreDebug_DHCSR_S_RESET_ST_Pos) /*!< CoreDebug DHCSR: S_RESET_ST Mask */ + +#define CoreDebug_DHCSR_S_RETIRE_ST_Pos 24 /*!< CoreDebug DHCSR: S_RETIRE_ST Position */ +#define CoreDebug_DHCSR_S_RETIRE_ST_Msk (1ul << CoreDebug_DHCSR_S_RETIRE_ST_Pos) /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */ + +#define CoreDebug_DHCSR_S_LOCKUP_Pos 19 /*!< CoreDebug DHCSR: S_LOCKUP Position */ +#define CoreDebug_DHCSR_S_LOCKUP_Msk (1ul << CoreDebug_DHCSR_S_LOCKUP_Pos) /*!< CoreDebug DHCSR: S_LOCKUP Mask */ + +#define CoreDebug_DHCSR_S_SLEEP_Pos 18 /*!< CoreDebug DHCSR: S_SLEEP Position */ +#define CoreDebug_DHCSR_S_SLEEP_Msk (1ul << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< CoreDebug DHCSR: S_SLEEP Mask */ + +#define CoreDebug_DHCSR_S_HALT_Pos 17 /*!< CoreDebug DHCSR: S_HALT Position */ +#define CoreDebug_DHCSR_S_HALT_Msk (1ul << CoreDebug_DHCSR_S_HALT_Pos) /*!< CoreDebug DHCSR: S_HALT Mask */ + +#define CoreDebug_DHCSR_S_REGRDY_Pos 16 /*!< CoreDebug DHCSR: S_REGRDY Position */ +#define CoreDebug_DHCSR_S_REGRDY_Msk (1ul << CoreDebug_DHCSR_S_REGRDY_Pos) /*!< CoreDebug DHCSR: S_REGRDY Mask */ + +#define CoreDebug_DHCSR_C_SNAPSTALL_Pos 5 /*!< CoreDebug DHCSR: C_SNAPSTALL Position */ +#define CoreDebug_DHCSR_C_SNAPSTALL_Msk (1ul << CoreDebug_DHCSR_C_SNAPSTALL_Pos) /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */ + +#define CoreDebug_DHCSR_C_MASKINTS_Pos 3 /*!< CoreDebug DHCSR: C_MASKINTS Position */ +#define CoreDebug_DHCSR_C_MASKINTS_Msk (1ul << CoreDebug_DHCSR_C_MASKINTS_Pos) /*!< CoreDebug DHCSR: C_MASKINTS Mask */ + +#define CoreDebug_DHCSR_C_STEP_Pos 2 /*!< CoreDebug DHCSR: C_STEP Position */ +#define CoreDebug_DHCSR_C_STEP_Msk (1ul << CoreDebug_DHCSR_C_STEP_Pos) /*!< CoreDebug DHCSR: C_STEP Mask */ + +#define CoreDebug_DHCSR_C_HALT_Pos 1 /*!< CoreDebug DHCSR: C_HALT Position */ +#define CoreDebug_DHCSR_C_HALT_Msk (1ul << CoreDebug_DHCSR_C_HALT_Pos) /*!< CoreDebug DHCSR: C_HALT Mask */ + +#define CoreDebug_DHCSR_C_DEBUGEN_Pos 0 /*!< CoreDebug DHCSR: C_DEBUGEN Position */ +#define CoreDebug_DHCSR_C_DEBUGEN_Msk (1ul << CoreDebug_DHCSR_C_DEBUGEN_Pos) /*!< CoreDebug DHCSR: C_DEBUGEN Mask */ + +/* Debug Core Register Selector Register */ +#define CoreDebug_DCRSR_REGWnR_Pos 16 /*!< CoreDebug DCRSR: REGWnR Position */ +#define CoreDebug_DCRSR_REGWnR_Msk (1ul << CoreDebug_DCRSR_REGWnR_Pos) /*!< CoreDebug DCRSR: REGWnR Mask */ + +#define CoreDebug_DCRSR_REGSEL_Pos 0 /*!< CoreDebug DCRSR: REGSEL Position */ +#define CoreDebug_DCRSR_REGSEL_Msk (0x1Ful << CoreDebug_DCRSR_REGSEL_Pos) /*!< CoreDebug DCRSR: REGSEL Mask */ + +/* Debug Exception and Monitor Control Register */ +#define CoreDebug_DEMCR_TRCENA_Pos 24 /*!< CoreDebug DEMCR: TRCENA Position */ +#define CoreDebug_DEMCR_TRCENA_Msk (1ul << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */ + +#define CoreDebug_DEMCR_MON_REQ_Pos 19 /*!< CoreDebug DEMCR: MON_REQ Position */ +#define CoreDebug_DEMCR_MON_REQ_Msk (1ul << CoreDebug_DEMCR_MON_REQ_Pos) /*!< CoreDebug DEMCR: MON_REQ Mask */ + +#define CoreDebug_DEMCR_MON_STEP_Pos 18 /*!< CoreDebug DEMCR: MON_STEP Position */ +#define CoreDebug_DEMCR_MON_STEP_Msk (1ul << CoreDebug_DEMCR_MON_STEP_Pos) /*!< CoreDebug DEMCR: MON_STEP Mask */ + +#define CoreDebug_DEMCR_MON_PEND_Pos 17 /*!< CoreDebug DEMCR: MON_PEND Position */ +#define CoreDebug_DEMCR_MON_PEND_Msk (1ul << CoreDebug_DEMCR_MON_PEND_Pos) /*!< CoreDebug DEMCR: MON_PEND Mask */ + +#define CoreDebug_DEMCR_MON_EN_Pos 16 /*!< CoreDebug DEMCR: MON_EN Position */ +#define CoreDebug_DEMCR_MON_EN_Msk (1ul << CoreDebug_DEMCR_MON_EN_Pos) /*!< CoreDebug DEMCR: MON_EN Mask */ + +#define CoreDebug_DEMCR_VC_HARDERR_Pos 10 /*!< CoreDebug DEMCR: VC_HARDERR Position */ +#define CoreDebug_DEMCR_VC_HARDERR_Msk (1ul << CoreDebug_DEMCR_VC_HARDERR_Pos) /*!< CoreDebug DEMCR: VC_HARDERR Mask */ + +#define CoreDebug_DEMCR_VC_INTERR_Pos 9 /*!< CoreDebug DEMCR: VC_INTERR Position */ +#define CoreDebug_DEMCR_VC_INTERR_Msk (1ul << CoreDebug_DEMCR_VC_INTERR_Pos) /*!< CoreDebug DEMCR: VC_INTERR Mask */ + +#define CoreDebug_DEMCR_VC_BUSERR_Pos 8 /*!< CoreDebug DEMCR: VC_BUSERR Position */ +#define CoreDebug_DEMCR_VC_BUSERR_Msk (1ul << CoreDebug_DEMCR_VC_BUSERR_Pos) /*!< CoreDebug DEMCR: VC_BUSERR Mask */ + +#define CoreDebug_DEMCR_VC_STATERR_Pos 7 /*!< CoreDebug DEMCR: VC_STATERR Position */ +#define CoreDebug_DEMCR_VC_STATERR_Msk (1ul << CoreDebug_DEMCR_VC_STATERR_Pos) /*!< CoreDebug DEMCR: VC_STATERR Mask */ + +#define CoreDebug_DEMCR_VC_CHKERR_Pos 6 /*!< CoreDebug DEMCR: VC_CHKERR Position */ +#define CoreDebug_DEMCR_VC_CHKERR_Msk (1ul << CoreDebug_DEMCR_VC_CHKERR_Pos) /*!< CoreDebug DEMCR: VC_CHKERR Mask */ + +#define CoreDebug_DEMCR_VC_NOCPERR_Pos 5 /*!< CoreDebug DEMCR: VC_NOCPERR Position */ +#define CoreDebug_DEMCR_VC_NOCPERR_Msk (1ul << CoreDebug_DEMCR_VC_NOCPERR_Pos) /*!< CoreDebug DEMCR: VC_NOCPERR Mask */ + +#define CoreDebug_DEMCR_VC_MMERR_Pos 4 /*!< CoreDebug DEMCR: VC_MMERR Position */ +#define CoreDebug_DEMCR_VC_MMERR_Msk (1ul << CoreDebug_DEMCR_VC_MMERR_Pos) /*!< CoreDebug DEMCR: VC_MMERR Mask */ + +#define CoreDebug_DEMCR_VC_CORERESET_Pos 0 /*!< CoreDebug DEMCR: VC_CORERESET Position */ +#define CoreDebug_DEMCR_VC_CORERESET_Msk (1ul << CoreDebug_DEMCR_VC_CORERESET_Pos) /*!< CoreDebug DEMCR: VC_CORERESET Mask */ +/*@}*/ /* end of group CMSIS_CM3_CoreDebug */ + + +/* Memory mapping of Cortex-M3 Hardware */ +#define SCS_BASE (0xE000E000) /*!< System Control Space Base Address */ +#define ITM_BASE (0xE0000000) /*!< ITM Base Address */ +#define CoreDebug_BASE (0xE000EDF0) /*!< Core Debug Base Address */ +#define SysTick_BASE (SCS_BASE + 0x0010) /*!< SysTick Base Address */ +#define NVIC_BASE (SCS_BASE + 0x0100) /*!< NVIC Base Address */ +#define SCB_BASE (SCS_BASE + 0x0D00) /*!< System Control Block Base Address */ + +#define InterruptType ((InterruptType_Type *) SCS_BASE) /*!< Interrupt Type Register */ +#define SCB ((SCB_Type *) SCB_BASE) /*!< SCB configuration struct */ +#define SysTick ((SysTick_Type *) SysTick_BASE) /*!< SysTick configuration struct */ +#define NVIC ((NVIC_Type *) NVIC_BASE) /*!< NVIC configuration struct */ +#define ITM ((ITM_Type *) ITM_BASE) /*!< ITM configuration struct */ +#define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) /*!< Core Debug configuration struct */ + +#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1) + #define MPU_BASE (SCS_BASE + 0x0D90) /*!< Memory Protection Unit */ + #define MPU ((MPU_Type*) MPU_BASE) /*!< Memory Protection Unit */ +#endif + +/*@}*/ /* end of group CMSIS_CM3_core_register */ + + +/******************************************************************************* + * Hardware Abstraction Layer + ******************************************************************************/ + +#if defined ( __CC_ARM ) + #define __ASM __asm /*!< asm keyword for ARM Compiler */ + #define __INLINE __inline /*!< inline keyword for ARM Compiler */ + +#elif defined ( __ICCARM__ ) + #define __ASM __asm /*!< asm keyword for IAR Compiler */ + #define __INLINE inline /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */ + +#elif defined ( __GNUC__ ) + #define __ASM __asm /*!< asm keyword for GNU Compiler */ + #define __INLINE inline /*!< inline keyword for GNU Compiler */ + +#elif defined ( __TASKING__ ) + #define __ASM __asm /*!< asm keyword for TASKING Compiler */ + #define __INLINE inline /*!< inline keyword for TASKING Compiler */ + +#endif + + +/* ################### Compiler specific Intrinsics ########################### */ + +#if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/ +/* ARM armcc specific functions */ + +#define __enable_fault_irq __enable_fiq +#define __disable_fault_irq __disable_fiq + +#define __NOP __nop +#define __WFI __wfi +#define __WFE __wfe +#define __SEV __sev +#define __ISB() __isb(0) +#define __DSB() __dsb(0) +#define __DMB() __dmb(0) +#define __REV __rev +#define __RBIT __rbit +#define __LDREXB(ptr) ((unsigned char ) __ldrex(ptr)) +#define __LDREXH(ptr) ((unsigned short) __ldrex(ptr)) +#define __LDREXW(ptr) ((unsigned int ) __ldrex(ptr)) +#define __STREXB(value, ptr) __strex(value, ptr) +#define __STREXH(value, ptr) __strex(value, ptr) +#define __STREXW(value, ptr) __strex(value, ptr) + + +/* intrinsic unsigned long long __ldrexd(volatile void *ptr) */ +/* intrinsic int __strexd(unsigned long long val, volatile void *ptr) */ +/* intrinsic void __enable_irq(); */ +/* intrinsic void __disable_irq(); */ + + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +extern int32_t __REVSH(int16_t value); + + +#if (__ARMCC_VERSION < 400000) + +/** + * @brief Remove the exclusive lock created by ldrex + * + * Removes the exclusive lock which is created by ldrex. + */ +extern void __CLREX(void); + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +extern uint32_t __get_BASEPRI(void); + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +extern void __set_BASEPRI(uint32_t basePri); + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +extern uint32_t __get_PRIMASK(void); + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +extern void __set_PRIMASK(uint32_t priMask); + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +extern uint32_t __get_FAULTMASK(void); + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +extern void __set_FAULTMASK(uint32_t faultMask); + +/** + * @brief Return the Control Register value + * + * @return Control value + * + * Return the content of the control register + */ +extern uint32_t __get_CONTROL(void); + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +extern void __set_CONTROL(uint32_t control); + +#else /* (__ARMCC_VERSION >= 400000) */ + +/** + * @brief Remove the exclusive lock created by ldrex + * + * Removes the exclusive lock which is created by ldrex. + */ +#define __CLREX __clrex + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +static __INLINE uint32_t __get_BASEPRI(void) +{ + register uint32_t __regBasePri __ASM("basepri"); + return(__regBasePri); +} + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +static __INLINE void __set_BASEPRI(uint32_t basePri) +{ + register uint32_t __regBasePri __ASM("basepri"); + __regBasePri = (basePri & 0xff); +} + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +static __INLINE uint32_t __get_PRIMASK(void) +{ + register uint32_t __regPriMask __ASM("primask"); + return(__regPriMask); +} + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +static __INLINE void __set_PRIMASK(uint32_t priMask) +{ + register uint32_t __regPriMask __ASM("primask"); + __regPriMask = (priMask); +} + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +static __INLINE uint32_t __get_FAULTMASK(void) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + return(__regFaultMask); +} + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +static __INLINE void __set_FAULTMASK(uint32_t faultMask) +{ + register uint32_t __regFaultMask __ASM("faultmask"); + __regFaultMask = (faultMask & 1); +} + +/** + * @brief Return the Control Register value + * + * @return Control value + * + * Return the content of the control register + */ +static __INLINE uint32_t __get_CONTROL(void) +{ + register uint32_t __regControl __ASM("control"); + return(__regControl); +} + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +static __INLINE void __set_CONTROL(uint32_t control) +{ + register uint32_t __regControl __ASM("control"); + __regControl = control; +} + +#endif /* __ARMCC_VERSION */ + + + +#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/ +/* IAR iccarm specific functions */ + +#define __enable_irq __enable_interrupt /*!< global Interrupt enable */ +#define __disable_irq __disable_interrupt /*!< global Interrupt disable */ + +static __INLINE void __enable_fault_irq() { __ASM ("cpsie f"); } +static __INLINE void __disable_fault_irq() { __ASM ("cpsid f"); } + +#define __NOP __no_operation /*!< no operation intrinsic in IAR Compiler */ +static __INLINE void __WFI() { __ASM ("wfi"); } +static __INLINE void __WFE() { __ASM ("wfe"); } +static __INLINE void __SEV() { __ASM ("sev"); } +static __INLINE void __CLREX() { __ASM ("clrex"); } + +/* intrinsic void __ISB(void) */ +/* intrinsic void __DSB(void) */ +/* intrinsic void __DMB(void) */ +/* intrinsic void __set_PRIMASK(); */ +/* intrinsic void __get_PRIMASK(); */ +/* intrinsic void __set_FAULTMASK(); */ +/* intrinsic void __get_FAULTMASK(); */ +/* intrinsic uint32_t __REV(uint32_t value); */ +/* intrinsic uint32_t __REVSH(uint32_t value); */ +/* intrinsic unsigned long __STREX(unsigned long, unsigned long); */ +/* intrinsic unsigned long __LDREX(unsigned long *); */ + + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +extern uint32_t __RBIT(uint32_t value); + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit values) + */ +extern uint8_t __LDREXB(uint8_t *addr); + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +extern uint16_t __LDREXH(uint16_t *addr); + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +extern uint32_t __LDREXW(uint32_t *addr); + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +extern uint32_t __STREXB(uint8_t value, uint8_t *addr); + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +extern uint32_t __STREXH(uint16_t value, uint16_t *addr); + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +extern uint32_t __STREXW(uint32_t value, uint32_t *addr); + + + +#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/ +/* GNU gcc specific functions */ + +static __INLINE void __enable_irq() { __ASM volatile ("cpsie i"); } +static __INLINE void __disable_irq() { __ASM volatile ("cpsid i"); } + +static __INLINE void __enable_fault_irq() { __ASM volatile ("cpsie f"); } +static __INLINE void __disable_fault_irq() { __ASM volatile ("cpsid f"); } + +static __INLINE void __NOP() { __ASM volatile ("nop"); } +static __INLINE void __WFI() { __ASM volatile ("wfi"); } +static __INLINE void __WFE() { __ASM volatile ("wfe"); } +static __INLINE void __SEV() { __ASM volatile ("sev"); } +static __INLINE void __ISB() { __ASM volatile ("isb"); } +static __INLINE void __DSB() { __ASM volatile ("dsb"); } +static __INLINE void __DMB() { __ASM volatile ("dmb"); } +static __INLINE void __CLREX() { __ASM volatile ("clrex"); } + + +/** + * @brief Return the Process Stack Pointer + * + * @return ProcessStackPointer + * + * Return the actual process stack pointer + */ +extern uint32_t __get_PSP(void); + +/** + * @brief Set the Process Stack Pointer + * + * @param topOfProcStack Process Stack Pointer + * + * Assign the value ProcessStackPointer to the MSP + * (process stack pointer) Cortex processor register + */ +extern void __set_PSP(uint32_t topOfProcStack); + +/** + * @brief Return the Main Stack Pointer + * + * @return Main Stack Pointer + * + * Return the current value of the MSP (main stack pointer) + * Cortex processor register + */ +extern uint32_t __get_MSP(void); + +/** + * @brief Set the Main Stack Pointer + * + * @param topOfMainStack Main Stack Pointer + * + * Assign the value mainStackPointer to the MSP + * (main stack pointer) Cortex processor register + */ +extern void __set_MSP(uint32_t topOfMainStack); + +/** + * @brief Return the Base Priority value + * + * @return BasePriority + * + * Return the content of the base priority register + */ +extern uint32_t __get_BASEPRI(void); + +/** + * @brief Set the Base Priority value + * + * @param basePri BasePriority + * + * Set the base priority register + */ +extern void __set_BASEPRI(uint32_t basePri); + +/** + * @brief Return the Priority Mask value + * + * @return PriMask + * + * Return state of the priority mask bit from the priority mask register + */ +extern uint32_t __get_PRIMASK(void); + +/** + * @brief Set the Priority Mask value + * + * @param priMask PriMask + * + * Set the priority mask bit in the priority mask register + */ +extern void __set_PRIMASK(uint32_t priMask); + +/** + * @brief Return the Fault Mask value + * + * @return FaultMask + * + * Return the content of the fault mask register + */ +extern uint32_t __get_FAULTMASK(void); + +/** + * @brief Set the Fault Mask value + * + * @param faultMask faultMask value + * + * Set the fault mask register + */ +extern void __set_FAULTMASK(uint32_t faultMask); + +/** + * @brief Return the Control Register value +* +* @return Control value + * + * Return the content of the control register + */ +extern uint32_t __get_CONTROL(void); + +/** + * @brief Set the Control Register value + * + * @param control Control value + * + * Set the control register + */ +extern void __set_CONTROL(uint32_t control); + +/** + * @brief Reverse byte order in integer value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in integer value + */ +extern uint32_t __REV(uint32_t value); + +/** + * @brief Reverse byte order in unsigned short value + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in unsigned short value + */ +extern uint32_t __REV16(uint16_t value); + +/** + * @brief Reverse byte order in signed short value with sign extension to integer + * + * @param value value to reverse + * @return reversed value + * + * Reverse byte order in signed short value with sign extension to integer + */ +extern int32_t __REVSH(int16_t value); + +/** + * @brief Reverse bit order of value + * + * @param value value to reverse + * @return reversed value + * + * Reverse bit order of value + */ +extern uint32_t __RBIT(uint32_t value); + +/** + * @brief LDR Exclusive (8 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 8 bit value + */ +extern uint8_t __LDREXB(uint8_t *addr); + +/** + * @brief LDR Exclusive (16 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 16 bit values + */ +extern uint16_t __LDREXH(uint16_t *addr); + +/** + * @brief LDR Exclusive (32 bit) + * + * @param *addr address pointer + * @return value of (*address) + * + * Exclusive LDR command for 32 bit values + */ +extern uint32_t __LDREXW(uint32_t *addr); + +/** + * @brief STR Exclusive (8 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 8 bit values + */ +extern uint32_t __STREXB(uint8_t value, uint8_t *addr); + +/** + * @brief STR Exclusive (16 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 16 bit values + */ +extern uint32_t __STREXH(uint16_t value, uint16_t *addr); + +/** + * @brief STR Exclusive (32 bit) + * + * @param value value to store + * @param *addr address pointer + * @return successful / failed + * + * Exclusive STR command for 32 bit values + */ +extern uint32_t __STREXW(uint32_t value, uint32_t *addr); + + +#elif (defined (__TASKING__)) /*------------------ TASKING Compiler ---------------------*/ +/* TASKING carm specific functions */ + +/* + * The CMSIS functions have been implemented as intrinsics in the compiler. + * Please use "carm -?i" to get an up to date list of all instrinsics, + * Including the CMSIS ones. + */ + +#endif + + +/** @addtogroup CMSIS_CM3_Core_FunctionInterface CMSIS CM3 Core Function Interface + Core Function Interface containing: + - Core NVIC Functions + - Core SysTick Functions + - Core Reset Functions +*/ +/*@{*/ + +/* ########################## NVIC functions #################################### */ + +/** + * @brief Set the Priority Grouping in NVIC Interrupt Controller + * + * @param PriorityGroup is priority grouping field + * + * Set the priority grouping field using the required unlock sequence. + * The parameter priority_grouping is assigned to the field + * SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + */ +static __INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup) +{ + uint32_t reg_value; + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + + reg_value = SCB->AIRCR; /* read old register configuration */ + reg_value &= ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk); /* clear bits to change */ + reg_value = (reg_value | + (0x5FA << SCB_AIRCR_VECTKEY_Pos) | + (PriorityGroupTmp << 8)); /* Insert write key and priorty group */ + SCB->AIRCR = reg_value; +} + +/** + * @brief Get the Priority Grouping from NVIC Interrupt Controller + * + * @return priority grouping field + * + * Get the priority grouping from NVIC Interrupt Controller. + * priority grouping is SCB->AIRCR [10:8] PRIGROUP field. + */ +static __INLINE uint32_t NVIC_GetPriorityGrouping(void) +{ + return ((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos); /* read priority grouping field */ +} + +/** + * @brief Enable Interrupt in NVIC Interrupt Controller + * + * @param IRQn The positive number of the external interrupt to enable + * + * Enable a device specific interupt in the NVIC interrupt controller. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_EnableIRQ(IRQn_Type IRQn) +{ + NVIC->ISER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* enable interrupt */ +} + +/** + * @brief Disable the interrupt line for external interrupt specified + * + * @param IRQn The positive number of the external interrupt to disable + * + * Disable a device specific interupt in the NVIC interrupt controller. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_DisableIRQ(IRQn_Type IRQn) +{ + NVIC->ICER[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* disable interrupt */ +} + +/** + * @brief Read the interrupt pending bit for a device specific interrupt source + * + * @param IRQn The number of the device specifc interrupt + * @return 1 = interrupt pending, 0 = interrupt not pending + * + * Read the pending register in NVIC and return 1 if its status is pending, + * otherwise it returns 0 + */ +static __INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn) +{ + return((uint32_t) ((NVIC->ISPR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if pending else 0 */ +} + +/** + * @brief Set the pending bit for an external interrupt + * + * @param IRQn The number of the interrupt for set pending + * + * Set the pending bit for the specified interrupt. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ISPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* set interrupt pending */ +} + +/** + * @brief Clear the pending bit for an external interrupt + * + * @param IRQn The number of the interrupt for clear pending + * + * Clear the pending bit for the specified interrupt. + * The interrupt number cannot be a negative value. + */ +static __INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn) +{ + NVIC->ICPR[((uint32_t)(IRQn) >> 5)] = (1 << ((uint32_t)(IRQn) & 0x1F)); /* Clear pending interrupt */ +} + +/** + * @brief Read the active bit for an external interrupt + * + * @param IRQn The number of the interrupt for read active bit + * @return 1 = interrupt active, 0 = interrupt not active + * + * Read the active register in NVIC and returns 1 if its status is active, + * otherwise it returns 0. + */ +static __INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn) +{ + return((uint32_t)((NVIC->IABR[(uint32_t)(IRQn) >> 5] & (1 << ((uint32_t)(IRQn) & 0x1F)))?1:0)); /* Return 1 if active else 0 */ +} + +/** + * @brief Set the priority for an interrupt + * + * @param IRQn The number of the interrupt for set priority + * @param priority The priority to set + * + * Set the priority for the specified interrupt. The interrupt + * number can be positive to specify an external (device specific) + * interrupt, or negative to specify an internal (core) interrupt. + * + * Note: The priority cannot be set for every core interrupt. + */ +static __INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) +{ + if(IRQn < 0) { + SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for Cortex-M3 System Interrupts */ + else { + NVIC->IP[(uint32_t)(IRQn)] = ((priority << (8 - __NVIC_PRIO_BITS)) & 0xff); } /* set Priority for device specific Interrupts */ +} + +/** + * @brief Read the priority for an interrupt + * + * @param IRQn The number of the interrupt for get priority + * @return The priority for the interrupt + * + * Read the priority for the specified interrupt. The interrupt + * number can be positive to specify an external (device specific) + * interrupt, or negative to specify an internal (core) interrupt. + * + * The returned priority value is automatically aligned to the implemented + * priority bits of the microcontroller. + * + * Note: The priority cannot be set for every core interrupt. + */ +static __INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn) +{ + + if(IRQn < 0) { + return((uint32_t)(SCB->SHP[((uint32_t)(IRQn) & 0xF)-4] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for Cortex-M3 system interrupts */ + else { + return((uint32_t)(NVIC->IP[(uint32_t)(IRQn)] >> (8 - __NVIC_PRIO_BITS))); } /* get priority for device specific interrupts */ +} + + +/** + * @brief Encode the priority for an interrupt + * + * @param PriorityGroup The used priority group + * @param PreemptPriority The preemptive priority value (starting from 0) + * @param SubPriority The sub priority value (starting from 0) + * @return The encoded priority for the interrupt + * + * Encode the priority for an interrupt with the given priority group, + * preemptive priority value and sub priority value. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. + * + * The returned priority value can be used for NVIC_SetPriority(...) function + */ +static __INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; + SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; + + return ( + ((PreemptPriority & ((1 << (PreemptPriorityBits)) - 1)) << SubPriorityBits) | + ((SubPriority & ((1 << (SubPriorityBits )) - 1))) + ); +} + + +/** + * @brief Decode the priority of an interrupt + * + * @param Priority The priority for the interrupt + * @param PriorityGroup The used priority group + * @param pPreemptPriority The preemptive priority value (starting from 0) + * @param pSubPriority The sub priority value (starting from 0) + * + * Decode an interrupt priority value with the given priority group to + * preemptive priority value and sub priority value. + * In case of a conflict between priority grouping and available + * priority bits (__NVIC_PRIO_BITS) the samllest possible priority group is set. + * + * The priority value can be retrieved with NVIC_GetPriority(...) function + */ +static __INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority) +{ + uint32_t PriorityGroupTmp = (PriorityGroup & 0x07); /* only values 0..7 are used */ + uint32_t PreemptPriorityBits; + uint32_t SubPriorityBits; + + PreemptPriorityBits = ((7 - PriorityGroupTmp) > __NVIC_PRIO_BITS) ? __NVIC_PRIO_BITS : 7 - PriorityGroupTmp; + SubPriorityBits = ((PriorityGroupTmp + __NVIC_PRIO_BITS) < 7) ? 0 : PriorityGroupTmp - 7 + __NVIC_PRIO_BITS; + + *pPreemptPriority = (Priority >> SubPriorityBits) & ((1 << (PreemptPriorityBits)) - 1); + *pSubPriority = (Priority ) & ((1 << (SubPriorityBits )) - 1); +} + + + +/* ################################## SysTick function ############################################ */ + +#if (!defined (__Vendor_SysTickConfig)) || (__Vendor_SysTickConfig == 0) + +/** + * @brief Initialize and start the SysTick counter and its interrupt. + * + * @param ticks number of ticks between two interrupts + * @return 1 = failed, 0 = successful + * + * Initialise the system tick timer and its interrupt and start the + * system tick timer / counter in free running mode to generate + * periodical interrupts. + */ +static __INLINE uint32_t SysTick_Config(uint32_t ticks) +{ + if (ticks > SysTick_LOAD_RELOAD_Msk) return (1); /* Reload value impossible */ + + SysTick->LOAD = (ticks & SysTick_LOAD_RELOAD_Msk) - 1; /* set reload register */ + NVIC_SetPriority (SysTick_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority for Cortex-M0 System Interrupts */ + SysTick->VAL = 0; /* Load the SysTick Counter Value */ + SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + SysTick_CTRL_TICKINT_Msk | + SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ + return (0); /* Function successful */ +} + +#endif + + + + +/* ################################## Reset function ############################################ */ + +/** + * @brief Initiate a system reset request. + * + * Initiate a system reset request to reset the MCU + */ +static __INLINE void NVIC_SystemReset(void) +{ + SCB->AIRCR = ((0x5FA << SCB_AIRCR_VECTKEY_Pos) | + (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | + SCB_AIRCR_SYSRESETREQ_Msk); /* Keep priority group unchanged */ + __DSB(); /* Ensure completion of memory access */ + while(1); /* wait until reset */ +} + +/*@}*/ /* end of group CMSIS_CM3_Core_FunctionInterface */ + + + +/* ##################################### Debug In/Output function ########################################### */ + +/** @addtogroup CMSIS_CM3_CoreDebugInterface CMSIS CM3 Core Debug Interface + Core Debug Interface containing: + - Core Debug Receive / Transmit Functions + - Core Debug Defines + - Core Debug Variables +*/ +/*@{*/ + +extern volatile int ITM_RxBuffer; /*!< variable to receive characters */ +#define ITM_RXBUFFER_EMPTY 0x5AA55AA5 /*!< value identifying ITM_RxBuffer is ready for next character */ + + +/** + * @brief Outputs a character via the ITM channel 0 + * + * @param ch character to output + * @return character to output + * + * The function outputs a character via the ITM channel 0. + * The function returns when no debugger is connected that has booked the output. + * It is blocking when a debugger is connected, but the previous character send is not transmitted. + */ +static __INLINE uint32_t ITM_SendChar (uint32_t ch) +{ + if ((CoreDebug->DEMCR & CoreDebug_DEMCR_TRCENA_Msk) && /* Trace enabled */ + (ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ + (ITM->TER & (1ul << 0) ) ) /* ITM Port #0 enabled */ + { + while (ITM->PORT[0].u32 == 0); + ITM->PORT[0].u8 = (uint8_t) ch; + } + return (ch); +} + + +/** + * @brief Inputs a character via variable ITM_RxBuffer + * + * @return received character, -1 = no character received + * + * The function inputs a character via variable ITM_RxBuffer. + * The function returns when no debugger is connected that has booked the output. + * It is blocking when a debugger is connected, but the previous character send is not transmitted. + */ +static __INLINE int ITM_ReceiveChar (void) { + int ch = -1; /* no character available */ + + if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { + ch = ITM_RxBuffer; + ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ + } + + return (ch); +} + + +/** + * @brief Check if a character via variable ITM_RxBuffer is available + * + * @return 1 = character available, 0 = no character available + * + * The function checks variable ITM_RxBuffer whether a character is available or not. + * The function returns '1' if a character is available and '0' if no character is available. + */ +static __INLINE int ITM_CheckChar (void) { + + if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) { + return (0); /* no character available */ + } else { + return (1); /* character available */ + } +} + +/*@}*/ /* end of group CMSIS_CM3_core_DebugInterface */ + + +#ifdef __cplusplus +} +#endif + +/*@}*/ /* end of group CMSIS_CM3_core_definitions */ + +#endif /* __CM3_CORE_H__ */ + +/*lint -restore */ diff --git a/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s b/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s index 8a19827c..adc9b94a 100644 --- a/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s +++ b/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s @@ -1,358 +1,358 @@ -;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** -;* File Name : startup_stm32f10x_hd.s -;* Author : MCD Application Team -;* Version : V3.5.0 -;* Date : 11-March-2011 -;* Description : STM32F10x High Density Devices vector table for MDK-ARM -;* toolchain. -;* This module performs: -;* - Set the initial SP -;* - Set the initial PC == Reset_Handler -;* - Set the vector table entries with the exceptions ISR address -;* - Configure the clock system and also configure the external -;* SRAM mounted on STM3210E-EVAL board to be used as data -;* memory (optional, to be enabled by user) -;* - Branches to __main in the C library (which eventually -;* calls main()). -;* After Reset the CortexM3 processor is in Thread mode, -;* priority is Privileged, and the Stack is set to Main. -;* <<< Use Configuration Wizard in Context Menu >>> -;******************************************************************************* -; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -;******************************************************************************* - -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size -__initial_sp - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 - THUMB - - -; Vector Table Mapped to Address 0 at Reset - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors DCD __initial_sp ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - - ; External Interrupts - DCD WWDG_IRQHandler ; Window Watchdog - DCD PVD_IRQHandler ; PVD through EXTI Line detect - DCD TAMPER_IRQHandler ; Tamper - DCD RTC_IRQHandler ; RTC - DCD FLASH_IRQHandler ; Flash - DCD RCC_IRQHandler ; RCC - DCD EXTI0_IRQHandler ; EXTI Line 0 - DCD EXTI1_IRQHandler ; EXTI Line 1 - DCD EXTI2_IRQHandler ; EXTI Line 2 - DCD EXTI3_IRQHandler ; EXTI Line 3 - DCD EXTI4_IRQHandler ; EXTI Line 4 - DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 - DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 - DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 - DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 - DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 - DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 - DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 - DCD ADC1_2_IRQHandler ; ADC1 & ADC2 - DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX - DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 - DCD CAN1_RX1_IRQHandler ; CAN1 RX1 - DCD CAN1_SCE_IRQHandler ; CAN1 SCE - DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 - DCD TIM1_BRK_IRQHandler ; TIM1 Break - DCD TIM1_UP_IRQHandler ; TIM1 Update - DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation - DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare - DCD TIM2_IRQHandler ; TIM2 - DCD TIM3_IRQHandler ; TIM3 - DCD TIM4_IRQHandler ; TIM4 - DCD I2C1_EV_IRQHandler ; I2C1 Event - DCD I2C1_ER_IRQHandler ; I2C1 Error - DCD I2C2_EV_IRQHandler ; I2C2 Event - DCD I2C2_ER_IRQHandler ; I2C2 Error - DCD SPI1_IRQHandler ; SPI1 - DCD SPI2_IRQHandler ; SPI2 - DCD USART1_IRQHandler ; USART1 - DCD USART2_IRQHandler ; USART2 - DCD USART3_IRQHandler ; USART3 - DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 - DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line - DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend - DCD TIM8_BRK_IRQHandler ; TIM8 Break - DCD TIM8_UP_IRQHandler ; TIM8 Update - DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation - DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare - DCD ADC3_IRQHandler ; ADC3 - DCD FSMC_IRQHandler ; FSMC - DCD SDIO_IRQHandler ; SDIO - DCD TIM5_IRQHandler ; TIM5 - DCD SPI3_IRQHandler ; SPI3 - DCD UART4_IRQHandler ; UART4 - DCD UART5_IRQHandler ; UART5 - DCD TIM6_IRQHandler ; TIM6 - DCD TIM7_IRQHandler ; TIM7 - DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 - DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 - DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 - DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - - AREA |.text|, CODE, READONLY - -; Reset handler -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT __main - IMPORT SystemInit - LDR R0, =SystemInit - BLX R0 - LDR R0, =__main - BX R0 - ENDP - -; Dummy Exception Handlers (infinite loops which can be modified) - -NMI_Handler PROC - EXPORT NMI_Handler [WEAK] - B . - ENDP -HardFault_Handler\ - PROC - EXPORT HardFault_Handler [WEAK] - B . - ENDP -MemManage_Handler\ - PROC - EXPORT MemManage_Handler [WEAK] - B . - ENDP -BusFault_Handler\ - PROC - EXPORT BusFault_Handler [WEAK] - B . - ENDP -UsageFault_Handler\ - PROC - EXPORT UsageFault_Handler [WEAK] - B . - ENDP -SVC_Handler PROC - EXPORT SVC_Handler [WEAK] - B . - ENDP -DebugMon_Handler\ - PROC - EXPORT DebugMon_Handler [WEAK] - B . - ENDP -PendSV_Handler PROC - EXPORT PendSV_Handler [WEAK] - B . - ENDP -SysTick_Handler PROC - EXPORT SysTick_Handler [WEAK] - B . - ENDP - -Default_Handler PROC - - EXPORT WWDG_IRQHandler [WEAK] - EXPORT PVD_IRQHandler [WEAK] - EXPORT TAMPER_IRQHandler [WEAK] - EXPORT RTC_IRQHandler [WEAK] - EXPORT FLASH_IRQHandler [WEAK] - EXPORT RCC_IRQHandler [WEAK] - EXPORT EXTI0_IRQHandler [WEAK] - EXPORT EXTI1_IRQHandler [WEAK] - EXPORT EXTI2_IRQHandler [WEAK] - EXPORT EXTI3_IRQHandler [WEAK] - EXPORT EXTI4_IRQHandler [WEAK] - EXPORT DMA1_Channel1_IRQHandler [WEAK] - EXPORT DMA1_Channel2_IRQHandler [WEAK] - EXPORT DMA1_Channel3_IRQHandler [WEAK] - EXPORT DMA1_Channel4_IRQHandler [WEAK] - EXPORT DMA1_Channel5_IRQHandler [WEAK] - EXPORT DMA1_Channel6_IRQHandler [WEAK] - EXPORT DMA1_Channel7_IRQHandler [WEAK] - EXPORT ADC1_2_IRQHandler [WEAK] - EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] - EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] - EXPORT CAN1_RX1_IRQHandler [WEAK] - EXPORT CAN1_SCE_IRQHandler [WEAK] - EXPORT EXTI9_5_IRQHandler [WEAK] - EXPORT TIM1_BRK_IRQHandler [WEAK] - EXPORT TIM1_UP_IRQHandler [WEAK] - EXPORT TIM1_TRG_COM_IRQHandler [WEAK] - EXPORT TIM1_CC_IRQHandler [WEAK] - EXPORT TIM2_IRQHandler [WEAK] - EXPORT TIM3_IRQHandler [WEAK] - EXPORT TIM4_IRQHandler [WEAK] - EXPORT I2C1_EV_IRQHandler [WEAK] - EXPORT I2C1_ER_IRQHandler [WEAK] - EXPORT I2C2_EV_IRQHandler [WEAK] - EXPORT I2C2_ER_IRQHandler [WEAK] - EXPORT SPI1_IRQHandler [WEAK] - EXPORT SPI2_IRQHandler [WEAK] - EXPORT USART1_IRQHandler [WEAK] - EXPORT USART2_IRQHandler [WEAK] - EXPORT USART3_IRQHandler [WEAK] - EXPORT EXTI15_10_IRQHandler [WEAK] - EXPORT RTCAlarm_IRQHandler [WEAK] - EXPORT USBWakeUp_IRQHandler [WEAK] - EXPORT TIM8_BRK_IRQHandler [WEAK] - EXPORT TIM8_UP_IRQHandler [WEAK] - EXPORT TIM8_TRG_COM_IRQHandler [WEAK] - EXPORT TIM8_CC_IRQHandler [WEAK] - EXPORT ADC3_IRQHandler [WEAK] - EXPORT FSMC_IRQHandler [WEAK] - EXPORT SDIO_IRQHandler [WEAK] - EXPORT TIM5_IRQHandler [WEAK] - EXPORT SPI3_IRQHandler [WEAK] - EXPORT UART4_IRQHandler [WEAK] - EXPORT UART5_IRQHandler [WEAK] - EXPORT TIM6_IRQHandler [WEAK] - EXPORT TIM7_IRQHandler [WEAK] - EXPORT DMA2_Channel1_IRQHandler [WEAK] - EXPORT DMA2_Channel2_IRQHandler [WEAK] - EXPORT DMA2_Channel3_IRQHandler [WEAK] - EXPORT DMA2_Channel4_5_IRQHandler [WEAK] - -WWDG_IRQHandler -PVD_IRQHandler -TAMPER_IRQHandler -RTC_IRQHandler -FLASH_IRQHandler -RCC_IRQHandler -EXTI0_IRQHandler -EXTI1_IRQHandler -EXTI2_IRQHandler -EXTI3_IRQHandler -EXTI4_IRQHandler -DMA1_Channel1_IRQHandler -DMA1_Channel2_IRQHandler -DMA1_Channel3_IRQHandler -DMA1_Channel4_IRQHandler -DMA1_Channel5_IRQHandler -DMA1_Channel6_IRQHandler -DMA1_Channel7_IRQHandler -ADC1_2_IRQHandler -USB_HP_CAN1_TX_IRQHandler -USB_LP_CAN1_RX0_IRQHandler -CAN1_RX1_IRQHandler -CAN1_SCE_IRQHandler -EXTI9_5_IRQHandler -TIM1_BRK_IRQHandler -TIM1_UP_IRQHandler -TIM1_TRG_COM_IRQHandler -TIM1_CC_IRQHandler -TIM2_IRQHandler -TIM3_IRQHandler -TIM4_IRQHandler -I2C1_EV_IRQHandler -I2C1_ER_IRQHandler -I2C2_EV_IRQHandler -I2C2_ER_IRQHandler -SPI1_IRQHandler -SPI2_IRQHandler -USART1_IRQHandler -USART2_IRQHandler -USART3_IRQHandler -EXTI15_10_IRQHandler -RTCAlarm_IRQHandler -USBWakeUp_IRQHandler -TIM8_BRK_IRQHandler -TIM8_UP_IRQHandler -TIM8_TRG_COM_IRQHandler -TIM8_CC_IRQHandler -ADC3_IRQHandler -FSMC_IRQHandler -SDIO_IRQHandler -TIM5_IRQHandler -SPI3_IRQHandler -UART4_IRQHandler -UART5_IRQHandler -TIM6_IRQHandler -TIM7_IRQHandler -DMA2_Channel1_IRQHandler -DMA2_Channel2_IRQHandler -DMA2_Channel3_IRQHandler -DMA2_Channel4_5_IRQHandler - B . - - ENDP - - ALIGN - -;******************************************************************************* -; User Stack and Heap initialization -;******************************************************************************* - IF :DEF:__MICROLIB - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap - - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - - ALIGN - - ENDIF - - END - -;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** +;******************** (C) COPYRIGHT 2011 STMicroelectronics ******************** +;* File Name : startup_stm32f10x_hd.s +;* Author : MCD Application Team +;* Version : V3.5.0 +;* Date : 11-March-2011 +;* Description : STM32F10x High Density Devices vector table for MDK-ARM +;* toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Configure the clock system and also configure the external +;* SRAM mounted on STM3210E-EVAL board to be used as data +;* memory (optional, to be enabled by user) +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the CortexM3 processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;******************************************************************************* +; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +;******************************************************************************* + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window Watchdog + DCD PVD_IRQHandler ; PVD through EXTI Line detect + DCD TAMPER_IRQHandler ; Tamper + DCD RTC_IRQHandler ; RTC + DCD FLASH_IRQHandler ; Flash + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line 0 + DCD EXTI1_IRQHandler ; EXTI Line 1 + DCD EXTI2_IRQHandler ; EXTI Line 2 + DCD EXTI3_IRQHandler ; EXTI Line 3 + DCD EXTI4_IRQHandler ; EXTI Line 4 + DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 + DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2 + DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3 + DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4 + DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5 + DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6 + DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7 + DCD ADC1_2_IRQHandler ; ADC1 & ADC2 + DCD USB_HP_CAN1_TX_IRQHandler ; USB High Priority or CAN1 TX + DCD USB_LP_CAN1_RX0_IRQHandler ; USB Low Priority or CAN1 RX0 + DCD CAN1_RX1_IRQHandler ; CAN1 RX1 + DCD CAN1_SCE_IRQHandler ; CAN1 SCE + DCD EXTI9_5_IRQHandler ; EXTI Line 9..5 + DCD TIM1_BRK_IRQHandler ; TIM1 Break + DCD TIM1_UP_IRQHandler ; TIM1 Update + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; EXTI Line 15..10 + DCD RTCAlarm_IRQHandler ; RTC Alarm through EXTI Line + DCD USBWakeUp_IRQHandler ; USB Wakeup from suspend + DCD TIM8_BRK_IRQHandler ; TIM8 Break + DCD TIM8_UP_IRQHandler ; TIM8 Update + DCD TIM8_TRG_COM_IRQHandler ; TIM8 Trigger and Commutation + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare + DCD ADC3_IRQHandler ; ADC3 + DCD FSMC_IRQHandler ; FSMC + DCD SDIO_IRQHandler ; SDIO + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_IRQHandler ; TIM6 + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Channel1_IRQHandler ; DMA2 Channel1 + DCD DMA2_Channel2_IRQHandler ; DMA2 Channel2 + DCD DMA2_Channel3_IRQHandler ; DMA2 Channel3 + DCD DMA2_Channel4_5_IRQHandler ; DMA2 Channel4 & Channel5 +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + IMPORT SystemInit + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_IRQHandler [WEAK] + EXPORT TAMPER_IRQHandler [WEAK] + EXPORT RTC_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Channel1_IRQHandler [WEAK] + EXPORT DMA1_Channel2_IRQHandler [WEAK] + EXPORT DMA1_Channel3_IRQHandler [WEAK] + EXPORT DMA1_Channel4_IRQHandler [WEAK] + EXPORT DMA1_Channel5_IRQHandler [WEAK] + EXPORT DMA1_Channel6_IRQHandler [WEAK] + EXPORT DMA1_Channel7_IRQHandler [WEAK] + EXPORT ADC1_2_IRQHandler [WEAK] + EXPORT USB_HP_CAN1_TX_IRQHandler [WEAK] + EXPORT USB_LP_CAN1_RX0_IRQHandler [WEAK] + EXPORT CAN1_RX1_IRQHandler [WEAK] + EXPORT CAN1_SCE_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTCAlarm_IRQHandler [WEAK] + EXPORT USBWakeUp_IRQHandler [WEAK] + EXPORT TIM8_BRK_IRQHandler [WEAK] + EXPORT TIM8_UP_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT FSMC_IRQHandler [WEAK] + EXPORT SDIO_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Channel1_IRQHandler [WEAK] + EXPORT DMA2_Channel2_IRQHandler [WEAK] + EXPORT DMA2_Channel3_IRQHandler [WEAK] + EXPORT DMA2_Channel4_5_IRQHandler [WEAK] + +WWDG_IRQHandler +PVD_IRQHandler +TAMPER_IRQHandler +RTC_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Channel1_IRQHandler +DMA1_Channel2_IRQHandler +DMA1_Channel3_IRQHandler +DMA1_Channel4_IRQHandler +DMA1_Channel5_IRQHandler +DMA1_Channel6_IRQHandler +DMA1_Channel7_IRQHandler +ADC1_2_IRQHandler +USB_HP_CAN1_TX_IRQHandler +USB_LP_CAN1_RX0_IRQHandler +CAN1_RX1_IRQHandler +CAN1_SCE_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTCAlarm_IRQHandler +USBWakeUp_IRQHandler +TIM8_BRK_IRQHandler +TIM8_UP_IRQHandler +TIM8_TRG_COM_IRQHandler +TIM8_CC_IRQHandler +ADC3_IRQHandler +FSMC_IRQHandler +SDIO_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_IRQHandler +TIM7_IRQHandler +DMA2_Channel1_IRQHandler +DMA2_Channel2_IRQHandler +DMA2_Channel3_IRQHandler +DMA2_Channel4_5_IRQHandler + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE***** diff --git a/firmware/stm32-esp/libraries/cmsis/stm32f10x.h b/firmware/stm32-esp/libraries/cmsis/stm32f10x.h index 8bf76245..af0c7c9a 100644 --- a/firmware/stm32-esp/libraries/cmsis/stm32f10x.h +++ b/firmware/stm32-esp/libraries/cmsis/stm32f10x.h @@ -1,8336 +1,8336 @@ -/** - ****************************************************************************** - * @file stm32f10x.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File. - * This file contains all the peripheral register's definitions, bits - * definitions and memory mapping for STM32F10x Connectivity line, - * High density, High density value line, Medium density, - * Medium density Value line, Low density, Low density Value line - * and XL-density devices. - * - * The file is the unique include file that the application programmer - * is using in the C source code, usually in main.c. This file contains: - * - Configuration section that allows to select: - * - The device used in the target application - * - To use or not the peripherals drivers in application code(i.e. - * code will be based on direct access to peripherals registers - * rather than drivers API), this option is controlled by - * "#define USE_STDPERIPH_DRIVER" - * - To change few application-specific parameters such as the HSE - * crystal frequency - * - Data structures and the address mapping for all peripherals - * - Peripheral's registers declarations and bits definition - * - Macros to access peripherals registers hardware - * - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x - * @{ - */ - -#ifndef __STM32F10x_H -#define __STM32F10x_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup Library_configuration_section - * @{ - */ - -/* Uncomment the line below according to the target STM32 device used in your - application - */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) - /* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */ - /* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */ - /* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */ - /* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */ - /* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */ - /* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */ - /* #define STM32F10X_XL */ /*!< STM32F10X_XL: STM32 XL-density devices */ - /* #define STM32F10X_CL */ /*!< STM32F10X_CL: STM32 Connectivity line devices */ -#endif -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - - - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers - where the Flash memory density ranges between 16 and 32 Kbytes. - - Low-density value line devices are STM32F100xx microcontrollers where the Flash - memory density ranges between 16 and 32 Kbytes. - - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers - where the Flash memory density ranges between 64 and 128 Kbytes. - - Medium-density value line devices are STM32F100xx microcontrollers where the - Flash memory density ranges between 64 and 128 Kbytes. - - High-density devices are STM32F101xx and STM32F103xx microcontrollers where - the Flash memory density ranges between 256 and 512 Kbytes. - - High-density value line devices are STM32F100xx microcontrollers where the - Flash memory density ranges between 256 and 512 Kbytes. - - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where - the Flash memory density ranges between 512 and 1024 Kbytes. - - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. - */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) - #error "Please select first the target STM32F10x device used in your application (in stm32f10x.h file)" -#endif - -#if !defined USE_STDPERIPH_DRIVER -/** - * @brief Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will - be based on direct access to peripherals registers - */ - /*#define USE_STDPERIPH_DRIVER*/ -#endif - -/** - * @brief In the following line adjust the value of External High Speed oscillator (HSE) - used in your application - - Tip: To avoid modifying this file each time you need to use different HSE, you - can define the HSE value in your toolchain compiler preprocessor. - */ -#if !defined HSE_VALUE - #ifdef STM32F10X_CL - #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ - #else - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ - #endif /* STM32F10X_CL */ -#endif /* HSE_VALUE */ - - -/** - * @brief In the following line adjust the External High Speed oscillator (HSE) Startup - Timeout value - */ -#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */ - -#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ - -/** - * @brief STM32F10x Standard Peripheral Library version number - */ -#define __STM32F10X_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:24] main version */ -#define __STM32F10X_STDPERIPH_VERSION_SUB1 (0x05) /*!< [23:16] sub1 version */ -#define __STM32F10X_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ -#define __STM32F10X_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */ -#define __STM32F10X_STDPERIPH_VERSION ( (__STM32F10X_STDPERIPH_VERSION_MAIN << 24)\ - |(__STM32F10X_STDPERIPH_VERSION_SUB1 << 16)\ - |(__STM32F10X_STDPERIPH_VERSION_SUB2 << 8)\ - |(__STM32F10X_STDPERIPH_VERSION_RC)) - -/** - * @} - */ - -/** @addtogroup Configuration_section_for_CMSIS - * @{ - */ - -/** - * @brief Configuration of the Cortex-M3 Processor and Core Peripherals - */ -#ifdef STM32F10X_XL - #define __MPU_PRESENT 1 /*!< STM32 XL-density devices provide an MPU */ -#else - #define __MPU_PRESENT 0 /*!< Other STM32 devices does not provide an MPU */ -#endif /* STM32F10X_XL */ -#define __NVIC_PRIO_BITS 4 /*!< STM32 uses 4 Bits for the Priority Levels */ -#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ - -/** - * @brief STM32F10x Interrupt Number Definition, according to the selected device - * in @ref Library_configuration_section - */ -typedef enum IRQn -{ -/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ - NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ - MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ - BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ - UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ - SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ - DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ - PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ - SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ - -/****** STM32 specific Interrupt Numbers *********************************************************/ - WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ - PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */ - TAMPER_IRQn = 2, /*!< Tamper Interrupt */ - RTC_IRQn = 3, /*!< RTC global Interrupt */ - FLASH_IRQn = 4, /*!< FLASH global Interrupt */ - RCC_IRQn = 5, /*!< RCC global Interrupt */ - EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ - EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ - EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ - EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ - EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ - DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ - DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ - DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ - DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ - DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ - DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ - DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ - -#ifdef STM32F10X_LD - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ -#endif /* STM32F10X_LD */ - -#ifdef STM32F10X_LD_VL - ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ - TIM7_IRQn = 55 /*!< TIM7 Interrupt */ -#endif /* STM32F10X_LD_VL */ - -#ifdef STM32F10X_MD - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ -#endif /* STM32F10X_MD */ - -#ifdef STM32F10X_MD_VL - ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ - TIM7_IRQn = 55 /*!< TIM7 Interrupt */ -#endif /* STM32F10X_MD_VL */ - -#ifdef STM32F10X_HD - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ - TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ - TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ - TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ - TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ - ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ - FSMC_IRQn = 48, /*!< FSMC global Interrupt */ - SDIO_IRQn = 49, /*!< SDIO global Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ -#endif /* STM32F10X_HD */ - -#ifdef STM32F10X_HD_VL - ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ - TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ - TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ - TIM12_IRQn = 43, /*!< TIM12 global Interrupt */ - TIM13_IRQn = 44, /*!< TIM13 global Interrupt */ - TIM14_IRQn = 45, /*!< TIM14 global Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 Interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_5_IRQn = 59, /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ - DMA2_Channel5_IRQn = 60 /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is - mapped at position 60 only if the MISC_REMAP bit in - the AFIO_MAPR2 register is set) */ -#endif /* STM32F10X_HD_VL */ - -#ifdef STM32F10X_XL - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_TIM9_IRQn = 24, /*!< TIM1 Break Interrupt and TIM9 global Interrupt */ - TIM1_UP_TIM10_IRQn = 25, /*!< TIM1 Update Interrupt and TIM10 global Interrupt */ - TIM1_TRG_COM_TIM11_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ - TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global Interrupt */ - TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global Interrupt */ - TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */ - TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ - ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ - FSMC_IRQn = 48, /*!< FSMC global Interrupt */ - SDIO_IRQn = 49, /*!< SDIO global Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ -#endif /* STM32F10X_XL */ - -#ifdef STM32F10X_CL - ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ - CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ - CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ - CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ - CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ - EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ - TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ - TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ - TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ - TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ - TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ - TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ - TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ - I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ - I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ - I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ - I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ - SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ - SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ - USART1_IRQn = 37, /*!< USART1 global Interrupt */ - USART2_IRQn = 38, /*!< USART2 global Interrupt */ - USART3_IRQn = 39, /*!< USART3 global Interrupt */ - EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ - RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ - OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */ - TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ - SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ - UART4_IRQn = 52, /*!< UART4 global Interrupt */ - UART5_IRQn = 53, /*!< UART5 global Interrupt */ - TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ - TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ - DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ - DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ - DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ - DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ - DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ - ETH_IRQn = 61, /*!< Ethernet global Interrupt */ - ETH_WKUP_IRQn = 62, /*!< Ethernet Wakeup through EXTI line Interrupt */ - CAN2_TX_IRQn = 63, /*!< CAN2 TX Interrupt */ - CAN2_RX0_IRQn = 64, /*!< CAN2 RX0 Interrupt */ - CAN2_RX1_IRQn = 65, /*!< CAN2 RX1 Interrupt */ - CAN2_SCE_IRQn = 66, /*!< CAN2 SCE Interrupt */ - OTG_FS_IRQn = 67 /*!< USB OTG FS global Interrupt */ -#endif /* STM32F10X_CL */ -} IRQn_Type; - -/** - * @} - */ - -#include "core_cm3.h" -#include "system_stm32f10x.h" -#include - -/** @addtogroup Exported_types - * @{ - */ - -/*!< STM32F10x Standard Peripheral Library old types (maintained for legacy purpose) */ -typedef int32_t s32; -typedef int16_t s16; -typedef int8_t s8; - -typedef const int32_t sc32; /*!< Read Only */ -typedef const int16_t sc16; /*!< Read Only */ -typedef const int8_t sc8; /*!< Read Only */ - -typedef __IO int32_t vs32; -typedef __IO int16_t vs16; -typedef __IO int8_t vs8; - -typedef __I int32_t vsc32; /*!< Read Only */ -typedef __I int16_t vsc16; /*!< Read Only */ -typedef __I int8_t vsc8; /*!< Read Only */ - -typedef uint32_t u32; -typedef uint16_t u16; -typedef uint8_t u8; - -typedef const uint32_t uc32; /*!< Read Only */ -typedef const uint16_t uc16; /*!< Read Only */ -typedef const uint8_t uc8; /*!< Read Only */ - -typedef __IO uint32_t vu32; -typedef __IO uint16_t vu16; -typedef __IO uint8_t vu8; - -typedef __I uint32_t vuc32; /*!< Read Only */ -typedef __I uint16_t vuc16; /*!< Read Only */ -typedef __I uint8_t vuc8; /*!< Read Only */ - -typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; - -typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; - -/*!< STM32F10x Standard Peripheral Library old definitions (maintained for legacy purpose) */ -#define HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT -#define HSE_Value HSE_VALUE -#define HSI_Value HSI_VALUE -/** - * @} - */ - -/** @addtogroup Peripheral_registers_structures - * @{ - */ - -/** - * @brief Analog to Digital Converter - */ - -typedef struct -{ - __IO uint32_t SR; - __IO uint32_t CR1; - __IO uint32_t CR2; - __IO uint32_t SMPR1; - __IO uint32_t SMPR2; - __IO uint32_t JOFR1; - __IO uint32_t JOFR2; - __IO uint32_t JOFR3; - __IO uint32_t JOFR4; - __IO uint32_t HTR; - __IO uint32_t LTR; - __IO uint32_t SQR1; - __IO uint32_t SQR2; - __IO uint32_t SQR3; - __IO uint32_t JSQR; - __IO uint32_t JDR1; - __IO uint32_t JDR2; - __IO uint32_t JDR3; - __IO uint32_t JDR4; - __IO uint32_t DR; -} ADC_TypeDef; - -/** - * @brief Backup Registers - */ - -typedef struct -{ - uint32_t RESERVED0; - __IO uint16_t DR1; - uint16_t RESERVED1; - __IO uint16_t DR2; - uint16_t RESERVED2; - __IO uint16_t DR3; - uint16_t RESERVED3; - __IO uint16_t DR4; - uint16_t RESERVED4; - __IO uint16_t DR5; - uint16_t RESERVED5; - __IO uint16_t DR6; - uint16_t RESERVED6; - __IO uint16_t DR7; - uint16_t RESERVED7; - __IO uint16_t DR8; - uint16_t RESERVED8; - __IO uint16_t DR9; - uint16_t RESERVED9; - __IO uint16_t DR10; - uint16_t RESERVED10; - __IO uint16_t RTCCR; - uint16_t RESERVED11; - __IO uint16_t CR; - uint16_t RESERVED12; - __IO uint16_t CSR; - uint16_t RESERVED13[5]; - __IO uint16_t DR11; - uint16_t RESERVED14; - __IO uint16_t DR12; - uint16_t RESERVED15; - __IO uint16_t DR13; - uint16_t RESERVED16; - __IO uint16_t DR14; - uint16_t RESERVED17; - __IO uint16_t DR15; - uint16_t RESERVED18; - __IO uint16_t DR16; - uint16_t RESERVED19; - __IO uint16_t DR17; - uint16_t RESERVED20; - __IO uint16_t DR18; - uint16_t RESERVED21; - __IO uint16_t DR19; - uint16_t RESERVED22; - __IO uint16_t DR20; - uint16_t RESERVED23; - __IO uint16_t DR21; - uint16_t RESERVED24; - __IO uint16_t DR22; - uint16_t RESERVED25; - __IO uint16_t DR23; - uint16_t RESERVED26; - __IO uint16_t DR24; - uint16_t RESERVED27; - __IO uint16_t DR25; - uint16_t RESERVED28; - __IO uint16_t DR26; - uint16_t RESERVED29; - __IO uint16_t DR27; - uint16_t RESERVED30; - __IO uint16_t DR28; - uint16_t RESERVED31; - __IO uint16_t DR29; - uint16_t RESERVED32; - __IO uint16_t DR30; - uint16_t RESERVED33; - __IO uint16_t DR31; - uint16_t RESERVED34; - __IO uint16_t DR32; - uint16_t RESERVED35; - __IO uint16_t DR33; - uint16_t RESERVED36; - __IO uint16_t DR34; - uint16_t RESERVED37; - __IO uint16_t DR35; - uint16_t RESERVED38; - __IO uint16_t DR36; - uint16_t RESERVED39; - __IO uint16_t DR37; - uint16_t RESERVED40; - __IO uint16_t DR38; - uint16_t RESERVED41; - __IO uint16_t DR39; - uint16_t RESERVED42; - __IO uint16_t DR40; - uint16_t RESERVED43; - __IO uint16_t DR41; - uint16_t RESERVED44; - __IO uint16_t DR42; - uint16_t RESERVED45; -} BKP_TypeDef; - -/** - * @brief Controller Area Network TxMailBox - */ - -typedef struct -{ - __IO uint32_t TIR; - __IO uint32_t TDTR; - __IO uint32_t TDLR; - __IO uint32_t TDHR; -} CAN_TxMailBox_TypeDef; - -/** - * @brief Controller Area Network FIFOMailBox - */ - -typedef struct -{ - __IO uint32_t RIR; - __IO uint32_t RDTR; - __IO uint32_t RDLR; - __IO uint32_t RDHR; -} CAN_FIFOMailBox_TypeDef; - -/** - * @brief Controller Area Network FilterRegister - */ - -typedef struct -{ - __IO uint32_t FR1; - __IO uint32_t FR2; -} CAN_FilterRegister_TypeDef; - -/** - * @brief Controller Area Network - */ - -typedef struct -{ - __IO uint32_t MCR; - __IO uint32_t MSR; - __IO uint32_t TSR; - __IO uint32_t RF0R; - __IO uint32_t RF1R; - __IO uint32_t IER; - __IO uint32_t ESR; - __IO uint32_t BTR; - uint32_t RESERVED0[88]; - CAN_TxMailBox_TypeDef sTxMailBox[3]; - CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; - uint32_t RESERVED1[12]; - __IO uint32_t FMR; - __IO uint32_t FM1R; - uint32_t RESERVED2; - __IO uint32_t FS1R; - uint32_t RESERVED3; - __IO uint32_t FFA1R; - uint32_t RESERVED4; - __IO uint32_t FA1R; - uint32_t RESERVED5[8]; -#ifndef STM32F10X_CL - CAN_FilterRegister_TypeDef sFilterRegister[14]; -#else - CAN_FilterRegister_TypeDef sFilterRegister[28]; -#endif /* STM32F10X_CL */ -} CAN_TypeDef; - -/** - * @brief Consumer Electronics Control (CEC) - */ -typedef struct -{ - __IO uint32_t CFGR; - __IO uint32_t OAR; - __IO uint32_t PRES; - __IO uint32_t ESR; - __IO uint32_t CSR; - __IO uint32_t TXD; - __IO uint32_t RXD; -} CEC_TypeDef; - -/** - * @brief CRC calculation unit - */ - -typedef struct -{ - __IO uint32_t DR; - __IO uint8_t IDR; - uint8_t RESERVED0; - uint16_t RESERVED1; - __IO uint32_t CR; -} CRC_TypeDef; - -/** - * @brief Digital to Analog Converter - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t SWTRIGR; - __IO uint32_t DHR12R1; - __IO uint32_t DHR12L1; - __IO uint32_t DHR8R1; - __IO uint32_t DHR12R2; - __IO uint32_t DHR12L2; - __IO uint32_t DHR8R2; - __IO uint32_t DHR12RD; - __IO uint32_t DHR12LD; - __IO uint32_t DHR8RD; - __IO uint32_t DOR1; - __IO uint32_t DOR2; -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - __IO uint32_t SR; -#endif -} DAC_TypeDef; - -/** - * @brief Debug MCU - */ - -typedef struct -{ - __IO uint32_t IDCODE; - __IO uint32_t CR; -}DBGMCU_TypeDef; - -/** - * @brief DMA Controller - */ - -typedef struct -{ - __IO uint32_t CCR; - __IO uint32_t CNDTR; - __IO uint32_t CPAR; - __IO uint32_t CMAR; -} DMA_Channel_TypeDef; - -typedef struct -{ - __IO uint32_t ISR; - __IO uint32_t IFCR; -} DMA_TypeDef; - -/** - * @brief Ethernet MAC - */ - -typedef struct -{ - __IO uint32_t MACCR; - __IO uint32_t MACFFR; - __IO uint32_t MACHTHR; - __IO uint32_t MACHTLR; - __IO uint32_t MACMIIAR; - __IO uint32_t MACMIIDR; - __IO uint32_t MACFCR; - __IO uint32_t MACVLANTR; /* 8 */ - uint32_t RESERVED0[2]; - __IO uint32_t MACRWUFFR; /* 11 */ - __IO uint32_t MACPMTCSR; - uint32_t RESERVED1[2]; - __IO uint32_t MACSR; /* 15 */ - __IO uint32_t MACIMR; - __IO uint32_t MACA0HR; - __IO uint32_t MACA0LR; - __IO uint32_t MACA1HR; - __IO uint32_t MACA1LR; - __IO uint32_t MACA2HR; - __IO uint32_t MACA2LR; - __IO uint32_t MACA3HR; - __IO uint32_t MACA3LR; /* 24 */ - uint32_t RESERVED2[40]; - __IO uint32_t MMCCR; /* 65 */ - __IO uint32_t MMCRIR; - __IO uint32_t MMCTIR; - __IO uint32_t MMCRIMR; - __IO uint32_t MMCTIMR; /* 69 */ - uint32_t RESERVED3[14]; - __IO uint32_t MMCTGFSCCR; /* 84 */ - __IO uint32_t MMCTGFMSCCR; - uint32_t RESERVED4[5]; - __IO uint32_t MMCTGFCR; - uint32_t RESERVED5[10]; - __IO uint32_t MMCRFCECR; - __IO uint32_t MMCRFAECR; - uint32_t RESERVED6[10]; - __IO uint32_t MMCRGUFCR; - uint32_t RESERVED7[334]; - __IO uint32_t PTPTSCR; - __IO uint32_t PTPSSIR; - __IO uint32_t PTPTSHR; - __IO uint32_t PTPTSLR; - __IO uint32_t PTPTSHUR; - __IO uint32_t PTPTSLUR; - __IO uint32_t PTPTSAR; - __IO uint32_t PTPTTHR; - __IO uint32_t PTPTTLR; - uint32_t RESERVED8[567]; - __IO uint32_t DMABMR; - __IO uint32_t DMATPDR; - __IO uint32_t DMARPDR; - __IO uint32_t DMARDLAR; - __IO uint32_t DMATDLAR; - __IO uint32_t DMASR; - __IO uint32_t DMAOMR; - __IO uint32_t DMAIER; - __IO uint32_t DMAMFBOCR; - uint32_t RESERVED9[9]; - __IO uint32_t DMACHTDR; - __IO uint32_t DMACHRDR; - __IO uint32_t DMACHTBAR; - __IO uint32_t DMACHRBAR; -} ETH_TypeDef; - -/** - * @brief External Interrupt/Event Controller - */ - -typedef struct -{ - __IO uint32_t IMR; - __IO uint32_t EMR; - __IO uint32_t RTSR; - __IO uint32_t FTSR; - __IO uint32_t SWIER; - __IO uint32_t PR; -} EXTI_TypeDef; - -/** - * @brief FLASH Registers - */ - -typedef struct -{ - __IO uint32_t ACR; - __IO uint32_t KEYR; - __IO uint32_t OPTKEYR; - __IO uint32_t SR; - __IO uint32_t CR; - __IO uint32_t AR; - __IO uint32_t RESERVED; - __IO uint32_t OBR; - __IO uint32_t WRPR; -#ifdef STM32F10X_XL - uint32_t RESERVED1[8]; - __IO uint32_t KEYR2; - uint32_t RESERVED2; - __IO uint32_t SR2; - __IO uint32_t CR2; - __IO uint32_t AR2; -#endif /* STM32F10X_XL */ -} FLASH_TypeDef; - -/** - * @brief Option Bytes Registers - */ - -typedef struct -{ - __IO uint16_t RDP; - __IO uint16_t USER; - __IO uint16_t Data0; - __IO uint16_t Data1; - __IO uint16_t WRP0; - __IO uint16_t WRP1; - __IO uint16_t WRP2; - __IO uint16_t WRP3; -} OB_TypeDef; - -/** - * @brief Flexible Static Memory Controller - */ - -typedef struct -{ - __IO uint32_t BTCR[8]; -} FSMC_Bank1_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank1E - */ - -typedef struct -{ - __IO uint32_t BWTR[7]; -} FSMC_Bank1E_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank2 - */ - -typedef struct -{ - __IO uint32_t PCR2; - __IO uint32_t SR2; - __IO uint32_t PMEM2; - __IO uint32_t PATT2; - uint32_t RESERVED0; - __IO uint32_t ECCR2; -} FSMC_Bank2_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank3 - */ - -typedef struct -{ - __IO uint32_t PCR3; - __IO uint32_t SR3; - __IO uint32_t PMEM3; - __IO uint32_t PATT3; - uint32_t RESERVED0; - __IO uint32_t ECCR3; -} FSMC_Bank3_TypeDef; - -/** - * @brief Flexible Static Memory Controller Bank4 - */ - -typedef struct -{ - __IO uint32_t PCR4; - __IO uint32_t SR4; - __IO uint32_t PMEM4; - __IO uint32_t PATT4; - __IO uint32_t PIO4; -} FSMC_Bank4_TypeDef; - -/** - * @brief General Purpose I/O - */ - -typedef struct -{ - __IO uint32_t CRL; - __IO uint32_t CRH; - __IO uint32_t IDR; - __IO uint32_t ODR; - __IO uint32_t BSRR; - __IO uint32_t BRR; - __IO uint32_t LCKR; -} GPIO_TypeDef; - -/** - * @brief Alternate Function I/O - */ - -typedef struct -{ - __IO uint32_t EVCR; - __IO uint32_t MAPR; - __IO uint32_t EXTICR[4]; - uint32_t RESERVED0; - __IO uint32_t MAPR2; -} AFIO_TypeDef; -/** - * @brief Inter Integrated Circuit Interface - */ - -typedef struct -{ - __IO uint16_t CR1; - uint16_t RESERVED0; - __IO uint16_t CR2; - uint16_t RESERVED1; - __IO uint16_t OAR1; - uint16_t RESERVED2; - __IO uint16_t OAR2; - uint16_t RESERVED3; - __IO uint16_t DR; - uint16_t RESERVED4; - __IO uint16_t SR1; - uint16_t RESERVED5; - __IO uint16_t SR2; - uint16_t RESERVED6; - __IO uint16_t CCR; - uint16_t RESERVED7; - __IO uint16_t TRISE; - uint16_t RESERVED8; -} I2C_TypeDef; - -/** - * @brief Independent WATCHDOG - */ - -typedef struct -{ - __IO uint32_t KR; - __IO uint32_t PR; - __IO uint32_t RLR; - __IO uint32_t SR; -} IWDG_TypeDef; - -/** - * @brief Power Control - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CSR; -} PWR_TypeDef; - -/** - * @brief Reset and Clock Control - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CFGR; - __IO uint32_t CIR; - __IO uint32_t APB2RSTR; - __IO uint32_t APB1RSTR; - __IO uint32_t AHBENR; - __IO uint32_t APB2ENR; - __IO uint32_t APB1ENR; - __IO uint32_t BDCR; - __IO uint32_t CSR; - -#ifdef STM32F10X_CL - __IO uint32_t AHBRSTR; - __IO uint32_t CFGR2; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - uint32_t RESERVED0; - __IO uint32_t CFGR2; -#endif /* STM32F10X_LD_VL || STM32F10X_MD_VL || STM32F10X_HD_VL */ -} RCC_TypeDef; - -/** - * @brief Real-Time Clock - */ - -typedef struct -{ - __IO uint16_t CRH; - uint16_t RESERVED0; - __IO uint16_t CRL; - uint16_t RESERVED1; - __IO uint16_t PRLH; - uint16_t RESERVED2; - __IO uint16_t PRLL; - uint16_t RESERVED3; - __IO uint16_t DIVH; - uint16_t RESERVED4; - __IO uint16_t DIVL; - uint16_t RESERVED5; - __IO uint16_t CNTH; - uint16_t RESERVED6; - __IO uint16_t CNTL; - uint16_t RESERVED7; - __IO uint16_t ALRH; - uint16_t RESERVED8; - __IO uint16_t ALRL; - uint16_t RESERVED9; -} RTC_TypeDef; - -/** - * @brief SD host Interface - */ - -typedef struct -{ - __IO uint32_t POWER; - __IO uint32_t CLKCR; - __IO uint32_t ARG; - __IO uint32_t CMD; - __I uint32_t RESPCMD; - __I uint32_t RESP1; - __I uint32_t RESP2; - __I uint32_t RESP3; - __I uint32_t RESP4; - __IO uint32_t DTIMER; - __IO uint32_t DLEN; - __IO uint32_t DCTRL; - __I uint32_t DCOUNT; - __I uint32_t STA; - __IO uint32_t ICR; - __IO uint32_t MASK; - uint32_t RESERVED0[2]; - __I uint32_t FIFOCNT; - uint32_t RESERVED1[13]; - __IO uint32_t FIFO; -} SDIO_TypeDef; - -/** - * @brief Serial Peripheral Interface - */ - -typedef struct -{ - __IO uint16_t CR1; - uint16_t RESERVED0; - __IO uint16_t CR2; - uint16_t RESERVED1; - __IO uint16_t SR; - uint16_t RESERVED2; - __IO uint16_t DR; - uint16_t RESERVED3; - __IO uint16_t CRCPR; - uint16_t RESERVED4; - __IO uint16_t RXCRCR; - uint16_t RESERVED5; - __IO uint16_t TXCRCR; - uint16_t RESERVED6; - __IO uint16_t I2SCFGR; - uint16_t RESERVED7; - __IO uint16_t I2SPR; - uint16_t RESERVED8; -} SPI_TypeDef; - -/** - * @brief TIM - */ - -typedef struct -{ - __IO uint16_t CR1; - uint16_t RESERVED0; - __IO uint16_t CR2; - uint16_t RESERVED1; - __IO uint16_t SMCR; - uint16_t RESERVED2; - __IO uint16_t DIER; - uint16_t RESERVED3; - __IO uint16_t SR; - uint16_t RESERVED4; - __IO uint16_t EGR; - uint16_t RESERVED5; - __IO uint16_t CCMR1; - uint16_t RESERVED6; - __IO uint16_t CCMR2; - uint16_t RESERVED7; - __IO uint16_t CCER; - uint16_t RESERVED8; - __IO uint16_t CNT; - uint16_t RESERVED9; - __IO uint16_t PSC; - uint16_t RESERVED10; - __IO uint16_t ARR; - uint16_t RESERVED11; - __IO uint16_t RCR; - uint16_t RESERVED12; - __IO uint16_t CCR1; - uint16_t RESERVED13; - __IO uint16_t CCR2; - uint16_t RESERVED14; - __IO uint16_t CCR3; - uint16_t RESERVED15; - __IO uint16_t CCR4; - uint16_t RESERVED16; - __IO uint16_t BDTR; - uint16_t RESERVED17; - __IO uint16_t DCR; - uint16_t RESERVED18; - __IO uint16_t DMAR; - uint16_t RESERVED19; -} TIM_TypeDef; - -/** - * @brief Universal Synchronous Asynchronous Receiver Transmitter - */ - -typedef struct -{ - __IO uint16_t SR; - uint16_t RESERVED0; - __IO uint16_t DR; - uint16_t RESERVED1; - __IO uint16_t BRR; - uint16_t RESERVED2; - __IO uint16_t CR1; - uint16_t RESERVED3; - __IO uint16_t CR2; - uint16_t RESERVED4; - __IO uint16_t CR3; - uint16_t RESERVED5; - __IO uint16_t GTPR; - uint16_t RESERVED6; -} USART_TypeDef; - -/** - * @brief Window WATCHDOG - */ - -typedef struct -{ - __IO uint32_t CR; - __IO uint32_t CFR; - __IO uint32_t SR; -} WWDG_TypeDef; - -/** - * @} - */ - -/** @addtogroup Peripheral_memory_map - * @{ - */ - - -#define FLASH_BASE ((uint32_t)0x08000000) /*!< FLASH base address in the alias region */ -#define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM base address in the alias region */ -#define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripheral base address in the alias region */ - -#define SRAM_BB_BASE ((uint32_t)0x22000000) /*!< SRAM base address in the bit-band region */ -#define PERIPH_BB_BASE ((uint32_t)0x42000000) /*!< Peripheral base address in the bit-band region */ - -#define FSMC_R_BASE ((uint32_t)0xA0000000) /*!< FSMC registers base address */ - -/*!< Peripheral memory map */ -#define APB1PERIPH_BASE PERIPH_BASE -#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) -#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) - -#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) -#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) -#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) -#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) -#define TIM6_BASE (APB1PERIPH_BASE + 0x1000) -#define TIM7_BASE (APB1PERIPH_BASE + 0x1400) -#define TIM12_BASE (APB1PERIPH_BASE + 0x1800) -#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00) -#define TIM14_BASE (APB1PERIPH_BASE + 0x2000) -#define RTC_BASE (APB1PERIPH_BASE + 0x2800) -#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) -#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) -#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) -#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) -#define USART2_BASE (APB1PERIPH_BASE + 0x4400) -#define USART3_BASE (APB1PERIPH_BASE + 0x4800) -#define UART4_BASE (APB1PERIPH_BASE + 0x4C00) -#define UART5_BASE (APB1PERIPH_BASE + 0x5000) -#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) -#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) -#define CAN1_BASE (APB1PERIPH_BASE + 0x6400) -#define CAN2_BASE (APB1PERIPH_BASE + 0x6800) -#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) -#define PWR_BASE (APB1PERIPH_BASE + 0x7000) -#define DAC_BASE (APB1PERIPH_BASE + 0x7400) -#define CEC_BASE (APB1PERIPH_BASE + 0x7800) - -#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) -#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) -#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) -#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) -#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) -#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) -#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) -#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00) -#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000) -#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) -#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) -#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) -#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) -#define TIM8_BASE (APB2PERIPH_BASE + 0x3400) -#define USART1_BASE (APB2PERIPH_BASE + 0x3800) -#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00) -#define TIM15_BASE (APB2PERIPH_BASE + 0x4000) -#define TIM16_BASE (APB2PERIPH_BASE + 0x4400) -#define TIM17_BASE (APB2PERIPH_BASE + 0x4800) -#define TIM9_BASE (APB2PERIPH_BASE + 0x4C00) -#define TIM10_BASE (APB2PERIPH_BASE + 0x5000) -#define TIM11_BASE (APB2PERIPH_BASE + 0x5400) - -#define SDIO_BASE (PERIPH_BASE + 0x18000) - -#define DMA1_BASE (AHBPERIPH_BASE + 0x0000) -#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008) -#define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) -#define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030) -#define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044) -#define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058) -#define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C) -#define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) -#define DMA2_BASE (AHBPERIPH_BASE + 0x0400) -#define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408) -#define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C) -#define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430) -#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) -#define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458) -#define RCC_BASE (AHBPERIPH_BASE + 0x1000) -#define CRC_BASE (AHBPERIPH_BASE + 0x3000) - -#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) /*!< Flash registers base address */ -#define OB_BASE ((uint32_t)0x1FFFF800) /*!< Flash Option Bytes base address */ - -#define ETH_BASE (AHBPERIPH_BASE + 0x8000) -#define ETH_MAC_BASE (ETH_BASE) -#define ETH_MMC_BASE (ETH_BASE + 0x0100) -#define ETH_PTP_BASE (ETH_BASE + 0x0700) -#define ETH_DMA_BASE (ETH_BASE + 0x1000) - -#define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) /*!< FSMC Bank1 registers base address */ -#define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) /*!< FSMC Bank1E registers base address */ -#define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) /*!< FSMC Bank2 registers base address */ -#define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) /*!< FSMC Bank3 registers base address */ -#define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) /*!< FSMC Bank4 registers base address */ - -#define DBGMCU_BASE ((uint32_t)0xE0042000) /*!< Debug MCU registers base address */ - -/** - * @} - */ - -/** @addtogroup Peripheral_declaration - * @{ - */ - -#define TIM2 ((TIM_TypeDef *) TIM2_BASE) -#define TIM3 ((TIM_TypeDef *) TIM3_BASE) -#define TIM4 ((TIM_TypeDef *) TIM4_BASE) -#define TIM5 ((TIM_TypeDef *) TIM5_BASE) -#define TIM6 ((TIM_TypeDef *) TIM6_BASE) -#define TIM7 ((TIM_TypeDef *) TIM7_BASE) -#define TIM12 ((TIM_TypeDef *) TIM12_BASE) -#define TIM13 ((TIM_TypeDef *) TIM13_BASE) -#define TIM14 ((TIM_TypeDef *) TIM14_BASE) -#define RTC ((RTC_TypeDef *) RTC_BASE) -#define WWDG ((WWDG_TypeDef *) WWDG_BASE) -#define IWDG ((IWDG_TypeDef *) IWDG_BASE) -#define SPI2 ((SPI_TypeDef *) SPI2_BASE) -#define SPI3 ((SPI_TypeDef *) SPI3_BASE) -#define USART2 ((USART_TypeDef *) USART2_BASE) -#define USART3 ((USART_TypeDef *) USART3_BASE) -#define UART4 ((USART_TypeDef *) UART4_BASE) -#define UART5 ((USART_TypeDef *) UART5_BASE) -#define I2C1 ((I2C_TypeDef *) I2C1_BASE) -#define I2C2 ((I2C_TypeDef *) I2C2_BASE) -#define CAN1 ((CAN_TypeDef *) CAN1_BASE) -#define CAN2 ((CAN_TypeDef *) CAN2_BASE) -#define BKP ((BKP_TypeDef *) BKP_BASE) -#define PWR ((PWR_TypeDef *) PWR_BASE) -#define DAC ((DAC_TypeDef *) DAC_BASE) -#define CEC ((CEC_TypeDef *) CEC_BASE) -#define AFIO ((AFIO_TypeDef *) AFIO_BASE) -#define EXTI ((EXTI_TypeDef *) EXTI_BASE) -#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) -#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) -#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) -#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) -#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) -#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) -#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) -#define ADC1 ((ADC_TypeDef *) ADC1_BASE) -#define ADC2 ((ADC_TypeDef *) ADC2_BASE) -#define TIM1 ((TIM_TypeDef *) TIM1_BASE) -#define SPI1 ((SPI_TypeDef *) SPI1_BASE) -#define TIM8 ((TIM_TypeDef *) TIM8_BASE) -#define USART1 ((USART_TypeDef *) USART1_BASE) -#define ADC3 ((ADC_TypeDef *) ADC3_BASE) -#define TIM15 ((TIM_TypeDef *) TIM15_BASE) -#define TIM16 ((TIM_TypeDef *) TIM16_BASE) -#define TIM17 ((TIM_TypeDef *) TIM17_BASE) -#define TIM9 ((TIM_TypeDef *) TIM9_BASE) -#define TIM10 ((TIM_TypeDef *) TIM10_BASE) -#define TIM11 ((TIM_TypeDef *) TIM11_BASE) -#define SDIO ((SDIO_TypeDef *) SDIO_BASE) -#define DMA1 ((DMA_TypeDef *) DMA1_BASE) -#define DMA2 ((DMA_TypeDef *) DMA2_BASE) -#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) -#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) -#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) -#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) -#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) -#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) -#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) -#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) -#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) -#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) -#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) -#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) -#define RCC ((RCC_TypeDef *) RCC_BASE) -#define CRC ((CRC_TypeDef *) CRC_BASE) -#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) -#define OB ((OB_TypeDef *) OB_BASE) -#define ETH ((ETH_TypeDef *) ETH_BASE) -#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE) -#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE) -#define FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE) -#define FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE) -#define FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE) -#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) - -/** - * @} - */ - -/** @addtogroup Exported_constants - * @{ - */ - - /** @addtogroup Peripheral_Registers_Bits_Definition - * @{ - */ - -/******************************************************************************/ -/* Peripheral Registers_Bits_Definition */ -/******************************************************************************/ - -/******************************************************************************/ -/* */ -/* CRC calculation unit */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for CRC_DR register *********************/ -#define CRC_DR_DR ((uint32_t)0xFFFFFFFF) /*!< Data register bits */ - - -/******************* Bit definition for CRC_IDR register ********************/ -#define CRC_IDR_IDR ((uint8_t)0xFF) /*!< General-purpose 8-bit data register bits */ - - -/******************** Bit definition for CRC_CR register ********************/ -#define CRC_CR_RESET ((uint8_t)0x01) /*!< RESET bit */ - -/******************************************************************************/ -/* */ -/* Power Control */ -/* */ -/******************************************************************************/ - -/******************** Bit definition for PWR_CR register ********************/ -#define PWR_CR_LPDS ((uint16_t)0x0001) /*!< Low-Power Deepsleep */ -#define PWR_CR_PDDS ((uint16_t)0x0002) /*!< Power Down Deepsleep */ -#define PWR_CR_CWUF ((uint16_t)0x0004) /*!< Clear Wakeup Flag */ -#define PWR_CR_CSBF ((uint16_t)0x0008) /*!< Clear Standby Flag */ -#define PWR_CR_PVDE ((uint16_t)0x0010) /*!< Power Voltage Detector Enable */ - -#define PWR_CR_PLS ((uint16_t)0x00E0) /*!< PLS[2:0] bits (PVD Level Selection) */ -#define PWR_CR_PLS_0 ((uint16_t)0x0020) /*!< Bit 0 */ -#define PWR_CR_PLS_1 ((uint16_t)0x0040) /*!< Bit 1 */ -#define PWR_CR_PLS_2 ((uint16_t)0x0080) /*!< Bit 2 */ - -/*!< PVD level configuration */ -#define PWR_CR_PLS_2V2 ((uint16_t)0x0000) /*!< PVD level 2.2V */ -#define PWR_CR_PLS_2V3 ((uint16_t)0x0020) /*!< PVD level 2.3V */ -#define PWR_CR_PLS_2V4 ((uint16_t)0x0040) /*!< PVD level 2.4V */ -#define PWR_CR_PLS_2V5 ((uint16_t)0x0060) /*!< PVD level 2.5V */ -#define PWR_CR_PLS_2V6 ((uint16_t)0x0080) /*!< PVD level 2.6V */ -#define PWR_CR_PLS_2V7 ((uint16_t)0x00A0) /*!< PVD level 2.7V */ -#define PWR_CR_PLS_2V8 ((uint16_t)0x00C0) /*!< PVD level 2.8V */ -#define PWR_CR_PLS_2V9 ((uint16_t)0x00E0) /*!< PVD level 2.9V */ - -#define PWR_CR_DBP ((uint16_t)0x0100) /*!< Disable Backup Domain write protection */ - - -/******************* Bit definition for PWR_CSR register ********************/ -#define PWR_CSR_WUF ((uint16_t)0x0001) /*!< Wakeup Flag */ -#define PWR_CSR_SBF ((uint16_t)0x0002) /*!< Standby Flag */ -#define PWR_CSR_PVDO ((uint16_t)0x0004) /*!< PVD Output */ -#define PWR_CSR_EWUP ((uint16_t)0x0100) /*!< Enable WKUP pin */ - -/******************************************************************************/ -/* */ -/* Backup registers */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for BKP_DR1 register ********************/ -#define BKP_DR1_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR2 register ********************/ -#define BKP_DR2_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR3 register ********************/ -#define BKP_DR3_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR4 register ********************/ -#define BKP_DR4_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR5 register ********************/ -#define BKP_DR5_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR6 register ********************/ -#define BKP_DR6_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR7 register ********************/ -#define BKP_DR7_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR8 register ********************/ -#define BKP_DR8_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR9 register ********************/ -#define BKP_DR9_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR10 register *******************/ -#define BKP_DR10_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR11 register *******************/ -#define BKP_DR11_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR12 register *******************/ -#define BKP_DR12_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR13 register *******************/ -#define BKP_DR13_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR14 register *******************/ -#define BKP_DR14_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR15 register *******************/ -#define BKP_DR15_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR16 register *******************/ -#define BKP_DR16_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR17 register *******************/ -#define BKP_DR17_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/****************** Bit definition for BKP_DR18 register ********************/ -#define BKP_DR18_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR19 register *******************/ -#define BKP_DR19_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR20 register *******************/ -#define BKP_DR20_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR21 register *******************/ -#define BKP_DR21_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR22 register *******************/ -#define BKP_DR22_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR23 register *******************/ -#define BKP_DR23_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR24 register *******************/ -#define BKP_DR24_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR25 register *******************/ -#define BKP_DR25_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR26 register *******************/ -#define BKP_DR26_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR27 register *******************/ -#define BKP_DR27_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR28 register *******************/ -#define BKP_DR28_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR29 register *******************/ -#define BKP_DR29_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR30 register *******************/ -#define BKP_DR30_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR31 register *******************/ -#define BKP_DR31_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR32 register *******************/ -#define BKP_DR32_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR33 register *******************/ -#define BKP_DR33_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR34 register *******************/ -#define BKP_DR34_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR35 register *******************/ -#define BKP_DR35_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR36 register *******************/ -#define BKP_DR36_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR37 register *******************/ -#define BKP_DR37_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR38 register *******************/ -#define BKP_DR38_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR39 register *******************/ -#define BKP_DR39_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR40 register *******************/ -#define BKP_DR40_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR41 register *******************/ -#define BKP_DR41_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/******************* Bit definition for BKP_DR42 register *******************/ -#define BKP_DR42_D ((uint16_t)0xFFFF) /*!< Backup data */ - -/****************** Bit definition for BKP_RTCCR register *******************/ -#define BKP_RTCCR_CAL ((uint16_t)0x007F) /*!< Calibration value */ -#define BKP_RTCCR_CCO ((uint16_t)0x0080) /*!< Calibration Clock Output */ -#define BKP_RTCCR_ASOE ((uint16_t)0x0100) /*!< Alarm or Second Output Enable */ -#define BKP_RTCCR_ASOS ((uint16_t)0x0200) /*!< Alarm or Second Output Selection */ - -/******************** Bit definition for BKP_CR register ********************/ -#define BKP_CR_TPE ((uint8_t)0x01) /*!< TAMPER pin enable */ -#define BKP_CR_TPAL ((uint8_t)0x02) /*!< TAMPER pin active level */ - -/******************* Bit definition for BKP_CSR register ********************/ -#define BKP_CSR_CTE ((uint16_t)0x0001) /*!< Clear Tamper event */ -#define BKP_CSR_CTI ((uint16_t)0x0002) /*!< Clear Tamper Interrupt */ -#define BKP_CSR_TPIE ((uint16_t)0x0004) /*!< TAMPER Pin interrupt enable */ -#define BKP_CSR_TEF ((uint16_t)0x0100) /*!< Tamper Event Flag */ -#define BKP_CSR_TIF ((uint16_t)0x0200) /*!< Tamper Interrupt Flag */ - -/******************************************************************************/ -/* */ -/* Reset and Clock Control */ -/* */ -/******************************************************************************/ - -/******************** Bit definition for RCC_CR register ********************/ -#define RCC_CR_HSION ((uint32_t)0x00000001) /*!< Internal High Speed clock enable */ -#define RCC_CR_HSIRDY ((uint32_t)0x00000002) /*!< Internal High Speed clock ready flag */ -#define RCC_CR_HSITRIM ((uint32_t)0x000000F8) /*!< Internal High Speed clock trimming */ -#define RCC_CR_HSICAL ((uint32_t)0x0000FF00) /*!< Internal High Speed clock Calibration */ -#define RCC_CR_HSEON ((uint32_t)0x00010000) /*!< External High Speed clock enable */ -#define RCC_CR_HSERDY ((uint32_t)0x00020000) /*!< External High Speed clock ready flag */ -#define RCC_CR_HSEBYP ((uint32_t)0x00040000) /*!< External High Speed clock Bypass */ -#define RCC_CR_CSSON ((uint32_t)0x00080000) /*!< Clock Security System enable */ -#define RCC_CR_PLLON ((uint32_t)0x01000000) /*!< PLL enable */ -#define RCC_CR_PLLRDY ((uint32_t)0x02000000) /*!< PLL clock ready flag */ - -#ifdef STM32F10X_CL - #define RCC_CR_PLL2ON ((uint32_t)0x04000000) /*!< PLL2 enable */ - #define RCC_CR_PLL2RDY ((uint32_t)0x08000000) /*!< PLL2 clock ready flag */ - #define RCC_CR_PLL3ON ((uint32_t)0x10000000) /*!< PLL3 enable */ - #define RCC_CR_PLL3RDY ((uint32_t)0x20000000) /*!< PLL3 clock ready flag */ -#endif /* STM32F10X_CL */ - -/******************* Bit definition for RCC_CFGR register *******************/ -/*!< SW configuration */ -#define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (System clock Switch) */ -#define RCC_CFGR_SW_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define RCC_CFGR_SW_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - -#define RCC_CFGR_SW_HSI ((uint32_t)0x00000000) /*!< HSI selected as system clock */ -#define RCC_CFGR_SW_HSE ((uint32_t)0x00000001) /*!< HSE selected as system clock */ -#define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as system clock */ - -/*!< SWS configuration */ -#define RCC_CFGR_SWS ((uint32_t)0x0000000C) /*!< SWS[1:0] bits (System Clock Switch Status) */ -#define RCC_CFGR_SWS_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define RCC_CFGR_SWS_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) /*!< HSI oscillator used as system clock */ -#define RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) /*!< HSE oscillator used as system clock */ -#define RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) /*!< PLL used as system clock */ - -/*!< HPRE configuration */ -#define RCC_CFGR_HPRE ((uint32_t)0x000000F0) /*!< HPRE[3:0] bits (AHB prescaler) */ -#define RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) /*!< SYSCLK not divided */ -#define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2 */ -#define RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) /*!< SYSCLK divided by 4 */ -#define RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) /*!< SYSCLK divided by 8 */ -#define RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) /*!< SYSCLK divided by 16 */ -#define RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) /*!< SYSCLK divided by 64 */ -#define RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) /*!< SYSCLK divided by 128 */ -#define RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) /*!< SYSCLK divided by 256 */ -#define RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) /*!< SYSCLK divided by 512 */ - -/*!< PPRE1 configuration */ -#define RCC_CFGR_PPRE1 ((uint32_t)0x00000700) /*!< PRE1[2:0] bits (APB1 prescaler) */ -#define RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ - -#define RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ -#define RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400) /*!< HCLK divided by 2 */ -#define RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500) /*!< HCLK divided by 4 */ -#define RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600) /*!< HCLK divided by 8 */ -#define RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) /*!< HCLK divided by 16 */ - -/*!< PPRE2 configuration */ -#define RCC_CFGR_PPRE2 ((uint32_t)0x00003800) /*!< PRE2[2:0] bits (APB2 prescaler) */ -#define RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800) /*!< Bit 0 */ -#define RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000) /*!< Bit 1 */ -#define RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000) /*!< Bit 2 */ - -#define RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ -#define RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000) /*!< HCLK divided by 2 */ -#define RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800) /*!< HCLK divided by 4 */ -#define RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000) /*!< HCLK divided by 8 */ -#define RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800) /*!< HCLK divided by 16 */ - -/*!< ADCPPRE configuration */ -#define RCC_CFGR_ADCPRE ((uint32_t)0x0000C000) /*!< ADCPRE[1:0] bits (ADC prescaler) */ -#define RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000) /*!< Bit 0 */ -#define RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000) /*!< Bit 1 */ - -#define RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000) /*!< PCLK2 divided by 2 */ -#define RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000) /*!< PCLK2 divided by 4 */ -#define RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000) /*!< PCLK2 divided by 6 */ -#define RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000) /*!< PCLK2 divided by 8 */ - -#define RCC_CFGR_PLLSRC ((uint32_t)0x00010000) /*!< PLL entry clock source */ - -#define RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000) /*!< HSE divider for PLL entry */ - -/*!< PLLMUL configuration */ -#define RCC_CFGR_PLLMULL ((uint32_t)0x003C0000) /*!< PLLMUL[3:0] bits (PLL multiplication factor) */ -#define RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000) /*!< Bit 1 */ -#define RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000) /*!< Bit 2 */ -#define RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000) /*!< Bit 3 */ - -#ifdef STM32F10X_CL - #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ - #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ - - #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ - #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ - - #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock * 4 */ - #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock * 5 */ - #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock * 6 */ - #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock * 7 */ - #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock * 8 */ - #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock * 9 */ - #define RCC_CFGR_PLLMULL6_5 ((uint32_t)0x00340000) /*!< PLL input clock * 6.5 */ - - #define RCC_CFGR_OTGFSPRE ((uint32_t)0x00400000) /*!< USB OTG FS prescaler */ - -/*!< MCO configuration */ - #define RCC_CFGR_MCO ((uint32_t)0x0F000000) /*!< MCO[3:0] bits (Microcontroller Clock Output) */ - #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ - #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - #define RCC_CFGR_MCO_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - - #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ - #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ - #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ - #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ - #define RCC_CFGR_MCO_PLLCLK_Div2 ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ - #define RCC_CFGR_MCO_PLL2CLK ((uint32_t)0x08000000) /*!< PLL2 clock selected as MCO source*/ - #define RCC_CFGR_MCO_PLL3CLK_Div2 ((uint32_t)0x09000000) /*!< PLL3 clock divided by 2 selected as MCO source*/ - #define RCC_CFGR_MCO_Ext_HSE ((uint32_t)0x0A000000) /*!< XT1 external 3-25 MHz oscillator clock selected as MCO source */ - #define RCC_CFGR_MCO_PLL3CLK ((uint32_t)0x0B000000) /*!< PLL3 clock selected as MCO source */ -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ - #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ - - #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ - #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ - - #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ - #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ - #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ - #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ - #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ - #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ - #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ - #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ - #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ - #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ - #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ - #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ - #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ - #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ - #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ - -/*!< MCO configuration */ - #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ - #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ - #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - - #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ - #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ - #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ - #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ - #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ -#else - #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ - #define RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000) /*!< HSE clock selected as PLL entry clock source */ - - #define RCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000) /*!< HSE clock not divided for PLL entry */ - #define RCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) /*!< HSE clock divided by 2 for PLL entry */ - - #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ - #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ - #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ - #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ - #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ - #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ - #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ - #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ - #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ - #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ - #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ - #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ - #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ - #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ - #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ - #define RCC_CFGR_USBPRE ((uint32_t)0x00400000) /*!< USB Device prescaler */ - -/*!< MCO configuration */ - #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ - #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ - #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - - #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ - #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ - #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ - #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ - #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ -#endif /* STM32F10X_CL */ - -/*!<****************** Bit definition for RCC_CIR register ********************/ -#define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) /*!< LSI Ready Interrupt flag */ -#define RCC_CIR_LSERDYF ((uint32_t)0x00000002) /*!< LSE Ready Interrupt flag */ -#define RCC_CIR_HSIRDYF ((uint32_t)0x00000004) /*!< HSI Ready Interrupt flag */ -#define RCC_CIR_HSERDYF ((uint32_t)0x00000008) /*!< HSE Ready Interrupt flag */ -#define RCC_CIR_PLLRDYF ((uint32_t)0x00000010) /*!< PLL Ready Interrupt flag */ -#define RCC_CIR_CSSF ((uint32_t)0x00000080) /*!< Clock Security System Interrupt flag */ -#define RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) /*!< LSI Ready Interrupt Enable */ -#define RCC_CIR_LSERDYIE ((uint32_t)0x00000200) /*!< LSE Ready Interrupt Enable */ -#define RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) /*!< HSI Ready Interrupt Enable */ -#define RCC_CIR_HSERDYIE ((uint32_t)0x00000800) /*!< HSE Ready Interrupt Enable */ -#define RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) /*!< PLL Ready Interrupt Enable */ -#define RCC_CIR_LSIRDYC ((uint32_t)0x00010000) /*!< LSI Ready Interrupt Clear */ -#define RCC_CIR_LSERDYC ((uint32_t)0x00020000) /*!< LSE Ready Interrupt Clear */ -#define RCC_CIR_HSIRDYC ((uint32_t)0x00040000) /*!< HSI Ready Interrupt Clear */ -#define RCC_CIR_HSERDYC ((uint32_t)0x00080000) /*!< HSE Ready Interrupt Clear */ -#define RCC_CIR_PLLRDYC ((uint32_t)0x00100000) /*!< PLL Ready Interrupt Clear */ -#define RCC_CIR_CSSC ((uint32_t)0x00800000) /*!< Clock Security System Interrupt Clear */ - -#ifdef STM32F10X_CL - #define RCC_CIR_PLL2RDYF ((uint32_t)0x00000020) /*!< PLL2 Ready Interrupt flag */ - #define RCC_CIR_PLL3RDYF ((uint32_t)0x00000040) /*!< PLL3 Ready Interrupt flag */ - #define RCC_CIR_PLL2RDYIE ((uint32_t)0x00002000) /*!< PLL2 Ready Interrupt Enable */ - #define RCC_CIR_PLL3RDYIE ((uint32_t)0x00004000) /*!< PLL3 Ready Interrupt Enable */ - #define RCC_CIR_PLL2RDYC ((uint32_t)0x00200000) /*!< PLL2 Ready Interrupt Clear */ - #define RCC_CIR_PLL3RDYC ((uint32_t)0x00400000) /*!< PLL3 Ready Interrupt Clear */ -#endif /* STM32F10X_CL */ - -/***************** Bit definition for RCC_APB2RSTR register *****************/ -#define RCC_APB2RSTR_AFIORST ((uint32_t)0x00000001) /*!< Alternate Function I/O reset */ -#define RCC_APB2RSTR_IOPARST ((uint32_t)0x00000004) /*!< I/O port A reset */ -#define RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008) /*!< I/O port B reset */ -#define RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010) /*!< I/O port C reset */ -#define RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020) /*!< I/O port D reset */ -#define RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200) /*!< ADC 1 interface reset */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) -#define RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400) /*!< ADC 2 interface reset */ -#endif - -#define RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800) /*!< TIM1 Timer reset */ -#define RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) /*!< SPI 1 reset */ -#define RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000) /*!< USART1 reset */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -#define RCC_APB2RSTR_TIM15RST ((uint32_t)0x00010000) /*!< TIM15 Timer reset */ -#define RCC_APB2RSTR_TIM16RST ((uint32_t)0x00020000) /*!< TIM16 Timer reset */ -#define RCC_APB2RSTR_TIM17RST ((uint32_t)0x00040000) /*!< TIM17 Timer reset */ -#endif - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040) /*!< I/O port E reset */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_XL) - #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ - #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ - #define RCC_APB2RSTR_TIM8RST ((uint32_t)0x00002000) /*!< TIM8 Timer reset */ - #define RCC_APB2RSTR_ADC3RST ((uint32_t)0x00008000) /*!< ADC3 interface reset */ -#endif - -#if defined (STM32F10X_HD_VL) - #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ - #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ -#endif - -#ifdef STM32F10X_XL - #define RCC_APB2RSTR_TIM9RST ((uint32_t)0x00080000) /*!< TIM9 Timer reset */ - #define RCC_APB2RSTR_TIM10RST ((uint32_t)0x00100000) /*!< TIM10 Timer reset */ - #define RCC_APB2RSTR_TIM11RST ((uint32_t)0x00200000) /*!< TIM11 Timer reset */ -#endif /* STM32F10X_XL */ - -/***************** Bit definition for RCC_APB1RSTR register *****************/ -#define RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) /*!< Timer 2 reset */ -#define RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) /*!< Timer 3 reset */ -#define RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) /*!< Window Watchdog reset */ -#define RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) /*!< USART 2 reset */ -#define RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) /*!< I2C 1 reset */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) -#define RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) /*!< CAN1 reset */ -#endif - -#define RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000) /*!< Backup interface reset */ -#define RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) /*!< Power interface reset */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) /*!< Timer 4 reset */ - #define RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) /*!< SPI 2 reset */ - #define RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) /*!< USART 3 reset */ - #define RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) /*!< I2C 2 reset */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) || defined (STM32F10X_XL) - #define RCC_APB1RSTR_USBRST ((uint32_t)0x00800000) /*!< USB Device reset */ -#endif - -#if defined (STM32F10X_HD) || defined (STM32F10X_CL) || defined (STM32F10X_XL) - #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ - #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ - #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ - #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ - #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ - #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ - #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ -#endif - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ - #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ - #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ - #define RCC_APB1RSTR_CECRST ((uint32_t)0x40000000) /*!< CEC interface reset */ -#endif - -#if defined (STM32F10X_HD_VL) - #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ - #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) /*!< TIM12 Timer reset */ - #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) /*!< TIM13 Timer reset */ - #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) /*!< TIM14 Timer reset */ - #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ - #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ - #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ -#endif - -#ifdef STM32F10X_CL - #define RCC_APB1RSTR_CAN2RST ((uint32_t)0x04000000) /*!< CAN2 reset */ -#endif /* STM32F10X_CL */ - -#ifdef STM32F10X_XL - #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) /*!< TIM12 Timer reset */ - #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) /*!< TIM13 Timer reset */ - #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) /*!< TIM14 Timer reset */ -#endif /* STM32F10X_XL */ - -/****************** Bit definition for RCC_AHBENR register ******************/ -#define RCC_AHBENR_DMA1EN ((uint16_t)0x0001) /*!< DMA1 clock enable */ -#define RCC_AHBENR_SRAMEN ((uint16_t)0x0004) /*!< SRAM interface clock enable */ -#define RCC_AHBENR_FLITFEN ((uint16_t)0x0010) /*!< FLITF clock enable */ -#define RCC_AHBENR_CRCEN ((uint16_t)0x0040) /*!< CRC clock enable */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_CL) || defined (STM32F10X_HD_VL) - #define RCC_AHBENR_DMA2EN ((uint16_t)0x0002) /*!< DMA2 clock enable */ -#endif - -#if defined (STM32F10X_HD) || defined (STM32F10X_XL) - #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ - #define RCC_AHBENR_SDIOEN ((uint16_t)0x0400) /*!< SDIO clock enable */ -#endif - -#if defined (STM32F10X_HD_VL) - #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ -#endif - -#ifdef STM32F10X_CL - #define RCC_AHBENR_OTGFSEN ((uint32_t)0x00001000) /*!< USB OTG FS clock enable */ - #define RCC_AHBENR_ETHMACEN ((uint32_t)0x00004000) /*!< ETHERNET MAC clock enable */ - #define RCC_AHBENR_ETHMACTXEN ((uint32_t)0x00008000) /*!< ETHERNET MAC Tx clock enable */ - #define RCC_AHBENR_ETHMACRXEN ((uint32_t)0x00010000) /*!< ETHERNET MAC Rx clock enable */ -#endif /* STM32F10X_CL */ - -/****************** Bit definition for RCC_APB2ENR register *****************/ -#define RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001) /*!< Alternate Function I/O clock enable */ -#define RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004) /*!< I/O port A clock enable */ -#define RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008) /*!< I/O port B clock enable */ -#define RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010) /*!< I/O port C clock enable */ -#define RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020) /*!< I/O port D clock enable */ -#define RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200) /*!< ADC 1 interface clock enable */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) -#define RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400) /*!< ADC 2 interface clock enable */ -#endif - -#define RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800) /*!< TIM1 Timer clock enable */ -#define RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) /*!< SPI 1 clock enable */ -#define RCC_APB2ENR_USART1EN ((uint32_t)0x00004000) /*!< USART1 clock enable */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -#define RCC_APB2ENR_TIM15EN ((uint32_t)0x00010000) /*!< TIM15 Timer clock enable */ -#define RCC_APB2ENR_TIM16EN ((uint32_t)0x00020000) /*!< TIM16 Timer clock enable */ -#define RCC_APB2ENR_TIM17EN ((uint32_t)0x00040000) /*!< TIM17 Timer clock enable */ -#endif - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040) /*!< I/O port E clock enable */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_XL) - #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ - #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ - #define RCC_APB2ENR_TIM8EN ((uint32_t)0x00002000) /*!< TIM8 Timer clock enable */ - #define RCC_APB2ENR_ADC3EN ((uint32_t)0x00008000) /*!< DMA1 clock enable */ -#endif - -#if defined (STM32F10X_HD_VL) - #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ - #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ -#endif - -#ifdef STM32F10X_XL - #define RCC_APB2ENR_TIM9EN ((uint32_t)0x00080000) /*!< TIM9 Timer clock enable */ - #define RCC_APB2ENR_TIM10EN ((uint32_t)0x00100000) /*!< TIM10 Timer clock enable */ - #define RCC_APB2ENR_TIM11EN ((uint32_t)0x00200000) /*!< TIM11 Timer clock enable */ -#endif - -/***************** Bit definition for RCC_APB1ENR register ******************/ -#define RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) /*!< Timer 2 clock enabled*/ -#define RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) /*!< Timer 3 clock enable */ -#define RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) /*!< Window Watchdog clock enable */ -#define RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) /*!< USART 2 clock enable */ -#define RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) /*!< I2C 1 clock enable */ - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) -#define RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) /*!< CAN1 clock enable */ -#endif - -#define RCC_APB1ENR_BKPEN ((uint32_t)0x08000000) /*!< Backup interface clock enable */ -#define RCC_APB1ENR_PWREN ((uint32_t)0x10000000) /*!< Power interface clock enable */ - -#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) - #define RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) /*!< Timer 4 clock enable */ - #define RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) /*!< SPI 2 clock enable */ - #define RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) /*!< USART 3 clock enable */ - #define RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) /*!< I2C 2 clock enable */ -#endif /* STM32F10X_LD && STM32F10X_LD_VL */ - -#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) - #define RCC_APB1ENR_USBEN ((uint32_t)0x00800000) /*!< USB Device clock enable */ -#endif - -#if defined (STM32F10X_HD) || defined (STM32F10X_CL) - #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ - #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ - #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ - #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ - #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ - #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ - #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ -#endif - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ - #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ - #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ - #define RCC_APB1ENR_CECEN ((uint32_t)0x40000000) /*!< CEC interface clock enable */ -#endif - -#ifdef STM32F10X_HD_VL - #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ - #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) /*!< TIM12 Timer clock enable */ - #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) /*!< TIM13 Timer clock enable */ - #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) /*!< TIM14 Timer clock enable */ - #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ - #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ - #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ -#endif /* STM32F10X_HD_VL */ - -#ifdef STM32F10X_CL - #define RCC_APB1ENR_CAN2EN ((uint32_t)0x04000000) /*!< CAN2 clock enable */ -#endif /* STM32F10X_CL */ - -#ifdef STM32F10X_XL - #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) /*!< TIM12 Timer clock enable */ - #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) /*!< TIM13 Timer clock enable */ - #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) /*!< TIM14 Timer clock enable */ -#endif /* STM32F10X_XL */ - -/******************* Bit definition for RCC_BDCR register *******************/ -#define RCC_BDCR_LSEON ((uint32_t)0x00000001) /*!< External Low Speed oscillator enable */ -#define RCC_BDCR_LSERDY ((uint32_t)0x00000002) /*!< External Low Speed oscillator Ready */ -#define RCC_BDCR_LSEBYP ((uint32_t)0x00000004) /*!< External Low Speed oscillator Bypass */ - -#define RCC_BDCR_RTCSEL ((uint32_t)0x00000300) /*!< RTCSEL[1:0] bits (RTC clock source selection) */ -#define RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -/*!< RTC congiguration */ -#define RCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ -#define RCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100) /*!< LSE oscillator clock used as RTC clock */ -#define RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200) /*!< LSI oscillator clock used as RTC clock */ -#define RCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300) /*!< HSE oscillator clock divided by 128 used as RTC clock */ - -#define RCC_BDCR_RTCEN ((uint32_t)0x00008000) /*!< RTC clock enable */ -#define RCC_BDCR_BDRST ((uint32_t)0x00010000) /*!< Backup domain software reset */ - -/******************* Bit definition for RCC_CSR register ********************/ -#define RCC_CSR_LSION ((uint32_t)0x00000001) /*!< Internal Low Speed oscillator enable */ -#define RCC_CSR_LSIRDY ((uint32_t)0x00000002) /*!< Internal Low Speed oscillator Ready */ -#define RCC_CSR_RMVF ((uint32_t)0x01000000) /*!< Remove reset flag */ -#define RCC_CSR_PINRSTF ((uint32_t)0x04000000) /*!< PIN reset flag */ -#define RCC_CSR_PORRSTF ((uint32_t)0x08000000) /*!< POR/PDR reset flag */ -#define RCC_CSR_SFTRSTF ((uint32_t)0x10000000) /*!< Software Reset flag */ -#define RCC_CSR_IWDGRSTF ((uint32_t)0x20000000) /*!< Independent Watchdog reset flag */ -#define RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) /*!< Window watchdog reset flag */ -#define RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) /*!< Low-Power reset flag */ - -#ifdef STM32F10X_CL -/******************* Bit definition for RCC_AHBRSTR register ****************/ - #define RCC_AHBRSTR_OTGFSRST ((uint32_t)0x00001000) /*!< USB OTG FS reset */ - #define RCC_AHBRSTR_ETHMACRST ((uint32_t)0x00004000) /*!< ETHERNET MAC reset */ - -/******************* Bit definition for RCC_CFGR2 register ******************/ -/*!< PREDIV1 configuration */ - #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ - #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ - #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ - #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - - #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ - #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ - #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ - #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ - #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ - #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ - #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ - #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ - #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ - #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ - #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ - #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ - #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ - #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ - #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ - #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ - -/*!< PREDIV2 configuration */ - #define RCC_CFGR2_PREDIV2 ((uint32_t)0x000000F0) /*!< PREDIV2[3:0] bits */ - #define RCC_CFGR2_PREDIV2_0 ((uint32_t)0x00000010) /*!< Bit 0 */ - #define RCC_CFGR2_PREDIV2_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - #define RCC_CFGR2_PREDIV2_2 ((uint32_t)0x00000040) /*!< Bit 2 */ - #define RCC_CFGR2_PREDIV2_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - - #define RCC_CFGR2_PREDIV2_DIV1 ((uint32_t)0x00000000) /*!< PREDIV2 input clock not divided */ - #define RCC_CFGR2_PREDIV2_DIV2 ((uint32_t)0x00000010) /*!< PREDIV2 input clock divided by 2 */ - #define RCC_CFGR2_PREDIV2_DIV3 ((uint32_t)0x00000020) /*!< PREDIV2 input clock divided by 3 */ - #define RCC_CFGR2_PREDIV2_DIV4 ((uint32_t)0x00000030) /*!< PREDIV2 input clock divided by 4 */ - #define RCC_CFGR2_PREDIV2_DIV5 ((uint32_t)0x00000040) /*!< PREDIV2 input clock divided by 5 */ - #define RCC_CFGR2_PREDIV2_DIV6 ((uint32_t)0x00000050) /*!< PREDIV2 input clock divided by 6 */ - #define RCC_CFGR2_PREDIV2_DIV7 ((uint32_t)0x00000060) /*!< PREDIV2 input clock divided by 7 */ - #define RCC_CFGR2_PREDIV2_DIV8 ((uint32_t)0x00000070) /*!< PREDIV2 input clock divided by 8 */ - #define RCC_CFGR2_PREDIV2_DIV9 ((uint32_t)0x00000080) /*!< PREDIV2 input clock divided by 9 */ - #define RCC_CFGR2_PREDIV2_DIV10 ((uint32_t)0x00000090) /*!< PREDIV2 input clock divided by 10 */ - #define RCC_CFGR2_PREDIV2_DIV11 ((uint32_t)0x000000A0) /*!< PREDIV2 input clock divided by 11 */ - #define RCC_CFGR2_PREDIV2_DIV12 ((uint32_t)0x000000B0) /*!< PREDIV2 input clock divided by 12 */ - #define RCC_CFGR2_PREDIV2_DIV13 ((uint32_t)0x000000C0) /*!< PREDIV2 input clock divided by 13 */ - #define RCC_CFGR2_PREDIV2_DIV14 ((uint32_t)0x000000D0) /*!< PREDIV2 input clock divided by 14 */ - #define RCC_CFGR2_PREDIV2_DIV15 ((uint32_t)0x000000E0) /*!< PREDIV2 input clock divided by 15 */ - #define RCC_CFGR2_PREDIV2_DIV16 ((uint32_t)0x000000F0) /*!< PREDIV2 input clock divided by 16 */ - -/*!< PLL2MUL configuration */ - #define RCC_CFGR2_PLL2MUL ((uint32_t)0x00000F00) /*!< PLL2MUL[3:0] bits */ - #define RCC_CFGR2_PLL2MUL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ - #define RCC_CFGR2_PLL2MUL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - #define RCC_CFGR2_PLL2MUL_2 ((uint32_t)0x00000400) /*!< Bit 2 */ - #define RCC_CFGR2_PLL2MUL_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - - #define RCC_CFGR2_PLL2MUL8 ((uint32_t)0x00000600) /*!< PLL2 input clock * 8 */ - #define RCC_CFGR2_PLL2MUL9 ((uint32_t)0x00000700) /*!< PLL2 input clock * 9 */ - #define RCC_CFGR2_PLL2MUL10 ((uint32_t)0x00000800) /*!< PLL2 input clock * 10 */ - #define RCC_CFGR2_PLL2MUL11 ((uint32_t)0x00000900) /*!< PLL2 input clock * 11 */ - #define RCC_CFGR2_PLL2MUL12 ((uint32_t)0x00000A00) /*!< PLL2 input clock * 12 */ - #define RCC_CFGR2_PLL2MUL13 ((uint32_t)0x00000B00) /*!< PLL2 input clock * 13 */ - #define RCC_CFGR2_PLL2MUL14 ((uint32_t)0x00000C00) /*!< PLL2 input clock * 14 */ - #define RCC_CFGR2_PLL2MUL16 ((uint32_t)0x00000E00) /*!< PLL2 input clock * 16 */ - #define RCC_CFGR2_PLL2MUL20 ((uint32_t)0x00000F00) /*!< PLL2 input clock * 20 */ - -/*!< PLL3MUL configuration */ - #define RCC_CFGR2_PLL3MUL ((uint32_t)0x0000F000) /*!< PLL3MUL[3:0] bits */ - #define RCC_CFGR2_PLL3MUL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ - #define RCC_CFGR2_PLL3MUL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ - #define RCC_CFGR2_PLL3MUL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ - #define RCC_CFGR2_PLL3MUL_3 ((uint32_t)0x00008000) /*!< Bit 3 */ - - #define RCC_CFGR2_PLL3MUL8 ((uint32_t)0x00006000) /*!< PLL3 input clock * 8 */ - #define RCC_CFGR2_PLL3MUL9 ((uint32_t)0x00007000) /*!< PLL3 input clock * 9 */ - #define RCC_CFGR2_PLL3MUL10 ((uint32_t)0x00008000) /*!< PLL3 input clock * 10 */ - #define RCC_CFGR2_PLL3MUL11 ((uint32_t)0x00009000) /*!< PLL3 input clock * 11 */ - #define RCC_CFGR2_PLL3MUL12 ((uint32_t)0x0000A000) /*!< PLL3 input clock * 12 */ - #define RCC_CFGR2_PLL3MUL13 ((uint32_t)0x0000B000) /*!< PLL3 input clock * 13 */ - #define RCC_CFGR2_PLL3MUL14 ((uint32_t)0x0000C000) /*!< PLL3 input clock * 14 */ - #define RCC_CFGR2_PLL3MUL16 ((uint32_t)0x0000E000) /*!< PLL3 input clock * 16 */ - #define RCC_CFGR2_PLL3MUL20 ((uint32_t)0x0000F000) /*!< PLL3 input clock * 20 */ - - #define RCC_CFGR2_PREDIV1SRC ((uint32_t)0x00010000) /*!< PREDIV1 entry clock source */ - #define RCC_CFGR2_PREDIV1SRC_PLL2 ((uint32_t)0x00010000) /*!< PLL2 selected as PREDIV1 entry clock source */ - #define RCC_CFGR2_PREDIV1SRC_HSE ((uint32_t)0x00000000) /*!< HSE selected as PREDIV1 entry clock source */ - #define RCC_CFGR2_I2S2SRC ((uint32_t)0x00020000) /*!< I2S2 entry clock source */ - #define RCC_CFGR2_I2S3SRC ((uint32_t)0x00040000) /*!< I2S3 clock source */ -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -/******************* Bit definition for RCC_CFGR2 register ******************/ -/*!< PREDIV1 configuration */ - #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ - #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ - #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ - #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - - #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ - #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ - #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ - #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ - #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ - #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ - #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ - #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ - #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ - #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ - #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ - #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ - #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ - #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ - #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ - #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ -#endif - -/******************************************************************************/ -/* */ -/* General Purpose and Alternate Function I/O */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for GPIO_CRL register *******************/ -#define GPIO_CRL_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ - -#define GPIO_CRL_MODE0 ((uint32_t)0x00000003) /*!< MODE0[1:0] bits (Port x mode bits, pin 0) */ -#define GPIO_CRL_MODE0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define GPIO_CRL_MODE0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - -#define GPIO_CRL_MODE1 ((uint32_t)0x00000030) /*!< MODE1[1:0] bits (Port x mode bits, pin 1) */ -#define GPIO_CRL_MODE1_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define GPIO_CRL_MODE1_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define GPIO_CRL_MODE2 ((uint32_t)0x00000300) /*!< MODE2[1:0] bits (Port x mode bits, pin 2) */ -#define GPIO_CRL_MODE2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define GPIO_CRL_MODE2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -#define GPIO_CRL_MODE3 ((uint32_t)0x00003000) /*!< MODE3[1:0] bits (Port x mode bits, pin 3) */ -#define GPIO_CRL_MODE3_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define GPIO_CRL_MODE3_1 ((uint32_t)0x00002000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE4 ((uint32_t)0x00030000) /*!< MODE4[1:0] bits (Port x mode bits, pin 4) */ -#define GPIO_CRL_MODE4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define GPIO_CRL_MODE4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE5 ((uint32_t)0x00300000) /*!< MODE5[1:0] bits (Port x mode bits, pin 5) */ -#define GPIO_CRL_MODE5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define GPIO_CRL_MODE5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE6 ((uint32_t)0x03000000) /*!< MODE6[1:0] bits (Port x mode bits, pin 6) */ -#define GPIO_CRL_MODE6_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define GPIO_CRL_MODE6_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - -#define GPIO_CRL_MODE7 ((uint32_t)0x30000000) /*!< MODE7[1:0] bits (Port x mode bits, pin 7) */ -#define GPIO_CRL_MODE7_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define GPIO_CRL_MODE7_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ - -#define GPIO_CRL_CNF0 ((uint32_t)0x0000000C) /*!< CNF0[1:0] bits (Port x configuration bits, pin 0) */ -#define GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define GPIO_CRL_CNF1 ((uint32_t)0x000000C0) /*!< CNF1[1:0] bits (Port x configuration bits, pin 1) */ -#define GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -#define GPIO_CRL_CNF2 ((uint32_t)0x00000C00) /*!< CNF2[1:0] bits (Port x configuration bits, pin 2) */ -#define GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) /*!< Bit 1 */ - -#define GPIO_CRL_CNF3 ((uint32_t)0x0000C000) /*!< CNF3[1:0] bits (Port x configuration bits, pin 3) */ -#define GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) /*!< Bit 0 */ -#define GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF4 ((uint32_t)0x000C0000) /*!< CNF4[1:0] bits (Port x configuration bits, pin 4) */ -#define GPIO_CRL_CNF4_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define GPIO_CRL_CNF4_1 ((uint32_t)0x00080000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF5 ((uint32_t)0x00C00000) /*!< CNF5[1:0] bits (Port x configuration bits, pin 5) */ -#define GPIO_CRL_CNF5_0 ((uint32_t)0x00400000) /*!< Bit 0 */ -#define GPIO_CRL_CNF5_1 ((uint32_t)0x00800000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF6 ((uint32_t)0x0C000000) /*!< CNF6[1:0] bits (Port x configuration bits, pin 6) */ -#define GPIO_CRL_CNF6_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define GPIO_CRL_CNF6_1 ((uint32_t)0x08000000) /*!< Bit 1 */ - -#define GPIO_CRL_CNF7 ((uint32_t)0xC0000000) /*!< CNF7[1:0] bits (Port x configuration bits, pin 7) */ -#define GPIO_CRL_CNF7_0 ((uint32_t)0x40000000) /*!< Bit 0 */ -#define GPIO_CRL_CNF7_1 ((uint32_t)0x80000000) /*!< Bit 1 */ - -/******************* Bit definition for GPIO_CRH register *******************/ -#define GPIO_CRH_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ - -#define GPIO_CRH_MODE8 ((uint32_t)0x00000003) /*!< MODE8[1:0] bits (Port x mode bits, pin 8) */ -#define GPIO_CRH_MODE8_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define GPIO_CRH_MODE8_1 ((uint32_t)0x00000002) /*!< Bit 1 */ - -#define GPIO_CRH_MODE9 ((uint32_t)0x00000030) /*!< MODE9[1:0] bits (Port x mode bits, pin 9) */ -#define GPIO_CRH_MODE9_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define GPIO_CRH_MODE9_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define GPIO_CRH_MODE10 ((uint32_t)0x00000300) /*!< MODE10[1:0] bits (Port x mode bits, pin 10) */ -#define GPIO_CRH_MODE10_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define GPIO_CRH_MODE10_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -#define GPIO_CRH_MODE11 ((uint32_t)0x00003000) /*!< MODE11[1:0] bits (Port x mode bits, pin 11) */ -#define GPIO_CRH_MODE11_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define GPIO_CRH_MODE11_1 ((uint32_t)0x00002000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE12 ((uint32_t)0x00030000) /*!< MODE12[1:0] bits (Port x mode bits, pin 12) */ -#define GPIO_CRH_MODE12_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define GPIO_CRH_MODE12_1 ((uint32_t)0x00020000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE13 ((uint32_t)0x00300000) /*!< MODE13[1:0] bits (Port x mode bits, pin 13) */ -#define GPIO_CRH_MODE13_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define GPIO_CRH_MODE13_1 ((uint32_t)0x00200000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE14 ((uint32_t)0x03000000) /*!< MODE14[1:0] bits (Port x mode bits, pin 14) */ -#define GPIO_CRH_MODE14_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define GPIO_CRH_MODE14_1 ((uint32_t)0x02000000) /*!< Bit 1 */ - -#define GPIO_CRH_MODE15 ((uint32_t)0x30000000) /*!< MODE15[1:0] bits (Port x mode bits, pin 15) */ -#define GPIO_CRH_MODE15_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define GPIO_CRH_MODE15_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ - -#define GPIO_CRH_CNF8 ((uint32_t)0x0000000C) /*!< CNF8[1:0] bits (Port x configuration bits, pin 8) */ -#define GPIO_CRH_CNF8_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define GPIO_CRH_CNF8_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define GPIO_CRH_CNF9 ((uint32_t)0x000000C0) /*!< CNF9[1:0] bits (Port x configuration bits, pin 9) */ -#define GPIO_CRH_CNF9_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define GPIO_CRH_CNF9_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -#define GPIO_CRH_CNF10 ((uint32_t)0x00000C00) /*!< CNF10[1:0] bits (Port x configuration bits, pin 10) */ -#define GPIO_CRH_CNF10_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define GPIO_CRH_CNF10_1 ((uint32_t)0x00000800) /*!< Bit 1 */ - -#define GPIO_CRH_CNF11 ((uint32_t)0x0000C000) /*!< CNF11[1:0] bits (Port x configuration bits, pin 11) */ -#define GPIO_CRH_CNF11_0 ((uint32_t)0x00004000) /*!< Bit 0 */ -#define GPIO_CRH_CNF11_1 ((uint32_t)0x00008000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF12 ((uint32_t)0x000C0000) /*!< CNF12[1:0] bits (Port x configuration bits, pin 12) */ -#define GPIO_CRH_CNF12_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define GPIO_CRH_CNF12_1 ((uint32_t)0x00080000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF13 ((uint32_t)0x00C00000) /*!< CNF13[1:0] bits (Port x configuration bits, pin 13) */ -#define GPIO_CRH_CNF13_0 ((uint32_t)0x00400000) /*!< Bit 0 */ -#define GPIO_CRH_CNF13_1 ((uint32_t)0x00800000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF14 ((uint32_t)0x0C000000) /*!< CNF14[1:0] bits (Port x configuration bits, pin 14) */ -#define GPIO_CRH_CNF14_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define GPIO_CRH_CNF14_1 ((uint32_t)0x08000000) /*!< Bit 1 */ - -#define GPIO_CRH_CNF15 ((uint32_t)0xC0000000) /*!< CNF15[1:0] bits (Port x configuration bits, pin 15) */ -#define GPIO_CRH_CNF15_0 ((uint32_t)0x40000000) /*!< Bit 0 */ -#define GPIO_CRH_CNF15_1 ((uint32_t)0x80000000) /*!< Bit 1 */ - -/*!<****************** Bit definition for GPIO_IDR register *******************/ -#define GPIO_IDR_IDR0 ((uint16_t)0x0001) /*!< Port input data, bit 0 */ -#define GPIO_IDR_IDR1 ((uint16_t)0x0002) /*!< Port input data, bit 1 */ -#define GPIO_IDR_IDR2 ((uint16_t)0x0004) /*!< Port input data, bit 2 */ -#define GPIO_IDR_IDR3 ((uint16_t)0x0008) /*!< Port input data, bit 3 */ -#define GPIO_IDR_IDR4 ((uint16_t)0x0010) /*!< Port input data, bit 4 */ -#define GPIO_IDR_IDR5 ((uint16_t)0x0020) /*!< Port input data, bit 5 */ -#define GPIO_IDR_IDR6 ((uint16_t)0x0040) /*!< Port input data, bit 6 */ -#define GPIO_IDR_IDR7 ((uint16_t)0x0080) /*!< Port input data, bit 7 */ -#define GPIO_IDR_IDR8 ((uint16_t)0x0100) /*!< Port input data, bit 8 */ -#define GPIO_IDR_IDR9 ((uint16_t)0x0200) /*!< Port input data, bit 9 */ -#define GPIO_IDR_IDR10 ((uint16_t)0x0400) /*!< Port input data, bit 10 */ -#define GPIO_IDR_IDR11 ((uint16_t)0x0800) /*!< Port input data, bit 11 */ -#define GPIO_IDR_IDR12 ((uint16_t)0x1000) /*!< Port input data, bit 12 */ -#define GPIO_IDR_IDR13 ((uint16_t)0x2000) /*!< Port input data, bit 13 */ -#define GPIO_IDR_IDR14 ((uint16_t)0x4000) /*!< Port input data, bit 14 */ -#define GPIO_IDR_IDR15 ((uint16_t)0x8000) /*!< Port input data, bit 15 */ - -/******************* Bit definition for GPIO_ODR register *******************/ -#define GPIO_ODR_ODR0 ((uint16_t)0x0001) /*!< Port output data, bit 0 */ -#define GPIO_ODR_ODR1 ((uint16_t)0x0002) /*!< Port output data, bit 1 */ -#define GPIO_ODR_ODR2 ((uint16_t)0x0004) /*!< Port output data, bit 2 */ -#define GPIO_ODR_ODR3 ((uint16_t)0x0008) /*!< Port output data, bit 3 */ -#define GPIO_ODR_ODR4 ((uint16_t)0x0010) /*!< Port output data, bit 4 */ -#define GPIO_ODR_ODR5 ((uint16_t)0x0020) /*!< Port output data, bit 5 */ -#define GPIO_ODR_ODR6 ((uint16_t)0x0040) /*!< Port output data, bit 6 */ -#define GPIO_ODR_ODR7 ((uint16_t)0x0080) /*!< Port output data, bit 7 */ -#define GPIO_ODR_ODR8 ((uint16_t)0x0100) /*!< Port output data, bit 8 */ -#define GPIO_ODR_ODR9 ((uint16_t)0x0200) /*!< Port output data, bit 9 */ -#define GPIO_ODR_ODR10 ((uint16_t)0x0400) /*!< Port output data, bit 10 */ -#define GPIO_ODR_ODR11 ((uint16_t)0x0800) /*!< Port output data, bit 11 */ -#define GPIO_ODR_ODR12 ((uint16_t)0x1000) /*!< Port output data, bit 12 */ -#define GPIO_ODR_ODR13 ((uint16_t)0x2000) /*!< Port output data, bit 13 */ -#define GPIO_ODR_ODR14 ((uint16_t)0x4000) /*!< Port output data, bit 14 */ -#define GPIO_ODR_ODR15 ((uint16_t)0x8000) /*!< Port output data, bit 15 */ - -/****************** Bit definition for GPIO_BSRR register *******************/ -#define GPIO_BSRR_BS0 ((uint32_t)0x00000001) /*!< Port x Set bit 0 */ -#define GPIO_BSRR_BS1 ((uint32_t)0x00000002) /*!< Port x Set bit 1 */ -#define GPIO_BSRR_BS2 ((uint32_t)0x00000004) /*!< Port x Set bit 2 */ -#define GPIO_BSRR_BS3 ((uint32_t)0x00000008) /*!< Port x Set bit 3 */ -#define GPIO_BSRR_BS4 ((uint32_t)0x00000010) /*!< Port x Set bit 4 */ -#define GPIO_BSRR_BS5 ((uint32_t)0x00000020) /*!< Port x Set bit 5 */ -#define GPIO_BSRR_BS6 ((uint32_t)0x00000040) /*!< Port x Set bit 6 */ -#define GPIO_BSRR_BS7 ((uint32_t)0x00000080) /*!< Port x Set bit 7 */ -#define GPIO_BSRR_BS8 ((uint32_t)0x00000100) /*!< Port x Set bit 8 */ -#define GPIO_BSRR_BS9 ((uint32_t)0x00000200) /*!< Port x Set bit 9 */ -#define GPIO_BSRR_BS10 ((uint32_t)0x00000400) /*!< Port x Set bit 10 */ -#define GPIO_BSRR_BS11 ((uint32_t)0x00000800) /*!< Port x Set bit 11 */ -#define GPIO_BSRR_BS12 ((uint32_t)0x00001000) /*!< Port x Set bit 12 */ -#define GPIO_BSRR_BS13 ((uint32_t)0x00002000) /*!< Port x Set bit 13 */ -#define GPIO_BSRR_BS14 ((uint32_t)0x00004000) /*!< Port x Set bit 14 */ -#define GPIO_BSRR_BS15 ((uint32_t)0x00008000) /*!< Port x Set bit 15 */ - -#define GPIO_BSRR_BR0 ((uint32_t)0x00010000) /*!< Port x Reset bit 0 */ -#define GPIO_BSRR_BR1 ((uint32_t)0x00020000) /*!< Port x Reset bit 1 */ -#define GPIO_BSRR_BR2 ((uint32_t)0x00040000) /*!< Port x Reset bit 2 */ -#define GPIO_BSRR_BR3 ((uint32_t)0x00080000) /*!< Port x Reset bit 3 */ -#define GPIO_BSRR_BR4 ((uint32_t)0x00100000) /*!< Port x Reset bit 4 */ -#define GPIO_BSRR_BR5 ((uint32_t)0x00200000) /*!< Port x Reset bit 5 */ -#define GPIO_BSRR_BR6 ((uint32_t)0x00400000) /*!< Port x Reset bit 6 */ -#define GPIO_BSRR_BR7 ((uint32_t)0x00800000) /*!< Port x Reset bit 7 */ -#define GPIO_BSRR_BR8 ((uint32_t)0x01000000) /*!< Port x Reset bit 8 */ -#define GPIO_BSRR_BR9 ((uint32_t)0x02000000) /*!< Port x Reset bit 9 */ -#define GPIO_BSRR_BR10 ((uint32_t)0x04000000) /*!< Port x Reset bit 10 */ -#define GPIO_BSRR_BR11 ((uint32_t)0x08000000) /*!< Port x Reset bit 11 */ -#define GPIO_BSRR_BR12 ((uint32_t)0x10000000) /*!< Port x Reset bit 12 */ -#define GPIO_BSRR_BR13 ((uint32_t)0x20000000) /*!< Port x Reset bit 13 */ -#define GPIO_BSRR_BR14 ((uint32_t)0x40000000) /*!< Port x Reset bit 14 */ -#define GPIO_BSRR_BR15 ((uint32_t)0x80000000) /*!< Port x Reset bit 15 */ - -/******************* Bit definition for GPIO_BRR register *******************/ -#define GPIO_BRR_BR0 ((uint16_t)0x0001) /*!< Port x Reset bit 0 */ -#define GPIO_BRR_BR1 ((uint16_t)0x0002) /*!< Port x Reset bit 1 */ -#define GPIO_BRR_BR2 ((uint16_t)0x0004) /*!< Port x Reset bit 2 */ -#define GPIO_BRR_BR3 ((uint16_t)0x0008) /*!< Port x Reset bit 3 */ -#define GPIO_BRR_BR4 ((uint16_t)0x0010) /*!< Port x Reset bit 4 */ -#define GPIO_BRR_BR5 ((uint16_t)0x0020) /*!< Port x Reset bit 5 */ -#define GPIO_BRR_BR6 ((uint16_t)0x0040) /*!< Port x Reset bit 6 */ -#define GPIO_BRR_BR7 ((uint16_t)0x0080) /*!< Port x Reset bit 7 */ -#define GPIO_BRR_BR8 ((uint16_t)0x0100) /*!< Port x Reset bit 8 */ -#define GPIO_BRR_BR9 ((uint16_t)0x0200) /*!< Port x Reset bit 9 */ -#define GPIO_BRR_BR10 ((uint16_t)0x0400) /*!< Port x Reset bit 10 */ -#define GPIO_BRR_BR11 ((uint16_t)0x0800) /*!< Port x Reset bit 11 */ -#define GPIO_BRR_BR12 ((uint16_t)0x1000) /*!< Port x Reset bit 12 */ -#define GPIO_BRR_BR13 ((uint16_t)0x2000) /*!< Port x Reset bit 13 */ -#define GPIO_BRR_BR14 ((uint16_t)0x4000) /*!< Port x Reset bit 14 */ -#define GPIO_BRR_BR15 ((uint16_t)0x8000) /*!< Port x Reset bit 15 */ - -/****************** Bit definition for GPIO_LCKR register *******************/ -#define GPIO_LCKR_LCK0 ((uint32_t)0x00000001) /*!< Port x Lock bit 0 */ -#define GPIO_LCKR_LCK1 ((uint32_t)0x00000002) /*!< Port x Lock bit 1 */ -#define GPIO_LCKR_LCK2 ((uint32_t)0x00000004) /*!< Port x Lock bit 2 */ -#define GPIO_LCKR_LCK3 ((uint32_t)0x00000008) /*!< Port x Lock bit 3 */ -#define GPIO_LCKR_LCK4 ((uint32_t)0x00000010) /*!< Port x Lock bit 4 */ -#define GPIO_LCKR_LCK5 ((uint32_t)0x00000020) /*!< Port x Lock bit 5 */ -#define GPIO_LCKR_LCK6 ((uint32_t)0x00000040) /*!< Port x Lock bit 6 */ -#define GPIO_LCKR_LCK7 ((uint32_t)0x00000080) /*!< Port x Lock bit 7 */ -#define GPIO_LCKR_LCK8 ((uint32_t)0x00000100) /*!< Port x Lock bit 8 */ -#define GPIO_LCKR_LCK9 ((uint32_t)0x00000200) /*!< Port x Lock bit 9 */ -#define GPIO_LCKR_LCK10 ((uint32_t)0x00000400) /*!< Port x Lock bit 10 */ -#define GPIO_LCKR_LCK11 ((uint32_t)0x00000800) /*!< Port x Lock bit 11 */ -#define GPIO_LCKR_LCK12 ((uint32_t)0x00001000) /*!< Port x Lock bit 12 */ -#define GPIO_LCKR_LCK13 ((uint32_t)0x00002000) /*!< Port x Lock bit 13 */ -#define GPIO_LCKR_LCK14 ((uint32_t)0x00004000) /*!< Port x Lock bit 14 */ -#define GPIO_LCKR_LCK15 ((uint32_t)0x00008000) /*!< Port x Lock bit 15 */ -#define GPIO_LCKR_LCKK ((uint32_t)0x00010000) /*!< Lock key */ - -/*----------------------------------------------------------------------------*/ - -/****************** Bit definition for AFIO_EVCR register *******************/ -#define AFIO_EVCR_PIN ((uint8_t)0x0F) /*!< PIN[3:0] bits (Pin selection) */ -#define AFIO_EVCR_PIN_0 ((uint8_t)0x01) /*!< Bit 0 */ -#define AFIO_EVCR_PIN_1 ((uint8_t)0x02) /*!< Bit 1 */ -#define AFIO_EVCR_PIN_2 ((uint8_t)0x04) /*!< Bit 2 */ -#define AFIO_EVCR_PIN_3 ((uint8_t)0x08) /*!< Bit 3 */ - -/*!< PIN configuration */ -#define AFIO_EVCR_PIN_PX0 ((uint8_t)0x00) /*!< Pin 0 selected */ -#define AFIO_EVCR_PIN_PX1 ((uint8_t)0x01) /*!< Pin 1 selected */ -#define AFIO_EVCR_PIN_PX2 ((uint8_t)0x02) /*!< Pin 2 selected */ -#define AFIO_EVCR_PIN_PX3 ((uint8_t)0x03) /*!< Pin 3 selected */ -#define AFIO_EVCR_PIN_PX4 ((uint8_t)0x04) /*!< Pin 4 selected */ -#define AFIO_EVCR_PIN_PX5 ((uint8_t)0x05) /*!< Pin 5 selected */ -#define AFIO_EVCR_PIN_PX6 ((uint8_t)0x06) /*!< Pin 6 selected */ -#define AFIO_EVCR_PIN_PX7 ((uint8_t)0x07) /*!< Pin 7 selected */ -#define AFIO_EVCR_PIN_PX8 ((uint8_t)0x08) /*!< Pin 8 selected */ -#define AFIO_EVCR_PIN_PX9 ((uint8_t)0x09) /*!< Pin 9 selected */ -#define AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A) /*!< Pin 10 selected */ -#define AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B) /*!< Pin 11 selected */ -#define AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C) /*!< Pin 12 selected */ -#define AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D) /*!< Pin 13 selected */ -#define AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E) /*!< Pin 14 selected */ -#define AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F) /*!< Pin 15 selected */ - -#define AFIO_EVCR_PORT ((uint8_t)0x70) /*!< PORT[2:0] bits (Port selection) */ -#define AFIO_EVCR_PORT_0 ((uint8_t)0x10) /*!< Bit 0 */ -#define AFIO_EVCR_PORT_1 ((uint8_t)0x20) /*!< Bit 1 */ -#define AFIO_EVCR_PORT_2 ((uint8_t)0x40) /*!< Bit 2 */ - -/*!< PORT configuration */ -#define AFIO_EVCR_PORT_PA ((uint8_t)0x00) /*!< Port A selected */ -#define AFIO_EVCR_PORT_PB ((uint8_t)0x10) /*!< Port B selected */ -#define AFIO_EVCR_PORT_PC ((uint8_t)0x20) /*!< Port C selected */ -#define AFIO_EVCR_PORT_PD ((uint8_t)0x30) /*!< Port D selected */ -#define AFIO_EVCR_PORT_PE ((uint8_t)0x40) /*!< Port E selected */ - -#define AFIO_EVCR_EVOE ((uint8_t)0x80) /*!< Event Output Enable */ - -/****************** Bit definition for AFIO_MAPR register *******************/ -#define AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001) /*!< SPI1 remapping */ -#define AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002) /*!< I2C1 remapping */ -#define AFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004) /*!< USART1 remapping */ -#define AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008) /*!< USART2 remapping */ - -#define AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030) /*!< USART3_REMAP[1:0] bits (USART3 remapping) */ -#define AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -/* USART3_REMAP configuration */ -#define AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */ -#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) /*!< Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */ -#define AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) /*!< Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */ - -#define AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0) /*!< TIM1_REMAP[1:0] bits (TIM1 remapping) */ -#define AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -/*!< TIM1_REMAP configuration */ -#define AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15) */ -#define AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) /*!< Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1) */ -#define AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) /*!< Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12) */ - -#define AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300) /*!< TIM2_REMAP[1:0] bits (TIM2 remapping) */ -#define AFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define AFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ - -/*!< TIM2_REMAP configuration */ -#define AFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3) */ -#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) /*!< Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3) */ -#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) /*!< Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11) */ -#define AFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) /*!< Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11) */ - -#define AFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00) /*!< TIM3_REMAP[1:0] bits (TIM3 remapping) */ -#define AFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define AFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800) /*!< Bit 1 */ - -/*!< TIM3_REMAP configuration */ -#define AFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1) */ -#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) /*!< Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1) */ -#define AFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ - -#define AFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000) /*!< TIM4_REMAP bit (TIM4 remapping) */ - -#define AFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000) /*!< CAN_REMAP[1:0] bits (CAN Alternate function remapping) */ -#define AFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000) /*!< Bit 0 */ -#define AFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000) /*!< Bit 1 */ - -/*!< CAN_REMAP configuration */ -#define AFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) /*!< CANRX mapped to PA11, CANTX mapped to PA12 */ -#define AFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) /*!< CANRX mapped to PB8, CANTX mapped to PB9 */ -#define AFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) /*!< CANRX mapped to PD0, CANTX mapped to PD1 */ - -#define AFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000) /*!< Port D0/Port D1 mapping on OSC_IN/OSC_OUT */ -#define AFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000) /*!< TIM5 Channel4 Internal Remap */ -#define AFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) /*!< ADC 1 External Trigger Injected Conversion remapping */ -#define AFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) /*!< ADC 1 External Trigger Regular Conversion remapping */ -#define AFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) /*!< ADC 2 External Trigger Injected Conversion remapping */ -#define AFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) /*!< ADC 2 External Trigger Regular Conversion remapping */ - -/*!< SWJ_CFG configuration */ -#define AFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000) /*!< SWJ_CFG[2:0] bits (Serial Wire JTAG configuration) */ -#define AFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define AFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define AFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - -#define AFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000) /*!< Full SWJ (JTAG-DP + SW-DP) : Reset State */ -#define AFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) /*!< Full SWJ (JTAG-DP + SW-DP) but without JNTRST */ -#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) /*!< JTAG-DP Disabled and SW-DP Enabled */ -#define AFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000) /*!< JTAG-DP Disabled and SW-DP Disabled */ - -#ifdef STM32F10X_CL -/*!< ETH_REMAP configuration */ - #define AFIO_MAPR_ETH_REMAP ((uint32_t)0x00200000) /*!< SPI3_REMAP bit (Ethernet MAC I/O remapping) */ - -/*!< CAN2_REMAP configuration */ - #define AFIO_MAPR_CAN2_REMAP ((uint32_t)0x00400000) /*!< CAN2_REMAP bit (CAN2 I/O remapping) */ - -/*!< MII_RMII_SEL configuration */ - #define AFIO_MAPR_MII_RMII_SEL ((uint32_t)0x00800000) /*!< MII_RMII_SEL bit (Ethernet MII or RMII selection) */ - -/*!< SPI3_REMAP configuration */ - #define AFIO_MAPR_SPI3_REMAP ((uint32_t)0x10000000) /*!< SPI3_REMAP bit (SPI3 remapping) */ - -/*!< TIM2ITR1_IREMAP configuration */ - #define AFIO_MAPR_TIM2ITR1_IREMAP ((uint32_t)0x20000000) /*!< TIM2ITR1_IREMAP bit (TIM2 internal trigger 1 remapping) */ - -/*!< PTP_PPS_REMAP configuration */ - #define AFIO_MAPR_PTP_PPS_REMAP ((uint32_t)0x40000000) /*!< PTP_PPS_REMAP bit (Ethernet PTP PPS remapping) */ -#endif - -/***************** Bit definition for AFIO_EXTICR1 register *****************/ -#define AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) /*!< EXTI 0 configuration */ -#define AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) /*!< EXTI 1 configuration */ -#define AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) /*!< EXTI 2 configuration */ -#define AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) /*!< EXTI 3 configuration */ - -/*!< EXTI0 configuration */ -#define AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) /*!< PA[0] pin */ -#define AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) /*!< PB[0] pin */ -#define AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) /*!< PC[0] pin */ -#define AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) /*!< PD[0] pin */ -#define AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) /*!< PE[0] pin */ -#define AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) /*!< PF[0] pin */ -#define AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) /*!< PG[0] pin */ - -/*!< EXTI1 configuration */ -#define AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) /*!< PA[1] pin */ -#define AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) /*!< PB[1] pin */ -#define AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) /*!< PC[1] pin */ -#define AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) /*!< PD[1] pin */ -#define AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) /*!< PE[1] pin */ -#define AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) /*!< PF[1] pin */ -#define AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) /*!< PG[1] pin */ - -/*!< EXTI2 configuration */ -#define AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) /*!< PA[2] pin */ -#define AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) /*!< PB[2] pin */ -#define AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) /*!< PC[2] pin */ -#define AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) /*!< PD[2] pin */ -#define AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) /*!< PE[2] pin */ -#define AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) /*!< PF[2] pin */ -#define AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) /*!< PG[2] pin */ - -/*!< EXTI3 configuration */ -#define AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) /*!< PA[3] pin */ -#define AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) /*!< PB[3] pin */ -#define AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) /*!< PC[3] pin */ -#define AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) /*!< PD[3] pin */ -#define AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) /*!< PE[3] pin */ -#define AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) /*!< PF[3] pin */ -#define AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) /*!< PG[3] pin */ - -/***************** Bit definition for AFIO_EXTICR2 register *****************/ -#define AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) /*!< EXTI 4 configuration */ -#define AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) /*!< EXTI 5 configuration */ -#define AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) /*!< EXTI 6 configuration */ -#define AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) /*!< EXTI 7 configuration */ - -/*!< EXTI4 configuration */ -#define AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) /*!< PA[4] pin */ -#define AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) /*!< PB[4] pin */ -#define AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) /*!< PC[4] pin */ -#define AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) /*!< PD[4] pin */ -#define AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) /*!< PE[4] pin */ -#define AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) /*!< PF[4] pin */ -#define AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) /*!< PG[4] pin */ - -/* EXTI5 configuration */ -#define AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) /*!< PA[5] pin */ -#define AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) /*!< PB[5] pin */ -#define AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) /*!< PC[5] pin */ -#define AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) /*!< PD[5] pin */ -#define AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) /*!< PE[5] pin */ -#define AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) /*!< PF[5] pin */ -#define AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) /*!< PG[5] pin */ - -/*!< EXTI6 configuration */ -#define AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) /*!< PA[6] pin */ -#define AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) /*!< PB[6] pin */ -#define AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) /*!< PC[6] pin */ -#define AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) /*!< PD[6] pin */ -#define AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) /*!< PE[6] pin */ -#define AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) /*!< PF[6] pin */ -#define AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) /*!< PG[6] pin */ - -/*!< EXTI7 configuration */ -#define AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) /*!< PA[7] pin */ -#define AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) /*!< PB[7] pin */ -#define AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) /*!< PC[7] pin */ -#define AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) /*!< PD[7] pin */ -#define AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) /*!< PE[7] pin */ -#define AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) /*!< PF[7] pin */ -#define AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) /*!< PG[7] pin */ - -/***************** Bit definition for AFIO_EXTICR3 register *****************/ -#define AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) /*!< EXTI 8 configuration */ -#define AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) /*!< EXTI 9 configuration */ -#define AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) /*!< EXTI 10 configuration */ -#define AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) /*!< EXTI 11 configuration */ - -/*!< EXTI8 configuration */ -#define AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) /*!< PA[8] pin */ -#define AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) /*!< PB[8] pin */ -#define AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) /*!< PC[8] pin */ -#define AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) /*!< PD[8] pin */ -#define AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) /*!< PE[8] pin */ -#define AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) /*!< PF[8] pin */ -#define AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) /*!< PG[8] pin */ - -/*!< EXTI9 configuration */ -#define AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) /*!< PA[9] pin */ -#define AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) /*!< PB[9] pin */ -#define AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) /*!< PC[9] pin */ -#define AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) /*!< PD[9] pin */ -#define AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) /*!< PE[9] pin */ -#define AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) /*!< PF[9] pin */ -#define AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) /*!< PG[9] pin */ - -/*!< EXTI10 configuration */ -#define AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) /*!< PA[10] pin */ -#define AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) /*!< PB[10] pin */ -#define AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) /*!< PC[10] pin */ -#define AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) /*!< PD[10] pin */ -#define AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) /*!< PE[10] pin */ -#define AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) /*!< PF[10] pin */ -#define AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) /*!< PG[10] pin */ - -/*!< EXTI11 configuration */ -#define AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) /*!< PA[11] pin */ -#define AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) /*!< PB[11] pin */ -#define AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) /*!< PC[11] pin */ -#define AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) /*!< PD[11] pin */ -#define AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) /*!< PE[11] pin */ -#define AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) /*!< PF[11] pin */ -#define AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) /*!< PG[11] pin */ - -/***************** Bit definition for AFIO_EXTICR4 register *****************/ -#define AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) /*!< EXTI 12 configuration */ -#define AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) /*!< EXTI 13 configuration */ -#define AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) /*!< EXTI 14 configuration */ -#define AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) /*!< EXTI 15 configuration */ - -/* EXTI12 configuration */ -#define AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) /*!< PA[12] pin */ -#define AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) /*!< PB[12] pin */ -#define AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) /*!< PC[12] pin */ -#define AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) /*!< PD[12] pin */ -#define AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) /*!< PE[12] pin */ -#define AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) /*!< PF[12] pin */ -#define AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) /*!< PG[12] pin */ - -/* EXTI13 configuration */ -#define AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) /*!< PA[13] pin */ -#define AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) /*!< PB[13] pin */ -#define AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) /*!< PC[13] pin */ -#define AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) /*!< PD[13] pin */ -#define AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) /*!< PE[13] pin */ -#define AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) /*!< PF[13] pin */ -#define AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) /*!< PG[13] pin */ - -/*!< EXTI14 configuration */ -#define AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) /*!< PA[14] pin */ -#define AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) /*!< PB[14] pin */ -#define AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) /*!< PC[14] pin */ -#define AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) /*!< PD[14] pin */ -#define AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) /*!< PE[14] pin */ -#define AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) /*!< PF[14] pin */ -#define AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) /*!< PG[14] pin */ - -/*!< EXTI15 configuration */ -#define AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) /*!< PA[15] pin */ -#define AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) /*!< PB[15] pin */ -#define AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) /*!< PC[15] pin */ -#define AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) /*!< PD[15] pin */ -#define AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) /*!< PE[15] pin */ -#define AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) /*!< PF[15] pin */ -#define AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) /*!< PG[15] pin */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -/****************** Bit definition for AFIO_MAPR2 register ******************/ -#define AFIO_MAPR2_TIM15_REMAP ((uint32_t)0x00000001) /*!< TIM15 remapping */ -#define AFIO_MAPR2_TIM16_REMAP ((uint32_t)0x00000002) /*!< TIM16 remapping */ -#define AFIO_MAPR2_TIM17_REMAP ((uint32_t)0x00000004) /*!< TIM17 remapping */ -#define AFIO_MAPR2_CEC_REMAP ((uint32_t)0x00000008) /*!< CEC remapping */ -#define AFIO_MAPR2_TIM1_DMA_REMAP ((uint32_t)0x00000010) /*!< TIM1_DMA remapping */ -#endif - -#ifdef STM32F10X_HD_VL -#define AFIO_MAPR2_TIM13_REMAP ((uint32_t)0x00000100) /*!< TIM13 remapping */ -#define AFIO_MAPR2_TIM14_REMAP ((uint32_t)0x00000200) /*!< TIM14 remapping */ -#define AFIO_MAPR2_FSMC_NADV_REMAP ((uint32_t)0x00000400) /*!< FSMC NADV remapping */ -#define AFIO_MAPR2_TIM67_DAC_DMA_REMAP ((uint32_t)0x00000800) /*!< TIM6/TIM7 and DAC DMA remapping */ -#define AFIO_MAPR2_TIM12_REMAP ((uint32_t)0x00001000) /*!< TIM12 remapping */ -#define AFIO_MAPR2_MISC_REMAP ((uint32_t)0x00002000) /*!< Miscellaneous remapping */ -#endif - -#ifdef STM32F10X_XL -/****************** Bit definition for AFIO_MAPR2 register ******************/ -#define AFIO_MAPR2_TIM9_REMAP ((uint32_t)0x00000020) /*!< TIM9 remapping */ -#define AFIO_MAPR2_TIM10_REMAP ((uint32_t)0x00000040) /*!< TIM10 remapping */ -#define AFIO_MAPR2_TIM11_REMAP ((uint32_t)0x00000080) /*!< TIM11 remapping */ -#define AFIO_MAPR2_TIM13_REMAP ((uint32_t)0x00000100) /*!< TIM13 remapping */ -#define AFIO_MAPR2_TIM14_REMAP ((uint32_t)0x00000200) /*!< TIM14 remapping */ -#define AFIO_MAPR2_FSMC_NADV_REMAP ((uint32_t)0x00000400) /*!< FSMC NADV remapping */ -#endif - -/******************************************************************************/ -/* */ -/* SystemTick */ -/* */ -/******************************************************************************/ - -/***************** Bit definition for SysTick_CTRL register *****************/ -#define SysTick_CTRL_ENABLE ((uint32_t)0x00000001) /*!< Counter enable */ -#define SysTick_CTRL_TICKINT ((uint32_t)0x00000002) /*!< Counting down to 0 pends the SysTick handler */ -#define SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004) /*!< Clock source */ -#define SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000) /*!< Count Flag */ - -/***************** Bit definition for SysTick_LOAD register *****************/ -#define SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF) /*!< Value to load into the SysTick Current Value Register when the counter reaches 0 */ - -/***************** Bit definition for SysTick_VAL register ******************/ -#define SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF) /*!< Current value at the time the register is accessed */ - -/***************** Bit definition for SysTick_CALIB register ****************/ -#define SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF) /*!< Reload value to use for 10ms timing */ -#define SysTick_CALIB_SKEW ((uint32_t)0x40000000) /*!< Calibration value is not exactly 10 ms */ -#define SysTick_CALIB_NOREF ((uint32_t)0x80000000) /*!< The reference clock is not provided */ - -/******************************************************************************/ -/* */ -/* Nested Vectored Interrupt Controller */ -/* */ -/******************************************************************************/ - -/****************** Bit definition for NVIC_ISER register *******************/ -#define NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt set enable bits */ -#define NVIC_ISER_SETENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ISER_SETENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ISER_SETENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ISER_SETENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ISER_SETENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ISER_SETENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ISER_SETENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ISER_SETENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ISER_SETENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ISER_SETENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ISER_SETENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ISER_SETENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ISER_SETENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ISER_SETENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ISER_SETENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ISER_SETENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ISER_SETENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ISER_SETENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ISER_SETENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ISER_SETENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ISER_SETENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ISER_SETENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ISER_SETENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ISER_SETENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ISER_SETENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ISER_SETENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ISER_SETENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ISER_SETENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ISER_SETENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ISER_SETENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ISER_SETENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ISER_SETENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_ICER register *******************/ -#define NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-enable bits */ -#define NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_ISPR register *******************/ -#define NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt set-pending bits */ -#define NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_ICPR register *******************/ -#define NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-pending bits */ -#define NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_IABR register *******************/ -#define NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF) /*!< Interrupt active flags */ -#define NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001) /*!< bit 0 */ -#define NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002) /*!< bit 1 */ -#define NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004) /*!< bit 2 */ -#define NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008) /*!< bit 3 */ -#define NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010) /*!< bit 4 */ -#define NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020) /*!< bit 5 */ -#define NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040) /*!< bit 6 */ -#define NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080) /*!< bit 7 */ -#define NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100) /*!< bit 8 */ -#define NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200) /*!< bit 9 */ -#define NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400) /*!< bit 10 */ -#define NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800) /*!< bit 11 */ -#define NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000) /*!< bit 12 */ -#define NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000) /*!< bit 13 */ -#define NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000) /*!< bit 14 */ -#define NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000) /*!< bit 15 */ -#define NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000) /*!< bit 16 */ -#define NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000) /*!< bit 17 */ -#define NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000) /*!< bit 18 */ -#define NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000) /*!< bit 19 */ -#define NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000) /*!< bit 20 */ -#define NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000) /*!< bit 21 */ -#define NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000) /*!< bit 22 */ -#define NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000) /*!< bit 23 */ -#define NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000) /*!< bit 24 */ -#define NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000) /*!< bit 25 */ -#define NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000) /*!< bit 26 */ -#define NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000) /*!< bit 27 */ -#define NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000) /*!< bit 28 */ -#define NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000) /*!< bit 29 */ -#define NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000) /*!< bit 30 */ -#define NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000) /*!< bit 31 */ - -/****************** Bit definition for NVIC_PRI0 register *******************/ -#define NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF) /*!< Priority of interrupt 0 */ -#define NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 1 */ -#define NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 2 */ -#define NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000) /*!< Priority of interrupt 3 */ - -/****************** Bit definition for NVIC_PRI1 register *******************/ -#define NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF) /*!< Priority of interrupt 4 */ -#define NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 5 */ -#define NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 6 */ -#define NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) /*!< Priority of interrupt 7 */ - -/****************** Bit definition for NVIC_PRI2 register *******************/ -#define NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF) /*!< Priority of interrupt 8 */ -#define NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 9 */ -#define NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 10 */ -#define NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000) /*!< Priority of interrupt 11 */ - -/****************** Bit definition for NVIC_PRI3 register *******************/ -#define NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF) /*!< Priority of interrupt 12 */ -#define NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 13 */ -#define NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 14 */ -#define NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000) /*!< Priority of interrupt 15 */ - -/****************** Bit definition for NVIC_PRI4 register *******************/ -#define NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF) /*!< Priority of interrupt 16 */ -#define NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 17 */ -#define NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 18 */ -#define NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000) /*!< Priority of interrupt 19 */ - -/****************** Bit definition for NVIC_PRI5 register *******************/ -#define NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF) /*!< Priority of interrupt 20 */ -#define NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 21 */ -#define NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 22 */ -#define NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000) /*!< Priority of interrupt 23 */ - -/****************** Bit definition for NVIC_PRI6 register *******************/ -#define NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF) /*!< Priority of interrupt 24 */ -#define NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 25 */ -#define NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 26 */ -#define NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000) /*!< Priority of interrupt 27 */ - -/****************** Bit definition for NVIC_PRI7 register *******************/ -#define NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF) /*!< Priority of interrupt 28 */ -#define NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 29 */ -#define NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 30 */ -#define NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000) /*!< Priority of interrupt 31 */ - -/****************** Bit definition for SCB_CPUID register *******************/ -#define SCB_CPUID_REVISION ((uint32_t)0x0000000F) /*!< Implementation defined revision number */ -#define SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0) /*!< Number of processor within family */ -#define SCB_CPUID_Constant ((uint32_t)0x000F0000) /*!< Reads as 0x0F */ -#define SCB_CPUID_VARIANT ((uint32_t)0x00F00000) /*!< Implementation defined variant number */ -#define SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000) /*!< Implementer code. ARM is 0x41 */ - -/******************* Bit definition for SCB_ICSR register *******************/ -#define SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF) /*!< Active ISR number field */ -#define SCB_ICSR_RETTOBASE ((uint32_t)0x00000800) /*!< All active exceptions minus the IPSR_current_exception yields the empty set */ -#define SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000) /*!< Pending ISR number field */ -#define SCB_ICSR_ISRPENDING ((uint32_t)0x00400000) /*!< Interrupt pending flag */ -#define SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000) /*!< It indicates that a pending interrupt becomes active in the next running cycle */ -#define SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000) /*!< Clear pending SysTick bit */ -#define SCB_ICSR_PENDSTSET ((uint32_t)0x04000000) /*!< Set pending SysTick bit */ -#define SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000) /*!< Clear pending pendSV bit */ -#define SCB_ICSR_PENDSVSET ((uint32_t)0x10000000) /*!< Set pending pendSV bit */ -#define SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000) /*!< Set pending NMI bit */ - -/******************* Bit definition for SCB_VTOR register *******************/ -#define SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80) /*!< Vector table base offset field */ -#define SCB_VTOR_TBLBASE ((uint32_t)0x20000000) /*!< Table base in code(0) or RAM(1) */ - -/*!<***************** Bit definition for SCB_AIRCR register *******************/ -#define SCB_AIRCR_VECTRESET ((uint32_t)0x00000001) /*!< System Reset bit */ -#define SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002) /*!< Clear active vector bit */ -#define SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004) /*!< Requests chip control logic to generate a reset */ - -#define SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700) /*!< PRIGROUP[2:0] bits (Priority group) */ -#define SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400) /*!< Bit 2 */ - -/* prority group configuration */ -#define SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000) /*!< Priority group=0 (7 bits of pre-emption priority, 1 bit of subpriority) */ -#define SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100) /*!< Priority group=1 (6 bits of pre-emption priority, 2 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200) /*!< Priority group=2 (5 bits of pre-emption priority, 3 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300) /*!< Priority group=3 (4 bits of pre-emption priority, 4 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400) /*!< Priority group=4 (3 bits of pre-emption priority, 5 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500) /*!< Priority group=5 (2 bits of pre-emption priority, 6 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600) /*!< Priority group=6 (1 bit of pre-emption priority, 7 bits of subpriority) */ -#define SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700) /*!< Priority group=7 (no pre-emption priority, 8 bits of subpriority) */ - -#define SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000) /*!< Data endianness bit */ -#define SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000) /*!< Register key (VECTKEY) - Reads as 0xFA05 (VECTKEYSTAT) */ - -/******************* Bit definition for SCB_SCR register ********************/ -#define SCB_SCR_SLEEPONEXIT ((uint8_t)0x02) /*!< Sleep on exit bit */ -#define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ -#define SCB_SCR_SEVONPEND ((uint8_t)0x10) /*!< Wake up from WFE */ - -/******************** Bit definition for SCB_CCR register *******************/ -#define SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001) /*!< Thread mode can be entered from any level in Handler mode by controlled return value */ -#define SCB_CCR_USERSETMPEND ((uint16_t)0x0002) /*!< Enables user code to write the Software Trigger Interrupt register to trigger (pend) a Main exception */ -#define SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008) /*!< Trap for unaligned access */ -#define SCB_CCR_DIV_0_TRP ((uint16_t)0x0010) /*!< Trap on Divide by 0 */ -#define SCB_CCR_BFHFNMIGN ((uint16_t)0x0100) /*!< Handlers running at priority -1 and -2 */ -#define SCB_CCR_STKALIGN ((uint16_t)0x0200) /*!< On exception entry, the SP used prior to the exception is adjusted to be 8-byte aligned */ - -/******************* Bit definition for SCB_SHPR register ********************/ -#define SCB_SHPR_PRI_N ((uint32_t)0x000000FF) /*!< Priority of system handler 4,8, and 12. Mem Manage, reserved and Debug Monitor */ -#define SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00) /*!< Priority of system handler 5,9, and 13. Bus Fault, reserved and reserved */ -#define SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000) /*!< Priority of system handler 6,10, and 14. Usage Fault, reserved and PendSV */ -#define SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000) /*!< Priority of system handler 7,11, and 15. Reserved, SVCall and SysTick */ - -/****************** Bit definition for SCB_SHCSR register *******************/ -#define SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001) /*!< MemManage is active */ -#define SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002) /*!< BusFault is active */ -#define SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008) /*!< UsageFault is active */ -#define SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080) /*!< SVCall is active */ -#define SCB_SHCSR_MONITORACT ((uint32_t)0x00000100) /*!< Monitor is active */ -#define SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400) /*!< PendSV is active */ -#define SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800) /*!< SysTick is active */ -#define SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000) /*!< Usage Fault is pended */ -#define SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000) /*!< MemManage is pended */ -#define SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000) /*!< Bus Fault is pended */ -#define SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000) /*!< SVCall is pended */ -#define SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000) /*!< MemManage enable */ -#define SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000) /*!< Bus Fault enable */ -#define SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000) /*!< UsageFault enable */ - -/******************* Bit definition for SCB_CFSR register *******************/ -/*!< MFSR */ -#define SCB_CFSR_IACCVIOL ((uint32_t)0x00000001) /*!< Instruction access violation */ -#define SCB_CFSR_DACCVIOL ((uint32_t)0x00000002) /*!< Data access violation */ -#define SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008) /*!< Unstacking error */ -#define SCB_CFSR_MSTKERR ((uint32_t)0x00000010) /*!< Stacking error */ -#define SCB_CFSR_MMARVALID ((uint32_t)0x00000080) /*!< Memory Manage Address Register address valid flag */ -/*!< BFSR */ -#define SCB_CFSR_IBUSERR ((uint32_t)0x00000100) /*!< Instruction bus error flag */ -#define SCB_CFSR_PRECISERR ((uint32_t)0x00000200) /*!< Precise data bus error */ -#define SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400) /*!< Imprecise data bus error */ -#define SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) /*!< Unstacking error */ -#define SCB_CFSR_STKERR ((uint32_t)0x00001000) /*!< Stacking error */ -#define SCB_CFSR_BFARVALID ((uint32_t)0x00008000) /*!< Bus Fault Address Register address valid flag */ -/*!< UFSR */ -#define SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000) /*!< The processor attempt to execute an undefined instruction */ -#define SCB_CFSR_INVSTATE ((uint32_t)0x00020000) /*!< Invalid combination of EPSR and instruction */ -#define SCB_CFSR_INVPC ((uint32_t)0x00040000) /*!< Attempt to load EXC_RETURN into pc illegally */ -#define SCB_CFSR_NOCP ((uint32_t)0x00080000) /*!< Attempt to use a coprocessor instruction */ -#define SCB_CFSR_UNALIGNED ((uint32_t)0x01000000) /*!< Fault occurs when there is an attempt to make an unaligned memory access */ -#define SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000) /*!< Fault occurs when SDIV or DIV instruction is used with a divisor of 0 */ - -/******************* Bit definition for SCB_HFSR register *******************/ -#define SCB_HFSR_VECTTBL ((uint32_t)0x00000002) /*!< Fault occurs because of vector table read on exception processing */ -#define SCB_HFSR_FORCED ((uint32_t)0x40000000) /*!< Hard Fault activated when a configurable Fault was received and cannot activate */ -#define SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000) /*!< Fault related to debug */ - -/******************* Bit definition for SCB_DFSR register *******************/ -#define SCB_DFSR_HALTED ((uint8_t)0x01) /*!< Halt request flag */ -#define SCB_DFSR_BKPT ((uint8_t)0x02) /*!< BKPT flag */ -#define SCB_DFSR_DWTTRAP ((uint8_t)0x04) /*!< Data Watchpoint and Trace (DWT) flag */ -#define SCB_DFSR_VCATCH ((uint8_t)0x08) /*!< Vector catch flag */ -#define SCB_DFSR_EXTERNAL ((uint8_t)0x10) /*!< External debug request flag */ - -/******************* Bit definition for SCB_MMFAR register ******************/ -#define SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Mem Manage fault address field */ - -/******************* Bit definition for SCB_BFAR register *******************/ -#define SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Bus fault address field */ - -/******************* Bit definition for SCB_afsr register *******************/ -#define SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF) /*!< Implementation defined */ - -/******************************************************************************/ -/* */ -/* External Interrupt/Event Controller */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for EXTI_IMR register *******************/ -#define EXTI_IMR_MR0 ((uint32_t)0x00000001) /*!< Interrupt Mask on line 0 */ -#define EXTI_IMR_MR1 ((uint32_t)0x00000002) /*!< Interrupt Mask on line 1 */ -#define EXTI_IMR_MR2 ((uint32_t)0x00000004) /*!< Interrupt Mask on line 2 */ -#define EXTI_IMR_MR3 ((uint32_t)0x00000008) /*!< Interrupt Mask on line 3 */ -#define EXTI_IMR_MR4 ((uint32_t)0x00000010) /*!< Interrupt Mask on line 4 */ -#define EXTI_IMR_MR5 ((uint32_t)0x00000020) /*!< Interrupt Mask on line 5 */ -#define EXTI_IMR_MR6 ((uint32_t)0x00000040) /*!< Interrupt Mask on line 6 */ -#define EXTI_IMR_MR7 ((uint32_t)0x00000080) /*!< Interrupt Mask on line 7 */ -#define EXTI_IMR_MR8 ((uint32_t)0x00000100) /*!< Interrupt Mask on line 8 */ -#define EXTI_IMR_MR9 ((uint32_t)0x00000200) /*!< Interrupt Mask on line 9 */ -#define EXTI_IMR_MR10 ((uint32_t)0x00000400) /*!< Interrupt Mask on line 10 */ -#define EXTI_IMR_MR11 ((uint32_t)0x00000800) /*!< Interrupt Mask on line 11 */ -#define EXTI_IMR_MR12 ((uint32_t)0x00001000) /*!< Interrupt Mask on line 12 */ -#define EXTI_IMR_MR13 ((uint32_t)0x00002000) /*!< Interrupt Mask on line 13 */ -#define EXTI_IMR_MR14 ((uint32_t)0x00004000) /*!< Interrupt Mask on line 14 */ -#define EXTI_IMR_MR15 ((uint32_t)0x00008000) /*!< Interrupt Mask on line 15 */ -#define EXTI_IMR_MR16 ((uint32_t)0x00010000) /*!< Interrupt Mask on line 16 */ -#define EXTI_IMR_MR17 ((uint32_t)0x00020000) /*!< Interrupt Mask on line 17 */ -#define EXTI_IMR_MR18 ((uint32_t)0x00040000) /*!< Interrupt Mask on line 18 */ -#define EXTI_IMR_MR19 ((uint32_t)0x00080000) /*!< Interrupt Mask on line 19 */ - -/******************* Bit definition for EXTI_EMR register *******************/ -#define EXTI_EMR_MR0 ((uint32_t)0x00000001) /*!< Event Mask on line 0 */ -#define EXTI_EMR_MR1 ((uint32_t)0x00000002) /*!< Event Mask on line 1 */ -#define EXTI_EMR_MR2 ((uint32_t)0x00000004) /*!< Event Mask on line 2 */ -#define EXTI_EMR_MR3 ((uint32_t)0x00000008) /*!< Event Mask on line 3 */ -#define EXTI_EMR_MR4 ((uint32_t)0x00000010) /*!< Event Mask on line 4 */ -#define EXTI_EMR_MR5 ((uint32_t)0x00000020) /*!< Event Mask on line 5 */ -#define EXTI_EMR_MR6 ((uint32_t)0x00000040) /*!< Event Mask on line 6 */ -#define EXTI_EMR_MR7 ((uint32_t)0x00000080) /*!< Event Mask on line 7 */ -#define EXTI_EMR_MR8 ((uint32_t)0x00000100) /*!< Event Mask on line 8 */ -#define EXTI_EMR_MR9 ((uint32_t)0x00000200) /*!< Event Mask on line 9 */ -#define EXTI_EMR_MR10 ((uint32_t)0x00000400) /*!< Event Mask on line 10 */ -#define EXTI_EMR_MR11 ((uint32_t)0x00000800) /*!< Event Mask on line 11 */ -#define EXTI_EMR_MR12 ((uint32_t)0x00001000) /*!< Event Mask on line 12 */ -#define EXTI_EMR_MR13 ((uint32_t)0x00002000) /*!< Event Mask on line 13 */ -#define EXTI_EMR_MR14 ((uint32_t)0x00004000) /*!< Event Mask on line 14 */ -#define EXTI_EMR_MR15 ((uint32_t)0x00008000) /*!< Event Mask on line 15 */ -#define EXTI_EMR_MR16 ((uint32_t)0x00010000) /*!< Event Mask on line 16 */ -#define EXTI_EMR_MR17 ((uint32_t)0x00020000) /*!< Event Mask on line 17 */ -#define EXTI_EMR_MR18 ((uint32_t)0x00040000) /*!< Event Mask on line 18 */ -#define EXTI_EMR_MR19 ((uint32_t)0x00080000) /*!< Event Mask on line 19 */ - -/****************** Bit definition for EXTI_RTSR register *******************/ -#define EXTI_RTSR_TR0 ((uint32_t)0x00000001) /*!< Rising trigger event configuration bit of line 0 */ -#define EXTI_RTSR_TR1 ((uint32_t)0x00000002) /*!< Rising trigger event configuration bit of line 1 */ -#define EXTI_RTSR_TR2 ((uint32_t)0x00000004) /*!< Rising trigger event configuration bit of line 2 */ -#define EXTI_RTSR_TR3 ((uint32_t)0x00000008) /*!< Rising trigger event configuration bit of line 3 */ -#define EXTI_RTSR_TR4 ((uint32_t)0x00000010) /*!< Rising trigger event configuration bit of line 4 */ -#define EXTI_RTSR_TR5 ((uint32_t)0x00000020) /*!< Rising trigger event configuration bit of line 5 */ -#define EXTI_RTSR_TR6 ((uint32_t)0x00000040) /*!< Rising trigger event configuration bit of line 6 */ -#define EXTI_RTSR_TR7 ((uint32_t)0x00000080) /*!< Rising trigger event configuration bit of line 7 */ -#define EXTI_RTSR_TR8 ((uint32_t)0x00000100) /*!< Rising trigger event configuration bit of line 8 */ -#define EXTI_RTSR_TR9 ((uint32_t)0x00000200) /*!< Rising trigger event configuration bit of line 9 */ -#define EXTI_RTSR_TR10 ((uint32_t)0x00000400) /*!< Rising trigger event configuration bit of line 10 */ -#define EXTI_RTSR_TR11 ((uint32_t)0x00000800) /*!< Rising trigger event configuration bit of line 11 */ -#define EXTI_RTSR_TR12 ((uint32_t)0x00001000) /*!< Rising trigger event configuration bit of line 12 */ -#define EXTI_RTSR_TR13 ((uint32_t)0x00002000) /*!< Rising trigger event configuration bit of line 13 */ -#define EXTI_RTSR_TR14 ((uint32_t)0x00004000) /*!< Rising trigger event configuration bit of line 14 */ -#define EXTI_RTSR_TR15 ((uint32_t)0x00008000) /*!< Rising trigger event configuration bit of line 15 */ -#define EXTI_RTSR_TR16 ((uint32_t)0x00010000) /*!< Rising trigger event configuration bit of line 16 */ -#define EXTI_RTSR_TR17 ((uint32_t)0x00020000) /*!< Rising trigger event configuration bit of line 17 */ -#define EXTI_RTSR_TR18 ((uint32_t)0x00040000) /*!< Rising trigger event configuration bit of line 18 */ -#define EXTI_RTSR_TR19 ((uint32_t)0x00080000) /*!< Rising trigger event configuration bit of line 19 */ - -/****************** Bit definition for EXTI_FTSR register *******************/ -#define EXTI_FTSR_TR0 ((uint32_t)0x00000001) /*!< Falling trigger event configuration bit of line 0 */ -#define EXTI_FTSR_TR1 ((uint32_t)0x00000002) /*!< Falling trigger event configuration bit of line 1 */ -#define EXTI_FTSR_TR2 ((uint32_t)0x00000004) /*!< Falling trigger event configuration bit of line 2 */ -#define EXTI_FTSR_TR3 ((uint32_t)0x00000008) /*!< Falling trigger event configuration bit of line 3 */ -#define EXTI_FTSR_TR4 ((uint32_t)0x00000010) /*!< Falling trigger event configuration bit of line 4 */ -#define EXTI_FTSR_TR5 ((uint32_t)0x00000020) /*!< Falling trigger event configuration bit of line 5 */ -#define EXTI_FTSR_TR6 ((uint32_t)0x00000040) /*!< Falling trigger event configuration bit of line 6 */ -#define EXTI_FTSR_TR7 ((uint32_t)0x00000080) /*!< Falling trigger event configuration bit of line 7 */ -#define EXTI_FTSR_TR8 ((uint32_t)0x00000100) /*!< Falling trigger event configuration bit of line 8 */ -#define EXTI_FTSR_TR9 ((uint32_t)0x00000200) /*!< Falling trigger event configuration bit of line 9 */ -#define EXTI_FTSR_TR10 ((uint32_t)0x00000400) /*!< Falling trigger event configuration bit of line 10 */ -#define EXTI_FTSR_TR11 ((uint32_t)0x00000800) /*!< Falling trigger event configuration bit of line 11 */ -#define EXTI_FTSR_TR12 ((uint32_t)0x00001000) /*!< Falling trigger event configuration bit of line 12 */ -#define EXTI_FTSR_TR13 ((uint32_t)0x00002000) /*!< Falling trigger event configuration bit of line 13 */ -#define EXTI_FTSR_TR14 ((uint32_t)0x00004000) /*!< Falling trigger event configuration bit of line 14 */ -#define EXTI_FTSR_TR15 ((uint32_t)0x00008000) /*!< Falling trigger event configuration bit of line 15 */ -#define EXTI_FTSR_TR16 ((uint32_t)0x00010000) /*!< Falling trigger event configuration bit of line 16 */ -#define EXTI_FTSR_TR17 ((uint32_t)0x00020000) /*!< Falling trigger event configuration bit of line 17 */ -#define EXTI_FTSR_TR18 ((uint32_t)0x00040000) /*!< Falling trigger event configuration bit of line 18 */ -#define EXTI_FTSR_TR19 ((uint32_t)0x00080000) /*!< Falling trigger event configuration bit of line 19 */ - -/****************** Bit definition for EXTI_SWIER register ******************/ -#define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) /*!< Software Interrupt on line 0 */ -#define EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) /*!< Software Interrupt on line 1 */ -#define EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) /*!< Software Interrupt on line 2 */ -#define EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) /*!< Software Interrupt on line 3 */ -#define EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) /*!< Software Interrupt on line 4 */ -#define EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) /*!< Software Interrupt on line 5 */ -#define EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) /*!< Software Interrupt on line 6 */ -#define EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) /*!< Software Interrupt on line 7 */ -#define EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) /*!< Software Interrupt on line 8 */ -#define EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) /*!< Software Interrupt on line 9 */ -#define EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) /*!< Software Interrupt on line 10 */ -#define EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) /*!< Software Interrupt on line 11 */ -#define EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) /*!< Software Interrupt on line 12 */ -#define EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) /*!< Software Interrupt on line 13 */ -#define EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) /*!< Software Interrupt on line 14 */ -#define EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) /*!< Software Interrupt on line 15 */ -#define EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) /*!< Software Interrupt on line 16 */ -#define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) /*!< Software Interrupt on line 17 */ -#define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) /*!< Software Interrupt on line 18 */ -#define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) /*!< Software Interrupt on line 19 */ - -/******************* Bit definition for EXTI_PR register ********************/ -#define EXTI_PR_PR0 ((uint32_t)0x00000001) /*!< Pending bit for line 0 */ -#define EXTI_PR_PR1 ((uint32_t)0x00000002) /*!< Pending bit for line 1 */ -#define EXTI_PR_PR2 ((uint32_t)0x00000004) /*!< Pending bit for line 2 */ -#define EXTI_PR_PR3 ((uint32_t)0x00000008) /*!< Pending bit for line 3 */ -#define EXTI_PR_PR4 ((uint32_t)0x00000010) /*!< Pending bit for line 4 */ -#define EXTI_PR_PR5 ((uint32_t)0x00000020) /*!< Pending bit for line 5 */ -#define EXTI_PR_PR6 ((uint32_t)0x00000040) /*!< Pending bit for line 6 */ -#define EXTI_PR_PR7 ((uint32_t)0x00000080) /*!< Pending bit for line 7 */ -#define EXTI_PR_PR8 ((uint32_t)0x00000100) /*!< Pending bit for line 8 */ -#define EXTI_PR_PR9 ((uint32_t)0x00000200) /*!< Pending bit for line 9 */ -#define EXTI_PR_PR10 ((uint32_t)0x00000400) /*!< Pending bit for line 10 */ -#define EXTI_PR_PR11 ((uint32_t)0x00000800) /*!< Pending bit for line 11 */ -#define EXTI_PR_PR12 ((uint32_t)0x00001000) /*!< Pending bit for line 12 */ -#define EXTI_PR_PR13 ((uint32_t)0x00002000) /*!< Pending bit for line 13 */ -#define EXTI_PR_PR14 ((uint32_t)0x00004000) /*!< Pending bit for line 14 */ -#define EXTI_PR_PR15 ((uint32_t)0x00008000) /*!< Pending bit for line 15 */ -#define EXTI_PR_PR16 ((uint32_t)0x00010000) /*!< Pending bit for line 16 */ -#define EXTI_PR_PR17 ((uint32_t)0x00020000) /*!< Pending bit for line 17 */ -#define EXTI_PR_PR18 ((uint32_t)0x00040000) /*!< Pending bit for line 18 */ -#define EXTI_PR_PR19 ((uint32_t)0x00080000) /*!< Pending bit for line 19 */ - -/******************************************************************************/ -/* */ -/* DMA Controller */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for DMA_ISR register ********************/ -#define DMA_ISR_GIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt flag */ -#define DMA_ISR_TCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete flag */ -#define DMA_ISR_HTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer flag */ -#define DMA_ISR_TEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error flag */ -#define DMA_ISR_GIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt flag */ -#define DMA_ISR_TCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete flag */ -#define DMA_ISR_HTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer flag */ -#define DMA_ISR_TEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error flag */ -#define DMA_ISR_GIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt flag */ -#define DMA_ISR_TCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete flag */ -#define DMA_ISR_HTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer flag */ -#define DMA_ISR_TEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error flag */ -#define DMA_ISR_GIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt flag */ -#define DMA_ISR_TCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete flag */ -#define DMA_ISR_HTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer flag */ -#define DMA_ISR_TEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error flag */ -#define DMA_ISR_GIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt flag */ -#define DMA_ISR_TCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete flag */ -#define DMA_ISR_HTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer flag */ -#define DMA_ISR_TEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error flag */ -#define DMA_ISR_GIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt flag */ -#define DMA_ISR_TCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete flag */ -#define DMA_ISR_HTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer flag */ -#define DMA_ISR_TEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error flag */ -#define DMA_ISR_GIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt flag */ -#define DMA_ISR_TCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete flag */ -#define DMA_ISR_HTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer flag */ -#define DMA_ISR_TEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error flag */ - -/******************* Bit definition for DMA_IFCR register *******************/ -#define DMA_IFCR_CGIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt clear */ -#define DMA_IFCR_CTCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete clear */ -#define DMA_IFCR_CHTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer clear */ -#define DMA_IFCR_CTEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error clear */ -#define DMA_IFCR_CGIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt clear */ -#define DMA_IFCR_CTCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete clear */ -#define DMA_IFCR_CHTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer clear */ -#define DMA_IFCR_CTEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error clear */ -#define DMA_IFCR_CGIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt clear */ -#define DMA_IFCR_CTCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete clear */ -#define DMA_IFCR_CHTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer clear */ -#define DMA_IFCR_CTEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error clear */ -#define DMA_IFCR_CGIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt clear */ -#define DMA_IFCR_CTCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete clear */ -#define DMA_IFCR_CHTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer clear */ -#define DMA_IFCR_CTEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error clear */ -#define DMA_IFCR_CGIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt clear */ -#define DMA_IFCR_CTCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete clear */ -#define DMA_IFCR_CHTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer clear */ -#define DMA_IFCR_CTEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error clear */ -#define DMA_IFCR_CGIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt clear */ -#define DMA_IFCR_CTCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete clear */ -#define DMA_IFCR_CHTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer clear */ -#define DMA_IFCR_CTEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error clear */ -#define DMA_IFCR_CGIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt clear */ -#define DMA_IFCR_CTCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete clear */ -#define DMA_IFCR_CHTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer clear */ -#define DMA_IFCR_CTEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error clear */ - -/******************* Bit definition for DMA_CCR1 register *******************/ -#define DMA_CCR1_EN ((uint16_t)0x0001) /*!< Channel enable*/ -#define DMA_CCR1_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR1_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR1_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR1_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR1_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR1_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR1_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR1_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR1_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR1_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR1_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR1_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR1_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR1_PL ((uint16_t)0x3000) /*!< PL[1:0] bits(Channel Priority level) */ -#define DMA_CCR1_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR1_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR1_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/******************* Bit definition for DMA_CCR2 register *******************/ -#define DMA_CCR2_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR2_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR2_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR2_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR2_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR2_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR2_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR2_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR2_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR2_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR2_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR2_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR2_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR2_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR2_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR2_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR2_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR2_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/******************* Bit definition for DMA_CCR3 register *******************/ -#define DMA_CCR3_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR3_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR3_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR3_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR3_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR3_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR3_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR3_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR3_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR3_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR3_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR3_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR3_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR3_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR3_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR3_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR3_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR3_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/*!<****************** Bit definition for DMA_CCR4 register *******************/ -#define DMA_CCR4_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR4_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR4_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR4_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR4_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR4_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR4_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR4_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR4_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR4_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR4_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR4_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR4_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR4_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR4_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR4_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR4_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR4_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/****************** Bit definition for DMA_CCR5 register *******************/ -#define DMA_CCR5_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR5_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR5_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR5_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR5_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR5_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR5_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR5_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR5_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR5_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR5_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR5_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR5_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR5_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR5_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR5_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR5_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR5_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode enable */ - -/******************* Bit definition for DMA_CCR6 register *******************/ -#define DMA_CCR6_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR6_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR6_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR6_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR6_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR6_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR6_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR6_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR6_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR6_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR6_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR6_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR6_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR6_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR6_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR6_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR6_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR6_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ - -/******************* Bit definition for DMA_CCR7 register *******************/ -#define DMA_CCR7_EN ((uint16_t)0x0001) /*!< Channel enable */ -#define DMA_CCR7_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ -#define DMA_CCR7_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ -#define DMA_CCR7_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ -#define DMA_CCR7_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ -#define DMA_CCR7_CIRC ((uint16_t)0x0020) /*!< Circular mode */ -#define DMA_CCR7_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ -#define DMA_CCR7_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ - -#define DMA_CCR7_PSIZE , ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ -#define DMA_CCR7_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define DMA_CCR7_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define DMA_CCR7_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ -#define DMA_CCR7_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define DMA_CCR7_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define DMA_CCR7_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ -#define DMA_CCR7_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define DMA_CCR7_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define DMA_CCR7_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode enable */ - -/****************** Bit definition for DMA_CNDTR1 register ******************/ -#define DMA_CNDTR1_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CNDTR2 register ******************/ -#define DMA_CNDTR2_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CNDTR3 register ******************/ -#define DMA_CNDTR3_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CNDTR4 register ******************/ -#define DMA_CNDTR4_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CNDTR5 register ******************/ -#define DMA_CNDTR5_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CNDTR6 register ******************/ -#define DMA_CNDTR6_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CNDTR7 register ******************/ -#define DMA_CNDTR7_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ - -/****************** Bit definition for DMA_CPAR1 register *******************/ -#define DMA_CPAR1_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - -/****************** Bit definition for DMA_CPAR2 register *******************/ -#define DMA_CPAR2_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - -/****************** Bit definition for DMA_CPAR3 register *******************/ -#define DMA_CPAR3_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - - -/****************** Bit definition for DMA_CPAR4 register *******************/ -#define DMA_CPAR4_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - -/****************** Bit definition for DMA_CPAR5 register *******************/ -#define DMA_CPAR5_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - -/****************** Bit definition for DMA_CPAR6 register *******************/ -#define DMA_CPAR6_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - - -/****************** Bit definition for DMA_CPAR7 register *******************/ -#define DMA_CPAR7_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ - -/****************** Bit definition for DMA_CMAR1 register *******************/ -#define DMA_CMAR1_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - -/****************** Bit definition for DMA_CMAR2 register *******************/ -#define DMA_CMAR2_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - -/****************** Bit definition for DMA_CMAR3 register *******************/ -#define DMA_CMAR3_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - - -/****************** Bit definition for DMA_CMAR4 register *******************/ -#define DMA_CMAR4_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - -/****************** Bit definition for DMA_CMAR5 register *******************/ -#define DMA_CMAR5_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - -/****************** Bit definition for DMA_CMAR6 register *******************/ -#define DMA_CMAR6_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - -/****************** Bit definition for DMA_CMAR7 register *******************/ -#define DMA_CMAR7_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ - -/******************************************************************************/ -/* */ -/* Analog to Digital Converter */ -/* */ -/******************************************************************************/ - -/******************** Bit definition for ADC_SR register ********************/ -#define ADC_SR_AWD ((uint8_t)0x01) /*!< Analog watchdog flag */ -#define ADC_SR_EOC ((uint8_t)0x02) /*!< End of conversion */ -#define ADC_SR_JEOC ((uint8_t)0x04) /*!< Injected channel end of conversion */ -#define ADC_SR_JSTRT ((uint8_t)0x08) /*!< Injected channel Start flag */ -#define ADC_SR_STRT ((uint8_t)0x10) /*!< Regular channel Start flag */ - -/******************* Bit definition for ADC_CR1 register ********************/ -#define ADC_CR1_AWDCH ((uint32_t)0x0000001F) /*!< AWDCH[4:0] bits (Analog watchdog channel select bits) */ -#define ADC_CR1_AWDCH_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_CR1_AWDCH_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_CR1_AWDCH_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define ADC_CR1_AWDCH_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define ADC_CR1_AWDCH_4 ((uint32_t)0x00000010) /*!< Bit 4 */ - -#define ADC_CR1_EOCIE ((uint32_t)0x00000020) /*!< Interrupt enable for EOC */ -#define ADC_CR1_AWDIE ((uint32_t)0x00000040) /*!< Analog Watchdog interrupt enable */ -#define ADC_CR1_JEOCIE ((uint32_t)0x00000080) /*!< Interrupt enable for injected channels */ -#define ADC_CR1_SCAN ((uint32_t)0x00000100) /*!< Scan mode */ -#define ADC_CR1_AWDSGL ((uint32_t)0x00000200) /*!< Enable the watchdog on a single channel in scan mode */ -#define ADC_CR1_JAUTO ((uint32_t)0x00000400) /*!< Automatic injected group conversion */ -#define ADC_CR1_DISCEN ((uint32_t)0x00000800) /*!< Discontinuous mode on regular channels */ -#define ADC_CR1_JDISCEN ((uint32_t)0x00001000) /*!< Discontinuous mode on injected channels */ - -#define ADC_CR1_DISCNUM ((uint32_t)0x0000E000) /*!< DISCNUM[2:0] bits (Discontinuous mode channel count) */ -#define ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000) /*!< Bit 0 */ -#define ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000) /*!< Bit 1 */ -#define ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000) /*!< Bit 2 */ - -#define ADC_CR1_DUALMOD ((uint32_t)0x000F0000) /*!< DUALMOD[3:0] bits (Dual mode selection) */ -#define ADC_CR1_DUALMOD_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define ADC_CR1_DUALMOD_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define ADC_CR1_DUALMOD_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define ADC_CR1_DUALMOD_3 ((uint32_t)0x00080000) /*!< Bit 3 */ - -#define ADC_CR1_JAWDEN ((uint32_t)0x00400000) /*!< Analog watchdog enable on injected channels */ -#define ADC_CR1_AWDEN ((uint32_t)0x00800000) /*!< Analog watchdog enable on regular channels */ - - -/******************* Bit definition for ADC_CR2 register ********************/ -#define ADC_CR2_ADON ((uint32_t)0x00000001) /*!< A/D Converter ON / OFF */ -#define ADC_CR2_CONT ((uint32_t)0x00000002) /*!< Continuous Conversion */ -#define ADC_CR2_CAL ((uint32_t)0x00000004) /*!< A/D Calibration */ -#define ADC_CR2_RSTCAL ((uint32_t)0x00000008) /*!< Reset Calibration */ -#define ADC_CR2_DMA ((uint32_t)0x00000100) /*!< Direct Memory access mode */ -#define ADC_CR2_ALIGN ((uint32_t)0x00000800) /*!< Data Alignment */ - -#define ADC_CR2_JEXTSEL ((uint32_t)0x00007000) /*!< JEXTSEL[2:0] bits (External event select for injected group) */ -#define ADC_CR2_JEXTSEL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define ADC_CR2_JEXTSEL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ -#define ADC_CR2_JEXTSEL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ - -#define ADC_CR2_JEXTTRIG ((uint32_t)0x00008000) /*!< External Trigger Conversion mode for injected channels */ - -#define ADC_CR2_EXTSEL ((uint32_t)0x000E0000) /*!< EXTSEL[2:0] bits (External Event Select for regular group) */ -#define ADC_CR2_EXTSEL_0 ((uint32_t)0x00020000) /*!< Bit 0 */ -#define ADC_CR2_EXTSEL_1 ((uint32_t)0x00040000) /*!< Bit 1 */ -#define ADC_CR2_EXTSEL_2 ((uint32_t)0x00080000) /*!< Bit 2 */ - -#define ADC_CR2_EXTTRIG ((uint32_t)0x00100000) /*!< External Trigger Conversion mode for regular channels */ -#define ADC_CR2_JSWSTART ((uint32_t)0x00200000) /*!< Start Conversion of injected channels */ -#define ADC_CR2_SWSTART ((uint32_t)0x00400000) /*!< Start Conversion of regular channels */ -#define ADC_CR2_TSVREFE ((uint32_t)0x00800000) /*!< Temperature Sensor and VREFINT Enable */ - -/****************** Bit definition for ADC_SMPR1 register *******************/ -#define ADC_SMPR1_SMP10 ((uint32_t)0x00000007) /*!< SMP10[2:0] bits (Channel 10 Sample time selection) */ -#define ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP11 ((uint32_t)0x00000038) /*!< SMP11[2:0] bits (Channel 11 Sample time selection) */ -#define ADC_SMPR1_SMP11_0 ((uint32_t)0x00000008) /*!< Bit 0 */ -#define ADC_SMPR1_SMP11_1 ((uint32_t)0x00000010) /*!< Bit 1 */ -#define ADC_SMPR1_SMP11_2 ((uint32_t)0x00000020) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP12 ((uint32_t)0x000001C0) /*!< SMP12[2:0] bits (Channel 12 Sample time selection) */ -#define ADC_SMPR1_SMP12_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define ADC_SMPR1_SMP12_1 ((uint32_t)0x00000080) /*!< Bit 1 */ -#define ADC_SMPR1_SMP12_2 ((uint32_t)0x00000100) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP13 ((uint32_t)0x00000E00) /*!< SMP13[2:0] bits (Channel 13 Sample time selection) */ -#define ADC_SMPR1_SMP13_0 ((uint32_t)0x00000200) /*!< Bit 0 */ -#define ADC_SMPR1_SMP13_1 ((uint32_t)0x00000400) /*!< Bit 1 */ -#define ADC_SMPR1_SMP13_2 ((uint32_t)0x00000800) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP14 ((uint32_t)0x00007000) /*!< SMP14[2:0] bits (Channel 14 Sample time selection) */ -#define ADC_SMPR1_SMP14_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define ADC_SMPR1_SMP14_1 ((uint32_t)0x00002000) /*!< Bit 1 */ -#define ADC_SMPR1_SMP14_2 ((uint32_t)0x00004000) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP15 ((uint32_t)0x00038000) /*!< SMP15[2:0] bits (Channel 15 Sample time selection) */ -#define ADC_SMPR1_SMP15_0 ((uint32_t)0x00008000) /*!< Bit 0 */ -#define ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000) /*!< Bit 1 */ -#define ADC_SMPR1_SMP15_2 ((uint32_t)0x00020000) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP16 ((uint32_t)0x001C0000) /*!< SMP16[2:0] bits (Channel 16 Sample time selection) */ -#define ADC_SMPR1_SMP16_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define ADC_SMPR1_SMP16_1 ((uint32_t)0x00080000) /*!< Bit 1 */ -#define ADC_SMPR1_SMP16_2 ((uint32_t)0x00100000) /*!< Bit 2 */ - -#define ADC_SMPR1_SMP17 ((uint32_t)0x00E00000) /*!< SMP17[2:0] bits (Channel 17 Sample time selection) */ -#define ADC_SMPR1_SMP17_0 ((uint32_t)0x00200000) /*!< Bit 0 */ -#define ADC_SMPR1_SMP17_1 ((uint32_t)0x00400000) /*!< Bit 1 */ -#define ADC_SMPR1_SMP17_2 ((uint32_t)0x00800000) /*!< Bit 2 */ - -/****************** Bit definition for ADC_SMPR2 register *******************/ -#define ADC_SMPR2_SMP0 ((uint32_t)0x00000007) /*!< SMP0[2:0] bits (Channel 0 Sample time selection) */ -#define ADC_SMPR2_SMP0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_SMPR2_SMP0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_SMPR2_SMP0_2 ((uint32_t)0x00000004) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP1 ((uint32_t)0x00000038) /*!< SMP1[2:0] bits (Channel 1 Sample time selection) */ -#define ADC_SMPR2_SMP1_0 ((uint32_t)0x00000008) /*!< Bit 0 */ -#define ADC_SMPR2_SMP1_1 ((uint32_t)0x00000010) /*!< Bit 1 */ -#define ADC_SMPR2_SMP1_2 ((uint32_t)0x00000020) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP2 ((uint32_t)0x000001C0) /*!< SMP2[2:0] bits (Channel 2 Sample time selection) */ -#define ADC_SMPR2_SMP2_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define ADC_SMPR2_SMP2_1 ((uint32_t)0x00000080) /*!< Bit 1 */ -#define ADC_SMPR2_SMP2_2 ((uint32_t)0x00000100) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP3 ((uint32_t)0x00000E00) /*!< SMP3[2:0] bits (Channel 3 Sample time selection) */ -#define ADC_SMPR2_SMP3_0 ((uint32_t)0x00000200) /*!< Bit 0 */ -#define ADC_SMPR2_SMP3_1 ((uint32_t)0x00000400) /*!< Bit 1 */ -#define ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP4 ((uint32_t)0x00007000) /*!< SMP4[2:0] bits (Channel 4 Sample time selection) */ -#define ADC_SMPR2_SMP4_0 ((uint32_t)0x00001000) /*!< Bit 0 */ -#define ADC_SMPR2_SMP4_1 ((uint32_t)0x00002000) /*!< Bit 1 */ -#define ADC_SMPR2_SMP4_2 ((uint32_t)0x00004000) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP5 ((uint32_t)0x00038000) /*!< SMP5[2:0] bits (Channel 5 Sample time selection) */ -#define ADC_SMPR2_SMP5_0 ((uint32_t)0x00008000) /*!< Bit 0 */ -#define ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000) /*!< Bit 1 */ -#define ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP6 ((uint32_t)0x001C0000) /*!< SMP6[2:0] bits (Channel 6 Sample time selection) */ -#define ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000) /*!< Bit 0 */ -#define ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000) /*!< Bit 1 */ -#define ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP7 ((uint32_t)0x00E00000) /*!< SMP7[2:0] bits (Channel 7 Sample time selection) */ -#define ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000) /*!< Bit 0 */ -#define ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000) /*!< Bit 1 */ -#define ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP8 ((uint32_t)0x07000000) /*!< SMP8[2:0] bits (Channel 8 Sample time selection) */ -#define ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000) /*!< Bit 2 */ - -#define ADC_SMPR2_SMP9 ((uint32_t)0x38000000) /*!< SMP9[2:0] bits (Channel 9 Sample time selection) */ -#define ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000) /*!< Bit 0 */ -#define ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000) /*!< Bit 1 */ -#define ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000) /*!< Bit 2 */ - -/****************** Bit definition for ADC_JOFR1 register *******************/ -#define ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 1 */ - -/****************** Bit definition for ADC_JOFR2 register *******************/ -#define ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 2 */ - -/****************** Bit definition for ADC_JOFR3 register *******************/ -#define ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 3 */ - -/****************** Bit definition for ADC_JOFR4 register *******************/ -#define ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 4 */ - -/******************* Bit definition for ADC_HTR register ********************/ -#define ADC_HTR_HT ((uint16_t)0x0FFF) /*!< Analog watchdog high threshold */ - -/******************* Bit definition for ADC_LTR register ********************/ -#define ADC_LTR_LT ((uint16_t)0x0FFF) /*!< Analog watchdog low threshold */ - -/******************* Bit definition for ADC_SQR1 register *******************/ -#define ADC_SQR1_SQ13 ((uint32_t)0x0000001F) /*!< SQ13[4:0] bits (13th conversion in regular sequence) */ -#define ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) /*!< Bit 4 */ - -#define ADC_SQR1_SQ14 ((uint32_t)0x000003E0) /*!< SQ14[4:0] bits (14th conversion in regular sequence) */ -#define ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) /*!< Bit 0 */ -#define ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) /*!< Bit 1 */ -#define ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) /*!< Bit 2 */ -#define ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) /*!< Bit 3 */ -#define ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) /*!< Bit 4 */ - -#define ADC_SQR1_SQ15 ((uint32_t)0x00007C00) /*!< SQ15[4:0] bits (15th conversion in regular sequence) */ -#define ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define ADC_SQR1_SQ16 ((uint32_t)0x000F8000) /*!< SQ16[4:0] bits (16th conversion in regular sequence) */ -#define ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) /*!< Bit 0 */ -#define ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) /*!< Bit 1 */ -#define ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) /*!< Bit 2 */ -#define ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) /*!< Bit 3 */ -#define ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) /*!< Bit 4 */ - -#define ADC_SQR1_L ((uint32_t)0x00F00000) /*!< L[3:0] bits (Regular channel sequence length) */ -#define ADC_SQR1_L_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define ADC_SQR1_L_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define ADC_SQR1_L_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define ADC_SQR1_L_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -/******************* Bit definition for ADC_SQR2 register *******************/ -#define ADC_SQR2_SQ7 ((uint32_t)0x0000001F) /*!< SQ7[4:0] bits (7th conversion in regular sequence) */ -#define ADC_SQR2_SQ7_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_SQR2_SQ7_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_SQR2_SQ7_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define ADC_SQR2_SQ7_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define ADC_SQR2_SQ7_4 ((uint32_t)0x00000010) /*!< Bit 4 */ - -#define ADC_SQR2_SQ8 ((uint32_t)0x000003E0) /*!< SQ8[4:0] bits (8th conversion in regular sequence) */ -#define ADC_SQR2_SQ8_0 ((uint32_t)0x00000020) /*!< Bit 0 */ -#define ADC_SQR2_SQ8_1 ((uint32_t)0x00000040) /*!< Bit 1 */ -#define ADC_SQR2_SQ8_2 ((uint32_t)0x00000080) /*!< Bit 2 */ -#define ADC_SQR2_SQ8_3 ((uint32_t)0x00000100) /*!< Bit 3 */ -#define ADC_SQR2_SQ8_4 ((uint32_t)0x00000200) /*!< Bit 4 */ - -#define ADC_SQR2_SQ9 ((uint32_t)0x00007C00) /*!< SQ9[4:0] bits (9th conversion in regular sequence) */ -#define ADC_SQR2_SQ9_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define ADC_SQR2_SQ9_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define ADC_SQR2_SQ9_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define ADC_SQR2_SQ9_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define ADC_SQR2_SQ9_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define ADC_SQR2_SQ10 ((uint32_t)0x000F8000) /*!< SQ10[4:0] bits (10th conversion in regular sequence) */ -#define ADC_SQR2_SQ10_0 ((uint32_t)0x00008000) /*!< Bit 0 */ -#define ADC_SQR2_SQ10_1 ((uint32_t)0x00010000) /*!< Bit 1 */ -#define ADC_SQR2_SQ10_2 ((uint32_t)0x00020000) /*!< Bit 2 */ -#define ADC_SQR2_SQ10_3 ((uint32_t)0x00040000) /*!< Bit 3 */ -#define ADC_SQR2_SQ10_4 ((uint32_t)0x00080000) /*!< Bit 4 */ - -#define ADC_SQR2_SQ11 ((uint32_t)0x01F00000) /*!< SQ11[4:0] bits (11th conversion in regular sequence) */ -#define ADC_SQR2_SQ11_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define ADC_SQR2_SQ11_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define ADC_SQR2_SQ11_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define ADC_SQR2_SQ11_3 ((uint32_t)0x00800000) /*!< Bit 3 */ -#define ADC_SQR2_SQ11_4 ((uint32_t)0x01000000) /*!< Bit 4 */ - -#define ADC_SQR2_SQ12 ((uint32_t)0x3E000000) /*!< SQ12[4:0] bits (12th conversion in regular sequence) */ -#define ADC_SQR2_SQ12_0 ((uint32_t)0x02000000) /*!< Bit 0 */ -#define ADC_SQR2_SQ12_1 ((uint32_t)0x04000000) /*!< Bit 1 */ -#define ADC_SQR2_SQ12_2 ((uint32_t)0x08000000) /*!< Bit 2 */ -#define ADC_SQR2_SQ12_3 ((uint32_t)0x10000000) /*!< Bit 3 */ -#define ADC_SQR2_SQ12_4 ((uint32_t)0x20000000) /*!< Bit 4 */ - -/******************* Bit definition for ADC_SQR3 register *******************/ -#define ADC_SQR3_SQ1 ((uint32_t)0x0000001F) /*!< SQ1[4:0] bits (1st conversion in regular sequence) */ -#define ADC_SQR3_SQ1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_SQR3_SQ1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_SQR3_SQ1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define ADC_SQR3_SQ1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define ADC_SQR3_SQ1_4 ((uint32_t)0x00000010) /*!< Bit 4 */ - -#define ADC_SQR3_SQ2 ((uint32_t)0x000003E0) /*!< SQ2[4:0] bits (2nd conversion in regular sequence) */ -#define ADC_SQR3_SQ2_0 ((uint32_t)0x00000020) /*!< Bit 0 */ -#define ADC_SQR3_SQ2_1 ((uint32_t)0x00000040) /*!< Bit 1 */ -#define ADC_SQR3_SQ2_2 ((uint32_t)0x00000080) /*!< Bit 2 */ -#define ADC_SQR3_SQ2_3 ((uint32_t)0x00000100) /*!< Bit 3 */ -#define ADC_SQR3_SQ2_4 ((uint32_t)0x00000200) /*!< Bit 4 */ - -#define ADC_SQR3_SQ3 ((uint32_t)0x00007C00) /*!< SQ3[4:0] bits (3rd conversion in regular sequence) */ -#define ADC_SQR3_SQ3_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define ADC_SQR3_SQ3_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define ADC_SQR3_SQ3_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define ADC_SQR3_SQ3_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define ADC_SQR3_SQ3_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define ADC_SQR3_SQ4 ((uint32_t)0x000F8000) /*!< SQ4[4:0] bits (4th conversion in regular sequence) */ -#define ADC_SQR3_SQ4_0 ((uint32_t)0x00008000) /*!< Bit 0 */ -#define ADC_SQR3_SQ4_1 ((uint32_t)0x00010000) /*!< Bit 1 */ -#define ADC_SQR3_SQ4_2 ((uint32_t)0x00020000) /*!< Bit 2 */ -#define ADC_SQR3_SQ4_3 ((uint32_t)0x00040000) /*!< Bit 3 */ -#define ADC_SQR3_SQ4_4 ((uint32_t)0x00080000) /*!< Bit 4 */ - -#define ADC_SQR3_SQ5 ((uint32_t)0x01F00000) /*!< SQ5[4:0] bits (5th conversion in regular sequence) */ -#define ADC_SQR3_SQ5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define ADC_SQR3_SQ5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define ADC_SQR3_SQ5_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define ADC_SQR3_SQ5_3 ((uint32_t)0x00800000) /*!< Bit 3 */ -#define ADC_SQR3_SQ5_4 ((uint32_t)0x01000000) /*!< Bit 4 */ - -#define ADC_SQR3_SQ6 ((uint32_t)0x3E000000) /*!< SQ6[4:0] bits (6th conversion in regular sequence) */ -#define ADC_SQR3_SQ6_0 ((uint32_t)0x02000000) /*!< Bit 0 */ -#define ADC_SQR3_SQ6_1 ((uint32_t)0x04000000) /*!< Bit 1 */ -#define ADC_SQR3_SQ6_2 ((uint32_t)0x08000000) /*!< Bit 2 */ -#define ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) /*!< Bit 3 */ -#define ADC_SQR3_SQ6_4 ((uint32_t)0x20000000) /*!< Bit 4 */ - -/******************* Bit definition for ADC_JSQR register *******************/ -#define ADC_JSQR_JSQ1 ((uint32_t)0x0000001F) /*!< JSQ1[4:0] bits (1st conversion in injected sequence) */ -#define ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010) /*!< Bit 4 */ - -#define ADC_JSQR_JSQ2 ((uint32_t)0x000003E0) /*!< JSQ2[4:0] bits (2nd conversion in injected sequence) */ -#define ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020) /*!< Bit 0 */ -#define ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040) /*!< Bit 1 */ -#define ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080) /*!< Bit 2 */ -#define ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100) /*!< Bit 3 */ -#define ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200) /*!< Bit 4 */ - -#define ADC_JSQR_JSQ3 ((uint32_t)0x00007C00) /*!< JSQ3[4:0] bits (3rd conversion in injected sequence) */ -#define ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define ADC_JSQR_JSQ4 ((uint32_t)0x000F8000) /*!< JSQ4[4:0] bits (4th conversion in injected sequence) */ -#define ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000) /*!< Bit 0 */ -#define ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000) /*!< Bit 1 */ -#define ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000) /*!< Bit 2 */ -#define ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000) /*!< Bit 3 */ -#define ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000) /*!< Bit 4 */ - -#define ADC_JSQR_JL ((uint32_t)0x00300000) /*!< JL[1:0] bits (Injected Sequence length) */ -#define ADC_JSQR_JL_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define ADC_JSQR_JL_1 ((uint32_t)0x00200000) /*!< Bit 1 */ - -/******************* Bit definition for ADC_JDR1 register *******************/ -#define ADC_JDR1_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ - -/******************* Bit definition for ADC_JDR2 register *******************/ -#define ADC_JDR2_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ - -/******************* Bit definition for ADC_JDR3 register *******************/ -#define ADC_JDR3_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ - -/******************* Bit definition for ADC_JDR4 register *******************/ -#define ADC_JDR4_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ - -/******************** Bit definition for ADC_DR register ********************/ -#define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!< Regular data */ -#define ADC_DR_ADC2DATA ((uint32_t)0xFFFF0000) /*!< ADC2 data */ - -/******************************************************************************/ -/* */ -/* Digital to Analog Converter */ -/* */ -/******************************************************************************/ - -/******************** Bit definition for DAC_CR register ********************/ -#define DAC_CR_EN1 ((uint32_t)0x00000001) /*!< DAC channel1 enable */ -#define DAC_CR_BOFF1 ((uint32_t)0x00000002) /*!< DAC channel1 output buffer disable */ -#define DAC_CR_TEN1 ((uint32_t)0x00000004) /*!< DAC channel1 Trigger enable */ - -#define DAC_CR_TSEL1 ((uint32_t)0x00000038) /*!< TSEL1[2:0] (DAC channel1 Trigger selection) */ -#define DAC_CR_TSEL1_0 ((uint32_t)0x00000008) /*!< Bit 0 */ -#define DAC_CR_TSEL1_1 ((uint32_t)0x00000010) /*!< Bit 1 */ -#define DAC_CR_TSEL1_2 ((uint32_t)0x00000020) /*!< Bit 2 */ - -#define DAC_CR_WAVE1 ((uint32_t)0x000000C0) /*!< WAVE1[1:0] (DAC channel1 noise/triangle wave generation enable) */ -#define DAC_CR_WAVE1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define DAC_CR_WAVE1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -#define DAC_CR_MAMP1 ((uint32_t)0x00000F00) /*!< MAMP1[3:0] (DAC channel1 Mask/Amplitude selector) */ -#define DAC_CR_MAMP1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define DAC_CR_MAMP1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define DAC_CR_MAMP1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define DAC_CR_MAMP1_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define DAC_CR_DMAEN1 ((uint32_t)0x00001000) /*!< DAC channel1 DMA enable */ -#define DAC_CR_EN2 ((uint32_t)0x00010000) /*!< DAC channel2 enable */ -#define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!< DAC channel2 output buffer disable */ -#define DAC_CR_TEN2 ((uint32_t)0x00040000) /*!< DAC channel2 Trigger enable */ - -#define DAC_CR_TSEL2 ((uint32_t)0x00380000) /*!< TSEL2[2:0] (DAC channel2 Trigger selection) */ -#define DAC_CR_TSEL2_0 ((uint32_t)0x00080000) /*!< Bit 0 */ -#define DAC_CR_TSEL2_1 ((uint32_t)0x00100000) /*!< Bit 1 */ -#define DAC_CR_TSEL2_2 ((uint32_t)0x00200000) /*!< Bit 2 */ - -#define DAC_CR_WAVE2 ((uint32_t)0x00C00000) /*!< WAVE2[1:0] (DAC channel2 noise/triangle wave generation enable) */ -#define DAC_CR_WAVE2_0 ((uint32_t)0x00400000) /*!< Bit 0 */ -#define DAC_CR_WAVE2_1 ((uint32_t)0x00800000) /*!< Bit 1 */ - -#define DAC_CR_MAMP2 ((uint32_t)0x0F000000) /*!< MAMP2[3:0] (DAC channel2 Mask/Amplitude selector) */ -#define DAC_CR_MAMP2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define DAC_CR_MAMP2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define DAC_CR_MAMP2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define DAC_CR_MAMP2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define DAC_CR_DMAEN2 ((uint32_t)0x10000000) /*!< DAC channel2 DMA enabled */ - -/***************** Bit definition for DAC_SWTRIGR register ******************/ -#define DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) /*!< DAC channel1 software trigger */ -#define DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) /*!< DAC channel2 software trigger */ - -/***************** Bit definition for DAC_DHR12R1 register ******************/ -#define DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) /*!< DAC channel1 12-bit Right aligned data */ - -/***************** Bit definition for DAC_DHR12L1 register ******************/ -#define DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) /*!< DAC channel1 12-bit Left aligned data */ - -/****************** Bit definition for DAC_DHR8R1 register ******************/ -#define DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) /*!< DAC channel1 8-bit Right aligned data */ - -/***************** Bit definition for DAC_DHR12R2 register ******************/ -#define DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) /*!< DAC channel2 12-bit Right aligned data */ - -/***************** Bit definition for DAC_DHR12L2 register ******************/ -#define DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) /*!< DAC channel2 12-bit Left aligned data */ - -/****************** Bit definition for DAC_DHR8R2 register ******************/ -#define DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) /*!< DAC channel2 8-bit Right aligned data */ - -/***************** Bit definition for DAC_DHR12RD register ******************/ -#define DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) /*!< DAC channel1 12-bit Right aligned data */ -#define DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) /*!< DAC channel2 12-bit Right aligned data */ - -/***************** Bit definition for DAC_DHR12LD register ******************/ -#define DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) /*!< DAC channel1 12-bit Left aligned data */ -#define DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000) /*!< DAC channel2 12-bit Left aligned data */ - -/****************** Bit definition for DAC_DHR8RD register ******************/ -#define DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF) /*!< DAC channel1 8-bit Right aligned data */ -#define DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00) /*!< DAC channel2 8-bit Right aligned data */ - -/******************* Bit definition for DAC_DOR1 register *******************/ -#define DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF) /*!< DAC channel1 data output */ - -/******************* Bit definition for DAC_DOR2 register *******************/ -#define DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF) /*!< DAC channel2 data output */ - -/******************** Bit definition for DAC_SR register ********************/ -#define DAC_SR_DMAUDR1 ((uint32_t)0x00002000) /*!< DAC channel1 DMA underrun flag */ -#define DAC_SR_DMAUDR2 ((uint32_t)0x20000000) /*!< DAC channel2 DMA underrun flag */ - -/******************************************************************************/ -/* */ -/* CEC */ -/* */ -/******************************************************************************/ -/******************** Bit definition for CEC_CFGR register ******************/ -#define CEC_CFGR_PE ((uint16_t)0x0001) /*!< Peripheral Enable */ -#define CEC_CFGR_IE ((uint16_t)0x0002) /*!< Interrupt Enable */ -#define CEC_CFGR_BTEM ((uint16_t)0x0004) /*!< Bit Timing Error Mode */ -#define CEC_CFGR_BPEM ((uint16_t)0x0008) /*!< Bit Period Error Mode */ - -/******************** Bit definition for CEC_OAR register ******************/ -#define CEC_OAR_OA ((uint16_t)0x000F) /*!< OA[3:0]: Own Address */ -#define CEC_OAR_OA_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define CEC_OAR_OA_1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define CEC_OAR_OA_2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define CEC_OAR_OA_3 ((uint16_t)0x0008) /*!< Bit 3 */ - -/******************** Bit definition for CEC_PRES register ******************/ -#define CEC_PRES_PRES ((uint16_t)0x3FFF) /*!< Prescaler Counter Value */ - -/******************** Bit definition for CEC_ESR register ******************/ -#define CEC_ESR_BTE ((uint16_t)0x0001) /*!< Bit Timing Error */ -#define CEC_ESR_BPE ((uint16_t)0x0002) /*!< Bit Period Error */ -#define CEC_ESR_RBTFE ((uint16_t)0x0004) /*!< Rx Block Transfer Finished Error */ -#define CEC_ESR_SBE ((uint16_t)0x0008) /*!< Start Bit Error */ -#define CEC_ESR_ACKE ((uint16_t)0x0010) /*!< Block Acknowledge Error */ -#define CEC_ESR_LINE ((uint16_t)0x0020) /*!< Line Error */ -#define CEC_ESR_TBTFE ((uint16_t)0x0040) /*!< Tx Block Transfer Finished Error */ - -/******************** Bit definition for CEC_CSR register ******************/ -#define CEC_CSR_TSOM ((uint16_t)0x0001) /*!< Tx Start Of Message */ -#define CEC_CSR_TEOM ((uint16_t)0x0002) /*!< Tx End Of Message */ -#define CEC_CSR_TERR ((uint16_t)0x0004) /*!< Tx Error */ -#define CEC_CSR_TBTRF ((uint16_t)0x0008) /*!< Tx Byte Transfer Request or Block Transfer Finished */ -#define CEC_CSR_RSOM ((uint16_t)0x0010) /*!< Rx Start Of Message */ -#define CEC_CSR_REOM ((uint16_t)0x0020) /*!< Rx End Of Message */ -#define CEC_CSR_RERR ((uint16_t)0x0040) /*!< Rx Error */ -#define CEC_CSR_RBTF ((uint16_t)0x0080) /*!< Rx Block Transfer Finished */ - -/******************** Bit definition for CEC_TXD register ******************/ -#define CEC_TXD_TXD ((uint16_t)0x00FF) /*!< Tx Data register */ - -/******************** Bit definition for CEC_RXD register ******************/ -#define CEC_RXD_RXD ((uint16_t)0x00FF) /*!< Rx Data register */ - -/******************************************************************************/ -/* */ -/* TIM */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for TIM_CR1 register ********************/ -#define TIM_CR1_CEN ((uint16_t)0x0001) /*!< Counter enable */ -#define TIM_CR1_UDIS ((uint16_t)0x0002) /*!< Update disable */ -#define TIM_CR1_URS ((uint16_t)0x0004) /*!< Update request source */ -#define TIM_CR1_OPM ((uint16_t)0x0008) /*!< One pulse mode */ -#define TIM_CR1_DIR ((uint16_t)0x0010) /*!< Direction */ - -#define TIM_CR1_CMS ((uint16_t)0x0060) /*!< CMS[1:0] bits (Center-aligned mode selection) */ -#define TIM_CR1_CMS_0 ((uint16_t)0x0020) /*!< Bit 0 */ -#define TIM_CR1_CMS_1 ((uint16_t)0x0040) /*!< Bit 1 */ - -#define TIM_CR1_ARPE ((uint16_t)0x0080) /*!< Auto-reload preload enable */ - -#define TIM_CR1_CKD ((uint16_t)0x0300) /*!< CKD[1:0] bits (clock division) */ -#define TIM_CR1_CKD_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define TIM_CR1_CKD_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -/******************* Bit definition for TIM_CR2 register ********************/ -#define TIM_CR2_CCPC ((uint16_t)0x0001) /*!< Capture/Compare Preloaded Control */ -#define TIM_CR2_CCUS ((uint16_t)0x0004) /*!< Capture/Compare Control Update Selection */ -#define TIM_CR2_CCDS ((uint16_t)0x0008) /*!< Capture/Compare DMA Selection */ - -#define TIM_CR2_MMS ((uint16_t)0x0070) /*!< MMS[2:0] bits (Master Mode Selection) */ -#define TIM_CR2_MMS_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define TIM_CR2_MMS_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define TIM_CR2_MMS_2 ((uint16_t)0x0040) /*!< Bit 2 */ - -#define TIM_CR2_TI1S ((uint16_t)0x0080) /*!< TI1 Selection */ -#define TIM_CR2_OIS1 ((uint16_t)0x0100) /*!< Output Idle state 1 (OC1 output) */ -#define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!< Output Idle state 1 (OC1N output) */ -#define TIM_CR2_OIS2 ((uint16_t)0x0400) /*!< Output Idle state 2 (OC2 output) */ -#define TIM_CR2_OIS2N ((uint16_t)0x0800) /*!< Output Idle state 2 (OC2N output) */ -#define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!< Output Idle state 3 (OC3 output) */ -#define TIM_CR2_OIS3N ((uint16_t)0x2000) /*!< Output Idle state 3 (OC3N output) */ -#define TIM_CR2_OIS4 ((uint16_t)0x4000) /*!< Output Idle state 4 (OC4 output) */ - -/******************* Bit definition for TIM_SMCR register *******************/ -#define TIM_SMCR_SMS ((uint16_t)0x0007) /*!< SMS[2:0] bits (Slave mode selection) */ -#define TIM_SMCR_SMS_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define TIM_SMCR_SMS_1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define TIM_SMCR_SMS_2 ((uint16_t)0x0004) /*!< Bit 2 */ - -#define TIM_SMCR_TS ((uint16_t)0x0070) /*!< TS[2:0] bits (Trigger selection) */ -#define TIM_SMCR_TS_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define TIM_SMCR_TS_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define TIM_SMCR_TS_2 ((uint16_t)0x0040) /*!< Bit 2 */ - -#define TIM_SMCR_MSM ((uint16_t)0x0080) /*!< Master/slave mode */ - -#define TIM_SMCR_ETF ((uint16_t)0x0F00) /*!< ETF[3:0] bits (External trigger filter) */ -#define TIM_SMCR_ETF_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define TIM_SMCR_ETF_1 ((uint16_t)0x0200) /*!< Bit 1 */ -#define TIM_SMCR_ETF_2 ((uint16_t)0x0400) /*!< Bit 2 */ -#define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!< Bit 3 */ - -#define TIM_SMCR_ETPS ((uint16_t)0x3000) /*!< ETPS[1:0] bits (External trigger prescaler) */ -#define TIM_SMCR_ETPS_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define TIM_SMCR_ETPS_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define TIM_SMCR_ECE ((uint16_t)0x4000) /*!< External clock enable */ -#define TIM_SMCR_ETP ((uint16_t)0x8000) /*!< External trigger polarity */ - -/******************* Bit definition for TIM_DIER register *******************/ -#define TIM_DIER_UIE ((uint16_t)0x0001) /*!< Update interrupt enable */ -#define TIM_DIER_CC1IE ((uint16_t)0x0002) /*!< Capture/Compare 1 interrupt enable */ -#define TIM_DIER_CC2IE ((uint16_t)0x0004) /*!< Capture/Compare 2 interrupt enable */ -#define TIM_DIER_CC3IE ((uint16_t)0x0008) /*!< Capture/Compare 3 interrupt enable */ -#define TIM_DIER_CC4IE ((uint16_t)0x0010) /*!< Capture/Compare 4 interrupt enable */ -#define TIM_DIER_COMIE ((uint16_t)0x0020) /*!< COM interrupt enable */ -#define TIM_DIER_TIE ((uint16_t)0x0040) /*!< Trigger interrupt enable */ -#define TIM_DIER_BIE ((uint16_t)0x0080) /*!< Break interrupt enable */ -#define TIM_DIER_UDE ((uint16_t)0x0100) /*!< Update DMA request enable */ -#define TIM_DIER_CC1DE ((uint16_t)0x0200) /*!< Capture/Compare 1 DMA request enable */ -#define TIM_DIER_CC2DE ((uint16_t)0x0400) /*!< Capture/Compare 2 DMA request enable */ -#define TIM_DIER_CC3DE ((uint16_t)0x0800) /*!< Capture/Compare 3 DMA request enable */ -#define TIM_DIER_CC4DE ((uint16_t)0x1000) /*!< Capture/Compare 4 DMA request enable */ -#define TIM_DIER_COMDE ((uint16_t)0x2000) /*!< COM DMA request enable */ -#define TIM_DIER_TDE ((uint16_t)0x4000) /*!< Trigger DMA request enable */ - -/******************** Bit definition for TIM_SR register ********************/ -#define TIM_SR_UIF ((uint16_t)0x0001) /*!< Update interrupt Flag */ -#define TIM_SR_CC1IF ((uint16_t)0x0002) /*!< Capture/Compare 1 interrupt Flag */ -#define TIM_SR_CC2IF ((uint16_t)0x0004) /*!< Capture/Compare 2 interrupt Flag */ -#define TIM_SR_CC3IF ((uint16_t)0x0008) /*!< Capture/Compare 3 interrupt Flag */ -#define TIM_SR_CC4IF ((uint16_t)0x0010) /*!< Capture/Compare 4 interrupt Flag */ -#define TIM_SR_COMIF ((uint16_t)0x0020) /*!< COM interrupt Flag */ -#define TIM_SR_TIF ((uint16_t)0x0040) /*!< Trigger interrupt Flag */ -#define TIM_SR_BIF ((uint16_t)0x0080) /*!< Break interrupt Flag */ -#define TIM_SR_CC1OF ((uint16_t)0x0200) /*!< Capture/Compare 1 Overcapture Flag */ -#define TIM_SR_CC2OF ((uint16_t)0x0400) /*!< Capture/Compare 2 Overcapture Flag */ -#define TIM_SR_CC3OF ((uint16_t)0x0800) /*!< Capture/Compare 3 Overcapture Flag */ -#define TIM_SR_CC4OF ((uint16_t)0x1000) /*!< Capture/Compare 4 Overcapture Flag */ - -/******************* Bit definition for TIM_EGR register ********************/ -#define TIM_EGR_UG ((uint8_t)0x01) /*!< Update Generation */ -#define TIM_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation */ -#define TIM_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation */ -#define TIM_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation */ -#define TIM_EGR_CC4G ((uint8_t)0x10) /*!< Capture/Compare 4 Generation */ -#define TIM_EGR_COMG ((uint8_t)0x20) /*!< Capture/Compare Control Update Generation */ -#define TIM_EGR_TG ((uint8_t)0x40) /*!< Trigger Generation */ -#define TIM_EGR_BG ((uint8_t)0x80) /*!< Break Generation */ - -/****************** Bit definition for TIM_CCMR1 register *******************/ -#define TIM_CCMR1_CC1S ((uint16_t)0x0003) /*!< CC1S[1:0] bits (Capture/Compare 1 Selection) */ -#define TIM_CCMR1_CC1S_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define TIM_CCMR1_CC1S_1 ((uint16_t)0x0002) /*!< Bit 1 */ - -#define TIM_CCMR1_OC1FE ((uint16_t)0x0004) /*!< Output Compare 1 Fast enable */ -#define TIM_CCMR1_OC1PE ((uint16_t)0x0008) /*!< Output Compare 1 Preload enable */ - -#define TIM_CCMR1_OC1M ((uint16_t)0x0070) /*!< OC1M[2:0] bits (Output Compare 1 Mode) */ -#define TIM_CCMR1_OC1M_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define TIM_CCMR1_OC1M_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define TIM_CCMR1_OC1M_2 ((uint16_t)0x0040) /*!< Bit 2 */ - -#define TIM_CCMR1_OC1CE ((uint16_t)0x0080) /*!< Output Compare 1Clear Enable */ - -#define TIM_CCMR1_CC2S ((uint16_t)0x0300) /*!< CC2S[1:0] bits (Capture/Compare 2 Selection) */ -#define TIM_CCMR1_CC2S_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define TIM_CCMR1_CC2S_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define TIM_CCMR1_OC2FE ((uint16_t)0x0400) /*!< Output Compare 2 Fast enable */ -#define TIM_CCMR1_OC2PE ((uint16_t)0x0800) /*!< Output Compare 2 Preload enable */ - -#define TIM_CCMR1_OC2M ((uint16_t)0x7000) /*!< OC2M[2:0] bits (Output Compare 2 Mode) */ -#define TIM_CCMR1_OC2M_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define TIM_CCMR1_OC2M_1 ((uint16_t)0x2000) /*!< Bit 1 */ -#define TIM_CCMR1_OC2M_2 ((uint16_t)0x4000) /*!< Bit 2 */ - -#define TIM_CCMR1_OC2CE ((uint16_t)0x8000) /*!< Output Compare 2 Clear Enable */ - -/*----------------------------------------------------------------------------*/ - -#define TIM_CCMR1_IC1PSC ((uint16_t)0x000C) /*!< IC1PSC[1:0] bits (Input Capture 1 Prescaler) */ -#define TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004) /*!< Bit 0 */ -#define TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008) /*!< Bit 1 */ - -#define TIM_CCMR1_IC1F ((uint16_t)0x00F0) /*!< IC1F[3:0] bits (Input Capture 1 Filter) */ -#define TIM_CCMR1_IC1F_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define TIM_CCMR1_IC1F_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define TIM_CCMR1_IC1F_2 ((uint16_t)0x0040) /*!< Bit 2 */ -#define TIM_CCMR1_IC1F_3 ((uint16_t)0x0080) /*!< Bit 3 */ - -#define TIM_CCMR1_IC2PSC ((uint16_t)0x0C00) /*!< IC2PSC[1:0] bits (Input Capture 2 Prescaler) */ -#define TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define TIM_CCMR1_IC2F ((uint16_t)0xF000) /*!< IC2F[3:0] bits (Input Capture 2 Filter) */ -#define TIM_CCMR1_IC2F_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define TIM_CCMR1_IC2F_1 ((uint16_t)0x2000) /*!< Bit 1 */ -#define TIM_CCMR1_IC2F_2 ((uint16_t)0x4000) /*!< Bit 2 */ -#define TIM_CCMR1_IC2F_3 ((uint16_t)0x8000) /*!< Bit 3 */ - -/****************** Bit definition for TIM_CCMR2 register *******************/ -#define TIM_CCMR2_CC3S ((uint16_t)0x0003) /*!< CC3S[1:0] bits (Capture/Compare 3 Selection) */ -#define TIM_CCMR2_CC3S_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define TIM_CCMR2_CC3S_1 ((uint16_t)0x0002) /*!< Bit 1 */ - -#define TIM_CCMR2_OC3FE ((uint16_t)0x0004) /*!< Output Compare 3 Fast enable */ -#define TIM_CCMR2_OC3PE ((uint16_t)0x0008) /*!< Output Compare 3 Preload enable */ - -#define TIM_CCMR2_OC3M ((uint16_t)0x0070) /*!< OC3M[2:0] bits (Output Compare 3 Mode) */ -#define TIM_CCMR2_OC3M_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define TIM_CCMR2_OC3M_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define TIM_CCMR2_OC3M_2 ((uint16_t)0x0040) /*!< Bit 2 */ - -#define TIM_CCMR2_OC3CE ((uint16_t)0x0080) /*!< Output Compare 3 Clear Enable */ - -#define TIM_CCMR2_CC4S ((uint16_t)0x0300) /*!< CC4S[1:0] bits (Capture/Compare 4 Selection) */ -#define TIM_CCMR2_CC4S_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define TIM_CCMR2_CC4S_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define TIM_CCMR2_OC4FE ((uint16_t)0x0400) /*!< Output Compare 4 Fast enable */ -#define TIM_CCMR2_OC4PE ((uint16_t)0x0800) /*!< Output Compare 4 Preload enable */ - -#define TIM_CCMR2_OC4M ((uint16_t)0x7000) /*!< OC4M[2:0] bits (Output Compare 4 Mode) */ -#define TIM_CCMR2_OC4M_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define TIM_CCMR2_OC4M_1 ((uint16_t)0x2000) /*!< Bit 1 */ -#define TIM_CCMR2_OC4M_2 ((uint16_t)0x4000) /*!< Bit 2 */ - -#define TIM_CCMR2_OC4CE ((uint16_t)0x8000) /*!< Output Compare 4 Clear Enable */ - -/*----------------------------------------------------------------------------*/ - -#define TIM_CCMR2_IC3PSC ((uint16_t)0x000C) /*!< IC3PSC[1:0] bits (Input Capture 3 Prescaler) */ -#define TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004) /*!< Bit 0 */ -#define TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) /*!< Bit 1 */ - -#define TIM_CCMR2_IC3F ((uint16_t)0x00F0) /*!< IC3F[3:0] bits (Input Capture 3 Filter) */ -#define TIM_CCMR2_IC3F_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define TIM_CCMR2_IC3F_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define TIM_CCMR2_IC3F_2 ((uint16_t)0x0040) /*!< Bit 2 */ -#define TIM_CCMR2_IC3F_3 ((uint16_t)0x0080) /*!< Bit 3 */ - -#define TIM_CCMR2_IC4PSC ((uint16_t)0x0C00) /*!< IC4PSC[1:0] bits (Input Capture 4 Prescaler) */ -#define TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800) /*!< Bit 1 */ - -#define TIM_CCMR2_IC4F ((uint16_t)0xF000) /*!< IC4F[3:0] bits (Input Capture 4 Filter) */ -#define TIM_CCMR2_IC4F_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define TIM_CCMR2_IC4F_1 ((uint16_t)0x2000) /*!< Bit 1 */ -#define TIM_CCMR2_IC4F_2 ((uint16_t)0x4000) /*!< Bit 2 */ -#define TIM_CCMR2_IC4F_3 ((uint16_t)0x8000) /*!< Bit 3 */ - -/******************* Bit definition for TIM_CCER register *******************/ -#define TIM_CCER_CC1E ((uint16_t)0x0001) /*!< Capture/Compare 1 output enable */ -#define TIM_CCER_CC1P ((uint16_t)0x0002) /*!< Capture/Compare 1 output Polarity */ -#define TIM_CCER_CC1NE ((uint16_t)0x0004) /*!< Capture/Compare 1 Complementary output enable */ -#define TIM_CCER_CC1NP ((uint16_t)0x0008) /*!< Capture/Compare 1 Complementary output Polarity */ -#define TIM_CCER_CC2E ((uint16_t)0x0010) /*!< Capture/Compare 2 output enable */ -#define TIM_CCER_CC2P ((uint16_t)0x0020) /*!< Capture/Compare 2 output Polarity */ -#define TIM_CCER_CC2NE ((uint16_t)0x0040) /*!< Capture/Compare 2 Complementary output enable */ -#define TIM_CCER_CC2NP ((uint16_t)0x0080) /*!< Capture/Compare 2 Complementary output Polarity */ -#define TIM_CCER_CC3E ((uint16_t)0x0100) /*!< Capture/Compare 3 output enable */ -#define TIM_CCER_CC3P ((uint16_t)0x0200) /*!< Capture/Compare 3 output Polarity */ -#define TIM_CCER_CC3NE ((uint16_t)0x0400) /*!< Capture/Compare 3 Complementary output enable */ -#define TIM_CCER_CC3NP ((uint16_t)0x0800) /*!< Capture/Compare 3 Complementary output Polarity */ -#define TIM_CCER_CC4E ((uint16_t)0x1000) /*!< Capture/Compare 4 output enable */ -#define TIM_CCER_CC4P ((uint16_t)0x2000) /*!< Capture/Compare 4 output Polarity */ -#define TIM_CCER_CC4NP ((uint16_t)0x8000) /*!< Capture/Compare 4 Complementary output Polarity */ - -/******************* Bit definition for TIM_CNT register ********************/ -#define TIM_CNT_CNT ((uint16_t)0xFFFF) /*!< Counter Value */ - -/******************* Bit definition for TIM_PSC register ********************/ -#define TIM_PSC_PSC ((uint16_t)0xFFFF) /*!< Prescaler Value */ - -/******************* Bit definition for TIM_ARR register ********************/ -#define TIM_ARR_ARR ((uint16_t)0xFFFF) /*!< actual auto-reload Value */ - -/******************* Bit definition for TIM_RCR register ********************/ -#define TIM_RCR_REP ((uint8_t)0xFF) /*!< Repetition Counter Value */ - -/******************* Bit definition for TIM_CCR1 register *******************/ -#define TIM_CCR1_CCR1 ((uint16_t)0xFFFF) /*!< Capture/Compare 1 Value */ - -/******************* Bit definition for TIM_CCR2 register *******************/ -#define TIM_CCR2_CCR2 ((uint16_t)0xFFFF) /*!< Capture/Compare 2 Value */ - -/******************* Bit definition for TIM_CCR3 register *******************/ -#define TIM_CCR3_CCR3 ((uint16_t)0xFFFF) /*!< Capture/Compare 3 Value */ - -/******************* Bit definition for TIM_CCR4 register *******************/ -#define TIM_CCR4_CCR4 ((uint16_t)0xFFFF) /*!< Capture/Compare 4 Value */ - -/******************* Bit definition for TIM_BDTR register *******************/ -#define TIM_BDTR_DTG ((uint16_t)0x00FF) /*!< DTG[0:7] bits (Dead-Time Generator set-up) */ -#define TIM_BDTR_DTG_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define TIM_BDTR_DTG_1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define TIM_BDTR_DTG_2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define TIM_BDTR_DTG_3 ((uint16_t)0x0008) /*!< Bit 3 */ -#define TIM_BDTR_DTG_4 ((uint16_t)0x0010) /*!< Bit 4 */ -#define TIM_BDTR_DTG_5 ((uint16_t)0x0020) /*!< Bit 5 */ -#define TIM_BDTR_DTG_6 ((uint16_t)0x0040) /*!< Bit 6 */ -#define TIM_BDTR_DTG_7 ((uint16_t)0x0080) /*!< Bit 7 */ - -#define TIM_BDTR_LOCK ((uint16_t)0x0300) /*!< LOCK[1:0] bits (Lock Configuration) */ -#define TIM_BDTR_LOCK_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define TIM_BDTR_LOCK_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define TIM_BDTR_OSSI ((uint16_t)0x0400) /*!< Off-State Selection for Idle mode */ -#define TIM_BDTR_OSSR ((uint16_t)0x0800) /*!< Off-State Selection for Run mode */ -#define TIM_BDTR_BKE ((uint16_t)0x1000) /*!< Break enable */ -#define TIM_BDTR_BKP ((uint16_t)0x2000) /*!< Break Polarity */ -#define TIM_BDTR_AOE ((uint16_t)0x4000) /*!< Automatic Output enable */ -#define TIM_BDTR_MOE ((uint16_t)0x8000) /*!< Main Output enable */ - -/******************* Bit definition for TIM_DCR register ********************/ -#define TIM_DCR_DBA ((uint16_t)0x001F) /*!< DBA[4:0] bits (DMA Base Address) */ -#define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define TIM_DCR_DBA_3 ((uint16_t)0x0008) /*!< Bit 3 */ -#define TIM_DCR_DBA_4 ((uint16_t)0x0010) /*!< Bit 4 */ - -#define TIM_DCR_DBL ((uint16_t)0x1F00) /*!< DBL[4:0] bits (DMA Burst Length) */ -#define TIM_DCR_DBL_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define TIM_DCR_DBL_1 ((uint16_t)0x0200) /*!< Bit 1 */ -#define TIM_DCR_DBL_2 ((uint16_t)0x0400) /*!< Bit 2 */ -#define TIM_DCR_DBL_3 ((uint16_t)0x0800) /*!< Bit 3 */ -#define TIM_DCR_DBL_4 ((uint16_t)0x1000) /*!< Bit 4 */ - -/******************* Bit definition for TIM_DMAR register *******************/ -#define TIM_DMAR_DMAB ((uint16_t)0xFFFF) /*!< DMA register for burst accesses */ - -/******************************************************************************/ -/* */ -/* Real-Time Clock */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for RTC_CRH register ********************/ -#define RTC_CRH_SECIE ((uint8_t)0x01) /*!< Second Interrupt Enable */ -#define RTC_CRH_ALRIE ((uint8_t)0x02) /*!< Alarm Interrupt Enable */ -#define RTC_CRH_OWIE ((uint8_t)0x04) /*!< OverfloW Interrupt Enable */ - -/******************* Bit definition for RTC_CRL register ********************/ -#define RTC_CRL_SECF ((uint8_t)0x01) /*!< Second Flag */ -#define RTC_CRL_ALRF ((uint8_t)0x02) /*!< Alarm Flag */ -#define RTC_CRL_OWF ((uint8_t)0x04) /*!< OverfloW Flag */ -#define RTC_CRL_RSF ((uint8_t)0x08) /*!< Registers Synchronized Flag */ -#define RTC_CRL_CNF ((uint8_t)0x10) /*!< Configuration Flag */ -#define RTC_CRL_RTOFF ((uint8_t)0x20) /*!< RTC operation OFF */ - -/******************* Bit definition for RTC_PRLH register *******************/ -#define RTC_PRLH_PRL ((uint16_t)0x000F) /*!< RTC Prescaler Reload Value High */ - -/******************* Bit definition for RTC_PRLL register *******************/ -#define RTC_PRLL_PRL ((uint16_t)0xFFFF) /*!< RTC Prescaler Reload Value Low */ - -/******************* Bit definition for RTC_DIVH register *******************/ -#define RTC_DIVH_RTC_DIV ((uint16_t)0x000F) /*!< RTC Clock Divider High */ - -/******************* Bit definition for RTC_DIVL register *******************/ -#define RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF) /*!< RTC Clock Divider Low */ - -/******************* Bit definition for RTC_CNTH register *******************/ -#define RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF) /*!< RTC Counter High */ - -/******************* Bit definition for RTC_CNTL register *******************/ -#define RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF) /*!< RTC Counter Low */ - -/******************* Bit definition for RTC_ALRH register *******************/ -#define RTC_ALRH_RTC_ALR ((uint16_t)0xFFFF) /*!< RTC Alarm High */ - -/******************* Bit definition for RTC_ALRL register *******************/ -#define RTC_ALRL_RTC_ALR ((uint16_t)0xFFFF) /*!< RTC Alarm Low */ - -/******************************************************************************/ -/* */ -/* Independent WATCHDOG */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for IWDG_KR register ********************/ -#define IWDG_KR_KEY ((uint16_t)0xFFFF) /*!< Key value (write only, read 0000h) */ - -/******************* Bit definition for IWDG_PR register ********************/ -#define IWDG_PR_PR ((uint8_t)0x07) /*!< PR[2:0] (Prescaler divider) */ -#define IWDG_PR_PR_0 ((uint8_t)0x01) /*!< Bit 0 */ -#define IWDG_PR_PR_1 ((uint8_t)0x02) /*!< Bit 1 */ -#define IWDG_PR_PR_2 ((uint8_t)0x04) /*!< Bit 2 */ - -/******************* Bit definition for IWDG_RLR register *******************/ -#define IWDG_RLR_RL ((uint16_t)0x0FFF) /*!< Watchdog counter reload value */ - -/******************* Bit definition for IWDG_SR register ********************/ -#define IWDG_SR_PVU ((uint8_t)0x01) /*!< Watchdog prescaler value update */ -#define IWDG_SR_RVU ((uint8_t)0x02) /*!< Watchdog counter reload value update */ - -/******************************************************************************/ -/* */ -/* Window WATCHDOG */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for WWDG_CR register ********************/ -#define WWDG_CR_T ((uint8_t)0x7F) /*!< T[6:0] bits (7-Bit counter (MSB to LSB)) */ -#define WWDG_CR_T0 ((uint8_t)0x01) /*!< Bit 0 */ -#define WWDG_CR_T1 ((uint8_t)0x02) /*!< Bit 1 */ -#define WWDG_CR_T2 ((uint8_t)0x04) /*!< Bit 2 */ -#define WWDG_CR_T3 ((uint8_t)0x08) /*!< Bit 3 */ -#define WWDG_CR_T4 ((uint8_t)0x10) /*!< Bit 4 */ -#define WWDG_CR_T5 ((uint8_t)0x20) /*!< Bit 5 */ -#define WWDG_CR_T6 ((uint8_t)0x40) /*!< Bit 6 */ - -#define WWDG_CR_WDGA ((uint8_t)0x80) /*!< Activation bit */ - -/******************* Bit definition for WWDG_CFR register *******************/ -#define WWDG_CFR_W ((uint16_t)0x007F) /*!< W[6:0] bits (7-bit window value) */ -#define WWDG_CFR_W0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define WWDG_CFR_W1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define WWDG_CFR_W2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define WWDG_CFR_W3 ((uint16_t)0x0008) /*!< Bit 3 */ -#define WWDG_CFR_W4 ((uint16_t)0x0010) /*!< Bit 4 */ -#define WWDG_CFR_W5 ((uint16_t)0x0020) /*!< Bit 5 */ -#define WWDG_CFR_W6 ((uint16_t)0x0040) /*!< Bit 6 */ - -#define WWDG_CFR_WDGTB ((uint16_t)0x0180) /*!< WDGTB[1:0] bits (Timer Base) */ -#define WWDG_CFR_WDGTB0 ((uint16_t)0x0080) /*!< Bit 0 */ -#define WWDG_CFR_WDGTB1 ((uint16_t)0x0100) /*!< Bit 1 */ - -#define WWDG_CFR_EWI ((uint16_t)0x0200) /*!< Early Wakeup Interrupt */ - -/******************* Bit definition for WWDG_SR register ********************/ -#define WWDG_SR_EWIF ((uint8_t)0x01) /*!< Early Wakeup Interrupt Flag */ - -/******************************************************************************/ -/* */ -/* Flexible Static Memory Controller */ -/* */ -/******************************************************************************/ - -/****************** Bit definition for FSMC_BCR1 register *******************/ -#define FSMC_BCR1_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ -#define FSMC_BCR1_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ - -#define FSMC_BCR1_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ -#define FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define FSMC_BCR1_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ -#define FSMC_BCR1_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BCR1_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_BCR1_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ -#define FSMC_BCR1_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ -#define FSMC_BCR1_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ -#define FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ -#define FSMC_BCR1_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ -#define FSMC_BCR1_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ -#define FSMC_BCR1_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ -#define FSMC_BCR1_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ -#define FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ -#define FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ - -/****************** Bit definition for FSMC_BCR2 register *******************/ -#define FSMC_BCR2_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ -#define FSMC_BCR2_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ - -#define FSMC_BCR2_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ -#define FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define FSMC_BCR2_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ -#define FSMC_BCR2_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BCR2_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_BCR2_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ -#define FSMC_BCR2_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ -#define FSMC_BCR2_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ -#define FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ -#define FSMC_BCR2_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ -#define FSMC_BCR2_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ -#define FSMC_BCR2_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ -#define FSMC_BCR2_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ -#define FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ -#define FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ - -/****************** Bit definition for FSMC_BCR3 register *******************/ -#define FSMC_BCR3_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ -#define FSMC_BCR3_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ - -#define FSMC_BCR3_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ -#define FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define FSMC_BCR3_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ -#define FSMC_BCR3_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BCR3_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_BCR3_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ -#define FSMC_BCR3_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ -#define FSMC_BCR3_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit. */ -#define FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ -#define FSMC_BCR3_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ -#define FSMC_BCR3_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ -#define FSMC_BCR3_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ -#define FSMC_BCR3_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ -#define FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ -#define FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ - -/****************** Bit definition for FSMC_BCR4 register *******************/ -#define FSMC_BCR4_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ -#define FSMC_BCR4_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ - -#define FSMC_BCR4_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ -#define FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ -#define FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ - -#define FSMC_BCR4_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ -#define FSMC_BCR4_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BCR4_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_BCR4_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ -#define FSMC_BCR4_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ -#define FSMC_BCR4_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ -#define FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ -#define FSMC_BCR4_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ -#define FSMC_BCR4_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ -#define FSMC_BCR4_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ -#define FSMC_BCR4_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ -#define FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ -#define FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ - -/****************** Bit definition for FSMC_BTR1 register ******************/ -#define FSMC_BTR1_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BTR1_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ -#define FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ - -#define FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BTR1_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BTR1_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_BTR2 register *******************/ -#define FSMC_BTR2_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BTR2_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ -#define FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ - -#define FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BTR2_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BTR2_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/******************* Bit definition for FSMC_BTR3 register *******************/ -#define FSMC_BTR3_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BTR3_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ -#define FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ - -#define FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BTR3_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BTR3_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_BTR4 register *******************/ -#define FSMC_BTR4_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BTR4_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ -#define FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ - -#define FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BTR4_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BTR4_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_BWTR1 register ******************/ -#define FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_BWTR2 register ******************/ -#define FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1*/ -#define FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_BWTR3 register ******************/ -#define FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_BWTR4 register ******************/ -#define FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ -#define FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ - -#define FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ -#define FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ -#define FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ - -#define FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ -#define FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ - -#define FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ -#define FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ -#define FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ -#define FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ -#define FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ - -#define FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ -#define FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ - -#define FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ -#define FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ -#define FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ - -/****************** Bit definition for FSMC_PCR2 register *******************/ -#define FSMC_PCR2_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ -#define FSMC_PCR2_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ -#define FSMC_PCR2_PTYP ((uint32_t)0x00000008) /*!< Memory type */ - -#define FSMC_PCR2_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ -#define FSMC_PCR2_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_PCR2_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_PCR2_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ - -#define FSMC_PCR2_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ -#define FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ -#define FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ -#define FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ -#define FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ - -#define FSMC_PCR2_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ -#define FSMC_PCR2_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ -#define FSMC_PCR2_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ -#define FSMC_PCR2_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ -#define FSMC_PCR2_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ - -#define FSMC_PCR2_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[1:0] bits (ECC page size) */ -#define FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ -#define FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ -#define FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ - -/****************** Bit definition for FSMC_PCR3 register *******************/ -#define FSMC_PCR3_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ -#define FSMC_PCR3_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ -#define FSMC_PCR3_PTYP ((uint32_t)0x00000008) /*!< Memory type */ - -#define FSMC_PCR3_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ -#define FSMC_PCR3_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_PCR3_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_PCR3_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ - -#define FSMC_PCR3_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ -#define FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ -#define FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ -#define FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ -#define FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ - -#define FSMC_PCR3_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ -#define FSMC_PCR3_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ -#define FSMC_PCR3_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ -#define FSMC_PCR3_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ -#define FSMC_PCR3_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ - -#define FSMC_PCR3_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[2:0] bits (ECC page size) */ -#define FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ -#define FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ -#define FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ - -/****************** Bit definition for FSMC_PCR4 register *******************/ -#define FSMC_PCR4_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ -#define FSMC_PCR4_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ -#define FSMC_PCR4_PTYP ((uint32_t)0x00000008) /*!< Memory type */ - -#define FSMC_PCR4_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ -#define FSMC_PCR4_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define FSMC_PCR4_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ - -#define FSMC_PCR4_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ - -#define FSMC_PCR4_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ -#define FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ -#define FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ -#define FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ -#define FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ - -#define FSMC_PCR4_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ -#define FSMC_PCR4_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ -#define FSMC_PCR4_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ -#define FSMC_PCR4_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ -#define FSMC_PCR4_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ - -#define FSMC_PCR4_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[2:0] bits (ECC page size) */ -#define FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ -#define FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ -#define FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ - -/******************* Bit definition for FSMC_SR2 register *******************/ -#define FSMC_SR2_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ -#define FSMC_SR2_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ -#define FSMC_SR2_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ -#define FSMC_SR2_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ -#define FSMC_SR2_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ -#define FSMC_SR2_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ -#define FSMC_SR2_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ - -/******************* Bit definition for FSMC_SR3 register *******************/ -#define FSMC_SR3_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ -#define FSMC_SR3_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ -#define FSMC_SR3_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ -#define FSMC_SR3_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ -#define FSMC_SR3_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ -#define FSMC_SR3_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ -#define FSMC_SR3_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ - -/******************* Bit definition for FSMC_SR4 register *******************/ -#define FSMC_SR4_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ -#define FSMC_SR4_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ -#define FSMC_SR4_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ -#define FSMC_SR4_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ -#define FSMC_SR4_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ -#define FSMC_SR4_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ -#define FSMC_SR4_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ - -/****************** Bit definition for FSMC_PMEM2 register ******************/ -#define FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) /*!< MEMSET2[7:0] bits (Common memory 2 setup time) */ -#define FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) /*!< MEMWAIT2[7:0] bits (Common memory 2 wait time) */ -#define FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) /*!< MEMHOLD2[7:0] bits (Common memory 2 hold time) */ -#define FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) /*!< MEMHIZ2[7:0] bits (Common memory 2 databus HiZ time) */ -#define FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_PMEM3 register ******************/ -#define FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) /*!< MEMSET3[7:0] bits (Common memory 3 setup time) */ -#define FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) /*!< MEMWAIT3[7:0] bits (Common memory 3 wait time) */ -#define FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) /*!< MEMHOLD3[7:0] bits (Common memory 3 hold time) */ -#define FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) /*!< MEMHIZ3[7:0] bits (Common memory 3 databus HiZ time) */ -#define FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_PMEM4 register ******************/ -#define FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) /*!< MEMSET4[7:0] bits (Common memory 4 setup time) */ -#define FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) /*!< MEMWAIT4[7:0] bits (Common memory 4 wait time) */ -#define FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) /*!< MEMHOLD4[7:0] bits (Common memory 4 hold time) */ -#define FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) /*!< MEMHIZ4[7:0] bits (Common memory 4 databus HiZ time) */ -#define FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_PATT2 register ******************/ -#define FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) /*!< ATTSET2[7:0] bits (Attribute memory 2 setup time) */ -#define FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) /*!< ATTWAIT2[7:0] bits (Attribute memory 2 wait time) */ -#define FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) /*!< ATTHOLD2[7:0] bits (Attribute memory 2 hold time) */ -#define FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) /*!< ATTHIZ2[7:0] bits (Attribute memory 2 databus HiZ time) */ -#define FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_PATT3 register ******************/ -#define FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) /*!< ATTSET3[7:0] bits (Attribute memory 3 setup time) */ -#define FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) /*!< ATTWAIT3[7:0] bits (Attribute memory 3 wait time) */ -#define FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) /*!< ATTHOLD3[7:0] bits (Attribute memory 3 hold time) */ -#define FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) /*!< ATTHIZ3[7:0] bits (Attribute memory 3 databus HiZ time) */ -#define FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_PATT4 register ******************/ -#define FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) /*!< ATTSET4[7:0] bits (Attribute memory 4 setup time) */ -#define FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) /*!< ATTWAIT4[7:0] bits (Attribute memory 4 wait time) */ -#define FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) /*!< ATTHOLD4[7:0] bits (Attribute memory 4 hold time) */ -#define FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) /*!< ATTHIZ4[7:0] bits (Attribute memory 4 databus HiZ time) */ -#define FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_PIO4 register *******************/ -#define FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF) /*!< IOSET4[7:0] bits (I/O 4 setup time) */ -#define FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ -#define FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ -#define FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ -#define FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ -#define FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ -#define FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ -#define FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ -#define FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ - -#define FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) /*!< IOWAIT4[7:0] bits (I/O 4 wait time) */ -#define FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ -#define FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ -#define FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ -#define FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ -#define FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ -#define FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ -#define FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ -#define FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ - -#define FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) /*!< IOHOLD4[7:0] bits (I/O 4 hold time) */ -#define FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ - -#define FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) /*!< IOHIZ4[7:0] bits (I/O 4 databus HiZ time) */ -#define FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ -#define FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ -#define FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ -#define FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ -#define FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ -#define FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ -#define FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ -#define FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ - -/****************** Bit definition for FSMC_ECCR2 register ******************/ -#define FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) /*!< ECC result */ - -/****************** Bit definition for FSMC_ECCR3 register ******************/ -#define FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) /*!< ECC result */ - -/******************************************************************************/ -/* */ -/* SD host Interface */ -/* */ -/******************************************************************************/ - -/****************** Bit definition for SDIO_POWER register ******************/ -#define SDIO_POWER_PWRCTRL ((uint8_t)0x03) /*!< PWRCTRL[1:0] bits (Power supply control bits) */ -#define SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01) /*!< Bit 0 */ -#define SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02) /*!< Bit 1 */ - -/****************** Bit definition for SDIO_CLKCR register ******************/ -#define SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF) /*!< Clock divide factor */ -#define SDIO_CLKCR_CLKEN ((uint16_t)0x0100) /*!< Clock enable bit */ -#define SDIO_CLKCR_PWRSAV ((uint16_t)0x0200) /*!< Power saving configuration bit */ -#define SDIO_CLKCR_BYPASS ((uint16_t)0x0400) /*!< Clock divider bypass enable bit */ - -#define SDIO_CLKCR_WIDBUS ((uint16_t)0x1800) /*!< WIDBUS[1:0] bits (Wide bus mode enable bit) */ -#define SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) /*!< Bit 0 */ -#define SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000) /*!< Bit 1 */ - -#define SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000) /*!< SDIO_CK dephasing selection bit */ -#define SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000) /*!< HW Flow Control enable */ - -/******************* Bit definition for SDIO_ARG register *******************/ -#define SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF) /*!< Command argument */ - -/******************* Bit definition for SDIO_CMD register *******************/ -#define SDIO_CMD_CMDINDEX ((uint16_t)0x003F) /*!< Command Index */ - -#define SDIO_CMD_WAITRESP ((uint16_t)0x00C0) /*!< WAITRESP[1:0] bits (Wait for response bits) */ -#define SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040) /*!< Bit 0 */ -#define SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080) /*!< Bit 1 */ - -#define SDIO_CMD_WAITINT ((uint16_t)0x0100) /*!< CPSM Waits for Interrupt Request */ -#define SDIO_CMD_WAITPEND ((uint16_t)0x0200) /*!< CPSM Waits for ends of data transfer (CmdPend internal signal) */ -#define SDIO_CMD_CPSMEN ((uint16_t)0x0400) /*!< Command path state machine (CPSM) Enable bit */ -#define SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800) /*!< SD I/O suspend command */ -#define SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000) /*!< Enable CMD completion */ -#define SDIO_CMD_NIEN ((uint16_t)0x2000) /*!< Not Interrupt Enable */ -#define SDIO_CMD_CEATACMD ((uint16_t)0x4000) /*!< CE-ATA command */ - -/***************** Bit definition for SDIO_RESPCMD register *****************/ -#define SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F) /*!< Response command index */ - -/****************** Bit definition for SDIO_RESP0 register ******************/ -#define SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ - -/****************** Bit definition for SDIO_RESP1 register ******************/ -#define SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ - -/****************** Bit definition for SDIO_RESP2 register ******************/ -#define SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ - -/****************** Bit definition for SDIO_RESP3 register ******************/ -#define SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ - -/****************** Bit definition for SDIO_RESP4 register ******************/ -#define SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ - -/****************** Bit definition for SDIO_DTIMER register *****************/ -#define SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF) /*!< Data timeout period. */ - -/****************** Bit definition for SDIO_DLEN register *******************/ -#define SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF) /*!< Data length value */ - -/****************** Bit definition for SDIO_DCTRL register ******************/ -#define SDIO_DCTRL_DTEN ((uint16_t)0x0001) /*!< Data transfer enabled bit */ -#define SDIO_DCTRL_DTDIR ((uint16_t)0x0002) /*!< Data transfer direction selection */ -#define SDIO_DCTRL_DTMODE ((uint16_t)0x0004) /*!< Data transfer mode selection */ -#define SDIO_DCTRL_DMAEN ((uint16_t)0x0008) /*!< DMA enabled bit */ - -#define SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0) /*!< DBLOCKSIZE[3:0] bits (Data block size) */ -#define SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020) /*!< Bit 1 */ -#define SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040) /*!< Bit 2 */ -#define SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080) /*!< Bit 3 */ - -#define SDIO_DCTRL_RWSTART ((uint16_t)0x0100) /*!< Read wait start */ -#define SDIO_DCTRL_RWSTOP ((uint16_t)0x0200) /*!< Read wait stop */ -#define SDIO_DCTRL_RWMOD ((uint16_t)0x0400) /*!< Read wait mode */ -#define SDIO_DCTRL_SDIOEN ((uint16_t)0x0800) /*!< SD I/O enable functions */ - -/****************** Bit definition for SDIO_DCOUNT register *****************/ -#define SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF) /*!< Data count value */ - -/****************** Bit definition for SDIO_STA register ********************/ -#define SDIO_STA_CCRCFAIL ((uint32_t)0x00000001) /*!< Command response received (CRC check failed) */ -#define SDIO_STA_DCRCFAIL ((uint32_t)0x00000002) /*!< Data block sent/received (CRC check failed) */ -#define SDIO_STA_CTIMEOUT ((uint32_t)0x00000004) /*!< Command response timeout */ -#define SDIO_STA_DTIMEOUT ((uint32_t)0x00000008) /*!< Data timeout */ -#define SDIO_STA_TXUNDERR ((uint32_t)0x00000010) /*!< Transmit FIFO underrun error */ -#define SDIO_STA_RXOVERR ((uint32_t)0x00000020) /*!< Received FIFO overrun error */ -#define SDIO_STA_CMDREND ((uint32_t)0x00000040) /*!< Command response received (CRC check passed) */ -#define SDIO_STA_CMDSENT ((uint32_t)0x00000080) /*!< Command sent (no response required) */ -#define SDIO_STA_DATAEND ((uint32_t)0x00000100) /*!< Data end (data counter, SDIDCOUNT, is zero) */ -#define SDIO_STA_STBITERR ((uint32_t)0x00000200) /*!< Start bit not detected on all data signals in wide bus mode */ -#define SDIO_STA_DBCKEND ((uint32_t)0x00000400) /*!< Data block sent/received (CRC check passed) */ -#define SDIO_STA_CMDACT ((uint32_t)0x00000800) /*!< Command transfer in progress */ -#define SDIO_STA_TXACT ((uint32_t)0x00001000) /*!< Data transmit in progress */ -#define SDIO_STA_RXACT ((uint32_t)0x00002000) /*!< Data receive in progress */ -#define SDIO_STA_TXFIFOHE ((uint32_t)0x00004000) /*!< Transmit FIFO Half Empty: at least 8 words can be written into the FIFO */ -#define SDIO_STA_RXFIFOHF ((uint32_t)0x00008000) /*!< Receive FIFO Half Full: there are at least 8 words in the FIFO */ -#define SDIO_STA_TXFIFOF ((uint32_t)0x00010000) /*!< Transmit FIFO full */ -#define SDIO_STA_RXFIFOF ((uint32_t)0x00020000) /*!< Receive FIFO full */ -#define SDIO_STA_TXFIFOE ((uint32_t)0x00040000) /*!< Transmit FIFO empty */ -#define SDIO_STA_RXFIFOE ((uint32_t)0x00080000) /*!< Receive FIFO empty */ -#define SDIO_STA_TXDAVL ((uint32_t)0x00100000) /*!< Data available in transmit FIFO */ -#define SDIO_STA_RXDAVL ((uint32_t)0x00200000) /*!< Data available in receive FIFO */ -#define SDIO_STA_SDIOIT ((uint32_t)0x00400000) /*!< SDIO interrupt received */ -#define SDIO_STA_CEATAEND ((uint32_t)0x00800000) /*!< CE-ATA command completion signal received for CMD61 */ - -/******************* Bit definition for SDIO_ICR register *******************/ -#define SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001) /*!< CCRCFAIL flag clear bit */ -#define SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002) /*!< DCRCFAIL flag clear bit */ -#define SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004) /*!< CTIMEOUT flag clear bit */ -#define SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008) /*!< DTIMEOUT flag clear bit */ -#define SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010) /*!< TXUNDERR flag clear bit */ -#define SDIO_ICR_RXOVERRC ((uint32_t)0x00000020) /*!< RXOVERR flag clear bit */ -#define SDIO_ICR_CMDRENDC ((uint32_t)0x00000040) /*!< CMDREND flag clear bit */ -#define SDIO_ICR_CMDSENTC ((uint32_t)0x00000080) /*!< CMDSENT flag clear bit */ -#define SDIO_ICR_DATAENDC ((uint32_t)0x00000100) /*!< DATAEND flag clear bit */ -#define SDIO_ICR_STBITERRC ((uint32_t)0x00000200) /*!< STBITERR flag clear bit */ -#define SDIO_ICR_DBCKENDC ((uint32_t)0x00000400) /*!< DBCKEND flag clear bit */ -#define SDIO_ICR_SDIOITC ((uint32_t)0x00400000) /*!< SDIOIT flag clear bit */ -#define SDIO_ICR_CEATAENDC ((uint32_t)0x00800000) /*!< CEATAEND flag clear bit */ - -/****************** Bit definition for SDIO_MASK register *******************/ -#define SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001) /*!< Command CRC Fail Interrupt Enable */ -#define SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002) /*!< Data CRC Fail Interrupt Enable */ -#define SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004) /*!< Command TimeOut Interrupt Enable */ -#define SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008) /*!< Data TimeOut Interrupt Enable */ -#define SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010) /*!< Tx FIFO UnderRun Error Interrupt Enable */ -#define SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020) /*!< Rx FIFO OverRun Error Interrupt Enable */ -#define SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040) /*!< Command Response Received Interrupt Enable */ -#define SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080) /*!< Command Sent Interrupt Enable */ -#define SDIO_MASK_DATAENDIE ((uint32_t)0x00000100) /*!< Data End Interrupt Enable */ -#define SDIO_MASK_STBITERRIE ((uint32_t)0x00000200) /*!< Start Bit Error Interrupt Enable */ -#define SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400) /*!< Data Block End Interrupt Enable */ -#define SDIO_MASK_CMDACTIE ((uint32_t)0x00000800) /*!< Command Acting Interrupt Enable */ -#define SDIO_MASK_TXACTIE ((uint32_t)0x00001000) /*!< Data Transmit Acting Interrupt Enable */ -#define SDIO_MASK_RXACTIE ((uint32_t)0x00002000) /*!< Data receive acting interrupt enabled */ -#define SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000) /*!< Tx FIFO Half Empty interrupt Enable */ -#define SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000) /*!< Rx FIFO Half Full interrupt Enable */ -#define SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000) /*!< Tx FIFO Full interrupt Enable */ -#define SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000) /*!< Rx FIFO Full interrupt Enable */ -#define SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) /*!< Tx FIFO Empty interrupt Enable */ -#define SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000) /*!< Rx FIFO Empty interrupt Enable */ -#define SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000) /*!< Data available in Tx FIFO interrupt Enable */ -#define SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000) /*!< Data available in Rx FIFO interrupt Enable */ -#define SDIO_MASK_SDIOITIE ((uint32_t)0x00400000) /*!< SDIO Mode Interrupt Received interrupt Enable */ -#define SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000) /*!< CE-ATA command completion signal received Interrupt Enable */ - -/***************** Bit definition for SDIO_FIFOCNT register *****************/ -#define SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF) /*!< Remaining number of words to be written to or read from the FIFO */ - -/****************** Bit definition for SDIO_FIFO register *******************/ -#define SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF) /*!< Receive and transmit FIFO data */ - -/******************************************************************************/ -/* */ -/* USB Device FS */ -/* */ -/******************************************************************************/ - -/*!< Endpoint-specific registers */ -/******************* Bit definition for USB_EP0R register *******************/ -#define USB_EP0R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP0R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP0R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP0R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP0R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP0R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP0R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP0R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP0R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP0R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP0R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP0R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP0R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP0R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP1R register *******************/ -#define USB_EP1R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP1R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP1R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP1R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP1R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP1R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP1R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP1R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP1R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP1R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP1R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP1R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP1R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP1R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP2R register *******************/ -#define USB_EP2R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP2R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP2R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP2R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP2R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP2R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP2R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP2R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP2R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP2R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP2R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP2R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP2R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP2R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP3R register *******************/ -#define USB_EP3R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP3R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP3R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP3R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP3R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP3R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP3R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP3R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP3R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP3R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP3R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP3R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP3R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP3R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP4R register *******************/ -#define USB_EP4R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP4R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP4R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP4R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP4R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP4R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP4R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP4R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP4R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP4R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP4R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP4R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP4R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP4R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP5R register *******************/ -#define USB_EP5R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP5R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP5R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP5R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP5R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP5R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP5R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP5R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP5R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP5R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP5R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP5R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP5R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP5R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP6R register *******************/ -#define USB_EP6R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP6R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP6R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP6R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP6R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP6R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP6R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP6R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP6R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP6R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP6R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP6R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP6R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP6R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/******************* Bit definition for USB_EP7R register *******************/ -#define USB_EP7R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ - -#define USB_EP7R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ -#define USB_EP7R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define USB_EP7R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define USB_EP7R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ -#define USB_EP7R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ -#define USB_EP7R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ - -#define USB_EP7R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ -#define USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ -#define USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ - -#define USB_EP7R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ - -#define USB_EP7R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ -#define USB_EP7R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USB_EP7R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USB_EP7R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ -#define USB_EP7R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ - -/*!< Common registers */ -/******************* Bit definition for USB_CNTR register *******************/ -#define USB_CNTR_FRES ((uint16_t)0x0001) /*!< Force USB Reset */ -#define USB_CNTR_PDWN ((uint16_t)0x0002) /*!< Power down */ -#define USB_CNTR_LP_MODE ((uint16_t)0x0004) /*!< Low-power mode */ -#define USB_CNTR_FSUSP ((uint16_t)0x0008) /*!< Force suspend */ -#define USB_CNTR_RESUME ((uint16_t)0x0010) /*!< Resume request */ -#define USB_CNTR_ESOFM ((uint16_t)0x0100) /*!< Expected Start Of Frame Interrupt Mask */ -#define USB_CNTR_SOFM ((uint16_t)0x0200) /*!< Start Of Frame Interrupt Mask */ -#define USB_CNTR_RESETM ((uint16_t)0x0400) /*!< RESET Interrupt Mask */ -#define USB_CNTR_SUSPM ((uint16_t)0x0800) /*!< Suspend mode Interrupt Mask */ -#define USB_CNTR_WKUPM ((uint16_t)0x1000) /*!< Wakeup Interrupt Mask */ -#define USB_CNTR_ERRM ((uint16_t)0x2000) /*!< Error Interrupt Mask */ -#define USB_CNTR_PMAOVRM ((uint16_t)0x4000) /*!< Packet Memory Area Over / Underrun Interrupt Mask */ -#define USB_CNTR_CTRM ((uint16_t)0x8000) /*!< Correct Transfer Interrupt Mask */ - -/******************* Bit definition for USB_ISTR register *******************/ -#define USB_ISTR_EP_ID ((uint16_t)0x000F) /*!< Endpoint Identifier */ -#define USB_ISTR_DIR ((uint16_t)0x0010) /*!< Direction of transaction */ -#define USB_ISTR_ESOF ((uint16_t)0x0100) /*!< Expected Start Of Frame */ -#define USB_ISTR_SOF ((uint16_t)0x0200) /*!< Start Of Frame */ -#define USB_ISTR_RESET ((uint16_t)0x0400) /*!< USB RESET request */ -#define USB_ISTR_SUSP ((uint16_t)0x0800) /*!< Suspend mode request */ -#define USB_ISTR_WKUP ((uint16_t)0x1000) /*!< Wake up */ -#define USB_ISTR_ERR ((uint16_t)0x2000) /*!< Error */ -#define USB_ISTR_PMAOVR ((uint16_t)0x4000) /*!< Packet Memory Area Over / Underrun */ -#define USB_ISTR_CTR ((uint16_t)0x8000) /*!< Correct Transfer */ - -/******************* Bit definition for USB_FNR register ********************/ -#define USB_FNR_FN ((uint16_t)0x07FF) /*!< Frame Number */ -#define USB_FNR_LSOF ((uint16_t)0x1800) /*!< Lost SOF */ -#define USB_FNR_LCK ((uint16_t)0x2000) /*!< Locked */ -#define USB_FNR_RXDM ((uint16_t)0x4000) /*!< Receive Data - Line Status */ -#define USB_FNR_RXDP ((uint16_t)0x8000) /*!< Receive Data + Line Status */ - -/****************** Bit definition for USB_DADDR register *******************/ -#define USB_DADDR_ADD ((uint8_t)0x7F) /*!< ADD[6:0] bits (Device Address) */ -#define USB_DADDR_ADD0 ((uint8_t)0x01) /*!< Bit 0 */ -#define USB_DADDR_ADD1 ((uint8_t)0x02) /*!< Bit 1 */ -#define USB_DADDR_ADD2 ((uint8_t)0x04) /*!< Bit 2 */ -#define USB_DADDR_ADD3 ((uint8_t)0x08) /*!< Bit 3 */ -#define USB_DADDR_ADD4 ((uint8_t)0x10) /*!< Bit 4 */ -#define USB_DADDR_ADD5 ((uint8_t)0x20) /*!< Bit 5 */ -#define USB_DADDR_ADD6 ((uint8_t)0x40) /*!< Bit 6 */ - -#define USB_DADDR_EF ((uint8_t)0x80) /*!< Enable Function */ - -/****************** Bit definition for USB_BTABLE register ******************/ -#define USB_BTABLE_BTABLE ((uint16_t)0xFFF8) /*!< Buffer Table */ - -/*!< Buffer descriptor table */ -/***************** Bit definition for USB_ADDR0_TX register *****************/ -#define USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 0 */ - -/***************** Bit definition for USB_ADDR1_TX register *****************/ -#define USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 1 */ - -/***************** Bit definition for USB_ADDR2_TX register *****************/ -#define USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 2 */ - -/***************** Bit definition for USB_ADDR3_TX register *****************/ -#define USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 3 */ - -/***************** Bit definition for USB_ADDR4_TX register *****************/ -#define USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 4 */ - -/***************** Bit definition for USB_ADDR5_TX register *****************/ -#define USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 5 */ - -/***************** Bit definition for USB_ADDR6_TX register *****************/ -#define USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 6 */ - -/***************** Bit definition for USB_ADDR7_TX register *****************/ -#define USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 7 */ - -/*----------------------------------------------------------------------------*/ - -/***************** Bit definition for USB_COUNT0_TX register ****************/ -#define USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 0 */ - -/***************** Bit definition for USB_COUNT1_TX register ****************/ -#define USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 1 */ - -/***************** Bit definition for USB_COUNT2_TX register ****************/ -#define USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 2 */ - -/***************** Bit definition for USB_COUNT3_TX register ****************/ -#define USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 3 */ - -/***************** Bit definition for USB_COUNT4_TX register ****************/ -#define USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 4 */ - -/***************** Bit definition for USB_COUNT5_TX register ****************/ -#define USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 5 */ - -/***************** Bit definition for USB_COUNT6_TX register ****************/ -#define USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 6 */ - -/***************** Bit definition for USB_COUNT7_TX register ****************/ -#define USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 7 */ - -/*----------------------------------------------------------------------------*/ - -/**************** Bit definition for USB_COUNT0_TX_0 register ***************/ -#define USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 0 (low) */ - -/**************** Bit definition for USB_COUNT0_TX_1 register ***************/ -#define USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 0 (high) */ - -/**************** Bit definition for USB_COUNT1_TX_0 register ***************/ -#define USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 1 (low) */ - -/**************** Bit definition for USB_COUNT1_TX_1 register ***************/ -#define USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 1 (high) */ - -/**************** Bit definition for USB_COUNT2_TX_0 register ***************/ -#define USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 2 (low) */ - -/**************** Bit definition for USB_COUNT2_TX_1 register ***************/ -#define USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 2 (high) */ - -/**************** Bit definition for USB_COUNT3_TX_0 register ***************/ -#define USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF) /*!< Transmission Byte Count 3 (low) */ - -/**************** Bit definition for USB_COUNT3_TX_1 register ***************/ -#define USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000) /*!< Transmission Byte Count 3 (high) */ - -/**************** Bit definition for USB_COUNT4_TX_0 register ***************/ -#define USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 4 (low) */ - -/**************** Bit definition for USB_COUNT4_TX_1 register ***************/ -#define USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 4 (high) */ - -/**************** Bit definition for USB_COUNT5_TX_0 register ***************/ -#define USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 5 (low) */ - -/**************** Bit definition for USB_COUNT5_TX_1 register ***************/ -#define USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 5 (high) */ - -/**************** Bit definition for USB_COUNT6_TX_0 register ***************/ -#define USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 6 (low) */ - -/**************** Bit definition for USB_COUNT6_TX_1 register ***************/ -#define USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 6 (high) */ - -/**************** Bit definition for USB_COUNT7_TX_0 register ***************/ -#define USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 7 (low) */ - -/**************** Bit definition for USB_COUNT7_TX_1 register ***************/ -#define USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 7 (high) */ - -/*----------------------------------------------------------------------------*/ - -/***************** Bit definition for USB_ADDR0_RX register *****************/ -#define USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 0 */ - -/***************** Bit definition for USB_ADDR1_RX register *****************/ -#define USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 1 */ - -/***************** Bit definition for USB_ADDR2_RX register *****************/ -#define USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 2 */ - -/***************** Bit definition for USB_ADDR3_RX register *****************/ -#define USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 3 */ - -/***************** Bit definition for USB_ADDR4_RX register *****************/ -#define USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 4 */ - -/***************** Bit definition for USB_ADDR5_RX register *****************/ -#define USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 5 */ - -/***************** Bit definition for USB_ADDR6_RX register *****************/ -#define USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 6 */ - -/***************** Bit definition for USB_ADDR7_RX register *****************/ -#define USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 7 */ - -/*----------------------------------------------------------------------------*/ - -/***************** Bit definition for USB_COUNT0_RX register ****************/ -#define USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT1_RX register ****************/ -#define USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT2_RX register ****************/ -#define USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT3_RX register ****************/ -#define USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT4_RX register ****************/ -#define USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT5_RX register ****************/ -#define USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT6_RX register ****************/ -#define USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/***************** Bit definition for USB_COUNT7_RX register ****************/ -#define USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ - -#define USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ -#define USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ -#define USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ -#define USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ -#define USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ -#define USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ - -#define USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ - -/*----------------------------------------------------------------------------*/ - -/**************** Bit definition for USB_COUNT0_RX_0 register ***************/ -#define USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT0_RX_1 register ***************/ -#define USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 1 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT1_RX_0 register ***************/ -#define USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT1_RX_1 register ***************/ -#define USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT2_RX_0 register ***************/ -#define USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT2_RX_1 register ***************/ -#define USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT3_RX_0 register ***************/ -#define USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT3_RX_1 register ***************/ -#define USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT4_RX_0 register ***************/ -#define USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT4_RX_1 register ***************/ -#define USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/**************** Bit definition for USB_COUNT5_RX_0 register ***************/ -#define USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT5_RX_1 register ***************/ -#define USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/*************** Bit definition for USB_COUNT6_RX_0 register ***************/ -#define USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/**************** Bit definition for USB_COUNT6_RX_1 register ***************/ -#define USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/*************** Bit definition for USB_COUNT7_RX_0 register ****************/ -#define USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ - -#define USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ -#define USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ - -#define USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ - -/*************** Bit definition for USB_COUNT7_RX_1 register ****************/ -#define USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ - -#define USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ -#define USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ - -#define USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ - -/******************************************************************************/ -/* */ -/* Controller Area Network */ -/* */ -/******************************************************************************/ - -/*!< CAN control and status registers */ -/******************* Bit definition for CAN_MCR register ********************/ -#define CAN_MCR_INRQ ((uint16_t)0x0001) /*!< Initialization Request */ -#define CAN_MCR_SLEEP ((uint16_t)0x0002) /*!< Sleep Mode Request */ -#define CAN_MCR_TXFP ((uint16_t)0x0004) /*!< Transmit FIFO Priority */ -#define CAN_MCR_RFLM ((uint16_t)0x0008) /*!< Receive FIFO Locked Mode */ -#define CAN_MCR_NART ((uint16_t)0x0010) /*!< No Automatic Retransmission */ -#define CAN_MCR_AWUM ((uint16_t)0x0020) /*!< Automatic Wakeup Mode */ -#define CAN_MCR_ABOM ((uint16_t)0x0040) /*!< Automatic Bus-Off Management */ -#define CAN_MCR_TTCM ((uint16_t)0x0080) /*!< Time Triggered Communication Mode */ -#define CAN_MCR_RESET ((uint16_t)0x8000) /*!< CAN software master reset */ - -/******************* Bit definition for CAN_MSR register ********************/ -#define CAN_MSR_INAK ((uint16_t)0x0001) /*!< Initialization Acknowledge */ -#define CAN_MSR_SLAK ((uint16_t)0x0002) /*!< Sleep Acknowledge */ -#define CAN_MSR_ERRI ((uint16_t)0x0004) /*!< Error Interrupt */ -#define CAN_MSR_WKUI ((uint16_t)0x0008) /*!< Wakeup Interrupt */ -#define CAN_MSR_SLAKI ((uint16_t)0x0010) /*!< Sleep Acknowledge Interrupt */ -#define CAN_MSR_TXM ((uint16_t)0x0100) /*!< Transmit Mode */ -#define CAN_MSR_RXM ((uint16_t)0x0200) /*!< Receive Mode */ -#define CAN_MSR_SAMP ((uint16_t)0x0400) /*!< Last Sample Point */ -#define CAN_MSR_RX ((uint16_t)0x0800) /*!< CAN Rx Signal */ - -/******************* Bit definition for CAN_TSR register ********************/ -#define CAN_TSR_RQCP0 ((uint32_t)0x00000001) /*!< Request Completed Mailbox0 */ -#define CAN_TSR_TXOK0 ((uint32_t)0x00000002) /*!< Transmission OK of Mailbox0 */ -#define CAN_TSR_ALST0 ((uint32_t)0x00000004) /*!< Arbitration Lost for Mailbox0 */ -#define CAN_TSR_TERR0 ((uint32_t)0x00000008) /*!< Transmission Error of Mailbox0 */ -#define CAN_TSR_ABRQ0 ((uint32_t)0x00000080) /*!< Abort Request for Mailbox0 */ -#define CAN_TSR_RQCP1 ((uint32_t)0x00000100) /*!< Request Completed Mailbox1 */ -#define CAN_TSR_TXOK1 ((uint32_t)0x00000200) /*!< Transmission OK of Mailbox1 */ -#define CAN_TSR_ALST1 ((uint32_t)0x00000400) /*!< Arbitration Lost for Mailbox1 */ -#define CAN_TSR_TERR1 ((uint32_t)0x00000800) /*!< Transmission Error of Mailbox1 */ -#define CAN_TSR_ABRQ1 ((uint32_t)0x00008000) /*!< Abort Request for Mailbox 1 */ -#define CAN_TSR_RQCP2 ((uint32_t)0x00010000) /*!< Request Completed Mailbox2 */ -#define CAN_TSR_TXOK2 ((uint32_t)0x00020000) /*!< Transmission OK of Mailbox 2 */ -#define CAN_TSR_ALST2 ((uint32_t)0x00040000) /*!< Arbitration Lost for mailbox 2 */ -#define CAN_TSR_TERR2 ((uint32_t)0x00080000) /*!< Transmission Error of Mailbox 2 */ -#define CAN_TSR_ABRQ2 ((uint32_t)0x00800000) /*!< Abort Request for Mailbox 2 */ -#define CAN_TSR_CODE ((uint32_t)0x03000000) /*!< Mailbox Code */ - -#define CAN_TSR_TME ((uint32_t)0x1C000000) /*!< TME[2:0] bits */ -#define CAN_TSR_TME0 ((uint32_t)0x04000000) /*!< Transmit Mailbox 0 Empty */ -#define CAN_TSR_TME1 ((uint32_t)0x08000000) /*!< Transmit Mailbox 1 Empty */ -#define CAN_TSR_TME2 ((uint32_t)0x10000000) /*!< Transmit Mailbox 2 Empty */ - -#define CAN_TSR_LOW ((uint32_t)0xE0000000) /*!< LOW[2:0] bits */ -#define CAN_TSR_LOW0 ((uint32_t)0x20000000) /*!< Lowest Priority Flag for Mailbox 0 */ -#define CAN_TSR_LOW1 ((uint32_t)0x40000000) /*!< Lowest Priority Flag for Mailbox 1 */ -#define CAN_TSR_LOW2 ((uint32_t)0x80000000) /*!< Lowest Priority Flag for Mailbox 2 */ - -/******************* Bit definition for CAN_RF0R register *******************/ -#define CAN_RF0R_FMP0 ((uint8_t)0x03) /*!< FIFO 0 Message Pending */ -#define CAN_RF0R_FULL0 ((uint8_t)0x08) /*!< FIFO 0 Full */ -#define CAN_RF0R_FOVR0 ((uint8_t)0x10) /*!< FIFO 0 Overrun */ -#define CAN_RF0R_RFOM0 ((uint8_t)0x20) /*!< Release FIFO 0 Output Mailbox */ - -/******************* Bit definition for CAN_RF1R register *******************/ -#define CAN_RF1R_FMP1 ((uint8_t)0x03) /*!< FIFO 1 Message Pending */ -#define CAN_RF1R_FULL1 ((uint8_t)0x08) /*!< FIFO 1 Full */ -#define CAN_RF1R_FOVR1 ((uint8_t)0x10) /*!< FIFO 1 Overrun */ -#define CAN_RF1R_RFOM1 ((uint8_t)0x20) /*!< Release FIFO 1 Output Mailbox */ - -/******************** Bit definition for CAN_IER register *******************/ -#define CAN_IER_TMEIE ((uint32_t)0x00000001) /*!< Transmit Mailbox Empty Interrupt Enable */ -#define CAN_IER_FMPIE0 ((uint32_t)0x00000002) /*!< FIFO Message Pending Interrupt Enable */ -#define CAN_IER_FFIE0 ((uint32_t)0x00000004) /*!< FIFO Full Interrupt Enable */ -#define CAN_IER_FOVIE0 ((uint32_t)0x00000008) /*!< FIFO Overrun Interrupt Enable */ -#define CAN_IER_FMPIE1 ((uint32_t)0x00000010) /*!< FIFO Message Pending Interrupt Enable */ -#define CAN_IER_FFIE1 ((uint32_t)0x00000020) /*!< FIFO Full Interrupt Enable */ -#define CAN_IER_FOVIE1 ((uint32_t)0x00000040) /*!< FIFO Overrun Interrupt Enable */ -#define CAN_IER_EWGIE ((uint32_t)0x00000100) /*!< Error Warning Interrupt Enable */ -#define CAN_IER_EPVIE ((uint32_t)0x00000200) /*!< Error Passive Interrupt Enable */ -#define CAN_IER_BOFIE ((uint32_t)0x00000400) /*!< Bus-Off Interrupt Enable */ -#define CAN_IER_LECIE ((uint32_t)0x00000800) /*!< Last Error Code Interrupt Enable */ -#define CAN_IER_ERRIE ((uint32_t)0x00008000) /*!< Error Interrupt Enable */ -#define CAN_IER_WKUIE ((uint32_t)0x00010000) /*!< Wakeup Interrupt Enable */ -#define CAN_IER_SLKIE ((uint32_t)0x00020000) /*!< Sleep Interrupt Enable */ - -/******************** Bit definition for CAN_ESR register *******************/ -#define CAN_ESR_EWGF ((uint32_t)0x00000001) /*!< Error Warning Flag */ -#define CAN_ESR_EPVF ((uint32_t)0x00000002) /*!< Error Passive Flag */ -#define CAN_ESR_BOFF ((uint32_t)0x00000004) /*!< Bus-Off Flag */ - -#define CAN_ESR_LEC ((uint32_t)0x00000070) /*!< LEC[2:0] bits (Last Error Code) */ -#define CAN_ESR_LEC_0 ((uint32_t)0x00000010) /*!< Bit 0 */ -#define CAN_ESR_LEC_1 ((uint32_t)0x00000020) /*!< Bit 1 */ -#define CAN_ESR_LEC_2 ((uint32_t)0x00000040) /*!< Bit 2 */ - -#define CAN_ESR_TEC ((uint32_t)0x00FF0000) /*!< Least significant byte of the 9-bit Transmit Error Counter */ -#define CAN_ESR_REC ((uint32_t)0xFF000000) /*!< Receive Error Counter */ - -/******************* Bit definition for CAN_BTR register ********************/ -#define CAN_BTR_BRP ((uint32_t)0x000003FF) /*!< Baud Rate Prescaler */ -#define CAN_BTR_TS1 ((uint32_t)0x000F0000) /*!< Time Segment 1 */ -#define CAN_BTR_TS2 ((uint32_t)0x00700000) /*!< Time Segment 2 */ -#define CAN_BTR_SJW ((uint32_t)0x03000000) /*!< Resynchronization Jump Width */ -#define CAN_BTR_LBKM ((uint32_t)0x40000000) /*!< Loop Back Mode (Debug) */ -#define CAN_BTR_SILM ((uint32_t)0x80000000) /*!< Silent Mode */ - -/*!< Mailbox registers */ -/****************** Bit definition for CAN_TI0R register ********************/ -#define CAN_TI0R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ -#define CAN_TI0R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ -#define CAN_TI0R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ -#define CAN_TI0R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ -#define CAN_TI0R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ - -/****************** Bit definition for CAN_TDT0R register *******************/ -#define CAN_TDT0R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ -#define CAN_TDT0R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ -#define CAN_TDT0R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ - -/****************** Bit definition for CAN_TDL0R register *******************/ -#define CAN_TDL0R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ -#define CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ -#define CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ -#define CAN_TDL0R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ - -/****************** Bit definition for CAN_TDH0R register *******************/ -#define CAN_TDH0R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ -#define CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ -#define CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ -#define CAN_TDH0R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ - -/******************* Bit definition for CAN_TI1R register *******************/ -#define CAN_TI1R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ -#define CAN_TI1R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ -#define CAN_TI1R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ -#define CAN_TI1R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ -#define CAN_TI1R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ - -/******************* Bit definition for CAN_TDT1R register ******************/ -#define CAN_TDT1R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ -#define CAN_TDT1R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ -#define CAN_TDT1R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ - -/******************* Bit definition for CAN_TDL1R register ******************/ -#define CAN_TDL1R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ -#define CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ -#define CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ -#define CAN_TDL1R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ - -/******************* Bit definition for CAN_TDH1R register ******************/ -#define CAN_TDH1R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ -#define CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ -#define CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ -#define CAN_TDH1R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ - -/******************* Bit definition for CAN_TI2R register *******************/ -#define CAN_TI2R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ -#define CAN_TI2R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ -#define CAN_TI2R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ -#define CAN_TI2R_EXID ((uint32_t)0x001FFFF8) /*!< Extended identifier */ -#define CAN_TI2R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ - -/******************* Bit definition for CAN_TDT2R register ******************/ -#define CAN_TDT2R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ -#define CAN_TDT2R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ -#define CAN_TDT2R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ - -/******************* Bit definition for CAN_TDL2R register ******************/ -#define CAN_TDL2R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ -#define CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ -#define CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ -#define CAN_TDL2R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ - -/******************* Bit definition for CAN_TDH2R register ******************/ -#define CAN_TDH2R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ -#define CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ -#define CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ -#define CAN_TDH2R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ - -/******************* Bit definition for CAN_RI0R register *******************/ -#define CAN_RI0R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ -#define CAN_RI0R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ -#define CAN_RI0R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ -#define CAN_RI0R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ - -/******************* Bit definition for CAN_RDT0R register ******************/ -#define CAN_RDT0R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ -#define CAN_RDT0R_FMI ((uint32_t)0x0000FF00) /*!< Filter Match Index */ -#define CAN_RDT0R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ - -/******************* Bit definition for CAN_RDL0R register ******************/ -#define CAN_RDL0R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ -#define CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ -#define CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ -#define CAN_RDL0R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ - -/******************* Bit definition for CAN_RDH0R register ******************/ -#define CAN_RDH0R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ -#define CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ -#define CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ -#define CAN_RDH0R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ - -/******************* Bit definition for CAN_RI1R register *******************/ -#define CAN_RI1R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ -#define CAN_RI1R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ -#define CAN_RI1R_EXID ((uint32_t)0x001FFFF8) /*!< Extended identifier */ -#define CAN_RI1R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ - -/******************* Bit definition for CAN_RDT1R register ******************/ -#define CAN_RDT1R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ -#define CAN_RDT1R_FMI ((uint32_t)0x0000FF00) /*!< Filter Match Index */ -#define CAN_RDT1R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ - -/******************* Bit definition for CAN_RDL1R register ******************/ -#define CAN_RDL1R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ -#define CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ -#define CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ -#define CAN_RDL1R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ - -/******************* Bit definition for CAN_RDH1R register ******************/ -#define CAN_RDH1R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ -#define CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ -#define CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ -#define CAN_RDH1R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ - -/*!< CAN filter registers */ -/******************* Bit definition for CAN_FMR register ********************/ -#define CAN_FMR_FINIT ((uint8_t)0x01) /*!< Filter Init Mode */ - -/******************* Bit definition for CAN_FM1R register *******************/ -#define CAN_FM1R_FBM ((uint16_t)0x3FFF) /*!< Filter Mode */ -#define CAN_FM1R_FBM0 ((uint16_t)0x0001) /*!< Filter Init Mode bit 0 */ -#define CAN_FM1R_FBM1 ((uint16_t)0x0002) /*!< Filter Init Mode bit 1 */ -#define CAN_FM1R_FBM2 ((uint16_t)0x0004) /*!< Filter Init Mode bit 2 */ -#define CAN_FM1R_FBM3 ((uint16_t)0x0008) /*!< Filter Init Mode bit 3 */ -#define CAN_FM1R_FBM4 ((uint16_t)0x0010) /*!< Filter Init Mode bit 4 */ -#define CAN_FM1R_FBM5 ((uint16_t)0x0020) /*!< Filter Init Mode bit 5 */ -#define CAN_FM1R_FBM6 ((uint16_t)0x0040) /*!< Filter Init Mode bit 6 */ -#define CAN_FM1R_FBM7 ((uint16_t)0x0080) /*!< Filter Init Mode bit 7 */ -#define CAN_FM1R_FBM8 ((uint16_t)0x0100) /*!< Filter Init Mode bit 8 */ -#define CAN_FM1R_FBM9 ((uint16_t)0x0200) /*!< Filter Init Mode bit 9 */ -#define CAN_FM1R_FBM10 ((uint16_t)0x0400) /*!< Filter Init Mode bit 10 */ -#define CAN_FM1R_FBM11 ((uint16_t)0x0800) /*!< Filter Init Mode bit 11 */ -#define CAN_FM1R_FBM12 ((uint16_t)0x1000) /*!< Filter Init Mode bit 12 */ -#define CAN_FM1R_FBM13 ((uint16_t)0x2000) /*!< Filter Init Mode bit 13 */ - -/******************* Bit definition for CAN_FS1R register *******************/ -#define CAN_FS1R_FSC ((uint16_t)0x3FFF) /*!< Filter Scale Configuration */ -#define CAN_FS1R_FSC0 ((uint16_t)0x0001) /*!< Filter Scale Configuration bit 0 */ -#define CAN_FS1R_FSC1 ((uint16_t)0x0002) /*!< Filter Scale Configuration bit 1 */ -#define CAN_FS1R_FSC2 ((uint16_t)0x0004) /*!< Filter Scale Configuration bit 2 */ -#define CAN_FS1R_FSC3 ((uint16_t)0x0008) /*!< Filter Scale Configuration bit 3 */ -#define CAN_FS1R_FSC4 ((uint16_t)0x0010) /*!< Filter Scale Configuration bit 4 */ -#define CAN_FS1R_FSC5 ((uint16_t)0x0020) /*!< Filter Scale Configuration bit 5 */ -#define CAN_FS1R_FSC6 ((uint16_t)0x0040) /*!< Filter Scale Configuration bit 6 */ -#define CAN_FS1R_FSC7 ((uint16_t)0x0080) /*!< Filter Scale Configuration bit 7 */ -#define CAN_FS1R_FSC8 ((uint16_t)0x0100) /*!< Filter Scale Configuration bit 8 */ -#define CAN_FS1R_FSC9 ((uint16_t)0x0200) /*!< Filter Scale Configuration bit 9 */ -#define CAN_FS1R_FSC10 ((uint16_t)0x0400) /*!< Filter Scale Configuration bit 10 */ -#define CAN_FS1R_FSC11 ((uint16_t)0x0800) /*!< Filter Scale Configuration bit 11 */ -#define CAN_FS1R_FSC12 ((uint16_t)0x1000) /*!< Filter Scale Configuration bit 12 */ -#define CAN_FS1R_FSC13 ((uint16_t)0x2000) /*!< Filter Scale Configuration bit 13 */ - -/****************** Bit definition for CAN_FFA1R register *******************/ -#define CAN_FFA1R_FFA ((uint16_t)0x3FFF) /*!< Filter FIFO Assignment */ -#define CAN_FFA1R_FFA0 ((uint16_t)0x0001) /*!< Filter FIFO Assignment for Filter 0 */ -#define CAN_FFA1R_FFA1 ((uint16_t)0x0002) /*!< Filter FIFO Assignment for Filter 1 */ -#define CAN_FFA1R_FFA2 ((uint16_t)0x0004) /*!< Filter FIFO Assignment for Filter 2 */ -#define CAN_FFA1R_FFA3 ((uint16_t)0x0008) /*!< Filter FIFO Assignment for Filter 3 */ -#define CAN_FFA1R_FFA4 ((uint16_t)0x0010) /*!< Filter FIFO Assignment for Filter 4 */ -#define CAN_FFA1R_FFA5 ((uint16_t)0x0020) /*!< Filter FIFO Assignment for Filter 5 */ -#define CAN_FFA1R_FFA6 ((uint16_t)0x0040) /*!< Filter FIFO Assignment for Filter 6 */ -#define CAN_FFA1R_FFA7 ((uint16_t)0x0080) /*!< Filter FIFO Assignment for Filter 7 */ -#define CAN_FFA1R_FFA8 ((uint16_t)0x0100) /*!< Filter FIFO Assignment for Filter 8 */ -#define CAN_FFA1R_FFA9 ((uint16_t)0x0200) /*!< Filter FIFO Assignment for Filter 9 */ -#define CAN_FFA1R_FFA10 ((uint16_t)0x0400) /*!< Filter FIFO Assignment for Filter 10 */ -#define CAN_FFA1R_FFA11 ((uint16_t)0x0800) /*!< Filter FIFO Assignment for Filter 11 */ -#define CAN_FFA1R_FFA12 ((uint16_t)0x1000) /*!< Filter FIFO Assignment for Filter 12 */ -#define CAN_FFA1R_FFA13 ((uint16_t)0x2000) /*!< Filter FIFO Assignment for Filter 13 */ - -/******************* Bit definition for CAN_FA1R register *******************/ -#define CAN_FA1R_FACT ((uint16_t)0x3FFF) /*!< Filter Active */ -#define CAN_FA1R_FACT0 ((uint16_t)0x0001) /*!< Filter 0 Active */ -#define CAN_FA1R_FACT1 ((uint16_t)0x0002) /*!< Filter 1 Active */ -#define CAN_FA1R_FACT2 ((uint16_t)0x0004) /*!< Filter 2 Active */ -#define CAN_FA1R_FACT3 ((uint16_t)0x0008) /*!< Filter 3 Active */ -#define CAN_FA1R_FACT4 ((uint16_t)0x0010) /*!< Filter 4 Active */ -#define CAN_FA1R_FACT5 ((uint16_t)0x0020) /*!< Filter 5 Active */ -#define CAN_FA1R_FACT6 ((uint16_t)0x0040) /*!< Filter 6 Active */ -#define CAN_FA1R_FACT7 ((uint16_t)0x0080) /*!< Filter 7 Active */ -#define CAN_FA1R_FACT8 ((uint16_t)0x0100) /*!< Filter 8 Active */ -#define CAN_FA1R_FACT9 ((uint16_t)0x0200) /*!< Filter 9 Active */ -#define CAN_FA1R_FACT10 ((uint16_t)0x0400) /*!< Filter 10 Active */ -#define CAN_FA1R_FACT11 ((uint16_t)0x0800) /*!< Filter 11 Active */ -#define CAN_FA1R_FACT12 ((uint16_t)0x1000) /*!< Filter 12 Active */ -#define CAN_FA1R_FACT13 ((uint16_t)0x2000) /*!< Filter 13 Active */ - -/******************* Bit definition for CAN_F0R1 register *******************/ -#define CAN_F0R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F0R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F0R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F0R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F0R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F0R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F0R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F0R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F0R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F0R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F0R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F0R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F0R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F0R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F0R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F0R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F0R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F0R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F0R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F0R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F0R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F0R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F0R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F0R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F0R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F0R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F0R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F0R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F0R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F0R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F0R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F0R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F1R1 register *******************/ -#define CAN_F1R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F1R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F1R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F1R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F1R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F1R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F1R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F1R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F1R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F1R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F1R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F1R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F1R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F1R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F1R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F1R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F1R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F1R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F1R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F1R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F1R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F1R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F1R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F1R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F1R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F1R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F1R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F1R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F1R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F1R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F1R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F1R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F2R1 register *******************/ -#define CAN_F2R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F2R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F2R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F2R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F2R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F2R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F2R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F2R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F2R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F2R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F2R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F2R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F2R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F2R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F2R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F2R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F2R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F2R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F2R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F2R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F2R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F2R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F2R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F2R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F2R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F2R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F2R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F2R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F2R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F2R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F2R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F2R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F3R1 register *******************/ -#define CAN_F3R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F3R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F3R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F3R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F3R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F3R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F3R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F3R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F3R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F3R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F3R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F3R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F3R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F3R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F3R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F3R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F3R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F3R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F3R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F3R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F3R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F3R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F3R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F3R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F3R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F3R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F3R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F3R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F3R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F3R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F3R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F3R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F4R1 register *******************/ -#define CAN_F4R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F4R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F4R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F4R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F4R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F4R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F4R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F4R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F4R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F4R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F4R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F4R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F4R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F4R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F4R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F4R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F4R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F4R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F4R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F4R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F4R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F4R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F4R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F4R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F4R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F4R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F4R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F4R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F4R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F4R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F4R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F4R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F5R1 register *******************/ -#define CAN_F5R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F5R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F5R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F5R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F5R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F5R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F5R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F5R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F5R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F5R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F5R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F5R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F5R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F5R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F5R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F5R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F5R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F5R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F5R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F5R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F5R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F5R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F5R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F5R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F5R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F5R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F5R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F5R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F5R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F5R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F5R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F5R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F6R1 register *******************/ -#define CAN_F6R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F6R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F6R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F6R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F6R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F6R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F6R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F6R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F6R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F6R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F6R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F6R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F6R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F6R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F6R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F6R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F6R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F6R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F6R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F6R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F6R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F6R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F6R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F6R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F6R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F6R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F6R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F6R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F6R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F6R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F6R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F6R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F7R1 register *******************/ -#define CAN_F7R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F7R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F7R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F7R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F7R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F7R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F7R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F7R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F7R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F7R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F7R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F7R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F7R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F7R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F7R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F7R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F7R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F7R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F7R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F7R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F7R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F7R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F7R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F7R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F7R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F7R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F7R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F7R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F7R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F7R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F7R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F7R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F8R1 register *******************/ -#define CAN_F8R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F8R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F8R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F8R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F8R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F8R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F8R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F8R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F8R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F8R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F8R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F8R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F8R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F8R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F8R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F8R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F8R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F8R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F8R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F8R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F8R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F8R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F8R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F8R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F8R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F8R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F8R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F8R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F8R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F8R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F8R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F8R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F9R1 register *******************/ -#define CAN_F9R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F9R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F9R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F9R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F9R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F9R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F9R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F9R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F9R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F9R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F9R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F9R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F9R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F9R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F9R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F9R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F9R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F9R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F9R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F9R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F9R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F9R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F9R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F9R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F9R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F9R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F9R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F9R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F9R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F9R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F9R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F9R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F10R1 register ******************/ -#define CAN_F10R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F10R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F10R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F10R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F10R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F10R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F10R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F10R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F10R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F10R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F10R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F10R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F10R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F10R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F10R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F10R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F10R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F10R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F10R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F10R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F10R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F10R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F10R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F10R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F10R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F10R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F10R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F10R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F10R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F10R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F10R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F10R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F11R1 register ******************/ -#define CAN_F11R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F11R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F11R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F11R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F11R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F11R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F11R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F11R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F11R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F11R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F11R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F11R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F11R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F11R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F11R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F11R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F11R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F11R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F11R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F11R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F11R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F11R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F11R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F11R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F11R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F11R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F11R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F11R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F11R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F11R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F11R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F11R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F12R1 register ******************/ -#define CAN_F12R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F12R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F12R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F12R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F12R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F12R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F12R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F12R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F12R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F12R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F12R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F12R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F12R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F12R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F12R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F12R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F12R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F12R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F12R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F12R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F12R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F12R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F12R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F12R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F12R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F12R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F12R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F12R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F12R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F12R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F12R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F12R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F13R1 register ******************/ -#define CAN_F13R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F13R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F13R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F13R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F13R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F13R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F13R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F13R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F13R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F13R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F13R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F13R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F13R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F13R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F13R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F13R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F13R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F13R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F13R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F13R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F13R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F13R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F13R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F13R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F13R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F13R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F13R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F13R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F13R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F13R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F13R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F13R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F0R2 register *******************/ -#define CAN_F0R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F0R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F0R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F0R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F0R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F0R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F0R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F0R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F0R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F0R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F0R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F0R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F0R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F0R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F0R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F0R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F0R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F0R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F0R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F0R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F0R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F0R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F0R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F0R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F0R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F0R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F0R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F0R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F0R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F0R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F0R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F0R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F1R2 register *******************/ -#define CAN_F1R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F1R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F1R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F1R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F1R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F1R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F1R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F1R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F1R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F1R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F1R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F1R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F1R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F1R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F1R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F1R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F1R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F1R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F1R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F1R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F1R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F1R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F1R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F1R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F1R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F1R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F1R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F1R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F1R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F1R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F1R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F1R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F2R2 register *******************/ -#define CAN_F2R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F2R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F2R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F2R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F2R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F2R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F2R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F2R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F2R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F2R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F2R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F2R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F2R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F2R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F2R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F2R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F2R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F2R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F2R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F2R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F2R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F2R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F2R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F2R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F2R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F2R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F2R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F2R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F2R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F2R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F2R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F2R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F3R2 register *******************/ -#define CAN_F3R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F3R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F3R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F3R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F3R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F3R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F3R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F3R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F3R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F3R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F3R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F3R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F3R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F3R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F3R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F3R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F3R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F3R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F3R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F3R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F3R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F3R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F3R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F3R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F3R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F3R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F3R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F3R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F3R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F3R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F3R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F3R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F4R2 register *******************/ -#define CAN_F4R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F4R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F4R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F4R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F4R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F4R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F4R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F4R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F4R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F4R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F4R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F4R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F4R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F4R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F4R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F4R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F4R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F4R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F4R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F4R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F4R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F4R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F4R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F4R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F4R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F4R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F4R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F4R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F4R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F4R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F4R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F4R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F5R2 register *******************/ -#define CAN_F5R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F5R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F5R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F5R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F5R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F5R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F5R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F5R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F5R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F5R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F5R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F5R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F5R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F5R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F5R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F5R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F5R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F5R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F5R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F5R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F5R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F5R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F5R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F5R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F5R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F5R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F5R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F5R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F5R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F5R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F5R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F5R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F6R2 register *******************/ -#define CAN_F6R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F6R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F6R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F6R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F6R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F6R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F6R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F6R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F6R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F6R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F6R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F6R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F6R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F6R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F6R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F6R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F6R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F6R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F6R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F6R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F6R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F6R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F6R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F6R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F6R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F6R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F6R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F6R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F6R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F6R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F6R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F6R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F7R2 register *******************/ -#define CAN_F7R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F7R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F7R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F7R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F7R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F7R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F7R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F7R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F7R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F7R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F7R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F7R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F7R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F7R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F7R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F7R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F7R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F7R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F7R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F7R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F7R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F7R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F7R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F7R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F7R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F7R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F7R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F7R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F7R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F7R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F7R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F7R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F8R2 register *******************/ -#define CAN_F8R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F8R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F8R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F8R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F8R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F8R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F8R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F8R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F8R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F8R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F8R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F8R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F8R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F8R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F8R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F8R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F8R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F8R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F8R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F8R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F8R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F8R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F8R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F8R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F8R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F8R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F8R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F8R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F8R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F8R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F8R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F8R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F9R2 register *******************/ -#define CAN_F9R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F9R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F9R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F9R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F9R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F9R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F9R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F9R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F9R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F9R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F9R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F9R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F9R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F9R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F9R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F9R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F9R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F9R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F9R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F9R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F9R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F9R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F9R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F9R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F9R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F9R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F9R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F9R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F9R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F9R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F9R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F9R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F10R2 register ******************/ -#define CAN_F10R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F10R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F10R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F10R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F10R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F10R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F10R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F10R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F10R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F10R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F10R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F10R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F10R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F10R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F10R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F10R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F10R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F10R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F10R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F10R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F10R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F10R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F10R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F10R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F10R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F10R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F10R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F10R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F10R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F10R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F10R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F10R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F11R2 register ******************/ -#define CAN_F11R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F11R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F11R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F11R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F11R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F11R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F11R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F11R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F11R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F11R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F11R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F11R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F11R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F11R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F11R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F11R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F11R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F11R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F11R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F11R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F11R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F11R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F11R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F11R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F11R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F11R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F11R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F11R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F11R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F11R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F11R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F11R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F12R2 register ******************/ -#define CAN_F12R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F12R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F12R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F12R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F12R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F12R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F12R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F12R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F12R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F12R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F12R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F12R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F12R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F12R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F12R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F12R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F12R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F12R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F12R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F12R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F12R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F12R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F12R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F12R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F12R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F12R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F12R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F12R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F12R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F12R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F12R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F12R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************* Bit definition for CAN_F13R2 register ******************/ -#define CAN_F13R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ -#define CAN_F13R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ -#define CAN_F13R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ -#define CAN_F13R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ -#define CAN_F13R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ -#define CAN_F13R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ -#define CAN_F13R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ -#define CAN_F13R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ -#define CAN_F13R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ -#define CAN_F13R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ -#define CAN_F13R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ -#define CAN_F13R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ -#define CAN_F13R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ -#define CAN_F13R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ -#define CAN_F13R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ -#define CAN_F13R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ -#define CAN_F13R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ -#define CAN_F13R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ -#define CAN_F13R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ -#define CAN_F13R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ -#define CAN_F13R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ -#define CAN_F13R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ -#define CAN_F13R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ -#define CAN_F13R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ -#define CAN_F13R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ -#define CAN_F13R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ -#define CAN_F13R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ -#define CAN_F13R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ -#define CAN_F13R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ -#define CAN_F13R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ -#define CAN_F13R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ -#define CAN_F13R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ - -/******************************************************************************/ -/* */ -/* Serial Peripheral Interface */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for SPI_CR1 register ********************/ -#define SPI_CR1_CPHA ((uint16_t)0x0001) /*!< Clock Phase */ -#define SPI_CR1_CPOL ((uint16_t)0x0002) /*!< Clock Polarity */ -#define SPI_CR1_MSTR ((uint16_t)0x0004) /*!< Master Selection */ - -#define SPI_CR1_BR ((uint16_t)0x0038) /*!< BR[2:0] bits (Baud Rate Control) */ -#define SPI_CR1_BR_0 ((uint16_t)0x0008) /*!< Bit 0 */ -#define SPI_CR1_BR_1 ((uint16_t)0x0010) /*!< Bit 1 */ -#define SPI_CR1_BR_2 ((uint16_t)0x0020) /*!< Bit 2 */ - -#define SPI_CR1_SPE ((uint16_t)0x0040) /*!< SPI Enable */ -#define SPI_CR1_LSBFIRST ((uint16_t)0x0080) /*!< Frame Format */ -#define SPI_CR1_SSI ((uint16_t)0x0100) /*!< Internal slave select */ -#define SPI_CR1_SSM ((uint16_t)0x0200) /*!< Software slave management */ -#define SPI_CR1_RXONLY ((uint16_t)0x0400) /*!< Receive only */ -#define SPI_CR1_DFF ((uint16_t)0x0800) /*!< Data Frame Format */ -#define SPI_CR1_CRCNEXT ((uint16_t)0x1000) /*!< Transmit CRC next */ -#define SPI_CR1_CRCEN ((uint16_t)0x2000) /*!< Hardware CRC calculation enable */ -#define SPI_CR1_BIDIOE ((uint16_t)0x4000) /*!< Output enable in bidirectional mode */ -#define SPI_CR1_BIDIMODE ((uint16_t)0x8000) /*!< Bidirectional data mode enable */ - -/******************* Bit definition for SPI_CR2 register ********************/ -#define SPI_CR2_RXDMAEN ((uint8_t)0x01) /*!< Rx Buffer DMA Enable */ -#define SPI_CR2_TXDMAEN ((uint8_t)0x02) /*!< Tx Buffer DMA Enable */ -#define SPI_CR2_SSOE ((uint8_t)0x04) /*!< SS Output Enable */ -#define SPI_CR2_ERRIE ((uint8_t)0x20) /*!< Error Interrupt Enable */ -#define SPI_CR2_RXNEIE ((uint8_t)0x40) /*!< RX buffer Not Empty Interrupt Enable */ -#define SPI_CR2_TXEIE ((uint8_t)0x80) /*!< Tx buffer Empty Interrupt Enable */ - -/******************** Bit definition for SPI_SR register ********************/ -#define SPI_SR_RXNE ((uint8_t)0x01) /*!< Receive buffer Not Empty */ -#define SPI_SR_TXE ((uint8_t)0x02) /*!< Transmit buffer Empty */ -#define SPI_SR_CHSIDE ((uint8_t)0x04) /*!< Channel side */ -#define SPI_SR_UDR ((uint8_t)0x08) /*!< Underrun flag */ -#define SPI_SR_CRCERR ((uint8_t)0x10) /*!< CRC Error flag */ -#define SPI_SR_MODF ((uint8_t)0x20) /*!< Mode fault */ -#define SPI_SR_OVR ((uint8_t)0x40) /*!< Overrun flag */ -#define SPI_SR_BSY ((uint8_t)0x80) /*!< Busy flag */ - -/******************** Bit definition for SPI_DR register ********************/ -#define SPI_DR_DR ((uint16_t)0xFFFF) /*!< Data Register */ - -/******************* Bit definition for SPI_CRCPR register ******************/ -#define SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF) /*!< CRC polynomial register */ - -/****************** Bit definition for SPI_RXCRCR register ******************/ -#define SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF) /*!< Rx CRC Register */ - -/****************** Bit definition for SPI_TXCRCR register ******************/ -#define SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF) /*!< Tx CRC Register */ - -/****************** Bit definition for SPI_I2SCFGR register *****************/ -#define SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) /*!< Channel length (number of bits per audio channel) */ - -#define SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) /*!< DATLEN[1:0] bits (Data length to be transferred) */ -#define SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) /*!< Bit 0 */ -#define SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) /*!< Bit 1 */ - -#define SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) /*!< steady state clock polarity */ - -#define SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) /*!< I2SSTD[1:0] bits (I2S standard selection) */ -#define SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) /*!< Bit 0 */ -#define SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) /*!< Bit 1 */ - -#define SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) /*!< PCM frame synchronization */ - -#define SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) /*!< I2SCFG[1:0] bits (I2S configuration mode) */ -#define SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) /*!< Bit 0 */ -#define SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) /*!< Bit 1 */ - -#define SPI_I2SCFGR_I2SE ((uint16_t)0x0400) /*!< I2S Enable */ -#define SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) /*!< I2S mode selection */ - -/****************** Bit definition for SPI_I2SPR register *******************/ -#define SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) /*!< I2S Linear prescaler */ -#define SPI_I2SPR_ODD ((uint16_t)0x0100) /*!< Odd factor for the prescaler */ -#define SPI_I2SPR_MCKOE ((uint16_t)0x0200) /*!< Master Clock Output Enable */ - -/******************************************************************************/ -/* */ -/* Inter-integrated Circuit Interface */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for I2C_CR1 register ********************/ -#define I2C_CR1_PE ((uint16_t)0x0001) /*!< Peripheral Enable */ -#define I2C_CR1_SMBUS ((uint16_t)0x0002) /*!< SMBus Mode */ -#define I2C_CR1_SMBTYPE ((uint16_t)0x0008) /*!< SMBus Type */ -#define I2C_CR1_ENARP ((uint16_t)0x0010) /*!< ARP Enable */ -#define I2C_CR1_ENPEC ((uint16_t)0x0020) /*!< PEC Enable */ -#define I2C_CR1_ENGC ((uint16_t)0x0040) /*!< General Call Enable */ -#define I2C_CR1_NOSTRETCH ((uint16_t)0x0080) /*!< Clock Stretching Disable (Slave mode) */ -#define I2C_CR1_START ((uint16_t)0x0100) /*!< Start Generation */ -#define I2C_CR1_STOP ((uint16_t)0x0200) /*!< Stop Generation */ -#define I2C_CR1_ACK ((uint16_t)0x0400) /*!< Acknowledge Enable */ -#define I2C_CR1_POS ((uint16_t)0x0800) /*!< Acknowledge/PEC Position (for data reception) */ -#define I2C_CR1_PEC ((uint16_t)0x1000) /*!< Packet Error Checking */ -#define I2C_CR1_ALERT ((uint16_t)0x2000) /*!< SMBus Alert */ -#define I2C_CR1_SWRST ((uint16_t)0x8000) /*!< Software Reset */ - -/******************* Bit definition for I2C_CR2 register ********************/ -#define I2C_CR2_FREQ ((uint16_t)0x003F) /*!< FREQ[5:0] bits (Peripheral Clock Frequency) */ -#define I2C_CR2_FREQ_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define I2C_CR2_FREQ_1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define I2C_CR2_FREQ_2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define I2C_CR2_FREQ_3 ((uint16_t)0x0008) /*!< Bit 3 */ -#define I2C_CR2_FREQ_4 ((uint16_t)0x0010) /*!< Bit 4 */ -#define I2C_CR2_FREQ_5 ((uint16_t)0x0020) /*!< Bit 5 */ - -#define I2C_CR2_ITERREN ((uint16_t)0x0100) /*!< Error Interrupt Enable */ -#define I2C_CR2_ITEVTEN ((uint16_t)0x0200) /*!< Event Interrupt Enable */ -#define I2C_CR2_ITBUFEN ((uint16_t)0x0400) /*!< Buffer Interrupt Enable */ -#define I2C_CR2_DMAEN ((uint16_t)0x0800) /*!< DMA Requests Enable */ -#define I2C_CR2_LAST ((uint16_t)0x1000) /*!< DMA Last Transfer */ - -/******************* Bit definition for I2C_OAR1 register *******************/ -#define I2C_OAR1_ADD1_7 ((uint16_t)0x00FE) /*!< Interface Address */ -#define I2C_OAR1_ADD8_9 ((uint16_t)0x0300) /*!< Interface Address */ - -#define I2C_OAR1_ADD0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define I2C_OAR1_ADD1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define I2C_OAR1_ADD2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define I2C_OAR1_ADD3 ((uint16_t)0x0008) /*!< Bit 3 */ -#define I2C_OAR1_ADD4 ((uint16_t)0x0010) /*!< Bit 4 */ -#define I2C_OAR1_ADD5 ((uint16_t)0x0020) /*!< Bit 5 */ -#define I2C_OAR1_ADD6 ((uint16_t)0x0040) /*!< Bit 6 */ -#define I2C_OAR1_ADD7 ((uint16_t)0x0080) /*!< Bit 7 */ -#define I2C_OAR1_ADD8 ((uint16_t)0x0100) /*!< Bit 8 */ -#define I2C_OAR1_ADD9 ((uint16_t)0x0200) /*!< Bit 9 */ - -#define I2C_OAR1_ADDMODE ((uint16_t)0x8000) /*!< Addressing Mode (Slave mode) */ - -/******************* Bit definition for I2C_OAR2 register *******************/ -#define I2C_OAR2_ENDUAL ((uint8_t)0x01) /*!< Dual addressing mode enable */ -#define I2C_OAR2_ADD2 ((uint8_t)0xFE) /*!< Interface address */ - -/******************** Bit definition for I2C_DR register ********************/ -#define I2C_DR_DR ((uint8_t)0xFF) /*!< 8-bit Data Register */ - -/******************* Bit definition for I2C_SR1 register ********************/ -#define I2C_SR1_SB ((uint16_t)0x0001) /*!< Start Bit (Master mode) */ -#define I2C_SR1_ADDR ((uint16_t)0x0002) /*!< Address sent (master mode)/matched (slave mode) */ -#define I2C_SR1_BTF ((uint16_t)0x0004) /*!< Byte Transfer Finished */ -#define I2C_SR1_ADD10 ((uint16_t)0x0008) /*!< 10-bit header sent (Master mode) */ -#define I2C_SR1_STOPF ((uint16_t)0x0010) /*!< Stop detection (Slave mode) */ -#define I2C_SR1_RXNE ((uint16_t)0x0040) /*!< Data Register not Empty (receivers) */ -#define I2C_SR1_TXE ((uint16_t)0x0080) /*!< Data Register Empty (transmitters) */ -#define I2C_SR1_BERR ((uint16_t)0x0100) /*!< Bus Error */ -#define I2C_SR1_ARLO ((uint16_t)0x0200) /*!< Arbitration Lost (master mode) */ -#define I2C_SR1_AF ((uint16_t)0x0400) /*!< Acknowledge Failure */ -#define I2C_SR1_OVR ((uint16_t)0x0800) /*!< Overrun/Underrun */ -#define I2C_SR1_PECERR ((uint16_t)0x1000) /*!< PEC Error in reception */ -#define I2C_SR1_TIMEOUT ((uint16_t)0x4000) /*!< Timeout or Tlow Error */ -#define I2C_SR1_SMBALERT ((uint16_t)0x8000) /*!< SMBus Alert */ - -/******************* Bit definition for I2C_SR2 register ********************/ -#define I2C_SR2_MSL ((uint16_t)0x0001) /*!< Master/Slave */ -#define I2C_SR2_BUSY ((uint16_t)0x0002) /*!< Bus Busy */ -#define I2C_SR2_TRA ((uint16_t)0x0004) /*!< Transmitter/Receiver */ -#define I2C_SR2_GENCALL ((uint16_t)0x0010) /*!< General Call Address (Slave mode) */ -#define I2C_SR2_SMBDEFAULT ((uint16_t)0x0020) /*!< SMBus Device Default Address (Slave mode) */ -#define I2C_SR2_SMBHOST ((uint16_t)0x0040) /*!< SMBus Host Header (Slave mode) */ -#define I2C_SR2_DUALF ((uint16_t)0x0080) /*!< Dual Flag (Slave mode) */ -#define I2C_SR2_PEC ((uint16_t)0xFF00) /*!< Packet Error Checking Register */ - -/******************* Bit definition for I2C_CCR register ********************/ -#define I2C_CCR_CCR ((uint16_t)0x0FFF) /*!< Clock Control Register in Fast/Standard mode (Master mode) */ -#define I2C_CCR_DUTY ((uint16_t)0x4000) /*!< Fast Mode Duty Cycle */ -#define I2C_CCR_FS ((uint16_t)0x8000) /*!< I2C Master Mode Selection */ - -/****************** Bit definition for I2C_TRISE register *******************/ -#define I2C_TRISE_TRISE ((uint8_t)0x3F) /*!< Maximum Rise Time in Fast/Standard mode (Master mode) */ - -/******************************************************************************/ -/* */ -/* Universal Synchronous Asynchronous Receiver Transmitter */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for USART_SR register *******************/ -#define USART_SR_PE ((uint16_t)0x0001) /*!< Parity Error */ -#define USART_SR_FE ((uint16_t)0x0002) /*!< Framing Error */ -#define USART_SR_NE ((uint16_t)0x0004) /*!< Noise Error Flag */ -#define USART_SR_ORE ((uint16_t)0x0008) /*!< OverRun Error */ -#define USART_SR_IDLE ((uint16_t)0x0010) /*!< IDLE line detected */ -#define USART_SR_RXNE ((uint16_t)0x0020) /*!< Read Data Register Not Empty */ -#define USART_SR_TC ((uint16_t)0x0040) /*!< Transmission Complete */ -#define USART_SR_TXE ((uint16_t)0x0080) /*!< Transmit Data Register Empty */ -#define USART_SR_LBD ((uint16_t)0x0100) /*!< LIN Break Detection Flag */ -#define USART_SR_CTS ((uint16_t)0x0200) /*!< CTS Flag */ - -/******************* Bit definition for USART_DR register *******************/ -#define USART_DR_DR ((uint16_t)0x01FF) /*!< Data value */ - -/****************** Bit definition for USART_BRR register *******************/ -#define USART_BRR_DIV_Fraction ((uint16_t)0x000F) /*!< Fraction of USARTDIV */ -#define USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) /*!< Mantissa of USARTDIV */ - -/****************** Bit definition for USART_CR1 register *******************/ -#define USART_CR1_SBK ((uint16_t)0x0001) /*!< Send Break */ -#define USART_CR1_RWU ((uint16_t)0x0002) /*!< Receiver wakeup */ -#define USART_CR1_RE ((uint16_t)0x0004) /*!< Receiver Enable */ -#define USART_CR1_TE ((uint16_t)0x0008) /*!< Transmitter Enable */ -#define USART_CR1_IDLEIE ((uint16_t)0x0010) /*!< IDLE Interrupt Enable */ -#define USART_CR1_RXNEIE ((uint16_t)0x0020) /*!< RXNE Interrupt Enable */ -#define USART_CR1_TCIE ((uint16_t)0x0040) /*!< Transmission Complete Interrupt Enable */ -#define USART_CR1_TXEIE ((uint16_t)0x0080) /*!< PE Interrupt Enable */ -#define USART_CR1_PEIE ((uint16_t)0x0100) /*!< PE Interrupt Enable */ -#define USART_CR1_PS ((uint16_t)0x0200) /*!< Parity Selection */ -#define USART_CR1_PCE ((uint16_t)0x0400) /*!< Parity Control Enable */ -#define USART_CR1_WAKE ((uint16_t)0x0800) /*!< Wakeup method */ -#define USART_CR1_M ((uint16_t)0x1000) /*!< Word length */ -#define USART_CR1_UE ((uint16_t)0x2000) /*!< USART Enable */ -#define USART_CR1_OVER8 ((uint16_t)0x8000) /*!< USART Oversmapling 8-bits */ - -/****************** Bit definition for USART_CR2 register *******************/ -#define USART_CR2_ADD ((uint16_t)0x000F) /*!< Address of the USART node */ -#define USART_CR2_LBDL ((uint16_t)0x0020) /*!< LIN Break Detection Length */ -#define USART_CR2_LBDIE ((uint16_t)0x0040) /*!< LIN Break Detection Interrupt Enable */ -#define USART_CR2_LBCL ((uint16_t)0x0100) /*!< Last Bit Clock pulse */ -#define USART_CR2_CPHA ((uint16_t)0x0200) /*!< Clock Phase */ -#define USART_CR2_CPOL ((uint16_t)0x0400) /*!< Clock Polarity */ -#define USART_CR2_CLKEN ((uint16_t)0x0800) /*!< Clock Enable */ - -#define USART_CR2_STOP ((uint16_t)0x3000) /*!< STOP[1:0] bits (STOP bits) */ -#define USART_CR2_STOP_0 ((uint16_t)0x1000) /*!< Bit 0 */ -#define USART_CR2_STOP_1 ((uint16_t)0x2000) /*!< Bit 1 */ - -#define USART_CR2_LINEN ((uint16_t)0x4000) /*!< LIN mode enable */ - -/****************** Bit definition for USART_CR3 register *******************/ -#define USART_CR3_EIE ((uint16_t)0x0001) /*!< Error Interrupt Enable */ -#define USART_CR3_IREN ((uint16_t)0x0002) /*!< IrDA mode Enable */ -#define USART_CR3_IRLP ((uint16_t)0x0004) /*!< IrDA Low-Power */ -#define USART_CR3_HDSEL ((uint16_t)0x0008) /*!< Half-Duplex Selection */ -#define USART_CR3_NACK ((uint16_t)0x0010) /*!< Smartcard NACK enable */ -#define USART_CR3_SCEN ((uint16_t)0x0020) /*!< Smartcard mode enable */ -#define USART_CR3_DMAR ((uint16_t)0x0040) /*!< DMA Enable Receiver */ -#define USART_CR3_DMAT ((uint16_t)0x0080) /*!< DMA Enable Transmitter */ -#define USART_CR3_RTSE ((uint16_t)0x0100) /*!< RTS Enable */ -#define USART_CR3_CTSE ((uint16_t)0x0200) /*!< CTS Enable */ -#define USART_CR3_CTSIE ((uint16_t)0x0400) /*!< CTS Interrupt Enable */ -#define USART_CR3_ONEBIT ((uint16_t)0x0800) /*!< One Bit method */ - -/****************** Bit definition for USART_GTPR register ******************/ -#define USART_GTPR_PSC ((uint16_t)0x00FF) /*!< PSC[7:0] bits (Prescaler value) */ -#define USART_GTPR_PSC_0 ((uint16_t)0x0001) /*!< Bit 0 */ -#define USART_GTPR_PSC_1 ((uint16_t)0x0002) /*!< Bit 1 */ -#define USART_GTPR_PSC_2 ((uint16_t)0x0004) /*!< Bit 2 */ -#define USART_GTPR_PSC_3 ((uint16_t)0x0008) /*!< Bit 3 */ -#define USART_GTPR_PSC_4 ((uint16_t)0x0010) /*!< Bit 4 */ -#define USART_GTPR_PSC_5 ((uint16_t)0x0020) /*!< Bit 5 */ -#define USART_GTPR_PSC_6 ((uint16_t)0x0040) /*!< Bit 6 */ -#define USART_GTPR_PSC_7 ((uint16_t)0x0080) /*!< Bit 7 */ - -#define USART_GTPR_GT ((uint16_t)0xFF00) /*!< Guard time value */ - -/******************************************************************************/ -/* */ -/* Debug MCU */ -/* */ -/******************************************************************************/ - -/**************** Bit definition for DBGMCU_IDCODE register *****************/ -#define DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF) /*!< Device Identifier */ - -#define DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000) /*!< REV_ID[15:0] bits (Revision Identifier) */ -#define DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000) /*!< Bit 0 */ -#define DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000) /*!< Bit 1 */ -#define DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000) /*!< Bit 2 */ -#define DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000) /*!< Bit 3 */ -#define DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000) /*!< Bit 4 */ -#define DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000) /*!< Bit 5 */ -#define DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000) /*!< Bit 6 */ -#define DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000) /*!< Bit 7 */ -#define DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000) /*!< Bit 8 */ -#define DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000) /*!< Bit 9 */ -#define DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000) /*!< Bit 10 */ -#define DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000) /*!< Bit 11 */ -#define DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000) /*!< Bit 12 */ -#define DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000) /*!< Bit 13 */ -#define DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000) /*!< Bit 14 */ -#define DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000) /*!< Bit 15 */ - -/****************** Bit definition for DBGMCU_CR register *******************/ -#define DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001) /*!< Debug Sleep Mode */ -#define DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002) /*!< Debug Stop Mode */ -#define DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004) /*!< Debug Standby mode */ -#define DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020) /*!< Trace Pin Assignment Control */ - -#define DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0) /*!< TRACE_MODE[1:0] bits (Trace Pin Assignment Control) */ -#define DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040) /*!< Bit 0 */ -#define DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080) /*!< Bit 1 */ - -#define DBGMCU_CR_DBG_IWDG_STOP ((uint32_t)0x00000100) /*!< Debug Independent Watchdog stopped when Core is halted */ -#define DBGMCU_CR_DBG_WWDG_STOP ((uint32_t)0x00000200) /*!< Debug Window Watchdog stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM1_STOP ((uint32_t)0x00000400) /*!< TIM1 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_TIM2_STOP ((uint32_t)0x00000800) /*!< TIM2 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_TIM3_STOP ((uint32_t)0x00001000) /*!< TIM3 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_TIM4_STOP ((uint32_t)0x00002000) /*!< TIM4 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_CAN1_STOP ((uint32_t)0x00004000) /*!< Debug CAN1 stopped when Core is halted */ -#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) /*!< SMBUS timeout mode stopped when Core is halted */ -#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) /*!< SMBUS timeout mode stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM8_STOP ((uint32_t)0x00020000) /*!< TIM8 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_TIM5_STOP ((uint32_t)0x00040000) /*!< TIM5 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_TIM6_STOP ((uint32_t)0x00080000) /*!< TIM6 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_TIM7_STOP ((uint32_t)0x00100000) /*!< TIM7 counter stopped when core is halted */ -#define DBGMCU_CR_DBG_CAN2_STOP ((uint32_t)0x00200000) /*!< Debug CAN2 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM15_STOP ((uint32_t)0x00400000) /*!< Debug TIM15 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM16_STOP ((uint32_t)0x00800000) /*!< Debug TIM16 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM17_STOP ((uint32_t)0x01000000) /*!< Debug TIM17 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM12_STOP ((uint32_t)0x02000000) /*!< Debug TIM12 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM13_STOP ((uint32_t)0x04000000) /*!< Debug TIM13 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM14_STOP ((uint32_t)0x08000000) /*!< Debug TIM14 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM9_STOP ((uint32_t)0x10000000) /*!< Debug TIM9 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM10_STOP ((uint32_t)0x20000000) /*!< Debug TIM10 stopped when Core is halted */ -#define DBGMCU_CR_DBG_TIM11_STOP ((uint32_t)0x40000000) /*!< Debug TIM11 stopped when Core is halted */ - -/******************************************************************************/ -/* */ -/* FLASH and Option Bytes Registers */ -/* */ -/******************************************************************************/ - -/******************* Bit definition for FLASH_ACR register ******************/ -#define FLASH_ACR_LATENCY ((uint8_t)0x03) /*!< LATENCY[2:0] bits (Latency) */ -#define FLASH_ACR_LATENCY_0 ((uint8_t)0x00) /*!< Bit 0 */ -#define FLASH_ACR_LATENCY_1 ((uint8_t)0x01) /*!< Bit 0 */ -#define FLASH_ACR_LATENCY_2 ((uint8_t)0x02) /*!< Bit 1 */ - -#define FLASH_ACR_HLFCYA ((uint8_t)0x08) /*!< Flash Half Cycle Access Enable */ -#define FLASH_ACR_PRFTBE ((uint8_t)0x10) /*!< Prefetch Buffer Enable */ -#define FLASH_ACR_PRFTBS ((uint8_t)0x20) /*!< Prefetch Buffer Status */ - -/****************** Bit definition for FLASH_KEYR register ******************/ -#define FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF) /*!< FPEC Key */ - -/***************** Bit definition for FLASH_OPTKEYR register ****************/ -#define FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF) /*!< Option Byte Key */ - -/****************** Bit definition for FLASH_SR register *******************/ -#define FLASH_SR_BSY ((uint8_t)0x01) /*!< Busy */ -#define FLASH_SR_PGERR ((uint8_t)0x04) /*!< Programming Error */ -#define FLASH_SR_WRPRTERR ((uint8_t)0x10) /*!< Write Protection Error */ -#define FLASH_SR_EOP ((uint8_t)0x20) /*!< End of operation */ - -/******************* Bit definition for FLASH_CR register *******************/ -#define FLASH_CR_PG ((uint16_t)0x0001) /*!< Programming */ -#define FLASH_CR_PER ((uint16_t)0x0002) /*!< Page Erase */ -#define FLASH_CR_MER ((uint16_t)0x0004) /*!< Mass Erase */ -#define FLASH_CR_OPTPG ((uint16_t)0x0010) /*!< Option Byte Programming */ -#define FLASH_CR_OPTER ((uint16_t)0x0020) /*!< Option Byte Erase */ -#define FLASH_CR_STRT ((uint16_t)0x0040) /*!< Start */ -#define FLASH_CR_LOCK ((uint16_t)0x0080) /*!< Lock */ -#define FLASH_CR_OPTWRE ((uint16_t)0x0200) /*!< Option Bytes Write Enable */ -#define FLASH_CR_ERRIE ((uint16_t)0x0400) /*!< Error Interrupt Enable */ -#define FLASH_CR_EOPIE ((uint16_t)0x1000) /*!< End of operation interrupt enable */ - -/******************* Bit definition for FLASH_AR register *******************/ -#define FLASH_AR_FAR ((uint32_t)0xFFFFFFFF) /*!< Flash Address */ - -/****************** Bit definition for FLASH_OBR register *******************/ -#define FLASH_OBR_OPTERR ((uint16_t)0x0001) /*!< Option Byte Error */ -#define FLASH_OBR_RDPRT ((uint16_t)0x0002) /*!< Read protection */ - -#define FLASH_OBR_USER ((uint16_t)0x03FC) /*!< User Option Bytes */ -#define FLASH_OBR_WDG_SW ((uint16_t)0x0004) /*!< WDG_SW */ -#define FLASH_OBR_nRST_STOP ((uint16_t)0x0008) /*!< nRST_STOP */ -#define FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) /*!< nRST_STDBY */ -#define FLASH_OBR_BFB2 ((uint16_t)0x0020) /*!< BFB2 */ - -/****************** Bit definition for FLASH_WRPR register ******************/ -#define FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF) /*!< Write Protect */ - -/*----------------------------------------------------------------------------*/ - -/****************** Bit definition for FLASH_RDP register *******************/ -#define FLASH_RDP_RDP ((uint32_t)0x000000FF) /*!< Read protection option byte */ -#define FLASH_RDP_nRDP ((uint32_t)0x0000FF00) /*!< Read protection complemented option byte */ - -/****************** Bit definition for FLASH_USER register ******************/ -#define FLASH_USER_USER ((uint32_t)0x00FF0000) /*!< User option byte */ -#define FLASH_USER_nUSER ((uint32_t)0xFF000000) /*!< User complemented option byte */ - -/****************** Bit definition for FLASH_Data0 register *****************/ -#define FLASH_Data0_Data0 ((uint32_t)0x000000FF) /*!< User data storage option byte */ -#define FLASH_Data0_nData0 ((uint32_t)0x0000FF00) /*!< User data storage complemented option byte */ - -/****************** Bit definition for FLASH_Data1 register *****************/ -#define FLASH_Data1_Data1 ((uint32_t)0x00FF0000) /*!< User data storage option byte */ -#define FLASH_Data1_nData1 ((uint32_t)0xFF000000) /*!< User data storage complemented option byte */ - -/****************** Bit definition for FLASH_WRP0 register ******************/ -#define FLASH_WRP0_WRP0 ((uint32_t)0x000000FF) /*!< Flash memory write protection option bytes */ -#define FLASH_WRP0_nWRP0 ((uint32_t)0x0000FF00) /*!< Flash memory write protection complemented option bytes */ - -/****************** Bit definition for FLASH_WRP1 register ******************/ -#define FLASH_WRP1_WRP1 ((uint32_t)0x00FF0000) /*!< Flash memory write protection option bytes */ -#define FLASH_WRP1_nWRP1 ((uint32_t)0xFF000000) /*!< Flash memory write protection complemented option bytes */ - -/****************** Bit definition for FLASH_WRP2 register ******************/ -#define FLASH_WRP2_WRP2 ((uint32_t)0x000000FF) /*!< Flash memory write protection option bytes */ -#define FLASH_WRP2_nWRP2 ((uint32_t)0x0000FF00) /*!< Flash memory write protection complemented option bytes */ - -/****************** Bit definition for FLASH_WRP3 register ******************/ -#define FLASH_WRP3_WRP3 ((uint32_t)0x00FF0000) /*!< Flash memory write protection option bytes */ -#define FLASH_WRP3_nWRP3 ((uint32_t)0xFF000000) /*!< Flash memory write protection complemented option bytes */ - -#ifdef STM32F10X_CL -/******************************************************************************/ -/* Ethernet MAC Registers bits definitions */ -/******************************************************************************/ -/* Bit definition for Ethernet MAC Control Register register */ -#define ETH_MACCR_WD ((uint32_t)0x00800000) /* Watchdog disable */ -#define ETH_MACCR_JD ((uint32_t)0x00400000) /* Jabber disable */ -#define ETH_MACCR_IFG ((uint32_t)0x000E0000) /* Inter-frame gap */ - #define ETH_MACCR_IFG_96Bit ((uint32_t)0x00000000) /* Minimum IFG between frames during transmission is 96Bit */ - #define ETH_MACCR_IFG_88Bit ((uint32_t)0x00020000) /* Minimum IFG between frames during transmission is 88Bit */ - #define ETH_MACCR_IFG_80Bit ((uint32_t)0x00040000) /* Minimum IFG between frames during transmission is 80Bit */ - #define ETH_MACCR_IFG_72Bit ((uint32_t)0x00060000) /* Minimum IFG between frames during transmission is 72Bit */ - #define ETH_MACCR_IFG_64Bit ((uint32_t)0x00080000) /* Minimum IFG between frames during transmission is 64Bit */ - #define ETH_MACCR_IFG_56Bit ((uint32_t)0x000A0000) /* Minimum IFG between frames during transmission is 56Bit */ - #define ETH_MACCR_IFG_48Bit ((uint32_t)0x000C0000) /* Minimum IFG between frames during transmission is 48Bit */ - #define ETH_MACCR_IFG_40Bit ((uint32_t)0x000E0000) /* Minimum IFG between frames during transmission is 40Bit */ -#define ETH_MACCR_CSD ((uint32_t)0x00010000) /* Carrier sense disable (during transmission) */ -#define ETH_MACCR_FES ((uint32_t)0x00004000) /* Fast ethernet speed */ -#define ETH_MACCR_ROD ((uint32_t)0x00002000) /* Receive own disable */ -#define ETH_MACCR_LM ((uint32_t)0x00001000) /* loopback mode */ -#define ETH_MACCR_DM ((uint32_t)0x00000800) /* Duplex mode */ -#define ETH_MACCR_IPCO ((uint32_t)0x00000400) /* IP Checksum offload */ -#define ETH_MACCR_RD ((uint32_t)0x00000200) /* Retry disable */ -#define ETH_MACCR_APCS ((uint32_t)0x00000080) /* Automatic Pad/CRC stripping */ -#define ETH_MACCR_BL ((uint32_t)0x00000060) /* Back-off limit: random integer number (r) of slot time delays before rescheduling - a transmission attempt during retries after a collision: 0 =< r <2^k */ - #define ETH_MACCR_BL_10 ((uint32_t)0x00000000) /* k = min (n, 10) */ - #define ETH_MACCR_BL_8 ((uint32_t)0x00000020) /* k = min (n, 8) */ - #define ETH_MACCR_BL_4 ((uint32_t)0x00000040) /* k = min (n, 4) */ - #define ETH_MACCR_BL_1 ((uint32_t)0x00000060) /* k = min (n, 1) */ -#define ETH_MACCR_DC ((uint32_t)0x00000010) /* Defferal check */ -#define ETH_MACCR_TE ((uint32_t)0x00000008) /* Transmitter enable */ -#define ETH_MACCR_RE ((uint32_t)0x00000004) /* Receiver enable */ - -/* Bit definition for Ethernet MAC Frame Filter Register */ -#define ETH_MACFFR_RA ((uint32_t)0x80000000) /* Receive all */ -#define ETH_MACFFR_HPF ((uint32_t)0x00000400) /* Hash or perfect filter */ -#define ETH_MACFFR_SAF ((uint32_t)0x00000200) /* Source address filter enable */ -#define ETH_MACFFR_SAIF ((uint32_t)0x00000100) /* SA inverse filtering */ -#define ETH_MACFFR_PCF ((uint32_t)0x000000C0) /* Pass control frames: 3 cases */ - #define ETH_MACFFR_PCF_BlockAll ((uint32_t)0x00000040) /* MAC filters all control frames from reaching the application */ - #define ETH_MACFFR_PCF_ForwardAll ((uint32_t)0x00000080) /* MAC forwards all control frames to application even if they fail the Address Filter */ - #define ETH_MACFFR_PCF_ForwardPassedAddrFilter ((uint32_t)0x000000C0) /* MAC forwards control frames that pass the Address Filter. */ -#define ETH_MACFFR_BFD ((uint32_t)0x00000020) /* Broadcast frame disable */ -#define ETH_MACFFR_PAM ((uint32_t)0x00000010) /* Pass all mutlicast */ -#define ETH_MACFFR_DAIF ((uint32_t)0x00000008) /* DA Inverse filtering */ -#define ETH_MACFFR_HM ((uint32_t)0x00000004) /* Hash multicast */ -#define ETH_MACFFR_HU ((uint32_t)0x00000002) /* Hash unicast */ -#define ETH_MACFFR_PM ((uint32_t)0x00000001) /* Promiscuous mode */ - -/* Bit definition for Ethernet MAC Hash Table High Register */ -#define ETH_MACHTHR_HTH ((uint32_t)0xFFFFFFFF) /* Hash table high */ - -/* Bit definition for Ethernet MAC Hash Table Low Register */ -#define ETH_MACHTLR_HTL ((uint32_t)0xFFFFFFFF) /* Hash table low */ - -/* Bit definition for Ethernet MAC MII Address Register */ -#define ETH_MACMIIAR_PA ((uint32_t)0x0000F800) /* Physical layer address */ -#define ETH_MACMIIAR_MR ((uint32_t)0x000007C0) /* MII register in the selected PHY */ -#define ETH_MACMIIAR_CR ((uint32_t)0x0000001C) /* CR clock range: 6 cases */ - #define ETH_MACMIIAR_CR_Div42 ((uint32_t)0x00000000) /* HCLK:60-72 MHz; MDC clock= HCLK/42 */ - #define ETH_MACMIIAR_CR_Div16 ((uint32_t)0x00000008) /* HCLK:20-35 MHz; MDC clock= HCLK/16 */ - #define ETH_MACMIIAR_CR_Div26 ((uint32_t)0x0000000C) /* HCLK:35-60 MHz; MDC clock= HCLK/26 */ -#define ETH_MACMIIAR_MW ((uint32_t)0x00000002) /* MII write */ -#define ETH_MACMIIAR_MB ((uint32_t)0x00000001) /* MII busy */ - -/* Bit definition for Ethernet MAC MII Data Register */ -#define ETH_MACMIIDR_MD ((uint32_t)0x0000FFFF) /* MII data: read/write data from/to PHY */ - -/* Bit definition for Ethernet MAC Flow Control Register */ -#define ETH_MACFCR_PT ((uint32_t)0xFFFF0000) /* Pause time */ -#define ETH_MACFCR_ZQPD ((uint32_t)0x00000080) /* Zero-quanta pause disable */ -#define ETH_MACFCR_PLT ((uint32_t)0x00000030) /* Pause low threshold: 4 cases */ - #define ETH_MACFCR_PLT_Minus4 ((uint32_t)0x00000000) /* Pause time minus 4 slot times */ - #define ETH_MACFCR_PLT_Minus28 ((uint32_t)0x00000010) /* Pause time minus 28 slot times */ - #define ETH_MACFCR_PLT_Minus144 ((uint32_t)0x00000020) /* Pause time minus 144 slot times */ - #define ETH_MACFCR_PLT_Minus256 ((uint32_t)0x00000030) /* Pause time minus 256 slot times */ -#define ETH_MACFCR_UPFD ((uint32_t)0x00000008) /* Unicast pause frame detect */ -#define ETH_MACFCR_RFCE ((uint32_t)0x00000004) /* Receive flow control enable */ -#define ETH_MACFCR_TFCE ((uint32_t)0x00000002) /* Transmit flow control enable */ -#define ETH_MACFCR_FCBBPA ((uint32_t)0x00000001) /* Flow control busy/backpressure activate */ - -/* Bit definition for Ethernet MAC VLAN Tag Register */ -#define ETH_MACVLANTR_VLANTC ((uint32_t)0x00010000) /* 12-bit VLAN tag comparison */ -#define ETH_MACVLANTR_VLANTI ((uint32_t)0x0000FFFF) /* VLAN tag identifier (for receive frames) */ - -/* Bit definition for Ethernet MAC Remote Wake-UpFrame Filter Register */ -#define ETH_MACRWUFFR_D ((uint32_t)0xFFFFFFFF) /* Wake-up frame filter register data */ -/* Eight sequential Writes to this address (offset 0x28) will write all Wake-UpFrame Filter Registers. - Eight sequential Reads from this address (offset 0x28) will read all Wake-UpFrame Filter Registers. */ -/* Wake-UpFrame Filter Reg0 : Filter 0 Byte Mask - Wake-UpFrame Filter Reg1 : Filter 1 Byte Mask - Wake-UpFrame Filter Reg2 : Filter 2 Byte Mask - Wake-UpFrame Filter Reg3 : Filter 3 Byte Mask - Wake-UpFrame Filter Reg4 : RSVD - Filter3 Command - RSVD - Filter2 Command - - RSVD - Filter1 Command - RSVD - Filter0 Command - Wake-UpFrame Filter Re5 : Filter3 Offset - Filter2 Offset - Filter1 Offset - Filter0 Offset - Wake-UpFrame Filter Re6 : Filter1 CRC16 - Filter0 CRC16 - Wake-UpFrame Filter Re7 : Filter3 CRC16 - Filter2 CRC16 */ - -/* Bit definition for Ethernet MAC PMT Control and Status Register */ -#define ETH_MACPMTCSR_WFFRPR ((uint32_t)0x80000000) /* Wake-Up Frame Filter Register Pointer Reset */ -#define ETH_MACPMTCSR_GU ((uint32_t)0x00000200) /* Global Unicast */ -#define ETH_MACPMTCSR_WFR ((uint32_t)0x00000040) /* Wake-Up Frame Received */ -#define ETH_MACPMTCSR_MPR ((uint32_t)0x00000020) /* Magic Packet Received */ -#define ETH_MACPMTCSR_WFE ((uint32_t)0x00000004) /* Wake-Up Frame Enable */ -#define ETH_MACPMTCSR_MPE ((uint32_t)0x00000002) /* Magic Packet Enable */ -#define ETH_MACPMTCSR_PD ((uint32_t)0x00000001) /* Power Down */ - -/* Bit definition for Ethernet MAC Status Register */ -#define ETH_MACSR_TSTS ((uint32_t)0x00000200) /* Time stamp trigger status */ -#define ETH_MACSR_MMCTS ((uint32_t)0x00000040) /* MMC transmit status */ -#define ETH_MACSR_MMMCRS ((uint32_t)0x00000020) /* MMC receive status */ -#define ETH_MACSR_MMCS ((uint32_t)0x00000010) /* MMC status */ -#define ETH_MACSR_PMTS ((uint32_t)0x00000008) /* PMT status */ - -/* Bit definition for Ethernet MAC Interrupt Mask Register */ -#define ETH_MACIMR_TSTIM ((uint32_t)0x00000200) /* Time stamp trigger interrupt mask */ -#define ETH_MACIMR_PMTIM ((uint32_t)0x00000008) /* PMT interrupt mask */ - -/* Bit definition for Ethernet MAC Address0 High Register */ -#define ETH_MACA0HR_MACA0H ((uint32_t)0x0000FFFF) /* MAC address0 high */ - -/* Bit definition for Ethernet MAC Address0 Low Register */ -#define ETH_MACA0LR_MACA0L ((uint32_t)0xFFFFFFFF) /* MAC address0 low */ - -/* Bit definition for Ethernet MAC Address1 High Register */ -#define ETH_MACA1HR_AE ((uint32_t)0x80000000) /* Address enable */ -#define ETH_MACA1HR_SA ((uint32_t)0x40000000) /* Source address */ -#define ETH_MACA1HR_MBC ((uint32_t)0x3F000000) /* Mask byte control: bits to mask for comparison of the MAC Address bytes */ - #define ETH_MACA1HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ - #define ETH_MACA1HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ - #define ETH_MACA1HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ - #define ETH_MACA1HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ - #define ETH_MACA1HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ - #define ETH_MACA1HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [7:0] */ -#define ETH_MACA1HR_MACA1H ((uint32_t)0x0000FFFF) /* MAC address1 high */ - -/* Bit definition for Ethernet MAC Address1 Low Register */ -#define ETH_MACA1LR_MACA1L ((uint32_t)0xFFFFFFFF) /* MAC address1 low */ - -/* Bit definition for Ethernet MAC Address2 High Register */ -#define ETH_MACA2HR_AE ((uint32_t)0x80000000) /* Address enable */ -#define ETH_MACA2HR_SA ((uint32_t)0x40000000) /* Source address */ -#define ETH_MACA2HR_MBC ((uint32_t)0x3F000000) /* Mask byte control */ - #define ETH_MACA2HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ - #define ETH_MACA2HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ - #define ETH_MACA2HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ - #define ETH_MACA2HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ - #define ETH_MACA2HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ - #define ETH_MACA2HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */ -#define ETH_MACA2HR_MACA2H ((uint32_t)0x0000FFFF) /* MAC address1 high */ - -/* Bit definition for Ethernet MAC Address2 Low Register */ -#define ETH_MACA2LR_MACA2L ((uint32_t)0xFFFFFFFF) /* MAC address2 low */ - -/* Bit definition for Ethernet MAC Address3 High Register */ -#define ETH_MACA3HR_AE ((uint32_t)0x80000000) /* Address enable */ -#define ETH_MACA3HR_SA ((uint32_t)0x40000000) /* Source address */ -#define ETH_MACA3HR_MBC ((uint32_t)0x3F000000) /* Mask byte control */ - #define ETH_MACA3HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ - #define ETH_MACA3HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ - #define ETH_MACA3HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ - #define ETH_MACA3HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ - #define ETH_MACA3HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ - #define ETH_MACA3HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */ -#define ETH_MACA3HR_MACA3H ((uint32_t)0x0000FFFF) /* MAC address3 high */ - -/* Bit definition for Ethernet MAC Address3 Low Register */ -#define ETH_MACA3LR_MACA3L ((uint32_t)0xFFFFFFFF) /* MAC address3 low */ - -/******************************************************************************/ -/* Ethernet MMC Registers bits definition */ -/******************************************************************************/ - -/* Bit definition for Ethernet MMC Contol Register */ -#define ETH_MMCCR_MCF ((uint32_t)0x00000008) /* MMC Counter Freeze */ -#define ETH_MMCCR_ROR ((uint32_t)0x00000004) /* Reset on Read */ -#define ETH_MMCCR_CSR ((uint32_t)0x00000002) /* Counter Stop Rollover */ -#define ETH_MMCCR_CR ((uint32_t)0x00000001) /* Counters Reset */ - -/* Bit definition for Ethernet MMC Receive Interrupt Register */ -#define ETH_MMCRIR_RGUFS ((uint32_t)0x00020000) /* Set when Rx good unicast frames counter reaches half the maximum value */ -#define ETH_MMCRIR_RFAES ((uint32_t)0x00000040) /* Set when Rx alignment error counter reaches half the maximum value */ -#define ETH_MMCRIR_RFCES ((uint32_t)0x00000020) /* Set when Rx crc error counter reaches half the maximum value */ - -/* Bit definition for Ethernet MMC Transmit Interrupt Register */ -#define ETH_MMCTIR_TGFS ((uint32_t)0x00200000) /* Set when Tx good frame count counter reaches half the maximum value */ -#define ETH_MMCTIR_TGFMSCS ((uint32_t)0x00008000) /* Set when Tx good multi col counter reaches half the maximum value */ -#define ETH_MMCTIR_TGFSCS ((uint32_t)0x00004000) /* Set when Tx good single col counter reaches half the maximum value */ - -/* Bit definition for Ethernet MMC Receive Interrupt Mask Register */ -#define ETH_MMCRIMR_RGUFM ((uint32_t)0x00020000) /* Mask the interrupt when Rx good unicast frames counter reaches half the maximum value */ -#define ETH_MMCRIMR_RFAEM ((uint32_t)0x00000040) /* Mask the interrupt when when Rx alignment error counter reaches half the maximum value */ -#define ETH_MMCRIMR_RFCEM ((uint32_t)0x00000020) /* Mask the interrupt when Rx crc error counter reaches half the maximum value */ - -/* Bit definition for Ethernet MMC Transmit Interrupt Mask Register */ -#define ETH_MMCTIMR_TGFM ((uint32_t)0x00200000) /* Mask the interrupt when Tx good frame count counter reaches half the maximum value */ -#define ETH_MMCTIMR_TGFMSCM ((uint32_t)0x00008000) /* Mask the interrupt when Tx good multi col counter reaches half the maximum value */ -#define ETH_MMCTIMR_TGFSCM ((uint32_t)0x00004000) /* Mask the interrupt when Tx good single col counter reaches half the maximum value */ - -/* Bit definition for Ethernet MMC Transmitted Good Frames after Single Collision Counter Register */ -#define ETH_MMCTGFSCCR_TGFSCC ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after a single collision in Half-duplex mode. */ - -/* Bit definition for Ethernet MMC Transmitted Good Frames after More than a Single Collision Counter Register */ -#define ETH_MMCTGFMSCCR_TGFMSCC ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after more than a single collision in Half-duplex mode. */ - -/* Bit definition for Ethernet MMC Transmitted Good Frames Counter Register */ -#define ETH_MMCTGFCR_TGFC ((uint32_t)0xFFFFFFFF) /* Number of good frames transmitted. */ - -/* Bit definition for Ethernet MMC Received Frames with CRC Error Counter Register */ -#define ETH_MMCRFCECR_RFCEC ((uint32_t)0xFFFFFFFF) /* Number of frames received with CRC error. */ - -/* Bit definition for Ethernet MMC Received Frames with Alignement Error Counter Register */ -#define ETH_MMCRFAECR_RFAEC ((uint32_t)0xFFFFFFFF) /* Number of frames received with alignment (dribble) error */ - -/* Bit definition for Ethernet MMC Received Good Unicast Frames Counter Register */ -#define ETH_MMCRGUFCR_RGUFC ((uint32_t)0xFFFFFFFF) /* Number of good unicast frames received. */ - -/******************************************************************************/ -/* Ethernet PTP Registers bits definition */ -/******************************************************************************/ - -/* Bit definition for Ethernet PTP Time Stamp Contol Register */ -#define ETH_PTPTSCR_TSARU ((uint32_t)0x00000020) /* Addend register update */ -#define ETH_PTPTSCR_TSITE ((uint32_t)0x00000010) /* Time stamp interrupt trigger enable */ -#define ETH_PTPTSCR_TSSTU ((uint32_t)0x00000008) /* Time stamp update */ -#define ETH_PTPTSCR_TSSTI ((uint32_t)0x00000004) /* Time stamp initialize */ -#define ETH_PTPTSCR_TSFCU ((uint32_t)0x00000002) /* Time stamp fine or coarse update */ -#define ETH_PTPTSCR_TSE ((uint32_t)0x00000001) /* Time stamp enable */ - -/* Bit definition for Ethernet PTP Sub-Second Increment Register */ -#define ETH_PTPSSIR_STSSI ((uint32_t)0x000000FF) /* System time Sub-second increment value */ - -/* Bit definition for Ethernet PTP Time Stamp High Register */ -#define ETH_PTPTSHR_STS ((uint32_t)0xFFFFFFFF) /* System Time second */ - -/* Bit definition for Ethernet PTP Time Stamp Low Register */ -#define ETH_PTPTSLR_STPNS ((uint32_t)0x80000000) /* System Time Positive or negative time */ -#define ETH_PTPTSLR_STSS ((uint32_t)0x7FFFFFFF) /* System Time sub-seconds */ - -/* Bit definition for Ethernet PTP Time Stamp High Update Register */ -#define ETH_PTPTSHUR_TSUS ((uint32_t)0xFFFFFFFF) /* Time stamp update seconds */ - -/* Bit definition for Ethernet PTP Time Stamp Low Update Register */ -#define ETH_PTPTSLUR_TSUPNS ((uint32_t)0x80000000) /* Time stamp update Positive or negative time */ -#define ETH_PTPTSLUR_TSUSS ((uint32_t)0x7FFFFFFF) /* Time stamp update sub-seconds */ - -/* Bit definition for Ethernet PTP Time Stamp Addend Register */ -#define ETH_PTPTSAR_TSA ((uint32_t)0xFFFFFFFF) /* Time stamp addend */ - -/* Bit definition for Ethernet PTP Target Time High Register */ -#define ETH_PTPTTHR_TTSH ((uint32_t)0xFFFFFFFF) /* Target time stamp high */ - -/* Bit definition for Ethernet PTP Target Time Low Register */ -#define ETH_PTPTTLR_TTSL ((uint32_t)0xFFFFFFFF) /* Target time stamp low */ - -/******************************************************************************/ -/* Ethernet DMA Registers bits definition */ -/******************************************************************************/ - -/* Bit definition for Ethernet DMA Bus Mode Register */ -#define ETH_DMABMR_AAB ((uint32_t)0x02000000) /* Address-Aligned beats */ -#define ETH_DMABMR_FPM ((uint32_t)0x01000000) /* 4xPBL mode */ -#define ETH_DMABMR_USP ((uint32_t)0x00800000) /* Use separate PBL */ -#define ETH_DMABMR_RDP ((uint32_t)0x007E0000) /* RxDMA PBL */ - #define ETH_DMABMR_RDP_1Beat ((uint32_t)0x00020000) /* maximum number of beats to be transferred in one RxDMA transaction is 1 */ - #define ETH_DMABMR_RDP_2Beat ((uint32_t)0x00040000) /* maximum number of beats to be transferred in one RxDMA transaction is 2 */ - #define ETH_DMABMR_RDP_4Beat ((uint32_t)0x00080000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ - #define ETH_DMABMR_RDP_8Beat ((uint32_t)0x00100000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ - #define ETH_DMABMR_RDP_16Beat ((uint32_t)0x00200000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ - #define ETH_DMABMR_RDP_32Beat ((uint32_t)0x00400000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ - #define ETH_DMABMR_RDP_4xPBL_4Beat ((uint32_t)0x01020000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ - #define ETH_DMABMR_RDP_4xPBL_8Beat ((uint32_t)0x01040000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ - #define ETH_DMABMR_RDP_4xPBL_16Beat ((uint32_t)0x01080000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ - #define ETH_DMABMR_RDP_4xPBL_32Beat ((uint32_t)0x01100000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ - #define ETH_DMABMR_RDP_4xPBL_64Beat ((uint32_t)0x01200000) /* maximum number of beats to be transferred in one RxDMA transaction is 64 */ - #define ETH_DMABMR_RDP_4xPBL_128Beat ((uint32_t)0x01400000) /* maximum number of beats to be transferred in one RxDMA transaction is 128 */ -#define ETH_DMABMR_FB ((uint32_t)0x00010000) /* Fixed Burst */ -#define ETH_DMABMR_RTPR ((uint32_t)0x0000C000) /* Rx Tx priority ratio */ - #define ETH_DMABMR_RTPR_1_1 ((uint32_t)0x00000000) /* Rx Tx priority ratio */ - #define ETH_DMABMR_RTPR_2_1 ((uint32_t)0x00004000) /* Rx Tx priority ratio */ - #define ETH_DMABMR_RTPR_3_1 ((uint32_t)0x00008000) /* Rx Tx priority ratio */ - #define ETH_DMABMR_RTPR_4_1 ((uint32_t)0x0000C000) /* Rx Tx priority ratio */ -#define ETH_DMABMR_PBL ((uint32_t)0x00003F00) /* Programmable burst length */ - #define ETH_DMABMR_PBL_1Beat ((uint32_t)0x00000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */ - #define ETH_DMABMR_PBL_2Beat ((uint32_t)0x00000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */ - #define ETH_DMABMR_PBL_4Beat ((uint32_t)0x00000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ - #define ETH_DMABMR_PBL_8Beat ((uint32_t)0x00000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ - #define ETH_DMABMR_PBL_16Beat ((uint32_t)0x00001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ - #define ETH_DMABMR_PBL_32Beat ((uint32_t)0x00002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ - #define ETH_DMABMR_PBL_4xPBL_4Beat ((uint32_t)0x01000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ - #define ETH_DMABMR_PBL_4xPBL_8Beat ((uint32_t)0x01000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ - #define ETH_DMABMR_PBL_4xPBL_16Beat ((uint32_t)0x01000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ - #define ETH_DMABMR_PBL_4xPBL_32Beat ((uint32_t)0x01000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ - #define ETH_DMABMR_PBL_4xPBL_64Beat ((uint32_t)0x01001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */ - #define ETH_DMABMR_PBL_4xPBL_128Beat ((uint32_t)0x01002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */ -#define ETH_DMABMR_DSL ((uint32_t)0x0000007C) /* Descriptor Skip Length */ -#define ETH_DMABMR_DA ((uint32_t)0x00000002) /* DMA arbitration scheme */ -#define ETH_DMABMR_SR ((uint32_t)0x00000001) /* Software reset */ - -/* Bit definition for Ethernet DMA Transmit Poll Demand Register */ -#define ETH_DMATPDR_TPD ((uint32_t)0xFFFFFFFF) /* Transmit poll demand */ - -/* Bit definition for Ethernet DMA Receive Poll Demand Register */ -#define ETH_DMARPDR_RPD ((uint32_t)0xFFFFFFFF) /* Receive poll demand */ - -/* Bit definition for Ethernet DMA Receive Descriptor List Address Register */ -#define ETH_DMARDLAR_SRL ((uint32_t)0xFFFFFFFF) /* Start of receive list */ - -/* Bit definition for Ethernet DMA Transmit Descriptor List Address Register */ -#define ETH_DMATDLAR_STL ((uint32_t)0xFFFFFFFF) /* Start of transmit list */ - -/* Bit definition for Ethernet DMA Status Register */ -#define ETH_DMASR_TSTS ((uint32_t)0x20000000) /* Time-stamp trigger status */ -#define ETH_DMASR_PMTS ((uint32_t)0x10000000) /* PMT status */ -#define ETH_DMASR_MMCS ((uint32_t)0x08000000) /* MMC status */ -#define ETH_DMASR_EBS ((uint32_t)0x03800000) /* Error bits status */ - /* combination with EBS[2:0] for GetFlagStatus function */ - #define ETH_DMASR_EBS_DescAccess ((uint32_t)0x02000000) /* Error bits 0-data buffer, 1-desc. access */ - #define ETH_DMASR_EBS_ReadTransf ((uint32_t)0x01000000) /* Error bits 0-write trnsf, 1-read transfr */ - #define ETH_DMASR_EBS_DataTransfTx ((uint32_t)0x00800000) /* Error bits 0-Rx DMA, 1-Tx DMA */ -#define ETH_DMASR_TPS ((uint32_t)0x00700000) /* Transmit process state */ - #define ETH_DMASR_TPS_Stopped ((uint32_t)0x00000000) /* Stopped - Reset or Stop Tx Command issued */ - #define ETH_DMASR_TPS_Fetching ((uint32_t)0x00100000) /* Running - fetching the Tx descriptor */ - #define ETH_DMASR_TPS_Waiting ((uint32_t)0x00200000) /* Running - waiting for status */ - #define ETH_DMASR_TPS_Reading ((uint32_t)0x00300000) /* Running - reading the data from host memory */ - #define ETH_DMASR_TPS_Suspended ((uint32_t)0x00600000) /* Suspended - Tx Descriptor unavailabe */ - #define ETH_DMASR_TPS_Closing ((uint32_t)0x00700000) /* Running - closing Rx descriptor */ -#define ETH_DMASR_RPS ((uint32_t)0x000E0000) /* Receive process state */ - #define ETH_DMASR_RPS_Stopped ((uint32_t)0x00000000) /* Stopped - Reset or Stop Rx Command issued */ - #define ETH_DMASR_RPS_Fetching ((uint32_t)0x00020000) /* Running - fetching the Rx descriptor */ - #define ETH_DMASR_RPS_Waiting ((uint32_t)0x00060000) /* Running - waiting for packet */ - #define ETH_DMASR_RPS_Suspended ((uint32_t)0x00080000) /* Suspended - Rx Descriptor unavailable */ - #define ETH_DMASR_RPS_Closing ((uint32_t)0x000A0000) /* Running - closing descriptor */ - #define ETH_DMASR_RPS_Queuing ((uint32_t)0x000E0000) /* Running - queuing the recieve frame into host memory */ -#define ETH_DMASR_NIS ((uint32_t)0x00010000) /* Normal interrupt summary */ -#define ETH_DMASR_AIS ((uint32_t)0x00008000) /* Abnormal interrupt summary */ -#define ETH_DMASR_ERS ((uint32_t)0x00004000) /* Early receive status */ -#define ETH_DMASR_FBES ((uint32_t)0x00002000) /* Fatal bus error status */ -#define ETH_DMASR_ETS ((uint32_t)0x00000400) /* Early transmit status */ -#define ETH_DMASR_RWTS ((uint32_t)0x00000200) /* Receive watchdog timeout status */ -#define ETH_DMASR_RPSS ((uint32_t)0x00000100) /* Receive process stopped status */ -#define ETH_DMASR_RBUS ((uint32_t)0x00000080) /* Receive buffer unavailable status */ -#define ETH_DMASR_RS ((uint32_t)0x00000040) /* Receive status */ -#define ETH_DMASR_TUS ((uint32_t)0x00000020) /* Transmit underflow status */ -#define ETH_DMASR_ROS ((uint32_t)0x00000010) /* Receive overflow status */ -#define ETH_DMASR_TJTS ((uint32_t)0x00000008) /* Transmit jabber timeout status */ -#define ETH_DMASR_TBUS ((uint32_t)0x00000004) /* Transmit buffer unavailable status */ -#define ETH_DMASR_TPSS ((uint32_t)0x00000002) /* Transmit process stopped status */ -#define ETH_DMASR_TS ((uint32_t)0x00000001) /* Transmit status */ - -/* Bit definition for Ethernet DMA Operation Mode Register */ -#define ETH_DMAOMR_DTCEFD ((uint32_t)0x04000000) /* Disable Dropping of TCP/IP checksum error frames */ -#define ETH_DMAOMR_RSF ((uint32_t)0x02000000) /* Receive store and forward */ -#define ETH_DMAOMR_DFRF ((uint32_t)0x01000000) /* Disable flushing of received frames */ -#define ETH_DMAOMR_TSF ((uint32_t)0x00200000) /* Transmit store and forward */ -#define ETH_DMAOMR_FTF ((uint32_t)0x00100000) /* Flush transmit FIFO */ -#define ETH_DMAOMR_TTC ((uint32_t)0x0001C000) /* Transmit threshold control */ - #define ETH_DMAOMR_TTC_64Bytes ((uint32_t)0x00000000) /* threshold level of the MTL Transmit FIFO is 64 Bytes */ - #define ETH_DMAOMR_TTC_128Bytes ((uint32_t)0x00004000) /* threshold level of the MTL Transmit FIFO is 128 Bytes */ - #define ETH_DMAOMR_TTC_192Bytes ((uint32_t)0x00008000) /* threshold level of the MTL Transmit FIFO is 192 Bytes */ - #define ETH_DMAOMR_TTC_256Bytes ((uint32_t)0x0000C000) /* threshold level of the MTL Transmit FIFO is 256 Bytes */ - #define ETH_DMAOMR_TTC_40Bytes ((uint32_t)0x00010000) /* threshold level of the MTL Transmit FIFO is 40 Bytes */ - #define ETH_DMAOMR_TTC_32Bytes ((uint32_t)0x00014000) /* threshold level of the MTL Transmit FIFO is 32 Bytes */ - #define ETH_DMAOMR_TTC_24Bytes ((uint32_t)0x00018000) /* threshold level of the MTL Transmit FIFO is 24 Bytes */ - #define ETH_DMAOMR_TTC_16Bytes ((uint32_t)0x0001C000) /* threshold level of the MTL Transmit FIFO is 16 Bytes */ -#define ETH_DMAOMR_ST ((uint32_t)0x00002000) /* Start/stop transmission command */ -#define ETH_DMAOMR_FEF ((uint32_t)0x00000080) /* Forward error frames */ -#define ETH_DMAOMR_FUGF ((uint32_t)0x00000040) /* Forward undersized good frames */ -#define ETH_DMAOMR_RTC ((uint32_t)0x00000018) /* receive threshold control */ - #define ETH_DMAOMR_RTC_64Bytes ((uint32_t)0x00000000) /* threshold level of the MTL Receive FIFO is 64 Bytes */ - #define ETH_DMAOMR_RTC_32Bytes ((uint32_t)0x00000008) /* threshold level of the MTL Receive FIFO is 32 Bytes */ - #define ETH_DMAOMR_RTC_96Bytes ((uint32_t)0x00000010) /* threshold level of the MTL Receive FIFO is 96 Bytes */ - #define ETH_DMAOMR_RTC_128Bytes ((uint32_t)0x00000018) /* threshold level of the MTL Receive FIFO is 128 Bytes */ -#define ETH_DMAOMR_OSF ((uint32_t)0x00000004) /* operate on second frame */ -#define ETH_DMAOMR_SR ((uint32_t)0x00000002) /* Start/stop receive */ - -/* Bit definition for Ethernet DMA Interrupt Enable Register */ -#define ETH_DMAIER_NISE ((uint32_t)0x00010000) /* Normal interrupt summary enable */ -#define ETH_DMAIER_AISE ((uint32_t)0x00008000) /* Abnormal interrupt summary enable */ -#define ETH_DMAIER_ERIE ((uint32_t)0x00004000) /* Early receive interrupt enable */ -#define ETH_DMAIER_FBEIE ((uint32_t)0x00002000) /* Fatal bus error interrupt enable */ -#define ETH_DMAIER_ETIE ((uint32_t)0x00000400) /* Early transmit interrupt enable */ -#define ETH_DMAIER_RWTIE ((uint32_t)0x00000200) /* Receive watchdog timeout interrupt enable */ -#define ETH_DMAIER_RPSIE ((uint32_t)0x00000100) /* Receive process stopped interrupt enable */ -#define ETH_DMAIER_RBUIE ((uint32_t)0x00000080) /* Receive buffer unavailable interrupt enable */ -#define ETH_DMAIER_RIE ((uint32_t)0x00000040) /* Receive interrupt enable */ -#define ETH_DMAIER_TUIE ((uint32_t)0x00000020) /* Transmit Underflow interrupt enable */ -#define ETH_DMAIER_ROIE ((uint32_t)0x00000010) /* Receive Overflow interrupt enable */ -#define ETH_DMAIER_TJTIE ((uint32_t)0x00000008) /* Transmit jabber timeout interrupt enable */ -#define ETH_DMAIER_TBUIE ((uint32_t)0x00000004) /* Transmit buffer unavailable interrupt enable */ -#define ETH_DMAIER_TPSIE ((uint32_t)0x00000002) /* Transmit process stopped interrupt enable */ -#define ETH_DMAIER_TIE ((uint32_t)0x00000001) /* Transmit interrupt enable */ - -/* Bit definition for Ethernet DMA Missed Frame and Buffer Overflow Counter Register */ -#define ETH_DMAMFBOCR_OFOC ((uint32_t)0x10000000) /* Overflow bit for FIFO overflow counter */ -#define ETH_DMAMFBOCR_MFA ((uint32_t)0x0FFE0000) /* Number of frames missed by the application */ -#define ETH_DMAMFBOCR_OMFC ((uint32_t)0x00010000) /* Overflow bit for missed frame counter */ -#define ETH_DMAMFBOCR_MFC ((uint32_t)0x0000FFFF) /* Number of frames missed by the controller */ - -/* Bit definition for Ethernet DMA Current Host Transmit Descriptor Register */ -#define ETH_DMACHTDR_HTDAP ((uint32_t)0xFFFFFFFF) /* Host transmit descriptor address pointer */ - -/* Bit definition for Ethernet DMA Current Host Receive Descriptor Register */ -#define ETH_DMACHRDR_HRDAP ((uint32_t)0xFFFFFFFF) /* Host receive descriptor address pointer */ - -/* Bit definition for Ethernet DMA Current Host Transmit Buffer Address Register */ -#define ETH_DMACHTBAR_HTBAP ((uint32_t)0xFFFFFFFF) /* Host transmit buffer address pointer */ - -/* Bit definition for Ethernet DMA Current Host Receive Buffer Address Register */ -#define ETH_DMACHRBAR_HRBAP ((uint32_t)0xFFFFFFFF) /* Host receive buffer address pointer */ -#endif /* STM32F10X_CL */ - -/** - * @} - */ - - /** - * @} - */ - -#ifdef USE_STDPERIPH_DRIVER - #include "stm32f10x_conf.h" -#endif - -/** @addtogroup Exported_macro - * @{ - */ - -#define SET_BIT(REG, BIT) ((REG) |= (BIT)) - -#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) - -#define READ_BIT(REG, BIT) ((REG) & (BIT)) - -#define CLEAR_REG(REG) ((REG) = (0x0)) - -#define WRITE_REG(REG, VAL) ((REG) = (VAL)) - -#define READ_REG(REG) ((REG)) - -#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_H */ - -/** - * @} - */ - - /** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File. + * This file contains all the peripheral register's definitions, bits + * definitions and memory mapping for STM32F10x Connectivity line, + * High density, High density value line, Medium density, + * Medium density Value line, Low density, Low density Value line + * and XL-density devices. + * + * The file is the unique include file that the application programmer + * is using in the C source code, usually in main.c. This file contains: + * - Configuration section that allows to select: + * - The device used in the target application + * - To use or not the peripherals drivers in application code(i.e. + * code will be based on direct access to peripherals registers + * rather than drivers API), this option is controlled by + * "#define USE_STDPERIPH_DRIVER" + * - To change few application-specific parameters such as the HSE + * crystal frequency + * - Data structures and the address mapping for all peripherals + * - Peripheral's registers declarations and bits definition + * - Macros to access peripherals registers hardware + * + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x + * @{ + */ + +#ifndef __STM32F10x_H +#define __STM32F10x_H + +#ifdef __cplusplus + extern "C" { +#endif + +/** @addtogroup Library_configuration_section + * @{ + */ + +/* Uncomment the line below according to the target STM32 device used in your + application + */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) + /* #define STM32F10X_LD */ /*!< STM32F10X_LD: STM32 Low density devices */ + /* #define STM32F10X_LD_VL */ /*!< STM32F10X_LD_VL: STM32 Low density Value Line devices */ + /* #define STM32F10X_MD */ /*!< STM32F10X_MD: STM32 Medium density devices */ + /* #define STM32F10X_MD_VL */ /*!< STM32F10X_MD_VL: STM32 Medium density Value Line devices */ + /* #define STM32F10X_HD */ /*!< STM32F10X_HD: STM32 High density devices */ + /* #define STM32F10X_HD_VL */ /*!< STM32F10X_HD_VL: STM32 High density value line devices */ + /* #define STM32F10X_XL */ /*!< STM32F10X_XL: STM32 XL-density devices */ + /* #define STM32F10X_CL */ /*!< STM32F10X_CL: STM32 Connectivity line devices */ +#endif +/* Tip: To avoid modifying this file each time you need to switch between these + devices, you can define the device in your toolchain compiler preprocessor. + + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers + where the Flash memory density ranges between 16 and 32 Kbytes. + - Low-density value line devices are STM32F100xx microcontrollers where the Flash + memory density ranges between 16 and 32 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx microcontrollers + where the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 64 and 128 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_XL) && !defined (STM32F10X_CL) + #error "Please select first the target STM32F10x device used in your application (in stm32f10x.h file)" +#endif + +#if !defined USE_STDPERIPH_DRIVER +/** + * @brief Comment the line below if you will not use the peripherals drivers. + In this case, these drivers will not be included and the application code will + be based on direct access to peripherals registers + */ + /*#define USE_STDPERIPH_DRIVER*/ +#endif + +/** + * @brief In the following line adjust the value of External High Speed oscillator (HSE) + used in your application + + Tip: To avoid modifying this file each time you need to use different HSE, you + can define the HSE value in your toolchain compiler preprocessor. + */ +#if !defined HSE_VALUE + #ifdef STM32F10X_CL + #define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ + #else + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ + #endif /* STM32F10X_CL */ +#endif /* HSE_VALUE */ + + +/** + * @brief In the following line adjust the External High Speed oscillator (HSE) Startup + Timeout value + */ +#define HSE_STARTUP_TIMEOUT ((uint16_t)0x0500) /*!< Time out for HSE start up */ + +#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ + +/** + * @brief STM32F10x Standard Peripheral Library version number + */ +#define __STM32F10X_STDPERIPH_VERSION_MAIN (0x03) /*!< [31:24] main version */ +#define __STM32F10X_STDPERIPH_VERSION_SUB1 (0x05) /*!< [23:16] sub1 version */ +#define __STM32F10X_STDPERIPH_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */ +#define __STM32F10X_STDPERIPH_VERSION_RC (0x00) /*!< [7:0] release candidate */ +#define __STM32F10X_STDPERIPH_VERSION ( (__STM32F10X_STDPERIPH_VERSION_MAIN << 24)\ + |(__STM32F10X_STDPERIPH_VERSION_SUB1 << 16)\ + |(__STM32F10X_STDPERIPH_VERSION_SUB2 << 8)\ + |(__STM32F10X_STDPERIPH_VERSION_RC)) + +/** + * @} + */ + +/** @addtogroup Configuration_section_for_CMSIS + * @{ + */ + +/** + * @brief Configuration of the Cortex-M3 Processor and Core Peripherals + */ +#ifdef STM32F10X_XL + #define __MPU_PRESENT 1 /*!< STM32 XL-density devices provide an MPU */ +#else + #define __MPU_PRESENT 0 /*!< Other STM32 devices does not provide an MPU */ +#endif /* STM32F10X_XL */ +#define __NVIC_PRIO_BITS 4 /*!< STM32 uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */ + +/** + * @brief STM32F10x Interrupt Number Definition, according to the selected device + * in @ref Library_configuration_section + */ +typedef enum IRQn +{ +/****** Cortex-M3 Processor Exceptions Numbers ***************************************************/ + NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /*!< 4 Cortex-M3 Memory Management Interrupt */ + BusFault_IRQn = -11, /*!< 5 Cortex-M3 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /*!< 6 Cortex-M3 Usage Fault Interrupt */ + SVCall_IRQn = -5, /*!< 11 Cortex-M3 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /*!< 12 Cortex-M3 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /*!< 14 Cortex-M3 Pend SV Interrupt */ + SysTick_IRQn = -1, /*!< 15 Cortex-M3 System Tick Interrupt */ + +/****** STM32 specific Interrupt Numbers *********************************************************/ + WWDG_IRQn = 0, /*!< Window WatchDog Interrupt */ + PVD_IRQn = 1, /*!< PVD through EXTI Line detection Interrupt */ + TAMPER_IRQn = 2, /*!< Tamper Interrupt */ + RTC_IRQn = 3, /*!< RTC global Interrupt */ + FLASH_IRQn = 4, /*!< FLASH global Interrupt */ + RCC_IRQn = 5, /*!< RCC global Interrupt */ + EXTI0_IRQn = 6, /*!< EXTI Line0 Interrupt */ + EXTI1_IRQn = 7, /*!< EXTI Line1 Interrupt */ + EXTI2_IRQn = 8, /*!< EXTI Line2 Interrupt */ + EXTI3_IRQn = 9, /*!< EXTI Line3 Interrupt */ + EXTI4_IRQn = 10, /*!< EXTI Line4 Interrupt */ + DMA1_Channel1_IRQn = 11, /*!< DMA1 Channel 1 global Interrupt */ + DMA1_Channel2_IRQn = 12, /*!< DMA1 Channel 2 global Interrupt */ + DMA1_Channel3_IRQn = 13, /*!< DMA1 Channel 3 global Interrupt */ + DMA1_Channel4_IRQn = 14, /*!< DMA1 Channel 4 global Interrupt */ + DMA1_Channel5_IRQn = 15, /*!< DMA1 Channel 5 global Interrupt */ + DMA1_Channel6_IRQn = 16, /*!< DMA1 Channel 6 global Interrupt */ + DMA1_Channel7_IRQn = 17, /*!< DMA1 Channel 7 global Interrupt */ + +#ifdef STM32F10X_LD + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ +#endif /* STM32F10X_LD */ + +#ifdef STM32F10X_LD_VL + ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ + TIM7_IRQn = 55 /*!< TIM7 Interrupt */ +#endif /* STM32F10X_LD_VL */ + +#ifdef STM32F10X_MD + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42 /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ +#endif /* STM32F10X_MD */ + +#ifdef STM32F10X_MD_VL + ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ + TIM7_IRQn = 55 /*!< TIM7 Interrupt */ +#endif /* STM32F10X_MD_VL */ + +#ifdef STM32F10X_HD + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ + TIM8_BRK_IRQn = 43, /*!< TIM8 Break Interrupt */ + TIM8_UP_IRQn = 44, /*!< TIM8 Update Interrupt */ + TIM8_TRG_COM_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt */ + TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ + ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ + FSMC_IRQn = 48, /*!< FSMC global Interrupt */ + SDIO_IRQn = 49, /*!< SDIO global Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ +#endif /* STM32F10X_HD */ + +#ifdef STM32F10X_HD_VL + ADC1_IRQn = 18, /*!< ADC1 global Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM15_IRQn = 24, /*!< TIM1 Break and TIM15 Interrupts */ + TIM1_UP_TIM16_IRQn = 25, /*!< TIM1 Update and TIM16 Interrupts */ + TIM1_TRG_COM_TIM17_IRQn = 26, /*!< TIM1 Trigger and Commutation and TIM17 Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + CEC_IRQn = 42, /*!< HDMI-CEC Interrupt */ + TIM12_IRQn = 43, /*!< TIM12 global Interrupt */ + TIM13_IRQn = 44, /*!< TIM13 global Interrupt */ + TIM14_IRQn = 45, /*!< TIM14 global Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_DAC_IRQn = 54, /*!< TIM6 and DAC underrun Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_5_IRQn = 59, /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ + DMA2_Channel5_IRQn = 60 /*!< DMA2 Channel 5 global Interrupt (DMA2 Channel 5 is + mapped at position 60 only if the MISC_REMAP bit in + the AFIO_MAPR2 register is set) */ +#endif /* STM32F10X_HD_VL */ + +#ifdef STM32F10X_XL + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + USB_HP_CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + USB_LP_CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_TIM9_IRQn = 24, /*!< TIM1 Break Interrupt and TIM9 global Interrupt */ + TIM1_UP_TIM10_IRQn = 25, /*!< TIM1 Update Interrupt and TIM10 global Interrupt */ + TIM1_TRG_COM_TIM11_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt and TIM11 global interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + USBWakeUp_IRQn = 42, /*!< USB Device WakeUp from suspend through EXTI Line Interrupt */ + TIM8_BRK_TIM12_IRQn = 43, /*!< TIM8 Break Interrupt and TIM12 global Interrupt */ + TIM8_UP_TIM13_IRQn = 44, /*!< TIM8 Update Interrupt and TIM13 global Interrupt */ + TIM8_TRG_COM_TIM14_IRQn = 45, /*!< TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt */ + TIM8_CC_IRQn = 46, /*!< TIM8 Capture Compare Interrupt */ + ADC3_IRQn = 47, /*!< ADC3 global Interrupt */ + FSMC_IRQn = 48, /*!< FSMC global Interrupt */ + SDIO_IRQn = 49, /*!< SDIO global Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_5_IRQn = 59 /*!< DMA2 Channel 4 and Channel 5 global Interrupt */ +#endif /* STM32F10X_XL */ + +#ifdef STM32F10X_CL + ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global Interrupt */ + CAN1_TX_IRQn = 19, /*!< USB Device High Priority or CAN1 TX Interrupts */ + CAN1_RX0_IRQn = 20, /*!< USB Device Low Priority or CAN1 RX0 Interrupts */ + CAN1_RX1_IRQn = 21, /*!< CAN1 RX1 Interrupt */ + CAN1_SCE_IRQn = 22, /*!< CAN1 SCE Interrupt */ + EXTI9_5_IRQn = 23, /*!< External Line[9:5] Interrupts */ + TIM1_BRK_IRQn = 24, /*!< TIM1 Break Interrupt */ + TIM1_UP_IRQn = 25, /*!< TIM1 Update Interrupt */ + TIM1_TRG_COM_IRQn = 26, /*!< TIM1 Trigger and Commutation Interrupt */ + TIM1_CC_IRQn = 27, /*!< TIM1 Capture Compare Interrupt */ + TIM2_IRQn = 28, /*!< TIM2 global Interrupt */ + TIM3_IRQn = 29, /*!< TIM3 global Interrupt */ + TIM4_IRQn = 30, /*!< TIM4 global Interrupt */ + I2C1_EV_IRQn = 31, /*!< I2C1 Event Interrupt */ + I2C1_ER_IRQn = 32, /*!< I2C1 Error Interrupt */ + I2C2_EV_IRQn = 33, /*!< I2C2 Event Interrupt */ + I2C2_ER_IRQn = 34, /*!< I2C2 Error Interrupt */ + SPI1_IRQn = 35, /*!< SPI1 global Interrupt */ + SPI2_IRQn = 36, /*!< SPI2 global Interrupt */ + USART1_IRQn = 37, /*!< USART1 global Interrupt */ + USART2_IRQn = 38, /*!< USART2 global Interrupt */ + USART3_IRQn = 39, /*!< USART3 global Interrupt */ + EXTI15_10_IRQn = 40, /*!< External Line[15:10] Interrupts */ + RTCAlarm_IRQn = 41, /*!< RTC Alarm through EXTI Line Interrupt */ + OTG_FS_WKUP_IRQn = 42, /*!< USB OTG FS WakeUp from suspend through EXTI Line Interrupt */ + TIM5_IRQn = 50, /*!< TIM5 global Interrupt */ + SPI3_IRQn = 51, /*!< SPI3 global Interrupt */ + UART4_IRQn = 52, /*!< UART4 global Interrupt */ + UART5_IRQn = 53, /*!< UART5 global Interrupt */ + TIM6_IRQn = 54, /*!< TIM6 global Interrupt */ + TIM7_IRQn = 55, /*!< TIM7 global Interrupt */ + DMA2_Channel1_IRQn = 56, /*!< DMA2 Channel 1 global Interrupt */ + DMA2_Channel2_IRQn = 57, /*!< DMA2 Channel 2 global Interrupt */ + DMA2_Channel3_IRQn = 58, /*!< DMA2 Channel 3 global Interrupt */ + DMA2_Channel4_IRQn = 59, /*!< DMA2 Channel 4 global Interrupt */ + DMA2_Channel5_IRQn = 60, /*!< DMA2 Channel 5 global Interrupt */ + ETH_IRQn = 61, /*!< Ethernet global Interrupt */ + ETH_WKUP_IRQn = 62, /*!< Ethernet Wakeup through EXTI line Interrupt */ + CAN2_TX_IRQn = 63, /*!< CAN2 TX Interrupt */ + CAN2_RX0_IRQn = 64, /*!< CAN2 RX0 Interrupt */ + CAN2_RX1_IRQn = 65, /*!< CAN2 RX1 Interrupt */ + CAN2_SCE_IRQn = 66, /*!< CAN2 SCE Interrupt */ + OTG_FS_IRQn = 67 /*!< USB OTG FS global Interrupt */ +#endif /* STM32F10X_CL */ +} IRQn_Type; + +/** + * @} + */ + +#include "core_cm3.h" +#include "system_stm32f10x.h" +#include + +/** @addtogroup Exported_types + * @{ + */ + +/*!< STM32F10x Standard Peripheral Library old types (maintained for legacy purpose) */ +typedef int32_t s32; +typedef int16_t s16; +typedef int8_t s8; + +typedef const int32_t sc32; /*!< Read Only */ +typedef const int16_t sc16; /*!< Read Only */ +typedef const int8_t sc8; /*!< Read Only */ + +typedef __IO int32_t vs32; +typedef __IO int16_t vs16; +typedef __IO int8_t vs8; + +typedef __I int32_t vsc32; /*!< Read Only */ +typedef __I int16_t vsc16; /*!< Read Only */ +typedef __I int8_t vsc8; /*!< Read Only */ + +typedef uint32_t u32; +typedef uint16_t u16; +typedef uint8_t u8; + +typedef const uint32_t uc32; /*!< Read Only */ +typedef const uint16_t uc16; /*!< Read Only */ +typedef const uint8_t uc8; /*!< Read Only */ + +typedef __IO uint32_t vu32; +typedef __IO uint16_t vu16; +typedef __IO uint8_t vu8; + +typedef __I uint32_t vuc32; /*!< Read Only */ +typedef __I uint16_t vuc16; /*!< Read Only */ +typedef __I uint8_t vuc8; /*!< Read Only */ + +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus; + +typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; +#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) + +typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; + +/*!< STM32F10x Standard Peripheral Library old definitions (maintained for legacy purpose) */ +#define HSEStartUp_TimeOut HSE_STARTUP_TIMEOUT +#define HSE_Value HSE_VALUE +#define HSI_Value HSI_VALUE +/** + * @} + */ + +/** @addtogroup Peripheral_registers_structures + * @{ + */ + +/** + * @brief Analog to Digital Converter + */ + +typedef struct +{ + __IO uint32_t SR; + __IO uint32_t CR1; + __IO uint32_t CR2; + __IO uint32_t SMPR1; + __IO uint32_t SMPR2; + __IO uint32_t JOFR1; + __IO uint32_t JOFR2; + __IO uint32_t JOFR3; + __IO uint32_t JOFR4; + __IO uint32_t HTR; + __IO uint32_t LTR; + __IO uint32_t SQR1; + __IO uint32_t SQR2; + __IO uint32_t SQR3; + __IO uint32_t JSQR; + __IO uint32_t JDR1; + __IO uint32_t JDR2; + __IO uint32_t JDR3; + __IO uint32_t JDR4; + __IO uint32_t DR; +} ADC_TypeDef; + +/** + * @brief Backup Registers + */ + +typedef struct +{ + uint32_t RESERVED0; + __IO uint16_t DR1; + uint16_t RESERVED1; + __IO uint16_t DR2; + uint16_t RESERVED2; + __IO uint16_t DR3; + uint16_t RESERVED3; + __IO uint16_t DR4; + uint16_t RESERVED4; + __IO uint16_t DR5; + uint16_t RESERVED5; + __IO uint16_t DR6; + uint16_t RESERVED6; + __IO uint16_t DR7; + uint16_t RESERVED7; + __IO uint16_t DR8; + uint16_t RESERVED8; + __IO uint16_t DR9; + uint16_t RESERVED9; + __IO uint16_t DR10; + uint16_t RESERVED10; + __IO uint16_t RTCCR; + uint16_t RESERVED11; + __IO uint16_t CR; + uint16_t RESERVED12; + __IO uint16_t CSR; + uint16_t RESERVED13[5]; + __IO uint16_t DR11; + uint16_t RESERVED14; + __IO uint16_t DR12; + uint16_t RESERVED15; + __IO uint16_t DR13; + uint16_t RESERVED16; + __IO uint16_t DR14; + uint16_t RESERVED17; + __IO uint16_t DR15; + uint16_t RESERVED18; + __IO uint16_t DR16; + uint16_t RESERVED19; + __IO uint16_t DR17; + uint16_t RESERVED20; + __IO uint16_t DR18; + uint16_t RESERVED21; + __IO uint16_t DR19; + uint16_t RESERVED22; + __IO uint16_t DR20; + uint16_t RESERVED23; + __IO uint16_t DR21; + uint16_t RESERVED24; + __IO uint16_t DR22; + uint16_t RESERVED25; + __IO uint16_t DR23; + uint16_t RESERVED26; + __IO uint16_t DR24; + uint16_t RESERVED27; + __IO uint16_t DR25; + uint16_t RESERVED28; + __IO uint16_t DR26; + uint16_t RESERVED29; + __IO uint16_t DR27; + uint16_t RESERVED30; + __IO uint16_t DR28; + uint16_t RESERVED31; + __IO uint16_t DR29; + uint16_t RESERVED32; + __IO uint16_t DR30; + uint16_t RESERVED33; + __IO uint16_t DR31; + uint16_t RESERVED34; + __IO uint16_t DR32; + uint16_t RESERVED35; + __IO uint16_t DR33; + uint16_t RESERVED36; + __IO uint16_t DR34; + uint16_t RESERVED37; + __IO uint16_t DR35; + uint16_t RESERVED38; + __IO uint16_t DR36; + uint16_t RESERVED39; + __IO uint16_t DR37; + uint16_t RESERVED40; + __IO uint16_t DR38; + uint16_t RESERVED41; + __IO uint16_t DR39; + uint16_t RESERVED42; + __IO uint16_t DR40; + uint16_t RESERVED43; + __IO uint16_t DR41; + uint16_t RESERVED44; + __IO uint16_t DR42; + uint16_t RESERVED45; +} BKP_TypeDef; + +/** + * @brief Controller Area Network TxMailBox + */ + +typedef struct +{ + __IO uint32_t TIR; + __IO uint32_t TDTR; + __IO uint32_t TDLR; + __IO uint32_t TDHR; +} CAN_TxMailBox_TypeDef; + +/** + * @brief Controller Area Network FIFOMailBox + */ + +typedef struct +{ + __IO uint32_t RIR; + __IO uint32_t RDTR; + __IO uint32_t RDLR; + __IO uint32_t RDHR; +} CAN_FIFOMailBox_TypeDef; + +/** + * @brief Controller Area Network FilterRegister + */ + +typedef struct +{ + __IO uint32_t FR1; + __IO uint32_t FR2; +} CAN_FilterRegister_TypeDef; + +/** + * @brief Controller Area Network + */ + +typedef struct +{ + __IO uint32_t MCR; + __IO uint32_t MSR; + __IO uint32_t TSR; + __IO uint32_t RF0R; + __IO uint32_t RF1R; + __IO uint32_t IER; + __IO uint32_t ESR; + __IO uint32_t BTR; + uint32_t RESERVED0[88]; + CAN_TxMailBox_TypeDef sTxMailBox[3]; + CAN_FIFOMailBox_TypeDef sFIFOMailBox[2]; + uint32_t RESERVED1[12]; + __IO uint32_t FMR; + __IO uint32_t FM1R; + uint32_t RESERVED2; + __IO uint32_t FS1R; + uint32_t RESERVED3; + __IO uint32_t FFA1R; + uint32_t RESERVED4; + __IO uint32_t FA1R; + uint32_t RESERVED5[8]; +#ifndef STM32F10X_CL + CAN_FilterRegister_TypeDef sFilterRegister[14]; +#else + CAN_FilterRegister_TypeDef sFilterRegister[28]; +#endif /* STM32F10X_CL */ +} CAN_TypeDef; + +/** + * @brief Consumer Electronics Control (CEC) + */ +typedef struct +{ + __IO uint32_t CFGR; + __IO uint32_t OAR; + __IO uint32_t PRES; + __IO uint32_t ESR; + __IO uint32_t CSR; + __IO uint32_t TXD; + __IO uint32_t RXD; +} CEC_TypeDef; + +/** + * @brief CRC calculation unit + */ + +typedef struct +{ + __IO uint32_t DR; + __IO uint8_t IDR; + uint8_t RESERVED0; + uint16_t RESERVED1; + __IO uint32_t CR; +} CRC_TypeDef; + +/** + * @brief Digital to Analog Converter + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t SWTRIGR; + __IO uint32_t DHR12R1; + __IO uint32_t DHR12L1; + __IO uint32_t DHR8R1; + __IO uint32_t DHR12R2; + __IO uint32_t DHR12L2; + __IO uint32_t DHR8R2; + __IO uint32_t DHR12RD; + __IO uint32_t DHR12LD; + __IO uint32_t DHR8RD; + __IO uint32_t DOR1; + __IO uint32_t DOR2; +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + __IO uint32_t SR; +#endif +} DAC_TypeDef; + +/** + * @brief Debug MCU + */ + +typedef struct +{ + __IO uint32_t IDCODE; + __IO uint32_t CR; +}DBGMCU_TypeDef; + +/** + * @brief DMA Controller + */ + +typedef struct +{ + __IO uint32_t CCR; + __IO uint32_t CNDTR; + __IO uint32_t CPAR; + __IO uint32_t CMAR; +} DMA_Channel_TypeDef; + +typedef struct +{ + __IO uint32_t ISR; + __IO uint32_t IFCR; +} DMA_TypeDef; + +/** + * @brief Ethernet MAC + */ + +typedef struct +{ + __IO uint32_t MACCR; + __IO uint32_t MACFFR; + __IO uint32_t MACHTHR; + __IO uint32_t MACHTLR; + __IO uint32_t MACMIIAR; + __IO uint32_t MACMIIDR; + __IO uint32_t MACFCR; + __IO uint32_t MACVLANTR; /* 8 */ + uint32_t RESERVED0[2]; + __IO uint32_t MACRWUFFR; /* 11 */ + __IO uint32_t MACPMTCSR; + uint32_t RESERVED1[2]; + __IO uint32_t MACSR; /* 15 */ + __IO uint32_t MACIMR; + __IO uint32_t MACA0HR; + __IO uint32_t MACA0LR; + __IO uint32_t MACA1HR; + __IO uint32_t MACA1LR; + __IO uint32_t MACA2HR; + __IO uint32_t MACA2LR; + __IO uint32_t MACA3HR; + __IO uint32_t MACA3LR; /* 24 */ + uint32_t RESERVED2[40]; + __IO uint32_t MMCCR; /* 65 */ + __IO uint32_t MMCRIR; + __IO uint32_t MMCTIR; + __IO uint32_t MMCRIMR; + __IO uint32_t MMCTIMR; /* 69 */ + uint32_t RESERVED3[14]; + __IO uint32_t MMCTGFSCCR; /* 84 */ + __IO uint32_t MMCTGFMSCCR; + uint32_t RESERVED4[5]; + __IO uint32_t MMCTGFCR; + uint32_t RESERVED5[10]; + __IO uint32_t MMCRFCECR; + __IO uint32_t MMCRFAECR; + uint32_t RESERVED6[10]; + __IO uint32_t MMCRGUFCR; + uint32_t RESERVED7[334]; + __IO uint32_t PTPTSCR; + __IO uint32_t PTPSSIR; + __IO uint32_t PTPTSHR; + __IO uint32_t PTPTSLR; + __IO uint32_t PTPTSHUR; + __IO uint32_t PTPTSLUR; + __IO uint32_t PTPTSAR; + __IO uint32_t PTPTTHR; + __IO uint32_t PTPTTLR; + uint32_t RESERVED8[567]; + __IO uint32_t DMABMR; + __IO uint32_t DMATPDR; + __IO uint32_t DMARPDR; + __IO uint32_t DMARDLAR; + __IO uint32_t DMATDLAR; + __IO uint32_t DMASR; + __IO uint32_t DMAOMR; + __IO uint32_t DMAIER; + __IO uint32_t DMAMFBOCR; + uint32_t RESERVED9[9]; + __IO uint32_t DMACHTDR; + __IO uint32_t DMACHRDR; + __IO uint32_t DMACHTBAR; + __IO uint32_t DMACHRBAR; +} ETH_TypeDef; + +/** + * @brief External Interrupt/Event Controller + */ + +typedef struct +{ + __IO uint32_t IMR; + __IO uint32_t EMR; + __IO uint32_t RTSR; + __IO uint32_t FTSR; + __IO uint32_t SWIER; + __IO uint32_t PR; +} EXTI_TypeDef; + +/** + * @brief FLASH Registers + */ + +typedef struct +{ + __IO uint32_t ACR; + __IO uint32_t KEYR; + __IO uint32_t OPTKEYR; + __IO uint32_t SR; + __IO uint32_t CR; + __IO uint32_t AR; + __IO uint32_t RESERVED; + __IO uint32_t OBR; + __IO uint32_t WRPR; +#ifdef STM32F10X_XL + uint32_t RESERVED1[8]; + __IO uint32_t KEYR2; + uint32_t RESERVED2; + __IO uint32_t SR2; + __IO uint32_t CR2; + __IO uint32_t AR2; +#endif /* STM32F10X_XL */ +} FLASH_TypeDef; + +/** + * @brief Option Bytes Registers + */ + +typedef struct +{ + __IO uint16_t RDP; + __IO uint16_t USER; + __IO uint16_t Data0; + __IO uint16_t Data1; + __IO uint16_t WRP0; + __IO uint16_t WRP1; + __IO uint16_t WRP2; + __IO uint16_t WRP3; +} OB_TypeDef; + +/** + * @brief Flexible Static Memory Controller + */ + +typedef struct +{ + __IO uint32_t BTCR[8]; +} FSMC_Bank1_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank1E + */ + +typedef struct +{ + __IO uint32_t BWTR[7]; +} FSMC_Bank1E_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank2 + */ + +typedef struct +{ + __IO uint32_t PCR2; + __IO uint32_t SR2; + __IO uint32_t PMEM2; + __IO uint32_t PATT2; + uint32_t RESERVED0; + __IO uint32_t ECCR2; +} FSMC_Bank2_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank3 + */ + +typedef struct +{ + __IO uint32_t PCR3; + __IO uint32_t SR3; + __IO uint32_t PMEM3; + __IO uint32_t PATT3; + uint32_t RESERVED0; + __IO uint32_t ECCR3; +} FSMC_Bank3_TypeDef; + +/** + * @brief Flexible Static Memory Controller Bank4 + */ + +typedef struct +{ + __IO uint32_t PCR4; + __IO uint32_t SR4; + __IO uint32_t PMEM4; + __IO uint32_t PATT4; + __IO uint32_t PIO4; +} FSMC_Bank4_TypeDef; + +/** + * @brief General Purpose I/O + */ + +typedef struct +{ + __IO uint32_t CRL; + __IO uint32_t CRH; + __IO uint32_t IDR; + __IO uint32_t ODR; + __IO uint32_t BSRR; + __IO uint32_t BRR; + __IO uint32_t LCKR; +} GPIO_TypeDef; + +/** + * @brief Alternate Function I/O + */ + +typedef struct +{ + __IO uint32_t EVCR; + __IO uint32_t MAPR; + __IO uint32_t EXTICR[4]; + uint32_t RESERVED0; + __IO uint32_t MAPR2; +} AFIO_TypeDef; +/** + * @brief Inter Integrated Circuit Interface + */ + +typedef struct +{ + __IO uint16_t CR1; + uint16_t RESERVED0; + __IO uint16_t CR2; + uint16_t RESERVED1; + __IO uint16_t OAR1; + uint16_t RESERVED2; + __IO uint16_t OAR2; + uint16_t RESERVED3; + __IO uint16_t DR; + uint16_t RESERVED4; + __IO uint16_t SR1; + uint16_t RESERVED5; + __IO uint16_t SR2; + uint16_t RESERVED6; + __IO uint16_t CCR; + uint16_t RESERVED7; + __IO uint16_t TRISE; + uint16_t RESERVED8; +} I2C_TypeDef; + +/** + * @brief Independent WATCHDOG + */ + +typedef struct +{ + __IO uint32_t KR; + __IO uint32_t PR; + __IO uint32_t RLR; + __IO uint32_t SR; +} IWDG_TypeDef; + +/** + * @brief Power Control + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t CSR; +} PWR_TypeDef; + +/** + * @brief Reset and Clock Control + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t CFGR; + __IO uint32_t CIR; + __IO uint32_t APB2RSTR; + __IO uint32_t APB1RSTR; + __IO uint32_t AHBENR; + __IO uint32_t APB2ENR; + __IO uint32_t APB1ENR; + __IO uint32_t BDCR; + __IO uint32_t CSR; + +#ifdef STM32F10X_CL + __IO uint32_t AHBRSTR; + __IO uint32_t CFGR2; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + uint32_t RESERVED0; + __IO uint32_t CFGR2; +#endif /* STM32F10X_LD_VL || STM32F10X_MD_VL || STM32F10X_HD_VL */ +} RCC_TypeDef; + +/** + * @brief Real-Time Clock + */ + +typedef struct +{ + __IO uint16_t CRH; + uint16_t RESERVED0; + __IO uint16_t CRL; + uint16_t RESERVED1; + __IO uint16_t PRLH; + uint16_t RESERVED2; + __IO uint16_t PRLL; + uint16_t RESERVED3; + __IO uint16_t DIVH; + uint16_t RESERVED4; + __IO uint16_t DIVL; + uint16_t RESERVED5; + __IO uint16_t CNTH; + uint16_t RESERVED6; + __IO uint16_t CNTL; + uint16_t RESERVED7; + __IO uint16_t ALRH; + uint16_t RESERVED8; + __IO uint16_t ALRL; + uint16_t RESERVED9; +} RTC_TypeDef; + +/** + * @brief SD host Interface + */ + +typedef struct +{ + __IO uint32_t POWER; + __IO uint32_t CLKCR; + __IO uint32_t ARG; + __IO uint32_t CMD; + __I uint32_t RESPCMD; + __I uint32_t RESP1; + __I uint32_t RESP2; + __I uint32_t RESP3; + __I uint32_t RESP4; + __IO uint32_t DTIMER; + __IO uint32_t DLEN; + __IO uint32_t DCTRL; + __I uint32_t DCOUNT; + __I uint32_t STA; + __IO uint32_t ICR; + __IO uint32_t MASK; + uint32_t RESERVED0[2]; + __I uint32_t FIFOCNT; + uint32_t RESERVED1[13]; + __IO uint32_t FIFO; +} SDIO_TypeDef; + +/** + * @brief Serial Peripheral Interface + */ + +typedef struct +{ + __IO uint16_t CR1; + uint16_t RESERVED0; + __IO uint16_t CR2; + uint16_t RESERVED1; + __IO uint16_t SR; + uint16_t RESERVED2; + __IO uint16_t DR; + uint16_t RESERVED3; + __IO uint16_t CRCPR; + uint16_t RESERVED4; + __IO uint16_t RXCRCR; + uint16_t RESERVED5; + __IO uint16_t TXCRCR; + uint16_t RESERVED6; + __IO uint16_t I2SCFGR; + uint16_t RESERVED7; + __IO uint16_t I2SPR; + uint16_t RESERVED8; +} SPI_TypeDef; + +/** + * @brief TIM + */ + +typedef struct +{ + __IO uint16_t CR1; + uint16_t RESERVED0; + __IO uint16_t CR2; + uint16_t RESERVED1; + __IO uint16_t SMCR; + uint16_t RESERVED2; + __IO uint16_t DIER; + uint16_t RESERVED3; + __IO uint16_t SR; + uint16_t RESERVED4; + __IO uint16_t EGR; + uint16_t RESERVED5; + __IO uint16_t CCMR1; + uint16_t RESERVED6; + __IO uint16_t CCMR2; + uint16_t RESERVED7; + __IO uint16_t CCER; + uint16_t RESERVED8; + __IO uint16_t CNT; + uint16_t RESERVED9; + __IO uint16_t PSC; + uint16_t RESERVED10; + __IO uint16_t ARR; + uint16_t RESERVED11; + __IO uint16_t RCR; + uint16_t RESERVED12; + __IO uint16_t CCR1; + uint16_t RESERVED13; + __IO uint16_t CCR2; + uint16_t RESERVED14; + __IO uint16_t CCR3; + uint16_t RESERVED15; + __IO uint16_t CCR4; + uint16_t RESERVED16; + __IO uint16_t BDTR; + uint16_t RESERVED17; + __IO uint16_t DCR; + uint16_t RESERVED18; + __IO uint16_t DMAR; + uint16_t RESERVED19; +} TIM_TypeDef; + +/** + * @brief Universal Synchronous Asynchronous Receiver Transmitter + */ + +typedef struct +{ + __IO uint16_t SR; + uint16_t RESERVED0; + __IO uint16_t DR; + uint16_t RESERVED1; + __IO uint16_t BRR; + uint16_t RESERVED2; + __IO uint16_t CR1; + uint16_t RESERVED3; + __IO uint16_t CR2; + uint16_t RESERVED4; + __IO uint16_t CR3; + uint16_t RESERVED5; + __IO uint16_t GTPR; + uint16_t RESERVED6; +} USART_TypeDef; + +/** + * @brief Window WATCHDOG + */ + +typedef struct +{ + __IO uint32_t CR; + __IO uint32_t CFR; + __IO uint32_t SR; +} WWDG_TypeDef; + +/** + * @} + */ + +/** @addtogroup Peripheral_memory_map + * @{ + */ + + +#define FLASH_BASE ((uint32_t)0x08000000) /*!< FLASH base address in the alias region */ +#define SRAM_BASE ((uint32_t)0x20000000) /*!< SRAM base address in the alias region */ +#define PERIPH_BASE ((uint32_t)0x40000000) /*!< Peripheral base address in the alias region */ + +#define SRAM_BB_BASE ((uint32_t)0x22000000) /*!< SRAM base address in the bit-band region */ +#define PERIPH_BB_BASE ((uint32_t)0x42000000) /*!< Peripheral base address in the bit-band region */ + +#define FSMC_R_BASE ((uint32_t)0xA0000000) /*!< FSMC registers base address */ + +/*!< Peripheral memory map */ +#define APB1PERIPH_BASE PERIPH_BASE +#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) +#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) + +#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) +#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) +#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) +#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) +#define TIM6_BASE (APB1PERIPH_BASE + 0x1000) +#define TIM7_BASE (APB1PERIPH_BASE + 0x1400) +#define TIM12_BASE (APB1PERIPH_BASE + 0x1800) +#define TIM13_BASE (APB1PERIPH_BASE + 0x1C00) +#define TIM14_BASE (APB1PERIPH_BASE + 0x2000) +#define RTC_BASE (APB1PERIPH_BASE + 0x2800) +#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) +#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) +#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) +#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) +#define USART2_BASE (APB1PERIPH_BASE + 0x4400) +#define USART3_BASE (APB1PERIPH_BASE + 0x4800) +#define UART4_BASE (APB1PERIPH_BASE + 0x4C00) +#define UART5_BASE (APB1PERIPH_BASE + 0x5000) +#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) +#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) +#define CAN1_BASE (APB1PERIPH_BASE + 0x6400) +#define CAN2_BASE (APB1PERIPH_BASE + 0x6800) +#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) +#define PWR_BASE (APB1PERIPH_BASE + 0x7000) +#define DAC_BASE (APB1PERIPH_BASE + 0x7400) +#define CEC_BASE (APB1PERIPH_BASE + 0x7800) + +#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) +#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) +#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) +#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) +#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) +#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) +#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) +#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00) +#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000) +#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) +#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) +#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) +#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) +#define TIM8_BASE (APB2PERIPH_BASE + 0x3400) +#define USART1_BASE (APB2PERIPH_BASE + 0x3800) +#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00) +#define TIM15_BASE (APB2PERIPH_BASE + 0x4000) +#define TIM16_BASE (APB2PERIPH_BASE + 0x4400) +#define TIM17_BASE (APB2PERIPH_BASE + 0x4800) +#define TIM9_BASE (APB2PERIPH_BASE + 0x4C00) +#define TIM10_BASE (APB2PERIPH_BASE + 0x5000) +#define TIM11_BASE (APB2PERIPH_BASE + 0x5400) + +#define SDIO_BASE (PERIPH_BASE + 0x18000) + +#define DMA1_BASE (AHBPERIPH_BASE + 0x0000) +#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008) +#define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x001C) +#define DMA1_Channel3_BASE (AHBPERIPH_BASE + 0x0030) +#define DMA1_Channel4_BASE (AHBPERIPH_BASE + 0x0044) +#define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x0058) +#define DMA1_Channel6_BASE (AHBPERIPH_BASE + 0x006C) +#define DMA1_Channel7_BASE (AHBPERIPH_BASE + 0x0080) +#define DMA2_BASE (AHBPERIPH_BASE + 0x0400) +#define DMA2_Channel1_BASE (AHBPERIPH_BASE + 0x0408) +#define DMA2_Channel2_BASE (AHBPERIPH_BASE + 0x041C) +#define DMA2_Channel3_BASE (AHBPERIPH_BASE + 0x0430) +#define DMA2_Channel4_BASE (AHBPERIPH_BASE + 0x0444) +#define DMA2_Channel5_BASE (AHBPERIPH_BASE + 0x0458) +#define RCC_BASE (AHBPERIPH_BASE + 0x1000) +#define CRC_BASE (AHBPERIPH_BASE + 0x3000) + +#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) /*!< Flash registers base address */ +#define OB_BASE ((uint32_t)0x1FFFF800) /*!< Flash Option Bytes base address */ + +#define ETH_BASE (AHBPERIPH_BASE + 0x8000) +#define ETH_MAC_BASE (ETH_BASE) +#define ETH_MMC_BASE (ETH_BASE + 0x0100) +#define ETH_PTP_BASE (ETH_BASE + 0x0700) +#define ETH_DMA_BASE (ETH_BASE + 0x1000) + +#define FSMC_Bank1_R_BASE (FSMC_R_BASE + 0x0000) /*!< FSMC Bank1 registers base address */ +#define FSMC_Bank1E_R_BASE (FSMC_R_BASE + 0x0104) /*!< FSMC Bank1E registers base address */ +#define FSMC_Bank2_R_BASE (FSMC_R_BASE + 0x0060) /*!< FSMC Bank2 registers base address */ +#define FSMC_Bank3_R_BASE (FSMC_R_BASE + 0x0080) /*!< FSMC Bank3 registers base address */ +#define FSMC_Bank4_R_BASE (FSMC_R_BASE + 0x00A0) /*!< FSMC Bank4 registers base address */ + +#define DBGMCU_BASE ((uint32_t)0xE0042000) /*!< Debug MCU registers base address */ + +/** + * @} + */ + +/** @addtogroup Peripheral_declaration + * @{ + */ + +#define TIM2 ((TIM_TypeDef *) TIM2_BASE) +#define TIM3 ((TIM_TypeDef *) TIM3_BASE) +#define TIM4 ((TIM_TypeDef *) TIM4_BASE) +#define TIM5 ((TIM_TypeDef *) TIM5_BASE) +#define TIM6 ((TIM_TypeDef *) TIM6_BASE) +#define TIM7 ((TIM_TypeDef *) TIM7_BASE) +#define TIM12 ((TIM_TypeDef *) TIM12_BASE) +#define TIM13 ((TIM_TypeDef *) TIM13_BASE) +#define TIM14 ((TIM_TypeDef *) TIM14_BASE) +#define RTC ((RTC_TypeDef *) RTC_BASE) +#define WWDG ((WWDG_TypeDef *) WWDG_BASE) +#define IWDG ((IWDG_TypeDef *) IWDG_BASE) +#define SPI2 ((SPI_TypeDef *) SPI2_BASE) +#define SPI3 ((SPI_TypeDef *) SPI3_BASE) +#define USART2 ((USART_TypeDef *) USART2_BASE) +#define USART3 ((USART_TypeDef *) USART3_BASE) +#define UART4 ((USART_TypeDef *) UART4_BASE) +#define UART5 ((USART_TypeDef *) UART5_BASE) +#define I2C1 ((I2C_TypeDef *) I2C1_BASE) +#define I2C2 ((I2C_TypeDef *) I2C2_BASE) +#define CAN1 ((CAN_TypeDef *) CAN1_BASE) +#define CAN2 ((CAN_TypeDef *) CAN2_BASE) +#define BKP ((BKP_TypeDef *) BKP_BASE) +#define PWR ((PWR_TypeDef *) PWR_BASE) +#define DAC ((DAC_TypeDef *) DAC_BASE) +#define CEC ((CEC_TypeDef *) CEC_BASE) +#define AFIO ((AFIO_TypeDef *) AFIO_BASE) +#define EXTI ((EXTI_TypeDef *) EXTI_BASE) +#define GPIOA ((GPIO_TypeDef *) GPIOA_BASE) +#define GPIOB ((GPIO_TypeDef *) GPIOB_BASE) +#define GPIOC ((GPIO_TypeDef *) GPIOC_BASE) +#define GPIOD ((GPIO_TypeDef *) GPIOD_BASE) +#define GPIOE ((GPIO_TypeDef *) GPIOE_BASE) +#define GPIOF ((GPIO_TypeDef *) GPIOF_BASE) +#define GPIOG ((GPIO_TypeDef *) GPIOG_BASE) +#define ADC1 ((ADC_TypeDef *) ADC1_BASE) +#define ADC2 ((ADC_TypeDef *) ADC2_BASE) +#define TIM1 ((TIM_TypeDef *) TIM1_BASE) +#define SPI1 ((SPI_TypeDef *) SPI1_BASE) +#define TIM8 ((TIM_TypeDef *) TIM8_BASE) +#define USART1 ((USART_TypeDef *) USART1_BASE) +#define ADC3 ((ADC_TypeDef *) ADC3_BASE) +#define TIM15 ((TIM_TypeDef *) TIM15_BASE) +#define TIM16 ((TIM_TypeDef *) TIM16_BASE) +#define TIM17 ((TIM_TypeDef *) TIM17_BASE) +#define TIM9 ((TIM_TypeDef *) TIM9_BASE) +#define TIM10 ((TIM_TypeDef *) TIM10_BASE) +#define TIM11 ((TIM_TypeDef *) TIM11_BASE) +#define SDIO ((SDIO_TypeDef *) SDIO_BASE) +#define DMA1 ((DMA_TypeDef *) DMA1_BASE) +#define DMA2 ((DMA_TypeDef *) DMA2_BASE) +#define DMA1_Channel1 ((DMA_Channel_TypeDef *) DMA1_Channel1_BASE) +#define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE) +#define DMA1_Channel3 ((DMA_Channel_TypeDef *) DMA1_Channel3_BASE) +#define DMA1_Channel4 ((DMA_Channel_TypeDef *) DMA1_Channel4_BASE) +#define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE) +#define DMA1_Channel6 ((DMA_Channel_TypeDef *) DMA1_Channel6_BASE) +#define DMA1_Channel7 ((DMA_Channel_TypeDef *) DMA1_Channel7_BASE) +#define DMA2_Channel1 ((DMA_Channel_TypeDef *) DMA2_Channel1_BASE) +#define DMA2_Channel2 ((DMA_Channel_TypeDef *) DMA2_Channel2_BASE) +#define DMA2_Channel3 ((DMA_Channel_TypeDef *) DMA2_Channel3_BASE) +#define DMA2_Channel4 ((DMA_Channel_TypeDef *) DMA2_Channel4_BASE) +#define DMA2_Channel5 ((DMA_Channel_TypeDef *) DMA2_Channel5_BASE) +#define RCC ((RCC_TypeDef *) RCC_BASE) +#define CRC ((CRC_TypeDef *) CRC_BASE) +#define FLASH ((FLASH_TypeDef *) FLASH_R_BASE) +#define OB ((OB_TypeDef *) OB_BASE) +#define ETH ((ETH_TypeDef *) ETH_BASE) +#define FSMC_Bank1 ((FSMC_Bank1_TypeDef *) FSMC_Bank1_R_BASE) +#define FSMC_Bank1E ((FSMC_Bank1E_TypeDef *) FSMC_Bank1E_R_BASE) +#define FSMC_Bank2 ((FSMC_Bank2_TypeDef *) FSMC_Bank2_R_BASE) +#define FSMC_Bank3 ((FSMC_Bank3_TypeDef *) FSMC_Bank3_R_BASE) +#define FSMC_Bank4 ((FSMC_Bank4_TypeDef *) FSMC_Bank4_R_BASE) +#define DBGMCU ((DBGMCU_TypeDef *) DBGMCU_BASE) + +/** + * @} + */ + +/** @addtogroup Exported_constants + * @{ + */ + + /** @addtogroup Peripheral_Registers_Bits_Definition + * @{ + */ + +/******************************************************************************/ +/* Peripheral Registers_Bits_Definition */ +/******************************************************************************/ + +/******************************************************************************/ +/* */ +/* CRC calculation unit */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for CRC_DR register *********************/ +#define CRC_DR_DR ((uint32_t)0xFFFFFFFF) /*!< Data register bits */ + + +/******************* Bit definition for CRC_IDR register ********************/ +#define CRC_IDR_IDR ((uint8_t)0xFF) /*!< General-purpose 8-bit data register bits */ + + +/******************** Bit definition for CRC_CR register ********************/ +#define CRC_CR_RESET ((uint8_t)0x01) /*!< RESET bit */ + +/******************************************************************************/ +/* */ +/* Power Control */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for PWR_CR register ********************/ +#define PWR_CR_LPDS ((uint16_t)0x0001) /*!< Low-Power Deepsleep */ +#define PWR_CR_PDDS ((uint16_t)0x0002) /*!< Power Down Deepsleep */ +#define PWR_CR_CWUF ((uint16_t)0x0004) /*!< Clear Wakeup Flag */ +#define PWR_CR_CSBF ((uint16_t)0x0008) /*!< Clear Standby Flag */ +#define PWR_CR_PVDE ((uint16_t)0x0010) /*!< Power Voltage Detector Enable */ + +#define PWR_CR_PLS ((uint16_t)0x00E0) /*!< PLS[2:0] bits (PVD Level Selection) */ +#define PWR_CR_PLS_0 ((uint16_t)0x0020) /*!< Bit 0 */ +#define PWR_CR_PLS_1 ((uint16_t)0x0040) /*!< Bit 1 */ +#define PWR_CR_PLS_2 ((uint16_t)0x0080) /*!< Bit 2 */ + +/*!< PVD level configuration */ +#define PWR_CR_PLS_2V2 ((uint16_t)0x0000) /*!< PVD level 2.2V */ +#define PWR_CR_PLS_2V3 ((uint16_t)0x0020) /*!< PVD level 2.3V */ +#define PWR_CR_PLS_2V4 ((uint16_t)0x0040) /*!< PVD level 2.4V */ +#define PWR_CR_PLS_2V5 ((uint16_t)0x0060) /*!< PVD level 2.5V */ +#define PWR_CR_PLS_2V6 ((uint16_t)0x0080) /*!< PVD level 2.6V */ +#define PWR_CR_PLS_2V7 ((uint16_t)0x00A0) /*!< PVD level 2.7V */ +#define PWR_CR_PLS_2V8 ((uint16_t)0x00C0) /*!< PVD level 2.8V */ +#define PWR_CR_PLS_2V9 ((uint16_t)0x00E0) /*!< PVD level 2.9V */ + +#define PWR_CR_DBP ((uint16_t)0x0100) /*!< Disable Backup Domain write protection */ + + +/******************* Bit definition for PWR_CSR register ********************/ +#define PWR_CSR_WUF ((uint16_t)0x0001) /*!< Wakeup Flag */ +#define PWR_CSR_SBF ((uint16_t)0x0002) /*!< Standby Flag */ +#define PWR_CSR_PVDO ((uint16_t)0x0004) /*!< PVD Output */ +#define PWR_CSR_EWUP ((uint16_t)0x0100) /*!< Enable WKUP pin */ + +/******************************************************************************/ +/* */ +/* Backup registers */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for BKP_DR1 register ********************/ +#define BKP_DR1_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR2 register ********************/ +#define BKP_DR2_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR3 register ********************/ +#define BKP_DR3_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR4 register ********************/ +#define BKP_DR4_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR5 register ********************/ +#define BKP_DR5_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR6 register ********************/ +#define BKP_DR6_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR7 register ********************/ +#define BKP_DR7_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR8 register ********************/ +#define BKP_DR8_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR9 register ********************/ +#define BKP_DR9_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR10 register *******************/ +#define BKP_DR10_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR11 register *******************/ +#define BKP_DR11_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR12 register *******************/ +#define BKP_DR12_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR13 register *******************/ +#define BKP_DR13_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR14 register *******************/ +#define BKP_DR14_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR15 register *******************/ +#define BKP_DR15_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR16 register *******************/ +#define BKP_DR16_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR17 register *******************/ +#define BKP_DR17_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/****************** Bit definition for BKP_DR18 register ********************/ +#define BKP_DR18_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR19 register *******************/ +#define BKP_DR19_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR20 register *******************/ +#define BKP_DR20_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR21 register *******************/ +#define BKP_DR21_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR22 register *******************/ +#define BKP_DR22_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR23 register *******************/ +#define BKP_DR23_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR24 register *******************/ +#define BKP_DR24_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR25 register *******************/ +#define BKP_DR25_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR26 register *******************/ +#define BKP_DR26_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR27 register *******************/ +#define BKP_DR27_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR28 register *******************/ +#define BKP_DR28_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR29 register *******************/ +#define BKP_DR29_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR30 register *******************/ +#define BKP_DR30_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR31 register *******************/ +#define BKP_DR31_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR32 register *******************/ +#define BKP_DR32_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR33 register *******************/ +#define BKP_DR33_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR34 register *******************/ +#define BKP_DR34_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR35 register *******************/ +#define BKP_DR35_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR36 register *******************/ +#define BKP_DR36_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR37 register *******************/ +#define BKP_DR37_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR38 register *******************/ +#define BKP_DR38_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR39 register *******************/ +#define BKP_DR39_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR40 register *******************/ +#define BKP_DR40_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR41 register *******************/ +#define BKP_DR41_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/******************* Bit definition for BKP_DR42 register *******************/ +#define BKP_DR42_D ((uint16_t)0xFFFF) /*!< Backup data */ + +/****************** Bit definition for BKP_RTCCR register *******************/ +#define BKP_RTCCR_CAL ((uint16_t)0x007F) /*!< Calibration value */ +#define BKP_RTCCR_CCO ((uint16_t)0x0080) /*!< Calibration Clock Output */ +#define BKP_RTCCR_ASOE ((uint16_t)0x0100) /*!< Alarm or Second Output Enable */ +#define BKP_RTCCR_ASOS ((uint16_t)0x0200) /*!< Alarm or Second Output Selection */ + +/******************** Bit definition for BKP_CR register ********************/ +#define BKP_CR_TPE ((uint8_t)0x01) /*!< TAMPER pin enable */ +#define BKP_CR_TPAL ((uint8_t)0x02) /*!< TAMPER pin active level */ + +/******************* Bit definition for BKP_CSR register ********************/ +#define BKP_CSR_CTE ((uint16_t)0x0001) /*!< Clear Tamper event */ +#define BKP_CSR_CTI ((uint16_t)0x0002) /*!< Clear Tamper Interrupt */ +#define BKP_CSR_TPIE ((uint16_t)0x0004) /*!< TAMPER Pin interrupt enable */ +#define BKP_CSR_TEF ((uint16_t)0x0100) /*!< Tamper Event Flag */ +#define BKP_CSR_TIF ((uint16_t)0x0200) /*!< Tamper Interrupt Flag */ + +/******************************************************************************/ +/* */ +/* Reset and Clock Control */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for RCC_CR register ********************/ +#define RCC_CR_HSION ((uint32_t)0x00000001) /*!< Internal High Speed clock enable */ +#define RCC_CR_HSIRDY ((uint32_t)0x00000002) /*!< Internal High Speed clock ready flag */ +#define RCC_CR_HSITRIM ((uint32_t)0x000000F8) /*!< Internal High Speed clock trimming */ +#define RCC_CR_HSICAL ((uint32_t)0x0000FF00) /*!< Internal High Speed clock Calibration */ +#define RCC_CR_HSEON ((uint32_t)0x00010000) /*!< External High Speed clock enable */ +#define RCC_CR_HSERDY ((uint32_t)0x00020000) /*!< External High Speed clock ready flag */ +#define RCC_CR_HSEBYP ((uint32_t)0x00040000) /*!< External High Speed clock Bypass */ +#define RCC_CR_CSSON ((uint32_t)0x00080000) /*!< Clock Security System enable */ +#define RCC_CR_PLLON ((uint32_t)0x01000000) /*!< PLL enable */ +#define RCC_CR_PLLRDY ((uint32_t)0x02000000) /*!< PLL clock ready flag */ + +#ifdef STM32F10X_CL + #define RCC_CR_PLL2ON ((uint32_t)0x04000000) /*!< PLL2 enable */ + #define RCC_CR_PLL2RDY ((uint32_t)0x08000000) /*!< PLL2 clock ready flag */ + #define RCC_CR_PLL3ON ((uint32_t)0x10000000) /*!< PLL3 enable */ + #define RCC_CR_PLL3RDY ((uint32_t)0x20000000) /*!< PLL3 clock ready flag */ +#endif /* STM32F10X_CL */ + +/******************* Bit definition for RCC_CFGR register *******************/ +/*!< SW configuration */ +#define RCC_CFGR_SW ((uint32_t)0x00000003) /*!< SW[1:0] bits (System clock Switch) */ +#define RCC_CFGR_SW_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define RCC_CFGR_SW_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + +#define RCC_CFGR_SW_HSI ((uint32_t)0x00000000) /*!< HSI selected as system clock */ +#define RCC_CFGR_SW_HSE ((uint32_t)0x00000001) /*!< HSE selected as system clock */ +#define RCC_CFGR_SW_PLL ((uint32_t)0x00000002) /*!< PLL selected as system clock */ + +/*!< SWS configuration */ +#define RCC_CFGR_SWS ((uint32_t)0x0000000C) /*!< SWS[1:0] bits (System Clock Switch Status) */ +#define RCC_CFGR_SWS_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define RCC_CFGR_SWS_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define RCC_CFGR_SWS_HSI ((uint32_t)0x00000000) /*!< HSI oscillator used as system clock */ +#define RCC_CFGR_SWS_HSE ((uint32_t)0x00000004) /*!< HSE oscillator used as system clock */ +#define RCC_CFGR_SWS_PLL ((uint32_t)0x00000008) /*!< PLL used as system clock */ + +/*!< HPRE configuration */ +#define RCC_CFGR_HPRE ((uint32_t)0x000000F0) /*!< HPRE[3:0] bits (AHB prescaler) */ +#define RCC_CFGR_HPRE_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define RCC_CFGR_HPRE_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define RCC_CFGR_HPRE_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define RCC_CFGR_HPRE_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define RCC_CFGR_HPRE_DIV1 ((uint32_t)0x00000000) /*!< SYSCLK not divided */ +#define RCC_CFGR_HPRE_DIV2 ((uint32_t)0x00000080) /*!< SYSCLK divided by 2 */ +#define RCC_CFGR_HPRE_DIV4 ((uint32_t)0x00000090) /*!< SYSCLK divided by 4 */ +#define RCC_CFGR_HPRE_DIV8 ((uint32_t)0x000000A0) /*!< SYSCLK divided by 8 */ +#define RCC_CFGR_HPRE_DIV16 ((uint32_t)0x000000B0) /*!< SYSCLK divided by 16 */ +#define RCC_CFGR_HPRE_DIV64 ((uint32_t)0x000000C0) /*!< SYSCLK divided by 64 */ +#define RCC_CFGR_HPRE_DIV128 ((uint32_t)0x000000D0) /*!< SYSCLK divided by 128 */ +#define RCC_CFGR_HPRE_DIV256 ((uint32_t)0x000000E0) /*!< SYSCLK divided by 256 */ +#define RCC_CFGR_HPRE_DIV512 ((uint32_t)0x000000F0) /*!< SYSCLK divided by 512 */ + +/*!< PPRE1 configuration */ +#define RCC_CFGR_PPRE1 ((uint32_t)0x00000700) /*!< PRE1[2:0] bits (APB1 prescaler) */ +#define RCC_CFGR_PPRE1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define RCC_CFGR_PPRE1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define RCC_CFGR_PPRE1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ + +#define RCC_CFGR_PPRE1_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ +#define RCC_CFGR_PPRE1_DIV2 ((uint32_t)0x00000400) /*!< HCLK divided by 2 */ +#define RCC_CFGR_PPRE1_DIV4 ((uint32_t)0x00000500) /*!< HCLK divided by 4 */ +#define RCC_CFGR_PPRE1_DIV8 ((uint32_t)0x00000600) /*!< HCLK divided by 8 */ +#define RCC_CFGR_PPRE1_DIV16 ((uint32_t)0x00000700) /*!< HCLK divided by 16 */ + +/*!< PPRE2 configuration */ +#define RCC_CFGR_PPRE2 ((uint32_t)0x00003800) /*!< PRE2[2:0] bits (APB2 prescaler) */ +#define RCC_CFGR_PPRE2_0 ((uint32_t)0x00000800) /*!< Bit 0 */ +#define RCC_CFGR_PPRE2_1 ((uint32_t)0x00001000) /*!< Bit 1 */ +#define RCC_CFGR_PPRE2_2 ((uint32_t)0x00002000) /*!< Bit 2 */ + +#define RCC_CFGR_PPRE2_DIV1 ((uint32_t)0x00000000) /*!< HCLK not divided */ +#define RCC_CFGR_PPRE2_DIV2 ((uint32_t)0x00002000) /*!< HCLK divided by 2 */ +#define RCC_CFGR_PPRE2_DIV4 ((uint32_t)0x00002800) /*!< HCLK divided by 4 */ +#define RCC_CFGR_PPRE2_DIV8 ((uint32_t)0x00003000) /*!< HCLK divided by 8 */ +#define RCC_CFGR_PPRE2_DIV16 ((uint32_t)0x00003800) /*!< HCLK divided by 16 */ + +/*!< ADCPPRE configuration */ +#define RCC_CFGR_ADCPRE ((uint32_t)0x0000C000) /*!< ADCPRE[1:0] bits (ADC prescaler) */ +#define RCC_CFGR_ADCPRE_0 ((uint32_t)0x00004000) /*!< Bit 0 */ +#define RCC_CFGR_ADCPRE_1 ((uint32_t)0x00008000) /*!< Bit 1 */ + +#define RCC_CFGR_ADCPRE_DIV2 ((uint32_t)0x00000000) /*!< PCLK2 divided by 2 */ +#define RCC_CFGR_ADCPRE_DIV4 ((uint32_t)0x00004000) /*!< PCLK2 divided by 4 */ +#define RCC_CFGR_ADCPRE_DIV6 ((uint32_t)0x00008000) /*!< PCLK2 divided by 6 */ +#define RCC_CFGR_ADCPRE_DIV8 ((uint32_t)0x0000C000) /*!< PCLK2 divided by 8 */ + +#define RCC_CFGR_PLLSRC ((uint32_t)0x00010000) /*!< PLL entry clock source */ + +#define RCC_CFGR_PLLXTPRE ((uint32_t)0x00020000) /*!< HSE divider for PLL entry */ + +/*!< PLLMUL configuration */ +#define RCC_CFGR_PLLMULL ((uint32_t)0x003C0000) /*!< PLLMUL[3:0] bits (PLL multiplication factor) */ +#define RCC_CFGR_PLLMULL_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define RCC_CFGR_PLLMULL_1 ((uint32_t)0x00080000) /*!< Bit 1 */ +#define RCC_CFGR_PLLMULL_2 ((uint32_t)0x00100000) /*!< Bit 2 */ +#define RCC_CFGR_PLLMULL_3 ((uint32_t)0x00200000) /*!< Bit 3 */ + +#ifdef STM32F10X_CL + #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ + #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ + + #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ + #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ + + #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock * 4 */ + #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock * 5 */ + #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock * 6 */ + #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock * 7 */ + #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock * 8 */ + #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock * 9 */ + #define RCC_CFGR_PLLMULL6_5 ((uint32_t)0x00340000) /*!< PLL input clock * 6.5 */ + + #define RCC_CFGR_OTGFSPRE ((uint32_t)0x00400000) /*!< USB OTG FS prescaler */ + +/*!< MCO configuration */ + #define RCC_CFGR_MCO ((uint32_t)0x0F000000) /*!< MCO[3:0] bits (Microcontroller Clock Output) */ + #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ + #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + #define RCC_CFGR_MCO_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + + #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ + #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ + #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ + #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ + #define RCC_CFGR_MCO_PLLCLK_Div2 ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ + #define RCC_CFGR_MCO_PLL2CLK ((uint32_t)0x08000000) /*!< PLL2 clock selected as MCO source*/ + #define RCC_CFGR_MCO_PLL3CLK_Div2 ((uint32_t)0x09000000) /*!< PLL3 clock divided by 2 selected as MCO source*/ + #define RCC_CFGR_MCO_Ext_HSE ((uint32_t)0x0A000000) /*!< XT1 external 3-25 MHz oscillator clock selected as MCO source */ + #define RCC_CFGR_MCO_PLL3CLK ((uint32_t)0x0B000000) /*!< PLL3 clock selected as MCO source */ +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ + #define RCC_CFGR_PLLSRC_PREDIV1 ((uint32_t)0x00010000) /*!< PREDIV1 clock selected as PLL entry clock source */ + + #define RCC_CFGR_PLLXTPRE_PREDIV1 ((uint32_t)0x00000000) /*!< PREDIV1 clock not divided for PLL entry */ + #define RCC_CFGR_PLLXTPRE_PREDIV1_Div2 ((uint32_t)0x00020000) /*!< PREDIV1 clock divided by 2 for PLL entry */ + + #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ + #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ + #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ + #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ + #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ + #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ + #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ + #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ + #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ + #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ + #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ + #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ + #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ + #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ + #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ + +/*!< MCO configuration */ + #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ + #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ + #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + + #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ + #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ + #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ + #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ + #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ +#else + #define RCC_CFGR_PLLSRC_HSI_Div2 ((uint32_t)0x00000000) /*!< HSI clock divided by 2 selected as PLL entry clock source */ + #define RCC_CFGR_PLLSRC_HSE ((uint32_t)0x00010000) /*!< HSE clock selected as PLL entry clock source */ + + #define RCC_CFGR_PLLXTPRE_HSE ((uint32_t)0x00000000) /*!< HSE clock not divided for PLL entry */ + #define RCC_CFGR_PLLXTPRE_HSE_Div2 ((uint32_t)0x00020000) /*!< HSE clock divided by 2 for PLL entry */ + + #define RCC_CFGR_PLLMULL2 ((uint32_t)0x00000000) /*!< PLL input clock*2 */ + #define RCC_CFGR_PLLMULL3 ((uint32_t)0x00040000) /*!< PLL input clock*3 */ + #define RCC_CFGR_PLLMULL4 ((uint32_t)0x00080000) /*!< PLL input clock*4 */ + #define RCC_CFGR_PLLMULL5 ((uint32_t)0x000C0000) /*!< PLL input clock*5 */ + #define RCC_CFGR_PLLMULL6 ((uint32_t)0x00100000) /*!< PLL input clock*6 */ + #define RCC_CFGR_PLLMULL7 ((uint32_t)0x00140000) /*!< PLL input clock*7 */ + #define RCC_CFGR_PLLMULL8 ((uint32_t)0x00180000) /*!< PLL input clock*8 */ + #define RCC_CFGR_PLLMULL9 ((uint32_t)0x001C0000) /*!< PLL input clock*9 */ + #define RCC_CFGR_PLLMULL10 ((uint32_t)0x00200000) /*!< PLL input clock10 */ + #define RCC_CFGR_PLLMULL11 ((uint32_t)0x00240000) /*!< PLL input clock*11 */ + #define RCC_CFGR_PLLMULL12 ((uint32_t)0x00280000) /*!< PLL input clock*12 */ + #define RCC_CFGR_PLLMULL13 ((uint32_t)0x002C0000) /*!< PLL input clock*13 */ + #define RCC_CFGR_PLLMULL14 ((uint32_t)0x00300000) /*!< PLL input clock*14 */ + #define RCC_CFGR_PLLMULL15 ((uint32_t)0x00340000) /*!< PLL input clock*15 */ + #define RCC_CFGR_PLLMULL16 ((uint32_t)0x00380000) /*!< PLL input clock*16 */ + #define RCC_CFGR_USBPRE ((uint32_t)0x00400000) /*!< USB Device prescaler */ + +/*!< MCO configuration */ + #define RCC_CFGR_MCO ((uint32_t)0x07000000) /*!< MCO[2:0] bits (Microcontroller Clock Output) */ + #define RCC_CFGR_MCO_0 ((uint32_t)0x01000000) /*!< Bit 0 */ + #define RCC_CFGR_MCO_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + #define RCC_CFGR_MCO_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + + #define RCC_CFGR_MCO_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ + #define RCC_CFGR_MCO_SYSCLK ((uint32_t)0x04000000) /*!< System clock selected as MCO source */ + #define RCC_CFGR_MCO_HSI ((uint32_t)0x05000000) /*!< HSI clock selected as MCO source */ + #define RCC_CFGR_MCO_HSE ((uint32_t)0x06000000) /*!< HSE clock selected as MCO source */ + #define RCC_CFGR_MCO_PLL ((uint32_t)0x07000000) /*!< PLL clock divided by 2 selected as MCO source */ +#endif /* STM32F10X_CL */ + +/*!<****************** Bit definition for RCC_CIR register ********************/ +#define RCC_CIR_LSIRDYF ((uint32_t)0x00000001) /*!< LSI Ready Interrupt flag */ +#define RCC_CIR_LSERDYF ((uint32_t)0x00000002) /*!< LSE Ready Interrupt flag */ +#define RCC_CIR_HSIRDYF ((uint32_t)0x00000004) /*!< HSI Ready Interrupt flag */ +#define RCC_CIR_HSERDYF ((uint32_t)0x00000008) /*!< HSE Ready Interrupt flag */ +#define RCC_CIR_PLLRDYF ((uint32_t)0x00000010) /*!< PLL Ready Interrupt flag */ +#define RCC_CIR_CSSF ((uint32_t)0x00000080) /*!< Clock Security System Interrupt flag */ +#define RCC_CIR_LSIRDYIE ((uint32_t)0x00000100) /*!< LSI Ready Interrupt Enable */ +#define RCC_CIR_LSERDYIE ((uint32_t)0x00000200) /*!< LSE Ready Interrupt Enable */ +#define RCC_CIR_HSIRDYIE ((uint32_t)0x00000400) /*!< HSI Ready Interrupt Enable */ +#define RCC_CIR_HSERDYIE ((uint32_t)0x00000800) /*!< HSE Ready Interrupt Enable */ +#define RCC_CIR_PLLRDYIE ((uint32_t)0x00001000) /*!< PLL Ready Interrupt Enable */ +#define RCC_CIR_LSIRDYC ((uint32_t)0x00010000) /*!< LSI Ready Interrupt Clear */ +#define RCC_CIR_LSERDYC ((uint32_t)0x00020000) /*!< LSE Ready Interrupt Clear */ +#define RCC_CIR_HSIRDYC ((uint32_t)0x00040000) /*!< HSI Ready Interrupt Clear */ +#define RCC_CIR_HSERDYC ((uint32_t)0x00080000) /*!< HSE Ready Interrupt Clear */ +#define RCC_CIR_PLLRDYC ((uint32_t)0x00100000) /*!< PLL Ready Interrupt Clear */ +#define RCC_CIR_CSSC ((uint32_t)0x00800000) /*!< Clock Security System Interrupt Clear */ + +#ifdef STM32F10X_CL + #define RCC_CIR_PLL2RDYF ((uint32_t)0x00000020) /*!< PLL2 Ready Interrupt flag */ + #define RCC_CIR_PLL3RDYF ((uint32_t)0x00000040) /*!< PLL3 Ready Interrupt flag */ + #define RCC_CIR_PLL2RDYIE ((uint32_t)0x00002000) /*!< PLL2 Ready Interrupt Enable */ + #define RCC_CIR_PLL3RDYIE ((uint32_t)0x00004000) /*!< PLL3 Ready Interrupt Enable */ + #define RCC_CIR_PLL2RDYC ((uint32_t)0x00200000) /*!< PLL2 Ready Interrupt Clear */ + #define RCC_CIR_PLL3RDYC ((uint32_t)0x00400000) /*!< PLL3 Ready Interrupt Clear */ +#endif /* STM32F10X_CL */ + +/***************** Bit definition for RCC_APB2RSTR register *****************/ +#define RCC_APB2RSTR_AFIORST ((uint32_t)0x00000001) /*!< Alternate Function I/O reset */ +#define RCC_APB2RSTR_IOPARST ((uint32_t)0x00000004) /*!< I/O port A reset */ +#define RCC_APB2RSTR_IOPBRST ((uint32_t)0x00000008) /*!< I/O port B reset */ +#define RCC_APB2RSTR_IOPCRST ((uint32_t)0x00000010) /*!< I/O port C reset */ +#define RCC_APB2RSTR_IOPDRST ((uint32_t)0x00000020) /*!< I/O port D reset */ +#define RCC_APB2RSTR_ADC1RST ((uint32_t)0x00000200) /*!< ADC 1 interface reset */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB2RSTR_ADC2RST ((uint32_t)0x00000400) /*!< ADC 2 interface reset */ +#endif + +#define RCC_APB2RSTR_TIM1RST ((uint32_t)0x00000800) /*!< TIM1 Timer reset */ +#define RCC_APB2RSTR_SPI1RST ((uint32_t)0x00001000) /*!< SPI 1 reset */ +#define RCC_APB2RSTR_USART1RST ((uint32_t)0x00004000) /*!< USART1 reset */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +#define RCC_APB2RSTR_TIM15RST ((uint32_t)0x00010000) /*!< TIM15 Timer reset */ +#define RCC_APB2RSTR_TIM16RST ((uint32_t)0x00020000) /*!< TIM16 Timer reset */ +#define RCC_APB2RSTR_TIM17RST ((uint32_t)0x00040000) /*!< TIM17 Timer reset */ +#endif + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB2RSTR_IOPERST ((uint32_t)0x00000040) /*!< I/O port E reset */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_XL) + #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ + #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ + #define RCC_APB2RSTR_TIM8RST ((uint32_t)0x00002000) /*!< TIM8 Timer reset */ + #define RCC_APB2RSTR_ADC3RST ((uint32_t)0x00008000) /*!< ADC3 interface reset */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_APB2RSTR_IOPFRST ((uint32_t)0x00000080) /*!< I/O port F reset */ + #define RCC_APB2RSTR_IOPGRST ((uint32_t)0x00000100) /*!< I/O port G reset */ +#endif + +#ifdef STM32F10X_XL + #define RCC_APB2RSTR_TIM9RST ((uint32_t)0x00080000) /*!< TIM9 Timer reset */ + #define RCC_APB2RSTR_TIM10RST ((uint32_t)0x00100000) /*!< TIM10 Timer reset */ + #define RCC_APB2RSTR_TIM11RST ((uint32_t)0x00200000) /*!< TIM11 Timer reset */ +#endif /* STM32F10X_XL */ + +/***************** Bit definition for RCC_APB1RSTR register *****************/ +#define RCC_APB1RSTR_TIM2RST ((uint32_t)0x00000001) /*!< Timer 2 reset */ +#define RCC_APB1RSTR_TIM3RST ((uint32_t)0x00000002) /*!< Timer 3 reset */ +#define RCC_APB1RSTR_WWDGRST ((uint32_t)0x00000800) /*!< Window Watchdog reset */ +#define RCC_APB1RSTR_USART2RST ((uint32_t)0x00020000) /*!< USART 2 reset */ +#define RCC_APB1RSTR_I2C1RST ((uint32_t)0x00200000) /*!< I2C 1 reset */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB1RSTR_CAN1RST ((uint32_t)0x02000000) /*!< CAN1 reset */ +#endif + +#define RCC_APB1RSTR_BKPRST ((uint32_t)0x08000000) /*!< Backup interface reset */ +#define RCC_APB1RSTR_PWRRST ((uint32_t)0x10000000) /*!< Power interface reset */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB1RSTR_TIM4RST ((uint32_t)0x00000004) /*!< Timer 4 reset */ + #define RCC_APB1RSTR_SPI2RST ((uint32_t)0x00004000) /*!< SPI 2 reset */ + #define RCC_APB1RSTR_USART3RST ((uint32_t)0x00040000) /*!< USART 3 reset */ + #define RCC_APB1RSTR_I2C2RST ((uint32_t)0x00400000) /*!< I2C 2 reset */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) || defined (STM32F10X_XL) + #define RCC_APB1RSTR_USBRST ((uint32_t)0x00800000) /*!< USB Device reset */ +#endif + +#if defined (STM32F10X_HD) || defined (STM32F10X_CL) || defined (STM32F10X_XL) + #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ + #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ + #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ + #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ + #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ + #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ + #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ +#endif + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + #define RCC_APB1RSTR_TIM6RST ((uint32_t)0x00000010) /*!< Timer 6 reset */ + #define RCC_APB1RSTR_TIM7RST ((uint32_t)0x00000020) /*!< Timer 7 reset */ + #define RCC_APB1RSTR_DACRST ((uint32_t)0x20000000) /*!< DAC interface reset */ + #define RCC_APB1RSTR_CECRST ((uint32_t)0x40000000) /*!< CEC interface reset */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_APB1RSTR_TIM5RST ((uint32_t)0x00000008) /*!< Timer 5 reset */ + #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) /*!< TIM12 Timer reset */ + #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) /*!< TIM13 Timer reset */ + #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) /*!< TIM14 Timer reset */ + #define RCC_APB1RSTR_SPI3RST ((uint32_t)0x00008000) /*!< SPI 3 reset */ + #define RCC_APB1RSTR_UART4RST ((uint32_t)0x00080000) /*!< UART 4 reset */ + #define RCC_APB1RSTR_UART5RST ((uint32_t)0x00100000) /*!< UART 5 reset */ +#endif + +#ifdef STM32F10X_CL + #define RCC_APB1RSTR_CAN2RST ((uint32_t)0x04000000) /*!< CAN2 reset */ +#endif /* STM32F10X_CL */ + +#ifdef STM32F10X_XL + #define RCC_APB1RSTR_TIM12RST ((uint32_t)0x00000040) /*!< TIM12 Timer reset */ + #define RCC_APB1RSTR_TIM13RST ((uint32_t)0x00000080) /*!< TIM13 Timer reset */ + #define RCC_APB1RSTR_TIM14RST ((uint32_t)0x00000100) /*!< TIM14 Timer reset */ +#endif /* STM32F10X_XL */ + +/****************** Bit definition for RCC_AHBENR register ******************/ +#define RCC_AHBENR_DMA1EN ((uint16_t)0x0001) /*!< DMA1 clock enable */ +#define RCC_AHBENR_SRAMEN ((uint16_t)0x0004) /*!< SRAM interface clock enable */ +#define RCC_AHBENR_FLITFEN ((uint16_t)0x0010) /*!< FLITF clock enable */ +#define RCC_AHBENR_CRCEN ((uint16_t)0x0040) /*!< CRC clock enable */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_CL) || defined (STM32F10X_HD_VL) + #define RCC_AHBENR_DMA2EN ((uint16_t)0x0002) /*!< DMA2 clock enable */ +#endif + +#if defined (STM32F10X_HD) || defined (STM32F10X_XL) + #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ + #define RCC_AHBENR_SDIOEN ((uint16_t)0x0400) /*!< SDIO clock enable */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_AHBENR_FSMCEN ((uint16_t)0x0100) /*!< FSMC clock enable */ +#endif + +#ifdef STM32F10X_CL + #define RCC_AHBENR_OTGFSEN ((uint32_t)0x00001000) /*!< USB OTG FS clock enable */ + #define RCC_AHBENR_ETHMACEN ((uint32_t)0x00004000) /*!< ETHERNET MAC clock enable */ + #define RCC_AHBENR_ETHMACTXEN ((uint32_t)0x00008000) /*!< ETHERNET MAC Tx clock enable */ + #define RCC_AHBENR_ETHMACRXEN ((uint32_t)0x00010000) /*!< ETHERNET MAC Rx clock enable */ +#endif /* STM32F10X_CL */ + +/****************** Bit definition for RCC_APB2ENR register *****************/ +#define RCC_APB2ENR_AFIOEN ((uint32_t)0x00000001) /*!< Alternate Function I/O clock enable */ +#define RCC_APB2ENR_IOPAEN ((uint32_t)0x00000004) /*!< I/O port A clock enable */ +#define RCC_APB2ENR_IOPBEN ((uint32_t)0x00000008) /*!< I/O port B clock enable */ +#define RCC_APB2ENR_IOPCEN ((uint32_t)0x00000010) /*!< I/O port C clock enable */ +#define RCC_APB2ENR_IOPDEN ((uint32_t)0x00000020) /*!< I/O port D clock enable */ +#define RCC_APB2ENR_ADC1EN ((uint32_t)0x00000200) /*!< ADC 1 interface clock enable */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB2ENR_ADC2EN ((uint32_t)0x00000400) /*!< ADC 2 interface clock enable */ +#endif + +#define RCC_APB2ENR_TIM1EN ((uint32_t)0x00000800) /*!< TIM1 Timer clock enable */ +#define RCC_APB2ENR_SPI1EN ((uint32_t)0x00001000) /*!< SPI 1 clock enable */ +#define RCC_APB2ENR_USART1EN ((uint32_t)0x00004000) /*!< USART1 clock enable */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +#define RCC_APB2ENR_TIM15EN ((uint32_t)0x00010000) /*!< TIM15 Timer clock enable */ +#define RCC_APB2ENR_TIM16EN ((uint32_t)0x00020000) /*!< TIM16 Timer clock enable */ +#define RCC_APB2ENR_TIM17EN ((uint32_t)0x00040000) /*!< TIM17 Timer clock enable */ +#endif + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB2ENR_IOPEEN ((uint32_t)0x00000040) /*!< I/O port E clock enable */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_XL) + #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ + #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ + #define RCC_APB2ENR_TIM8EN ((uint32_t)0x00002000) /*!< TIM8 Timer clock enable */ + #define RCC_APB2ENR_ADC3EN ((uint32_t)0x00008000) /*!< DMA1 clock enable */ +#endif + +#if defined (STM32F10X_HD_VL) + #define RCC_APB2ENR_IOPFEN ((uint32_t)0x00000080) /*!< I/O port F clock enable */ + #define RCC_APB2ENR_IOPGEN ((uint32_t)0x00000100) /*!< I/O port G clock enable */ +#endif + +#ifdef STM32F10X_XL + #define RCC_APB2ENR_TIM9EN ((uint32_t)0x00080000) /*!< TIM9 Timer clock enable */ + #define RCC_APB2ENR_TIM10EN ((uint32_t)0x00100000) /*!< TIM10 Timer clock enable */ + #define RCC_APB2ENR_TIM11EN ((uint32_t)0x00200000) /*!< TIM11 Timer clock enable */ +#endif + +/***************** Bit definition for RCC_APB1ENR register ******************/ +#define RCC_APB1ENR_TIM2EN ((uint32_t)0x00000001) /*!< Timer 2 clock enabled*/ +#define RCC_APB1ENR_TIM3EN ((uint32_t)0x00000002) /*!< Timer 3 clock enable */ +#define RCC_APB1ENR_WWDGEN ((uint32_t)0x00000800) /*!< Window Watchdog clock enable */ +#define RCC_APB1ENR_USART2EN ((uint32_t)0x00020000) /*!< USART 2 clock enable */ +#define RCC_APB1ENR_I2C1EN ((uint32_t)0x00200000) /*!< I2C 1 clock enable */ + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) +#define RCC_APB1ENR_CAN1EN ((uint32_t)0x02000000) /*!< CAN1 clock enable */ +#endif + +#define RCC_APB1ENR_BKPEN ((uint32_t)0x08000000) /*!< Backup interface clock enable */ +#define RCC_APB1ENR_PWREN ((uint32_t)0x10000000) /*!< Power interface clock enable */ + +#if !defined (STM32F10X_LD) && !defined (STM32F10X_LD_VL) + #define RCC_APB1ENR_TIM4EN ((uint32_t)0x00000004) /*!< Timer 4 clock enable */ + #define RCC_APB1ENR_SPI2EN ((uint32_t)0x00004000) /*!< SPI 2 clock enable */ + #define RCC_APB1ENR_USART3EN ((uint32_t)0x00040000) /*!< USART 3 clock enable */ + #define RCC_APB1ENR_I2C2EN ((uint32_t)0x00400000) /*!< I2C 2 clock enable */ +#endif /* STM32F10X_LD && STM32F10X_LD_VL */ + +#if defined (STM32F10X_HD) || defined (STM32F10X_MD) || defined (STM32F10X_LD) + #define RCC_APB1ENR_USBEN ((uint32_t)0x00800000) /*!< USB Device clock enable */ +#endif + +#if defined (STM32F10X_HD) || defined (STM32F10X_CL) + #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ + #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ + #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ + #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ + #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ + #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ + #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ +#endif + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + #define RCC_APB1ENR_TIM6EN ((uint32_t)0x00000010) /*!< Timer 6 clock enable */ + #define RCC_APB1ENR_TIM7EN ((uint32_t)0x00000020) /*!< Timer 7 clock enable */ + #define RCC_APB1ENR_DACEN ((uint32_t)0x20000000) /*!< DAC interface clock enable */ + #define RCC_APB1ENR_CECEN ((uint32_t)0x40000000) /*!< CEC interface clock enable */ +#endif + +#ifdef STM32F10X_HD_VL + #define RCC_APB1ENR_TIM5EN ((uint32_t)0x00000008) /*!< Timer 5 clock enable */ + #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) /*!< TIM12 Timer clock enable */ + #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) /*!< TIM13 Timer clock enable */ + #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) /*!< TIM14 Timer clock enable */ + #define RCC_APB1ENR_SPI3EN ((uint32_t)0x00008000) /*!< SPI 3 clock enable */ + #define RCC_APB1ENR_UART4EN ((uint32_t)0x00080000) /*!< UART 4 clock enable */ + #define RCC_APB1ENR_UART5EN ((uint32_t)0x00100000) /*!< UART 5 clock enable */ +#endif /* STM32F10X_HD_VL */ + +#ifdef STM32F10X_CL + #define RCC_APB1ENR_CAN2EN ((uint32_t)0x04000000) /*!< CAN2 clock enable */ +#endif /* STM32F10X_CL */ + +#ifdef STM32F10X_XL + #define RCC_APB1ENR_TIM12EN ((uint32_t)0x00000040) /*!< TIM12 Timer clock enable */ + #define RCC_APB1ENR_TIM13EN ((uint32_t)0x00000080) /*!< TIM13 Timer clock enable */ + #define RCC_APB1ENR_TIM14EN ((uint32_t)0x00000100) /*!< TIM14 Timer clock enable */ +#endif /* STM32F10X_XL */ + +/******************* Bit definition for RCC_BDCR register *******************/ +#define RCC_BDCR_LSEON ((uint32_t)0x00000001) /*!< External Low Speed oscillator enable */ +#define RCC_BDCR_LSERDY ((uint32_t)0x00000002) /*!< External Low Speed oscillator Ready */ +#define RCC_BDCR_LSEBYP ((uint32_t)0x00000004) /*!< External Low Speed oscillator Bypass */ + +#define RCC_BDCR_RTCSEL ((uint32_t)0x00000300) /*!< RTCSEL[1:0] bits (RTC clock source selection) */ +#define RCC_BDCR_RTCSEL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define RCC_BDCR_RTCSEL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +/*!< RTC congiguration */ +#define RCC_BDCR_RTCSEL_NOCLOCK ((uint32_t)0x00000000) /*!< No clock */ +#define RCC_BDCR_RTCSEL_LSE ((uint32_t)0x00000100) /*!< LSE oscillator clock used as RTC clock */ +#define RCC_BDCR_RTCSEL_LSI ((uint32_t)0x00000200) /*!< LSI oscillator clock used as RTC clock */ +#define RCC_BDCR_RTCSEL_HSE ((uint32_t)0x00000300) /*!< HSE oscillator clock divided by 128 used as RTC clock */ + +#define RCC_BDCR_RTCEN ((uint32_t)0x00008000) /*!< RTC clock enable */ +#define RCC_BDCR_BDRST ((uint32_t)0x00010000) /*!< Backup domain software reset */ + +/******************* Bit definition for RCC_CSR register ********************/ +#define RCC_CSR_LSION ((uint32_t)0x00000001) /*!< Internal Low Speed oscillator enable */ +#define RCC_CSR_LSIRDY ((uint32_t)0x00000002) /*!< Internal Low Speed oscillator Ready */ +#define RCC_CSR_RMVF ((uint32_t)0x01000000) /*!< Remove reset flag */ +#define RCC_CSR_PINRSTF ((uint32_t)0x04000000) /*!< PIN reset flag */ +#define RCC_CSR_PORRSTF ((uint32_t)0x08000000) /*!< POR/PDR reset flag */ +#define RCC_CSR_SFTRSTF ((uint32_t)0x10000000) /*!< Software Reset flag */ +#define RCC_CSR_IWDGRSTF ((uint32_t)0x20000000) /*!< Independent Watchdog reset flag */ +#define RCC_CSR_WWDGRSTF ((uint32_t)0x40000000) /*!< Window watchdog reset flag */ +#define RCC_CSR_LPWRRSTF ((uint32_t)0x80000000) /*!< Low-Power reset flag */ + +#ifdef STM32F10X_CL +/******************* Bit definition for RCC_AHBRSTR register ****************/ + #define RCC_AHBRSTR_OTGFSRST ((uint32_t)0x00001000) /*!< USB OTG FS reset */ + #define RCC_AHBRSTR_ETHMACRST ((uint32_t)0x00004000) /*!< ETHERNET MAC reset */ + +/******************* Bit definition for RCC_CFGR2 register ******************/ +/*!< PREDIV1 configuration */ + #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ + #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ + #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + + #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ + #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ + #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ + #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ + #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ + #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ + #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ + #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ + #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ + #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ + #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ + #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ + #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ + #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ + #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ + #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ + +/*!< PREDIV2 configuration */ + #define RCC_CFGR2_PREDIV2 ((uint32_t)0x000000F0) /*!< PREDIV2[3:0] bits */ + #define RCC_CFGR2_PREDIV2_0 ((uint32_t)0x00000010) /*!< Bit 0 */ + #define RCC_CFGR2_PREDIV2_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + #define RCC_CFGR2_PREDIV2_2 ((uint32_t)0x00000040) /*!< Bit 2 */ + #define RCC_CFGR2_PREDIV2_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + + #define RCC_CFGR2_PREDIV2_DIV1 ((uint32_t)0x00000000) /*!< PREDIV2 input clock not divided */ + #define RCC_CFGR2_PREDIV2_DIV2 ((uint32_t)0x00000010) /*!< PREDIV2 input clock divided by 2 */ + #define RCC_CFGR2_PREDIV2_DIV3 ((uint32_t)0x00000020) /*!< PREDIV2 input clock divided by 3 */ + #define RCC_CFGR2_PREDIV2_DIV4 ((uint32_t)0x00000030) /*!< PREDIV2 input clock divided by 4 */ + #define RCC_CFGR2_PREDIV2_DIV5 ((uint32_t)0x00000040) /*!< PREDIV2 input clock divided by 5 */ + #define RCC_CFGR2_PREDIV2_DIV6 ((uint32_t)0x00000050) /*!< PREDIV2 input clock divided by 6 */ + #define RCC_CFGR2_PREDIV2_DIV7 ((uint32_t)0x00000060) /*!< PREDIV2 input clock divided by 7 */ + #define RCC_CFGR2_PREDIV2_DIV8 ((uint32_t)0x00000070) /*!< PREDIV2 input clock divided by 8 */ + #define RCC_CFGR2_PREDIV2_DIV9 ((uint32_t)0x00000080) /*!< PREDIV2 input clock divided by 9 */ + #define RCC_CFGR2_PREDIV2_DIV10 ((uint32_t)0x00000090) /*!< PREDIV2 input clock divided by 10 */ + #define RCC_CFGR2_PREDIV2_DIV11 ((uint32_t)0x000000A0) /*!< PREDIV2 input clock divided by 11 */ + #define RCC_CFGR2_PREDIV2_DIV12 ((uint32_t)0x000000B0) /*!< PREDIV2 input clock divided by 12 */ + #define RCC_CFGR2_PREDIV2_DIV13 ((uint32_t)0x000000C0) /*!< PREDIV2 input clock divided by 13 */ + #define RCC_CFGR2_PREDIV2_DIV14 ((uint32_t)0x000000D0) /*!< PREDIV2 input clock divided by 14 */ + #define RCC_CFGR2_PREDIV2_DIV15 ((uint32_t)0x000000E0) /*!< PREDIV2 input clock divided by 15 */ + #define RCC_CFGR2_PREDIV2_DIV16 ((uint32_t)0x000000F0) /*!< PREDIV2 input clock divided by 16 */ + +/*!< PLL2MUL configuration */ + #define RCC_CFGR2_PLL2MUL ((uint32_t)0x00000F00) /*!< PLL2MUL[3:0] bits */ + #define RCC_CFGR2_PLL2MUL_0 ((uint32_t)0x00000100) /*!< Bit 0 */ + #define RCC_CFGR2_PLL2MUL_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + #define RCC_CFGR2_PLL2MUL_2 ((uint32_t)0x00000400) /*!< Bit 2 */ + #define RCC_CFGR2_PLL2MUL_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + + #define RCC_CFGR2_PLL2MUL8 ((uint32_t)0x00000600) /*!< PLL2 input clock * 8 */ + #define RCC_CFGR2_PLL2MUL9 ((uint32_t)0x00000700) /*!< PLL2 input clock * 9 */ + #define RCC_CFGR2_PLL2MUL10 ((uint32_t)0x00000800) /*!< PLL2 input clock * 10 */ + #define RCC_CFGR2_PLL2MUL11 ((uint32_t)0x00000900) /*!< PLL2 input clock * 11 */ + #define RCC_CFGR2_PLL2MUL12 ((uint32_t)0x00000A00) /*!< PLL2 input clock * 12 */ + #define RCC_CFGR2_PLL2MUL13 ((uint32_t)0x00000B00) /*!< PLL2 input clock * 13 */ + #define RCC_CFGR2_PLL2MUL14 ((uint32_t)0x00000C00) /*!< PLL2 input clock * 14 */ + #define RCC_CFGR2_PLL2MUL16 ((uint32_t)0x00000E00) /*!< PLL2 input clock * 16 */ + #define RCC_CFGR2_PLL2MUL20 ((uint32_t)0x00000F00) /*!< PLL2 input clock * 20 */ + +/*!< PLL3MUL configuration */ + #define RCC_CFGR2_PLL3MUL ((uint32_t)0x0000F000) /*!< PLL3MUL[3:0] bits */ + #define RCC_CFGR2_PLL3MUL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ + #define RCC_CFGR2_PLL3MUL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ + #define RCC_CFGR2_PLL3MUL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + #define RCC_CFGR2_PLL3MUL_3 ((uint32_t)0x00008000) /*!< Bit 3 */ + + #define RCC_CFGR2_PLL3MUL8 ((uint32_t)0x00006000) /*!< PLL3 input clock * 8 */ + #define RCC_CFGR2_PLL3MUL9 ((uint32_t)0x00007000) /*!< PLL3 input clock * 9 */ + #define RCC_CFGR2_PLL3MUL10 ((uint32_t)0x00008000) /*!< PLL3 input clock * 10 */ + #define RCC_CFGR2_PLL3MUL11 ((uint32_t)0x00009000) /*!< PLL3 input clock * 11 */ + #define RCC_CFGR2_PLL3MUL12 ((uint32_t)0x0000A000) /*!< PLL3 input clock * 12 */ + #define RCC_CFGR2_PLL3MUL13 ((uint32_t)0x0000B000) /*!< PLL3 input clock * 13 */ + #define RCC_CFGR2_PLL3MUL14 ((uint32_t)0x0000C000) /*!< PLL3 input clock * 14 */ + #define RCC_CFGR2_PLL3MUL16 ((uint32_t)0x0000E000) /*!< PLL3 input clock * 16 */ + #define RCC_CFGR2_PLL3MUL20 ((uint32_t)0x0000F000) /*!< PLL3 input clock * 20 */ + + #define RCC_CFGR2_PREDIV1SRC ((uint32_t)0x00010000) /*!< PREDIV1 entry clock source */ + #define RCC_CFGR2_PREDIV1SRC_PLL2 ((uint32_t)0x00010000) /*!< PLL2 selected as PREDIV1 entry clock source */ + #define RCC_CFGR2_PREDIV1SRC_HSE ((uint32_t)0x00000000) /*!< HSE selected as PREDIV1 entry clock source */ + #define RCC_CFGR2_I2S2SRC ((uint32_t)0x00020000) /*!< I2S2 entry clock source */ + #define RCC_CFGR2_I2S3SRC ((uint32_t)0x00040000) /*!< I2S3 clock source */ +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/******************* Bit definition for RCC_CFGR2 register ******************/ +/*!< PREDIV1 configuration */ + #define RCC_CFGR2_PREDIV1 ((uint32_t)0x0000000F) /*!< PREDIV1[3:0] bits */ + #define RCC_CFGR2_PREDIV1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ + #define RCC_CFGR2_PREDIV1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + #define RCC_CFGR2_PREDIV1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + #define RCC_CFGR2_PREDIV1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + + #define RCC_CFGR2_PREDIV1_DIV1 ((uint32_t)0x00000000) /*!< PREDIV1 input clock not divided */ + #define RCC_CFGR2_PREDIV1_DIV2 ((uint32_t)0x00000001) /*!< PREDIV1 input clock divided by 2 */ + #define RCC_CFGR2_PREDIV1_DIV3 ((uint32_t)0x00000002) /*!< PREDIV1 input clock divided by 3 */ + #define RCC_CFGR2_PREDIV1_DIV4 ((uint32_t)0x00000003) /*!< PREDIV1 input clock divided by 4 */ + #define RCC_CFGR2_PREDIV1_DIV5 ((uint32_t)0x00000004) /*!< PREDIV1 input clock divided by 5 */ + #define RCC_CFGR2_PREDIV1_DIV6 ((uint32_t)0x00000005) /*!< PREDIV1 input clock divided by 6 */ + #define RCC_CFGR2_PREDIV1_DIV7 ((uint32_t)0x00000006) /*!< PREDIV1 input clock divided by 7 */ + #define RCC_CFGR2_PREDIV1_DIV8 ((uint32_t)0x00000007) /*!< PREDIV1 input clock divided by 8 */ + #define RCC_CFGR2_PREDIV1_DIV9 ((uint32_t)0x00000008) /*!< PREDIV1 input clock divided by 9 */ + #define RCC_CFGR2_PREDIV1_DIV10 ((uint32_t)0x00000009) /*!< PREDIV1 input clock divided by 10 */ + #define RCC_CFGR2_PREDIV1_DIV11 ((uint32_t)0x0000000A) /*!< PREDIV1 input clock divided by 11 */ + #define RCC_CFGR2_PREDIV1_DIV12 ((uint32_t)0x0000000B) /*!< PREDIV1 input clock divided by 12 */ + #define RCC_CFGR2_PREDIV1_DIV13 ((uint32_t)0x0000000C) /*!< PREDIV1 input clock divided by 13 */ + #define RCC_CFGR2_PREDIV1_DIV14 ((uint32_t)0x0000000D) /*!< PREDIV1 input clock divided by 14 */ + #define RCC_CFGR2_PREDIV1_DIV15 ((uint32_t)0x0000000E) /*!< PREDIV1 input clock divided by 15 */ + #define RCC_CFGR2_PREDIV1_DIV16 ((uint32_t)0x0000000F) /*!< PREDIV1 input clock divided by 16 */ +#endif + +/******************************************************************************/ +/* */ +/* General Purpose and Alternate Function I/O */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for GPIO_CRL register *******************/ +#define GPIO_CRL_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ + +#define GPIO_CRL_MODE0 ((uint32_t)0x00000003) /*!< MODE0[1:0] bits (Port x mode bits, pin 0) */ +#define GPIO_CRL_MODE0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define GPIO_CRL_MODE0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + +#define GPIO_CRL_MODE1 ((uint32_t)0x00000030) /*!< MODE1[1:0] bits (Port x mode bits, pin 1) */ +#define GPIO_CRL_MODE1_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define GPIO_CRL_MODE1_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define GPIO_CRL_MODE2 ((uint32_t)0x00000300) /*!< MODE2[1:0] bits (Port x mode bits, pin 2) */ +#define GPIO_CRL_MODE2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define GPIO_CRL_MODE2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +#define GPIO_CRL_MODE3 ((uint32_t)0x00003000) /*!< MODE3[1:0] bits (Port x mode bits, pin 3) */ +#define GPIO_CRL_MODE3_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define GPIO_CRL_MODE3_1 ((uint32_t)0x00002000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE4 ((uint32_t)0x00030000) /*!< MODE4[1:0] bits (Port x mode bits, pin 4) */ +#define GPIO_CRL_MODE4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define GPIO_CRL_MODE4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE5 ((uint32_t)0x00300000) /*!< MODE5[1:0] bits (Port x mode bits, pin 5) */ +#define GPIO_CRL_MODE5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define GPIO_CRL_MODE5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE6 ((uint32_t)0x03000000) /*!< MODE6[1:0] bits (Port x mode bits, pin 6) */ +#define GPIO_CRL_MODE6_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define GPIO_CRL_MODE6_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + +#define GPIO_CRL_MODE7 ((uint32_t)0x30000000) /*!< MODE7[1:0] bits (Port x mode bits, pin 7) */ +#define GPIO_CRL_MODE7_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define GPIO_CRL_MODE7_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ + +#define GPIO_CRL_CNF0 ((uint32_t)0x0000000C) /*!< CNF0[1:0] bits (Port x configuration bits, pin 0) */ +#define GPIO_CRL_CNF0_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define GPIO_CRL_CNF0_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define GPIO_CRL_CNF1 ((uint32_t)0x000000C0) /*!< CNF1[1:0] bits (Port x configuration bits, pin 1) */ +#define GPIO_CRL_CNF1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define GPIO_CRL_CNF1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define GPIO_CRL_CNF2 ((uint32_t)0x00000C00) /*!< CNF2[1:0] bits (Port x configuration bits, pin 2) */ +#define GPIO_CRL_CNF2_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define GPIO_CRL_CNF2_1 ((uint32_t)0x00000800) /*!< Bit 1 */ + +#define GPIO_CRL_CNF3 ((uint32_t)0x0000C000) /*!< CNF3[1:0] bits (Port x configuration bits, pin 3) */ +#define GPIO_CRL_CNF3_0 ((uint32_t)0x00004000) /*!< Bit 0 */ +#define GPIO_CRL_CNF3_1 ((uint32_t)0x00008000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF4 ((uint32_t)0x000C0000) /*!< CNF4[1:0] bits (Port x configuration bits, pin 4) */ +#define GPIO_CRL_CNF4_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define GPIO_CRL_CNF4_1 ((uint32_t)0x00080000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF5 ((uint32_t)0x00C00000) /*!< CNF5[1:0] bits (Port x configuration bits, pin 5) */ +#define GPIO_CRL_CNF5_0 ((uint32_t)0x00400000) /*!< Bit 0 */ +#define GPIO_CRL_CNF5_1 ((uint32_t)0x00800000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF6 ((uint32_t)0x0C000000) /*!< CNF6[1:0] bits (Port x configuration bits, pin 6) */ +#define GPIO_CRL_CNF6_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define GPIO_CRL_CNF6_1 ((uint32_t)0x08000000) /*!< Bit 1 */ + +#define GPIO_CRL_CNF7 ((uint32_t)0xC0000000) /*!< CNF7[1:0] bits (Port x configuration bits, pin 7) */ +#define GPIO_CRL_CNF7_0 ((uint32_t)0x40000000) /*!< Bit 0 */ +#define GPIO_CRL_CNF7_1 ((uint32_t)0x80000000) /*!< Bit 1 */ + +/******************* Bit definition for GPIO_CRH register *******************/ +#define GPIO_CRH_MODE ((uint32_t)0x33333333) /*!< Port x mode bits */ + +#define GPIO_CRH_MODE8 ((uint32_t)0x00000003) /*!< MODE8[1:0] bits (Port x mode bits, pin 8) */ +#define GPIO_CRH_MODE8_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define GPIO_CRH_MODE8_1 ((uint32_t)0x00000002) /*!< Bit 1 */ + +#define GPIO_CRH_MODE9 ((uint32_t)0x00000030) /*!< MODE9[1:0] bits (Port x mode bits, pin 9) */ +#define GPIO_CRH_MODE9_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define GPIO_CRH_MODE9_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define GPIO_CRH_MODE10 ((uint32_t)0x00000300) /*!< MODE10[1:0] bits (Port x mode bits, pin 10) */ +#define GPIO_CRH_MODE10_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define GPIO_CRH_MODE10_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +#define GPIO_CRH_MODE11 ((uint32_t)0x00003000) /*!< MODE11[1:0] bits (Port x mode bits, pin 11) */ +#define GPIO_CRH_MODE11_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define GPIO_CRH_MODE11_1 ((uint32_t)0x00002000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE12 ((uint32_t)0x00030000) /*!< MODE12[1:0] bits (Port x mode bits, pin 12) */ +#define GPIO_CRH_MODE12_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define GPIO_CRH_MODE12_1 ((uint32_t)0x00020000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE13 ((uint32_t)0x00300000) /*!< MODE13[1:0] bits (Port x mode bits, pin 13) */ +#define GPIO_CRH_MODE13_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define GPIO_CRH_MODE13_1 ((uint32_t)0x00200000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE14 ((uint32_t)0x03000000) /*!< MODE14[1:0] bits (Port x mode bits, pin 14) */ +#define GPIO_CRH_MODE14_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define GPIO_CRH_MODE14_1 ((uint32_t)0x02000000) /*!< Bit 1 */ + +#define GPIO_CRH_MODE15 ((uint32_t)0x30000000) /*!< MODE15[1:0] bits (Port x mode bits, pin 15) */ +#define GPIO_CRH_MODE15_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define GPIO_CRH_MODE15_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF ((uint32_t)0xCCCCCCCC) /*!< Port x configuration bits */ + +#define GPIO_CRH_CNF8 ((uint32_t)0x0000000C) /*!< CNF8[1:0] bits (Port x configuration bits, pin 8) */ +#define GPIO_CRH_CNF8_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define GPIO_CRH_CNF8_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define GPIO_CRH_CNF9 ((uint32_t)0x000000C0) /*!< CNF9[1:0] bits (Port x configuration bits, pin 9) */ +#define GPIO_CRH_CNF9_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define GPIO_CRH_CNF9_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define GPIO_CRH_CNF10 ((uint32_t)0x00000C00) /*!< CNF10[1:0] bits (Port x configuration bits, pin 10) */ +#define GPIO_CRH_CNF10_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define GPIO_CRH_CNF10_1 ((uint32_t)0x00000800) /*!< Bit 1 */ + +#define GPIO_CRH_CNF11 ((uint32_t)0x0000C000) /*!< CNF11[1:0] bits (Port x configuration bits, pin 11) */ +#define GPIO_CRH_CNF11_0 ((uint32_t)0x00004000) /*!< Bit 0 */ +#define GPIO_CRH_CNF11_1 ((uint32_t)0x00008000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF12 ((uint32_t)0x000C0000) /*!< CNF12[1:0] bits (Port x configuration bits, pin 12) */ +#define GPIO_CRH_CNF12_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define GPIO_CRH_CNF12_1 ((uint32_t)0x00080000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF13 ((uint32_t)0x00C00000) /*!< CNF13[1:0] bits (Port x configuration bits, pin 13) */ +#define GPIO_CRH_CNF13_0 ((uint32_t)0x00400000) /*!< Bit 0 */ +#define GPIO_CRH_CNF13_1 ((uint32_t)0x00800000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF14 ((uint32_t)0x0C000000) /*!< CNF14[1:0] bits (Port x configuration bits, pin 14) */ +#define GPIO_CRH_CNF14_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define GPIO_CRH_CNF14_1 ((uint32_t)0x08000000) /*!< Bit 1 */ + +#define GPIO_CRH_CNF15 ((uint32_t)0xC0000000) /*!< CNF15[1:0] bits (Port x configuration bits, pin 15) */ +#define GPIO_CRH_CNF15_0 ((uint32_t)0x40000000) /*!< Bit 0 */ +#define GPIO_CRH_CNF15_1 ((uint32_t)0x80000000) /*!< Bit 1 */ + +/*!<****************** Bit definition for GPIO_IDR register *******************/ +#define GPIO_IDR_IDR0 ((uint16_t)0x0001) /*!< Port input data, bit 0 */ +#define GPIO_IDR_IDR1 ((uint16_t)0x0002) /*!< Port input data, bit 1 */ +#define GPIO_IDR_IDR2 ((uint16_t)0x0004) /*!< Port input data, bit 2 */ +#define GPIO_IDR_IDR3 ((uint16_t)0x0008) /*!< Port input data, bit 3 */ +#define GPIO_IDR_IDR4 ((uint16_t)0x0010) /*!< Port input data, bit 4 */ +#define GPIO_IDR_IDR5 ((uint16_t)0x0020) /*!< Port input data, bit 5 */ +#define GPIO_IDR_IDR6 ((uint16_t)0x0040) /*!< Port input data, bit 6 */ +#define GPIO_IDR_IDR7 ((uint16_t)0x0080) /*!< Port input data, bit 7 */ +#define GPIO_IDR_IDR8 ((uint16_t)0x0100) /*!< Port input data, bit 8 */ +#define GPIO_IDR_IDR9 ((uint16_t)0x0200) /*!< Port input data, bit 9 */ +#define GPIO_IDR_IDR10 ((uint16_t)0x0400) /*!< Port input data, bit 10 */ +#define GPIO_IDR_IDR11 ((uint16_t)0x0800) /*!< Port input data, bit 11 */ +#define GPIO_IDR_IDR12 ((uint16_t)0x1000) /*!< Port input data, bit 12 */ +#define GPIO_IDR_IDR13 ((uint16_t)0x2000) /*!< Port input data, bit 13 */ +#define GPIO_IDR_IDR14 ((uint16_t)0x4000) /*!< Port input data, bit 14 */ +#define GPIO_IDR_IDR15 ((uint16_t)0x8000) /*!< Port input data, bit 15 */ + +/******************* Bit definition for GPIO_ODR register *******************/ +#define GPIO_ODR_ODR0 ((uint16_t)0x0001) /*!< Port output data, bit 0 */ +#define GPIO_ODR_ODR1 ((uint16_t)0x0002) /*!< Port output data, bit 1 */ +#define GPIO_ODR_ODR2 ((uint16_t)0x0004) /*!< Port output data, bit 2 */ +#define GPIO_ODR_ODR3 ((uint16_t)0x0008) /*!< Port output data, bit 3 */ +#define GPIO_ODR_ODR4 ((uint16_t)0x0010) /*!< Port output data, bit 4 */ +#define GPIO_ODR_ODR5 ((uint16_t)0x0020) /*!< Port output data, bit 5 */ +#define GPIO_ODR_ODR6 ((uint16_t)0x0040) /*!< Port output data, bit 6 */ +#define GPIO_ODR_ODR7 ((uint16_t)0x0080) /*!< Port output data, bit 7 */ +#define GPIO_ODR_ODR8 ((uint16_t)0x0100) /*!< Port output data, bit 8 */ +#define GPIO_ODR_ODR9 ((uint16_t)0x0200) /*!< Port output data, bit 9 */ +#define GPIO_ODR_ODR10 ((uint16_t)0x0400) /*!< Port output data, bit 10 */ +#define GPIO_ODR_ODR11 ((uint16_t)0x0800) /*!< Port output data, bit 11 */ +#define GPIO_ODR_ODR12 ((uint16_t)0x1000) /*!< Port output data, bit 12 */ +#define GPIO_ODR_ODR13 ((uint16_t)0x2000) /*!< Port output data, bit 13 */ +#define GPIO_ODR_ODR14 ((uint16_t)0x4000) /*!< Port output data, bit 14 */ +#define GPIO_ODR_ODR15 ((uint16_t)0x8000) /*!< Port output data, bit 15 */ + +/****************** Bit definition for GPIO_BSRR register *******************/ +#define GPIO_BSRR_BS0 ((uint32_t)0x00000001) /*!< Port x Set bit 0 */ +#define GPIO_BSRR_BS1 ((uint32_t)0x00000002) /*!< Port x Set bit 1 */ +#define GPIO_BSRR_BS2 ((uint32_t)0x00000004) /*!< Port x Set bit 2 */ +#define GPIO_BSRR_BS3 ((uint32_t)0x00000008) /*!< Port x Set bit 3 */ +#define GPIO_BSRR_BS4 ((uint32_t)0x00000010) /*!< Port x Set bit 4 */ +#define GPIO_BSRR_BS5 ((uint32_t)0x00000020) /*!< Port x Set bit 5 */ +#define GPIO_BSRR_BS6 ((uint32_t)0x00000040) /*!< Port x Set bit 6 */ +#define GPIO_BSRR_BS7 ((uint32_t)0x00000080) /*!< Port x Set bit 7 */ +#define GPIO_BSRR_BS8 ((uint32_t)0x00000100) /*!< Port x Set bit 8 */ +#define GPIO_BSRR_BS9 ((uint32_t)0x00000200) /*!< Port x Set bit 9 */ +#define GPIO_BSRR_BS10 ((uint32_t)0x00000400) /*!< Port x Set bit 10 */ +#define GPIO_BSRR_BS11 ((uint32_t)0x00000800) /*!< Port x Set bit 11 */ +#define GPIO_BSRR_BS12 ((uint32_t)0x00001000) /*!< Port x Set bit 12 */ +#define GPIO_BSRR_BS13 ((uint32_t)0x00002000) /*!< Port x Set bit 13 */ +#define GPIO_BSRR_BS14 ((uint32_t)0x00004000) /*!< Port x Set bit 14 */ +#define GPIO_BSRR_BS15 ((uint32_t)0x00008000) /*!< Port x Set bit 15 */ + +#define GPIO_BSRR_BR0 ((uint32_t)0x00010000) /*!< Port x Reset bit 0 */ +#define GPIO_BSRR_BR1 ((uint32_t)0x00020000) /*!< Port x Reset bit 1 */ +#define GPIO_BSRR_BR2 ((uint32_t)0x00040000) /*!< Port x Reset bit 2 */ +#define GPIO_BSRR_BR3 ((uint32_t)0x00080000) /*!< Port x Reset bit 3 */ +#define GPIO_BSRR_BR4 ((uint32_t)0x00100000) /*!< Port x Reset bit 4 */ +#define GPIO_BSRR_BR5 ((uint32_t)0x00200000) /*!< Port x Reset bit 5 */ +#define GPIO_BSRR_BR6 ((uint32_t)0x00400000) /*!< Port x Reset bit 6 */ +#define GPIO_BSRR_BR7 ((uint32_t)0x00800000) /*!< Port x Reset bit 7 */ +#define GPIO_BSRR_BR8 ((uint32_t)0x01000000) /*!< Port x Reset bit 8 */ +#define GPIO_BSRR_BR9 ((uint32_t)0x02000000) /*!< Port x Reset bit 9 */ +#define GPIO_BSRR_BR10 ((uint32_t)0x04000000) /*!< Port x Reset bit 10 */ +#define GPIO_BSRR_BR11 ((uint32_t)0x08000000) /*!< Port x Reset bit 11 */ +#define GPIO_BSRR_BR12 ((uint32_t)0x10000000) /*!< Port x Reset bit 12 */ +#define GPIO_BSRR_BR13 ((uint32_t)0x20000000) /*!< Port x Reset bit 13 */ +#define GPIO_BSRR_BR14 ((uint32_t)0x40000000) /*!< Port x Reset bit 14 */ +#define GPIO_BSRR_BR15 ((uint32_t)0x80000000) /*!< Port x Reset bit 15 */ + +/******************* Bit definition for GPIO_BRR register *******************/ +#define GPIO_BRR_BR0 ((uint16_t)0x0001) /*!< Port x Reset bit 0 */ +#define GPIO_BRR_BR1 ((uint16_t)0x0002) /*!< Port x Reset bit 1 */ +#define GPIO_BRR_BR2 ((uint16_t)0x0004) /*!< Port x Reset bit 2 */ +#define GPIO_BRR_BR3 ((uint16_t)0x0008) /*!< Port x Reset bit 3 */ +#define GPIO_BRR_BR4 ((uint16_t)0x0010) /*!< Port x Reset bit 4 */ +#define GPIO_BRR_BR5 ((uint16_t)0x0020) /*!< Port x Reset bit 5 */ +#define GPIO_BRR_BR6 ((uint16_t)0x0040) /*!< Port x Reset bit 6 */ +#define GPIO_BRR_BR7 ((uint16_t)0x0080) /*!< Port x Reset bit 7 */ +#define GPIO_BRR_BR8 ((uint16_t)0x0100) /*!< Port x Reset bit 8 */ +#define GPIO_BRR_BR9 ((uint16_t)0x0200) /*!< Port x Reset bit 9 */ +#define GPIO_BRR_BR10 ((uint16_t)0x0400) /*!< Port x Reset bit 10 */ +#define GPIO_BRR_BR11 ((uint16_t)0x0800) /*!< Port x Reset bit 11 */ +#define GPIO_BRR_BR12 ((uint16_t)0x1000) /*!< Port x Reset bit 12 */ +#define GPIO_BRR_BR13 ((uint16_t)0x2000) /*!< Port x Reset bit 13 */ +#define GPIO_BRR_BR14 ((uint16_t)0x4000) /*!< Port x Reset bit 14 */ +#define GPIO_BRR_BR15 ((uint16_t)0x8000) /*!< Port x Reset bit 15 */ + +/****************** Bit definition for GPIO_LCKR register *******************/ +#define GPIO_LCKR_LCK0 ((uint32_t)0x00000001) /*!< Port x Lock bit 0 */ +#define GPIO_LCKR_LCK1 ((uint32_t)0x00000002) /*!< Port x Lock bit 1 */ +#define GPIO_LCKR_LCK2 ((uint32_t)0x00000004) /*!< Port x Lock bit 2 */ +#define GPIO_LCKR_LCK3 ((uint32_t)0x00000008) /*!< Port x Lock bit 3 */ +#define GPIO_LCKR_LCK4 ((uint32_t)0x00000010) /*!< Port x Lock bit 4 */ +#define GPIO_LCKR_LCK5 ((uint32_t)0x00000020) /*!< Port x Lock bit 5 */ +#define GPIO_LCKR_LCK6 ((uint32_t)0x00000040) /*!< Port x Lock bit 6 */ +#define GPIO_LCKR_LCK7 ((uint32_t)0x00000080) /*!< Port x Lock bit 7 */ +#define GPIO_LCKR_LCK8 ((uint32_t)0x00000100) /*!< Port x Lock bit 8 */ +#define GPIO_LCKR_LCK9 ((uint32_t)0x00000200) /*!< Port x Lock bit 9 */ +#define GPIO_LCKR_LCK10 ((uint32_t)0x00000400) /*!< Port x Lock bit 10 */ +#define GPIO_LCKR_LCK11 ((uint32_t)0x00000800) /*!< Port x Lock bit 11 */ +#define GPIO_LCKR_LCK12 ((uint32_t)0x00001000) /*!< Port x Lock bit 12 */ +#define GPIO_LCKR_LCK13 ((uint32_t)0x00002000) /*!< Port x Lock bit 13 */ +#define GPIO_LCKR_LCK14 ((uint32_t)0x00004000) /*!< Port x Lock bit 14 */ +#define GPIO_LCKR_LCK15 ((uint32_t)0x00008000) /*!< Port x Lock bit 15 */ +#define GPIO_LCKR_LCKK ((uint32_t)0x00010000) /*!< Lock key */ + +/*----------------------------------------------------------------------------*/ + +/****************** Bit definition for AFIO_EVCR register *******************/ +#define AFIO_EVCR_PIN ((uint8_t)0x0F) /*!< PIN[3:0] bits (Pin selection) */ +#define AFIO_EVCR_PIN_0 ((uint8_t)0x01) /*!< Bit 0 */ +#define AFIO_EVCR_PIN_1 ((uint8_t)0x02) /*!< Bit 1 */ +#define AFIO_EVCR_PIN_2 ((uint8_t)0x04) /*!< Bit 2 */ +#define AFIO_EVCR_PIN_3 ((uint8_t)0x08) /*!< Bit 3 */ + +/*!< PIN configuration */ +#define AFIO_EVCR_PIN_PX0 ((uint8_t)0x00) /*!< Pin 0 selected */ +#define AFIO_EVCR_PIN_PX1 ((uint8_t)0x01) /*!< Pin 1 selected */ +#define AFIO_EVCR_PIN_PX2 ((uint8_t)0x02) /*!< Pin 2 selected */ +#define AFIO_EVCR_PIN_PX3 ((uint8_t)0x03) /*!< Pin 3 selected */ +#define AFIO_EVCR_PIN_PX4 ((uint8_t)0x04) /*!< Pin 4 selected */ +#define AFIO_EVCR_PIN_PX5 ((uint8_t)0x05) /*!< Pin 5 selected */ +#define AFIO_EVCR_PIN_PX6 ((uint8_t)0x06) /*!< Pin 6 selected */ +#define AFIO_EVCR_PIN_PX7 ((uint8_t)0x07) /*!< Pin 7 selected */ +#define AFIO_EVCR_PIN_PX8 ((uint8_t)0x08) /*!< Pin 8 selected */ +#define AFIO_EVCR_PIN_PX9 ((uint8_t)0x09) /*!< Pin 9 selected */ +#define AFIO_EVCR_PIN_PX10 ((uint8_t)0x0A) /*!< Pin 10 selected */ +#define AFIO_EVCR_PIN_PX11 ((uint8_t)0x0B) /*!< Pin 11 selected */ +#define AFIO_EVCR_PIN_PX12 ((uint8_t)0x0C) /*!< Pin 12 selected */ +#define AFIO_EVCR_PIN_PX13 ((uint8_t)0x0D) /*!< Pin 13 selected */ +#define AFIO_EVCR_PIN_PX14 ((uint8_t)0x0E) /*!< Pin 14 selected */ +#define AFIO_EVCR_PIN_PX15 ((uint8_t)0x0F) /*!< Pin 15 selected */ + +#define AFIO_EVCR_PORT ((uint8_t)0x70) /*!< PORT[2:0] bits (Port selection) */ +#define AFIO_EVCR_PORT_0 ((uint8_t)0x10) /*!< Bit 0 */ +#define AFIO_EVCR_PORT_1 ((uint8_t)0x20) /*!< Bit 1 */ +#define AFIO_EVCR_PORT_2 ((uint8_t)0x40) /*!< Bit 2 */ + +/*!< PORT configuration */ +#define AFIO_EVCR_PORT_PA ((uint8_t)0x00) /*!< Port A selected */ +#define AFIO_EVCR_PORT_PB ((uint8_t)0x10) /*!< Port B selected */ +#define AFIO_EVCR_PORT_PC ((uint8_t)0x20) /*!< Port C selected */ +#define AFIO_EVCR_PORT_PD ((uint8_t)0x30) /*!< Port D selected */ +#define AFIO_EVCR_PORT_PE ((uint8_t)0x40) /*!< Port E selected */ + +#define AFIO_EVCR_EVOE ((uint8_t)0x80) /*!< Event Output Enable */ + +/****************** Bit definition for AFIO_MAPR register *******************/ +#define AFIO_MAPR_SPI1_REMAP ((uint32_t)0x00000001) /*!< SPI1 remapping */ +#define AFIO_MAPR_I2C1_REMAP ((uint32_t)0x00000002) /*!< I2C1 remapping */ +#define AFIO_MAPR_USART1_REMAP ((uint32_t)0x00000004) /*!< USART1 remapping */ +#define AFIO_MAPR_USART2_REMAP ((uint32_t)0x00000008) /*!< USART2 remapping */ + +#define AFIO_MAPR_USART3_REMAP ((uint32_t)0x00000030) /*!< USART3_REMAP[1:0] bits (USART3 remapping) */ +#define AFIO_MAPR_USART3_REMAP_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define AFIO_MAPR_USART3_REMAP_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +/* USART3_REMAP configuration */ +#define AFIO_MAPR_USART3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (TX/PB10, RX/PB11, CK/PB12, CTS/PB13, RTS/PB14) */ +#define AFIO_MAPR_USART3_REMAP_PARTIALREMAP ((uint32_t)0x00000010) /*!< Partial remap (TX/PC10, RX/PC11, CK/PC12, CTS/PB13, RTS/PB14) */ +#define AFIO_MAPR_USART3_REMAP_FULLREMAP ((uint32_t)0x00000030) /*!< Full remap (TX/PD8, RX/PD9, CK/PD10, CTS/PD11, RTS/PD12) */ + +#define AFIO_MAPR_TIM1_REMAP ((uint32_t)0x000000C0) /*!< TIM1_REMAP[1:0] bits (TIM1 remapping) */ +#define AFIO_MAPR_TIM1_REMAP_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define AFIO_MAPR_TIM1_REMAP_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +/*!< TIM1_REMAP configuration */ +#define AFIO_MAPR_TIM1_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PB12, CH1N/PB13, CH2N/PB14, CH3N/PB15) */ +#define AFIO_MAPR_TIM1_REMAP_PARTIALREMAP ((uint32_t)0x00000040) /*!< Partial remap (ETR/PA12, CH1/PA8, CH2/PA9, CH3/PA10, CH4/PA11, BKIN/PA6, CH1N/PA7, CH2N/PB0, CH3N/PB1) */ +#define AFIO_MAPR_TIM1_REMAP_FULLREMAP ((uint32_t)0x000000C0) /*!< Full remap (ETR/PE7, CH1/PE9, CH2/PE11, CH3/PE13, CH4/PE14, BKIN/PE15, CH1N/PE8, CH2N/PE10, CH3N/PE12) */ + +#define AFIO_MAPR_TIM2_REMAP ((uint32_t)0x00000300) /*!< TIM2_REMAP[1:0] bits (TIM2 remapping) */ +#define AFIO_MAPR_TIM2_REMAP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define AFIO_MAPR_TIM2_REMAP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ + +/*!< TIM2_REMAP configuration */ +#define AFIO_MAPR_TIM2_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/ETR/PA0, CH2/PA1, CH3/PA2, CH4/PA3) */ +#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 ((uint32_t)0x00000100) /*!< Partial remap (CH1/ETR/PA15, CH2/PB3, CH3/PA2, CH4/PA3) */ +#define AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2 ((uint32_t)0x00000200) /*!< Partial remap (CH1/ETR/PA0, CH2/PA1, CH3/PB10, CH4/PB11) */ +#define AFIO_MAPR_TIM2_REMAP_FULLREMAP ((uint32_t)0x00000300) /*!< Full remap (CH1/ETR/PA15, CH2/PB3, CH3/PB10, CH4/PB11) */ + +#define AFIO_MAPR_TIM3_REMAP ((uint32_t)0x00000C00) /*!< TIM3_REMAP[1:0] bits (TIM3 remapping) */ +#define AFIO_MAPR_TIM3_REMAP_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define AFIO_MAPR_TIM3_REMAP_1 ((uint32_t)0x00000800) /*!< Bit 1 */ + +/*!< TIM3_REMAP configuration */ +#define AFIO_MAPR_TIM3_REMAP_NOREMAP ((uint32_t)0x00000000) /*!< No remap (CH1/PA6, CH2/PA7, CH3/PB0, CH4/PB1) */ +#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP ((uint32_t)0x00000800) /*!< Partial remap (CH1/PB4, CH2/PB5, CH3/PB0, CH4/PB1) */ +#define AFIO_MAPR_TIM3_REMAP_FULLREMAP ((uint32_t)0x00000C00) /*!< Full remap (CH1/PC6, CH2/PC7, CH3/PC8, CH4/PC9) */ + +#define AFIO_MAPR_TIM4_REMAP ((uint32_t)0x00001000) /*!< TIM4_REMAP bit (TIM4 remapping) */ + +#define AFIO_MAPR_CAN_REMAP ((uint32_t)0x00006000) /*!< CAN_REMAP[1:0] bits (CAN Alternate function remapping) */ +#define AFIO_MAPR_CAN_REMAP_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define AFIO_MAPR_CAN_REMAP_1 ((uint32_t)0x00004000) /*!< Bit 1 */ + +/*!< CAN_REMAP configuration */ +#define AFIO_MAPR_CAN_REMAP_REMAP1 ((uint32_t)0x00000000) /*!< CANRX mapped to PA11, CANTX mapped to PA12 */ +#define AFIO_MAPR_CAN_REMAP_REMAP2 ((uint32_t)0x00004000) /*!< CANRX mapped to PB8, CANTX mapped to PB9 */ +#define AFIO_MAPR_CAN_REMAP_REMAP3 ((uint32_t)0x00006000) /*!< CANRX mapped to PD0, CANTX mapped to PD1 */ + +#define AFIO_MAPR_PD01_REMAP ((uint32_t)0x00008000) /*!< Port D0/Port D1 mapping on OSC_IN/OSC_OUT */ +#define AFIO_MAPR_TIM5CH4_IREMAP ((uint32_t)0x00010000) /*!< TIM5 Channel4 Internal Remap */ +#define AFIO_MAPR_ADC1_ETRGINJ_REMAP ((uint32_t)0x00020000) /*!< ADC 1 External Trigger Injected Conversion remapping */ +#define AFIO_MAPR_ADC1_ETRGREG_REMAP ((uint32_t)0x00040000) /*!< ADC 1 External Trigger Regular Conversion remapping */ +#define AFIO_MAPR_ADC2_ETRGINJ_REMAP ((uint32_t)0x00080000) /*!< ADC 2 External Trigger Injected Conversion remapping */ +#define AFIO_MAPR_ADC2_ETRGREG_REMAP ((uint32_t)0x00100000) /*!< ADC 2 External Trigger Regular Conversion remapping */ + +/*!< SWJ_CFG configuration */ +#define AFIO_MAPR_SWJ_CFG ((uint32_t)0x07000000) /*!< SWJ_CFG[2:0] bits (Serial Wire JTAG configuration) */ +#define AFIO_MAPR_SWJ_CFG_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define AFIO_MAPR_SWJ_CFG_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define AFIO_MAPR_SWJ_CFG_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + +#define AFIO_MAPR_SWJ_CFG_RESET ((uint32_t)0x00000000) /*!< Full SWJ (JTAG-DP + SW-DP) : Reset State */ +#define AFIO_MAPR_SWJ_CFG_NOJNTRST ((uint32_t)0x01000000) /*!< Full SWJ (JTAG-DP + SW-DP) but without JNTRST */ +#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE ((uint32_t)0x02000000) /*!< JTAG-DP Disabled and SW-DP Enabled */ +#define AFIO_MAPR_SWJ_CFG_DISABLE ((uint32_t)0x04000000) /*!< JTAG-DP Disabled and SW-DP Disabled */ + +#ifdef STM32F10X_CL +/*!< ETH_REMAP configuration */ + #define AFIO_MAPR_ETH_REMAP ((uint32_t)0x00200000) /*!< SPI3_REMAP bit (Ethernet MAC I/O remapping) */ + +/*!< CAN2_REMAP configuration */ + #define AFIO_MAPR_CAN2_REMAP ((uint32_t)0x00400000) /*!< CAN2_REMAP bit (CAN2 I/O remapping) */ + +/*!< MII_RMII_SEL configuration */ + #define AFIO_MAPR_MII_RMII_SEL ((uint32_t)0x00800000) /*!< MII_RMII_SEL bit (Ethernet MII or RMII selection) */ + +/*!< SPI3_REMAP configuration */ + #define AFIO_MAPR_SPI3_REMAP ((uint32_t)0x10000000) /*!< SPI3_REMAP bit (SPI3 remapping) */ + +/*!< TIM2ITR1_IREMAP configuration */ + #define AFIO_MAPR_TIM2ITR1_IREMAP ((uint32_t)0x20000000) /*!< TIM2ITR1_IREMAP bit (TIM2 internal trigger 1 remapping) */ + +/*!< PTP_PPS_REMAP configuration */ + #define AFIO_MAPR_PTP_PPS_REMAP ((uint32_t)0x40000000) /*!< PTP_PPS_REMAP bit (Ethernet PTP PPS remapping) */ +#endif + +/***************** Bit definition for AFIO_EXTICR1 register *****************/ +#define AFIO_EXTICR1_EXTI0 ((uint16_t)0x000F) /*!< EXTI 0 configuration */ +#define AFIO_EXTICR1_EXTI1 ((uint16_t)0x00F0) /*!< EXTI 1 configuration */ +#define AFIO_EXTICR1_EXTI2 ((uint16_t)0x0F00) /*!< EXTI 2 configuration */ +#define AFIO_EXTICR1_EXTI3 ((uint16_t)0xF000) /*!< EXTI 3 configuration */ + +/*!< EXTI0 configuration */ +#define AFIO_EXTICR1_EXTI0_PA ((uint16_t)0x0000) /*!< PA[0] pin */ +#define AFIO_EXTICR1_EXTI0_PB ((uint16_t)0x0001) /*!< PB[0] pin */ +#define AFIO_EXTICR1_EXTI0_PC ((uint16_t)0x0002) /*!< PC[0] pin */ +#define AFIO_EXTICR1_EXTI0_PD ((uint16_t)0x0003) /*!< PD[0] pin */ +#define AFIO_EXTICR1_EXTI0_PE ((uint16_t)0x0004) /*!< PE[0] pin */ +#define AFIO_EXTICR1_EXTI0_PF ((uint16_t)0x0005) /*!< PF[0] pin */ +#define AFIO_EXTICR1_EXTI0_PG ((uint16_t)0x0006) /*!< PG[0] pin */ + +/*!< EXTI1 configuration */ +#define AFIO_EXTICR1_EXTI1_PA ((uint16_t)0x0000) /*!< PA[1] pin */ +#define AFIO_EXTICR1_EXTI1_PB ((uint16_t)0x0010) /*!< PB[1] pin */ +#define AFIO_EXTICR1_EXTI1_PC ((uint16_t)0x0020) /*!< PC[1] pin */ +#define AFIO_EXTICR1_EXTI1_PD ((uint16_t)0x0030) /*!< PD[1] pin */ +#define AFIO_EXTICR1_EXTI1_PE ((uint16_t)0x0040) /*!< PE[1] pin */ +#define AFIO_EXTICR1_EXTI1_PF ((uint16_t)0x0050) /*!< PF[1] pin */ +#define AFIO_EXTICR1_EXTI1_PG ((uint16_t)0x0060) /*!< PG[1] pin */ + +/*!< EXTI2 configuration */ +#define AFIO_EXTICR1_EXTI2_PA ((uint16_t)0x0000) /*!< PA[2] pin */ +#define AFIO_EXTICR1_EXTI2_PB ((uint16_t)0x0100) /*!< PB[2] pin */ +#define AFIO_EXTICR1_EXTI2_PC ((uint16_t)0x0200) /*!< PC[2] pin */ +#define AFIO_EXTICR1_EXTI2_PD ((uint16_t)0x0300) /*!< PD[2] pin */ +#define AFIO_EXTICR1_EXTI2_PE ((uint16_t)0x0400) /*!< PE[2] pin */ +#define AFIO_EXTICR1_EXTI2_PF ((uint16_t)0x0500) /*!< PF[2] pin */ +#define AFIO_EXTICR1_EXTI2_PG ((uint16_t)0x0600) /*!< PG[2] pin */ + +/*!< EXTI3 configuration */ +#define AFIO_EXTICR1_EXTI3_PA ((uint16_t)0x0000) /*!< PA[3] pin */ +#define AFIO_EXTICR1_EXTI3_PB ((uint16_t)0x1000) /*!< PB[3] pin */ +#define AFIO_EXTICR1_EXTI3_PC ((uint16_t)0x2000) /*!< PC[3] pin */ +#define AFIO_EXTICR1_EXTI3_PD ((uint16_t)0x3000) /*!< PD[3] pin */ +#define AFIO_EXTICR1_EXTI3_PE ((uint16_t)0x4000) /*!< PE[3] pin */ +#define AFIO_EXTICR1_EXTI3_PF ((uint16_t)0x5000) /*!< PF[3] pin */ +#define AFIO_EXTICR1_EXTI3_PG ((uint16_t)0x6000) /*!< PG[3] pin */ + +/***************** Bit definition for AFIO_EXTICR2 register *****************/ +#define AFIO_EXTICR2_EXTI4 ((uint16_t)0x000F) /*!< EXTI 4 configuration */ +#define AFIO_EXTICR2_EXTI5 ((uint16_t)0x00F0) /*!< EXTI 5 configuration */ +#define AFIO_EXTICR2_EXTI6 ((uint16_t)0x0F00) /*!< EXTI 6 configuration */ +#define AFIO_EXTICR2_EXTI7 ((uint16_t)0xF000) /*!< EXTI 7 configuration */ + +/*!< EXTI4 configuration */ +#define AFIO_EXTICR2_EXTI4_PA ((uint16_t)0x0000) /*!< PA[4] pin */ +#define AFIO_EXTICR2_EXTI4_PB ((uint16_t)0x0001) /*!< PB[4] pin */ +#define AFIO_EXTICR2_EXTI4_PC ((uint16_t)0x0002) /*!< PC[4] pin */ +#define AFIO_EXTICR2_EXTI4_PD ((uint16_t)0x0003) /*!< PD[4] pin */ +#define AFIO_EXTICR2_EXTI4_PE ((uint16_t)0x0004) /*!< PE[4] pin */ +#define AFIO_EXTICR2_EXTI4_PF ((uint16_t)0x0005) /*!< PF[4] pin */ +#define AFIO_EXTICR2_EXTI4_PG ((uint16_t)0x0006) /*!< PG[4] pin */ + +/* EXTI5 configuration */ +#define AFIO_EXTICR2_EXTI5_PA ((uint16_t)0x0000) /*!< PA[5] pin */ +#define AFIO_EXTICR2_EXTI5_PB ((uint16_t)0x0010) /*!< PB[5] pin */ +#define AFIO_EXTICR2_EXTI5_PC ((uint16_t)0x0020) /*!< PC[5] pin */ +#define AFIO_EXTICR2_EXTI5_PD ((uint16_t)0x0030) /*!< PD[5] pin */ +#define AFIO_EXTICR2_EXTI5_PE ((uint16_t)0x0040) /*!< PE[5] pin */ +#define AFIO_EXTICR2_EXTI5_PF ((uint16_t)0x0050) /*!< PF[5] pin */ +#define AFIO_EXTICR2_EXTI5_PG ((uint16_t)0x0060) /*!< PG[5] pin */ + +/*!< EXTI6 configuration */ +#define AFIO_EXTICR2_EXTI6_PA ((uint16_t)0x0000) /*!< PA[6] pin */ +#define AFIO_EXTICR2_EXTI6_PB ((uint16_t)0x0100) /*!< PB[6] pin */ +#define AFIO_EXTICR2_EXTI6_PC ((uint16_t)0x0200) /*!< PC[6] pin */ +#define AFIO_EXTICR2_EXTI6_PD ((uint16_t)0x0300) /*!< PD[6] pin */ +#define AFIO_EXTICR2_EXTI6_PE ((uint16_t)0x0400) /*!< PE[6] pin */ +#define AFIO_EXTICR2_EXTI6_PF ((uint16_t)0x0500) /*!< PF[6] pin */ +#define AFIO_EXTICR2_EXTI6_PG ((uint16_t)0x0600) /*!< PG[6] pin */ + +/*!< EXTI7 configuration */ +#define AFIO_EXTICR2_EXTI7_PA ((uint16_t)0x0000) /*!< PA[7] pin */ +#define AFIO_EXTICR2_EXTI7_PB ((uint16_t)0x1000) /*!< PB[7] pin */ +#define AFIO_EXTICR2_EXTI7_PC ((uint16_t)0x2000) /*!< PC[7] pin */ +#define AFIO_EXTICR2_EXTI7_PD ((uint16_t)0x3000) /*!< PD[7] pin */ +#define AFIO_EXTICR2_EXTI7_PE ((uint16_t)0x4000) /*!< PE[7] pin */ +#define AFIO_EXTICR2_EXTI7_PF ((uint16_t)0x5000) /*!< PF[7] pin */ +#define AFIO_EXTICR2_EXTI7_PG ((uint16_t)0x6000) /*!< PG[7] pin */ + +/***************** Bit definition for AFIO_EXTICR3 register *****************/ +#define AFIO_EXTICR3_EXTI8 ((uint16_t)0x000F) /*!< EXTI 8 configuration */ +#define AFIO_EXTICR3_EXTI9 ((uint16_t)0x00F0) /*!< EXTI 9 configuration */ +#define AFIO_EXTICR3_EXTI10 ((uint16_t)0x0F00) /*!< EXTI 10 configuration */ +#define AFIO_EXTICR3_EXTI11 ((uint16_t)0xF000) /*!< EXTI 11 configuration */ + +/*!< EXTI8 configuration */ +#define AFIO_EXTICR3_EXTI8_PA ((uint16_t)0x0000) /*!< PA[8] pin */ +#define AFIO_EXTICR3_EXTI8_PB ((uint16_t)0x0001) /*!< PB[8] pin */ +#define AFIO_EXTICR3_EXTI8_PC ((uint16_t)0x0002) /*!< PC[8] pin */ +#define AFIO_EXTICR3_EXTI8_PD ((uint16_t)0x0003) /*!< PD[8] pin */ +#define AFIO_EXTICR3_EXTI8_PE ((uint16_t)0x0004) /*!< PE[8] pin */ +#define AFIO_EXTICR3_EXTI8_PF ((uint16_t)0x0005) /*!< PF[8] pin */ +#define AFIO_EXTICR3_EXTI8_PG ((uint16_t)0x0006) /*!< PG[8] pin */ + +/*!< EXTI9 configuration */ +#define AFIO_EXTICR3_EXTI9_PA ((uint16_t)0x0000) /*!< PA[9] pin */ +#define AFIO_EXTICR3_EXTI9_PB ((uint16_t)0x0010) /*!< PB[9] pin */ +#define AFIO_EXTICR3_EXTI9_PC ((uint16_t)0x0020) /*!< PC[9] pin */ +#define AFIO_EXTICR3_EXTI9_PD ((uint16_t)0x0030) /*!< PD[9] pin */ +#define AFIO_EXTICR3_EXTI9_PE ((uint16_t)0x0040) /*!< PE[9] pin */ +#define AFIO_EXTICR3_EXTI9_PF ((uint16_t)0x0050) /*!< PF[9] pin */ +#define AFIO_EXTICR3_EXTI9_PG ((uint16_t)0x0060) /*!< PG[9] pin */ + +/*!< EXTI10 configuration */ +#define AFIO_EXTICR3_EXTI10_PA ((uint16_t)0x0000) /*!< PA[10] pin */ +#define AFIO_EXTICR3_EXTI10_PB ((uint16_t)0x0100) /*!< PB[10] pin */ +#define AFIO_EXTICR3_EXTI10_PC ((uint16_t)0x0200) /*!< PC[10] pin */ +#define AFIO_EXTICR3_EXTI10_PD ((uint16_t)0x0300) /*!< PD[10] pin */ +#define AFIO_EXTICR3_EXTI10_PE ((uint16_t)0x0400) /*!< PE[10] pin */ +#define AFIO_EXTICR3_EXTI10_PF ((uint16_t)0x0500) /*!< PF[10] pin */ +#define AFIO_EXTICR3_EXTI10_PG ((uint16_t)0x0600) /*!< PG[10] pin */ + +/*!< EXTI11 configuration */ +#define AFIO_EXTICR3_EXTI11_PA ((uint16_t)0x0000) /*!< PA[11] pin */ +#define AFIO_EXTICR3_EXTI11_PB ((uint16_t)0x1000) /*!< PB[11] pin */ +#define AFIO_EXTICR3_EXTI11_PC ((uint16_t)0x2000) /*!< PC[11] pin */ +#define AFIO_EXTICR3_EXTI11_PD ((uint16_t)0x3000) /*!< PD[11] pin */ +#define AFIO_EXTICR3_EXTI11_PE ((uint16_t)0x4000) /*!< PE[11] pin */ +#define AFIO_EXTICR3_EXTI11_PF ((uint16_t)0x5000) /*!< PF[11] pin */ +#define AFIO_EXTICR3_EXTI11_PG ((uint16_t)0x6000) /*!< PG[11] pin */ + +/***************** Bit definition for AFIO_EXTICR4 register *****************/ +#define AFIO_EXTICR4_EXTI12 ((uint16_t)0x000F) /*!< EXTI 12 configuration */ +#define AFIO_EXTICR4_EXTI13 ((uint16_t)0x00F0) /*!< EXTI 13 configuration */ +#define AFIO_EXTICR4_EXTI14 ((uint16_t)0x0F00) /*!< EXTI 14 configuration */ +#define AFIO_EXTICR4_EXTI15 ((uint16_t)0xF000) /*!< EXTI 15 configuration */ + +/* EXTI12 configuration */ +#define AFIO_EXTICR4_EXTI12_PA ((uint16_t)0x0000) /*!< PA[12] pin */ +#define AFIO_EXTICR4_EXTI12_PB ((uint16_t)0x0001) /*!< PB[12] pin */ +#define AFIO_EXTICR4_EXTI12_PC ((uint16_t)0x0002) /*!< PC[12] pin */ +#define AFIO_EXTICR4_EXTI12_PD ((uint16_t)0x0003) /*!< PD[12] pin */ +#define AFIO_EXTICR4_EXTI12_PE ((uint16_t)0x0004) /*!< PE[12] pin */ +#define AFIO_EXTICR4_EXTI12_PF ((uint16_t)0x0005) /*!< PF[12] pin */ +#define AFIO_EXTICR4_EXTI12_PG ((uint16_t)0x0006) /*!< PG[12] pin */ + +/* EXTI13 configuration */ +#define AFIO_EXTICR4_EXTI13_PA ((uint16_t)0x0000) /*!< PA[13] pin */ +#define AFIO_EXTICR4_EXTI13_PB ((uint16_t)0x0010) /*!< PB[13] pin */ +#define AFIO_EXTICR4_EXTI13_PC ((uint16_t)0x0020) /*!< PC[13] pin */ +#define AFIO_EXTICR4_EXTI13_PD ((uint16_t)0x0030) /*!< PD[13] pin */ +#define AFIO_EXTICR4_EXTI13_PE ((uint16_t)0x0040) /*!< PE[13] pin */ +#define AFIO_EXTICR4_EXTI13_PF ((uint16_t)0x0050) /*!< PF[13] pin */ +#define AFIO_EXTICR4_EXTI13_PG ((uint16_t)0x0060) /*!< PG[13] pin */ + +/*!< EXTI14 configuration */ +#define AFIO_EXTICR4_EXTI14_PA ((uint16_t)0x0000) /*!< PA[14] pin */ +#define AFIO_EXTICR4_EXTI14_PB ((uint16_t)0x0100) /*!< PB[14] pin */ +#define AFIO_EXTICR4_EXTI14_PC ((uint16_t)0x0200) /*!< PC[14] pin */ +#define AFIO_EXTICR4_EXTI14_PD ((uint16_t)0x0300) /*!< PD[14] pin */ +#define AFIO_EXTICR4_EXTI14_PE ((uint16_t)0x0400) /*!< PE[14] pin */ +#define AFIO_EXTICR4_EXTI14_PF ((uint16_t)0x0500) /*!< PF[14] pin */ +#define AFIO_EXTICR4_EXTI14_PG ((uint16_t)0x0600) /*!< PG[14] pin */ + +/*!< EXTI15 configuration */ +#define AFIO_EXTICR4_EXTI15_PA ((uint16_t)0x0000) /*!< PA[15] pin */ +#define AFIO_EXTICR4_EXTI15_PB ((uint16_t)0x1000) /*!< PB[15] pin */ +#define AFIO_EXTICR4_EXTI15_PC ((uint16_t)0x2000) /*!< PC[15] pin */ +#define AFIO_EXTICR4_EXTI15_PD ((uint16_t)0x3000) /*!< PD[15] pin */ +#define AFIO_EXTICR4_EXTI15_PE ((uint16_t)0x4000) /*!< PE[15] pin */ +#define AFIO_EXTICR4_EXTI15_PF ((uint16_t)0x5000) /*!< PF[15] pin */ +#define AFIO_EXTICR4_EXTI15_PG ((uint16_t)0x6000) /*!< PG[15] pin */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/****************** Bit definition for AFIO_MAPR2 register ******************/ +#define AFIO_MAPR2_TIM15_REMAP ((uint32_t)0x00000001) /*!< TIM15 remapping */ +#define AFIO_MAPR2_TIM16_REMAP ((uint32_t)0x00000002) /*!< TIM16 remapping */ +#define AFIO_MAPR2_TIM17_REMAP ((uint32_t)0x00000004) /*!< TIM17 remapping */ +#define AFIO_MAPR2_CEC_REMAP ((uint32_t)0x00000008) /*!< CEC remapping */ +#define AFIO_MAPR2_TIM1_DMA_REMAP ((uint32_t)0x00000010) /*!< TIM1_DMA remapping */ +#endif + +#ifdef STM32F10X_HD_VL +#define AFIO_MAPR2_TIM13_REMAP ((uint32_t)0x00000100) /*!< TIM13 remapping */ +#define AFIO_MAPR2_TIM14_REMAP ((uint32_t)0x00000200) /*!< TIM14 remapping */ +#define AFIO_MAPR2_FSMC_NADV_REMAP ((uint32_t)0x00000400) /*!< FSMC NADV remapping */ +#define AFIO_MAPR2_TIM67_DAC_DMA_REMAP ((uint32_t)0x00000800) /*!< TIM6/TIM7 and DAC DMA remapping */ +#define AFIO_MAPR2_TIM12_REMAP ((uint32_t)0x00001000) /*!< TIM12 remapping */ +#define AFIO_MAPR2_MISC_REMAP ((uint32_t)0x00002000) /*!< Miscellaneous remapping */ +#endif + +#ifdef STM32F10X_XL +/****************** Bit definition for AFIO_MAPR2 register ******************/ +#define AFIO_MAPR2_TIM9_REMAP ((uint32_t)0x00000020) /*!< TIM9 remapping */ +#define AFIO_MAPR2_TIM10_REMAP ((uint32_t)0x00000040) /*!< TIM10 remapping */ +#define AFIO_MAPR2_TIM11_REMAP ((uint32_t)0x00000080) /*!< TIM11 remapping */ +#define AFIO_MAPR2_TIM13_REMAP ((uint32_t)0x00000100) /*!< TIM13 remapping */ +#define AFIO_MAPR2_TIM14_REMAP ((uint32_t)0x00000200) /*!< TIM14 remapping */ +#define AFIO_MAPR2_FSMC_NADV_REMAP ((uint32_t)0x00000400) /*!< FSMC NADV remapping */ +#endif + +/******************************************************************************/ +/* */ +/* SystemTick */ +/* */ +/******************************************************************************/ + +/***************** Bit definition for SysTick_CTRL register *****************/ +#define SysTick_CTRL_ENABLE ((uint32_t)0x00000001) /*!< Counter enable */ +#define SysTick_CTRL_TICKINT ((uint32_t)0x00000002) /*!< Counting down to 0 pends the SysTick handler */ +#define SysTick_CTRL_CLKSOURCE ((uint32_t)0x00000004) /*!< Clock source */ +#define SysTick_CTRL_COUNTFLAG ((uint32_t)0x00010000) /*!< Count Flag */ + +/***************** Bit definition for SysTick_LOAD register *****************/ +#define SysTick_LOAD_RELOAD ((uint32_t)0x00FFFFFF) /*!< Value to load into the SysTick Current Value Register when the counter reaches 0 */ + +/***************** Bit definition for SysTick_VAL register ******************/ +#define SysTick_VAL_CURRENT ((uint32_t)0x00FFFFFF) /*!< Current value at the time the register is accessed */ + +/***************** Bit definition for SysTick_CALIB register ****************/ +#define SysTick_CALIB_TENMS ((uint32_t)0x00FFFFFF) /*!< Reload value to use for 10ms timing */ +#define SysTick_CALIB_SKEW ((uint32_t)0x40000000) /*!< Calibration value is not exactly 10 ms */ +#define SysTick_CALIB_NOREF ((uint32_t)0x80000000) /*!< The reference clock is not provided */ + +/******************************************************************************/ +/* */ +/* Nested Vectored Interrupt Controller */ +/* */ +/******************************************************************************/ + +/****************** Bit definition for NVIC_ISER register *******************/ +#define NVIC_ISER_SETENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt set enable bits */ +#define NVIC_ISER_SETENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ISER_SETENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ISER_SETENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ISER_SETENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ISER_SETENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ISER_SETENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ISER_SETENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ISER_SETENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ISER_SETENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ISER_SETENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ISER_SETENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ISER_SETENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ISER_SETENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ISER_SETENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ISER_SETENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ISER_SETENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ISER_SETENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ISER_SETENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ISER_SETENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ISER_SETENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ISER_SETENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ISER_SETENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ISER_SETENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ISER_SETENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ISER_SETENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ISER_SETENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ISER_SETENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ISER_SETENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ISER_SETENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ISER_SETENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ISER_SETENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ISER_SETENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_ICER register *******************/ +#define NVIC_ICER_CLRENA ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-enable bits */ +#define NVIC_ICER_CLRENA_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ICER_CLRENA_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ICER_CLRENA_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ICER_CLRENA_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ICER_CLRENA_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ICER_CLRENA_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ICER_CLRENA_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ICER_CLRENA_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ICER_CLRENA_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ICER_CLRENA_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ICER_CLRENA_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ICER_CLRENA_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ICER_CLRENA_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ICER_CLRENA_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ICER_CLRENA_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ICER_CLRENA_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ICER_CLRENA_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ICER_CLRENA_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ICER_CLRENA_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ICER_CLRENA_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ICER_CLRENA_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ICER_CLRENA_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ICER_CLRENA_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ICER_CLRENA_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ICER_CLRENA_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ICER_CLRENA_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ICER_CLRENA_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ICER_CLRENA_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ICER_CLRENA_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ICER_CLRENA_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ICER_CLRENA_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ICER_CLRENA_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_ISPR register *******************/ +#define NVIC_ISPR_SETPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt set-pending bits */ +#define NVIC_ISPR_SETPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ISPR_SETPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ISPR_SETPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ISPR_SETPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ISPR_SETPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ISPR_SETPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ISPR_SETPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ISPR_SETPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ISPR_SETPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ISPR_SETPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ISPR_SETPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ISPR_SETPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ISPR_SETPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ISPR_SETPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ISPR_SETPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ISPR_SETPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ISPR_SETPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ISPR_SETPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ISPR_SETPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ISPR_SETPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ISPR_SETPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ISPR_SETPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ISPR_SETPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ISPR_SETPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ISPR_SETPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ISPR_SETPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ISPR_SETPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ISPR_SETPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ISPR_SETPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ISPR_SETPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ISPR_SETPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ISPR_SETPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_ICPR register *******************/ +#define NVIC_ICPR_CLRPEND ((uint32_t)0xFFFFFFFF) /*!< Interrupt clear-pending bits */ +#define NVIC_ICPR_CLRPEND_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_ICPR_CLRPEND_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_ICPR_CLRPEND_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_ICPR_CLRPEND_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_ICPR_CLRPEND_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_ICPR_CLRPEND_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_ICPR_CLRPEND_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_ICPR_CLRPEND_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_ICPR_CLRPEND_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_ICPR_CLRPEND_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_ICPR_CLRPEND_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_ICPR_CLRPEND_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_ICPR_CLRPEND_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_ICPR_CLRPEND_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_ICPR_CLRPEND_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_ICPR_CLRPEND_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_ICPR_CLRPEND_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_ICPR_CLRPEND_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_ICPR_CLRPEND_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_ICPR_CLRPEND_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_ICPR_CLRPEND_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_ICPR_CLRPEND_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_ICPR_CLRPEND_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_ICPR_CLRPEND_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_ICPR_CLRPEND_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_ICPR_CLRPEND_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_ICPR_CLRPEND_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_ICPR_CLRPEND_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_ICPR_CLRPEND_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_ICPR_CLRPEND_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_ICPR_CLRPEND_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_ICPR_CLRPEND_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_IABR register *******************/ +#define NVIC_IABR_ACTIVE ((uint32_t)0xFFFFFFFF) /*!< Interrupt active flags */ +#define NVIC_IABR_ACTIVE_0 ((uint32_t)0x00000001) /*!< bit 0 */ +#define NVIC_IABR_ACTIVE_1 ((uint32_t)0x00000002) /*!< bit 1 */ +#define NVIC_IABR_ACTIVE_2 ((uint32_t)0x00000004) /*!< bit 2 */ +#define NVIC_IABR_ACTIVE_3 ((uint32_t)0x00000008) /*!< bit 3 */ +#define NVIC_IABR_ACTIVE_4 ((uint32_t)0x00000010) /*!< bit 4 */ +#define NVIC_IABR_ACTIVE_5 ((uint32_t)0x00000020) /*!< bit 5 */ +#define NVIC_IABR_ACTIVE_6 ((uint32_t)0x00000040) /*!< bit 6 */ +#define NVIC_IABR_ACTIVE_7 ((uint32_t)0x00000080) /*!< bit 7 */ +#define NVIC_IABR_ACTIVE_8 ((uint32_t)0x00000100) /*!< bit 8 */ +#define NVIC_IABR_ACTIVE_9 ((uint32_t)0x00000200) /*!< bit 9 */ +#define NVIC_IABR_ACTIVE_10 ((uint32_t)0x00000400) /*!< bit 10 */ +#define NVIC_IABR_ACTIVE_11 ((uint32_t)0x00000800) /*!< bit 11 */ +#define NVIC_IABR_ACTIVE_12 ((uint32_t)0x00001000) /*!< bit 12 */ +#define NVIC_IABR_ACTIVE_13 ((uint32_t)0x00002000) /*!< bit 13 */ +#define NVIC_IABR_ACTIVE_14 ((uint32_t)0x00004000) /*!< bit 14 */ +#define NVIC_IABR_ACTIVE_15 ((uint32_t)0x00008000) /*!< bit 15 */ +#define NVIC_IABR_ACTIVE_16 ((uint32_t)0x00010000) /*!< bit 16 */ +#define NVIC_IABR_ACTIVE_17 ((uint32_t)0x00020000) /*!< bit 17 */ +#define NVIC_IABR_ACTIVE_18 ((uint32_t)0x00040000) /*!< bit 18 */ +#define NVIC_IABR_ACTIVE_19 ((uint32_t)0x00080000) /*!< bit 19 */ +#define NVIC_IABR_ACTIVE_20 ((uint32_t)0x00100000) /*!< bit 20 */ +#define NVIC_IABR_ACTIVE_21 ((uint32_t)0x00200000) /*!< bit 21 */ +#define NVIC_IABR_ACTIVE_22 ((uint32_t)0x00400000) /*!< bit 22 */ +#define NVIC_IABR_ACTIVE_23 ((uint32_t)0x00800000) /*!< bit 23 */ +#define NVIC_IABR_ACTIVE_24 ((uint32_t)0x01000000) /*!< bit 24 */ +#define NVIC_IABR_ACTIVE_25 ((uint32_t)0x02000000) /*!< bit 25 */ +#define NVIC_IABR_ACTIVE_26 ((uint32_t)0x04000000) /*!< bit 26 */ +#define NVIC_IABR_ACTIVE_27 ((uint32_t)0x08000000) /*!< bit 27 */ +#define NVIC_IABR_ACTIVE_28 ((uint32_t)0x10000000) /*!< bit 28 */ +#define NVIC_IABR_ACTIVE_29 ((uint32_t)0x20000000) /*!< bit 29 */ +#define NVIC_IABR_ACTIVE_30 ((uint32_t)0x40000000) /*!< bit 30 */ +#define NVIC_IABR_ACTIVE_31 ((uint32_t)0x80000000) /*!< bit 31 */ + +/****************** Bit definition for NVIC_PRI0 register *******************/ +#define NVIC_IPR0_PRI_0 ((uint32_t)0x000000FF) /*!< Priority of interrupt 0 */ +#define NVIC_IPR0_PRI_1 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 1 */ +#define NVIC_IPR0_PRI_2 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 2 */ +#define NVIC_IPR0_PRI_3 ((uint32_t)0xFF000000) /*!< Priority of interrupt 3 */ + +/****************** Bit definition for NVIC_PRI1 register *******************/ +#define NVIC_IPR1_PRI_4 ((uint32_t)0x000000FF) /*!< Priority of interrupt 4 */ +#define NVIC_IPR1_PRI_5 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 5 */ +#define NVIC_IPR1_PRI_6 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 6 */ +#define NVIC_IPR1_PRI_7 ((uint32_t)0xFF000000) /*!< Priority of interrupt 7 */ + +/****************** Bit definition for NVIC_PRI2 register *******************/ +#define NVIC_IPR2_PRI_8 ((uint32_t)0x000000FF) /*!< Priority of interrupt 8 */ +#define NVIC_IPR2_PRI_9 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 9 */ +#define NVIC_IPR2_PRI_10 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 10 */ +#define NVIC_IPR2_PRI_11 ((uint32_t)0xFF000000) /*!< Priority of interrupt 11 */ + +/****************** Bit definition for NVIC_PRI3 register *******************/ +#define NVIC_IPR3_PRI_12 ((uint32_t)0x000000FF) /*!< Priority of interrupt 12 */ +#define NVIC_IPR3_PRI_13 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 13 */ +#define NVIC_IPR3_PRI_14 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 14 */ +#define NVIC_IPR3_PRI_15 ((uint32_t)0xFF000000) /*!< Priority of interrupt 15 */ + +/****************** Bit definition for NVIC_PRI4 register *******************/ +#define NVIC_IPR4_PRI_16 ((uint32_t)0x000000FF) /*!< Priority of interrupt 16 */ +#define NVIC_IPR4_PRI_17 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 17 */ +#define NVIC_IPR4_PRI_18 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 18 */ +#define NVIC_IPR4_PRI_19 ((uint32_t)0xFF000000) /*!< Priority of interrupt 19 */ + +/****************** Bit definition for NVIC_PRI5 register *******************/ +#define NVIC_IPR5_PRI_20 ((uint32_t)0x000000FF) /*!< Priority of interrupt 20 */ +#define NVIC_IPR5_PRI_21 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 21 */ +#define NVIC_IPR5_PRI_22 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 22 */ +#define NVIC_IPR5_PRI_23 ((uint32_t)0xFF000000) /*!< Priority of interrupt 23 */ + +/****************** Bit definition for NVIC_PRI6 register *******************/ +#define NVIC_IPR6_PRI_24 ((uint32_t)0x000000FF) /*!< Priority of interrupt 24 */ +#define NVIC_IPR6_PRI_25 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 25 */ +#define NVIC_IPR6_PRI_26 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 26 */ +#define NVIC_IPR6_PRI_27 ((uint32_t)0xFF000000) /*!< Priority of interrupt 27 */ + +/****************** Bit definition for NVIC_PRI7 register *******************/ +#define NVIC_IPR7_PRI_28 ((uint32_t)0x000000FF) /*!< Priority of interrupt 28 */ +#define NVIC_IPR7_PRI_29 ((uint32_t)0x0000FF00) /*!< Priority of interrupt 29 */ +#define NVIC_IPR7_PRI_30 ((uint32_t)0x00FF0000) /*!< Priority of interrupt 30 */ +#define NVIC_IPR7_PRI_31 ((uint32_t)0xFF000000) /*!< Priority of interrupt 31 */ + +/****************** Bit definition for SCB_CPUID register *******************/ +#define SCB_CPUID_REVISION ((uint32_t)0x0000000F) /*!< Implementation defined revision number */ +#define SCB_CPUID_PARTNO ((uint32_t)0x0000FFF0) /*!< Number of processor within family */ +#define SCB_CPUID_Constant ((uint32_t)0x000F0000) /*!< Reads as 0x0F */ +#define SCB_CPUID_VARIANT ((uint32_t)0x00F00000) /*!< Implementation defined variant number */ +#define SCB_CPUID_IMPLEMENTER ((uint32_t)0xFF000000) /*!< Implementer code. ARM is 0x41 */ + +/******************* Bit definition for SCB_ICSR register *******************/ +#define SCB_ICSR_VECTACTIVE ((uint32_t)0x000001FF) /*!< Active ISR number field */ +#define SCB_ICSR_RETTOBASE ((uint32_t)0x00000800) /*!< All active exceptions minus the IPSR_current_exception yields the empty set */ +#define SCB_ICSR_VECTPENDING ((uint32_t)0x003FF000) /*!< Pending ISR number field */ +#define SCB_ICSR_ISRPENDING ((uint32_t)0x00400000) /*!< Interrupt pending flag */ +#define SCB_ICSR_ISRPREEMPT ((uint32_t)0x00800000) /*!< It indicates that a pending interrupt becomes active in the next running cycle */ +#define SCB_ICSR_PENDSTCLR ((uint32_t)0x02000000) /*!< Clear pending SysTick bit */ +#define SCB_ICSR_PENDSTSET ((uint32_t)0x04000000) /*!< Set pending SysTick bit */ +#define SCB_ICSR_PENDSVCLR ((uint32_t)0x08000000) /*!< Clear pending pendSV bit */ +#define SCB_ICSR_PENDSVSET ((uint32_t)0x10000000) /*!< Set pending pendSV bit */ +#define SCB_ICSR_NMIPENDSET ((uint32_t)0x80000000) /*!< Set pending NMI bit */ + +/******************* Bit definition for SCB_VTOR register *******************/ +#define SCB_VTOR_TBLOFF ((uint32_t)0x1FFFFF80) /*!< Vector table base offset field */ +#define SCB_VTOR_TBLBASE ((uint32_t)0x20000000) /*!< Table base in code(0) or RAM(1) */ + +/*!<***************** Bit definition for SCB_AIRCR register *******************/ +#define SCB_AIRCR_VECTRESET ((uint32_t)0x00000001) /*!< System Reset bit */ +#define SCB_AIRCR_VECTCLRACTIVE ((uint32_t)0x00000002) /*!< Clear active vector bit */ +#define SCB_AIRCR_SYSRESETREQ ((uint32_t)0x00000004) /*!< Requests chip control logic to generate a reset */ + +#define SCB_AIRCR_PRIGROUP ((uint32_t)0x00000700) /*!< PRIGROUP[2:0] bits (Priority group) */ +#define SCB_AIRCR_PRIGROUP_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define SCB_AIRCR_PRIGROUP_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define SCB_AIRCR_PRIGROUP_2 ((uint32_t)0x00000400) /*!< Bit 2 */ + +/* prority group configuration */ +#define SCB_AIRCR_PRIGROUP0 ((uint32_t)0x00000000) /*!< Priority group=0 (7 bits of pre-emption priority, 1 bit of subpriority) */ +#define SCB_AIRCR_PRIGROUP1 ((uint32_t)0x00000100) /*!< Priority group=1 (6 bits of pre-emption priority, 2 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP2 ((uint32_t)0x00000200) /*!< Priority group=2 (5 bits of pre-emption priority, 3 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP3 ((uint32_t)0x00000300) /*!< Priority group=3 (4 bits of pre-emption priority, 4 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP4 ((uint32_t)0x00000400) /*!< Priority group=4 (3 bits of pre-emption priority, 5 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP5 ((uint32_t)0x00000500) /*!< Priority group=5 (2 bits of pre-emption priority, 6 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP6 ((uint32_t)0x00000600) /*!< Priority group=6 (1 bit of pre-emption priority, 7 bits of subpriority) */ +#define SCB_AIRCR_PRIGROUP7 ((uint32_t)0x00000700) /*!< Priority group=7 (no pre-emption priority, 8 bits of subpriority) */ + +#define SCB_AIRCR_ENDIANESS ((uint32_t)0x00008000) /*!< Data endianness bit */ +#define SCB_AIRCR_VECTKEY ((uint32_t)0xFFFF0000) /*!< Register key (VECTKEY) - Reads as 0xFA05 (VECTKEYSTAT) */ + +/******************* Bit definition for SCB_SCR register ********************/ +#define SCB_SCR_SLEEPONEXIT ((uint8_t)0x02) /*!< Sleep on exit bit */ +#define SCB_SCR_SLEEPDEEP ((uint8_t)0x04) /*!< Sleep deep bit */ +#define SCB_SCR_SEVONPEND ((uint8_t)0x10) /*!< Wake up from WFE */ + +/******************** Bit definition for SCB_CCR register *******************/ +#define SCB_CCR_NONBASETHRDENA ((uint16_t)0x0001) /*!< Thread mode can be entered from any level in Handler mode by controlled return value */ +#define SCB_CCR_USERSETMPEND ((uint16_t)0x0002) /*!< Enables user code to write the Software Trigger Interrupt register to trigger (pend) a Main exception */ +#define SCB_CCR_UNALIGN_TRP ((uint16_t)0x0008) /*!< Trap for unaligned access */ +#define SCB_CCR_DIV_0_TRP ((uint16_t)0x0010) /*!< Trap on Divide by 0 */ +#define SCB_CCR_BFHFNMIGN ((uint16_t)0x0100) /*!< Handlers running at priority -1 and -2 */ +#define SCB_CCR_STKALIGN ((uint16_t)0x0200) /*!< On exception entry, the SP used prior to the exception is adjusted to be 8-byte aligned */ + +/******************* Bit definition for SCB_SHPR register ********************/ +#define SCB_SHPR_PRI_N ((uint32_t)0x000000FF) /*!< Priority of system handler 4,8, and 12. Mem Manage, reserved and Debug Monitor */ +#define SCB_SHPR_PRI_N1 ((uint32_t)0x0000FF00) /*!< Priority of system handler 5,9, and 13. Bus Fault, reserved and reserved */ +#define SCB_SHPR_PRI_N2 ((uint32_t)0x00FF0000) /*!< Priority of system handler 6,10, and 14. Usage Fault, reserved and PendSV */ +#define SCB_SHPR_PRI_N3 ((uint32_t)0xFF000000) /*!< Priority of system handler 7,11, and 15. Reserved, SVCall and SysTick */ + +/****************** Bit definition for SCB_SHCSR register *******************/ +#define SCB_SHCSR_MEMFAULTACT ((uint32_t)0x00000001) /*!< MemManage is active */ +#define SCB_SHCSR_BUSFAULTACT ((uint32_t)0x00000002) /*!< BusFault is active */ +#define SCB_SHCSR_USGFAULTACT ((uint32_t)0x00000008) /*!< UsageFault is active */ +#define SCB_SHCSR_SVCALLACT ((uint32_t)0x00000080) /*!< SVCall is active */ +#define SCB_SHCSR_MONITORACT ((uint32_t)0x00000100) /*!< Monitor is active */ +#define SCB_SHCSR_PENDSVACT ((uint32_t)0x00000400) /*!< PendSV is active */ +#define SCB_SHCSR_SYSTICKACT ((uint32_t)0x00000800) /*!< SysTick is active */ +#define SCB_SHCSR_USGFAULTPENDED ((uint32_t)0x00001000) /*!< Usage Fault is pended */ +#define SCB_SHCSR_MEMFAULTPENDED ((uint32_t)0x00002000) /*!< MemManage is pended */ +#define SCB_SHCSR_BUSFAULTPENDED ((uint32_t)0x00004000) /*!< Bus Fault is pended */ +#define SCB_SHCSR_SVCALLPENDED ((uint32_t)0x00008000) /*!< SVCall is pended */ +#define SCB_SHCSR_MEMFAULTENA ((uint32_t)0x00010000) /*!< MemManage enable */ +#define SCB_SHCSR_BUSFAULTENA ((uint32_t)0x00020000) /*!< Bus Fault enable */ +#define SCB_SHCSR_USGFAULTENA ((uint32_t)0x00040000) /*!< UsageFault enable */ + +/******************* Bit definition for SCB_CFSR register *******************/ +/*!< MFSR */ +#define SCB_CFSR_IACCVIOL ((uint32_t)0x00000001) /*!< Instruction access violation */ +#define SCB_CFSR_DACCVIOL ((uint32_t)0x00000002) /*!< Data access violation */ +#define SCB_CFSR_MUNSTKERR ((uint32_t)0x00000008) /*!< Unstacking error */ +#define SCB_CFSR_MSTKERR ((uint32_t)0x00000010) /*!< Stacking error */ +#define SCB_CFSR_MMARVALID ((uint32_t)0x00000080) /*!< Memory Manage Address Register address valid flag */ +/*!< BFSR */ +#define SCB_CFSR_IBUSERR ((uint32_t)0x00000100) /*!< Instruction bus error flag */ +#define SCB_CFSR_PRECISERR ((uint32_t)0x00000200) /*!< Precise data bus error */ +#define SCB_CFSR_IMPRECISERR ((uint32_t)0x00000400) /*!< Imprecise data bus error */ +#define SCB_CFSR_UNSTKERR ((uint32_t)0x00000800) /*!< Unstacking error */ +#define SCB_CFSR_STKERR ((uint32_t)0x00001000) /*!< Stacking error */ +#define SCB_CFSR_BFARVALID ((uint32_t)0x00008000) /*!< Bus Fault Address Register address valid flag */ +/*!< UFSR */ +#define SCB_CFSR_UNDEFINSTR ((uint32_t)0x00010000) /*!< The processor attempt to execute an undefined instruction */ +#define SCB_CFSR_INVSTATE ((uint32_t)0x00020000) /*!< Invalid combination of EPSR and instruction */ +#define SCB_CFSR_INVPC ((uint32_t)0x00040000) /*!< Attempt to load EXC_RETURN into pc illegally */ +#define SCB_CFSR_NOCP ((uint32_t)0x00080000) /*!< Attempt to use a coprocessor instruction */ +#define SCB_CFSR_UNALIGNED ((uint32_t)0x01000000) /*!< Fault occurs when there is an attempt to make an unaligned memory access */ +#define SCB_CFSR_DIVBYZERO ((uint32_t)0x02000000) /*!< Fault occurs when SDIV or DIV instruction is used with a divisor of 0 */ + +/******************* Bit definition for SCB_HFSR register *******************/ +#define SCB_HFSR_VECTTBL ((uint32_t)0x00000002) /*!< Fault occurs because of vector table read on exception processing */ +#define SCB_HFSR_FORCED ((uint32_t)0x40000000) /*!< Hard Fault activated when a configurable Fault was received and cannot activate */ +#define SCB_HFSR_DEBUGEVT ((uint32_t)0x80000000) /*!< Fault related to debug */ + +/******************* Bit definition for SCB_DFSR register *******************/ +#define SCB_DFSR_HALTED ((uint8_t)0x01) /*!< Halt request flag */ +#define SCB_DFSR_BKPT ((uint8_t)0x02) /*!< BKPT flag */ +#define SCB_DFSR_DWTTRAP ((uint8_t)0x04) /*!< Data Watchpoint and Trace (DWT) flag */ +#define SCB_DFSR_VCATCH ((uint8_t)0x08) /*!< Vector catch flag */ +#define SCB_DFSR_EXTERNAL ((uint8_t)0x10) /*!< External debug request flag */ + +/******************* Bit definition for SCB_MMFAR register ******************/ +#define SCB_MMFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Mem Manage fault address field */ + +/******************* Bit definition for SCB_BFAR register *******************/ +#define SCB_BFAR_ADDRESS ((uint32_t)0xFFFFFFFF) /*!< Bus fault address field */ + +/******************* Bit definition for SCB_afsr register *******************/ +#define SCB_AFSR_IMPDEF ((uint32_t)0xFFFFFFFF) /*!< Implementation defined */ + +/******************************************************************************/ +/* */ +/* External Interrupt/Event Controller */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for EXTI_IMR register *******************/ +#define EXTI_IMR_MR0 ((uint32_t)0x00000001) /*!< Interrupt Mask on line 0 */ +#define EXTI_IMR_MR1 ((uint32_t)0x00000002) /*!< Interrupt Mask on line 1 */ +#define EXTI_IMR_MR2 ((uint32_t)0x00000004) /*!< Interrupt Mask on line 2 */ +#define EXTI_IMR_MR3 ((uint32_t)0x00000008) /*!< Interrupt Mask on line 3 */ +#define EXTI_IMR_MR4 ((uint32_t)0x00000010) /*!< Interrupt Mask on line 4 */ +#define EXTI_IMR_MR5 ((uint32_t)0x00000020) /*!< Interrupt Mask on line 5 */ +#define EXTI_IMR_MR6 ((uint32_t)0x00000040) /*!< Interrupt Mask on line 6 */ +#define EXTI_IMR_MR7 ((uint32_t)0x00000080) /*!< Interrupt Mask on line 7 */ +#define EXTI_IMR_MR8 ((uint32_t)0x00000100) /*!< Interrupt Mask on line 8 */ +#define EXTI_IMR_MR9 ((uint32_t)0x00000200) /*!< Interrupt Mask on line 9 */ +#define EXTI_IMR_MR10 ((uint32_t)0x00000400) /*!< Interrupt Mask on line 10 */ +#define EXTI_IMR_MR11 ((uint32_t)0x00000800) /*!< Interrupt Mask on line 11 */ +#define EXTI_IMR_MR12 ((uint32_t)0x00001000) /*!< Interrupt Mask on line 12 */ +#define EXTI_IMR_MR13 ((uint32_t)0x00002000) /*!< Interrupt Mask on line 13 */ +#define EXTI_IMR_MR14 ((uint32_t)0x00004000) /*!< Interrupt Mask on line 14 */ +#define EXTI_IMR_MR15 ((uint32_t)0x00008000) /*!< Interrupt Mask on line 15 */ +#define EXTI_IMR_MR16 ((uint32_t)0x00010000) /*!< Interrupt Mask on line 16 */ +#define EXTI_IMR_MR17 ((uint32_t)0x00020000) /*!< Interrupt Mask on line 17 */ +#define EXTI_IMR_MR18 ((uint32_t)0x00040000) /*!< Interrupt Mask on line 18 */ +#define EXTI_IMR_MR19 ((uint32_t)0x00080000) /*!< Interrupt Mask on line 19 */ + +/******************* Bit definition for EXTI_EMR register *******************/ +#define EXTI_EMR_MR0 ((uint32_t)0x00000001) /*!< Event Mask on line 0 */ +#define EXTI_EMR_MR1 ((uint32_t)0x00000002) /*!< Event Mask on line 1 */ +#define EXTI_EMR_MR2 ((uint32_t)0x00000004) /*!< Event Mask on line 2 */ +#define EXTI_EMR_MR3 ((uint32_t)0x00000008) /*!< Event Mask on line 3 */ +#define EXTI_EMR_MR4 ((uint32_t)0x00000010) /*!< Event Mask on line 4 */ +#define EXTI_EMR_MR5 ((uint32_t)0x00000020) /*!< Event Mask on line 5 */ +#define EXTI_EMR_MR6 ((uint32_t)0x00000040) /*!< Event Mask on line 6 */ +#define EXTI_EMR_MR7 ((uint32_t)0x00000080) /*!< Event Mask on line 7 */ +#define EXTI_EMR_MR8 ((uint32_t)0x00000100) /*!< Event Mask on line 8 */ +#define EXTI_EMR_MR9 ((uint32_t)0x00000200) /*!< Event Mask on line 9 */ +#define EXTI_EMR_MR10 ((uint32_t)0x00000400) /*!< Event Mask on line 10 */ +#define EXTI_EMR_MR11 ((uint32_t)0x00000800) /*!< Event Mask on line 11 */ +#define EXTI_EMR_MR12 ((uint32_t)0x00001000) /*!< Event Mask on line 12 */ +#define EXTI_EMR_MR13 ((uint32_t)0x00002000) /*!< Event Mask on line 13 */ +#define EXTI_EMR_MR14 ((uint32_t)0x00004000) /*!< Event Mask on line 14 */ +#define EXTI_EMR_MR15 ((uint32_t)0x00008000) /*!< Event Mask on line 15 */ +#define EXTI_EMR_MR16 ((uint32_t)0x00010000) /*!< Event Mask on line 16 */ +#define EXTI_EMR_MR17 ((uint32_t)0x00020000) /*!< Event Mask on line 17 */ +#define EXTI_EMR_MR18 ((uint32_t)0x00040000) /*!< Event Mask on line 18 */ +#define EXTI_EMR_MR19 ((uint32_t)0x00080000) /*!< Event Mask on line 19 */ + +/****************** Bit definition for EXTI_RTSR register *******************/ +#define EXTI_RTSR_TR0 ((uint32_t)0x00000001) /*!< Rising trigger event configuration bit of line 0 */ +#define EXTI_RTSR_TR1 ((uint32_t)0x00000002) /*!< Rising trigger event configuration bit of line 1 */ +#define EXTI_RTSR_TR2 ((uint32_t)0x00000004) /*!< Rising trigger event configuration bit of line 2 */ +#define EXTI_RTSR_TR3 ((uint32_t)0x00000008) /*!< Rising trigger event configuration bit of line 3 */ +#define EXTI_RTSR_TR4 ((uint32_t)0x00000010) /*!< Rising trigger event configuration bit of line 4 */ +#define EXTI_RTSR_TR5 ((uint32_t)0x00000020) /*!< Rising trigger event configuration bit of line 5 */ +#define EXTI_RTSR_TR6 ((uint32_t)0x00000040) /*!< Rising trigger event configuration bit of line 6 */ +#define EXTI_RTSR_TR7 ((uint32_t)0x00000080) /*!< Rising trigger event configuration bit of line 7 */ +#define EXTI_RTSR_TR8 ((uint32_t)0x00000100) /*!< Rising trigger event configuration bit of line 8 */ +#define EXTI_RTSR_TR9 ((uint32_t)0x00000200) /*!< Rising trigger event configuration bit of line 9 */ +#define EXTI_RTSR_TR10 ((uint32_t)0x00000400) /*!< Rising trigger event configuration bit of line 10 */ +#define EXTI_RTSR_TR11 ((uint32_t)0x00000800) /*!< Rising trigger event configuration bit of line 11 */ +#define EXTI_RTSR_TR12 ((uint32_t)0x00001000) /*!< Rising trigger event configuration bit of line 12 */ +#define EXTI_RTSR_TR13 ((uint32_t)0x00002000) /*!< Rising trigger event configuration bit of line 13 */ +#define EXTI_RTSR_TR14 ((uint32_t)0x00004000) /*!< Rising trigger event configuration bit of line 14 */ +#define EXTI_RTSR_TR15 ((uint32_t)0x00008000) /*!< Rising trigger event configuration bit of line 15 */ +#define EXTI_RTSR_TR16 ((uint32_t)0x00010000) /*!< Rising trigger event configuration bit of line 16 */ +#define EXTI_RTSR_TR17 ((uint32_t)0x00020000) /*!< Rising trigger event configuration bit of line 17 */ +#define EXTI_RTSR_TR18 ((uint32_t)0x00040000) /*!< Rising trigger event configuration bit of line 18 */ +#define EXTI_RTSR_TR19 ((uint32_t)0x00080000) /*!< Rising trigger event configuration bit of line 19 */ + +/****************** Bit definition for EXTI_FTSR register *******************/ +#define EXTI_FTSR_TR0 ((uint32_t)0x00000001) /*!< Falling trigger event configuration bit of line 0 */ +#define EXTI_FTSR_TR1 ((uint32_t)0x00000002) /*!< Falling trigger event configuration bit of line 1 */ +#define EXTI_FTSR_TR2 ((uint32_t)0x00000004) /*!< Falling trigger event configuration bit of line 2 */ +#define EXTI_FTSR_TR3 ((uint32_t)0x00000008) /*!< Falling trigger event configuration bit of line 3 */ +#define EXTI_FTSR_TR4 ((uint32_t)0x00000010) /*!< Falling trigger event configuration bit of line 4 */ +#define EXTI_FTSR_TR5 ((uint32_t)0x00000020) /*!< Falling trigger event configuration bit of line 5 */ +#define EXTI_FTSR_TR6 ((uint32_t)0x00000040) /*!< Falling trigger event configuration bit of line 6 */ +#define EXTI_FTSR_TR7 ((uint32_t)0x00000080) /*!< Falling trigger event configuration bit of line 7 */ +#define EXTI_FTSR_TR8 ((uint32_t)0x00000100) /*!< Falling trigger event configuration bit of line 8 */ +#define EXTI_FTSR_TR9 ((uint32_t)0x00000200) /*!< Falling trigger event configuration bit of line 9 */ +#define EXTI_FTSR_TR10 ((uint32_t)0x00000400) /*!< Falling trigger event configuration bit of line 10 */ +#define EXTI_FTSR_TR11 ((uint32_t)0x00000800) /*!< Falling trigger event configuration bit of line 11 */ +#define EXTI_FTSR_TR12 ((uint32_t)0x00001000) /*!< Falling trigger event configuration bit of line 12 */ +#define EXTI_FTSR_TR13 ((uint32_t)0x00002000) /*!< Falling trigger event configuration bit of line 13 */ +#define EXTI_FTSR_TR14 ((uint32_t)0x00004000) /*!< Falling trigger event configuration bit of line 14 */ +#define EXTI_FTSR_TR15 ((uint32_t)0x00008000) /*!< Falling trigger event configuration bit of line 15 */ +#define EXTI_FTSR_TR16 ((uint32_t)0x00010000) /*!< Falling trigger event configuration bit of line 16 */ +#define EXTI_FTSR_TR17 ((uint32_t)0x00020000) /*!< Falling trigger event configuration bit of line 17 */ +#define EXTI_FTSR_TR18 ((uint32_t)0x00040000) /*!< Falling trigger event configuration bit of line 18 */ +#define EXTI_FTSR_TR19 ((uint32_t)0x00080000) /*!< Falling trigger event configuration bit of line 19 */ + +/****************** Bit definition for EXTI_SWIER register ******************/ +#define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) /*!< Software Interrupt on line 0 */ +#define EXTI_SWIER_SWIER1 ((uint32_t)0x00000002) /*!< Software Interrupt on line 1 */ +#define EXTI_SWIER_SWIER2 ((uint32_t)0x00000004) /*!< Software Interrupt on line 2 */ +#define EXTI_SWIER_SWIER3 ((uint32_t)0x00000008) /*!< Software Interrupt on line 3 */ +#define EXTI_SWIER_SWIER4 ((uint32_t)0x00000010) /*!< Software Interrupt on line 4 */ +#define EXTI_SWIER_SWIER5 ((uint32_t)0x00000020) /*!< Software Interrupt on line 5 */ +#define EXTI_SWIER_SWIER6 ((uint32_t)0x00000040) /*!< Software Interrupt on line 6 */ +#define EXTI_SWIER_SWIER7 ((uint32_t)0x00000080) /*!< Software Interrupt on line 7 */ +#define EXTI_SWIER_SWIER8 ((uint32_t)0x00000100) /*!< Software Interrupt on line 8 */ +#define EXTI_SWIER_SWIER9 ((uint32_t)0x00000200) /*!< Software Interrupt on line 9 */ +#define EXTI_SWIER_SWIER10 ((uint32_t)0x00000400) /*!< Software Interrupt on line 10 */ +#define EXTI_SWIER_SWIER11 ((uint32_t)0x00000800) /*!< Software Interrupt on line 11 */ +#define EXTI_SWIER_SWIER12 ((uint32_t)0x00001000) /*!< Software Interrupt on line 12 */ +#define EXTI_SWIER_SWIER13 ((uint32_t)0x00002000) /*!< Software Interrupt on line 13 */ +#define EXTI_SWIER_SWIER14 ((uint32_t)0x00004000) /*!< Software Interrupt on line 14 */ +#define EXTI_SWIER_SWIER15 ((uint32_t)0x00008000) /*!< Software Interrupt on line 15 */ +#define EXTI_SWIER_SWIER16 ((uint32_t)0x00010000) /*!< Software Interrupt on line 16 */ +#define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) /*!< Software Interrupt on line 17 */ +#define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) /*!< Software Interrupt on line 18 */ +#define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) /*!< Software Interrupt on line 19 */ + +/******************* Bit definition for EXTI_PR register ********************/ +#define EXTI_PR_PR0 ((uint32_t)0x00000001) /*!< Pending bit for line 0 */ +#define EXTI_PR_PR1 ((uint32_t)0x00000002) /*!< Pending bit for line 1 */ +#define EXTI_PR_PR2 ((uint32_t)0x00000004) /*!< Pending bit for line 2 */ +#define EXTI_PR_PR3 ((uint32_t)0x00000008) /*!< Pending bit for line 3 */ +#define EXTI_PR_PR4 ((uint32_t)0x00000010) /*!< Pending bit for line 4 */ +#define EXTI_PR_PR5 ((uint32_t)0x00000020) /*!< Pending bit for line 5 */ +#define EXTI_PR_PR6 ((uint32_t)0x00000040) /*!< Pending bit for line 6 */ +#define EXTI_PR_PR7 ((uint32_t)0x00000080) /*!< Pending bit for line 7 */ +#define EXTI_PR_PR8 ((uint32_t)0x00000100) /*!< Pending bit for line 8 */ +#define EXTI_PR_PR9 ((uint32_t)0x00000200) /*!< Pending bit for line 9 */ +#define EXTI_PR_PR10 ((uint32_t)0x00000400) /*!< Pending bit for line 10 */ +#define EXTI_PR_PR11 ((uint32_t)0x00000800) /*!< Pending bit for line 11 */ +#define EXTI_PR_PR12 ((uint32_t)0x00001000) /*!< Pending bit for line 12 */ +#define EXTI_PR_PR13 ((uint32_t)0x00002000) /*!< Pending bit for line 13 */ +#define EXTI_PR_PR14 ((uint32_t)0x00004000) /*!< Pending bit for line 14 */ +#define EXTI_PR_PR15 ((uint32_t)0x00008000) /*!< Pending bit for line 15 */ +#define EXTI_PR_PR16 ((uint32_t)0x00010000) /*!< Pending bit for line 16 */ +#define EXTI_PR_PR17 ((uint32_t)0x00020000) /*!< Pending bit for line 17 */ +#define EXTI_PR_PR18 ((uint32_t)0x00040000) /*!< Pending bit for line 18 */ +#define EXTI_PR_PR19 ((uint32_t)0x00080000) /*!< Pending bit for line 19 */ + +/******************************************************************************/ +/* */ +/* DMA Controller */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for DMA_ISR register ********************/ +#define DMA_ISR_GIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt flag */ +#define DMA_ISR_TCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete flag */ +#define DMA_ISR_HTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer flag */ +#define DMA_ISR_TEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error flag */ +#define DMA_ISR_GIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt flag */ +#define DMA_ISR_TCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete flag */ +#define DMA_ISR_HTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer flag */ +#define DMA_ISR_TEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error flag */ +#define DMA_ISR_GIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt flag */ +#define DMA_ISR_TCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete flag */ +#define DMA_ISR_HTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer flag */ +#define DMA_ISR_TEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error flag */ +#define DMA_ISR_GIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt flag */ +#define DMA_ISR_TCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete flag */ +#define DMA_ISR_HTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer flag */ +#define DMA_ISR_TEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error flag */ +#define DMA_ISR_GIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt flag */ +#define DMA_ISR_TCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete flag */ +#define DMA_ISR_HTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer flag */ +#define DMA_ISR_TEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error flag */ +#define DMA_ISR_GIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt flag */ +#define DMA_ISR_TCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete flag */ +#define DMA_ISR_HTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer flag */ +#define DMA_ISR_TEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error flag */ +#define DMA_ISR_GIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt flag */ +#define DMA_ISR_TCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete flag */ +#define DMA_ISR_HTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer flag */ +#define DMA_ISR_TEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error flag */ + +/******************* Bit definition for DMA_IFCR register *******************/ +#define DMA_IFCR_CGIF1 ((uint32_t)0x00000001) /*!< Channel 1 Global interrupt clear */ +#define DMA_IFCR_CTCIF1 ((uint32_t)0x00000002) /*!< Channel 1 Transfer Complete clear */ +#define DMA_IFCR_CHTIF1 ((uint32_t)0x00000004) /*!< Channel 1 Half Transfer clear */ +#define DMA_IFCR_CTEIF1 ((uint32_t)0x00000008) /*!< Channel 1 Transfer Error clear */ +#define DMA_IFCR_CGIF2 ((uint32_t)0x00000010) /*!< Channel 2 Global interrupt clear */ +#define DMA_IFCR_CTCIF2 ((uint32_t)0x00000020) /*!< Channel 2 Transfer Complete clear */ +#define DMA_IFCR_CHTIF2 ((uint32_t)0x00000040) /*!< Channel 2 Half Transfer clear */ +#define DMA_IFCR_CTEIF2 ((uint32_t)0x00000080) /*!< Channel 2 Transfer Error clear */ +#define DMA_IFCR_CGIF3 ((uint32_t)0x00000100) /*!< Channel 3 Global interrupt clear */ +#define DMA_IFCR_CTCIF3 ((uint32_t)0x00000200) /*!< Channel 3 Transfer Complete clear */ +#define DMA_IFCR_CHTIF3 ((uint32_t)0x00000400) /*!< Channel 3 Half Transfer clear */ +#define DMA_IFCR_CTEIF3 ((uint32_t)0x00000800) /*!< Channel 3 Transfer Error clear */ +#define DMA_IFCR_CGIF4 ((uint32_t)0x00001000) /*!< Channel 4 Global interrupt clear */ +#define DMA_IFCR_CTCIF4 ((uint32_t)0x00002000) /*!< Channel 4 Transfer Complete clear */ +#define DMA_IFCR_CHTIF4 ((uint32_t)0x00004000) /*!< Channel 4 Half Transfer clear */ +#define DMA_IFCR_CTEIF4 ((uint32_t)0x00008000) /*!< Channel 4 Transfer Error clear */ +#define DMA_IFCR_CGIF5 ((uint32_t)0x00010000) /*!< Channel 5 Global interrupt clear */ +#define DMA_IFCR_CTCIF5 ((uint32_t)0x00020000) /*!< Channel 5 Transfer Complete clear */ +#define DMA_IFCR_CHTIF5 ((uint32_t)0x00040000) /*!< Channel 5 Half Transfer clear */ +#define DMA_IFCR_CTEIF5 ((uint32_t)0x00080000) /*!< Channel 5 Transfer Error clear */ +#define DMA_IFCR_CGIF6 ((uint32_t)0x00100000) /*!< Channel 6 Global interrupt clear */ +#define DMA_IFCR_CTCIF6 ((uint32_t)0x00200000) /*!< Channel 6 Transfer Complete clear */ +#define DMA_IFCR_CHTIF6 ((uint32_t)0x00400000) /*!< Channel 6 Half Transfer clear */ +#define DMA_IFCR_CTEIF6 ((uint32_t)0x00800000) /*!< Channel 6 Transfer Error clear */ +#define DMA_IFCR_CGIF7 ((uint32_t)0x01000000) /*!< Channel 7 Global interrupt clear */ +#define DMA_IFCR_CTCIF7 ((uint32_t)0x02000000) /*!< Channel 7 Transfer Complete clear */ +#define DMA_IFCR_CHTIF7 ((uint32_t)0x04000000) /*!< Channel 7 Half Transfer clear */ +#define DMA_IFCR_CTEIF7 ((uint32_t)0x08000000) /*!< Channel 7 Transfer Error clear */ + +/******************* Bit definition for DMA_CCR1 register *******************/ +#define DMA_CCR1_EN ((uint16_t)0x0001) /*!< Channel enable*/ +#define DMA_CCR1_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR1_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR1_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR1_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR1_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR1_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR1_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR1_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR1_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR1_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR1_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR1_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR1_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR1_PL ((uint16_t)0x3000) /*!< PL[1:0] bits(Channel Priority level) */ +#define DMA_CCR1_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR1_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR1_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/******************* Bit definition for DMA_CCR2 register *******************/ +#define DMA_CCR2_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR2_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR2_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR2_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR2_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR2_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR2_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR2_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR2_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR2_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR2_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR2_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR2_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR2_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR2_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR2_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR2_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR2_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/******************* Bit definition for DMA_CCR3 register *******************/ +#define DMA_CCR3_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR3_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR3_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR3_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR3_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR3_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR3_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR3_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR3_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR3_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR3_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR3_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR3_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR3_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR3_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR3_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR3_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR3_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/*!<****************** Bit definition for DMA_CCR4 register *******************/ +#define DMA_CCR4_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR4_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR4_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR4_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR4_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR4_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR4_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR4_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR4_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR4_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR4_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR4_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR4_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR4_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR4_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR4_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR4_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR4_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/****************** Bit definition for DMA_CCR5 register *******************/ +#define DMA_CCR5_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR5_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR5_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR5_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR5_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR5_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR5_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR5_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR5_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR5_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR5_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR5_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR5_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR5_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR5_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR5_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR5_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR5_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode enable */ + +/******************* Bit definition for DMA_CCR6 register *******************/ +#define DMA_CCR6_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR6_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR6_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR6_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR6_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR6_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR6_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR6_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR6_PSIZE ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR6_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR6_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR6_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR6_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR6_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR6_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR6_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR6_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR6_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode */ + +/******************* Bit definition for DMA_CCR7 register *******************/ +#define DMA_CCR7_EN ((uint16_t)0x0001) /*!< Channel enable */ +#define DMA_CCR7_TCIE ((uint16_t)0x0002) /*!< Transfer complete interrupt enable */ +#define DMA_CCR7_HTIE ((uint16_t)0x0004) /*!< Half Transfer interrupt enable */ +#define DMA_CCR7_TEIE ((uint16_t)0x0008) /*!< Transfer error interrupt enable */ +#define DMA_CCR7_DIR ((uint16_t)0x0010) /*!< Data transfer direction */ +#define DMA_CCR7_CIRC ((uint16_t)0x0020) /*!< Circular mode */ +#define DMA_CCR7_PINC ((uint16_t)0x0040) /*!< Peripheral increment mode */ +#define DMA_CCR7_MINC ((uint16_t)0x0080) /*!< Memory increment mode */ + +#define DMA_CCR7_PSIZE , ((uint16_t)0x0300) /*!< PSIZE[1:0] bits (Peripheral size) */ +#define DMA_CCR7_PSIZE_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define DMA_CCR7_PSIZE_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define DMA_CCR7_MSIZE ((uint16_t)0x0C00) /*!< MSIZE[1:0] bits (Memory size) */ +#define DMA_CCR7_MSIZE_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define DMA_CCR7_MSIZE_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define DMA_CCR7_PL ((uint16_t)0x3000) /*!< PL[1:0] bits (Channel Priority level) */ +#define DMA_CCR7_PL_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define DMA_CCR7_PL_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define DMA_CCR7_MEM2MEM ((uint16_t)0x4000) /*!< Memory to memory mode enable */ + +/****************** Bit definition for DMA_CNDTR1 register ******************/ +#define DMA_CNDTR1_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR2 register ******************/ +#define DMA_CNDTR2_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR3 register ******************/ +#define DMA_CNDTR3_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR4 register ******************/ +#define DMA_CNDTR4_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR5 register ******************/ +#define DMA_CNDTR5_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR6 register ******************/ +#define DMA_CNDTR6_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CNDTR7 register ******************/ +#define DMA_CNDTR7_NDT ((uint16_t)0xFFFF) /*!< Number of data to Transfer */ + +/****************** Bit definition for DMA_CPAR1 register *******************/ +#define DMA_CPAR1_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR2 register *******************/ +#define DMA_CPAR2_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR3 register *******************/ +#define DMA_CPAR3_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + + +/****************** Bit definition for DMA_CPAR4 register *******************/ +#define DMA_CPAR4_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR5 register *******************/ +#define DMA_CPAR5_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CPAR6 register *******************/ +#define DMA_CPAR6_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + + +/****************** Bit definition for DMA_CPAR7 register *******************/ +#define DMA_CPAR7_PA ((uint32_t)0xFFFFFFFF) /*!< Peripheral Address */ + +/****************** Bit definition for DMA_CMAR1 register *******************/ +#define DMA_CMAR1_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR2 register *******************/ +#define DMA_CMAR2_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR3 register *******************/ +#define DMA_CMAR3_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + + +/****************** Bit definition for DMA_CMAR4 register *******************/ +#define DMA_CMAR4_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR5 register *******************/ +#define DMA_CMAR5_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR6 register *******************/ +#define DMA_CMAR6_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/****************** Bit definition for DMA_CMAR7 register *******************/ +#define DMA_CMAR7_MA ((uint32_t)0xFFFFFFFF) /*!< Memory Address */ + +/******************************************************************************/ +/* */ +/* Analog to Digital Converter */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for ADC_SR register ********************/ +#define ADC_SR_AWD ((uint8_t)0x01) /*!< Analog watchdog flag */ +#define ADC_SR_EOC ((uint8_t)0x02) /*!< End of conversion */ +#define ADC_SR_JEOC ((uint8_t)0x04) /*!< Injected channel end of conversion */ +#define ADC_SR_JSTRT ((uint8_t)0x08) /*!< Injected channel Start flag */ +#define ADC_SR_STRT ((uint8_t)0x10) /*!< Regular channel Start flag */ + +/******************* Bit definition for ADC_CR1 register ********************/ +#define ADC_CR1_AWDCH ((uint32_t)0x0000001F) /*!< AWDCH[4:0] bits (Analog watchdog channel select bits) */ +#define ADC_CR1_AWDCH_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_CR1_AWDCH_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_CR1_AWDCH_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_CR1_AWDCH_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_CR1_AWDCH_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_CR1_EOCIE ((uint32_t)0x00000020) /*!< Interrupt enable for EOC */ +#define ADC_CR1_AWDIE ((uint32_t)0x00000040) /*!< Analog Watchdog interrupt enable */ +#define ADC_CR1_JEOCIE ((uint32_t)0x00000080) /*!< Interrupt enable for injected channels */ +#define ADC_CR1_SCAN ((uint32_t)0x00000100) /*!< Scan mode */ +#define ADC_CR1_AWDSGL ((uint32_t)0x00000200) /*!< Enable the watchdog on a single channel in scan mode */ +#define ADC_CR1_JAUTO ((uint32_t)0x00000400) /*!< Automatic injected group conversion */ +#define ADC_CR1_DISCEN ((uint32_t)0x00000800) /*!< Discontinuous mode on regular channels */ +#define ADC_CR1_JDISCEN ((uint32_t)0x00001000) /*!< Discontinuous mode on injected channels */ + +#define ADC_CR1_DISCNUM ((uint32_t)0x0000E000) /*!< DISCNUM[2:0] bits (Discontinuous mode channel count) */ +#define ADC_CR1_DISCNUM_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define ADC_CR1_DISCNUM_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define ADC_CR1_DISCNUM_2 ((uint32_t)0x00008000) /*!< Bit 2 */ + +#define ADC_CR1_DUALMOD ((uint32_t)0x000F0000) /*!< DUALMOD[3:0] bits (Dual mode selection) */ +#define ADC_CR1_DUALMOD_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define ADC_CR1_DUALMOD_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define ADC_CR1_DUALMOD_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define ADC_CR1_DUALMOD_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define ADC_CR1_JAWDEN ((uint32_t)0x00400000) /*!< Analog watchdog enable on injected channels */ +#define ADC_CR1_AWDEN ((uint32_t)0x00800000) /*!< Analog watchdog enable on regular channels */ + + +/******************* Bit definition for ADC_CR2 register ********************/ +#define ADC_CR2_ADON ((uint32_t)0x00000001) /*!< A/D Converter ON / OFF */ +#define ADC_CR2_CONT ((uint32_t)0x00000002) /*!< Continuous Conversion */ +#define ADC_CR2_CAL ((uint32_t)0x00000004) /*!< A/D Calibration */ +#define ADC_CR2_RSTCAL ((uint32_t)0x00000008) /*!< Reset Calibration */ +#define ADC_CR2_DMA ((uint32_t)0x00000100) /*!< Direct Memory access mode */ +#define ADC_CR2_ALIGN ((uint32_t)0x00000800) /*!< Data Alignment */ + +#define ADC_CR2_JEXTSEL ((uint32_t)0x00007000) /*!< JEXTSEL[2:0] bits (External event select for injected group) */ +#define ADC_CR2_JEXTSEL_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define ADC_CR2_JEXTSEL_1 ((uint32_t)0x00002000) /*!< Bit 1 */ +#define ADC_CR2_JEXTSEL_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + +#define ADC_CR2_JEXTTRIG ((uint32_t)0x00008000) /*!< External Trigger Conversion mode for injected channels */ + +#define ADC_CR2_EXTSEL ((uint32_t)0x000E0000) /*!< EXTSEL[2:0] bits (External Event Select for regular group) */ +#define ADC_CR2_EXTSEL_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define ADC_CR2_EXTSEL_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define ADC_CR2_EXTSEL_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +#define ADC_CR2_EXTTRIG ((uint32_t)0x00100000) /*!< External Trigger Conversion mode for regular channels */ +#define ADC_CR2_JSWSTART ((uint32_t)0x00200000) /*!< Start Conversion of injected channels */ +#define ADC_CR2_SWSTART ((uint32_t)0x00400000) /*!< Start Conversion of regular channels */ +#define ADC_CR2_TSVREFE ((uint32_t)0x00800000) /*!< Temperature Sensor and VREFINT Enable */ + +/****************** Bit definition for ADC_SMPR1 register *******************/ +#define ADC_SMPR1_SMP10 ((uint32_t)0x00000007) /*!< SMP10[2:0] bits (Channel 10 Sample time selection) */ +#define ADC_SMPR1_SMP10_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SMPR1_SMP10_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SMPR1_SMP10_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP11 ((uint32_t)0x00000038) /*!< SMP11[2:0] bits (Channel 11 Sample time selection) */ +#define ADC_SMPR1_SMP11_0 ((uint32_t)0x00000008) /*!< Bit 0 */ +#define ADC_SMPR1_SMP11_1 ((uint32_t)0x00000010) /*!< Bit 1 */ +#define ADC_SMPR1_SMP11_2 ((uint32_t)0x00000020) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP12 ((uint32_t)0x000001C0) /*!< SMP12[2:0] bits (Channel 12 Sample time selection) */ +#define ADC_SMPR1_SMP12_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define ADC_SMPR1_SMP12_1 ((uint32_t)0x00000080) /*!< Bit 1 */ +#define ADC_SMPR1_SMP12_2 ((uint32_t)0x00000100) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP13 ((uint32_t)0x00000E00) /*!< SMP13[2:0] bits (Channel 13 Sample time selection) */ +#define ADC_SMPR1_SMP13_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define ADC_SMPR1_SMP13_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define ADC_SMPR1_SMP13_2 ((uint32_t)0x00000800) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP14 ((uint32_t)0x00007000) /*!< SMP14[2:0] bits (Channel 14 Sample time selection) */ +#define ADC_SMPR1_SMP14_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP14_1 ((uint32_t)0x00002000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP14_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP15 ((uint32_t)0x00038000) /*!< SMP15[2:0] bits (Channel 15 Sample time selection) */ +#define ADC_SMPR1_SMP15_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP15_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP15_2 ((uint32_t)0x00020000) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP16 ((uint32_t)0x001C0000) /*!< SMP16[2:0] bits (Channel 16 Sample time selection) */ +#define ADC_SMPR1_SMP16_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP16_1 ((uint32_t)0x00080000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP16_2 ((uint32_t)0x00100000) /*!< Bit 2 */ + +#define ADC_SMPR1_SMP17 ((uint32_t)0x00E00000) /*!< SMP17[2:0] bits (Channel 17 Sample time selection) */ +#define ADC_SMPR1_SMP17_0 ((uint32_t)0x00200000) /*!< Bit 0 */ +#define ADC_SMPR1_SMP17_1 ((uint32_t)0x00400000) /*!< Bit 1 */ +#define ADC_SMPR1_SMP17_2 ((uint32_t)0x00800000) /*!< Bit 2 */ + +/****************** Bit definition for ADC_SMPR2 register *******************/ +#define ADC_SMPR2_SMP0 ((uint32_t)0x00000007) /*!< SMP0[2:0] bits (Channel 0 Sample time selection) */ +#define ADC_SMPR2_SMP0_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SMPR2_SMP0_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SMPR2_SMP0_2 ((uint32_t)0x00000004) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP1 ((uint32_t)0x00000038) /*!< SMP1[2:0] bits (Channel 1 Sample time selection) */ +#define ADC_SMPR2_SMP1_0 ((uint32_t)0x00000008) /*!< Bit 0 */ +#define ADC_SMPR2_SMP1_1 ((uint32_t)0x00000010) /*!< Bit 1 */ +#define ADC_SMPR2_SMP1_2 ((uint32_t)0x00000020) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP2 ((uint32_t)0x000001C0) /*!< SMP2[2:0] bits (Channel 2 Sample time selection) */ +#define ADC_SMPR2_SMP2_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define ADC_SMPR2_SMP2_1 ((uint32_t)0x00000080) /*!< Bit 1 */ +#define ADC_SMPR2_SMP2_2 ((uint32_t)0x00000100) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP3 ((uint32_t)0x00000E00) /*!< SMP3[2:0] bits (Channel 3 Sample time selection) */ +#define ADC_SMPR2_SMP3_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define ADC_SMPR2_SMP3_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define ADC_SMPR2_SMP3_2 ((uint32_t)0x00000800) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP4 ((uint32_t)0x00007000) /*!< SMP4[2:0] bits (Channel 4 Sample time selection) */ +#define ADC_SMPR2_SMP4_0 ((uint32_t)0x00001000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP4_1 ((uint32_t)0x00002000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP4_2 ((uint32_t)0x00004000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP5 ((uint32_t)0x00038000) /*!< SMP5[2:0] bits (Channel 5 Sample time selection) */ +#define ADC_SMPR2_SMP5_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP5_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP5_2 ((uint32_t)0x00020000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP6 ((uint32_t)0x001C0000) /*!< SMP6[2:0] bits (Channel 6 Sample time selection) */ +#define ADC_SMPR2_SMP6_0 ((uint32_t)0x00040000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP6_1 ((uint32_t)0x00080000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP6_2 ((uint32_t)0x00100000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP7 ((uint32_t)0x00E00000) /*!< SMP7[2:0] bits (Channel 7 Sample time selection) */ +#define ADC_SMPR2_SMP7_0 ((uint32_t)0x00200000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP7_1 ((uint32_t)0x00400000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP7_2 ((uint32_t)0x00800000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP8 ((uint32_t)0x07000000) /*!< SMP8[2:0] bits (Channel 8 Sample time selection) */ +#define ADC_SMPR2_SMP8_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP8_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP8_2 ((uint32_t)0x04000000) /*!< Bit 2 */ + +#define ADC_SMPR2_SMP9 ((uint32_t)0x38000000) /*!< SMP9[2:0] bits (Channel 9 Sample time selection) */ +#define ADC_SMPR2_SMP9_0 ((uint32_t)0x08000000) /*!< Bit 0 */ +#define ADC_SMPR2_SMP9_1 ((uint32_t)0x10000000) /*!< Bit 1 */ +#define ADC_SMPR2_SMP9_2 ((uint32_t)0x20000000) /*!< Bit 2 */ + +/****************** Bit definition for ADC_JOFR1 register *******************/ +#define ADC_JOFR1_JOFFSET1 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 1 */ + +/****************** Bit definition for ADC_JOFR2 register *******************/ +#define ADC_JOFR2_JOFFSET2 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 2 */ + +/****************** Bit definition for ADC_JOFR3 register *******************/ +#define ADC_JOFR3_JOFFSET3 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 3 */ + +/****************** Bit definition for ADC_JOFR4 register *******************/ +#define ADC_JOFR4_JOFFSET4 ((uint16_t)0x0FFF) /*!< Data offset for injected channel 4 */ + +/******************* Bit definition for ADC_HTR register ********************/ +#define ADC_HTR_HT ((uint16_t)0x0FFF) /*!< Analog watchdog high threshold */ + +/******************* Bit definition for ADC_LTR register ********************/ +#define ADC_LTR_LT ((uint16_t)0x0FFF) /*!< Analog watchdog low threshold */ + +/******************* Bit definition for ADC_SQR1 register *******************/ +#define ADC_SQR1_SQ13 ((uint32_t)0x0000001F) /*!< SQ13[4:0] bits (13th conversion in regular sequence) */ +#define ADC_SQR1_SQ13_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SQR1_SQ13_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SQR1_SQ13_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_SQR1_SQ13_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_SQR1_SQ13_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_SQR1_SQ14 ((uint32_t)0x000003E0) /*!< SQ14[4:0] bits (14th conversion in regular sequence) */ +#define ADC_SQR1_SQ14_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_SQR1_SQ14_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_SQR1_SQ14_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_SQR1_SQ14_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_SQR1_SQ14_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_SQR1_SQ15 ((uint32_t)0x00007C00) /*!< SQ15[4:0] bits (15th conversion in regular sequence) */ +#define ADC_SQR1_SQ15_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_SQR1_SQ15_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_SQR1_SQ15_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_SQR1_SQ15_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_SQR1_SQ15_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_SQR1_SQ16 ((uint32_t)0x000F8000) /*!< SQ16[4:0] bits (16th conversion in regular sequence) */ +#define ADC_SQR1_SQ16_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SQR1_SQ16_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SQR1_SQ16_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_SQR1_SQ16_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_SQR1_SQ16_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_SQR1_L ((uint32_t)0x00F00000) /*!< L[3:0] bits (Regular channel sequence length) */ +#define ADC_SQR1_L_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_SQR1_L_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define ADC_SQR1_L_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define ADC_SQR1_L_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +/******************* Bit definition for ADC_SQR2 register *******************/ +#define ADC_SQR2_SQ7 ((uint32_t)0x0000001F) /*!< SQ7[4:0] bits (7th conversion in regular sequence) */ +#define ADC_SQR2_SQ7_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SQR2_SQ7_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SQR2_SQ7_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_SQR2_SQ7_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_SQR2_SQ7_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_SQR2_SQ8 ((uint32_t)0x000003E0) /*!< SQ8[4:0] bits (8th conversion in regular sequence) */ +#define ADC_SQR2_SQ8_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_SQR2_SQ8_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_SQR2_SQ8_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_SQR2_SQ8_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_SQR2_SQ8_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_SQR2_SQ9 ((uint32_t)0x00007C00) /*!< SQ9[4:0] bits (9th conversion in regular sequence) */ +#define ADC_SQR2_SQ9_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_SQR2_SQ9_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_SQR2_SQ9_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_SQR2_SQ9_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_SQR2_SQ9_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_SQR2_SQ10 ((uint32_t)0x000F8000) /*!< SQ10[4:0] bits (10th conversion in regular sequence) */ +#define ADC_SQR2_SQ10_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SQR2_SQ10_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SQR2_SQ10_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_SQR2_SQ10_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_SQR2_SQ10_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_SQR2_SQ11 ((uint32_t)0x01F00000) /*!< SQ11[4:0] bits (11th conversion in regular sequence) */ +#define ADC_SQR2_SQ11_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_SQR2_SQ11_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define ADC_SQR2_SQ11_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define ADC_SQR2_SQ11_3 ((uint32_t)0x00800000) /*!< Bit 3 */ +#define ADC_SQR2_SQ11_4 ((uint32_t)0x01000000) /*!< Bit 4 */ + +#define ADC_SQR2_SQ12 ((uint32_t)0x3E000000) /*!< SQ12[4:0] bits (12th conversion in regular sequence) */ +#define ADC_SQR2_SQ12_0 ((uint32_t)0x02000000) /*!< Bit 0 */ +#define ADC_SQR2_SQ12_1 ((uint32_t)0x04000000) /*!< Bit 1 */ +#define ADC_SQR2_SQ12_2 ((uint32_t)0x08000000) /*!< Bit 2 */ +#define ADC_SQR2_SQ12_3 ((uint32_t)0x10000000) /*!< Bit 3 */ +#define ADC_SQR2_SQ12_4 ((uint32_t)0x20000000) /*!< Bit 4 */ + +/******************* Bit definition for ADC_SQR3 register *******************/ +#define ADC_SQR3_SQ1 ((uint32_t)0x0000001F) /*!< SQ1[4:0] bits (1st conversion in regular sequence) */ +#define ADC_SQR3_SQ1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_SQR3_SQ1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_SQR3_SQ1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_SQR3_SQ1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_SQR3_SQ1_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_SQR3_SQ2 ((uint32_t)0x000003E0) /*!< SQ2[4:0] bits (2nd conversion in regular sequence) */ +#define ADC_SQR3_SQ2_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_SQR3_SQ2_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_SQR3_SQ2_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_SQR3_SQ2_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_SQR3_SQ2_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_SQR3_SQ3 ((uint32_t)0x00007C00) /*!< SQ3[4:0] bits (3rd conversion in regular sequence) */ +#define ADC_SQR3_SQ3_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_SQR3_SQ3_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_SQR3_SQ3_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_SQR3_SQ3_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_SQR3_SQ3_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_SQR3_SQ4 ((uint32_t)0x000F8000) /*!< SQ4[4:0] bits (4th conversion in regular sequence) */ +#define ADC_SQR3_SQ4_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_SQR3_SQ4_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_SQR3_SQ4_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_SQR3_SQ4_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_SQR3_SQ4_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_SQR3_SQ5 ((uint32_t)0x01F00000) /*!< SQ5[4:0] bits (5th conversion in regular sequence) */ +#define ADC_SQR3_SQ5_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_SQR3_SQ5_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define ADC_SQR3_SQ5_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define ADC_SQR3_SQ5_3 ((uint32_t)0x00800000) /*!< Bit 3 */ +#define ADC_SQR3_SQ5_4 ((uint32_t)0x01000000) /*!< Bit 4 */ + +#define ADC_SQR3_SQ6 ((uint32_t)0x3E000000) /*!< SQ6[4:0] bits (6th conversion in regular sequence) */ +#define ADC_SQR3_SQ6_0 ((uint32_t)0x02000000) /*!< Bit 0 */ +#define ADC_SQR3_SQ6_1 ((uint32_t)0x04000000) /*!< Bit 1 */ +#define ADC_SQR3_SQ6_2 ((uint32_t)0x08000000) /*!< Bit 2 */ +#define ADC_SQR3_SQ6_3 ((uint32_t)0x10000000) /*!< Bit 3 */ +#define ADC_SQR3_SQ6_4 ((uint32_t)0x20000000) /*!< Bit 4 */ + +/******************* Bit definition for ADC_JSQR register *******************/ +#define ADC_JSQR_JSQ1 ((uint32_t)0x0000001F) /*!< JSQ1[4:0] bits (1st conversion in injected sequence) */ +#define ADC_JSQR_JSQ1_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define ADC_JSQR_JSQ1_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define ADC_JSQR_JSQ1_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define ADC_JSQR_JSQ1_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define ADC_JSQR_JSQ1_4 ((uint32_t)0x00000010) /*!< Bit 4 */ + +#define ADC_JSQR_JSQ2 ((uint32_t)0x000003E0) /*!< JSQ2[4:0] bits (2nd conversion in injected sequence) */ +#define ADC_JSQR_JSQ2_0 ((uint32_t)0x00000020) /*!< Bit 0 */ +#define ADC_JSQR_JSQ2_1 ((uint32_t)0x00000040) /*!< Bit 1 */ +#define ADC_JSQR_JSQ2_2 ((uint32_t)0x00000080) /*!< Bit 2 */ +#define ADC_JSQR_JSQ2_3 ((uint32_t)0x00000100) /*!< Bit 3 */ +#define ADC_JSQR_JSQ2_4 ((uint32_t)0x00000200) /*!< Bit 4 */ + +#define ADC_JSQR_JSQ3 ((uint32_t)0x00007C00) /*!< JSQ3[4:0] bits (3rd conversion in injected sequence) */ +#define ADC_JSQR_JSQ3_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define ADC_JSQR_JSQ3_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define ADC_JSQR_JSQ3_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define ADC_JSQR_JSQ3_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define ADC_JSQR_JSQ3_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define ADC_JSQR_JSQ4 ((uint32_t)0x000F8000) /*!< JSQ4[4:0] bits (4th conversion in injected sequence) */ +#define ADC_JSQR_JSQ4_0 ((uint32_t)0x00008000) /*!< Bit 0 */ +#define ADC_JSQR_JSQ4_1 ((uint32_t)0x00010000) /*!< Bit 1 */ +#define ADC_JSQR_JSQ4_2 ((uint32_t)0x00020000) /*!< Bit 2 */ +#define ADC_JSQR_JSQ4_3 ((uint32_t)0x00040000) /*!< Bit 3 */ +#define ADC_JSQR_JSQ4_4 ((uint32_t)0x00080000) /*!< Bit 4 */ + +#define ADC_JSQR_JL ((uint32_t)0x00300000) /*!< JL[1:0] bits (Injected Sequence length) */ +#define ADC_JSQR_JL_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define ADC_JSQR_JL_1 ((uint32_t)0x00200000) /*!< Bit 1 */ + +/******************* Bit definition for ADC_JDR1 register *******************/ +#define ADC_JDR1_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************* Bit definition for ADC_JDR2 register *******************/ +#define ADC_JDR2_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************* Bit definition for ADC_JDR3 register *******************/ +#define ADC_JDR3_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************* Bit definition for ADC_JDR4 register *******************/ +#define ADC_JDR4_JDATA ((uint16_t)0xFFFF) /*!< Injected data */ + +/******************** Bit definition for ADC_DR register ********************/ +#define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!< Regular data */ +#define ADC_DR_ADC2DATA ((uint32_t)0xFFFF0000) /*!< ADC2 data */ + +/******************************************************************************/ +/* */ +/* Digital to Analog Converter */ +/* */ +/******************************************************************************/ + +/******************** Bit definition for DAC_CR register ********************/ +#define DAC_CR_EN1 ((uint32_t)0x00000001) /*!< DAC channel1 enable */ +#define DAC_CR_BOFF1 ((uint32_t)0x00000002) /*!< DAC channel1 output buffer disable */ +#define DAC_CR_TEN1 ((uint32_t)0x00000004) /*!< DAC channel1 Trigger enable */ + +#define DAC_CR_TSEL1 ((uint32_t)0x00000038) /*!< TSEL1[2:0] (DAC channel1 Trigger selection) */ +#define DAC_CR_TSEL1_0 ((uint32_t)0x00000008) /*!< Bit 0 */ +#define DAC_CR_TSEL1_1 ((uint32_t)0x00000010) /*!< Bit 1 */ +#define DAC_CR_TSEL1_2 ((uint32_t)0x00000020) /*!< Bit 2 */ + +#define DAC_CR_WAVE1 ((uint32_t)0x000000C0) /*!< WAVE1[1:0] (DAC channel1 noise/triangle wave generation enable) */ +#define DAC_CR_WAVE1_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define DAC_CR_WAVE1_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define DAC_CR_MAMP1 ((uint32_t)0x00000F00) /*!< MAMP1[3:0] (DAC channel1 Mask/Amplitude selector) */ +#define DAC_CR_MAMP1_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define DAC_CR_MAMP1_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define DAC_CR_MAMP1_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define DAC_CR_MAMP1_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define DAC_CR_DMAEN1 ((uint32_t)0x00001000) /*!< DAC channel1 DMA enable */ +#define DAC_CR_EN2 ((uint32_t)0x00010000) /*!< DAC channel2 enable */ +#define DAC_CR_BOFF2 ((uint32_t)0x00020000) /*!< DAC channel2 output buffer disable */ +#define DAC_CR_TEN2 ((uint32_t)0x00040000) /*!< DAC channel2 Trigger enable */ + +#define DAC_CR_TSEL2 ((uint32_t)0x00380000) /*!< TSEL2[2:0] (DAC channel2 Trigger selection) */ +#define DAC_CR_TSEL2_0 ((uint32_t)0x00080000) /*!< Bit 0 */ +#define DAC_CR_TSEL2_1 ((uint32_t)0x00100000) /*!< Bit 1 */ +#define DAC_CR_TSEL2_2 ((uint32_t)0x00200000) /*!< Bit 2 */ + +#define DAC_CR_WAVE2 ((uint32_t)0x00C00000) /*!< WAVE2[1:0] (DAC channel2 noise/triangle wave generation enable) */ +#define DAC_CR_WAVE2_0 ((uint32_t)0x00400000) /*!< Bit 0 */ +#define DAC_CR_WAVE2_1 ((uint32_t)0x00800000) /*!< Bit 1 */ + +#define DAC_CR_MAMP2 ((uint32_t)0x0F000000) /*!< MAMP2[3:0] (DAC channel2 Mask/Amplitude selector) */ +#define DAC_CR_MAMP2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define DAC_CR_MAMP2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define DAC_CR_MAMP2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define DAC_CR_MAMP2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define DAC_CR_DMAEN2 ((uint32_t)0x10000000) /*!< DAC channel2 DMA enabled */ + +/***************** Bit definition for DAC_SWTRIGR register ******************/ +#define DAC_SWTRIGR_SWTRIG1 ((uint8_t)0x01) /*!< DAC channel1 software trigger */ +#define DAC_SWTRIGR_SWTRIG2 ((uint8_t)0x02) /*!< DAC channel2 software trigger */ + +/***************** Bit definition for DAC_DHR12R1 register ******************/ +#define DAC_DHR12R1_DACC1DHR ((uint16_t)0x0FFF) /*!< DAC channel1 12-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12L1 register ******************/ +#define DAC_DHR12L1_DACC1DHR ((uint16_t)0xFFF0) /*!< DAC channel1 12-bit Left aligned data */ + +/****************** Bit definition for DAC_DHR8R1 register ******************/ +#define DAC_DHR8R1_DACC1DHR ((uint8_t)0xFF) /*!< DAC channel1 8-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12R2 register ******************/ +#define DAC_DHR12R2_DACC2DHR ((uint16_t)0x0FFF) /*!< DAC channel2 12-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12L2 register ******************/ +#define DAC_DHR12L2_DACC2DHR ((uint16_t)0xFFF0) /*!< DAC channel2 12-bit Left aligned data */ + +/****************** Bit definition for DAC_DHR8R2 register ******************/ +#define DAC_DHR8R2_DACC2DHR ((uint8_t)0xFF) /*!< DAC channel2 8-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12RD register ******************/ +#define DAC_DHR12RD_DACC1DHR ((uint32_t)0x00000FFF) /*!< DAC channel1 12-bit Right aligned data */ +#define DAC_DHR12RD_DACC2DHR ((uint32_t)0x0FFF0000) /*!< DAC channel2 12-bit Right aligned data */ + +/***************** Bit definition for DAC_DHR12LD register ******************/ +#define DAC_DHR12LD_DACC1DHR ((uint32_t)0x0000FFF0) /*!< DAC channel1 12-bit Left aligned data */ +#define DAC_DHR12LD_DACC2DHR ((uint32_t)0xFFF00000) /*!< DAC channel2 12-bit Left aligned data */ + +/****************** Bit definition for DAC_DHR8RD register ******************/ +#define DAC_DHR8RD_DACC1DHR ((uint16_t)0x00FF) /*!< DAC channel1 8-bit Right aligned data */ +#define DAC_DHR8RD_DACC2DHR ((uint16_t)0xFF00) /*!< DAC channel2 8-bit Right aligned data */ + +/******************* Bit definition for DAC_DOR1 register *******************/ +#define DAC_DOR1_DACC1DOR ((uint16_t)0x0FFF) /*!< DAC channel1 data output */ + +/******************* Bit definition for DAC_DOR2 register *******************/ +#define DAC_DOR2_DACC2DOR ((uint16_t)0x0FFF) /*!< DAC channel2 data output */ + +/******************** Bit definition for DAC_SR register ********************/ +#define DAC_SR_DMAUDR1 ((uint32_t)0x00002000) /*!< DAC channel1 DMA underrun flag */ +#define DAC_SR_DMAUDR2 ((uint32_t)0x20000000) /*!< DAC channel2 DMA underrun flag */ + +/******************************************************************************/ +/* */ +/* CEC */ +/* */ +/******************************************************************************/ +/******************** Bit definition for CEC_CFGR register ******************/ +#define CEC_CFGR_PE ((uint16_t)0x0001) /*!< Peripheral Enable */ +#define CEC_CFGR_IE ((uint16_t)0x0002) /*!< Interrupt Enable */ +#define CEC_CFGR_BTEM ((uint16_t)0x0004) /*!< Bit Timing Error Mode */ +#define CEC_CFGR_BPEM ((uint16_t)0x0008) /*!< Bit Period Error Mode */ + +/******************** Bit definition for CEC_OAR register ******************/ +#define CEC_OAR_OA ((uint16_t)0x000F) /*!< OA[3:0]: Own Address */ +#define CEC_OAR_OA_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define CEC_OAR_OA_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define CEC_OAR_OA_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define CEC_OAR_OA_3 ((uint16_t)0x0008) /*!< Bit 3 */ + +/******************** Bit definition for CEC_PRES register ******************/ +#define CEC_PRES_PRES ((uint16_t)0x3FFF) /*!< Prescaler Counter Value */ + +/******************** Bit definition for CEC_ESR register ******************/ +#define CEC_ESR_BTE ((uint16_t)0x0001) /*!< Bit Timing Error */ +#define CEC_ESR_BPE ((uint16_t)0x0002) /*!< Bit Period Error */ +#define CEC_ESR_RBTFE ((uint16_t)0x0004) /*!< Rx Block Transfer Finished Error */ +#define CEC_ESR_SBE ((uint16_t)0x0008) /*!< Start Bit Error */ +#define CEC_ESR_ACKE ((uint16_t)0x0010) /*!< Block Acknowledge Error */ +#define CEC_ESR_LINE ((uint16_t)0x0020) /*!< Line Error */ +#define CEC_ESR_TBTFE ((uint16_t)0x0040) /*!< Tx Block Transfer Finished Error */ + +/******************** Bit definition for CEC_CSR register ******************/ +#define CEC_CSR_TSOM ((uint16_t)0x0001) /*!< Tx Start Of Message */ +#define CEC_CSR_TEOM ((uint16_t)0x0002) /*!< Tx End Of Message */ +#define CEC_CSR_TERR ((uint16_t)0x0004) /*!< Tx Error */ +#define CEC_CSR_TBTRF ((uint16_t)0x0008) /*!< Tx Byte Transfer Request or Block Transfer Finished */ +#define CEC_CSR_RSOM ((uint16_t)0x0010) /*!< Rx Start Of Message */ +#define CEC_CSR_REOM ((uint16_t)0x0020) /*!< Rx End Of Message */ +#define CEC_CSR_RERR ((uint16_t)0x0040) /*!< Rx Error */ +#define CEC_CSR_RBTF ((uint16_t)0x0080) /*!< Rx Block Transfer Finished */ + +/******************** Bit definition for CEC_TXD register ******************/ +#define CEC_TXD_TXD ((uint16_t)0x00FF) /*!< Tx Data register */ + +/******************** Bit definition for CEC_RXD register ******************/ +#define CEC_RXD_RXD ((uint16_t)0x00FF) /*!< Rx Data register */ + +/******************************************************************************/ +/* */ +/* TIM */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for TIM_CR1 register ********************/ +#define TIM_CR1_CEN ((uint16_t)0x0001) /*!< Counter enable */ +#define TIM_CR1_UDIS ((uint16_t)0x0002) /*!< Update disable */ +#define TIM_CR1_URS ((uint16_t)0x0004) /*!< Update request source */ +#define TIM_CR1_OPM ((uint16_t)0x0008) /*!< One pulse mode */ +#define TIM_CR1_DIR ((uint16_t)0x0010) /*!< Direction */ + +#define TIM_CR1_CMS ((uint16_t)0x0060) /*!< CMS[1:0] bits (Center-aligned mode selection) */ +#define TIM_CR1_CMS_0 ((uint16_t)0x0020) /*!< Bit 0 */ +#define TIM_CR1_CMS_1 ((uint16_t)0x0040) /*!< Bit 1 */ + +#define TIM_CR1_ARPE ((uint16_t)0x0080) /*!< Auto-reload preload enable */ + +#define TIM_CR1_CKD ((uint16_t)0x0300) /*!< CKD[1:0] bits (clock division) */ +#define TIM_CR1_CKD_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_CR1_CKD_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +/******************* Bit definition for TIM_CR2 register ********************/ +#define TIM_CR2_CCPC ((uint16_t)0x0001) /*!< Capture/Compare Preloaded Control */ +#define TIM_CR2_CCUS ((uint16_t)0x0004) /*!< Capture/Compare Control Update Selection */ +#define TIM_CR2_CCDS ((uint16_t)0x0008) /*!< Capture/Compare DMA Selection */ + +#define TIM_CR2_MMS ((uint16_t)0x0070) /*!< MMS[2:0] bits (Master Mode Selection) */ +#define TIM_CR2_MMS_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CR2_MMS_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CR2_MMS_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_CR2_TI1S ((uint16_t)0x0080) /*!< TI1 Selection */ +#define TIM_CR2_OIS1 ((uint16_t)0x0100) /*!< Output Idle state 1 (OC1 output) */ +#define TIM_CR2_OIS1N ((uint16_t)0x0200) /*!< Output Idle state 1 (OC1N output) */ +#define TIM_CR2_OIS2 ((uint16_t)0x0400) /*!< Output Idle state 2 (OC2 output) */ +#define TIM_CR2_OIS2N ((uint16_t)0x0800) /*!< Output Idle state 2 (OC2N output) */ +#define TIM_CR2_OIS3 ((uint16_t)0x1000) /*!< Output Idle state 3 (OC3 output) */ +#define TIM_CR2_OIS3N ((uint16_t)0x2000) /*!< Output Idle state 3 (OC3N output) */ +#define TIM_CR2_OIS4 ((uint16_t)0x4000) /*!< Output Idle state 4 (OC4 output) */ + +/******************* Bit definition for TIM_SMCR register *******************/ +#define TIM_SMCR_SMS ((uint16_t)0x0007) /*!< SMS[2:0] bits (Slave mode selection) */ +#define TIM_SMCR_SMS_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_SMCR_SMS_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define TIM_SMCR_SMS_2 ((uint16_t)0x0004) /*!< Bit 2 */ + +#define TIM_SMCR_TS ((uint16_t)0x0070) /*!< TS[2:0] bits (Trigger selection) */ +#define TIM_SMCR_TS_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_SMCR_TS_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_SMCR_TS_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_SMCR_MSM ((uint16_t)0x0080) /*!< Master/slave mode */ + +#define TIM_SMCR_ETF ((uint16_t)0x0F00) /*!< ETF[3:0] bits (External trigger filter) */ +#define TIM_SMCR_ETF_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_SMCR_ETF_1 ((uint16_t)0x0200) /*!< Bit 1 */ +#define TIM_SMCR_ETF_2 ((uint16_t)0x0400) /*!< Bit 2 */ +#define TIM_SMCR_ETF_3 ((uint16_t)0x0800) /*!< Bit 3 */ + +#define TIM_SMCR_ETPS ((uint16_t)0x3000) /*!< ETPS[1:0] bits (External trigger prescaler) */ +#define TIM_SMCR_ETPS_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_SMCR_ETPS_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define TIM_SMCR_ECE ((uint16_t)0x4000) /*!< External clock enable */ +#define TIM_SMCR_ETP ((uint16_t)0x8000) /*!< External trigger polarity */ + +/******************* Bit definition for TIM_DIER register *******************/ +#define TIM_DIER_UIE ((uint16_t)0x0001) /*!< Update interrupt enable */ +#define TIM_DIER_CC1IE ((uint16_t)0x0002) /*!< Capture/Compare 1 interrupt enable */ +#define TIM_DIER_CC2IE ((uint16_t)0x0004) /*!< Capture/Compare 2 interrupt enable */ +#define TIM_DIER_CC3IE ((uint16_t)0x0008) /*!< Capture/Compare 3 interrupt enable */ +#define TIM_DIER_CC4IE ((uint16_t)0x0010) /*!< Capture/Compare 4 interrupt enable */ +#define TIM_DIER_COMIE ((uint16_t)0x0020) /*!< COM interrupt enable */ +#define TIM_DIER_TIE ((uint16_t)0x0040) /*!< Trigger interrupt enable */ +#define TIM_DIER_BIE ((uint16_t)0x0080) /*!< Break interrupt enable */ +#define TIM_DIER_UDE ((uint16_t)0x0100) /*!< Update DMA request enable */ +#define TIM_DIER_CC1DE ((uint16_t)0x0200) /*!< Capture/Compare 1 DMA request enable */ +#define TIM_DIER_CC2DE ((uint16_t)0x0400) /*!< Capture/Compare 2 DMA request enable */ +#define TIM_DIER_CC3DE ((uint16_t)0x0800) /*!< Capture/Compare 3 DMA request enable */ +#define TIM_DIER_CC4DE ((uint16_t)0x1000) /*!< Capture/Compare 4 DMA request enable */ +#define TIM_DIER_COMDE ((uint16_t)0x2000) /*!< COM DMA request enable */ +#define TIM_DIER_TDE ((uint16_t)0x4000) /*!< Trigger DMA request enable */ + +/******************** Bit definition for TIM_SR register ********************/ +#define TIM_SR_UIF ((uint16_t)0x0001) /*!< Update interrupt Flag */ +#define TIM_SR_CC1IF ((uint16_t)0x0002) /*!< Capture/Compare 1 interrupt Flag */ +#define TIM_SR_CC2IF ((uint16_t)0x0004) /*!< Capture/Compare 2 interrupt Flag */ +#define TIM_SR_CC3IF ((uint16_t)0x0008) /*!< Capture/Compare 3 interrupt Flag */ +#define TIM_SR_CC4IF ((uint16_t)0x0010) /*!< Capture/Compare 4 interrupt Flag */ +#define TIM_SR_COMIF ((uint16_t)0x0020) /*!< COM interrupt Flag */ +#define TIM_SR_TIF ((uint16_t)0x0040) /*!< Trigger interrupt Flag */ +#define TIM_SR_BIF ((uint16_t)0x0080) /*!< Break interrupt Flag */ +#define TIM_SR_CC1OF ((uint16_t)0x0200) /*!< Capture/Compare 1 Overcapture Flag */ +#define TIM_SR_CC2OF ((uint16_t)0x0400) /*!< Capture/Compare 2 Overcapture Flag */ +#define TIM_SR_CC3OF ((uint16_t)0x0800) /*!< Capture/Compare 3 Overcapture Flag */ +#define TIM_SR_CC4OF ((uint16_t)0x1000) /*!< Capture/Compare 4 Overcapture Flag */ + +/******************* Bit definition for TIM_EGR register ********************/ +#define TIM_EGR_UG ((uint8_t)0x01) /*!< Update Generation */ +#define TIM_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation */ +#define TIM_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation */ +#define TIM_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation */ +#define TIM_EGR_CC4G ((uint8_t)0x10) /*!< Capture/Compare 4 Generation */ +#define TIM_EGR_COMG ((uint8_t)0x20) /*!< Capture/Compare Control Update Generation */ +#define TIM_EGR_TG ((uint8_t)0x40) /*!< Trigger Generation */ +#define TIM_EGR_BG ((uint8_t)0x80) /*!< Break Generation */ + +/****************** Bit definition for TIM_CCMR1 register *******************/ +#define TIM_CCMR1_CC1S ((uint16_t)0x0003) /*!< CC1S[1:0] bits (Capture/Compare 1 Selection) */ +#define TIM_CCMR1_CC1S_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_CCMR1_CC1S_1 ((uint16_t)0x0002) /*!< Bit 1 */ + +#define TIM_CCMR1_OC1FE ((uint16_t)0x0004) /*!< Output Compare 1 Fast enable */ +#define TIM_CCMR1_OC1PE ((uint16_t)0x0008) /*!< Output Compare 1 Preload enable */ + +#define TIM_CCMR1_OC1M ((uint16_t)0x0070) /*!< OC1M[2:0] bits (Output Compare 1 Mode) */ +#define TIM_CCMR1_OC1M_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR1_OC1M_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR1_OC1M_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_CCMR1_OC1CE ((uint16_t)0x0080) /*!< Output Compare 1Clear Enable */ + +#define TIM_CCMR1_CC2S ((uint16_t)0x0300) /*!< CC2S[1:0] bits (Capture/Compare 2 Selection) */ +#define TIM_CCMR1_CC2S_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_CCMR1_CC2S_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define TIM_CCMR1_OC2FE ((uint16_t)0x0400) /*!< Output Compare 2 Fast enable */ +#define TIM_CCMR1_OC2PE ((uint16_t)0x0800) /*!< Output Compare 2 Preload enable */ + +#define TIM_CCMR1_OC2M ((uint16_t)0x7000) /*!< OC2M[2:0] bits (Output Compare 2 Mode) */ +#define TIM_CCMR1_OC2M_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR1_OC2M_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR1_OC2M_2 ((uint16_t)0x4000) /*!< Bit 2 */ + +#define TIM_CCMR1_OC2CE ((uint16_t)0x8000) /*!< Output Compare 2 Clear Enable */ + +/*----------------------------------------------------------------------------*/ + +#define TIM_CCMR1_IC1PSC ((uint16_t)0x000C) /*!< IC1PSC[1:0] bits (Input Capture 1 Prescaler) */ +#define TIM_CCMR1_IC1PSC_0 ((uint16_t)0x0004) /*!< Bit 0 */ +#define TIM_CCMR1_IC1PSC_1 ((uint16_t)0x0008) /*!< Bit 1 */ + +#define TIM_CCMR1_IC1F ((uint16_t)0x00F0) /*!< IC1F[3:0] bits (Input Capture 1 Filter) */ +#define TIM_CCMR1_IC1F_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR1_IC1F_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR1_IC1F_2 ((uint16_t)0x0040) /*!< Bit 2 */ +#define TIM_CCMR1_IC1F_3 ((uint16_t)0x0080) /*!< Bit 3 */ + +#define TIM_CCMR1_IC2PSC ((uint16_t)0x0C00) /*!< IC2PSC[1:0] bits (Input Capture 2 Prescaler) */ +#define TIM_CCMR1_IC2PSC_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define TIM_CCMR1_IC2PSC_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define TIM_CCMR1_IC2F ((uint16_t)0xF000) /*!< IC2F[3:0] bits (Input Capture 2 Filter) */ +#define TIM_CCMR1_IC2F_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR1_IC2F_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR1_IC2F_2 ((uint16_t)0x4000) /*!< Bit 2 */ +#define TIM_CCMR1_IC2F_3 ((uint16_t)0x8000) /*!< Bit 3 */ + +/****************** Bit definition for TIM_CCMR2 register *******************/ +#define TIM_CCMR2_CC3S ((uint16_t)0x0003) /*!< CC3S[1:0] bits (Capture/Compare 3 Selection) */ +#define TIM_CCMR2_CC3S_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_CCMR2_CC3S_1 ((uint16_t)0x0002) /*!< Bit 1 */ + +#define TIM_CCMR2_OC3FE ((uint16_t)0x0004) /*!< Output Compare 3 Fast enable */ +#define TIM_CCMR2_OC3PE ((uint16_t)0x0008) /*!< Output Compare 3 Preload enable */ + +#define TIM_CCMR2_OC3M ((uint16_t)0x0070) /*!< OC3M[2:0] bits (Output Compare 3 Mode) */ +#define TIM_CCMR2_OC3M_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR2_OC3M_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR2_OC3M_2 ((uint16_t)0x0040) /*!< Bit 2 */ + +#define TIM_CCMR2_OC3CE ((uint16_t)0x0080) /*!< Output Compare 3 Clear Enable */ + +#define TIM_CCMR2_CC4S ((uint16_t)0x0300) /*!< CC4S[1:0] bits (Capture/Compare 4 Selection) */ +#define TIM_CCMR2_CC4S_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_CCMR2_CC4S_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define TIM_CCMR2_OC4FE ((uint16_t)0x0400) /*!< Output Compare 4 Fast enable */ +#define TIM_CCMR2_OC4PE ((uint16_t)0x0800) /*!< Output Compare 4 Preload enable */ + +#define TIM_CCMR2_OC4M ((uint16_t)0x7000) /*!< OC4M[2:0] bits (Output Compare 4 Mode) */ +#define TIM_CCMR2_OC4M_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR2_OC4M_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR2_OC4M_2 ((uint16_t)0x4000) /*!< Bit 2 */ + +#define TIM_CCMR2_OC4CE ((uint16_t)0x8000) /*!< Output Compare 4 Clear Enable */ + +/*----------------------------------------------------------------------------*/ + +#define TIM_CCMR2_IC3PSC ((uint16_t)0x000C) /*!< IC3PSC[1:0] bits (Input Capture 3 Prescaler) */ +#define TIM_CCMR2_IC3PSC_0 ((uint16_t)0x0004) /*!< Bit 0 */ +#define TIM_CCMR2_IC3PSC_1 ((uint16_t)0x0008) /*!< Bit 1 */ + +#define TIM_CCMR2_IC3F ((uint16_t)0x00F0) /*!< IC3F[3:0] bits (Input Capture 3 Filter) */ +#define TIM_CCMR2_IC3F_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define TIM_CCMR2_IC3F_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define TIM_CCMR2_IC3F_2 ((uint16_t)0x0040) /*!< Bit 2 */ +#define TIM_CCMR2_IC3F_3 ((uint16_t)0x0080) /*!< Bit 3 */ + +#define TIM_CCMR2_IC4PSC ((uint16_t)0x0C00) /*!< IC4PSC[1:0] bits (Input Capture 4 Prescaler) */ +#define TIM_CCMR2_IC4PSC_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define TIM_CCMR2_IC4PSC_1 ((uint16_t)0x0800) /*!< Bit 1 */ + +#define TIM_CCMR2_IC4F ((uint16_t)0xF000) /*!< IC4F[3:0] bits (Input Capture 4 Filter) */ +#define TIM_CCMR2_IC4F_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define TIM_CCMR2_IC4F_1 ((uint16_t)0x2000) /*!< Bit 1 */ +#define TIM_CCMR2_IC4F_2 ((uint16_t)0x4000) /*!< Bit 2 */ +#define TIM_CCMR2_IC4F_3 ((uint16_t)0x8000) /*!< Bit 3 */ + +/******************* Bit definition for TIM_CCER register *******************/ +#define TIM_CCER_CC1E ((uint16_t)0x0001) /*!< Capture/Compare 1 output enable */ +#define TIM_CCER_CC1P ((uint16_t)0x0002) /*!< Capture/Compare 1 output Polarity */ +#define TIM_CCER_CC1NE ((uint16_t)0x0004) /*!< Capture/Compare 1 Complementary output enable */ +#define TIM_CCER_CC1NP ((uint16_t)0x0008) /*!< Capture/Compare 1 Complementary output Polarity */ +#define TIM_CCER_CC2E ((uint16_t)0x0010) /*!< Capture/Compare 2 output enable */ +#define TIM_CCER_CC2P ((uint16_t)0x0020) /*!< Capture/Compare 2 output Polarity */ +#define TIM_CCER_CC2NE ((uint16_t)0x0040) /*!< Capture/Compare 2 Complementary output enable */ +#define TIM_CCER_CC2NP ((uint16_t)0x0080) /*!< Capture/Compare 2 Complementary output Polarity */ +#define TIM_CCER_CC3E ((uint16_t)0x0100) /*!< Capture/Compare 3 output enable */ +#define TIM_CCER_CC3P ((uint16_t)0x0200) /*!< Capture/Compare 3 output Polarity */ +#define TIM_CCER_CC3NE ((uint16_t)0x0400) /*!< Capture/Compare 3 Complementary output enable */ +#define TIM_CCER_CC3NP ((uint16_t)0x0800) /*!< Capture/Compare 3 Complementary output Polarity */ +#define TIM_CCER_CC4E ((uint16_t)0x1000) /*!< Capture/Compare 4 output enable */ +#define TIM_CCER_CC4P ((uint16_t)0x2000) /*!< Capture/Compare 4 output Polarity */ +#define TIM_CCER_CC4NP ((uint16_t)0x8000) /*!< Capture/Compare 4 Complementary output Polarity */ + +/******************* Bit definition for TIM_CNT register ********************/ +#define TIM_CNT_CNT ((uint16_t)0xFFFF) /*!< Counter Value */ + +/******************* Bit definition for TIM_PSC register ********************/ +#define TIM_PSC_PSC ((uint16_t)0xFFFF) /*!< Prescaler Value */ + +/******************* Bit definition for TIM_ARR register ********************/ +#define TIM_ARR_ARR ((uint16_t)0xFFFF) /*!< actual auto-reload Value */ + +/******************* Bit definition for TIM_RCR register ********************/ +#define TIM_RCR_REP ((uint8_t)0xFF) /*!< Repetition Counter Value */ + +/******************* Bit definition for TIM_CCR1 register *******************/ +#define TIM_CCR1_CCR1 ((uint16_t)0xFFFF) /*!< Capture/Compare 1 Value */ + +/******************* Bit definition for TIM_CCR2 register *******************/ +#define TIM_CCR2_CCR2 ((uint16_t)0xFFFF) /*!< Capture/Compare 2 Value */ + +/******************* Bit definition for TIM_CCR3 register *******************/ +#define TIM_CCR3_CCR3 ((uint16_t)0xFFFF) /*!< Capture/Compare 3 Value */ + +/******************* Bit definition for TIM_CCR4 register *******************/ +#define TIM_CCR4_CCR4 ((uint16_t)0xFFFF) /*!< Capture/Compare 4 Value */ + +/******************* Bit definition for TIM_BDTR register *******************/ +#define TIM_BDTR_DTG ((uint16_t)0x00FF) /*!< DTG[0:7] bits (Dead-Time Generator set-up) */ +#define TIM_BDTR_DTG_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_BDTR_DTG_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define TIM_BDTR_DTG_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define TIM_BDTR_DTG_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define TIM_BDTR_DTG_4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define TIM_BDTR_DTG_5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define TIM_BDTR_DTG_6 ((uint16_t)0x0040) /*!< Bit 6 */ +#define TIM_BDTR_DTG_7 ((uint16_t)0x0080) /*!< Bit 7 */ + +#define TIM_BDTR_LOCK ((uint16_t)0x0300) /*!< LOCK[1:0] bits (Lock Configuration) */ +#define TIM_BDTR_LOCK_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_BDTR_LOCK_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define TIM_BDTR_OSSI ((uint16_t)0x0400) /*!< Off-State Selection for Idle mode */ +#define TIM_BDTR_OSSR ((uint16_t)0x0800) /*!< Off-State Selection for Run mode */ +#define TIM_BDTR_BKE ((uint16_t)0x1000) /*!< Break enable */ +#define TIM_BDTR_BKP ((uint16_t)0x2000) /*!< Break Polarity */ +#define TIM_BDTR_AOE ((uint16_t)0x4000) /*!< Automatic Output enable */ +#define TIM_BDTR_MOE ((uint16_t)0x8000) /*!< Main Output enable */ + +/******************* Bit definition for TIM_DCR register ********************/ +#define TIM_DCR_DBA ((uint16_t)0x001F) /*!< DBA[4:0] bits (DMA Base Address) */ +#define TIM_DCR_DBA_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define TIM_DCR_DBA_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define TIM_DCR_DBA_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define TIM_DCR_DBA_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define TIM_DCR_DBA_4 ((uint16_t)0x0010) /*!< Bit 4 */ + +#define TIM_DCR_DBL ((uint16_t)0x1F00) /*!< DBL[4:0] bits (DMA Burst Length) */ +#define TIM_DCR_DBL_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define TIM_DCR_DBL_1 ((uint16_t)0x0200) /*!< Bit 1 */ +#define TIM_DCR_DBL_2 ((uint16_t)0x0400) /*!< Bit 2 */ +#define TIM_DCR_DBL_3 ((uint16_t)0x0800) /*!< Bit 3 */ +#define TIM_DCR_DBL_4 ((uint16_t)0x1000) /*!< Bit 4 */ + +/******************* Bit definition for TIM_DMAR register *******************/ +#define TIM_DMAR_DMAB ((uint16_t)0xFFFF) /*!< DMA register for burst accesses */ + +/******************************************************************************/ +/* */ +/* Real-Time Clock */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for RTC_CRH register ********************/ +#define RTC_CRH_SECIE ((uint8_t)0x01) /*!< Second Interrupt Enable */ +#define RTC_CRH_ALRIE ((uint8_t)0x02) /*!< Alarm Interrupt Enable */ +#define RTC_CRH_OWIE ((uint8_t)0x04) /*!< OverfloW Interrupt Enable */ + +/******************* Bit definition for RTC_CRL register ********************/ +#define RTC_CRL_SECF ((uint8_t)0x01) /*!< Second Flag */ +#define RTC_CRL_ALRF ((uint8_t)0x02) /*!< Alarm Flag */ +#define RTC_CRL_OWF ((uint8_t)0x04) /*!< OverfloW Flag */ +#define RTC_CRL_RSF ((uint8_t)0x08) /*!< Registers Synchronized Flag */ +#define RTC_CRL_CNF ((uint8_t)0x10) /*!< Configuration Flag */ +#define RTC_CRL_RTOFF ((uint8_t)0x20) /*!< RTC operation OFF */ + +/******************* Bit definition for RTC_PRLH register *******************/ +#define RTC_PRLH_PRL ((uint16_t)0x000F) /*!< RTC Prescaler Reload Value High */ + +/******************* Bit definition for RTC_PRLL register *******************/ +#define RTC_PRLL_PRL ((uint16_t)0xFFFF) /*!< RTC Prescaler Reload Value Low */ + +/******************* Bit definition for RTC_DIVH register *******************/ +#define RTC_DIVH_RTC_DIV ((uint16_t)0x000F) /*!< RTC Clock Divider High */ + +/******************* Bit definition for RTC_DIVL register *******************/ +#define RTC_DIVL_RTC_DIV ((uint16_t)0xFFFF) /*!< RTC Clock Divider Low */ + +/******************* Bit definition for RTC_CNTH register *******************/ +#define RTC_CNTH_RTC_CNT ((uint16_t)0xFFFF) /*!< RTC Counter High */ + +/******************* Bit definition for RTC_CNTL register *******************/ +#define RTC_CNTL_RTC_CNT ((uint16_t)0xFFFF) /*!< RTC Counter Low */ + +/******************* Bit definition for RTC_ALRH register *******************/ +#define RTC_ALRH_RTC_ALR ((uint16_t)0xFFFF) /*!< RTC Alarm High */ + +/******************* Bit definition for RTC_ALRL register *******************/ +#define RTC_ALRL_RTC_ALR ((uint16_t)0xFFFF) /*!< RTC Alarm Low */ + +/******************************************************************************/ +/* */ +/* Independent WATCHDOG */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for IWDG_KR register ********************/ +#define IWDG_KR_KEY ((uint16_t)0xFFFF) /*!< Key value (write only, read 0000h) */ + +/******************* Bit definition for IWDG_PR register ********************/ +#define IWDG_PR_PR ((uint8_t)0x07) /*!< PR[2:0] (Prescaler divider) */ +#define IWDG_PR_PR_0 ((uint8_t)0x01) /*!< Bit 0 */ +#define IWDG_PR_PR_1 ((uint8_t)0x02) /*!< Bit 1 */ +#define IWDG_PR_PR_2 ((uint8_t)0x04) /*!< Bit 2 */ + +/******************* Bit definition for IWDG_RLR register *******************/ +#define IWDG_RLR_RL ((uint16_t)0x0FFF) /*!< Watchdog counter reload value */ + +/******************* Bit definition for IWDG_SR register ********************/ +#define IWDG_SR_PVU ((uint8_t)0x01) /*!< Watchdog prescaler value update */ +#define IWDG_SR_RVU ((uint8_t)0x02) /*!< Watchdog counter reload value update */ + +/******************************************************************************/ +/* */ +/* Window WATCHDOG */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for WWDG_CR register ********************/ +#define WWDG_CR_T ((uint8_t)0x7F) /*!< T[6:0] bits (7-Bit counter (MSB to LSB)) */ +#define WWDG_CR_T0 ((uint8_t)0x01) /*!< Bit 0 */ +#define WWDG_CR_T1 ((uint8_t)0x02) /*!< Bit 1 */ +#define WWDG_CR_T2 ((uint8_t)0x04) /*!< Bit 2 */ +#define WWDG_CR_T3 ((uint8_t)0x08) /*!< Bit 3 */ +#define WWDG_CR_T4 ((uint8_t)0x10) /*!< Bit 4 */ +#define WWDG_CR_T5 ((uint8_t)0x20) /*!< Bit 5 */ +#define WWDG_CR_T6 ((uint8_t)0x40) /*!< Bit 6 */ + +#define WWDG_CR_WDGA ((uint8_t)0x80) /*!< Activation bit */ + +/******************* Bit definition for WWDG_CFR register *******************/ +#define WWDG_CFR_W ((uint16_t)0x007F) /*!< W[6:0] bits (7-bit window value) */ +#define WWDG_CFR_W0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define WWDG_CFR_W1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define WWDG_CFR_W2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define WWDG_CFR_W3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define WWDG_CFR_W4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define WWDG_CFR_W5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define WWDG_CFR_W6 ((uint16_t)0x0040) /*!< Bit 6 */ + +#define WWDG_CFR_WDGTB ((uint16_t)0x0180) /*!< WDGTB[1:0] bits (Timer Base) */ +#define WWDG_CFR_WDGTB0 ((uint16_t)0x0080) /*!< Bit 0 */ +#define WWDG_CFR_WDGTB1 ((uint16_t)0x0100) /*!< Bit 1 */ + +#define WWDG_CFR_EWI ((uint16_t)0x0200) /*!< Early Wakeup Interrupt */ + +/******************* Bit definition for WWDG_SR register ********************/ +#define WWDG_SR_EWIF ((uint8_t)0x01) /*!< Early Wakeup Interrupt Flag */ + +/******************************************************************************/ +/* */ +/* Flexible Static Memory Controller */ +/* */ +/******************************************************************************/ + +/****************** Bit definition for FSMC_BCR1 register *******************/ +#define FSMC_BCR1_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR1_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR1_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR1_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR1_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR1_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR1_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR1_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR1_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR1_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR1_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ +#define FSMC_BCR1_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR1_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR1_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR1_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR1_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR1_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR1_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BCR2 register *******************/ +#define FSMC_BCR2_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR2_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR2_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR2_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR2_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR2_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR2_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR2_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR2_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR2_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR2_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ +#define FSMC_BCR2_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR2_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR2_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR2_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR2_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR2_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR2_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BCR3 register *******************/ +#define FSMC_BCR3_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR3_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR3_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR3_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR3_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR3_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR3_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR3_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR3_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR3_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR3_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit. */ +#define FSMC_BCR3_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR3_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR3_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR3_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR3_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR3_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR3_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BCR4 register *******************/ +#define FSMC_BCR4_MBKEN ((uint32_t)0x00000001) /*!< Memory bank enable bit */ +#define FSMC_BCR4_MUXEN ((uint32_t)0x00000002) /*!< Address/data multiplexing enable bit */ + +#define FSMC_BCR4_MTYP ((uint32_t)0x0000000C) /*!< MTYP[1:0] bits (Memory type) */ +#define FSMC_BCR4_MTYP_0 ((uint32_t)0x00000004) /*!< Bit 0 */ +#define FSMC_BCR4_MTYP_1 ((uint32_t)0x00000008) /*!< Bit 1 */ + +#define FSMC_BCR4_MWID ((uint32_t)0x00000030) /*!< MWID[1:0] bits (Memory data bus width) */ +#define FSMC_BCR4_MWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BCR4_MWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_BCR4_FACCEN ((uint32_t)0x00000040) /*!< Flash access enable */ +#define FSMC_BCR4_BURSTEN ((uint32_t)0x00000100) /*!< Burst enable bit */ +#define FSMC_BCR4_WAITPOL ((uint32_t)0x00000200) /*!< Wait signal polarity bit */ +#define FSMC_BCR4_WRAPMOD ((uint32_t)0x00000400) /*!< Wrapped burst mode support */ +#define FSMC_BCR4_WAITCFG ((uint32_t)0x00000800) /*!< Wait timing configuration */ +#define FSMC_BCR4_WREN ((uint32_t)0x00001000) /*!< Write enable bit */ +#define FSMC_BCR4_WAITEN ((uint32_t)0x00002000) /*!< Wait enable bit */ +#define FSMC_BCR4_EXTMOD ((uint32_t)0x00004000) /*!< Extended mode enable */ +#define FSMC_BCR4_ASYNCWAIT ((uint32_t)0x00008000) /*!< Asynchronous wait */ +#define FSMC_BCR4_CBURSTRW ((uint32_t)0x00080000) /*!< Write burst enable */ + +/****************** Bit definition for FSMC_BTR1 register ******************/ +#define FSMC_BTR1_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR1_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR1_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR1_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR1_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR1_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR1_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR1_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR1_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR1_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR1_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR1_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR1_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR1_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR1_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR1_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR1_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR1_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR1_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR1_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR1_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR1_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR1_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR1_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR1_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR1_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR1_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR1_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR1_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR1_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR1_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR1_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR1_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BTR2 register *******************/ +#define FSMC_BTR2_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR2_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR2_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR2_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR2_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR2_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR2_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR2_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR2_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR2_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR2_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR2_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR2_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR2_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR2_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR2_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR2_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR2_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR2_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR2_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR2_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR2_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR2_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR2_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR2_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR2_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR2_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR2_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR2_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR2_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR2_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR2_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR2_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/******************* Bit definition for FSMC_BTR3 register *******************/ +#define FSMC_BTR3_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR3_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR3_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR3_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR3_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR3_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR3_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR3_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR3_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR3_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR3_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR3_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR3_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR3_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR3_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR3_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR3_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR3_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR3_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR3_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR3_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR3_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR3_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR3_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR3_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR3_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR3_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR3_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR3_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR3_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR3_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR3_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR3_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BTR4 register *******************/ +#define FSMC_BTR4_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BTR4_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BTR4_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BTR4_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BTR4_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BTR4_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BTR4_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BTR4_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BTR4_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BTR4_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BTR4_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BTR4_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BTR4_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BTR4_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BTR4_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BTR4_BUSTURN ((uint32_t)0x000F0000) /*!< BUSTURN[3:0] bits (Bus turnaround phase duration) */ +#define FSMC_BTR4_BUSTURN_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_BTR4_BUSTURN_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_BTR4_BUSTURN_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_BTR4_BUSTURN_3 ((uint32_t)0x00080000) /*!< Bit 3 */ + +#define FSMC_BTR4_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BTR4_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BTR4_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BTR4_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BTR4_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BTR4_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BTR4_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BTR4_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BTR4_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BTR4_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BTR4_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BTR4_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BTR4_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR1 register ******************/ +#define FSMC_BWTR1_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR1_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR1_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR1_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR1_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR1_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR1_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR1_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR1_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR1_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR1_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR1_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR1_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR1_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR1_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR1_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR1_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR1_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BWTR1_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR1_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR1_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR1_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR1_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR1_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR1_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR1_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR1_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR1_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR2 register ******************/ +#define FSMC_BWTR2_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR2_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR2_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR2_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR2_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR2_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR2_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR2_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR2_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR2_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR2_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR2_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR2_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR2_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR2_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR2_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR2_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR2_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1*/ +#define FSMC_BWTR2_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR2_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR2_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR2_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR2_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR2_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR2_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR2_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR2_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR2_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR3 register ******************/ +#define FSMC_BWTR3_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR3_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR3_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR3_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR3_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR3_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR3_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR3_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR3_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR3_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR3_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR3_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR3_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR3_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR3_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR3_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR3_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR3_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BWTR3_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR3_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR3_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR3_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR3_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR3_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR3_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR3_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR3_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR3_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_BWTR4 register ******************/ +#define FSMC_BWTR4_ADDSET ((uint32_t)0x0000000F) /*!< ADDSET[3:0] bits (Address setup phase duration) */ +#define FSMC_BWTR4_ADDSET_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_BWTR4_ADDSET_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_BWTR4_ADDSET_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_BWTR4_ADDSET_3 ((uint32_t)0x00000008) /*!< Bit 3 */ + +#define FSMC_BWTR4_ADDHLD ((uint32_t)0x000000F0) /*!< ADDHLD[3:0] bits (Address-hold phase duration) */ +#define FSMC_BWTR4_ADDHLD_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_BWTR4_ADDHLD_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define FSMC_BWTR4_ADDHLD_2 ((uint32_t)0x00000040) /*!< Bit 2 */ +#define FSMC_BWTR4_ADDHLD_3 ((uint32_t)0x00000080) /*!< Bit 3 */ + +#define FSMC_BWTR4_DATAST ((uint32_t)0x0000FF00) /*!< DATAST [3:0] bits (Data-phase duration) */ +#define FSMC_BWTR4_DATAST_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_BWTR4_DATAST_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_BWTR4_DATAST_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_BWTR4_DATAST_3 ((uint32_t)0x00000800) /*!< Bit 3 */ + +#define FSMC_BWTR4_CLKDIV ((uint32_t)0x00F00000) /*!< CLKDIV[3:0] bits (Clock divide ratio) */ +#define FSMC_BWTR4_CLKDIV_0 ((uint32_t)0x00100000) /*!< Bit 0 */ +#define FSMC_BWTR4_CLKDIV_1 ((uint32_t)0x00200000) /*!< Bit 1 */ +#define FSMC_BWTR4_CLKDIV_2 ((uint32_t)0x00400000) /*!< Bit 2 */ +#define FSMC_BWTR4_CLKDIV_3 ((uint32_t)0x00800000) /*!< Bit 3 */ + +#define FSMC_BWTR4_DATLAT ((uint32_t)0x0F000000) /*!< DATLA[3:0] bits (Data latency) */ +#define FSMC_BWTR4_DATLAT_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_BWTR4_DATLAT_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_BWTR4_DATLAT_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_BWTR4_DATLAT_3 ((uint32_t)0x08000000) /*!< Bit 3 */ + +#define FSMC_BWTR4_ACCMOD ((uint32_t)0x30000000) /*!< ACCMOD[1:0] bits (Access mode) */ +#define FSMC_BWTR4_ACCMOD_0 ((uint32_t)0x10000000) /*!< Bit 0 */ +#define FSMC_BWTR4_ACCMOD_1 ((uint32_t)0x20000000) /*!< Bit 1 */ + +/****************** Bit definition for FSMC_PCR2 register *******************/ +#define FSMC_PCR2_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ +#define FSMC_PCR2_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ +#define FSMC_PCR2_PTYP ((uint32_t)0x00000008) /*!< Memory type */ + +#define FSMC_PCR2_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ +#define FSMC_PCR2_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_PCR2_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_PCR2_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ + +#define FSMC_PCR2_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ +#define FSMC_PCR2_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define FSMC_PCR2_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define FSMC_PCR2_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ +#define FSMC_PCR2_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ + +#define FSMC_PCR2_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ +#define FSMC_PCR2_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define FSMC_PCR2_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define FSMC_PCR2_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ +#define FSMC_PCR2_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ + +#define FSMC_PCR2_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[1:0] bits (ECC page size) */ +#define FSMC_PCR2_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define FSMC_PCR2_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define FSMC_PCR2_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +/****************** Bit definition for FSMC_PCR3 register *******************/ +#define FSMC_PCR3_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ +#define FSMC_PCR3_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ +#define FSMC_PCR3_PTYP ((uint32_t)0x00000008) /*!< Memory type */ + +#define FSMC_PCR3_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ +#define FSMC_PCR3_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_PCR3_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_PCR3_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ + +#define FSMC_PCR3_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ +#define FSMC_PCR3_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define FSMC_PCR3_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define FSMC_PCR3_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ +#define FSMC_PCR3_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ + +#define FSMC_PCR3_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ +#define FSMC_PCR3_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define FSMC_PCR3_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define FSMC_PCR3_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ +#define FSMC_PCR3_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ + +#define FSMC_PCR3_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[2:0] bits (ECC page size) */ +#define FSMC_PCR3_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define FSMC_PCR3_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define FSMC_PCR3_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +/****************** Bit definition for FSMC_PCR4 register *******************/ +#define FSMC_PCR4_PWAITEN ((uint32_t)0x00000002) /*!< Wait feature enable bit */ +#define FSMC_PCR4_PBKEN ((uint32_t)0x00000004) /*!< PC Card/NAND Flash memory bank enable bit */ +#define FSMC_PCR4_PTYP ((uint32_t)0x00000008) /*!< Memory type */ + +#define FSMC_PCR4_PWID ((uint32_t)0x00000030) /*!< PWID[1:0] bits (NAND Flash databus width) */ +#define FSMC_PCR4_PWID_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define FSMC_PCR4_PWID_1 ((uint32_t)0x00000020) /*!< Bit 1 */ + +#define FSMC_PCR4_ECCEN ((uint32_t)0x00000040) /*!< ECC computation logic enable bit */ + +#define FSMC_PCR4_TCLR ((uint32_t)0x00001E00) /*!< TCLR[3:0] bits (CLE to RE delay) */ +#define FSMC_PCR4_TCLR_0 ((uint32_t)0x00000200) /*!< Bit 0 */ +#define FSMC_PCR4_TCLR_1 ((uint32_t)0x00000400) /*!< Bit 1 */ +#define FSMC_PCR4_TCLR_2 ((uint32_t)0x00000800) /*!< Bit 2 */ +#define FSMC_PCR4_TCLR_3 ((uint32_t)0x00001000) /*!< Bit 3 */ + +#define FSMC_PCR4_TAR ((uint32_t)0x0001E000) /*!< TAR[3:0] bits (ALE to RE delay) */ +#define FSMC_PCR4_TAR_0 ((uint32_t)0x00002000) /*!< Bit 0 */ +#define FSMC_PCR4_TAR_1 ((uint32_t)0x00004000) /*!< Bit 1 */ +#define FSMC_PCR4_TAR_2 ((uint32_t)0x00008000) /*!< Bit 2 */ +#define FSMC_PCR4_TAR_3 ((uint32_t)0x00010000) /*!< Bit 3 */ + +#define FSMC_PCR4_ECCPS ((uint32_t)0x000E0000) /*!< ECCPS[2:0] bits (ECC page size) */ +#define FSMC_PCR4_ECCPS_0 ((uint32_t)0x00020000) /*!< Bit 0 */ +#define FSMC_PCR4_ECCPS_1 ((uint32_t)0x00040000) /*!< Bit 1 */ +#define FSMC_PCR4_ECCPS_2 ((uint32_t)0x00080000) /*!< Bit 2 */ + +/******************* Bit definition for FSMC_SR2 register *******************/ +#define FSMC_SR2_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ +#define FSMC_SR2_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ +#define FSMC_SR2_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ +#define FSMC_SR2_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ +#define FSMC_SR2_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ +#define FSMC_SR2_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ +#define FSMC_SR2_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ + +/******************* Bit definition for FSMC_SR3 register *******************/ +#define FSMC_SR3_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ +#define FSMC_SR3_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ +#define FSMC_SR3_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ +#define FSMC_SR3_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ +#define FSMC_SR3_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ +#define FSMC_SR3_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ +#define FSMC_SR3_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ + +/******************* Bit definition for FSMC_SR4 register *******************/ +#define FSMC_SR4_IRS ((uint8_t)0x01) /*!< Interrupt Rising Edge status */ +#define FSMC_SR4_ILS ((uint8_t)0x02) /*!< Interrupt Level status */ +#define FSMC_SR4_IFS ((uint8_t)0x04) /*!< Interrupt Falling Edge status */ +#define FSMC_SR4_IREN ((uint8_t)0x08) /*!< Interrupt Rising Edge detection Enable bit */ +#define FSMC_SR4_ILEN ((uint8_t)0x10) /*!< Interrupt Level detection Enable bit */ +#define FSMC_SR4_IFEN ((uint8_t)0x20) /*!< Interrupt Falling Edge detection Enable bit */ +#define FSMC_SR4_FEMPT ((uint8_t)0x40) /*!< FIFO empty */ + +/****************** Bit definition for FSMC_PMEM2 register ******************/ +#define FSMC_PMEM2_MEMSET2 ((uint32_t)0x000000FF) /*!< MEMSET2[7:0] bits (Common memory 2 setup time) */ +#define FSMC_PMEM2_MEMSET2_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMSET2_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMSET2_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMSET2_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMSET2_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMSET2_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMSET2_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMSET2_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PMEM2_MEMWAIT2 ((uint32_t)0x0000FF00) /*!< MEMWAIT2[7:0] bits (Common memory 2 wait time) */ +#define FSMC_PMEM2_MEMWAIT2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMWAIT2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMWAIT2_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMWAIT2_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMWAIT2_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMWAIT2_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMWAIT2_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMWAIT2_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PMEM2_MEMHOLD2 ((uint32_t)0x00FF0000) /*!< MEMHOLD2[7:0] bits (Common memory 2 hold time) */ +#define FSMC_PMEM2_MEMHOLD2_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMHOLD2_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMHOLD2_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMHOLD2_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMHOLD2_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMHOLD2_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMHOLD2_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMHOLD2_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PMEM2_MEMHIZ2 ((uint32_t)0xFF000000) /*!< MEMHIZ2[7:0] bits (Common memory 2 databus HiZ time) */ +#define FSMC_PMEM2_MEMHIZ2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PMEM2_MEMHIZ2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PMEM2_MEMHIZ2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PMEM2_MEMHIZ2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PMEM2_MEMHIZ2_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PMEM2_MEMHIZ2_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PMEM2_MEMHIZ2_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PMEM2_MEMHIZ2_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PMEM3 register ******************/ +#define FSMC_PMEM3_MEMSET3 ((uint32_t)0x000000FF) /*!< MEMSET3[7:0] bits (Common memory 3 setup time) */ +#define FSMC_PMEM3_MEMSET3_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMSET3_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMSET3_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMSET3_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMSET3_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMSET3_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMSET3_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMSET3_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PMEM3_MEMWAIT3 ((uint32_t)0x0000FF00) /*!< MEMWAIT3[7:0] bits (Common memory 3 wait time) */ +#define FSMC_PMEM3_MEMWAIT3_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMWAIT3_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMWAIT3_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMWAIT3_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMWAIT3_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMWAIT3_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMWAIT3_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMWAIT3_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PMEM3_MEMHOLD3 ((uint32_t)0x00FF0000) /*!< MEMHOLD3[7:0] bits (Common memory 3 hold time) */ +#define FSMC_PMEM3_MEMHOLD3_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMHOLD3_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMHOLD3_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMHOLD3_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMHOLD3_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMHOLD3_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMHOLD3_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMHOLD3_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PMEM3_MEMHIZ3 ((uint32_t)0xFF000000) /*!< MEMHIZ3[7:0] bits (Common memory 3 databus HiZ time) */ +#define FSMC_PMEM3_MEMHIZ3_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PMEM3_MEMHIZ3_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PMEM3_MEMHIZ3_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PMEM3_MEMHIZ3_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PMEM3_MEMHIZ3_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PMEM3_MEMHIZ3_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PMEM3_MEMHIZ3_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PMEM3_MEMHIZ3_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PMEM4 register ******************/ +#define FSMC_PMEM4_MEMSET4 ((uint32_t)0x000000FF) /*!< MEMSET4[7:0] bits (Common memory 4 setup time) */ +#define FSMC_PMEM4_MEMSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PMEM4_MEMWAIT4 ((uint32_t)0x0000FF00) /*!< MEMWAIT4[7:0] bits (Common memory 4 wait time) */ +#define FSMC_PMEM4_MEMWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PMEM4_MEMHOLD4 ((uint32_t)0x00FF0000) /*!< MEMHOLD4[7:0] bits (Common memory 4 hold time) */ +#define FSMC_PMEM4_MEMHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PMEM4_MEMHIZ4 ((uint32_t)0xFF000000) /*!< MEMHIZ4[7:0] bits (Common memory 4 databus HiZ time) */ +#define FSMC_PMEM4_MEMHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PMEM4_MEMHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PMEM4_MEMHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PMEM4_MEMHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PMEM4_MEMHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PMEM4_MEMHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PMEM4_MEMHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PMEM4_MEMHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PATT2 register ******************/ +#define FSMC_PATT2_ATTSET2 ((uint32_t)0x000000FF) /*!< ATTSET2[7:0] bits (Attribute memory 2 setup time) */ +#define FSMC_PATT2_ATTSET2_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PATT2_ATTSET2_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PATT2_ATTSET2_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PATT2_ATTSET2_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PATT2_ATTSET2_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PATT2_ATTSET2_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PATT2_ATTSET2_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PATT2_ATTSET2_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PATT2_ATTWAIT2 ((uint32_t)0x0000FF00) /*!< ATTWAIT2[7:0] bits (Attribute memory 2 wait time) */ +#define FSMC_PATT2_ATTWAIT2_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PATT2_ATTWAIT2_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PATT2_ATTWAIT2_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PATT2_ATTWAIT2_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PATT2_ATTWAIT2_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PATT2_ATTWAIT2_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PATT2_ATTWAIT2_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PATT2_ATTWAIT2_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PATT2_ATTHOLD2 ((uint32_t)0x00FF0000) /*!< ATTHOLD2[7:0] bits (Attribute memory 2 hold time) */ +#define FSMC_PATT2_ATTHOLD2_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PATT2_ATTHOLD2_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PATT2_ATTHOLD2_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PATT2_ATTHOLD2_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PATT2_ATTHOLD2_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PATT2_ATTHOLD2_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PATT2_ATTHOLD2_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PATT2_ATTHOLD2_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PATT2_ATTHIZ2 ((uint32_t)0xFF000000) /*!< ATTHIZ2[7:0] bits (Attribute memory 2 databus HiZ time) */ +#define FSMC_PATT2_ATTHIZ2_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PATT2_ATTHIZ2_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PATT2_ATTHIZ2_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PATT2_ATTHIZ2_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PATT2_ATTHIZ2_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PATT2_ATTHIZ2_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PATT2_ATTHIZ2_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PATT2_ATTHIZ2_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PATT3 register ******************/ +#define FSMC_PATT3_ATTSET3 ((uint32_t)0x000000FF) /*!< ATTSET3[7:0] bits (Attribute memory 3 setup time) */ +#define FSMC_PATT3_ATTSET3_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PATT3_ATTSET3_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PATT3_ATTSET3_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PATT3_ATTSET3_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PATT3_ATTSET3_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PATT3_ATTSET3_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PATT3_ATTSET3_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PATT3_ATTSET3_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PATT3_ATTWAIT3 ((uint32_t)0x0000FF00) /*!< ATTWAIT3[7:0] bits (Attribute memory 3 wait time) */ +#define FSMC_PATT3_ATTWAIT3_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PATT3_ATTWAIT3_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PATT3_ATTWAIT3_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PATT3_ATTWAIT3_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PATT3_ATTWAIT3_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PATT3_ATTWAIT3_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PATT3_ATTWAIT3_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PATT3_ATTWAIT3_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PATT3_ATTHOLD3 ((uint32_t)0x00FF0000) /*!< ATTHOLD3[7:0] bits (Attribute memory 3 hold time) */ +#define FSMC_PATT3_ATTHOLD3_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PATT3_ATTHOLD3_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PATT3_ATTHOLD3_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PATT3_ATTHOLD3_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PATT3_ATTHOLD3_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PATT3_ATTHOLD3_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PATT3_ATTHOLD3_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PATT3_ATTHOLD3_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PATT3_ATTHIZ3 ((uint32_t)0xFF000000) /*!< ATTHIZ3[7:0] bits (Attribute memory 3 databus HiZ time) */ +#define FSMC_PATT3_ATTHIZ3_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PATT3_ATTHIZ3_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PATT3_ATTHIZ3_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PATT3_ATTHIZ3_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PATT3_ATTHIZ3_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PATT3_ATTHIZ3_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PATT3_ATTHIZ3_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PATT3_ATTHIZ3_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PATT4 register ******************/ +#define FSMC_PATT4_ATTSET4 ((uint32_t)0x000000FF) /*!< ATTSET4[7:0] bits (Attribute memory 4 setup time) */ +#define FSMC_PATT4_ATTSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PATT4_ATTSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PATT4_ATTSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PATT4_ATTSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PATT4_ATTSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PATT4_ATTSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PATT4_ATTSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PATT4_ATTSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PATT4_ATTWAIT4 ((uint32_t)0x0000FF00) /*!< ATTWAIT4[7:0] bits (Attribute memory 4 wait time) */ +#define FSMC_PATT4_ATTWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PATT4_ATTWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PATT4_ATTWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PATT4_ATTWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PATT4_ATTWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PATT4_ATTWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PATT4_ATTWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PATT4_ATTWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PATT4_ATTHOLD4 ((uint32_t)0x00FF0000) /*!< ATTHOLD4[7:0] bits (Attribute memory 4 hold time) */ +#define FSMC_PATT4_ATTHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PATT4_ATTHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PATT4_ATTHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PATT4_ATTHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PATT4_ATTHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PATT4_ATTHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PATT4_ATTHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PATT4_ATTHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PATT4_ATTHIZ4 ((uint32_t)0xFF000000) /*!< ATTHIZ4[7:0] bits (Attribute memory 4 databus HiZ time) */ +#define FSMC_PATT4_ATTHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PATT4_ATTHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PATT4_ATTHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PATT4_ATTHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PATT4_ATTHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PATT4_ATTHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PATT4_ATTHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PATT4_ATTHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_PIO4 register *******************/ +#define FSMC_PIO4_IOSET4 ((uint32_t)0x000000FF) /*!< IOSET4[7:0] bits (I/O 4 setup time) */ +#define FSMC_PIO4_IOSET4_0 ((uint32_t)0x00000001) /*!< Bit 0 */ +#define FSMC_PIO4_IOSET4_1 ((uint32_t)0x00000002) /*!< Bit 1 */ +#define FSMC_PIO4_IOSET4_2 ((uint32_t)0x00000004) /*!< Bit 2 */ +#define FSMC_PIO4_IOSET4_3 ((uint32_t)0x00000008) /*!< Bit 3 */ +#define FSMC_PIO4_IOSET4_4 ((uint32_t)0x00000010) /*!< Bit 4 */ +#define FSMC_PIO4_IOSET4_5 ((uint32_t)0x00000020) /*!< Bit 5 */ +#define FSMC_PIO4_IOSET4_6 ((uint32_t)0x00000040) /*!< Bit 6 */ +#define FSMC_PIO4_IOSET4_7 ((uint32_t)0x00000080) /*!< Bit 7 */ + +#define FSMC_PIO4_IOWAIT4 ((uint32_t)0x0000FF00) /*!< IOWAIT4[7:0] bits (I/O 4 wait time) */ +#define FSMC_PIO4_IOWAIT4_0 ((uint32_t)0x00000100) /*!< Bit 0 */ +#define FSMC_PIO4_IOWAIT4_1 ((uint32_t)0x00000200) /*!< Bit 1 */ +#define FSMC_PIO4_IOWAIT4_2 ((uint32_t)0x00000400) /*!< Bit 2 */ +#define FSMC_PIO4_IOWAIT4_3 ((uint32_t)0x00000800) /*!< Bit 3 */ +#define FSMC_PIO4_IOWAIT4_4 ((uint32_t)0x00001000) /*!< Bit 4 */ +#define FSMC_PIO4_IOWAIT4_5 ((uint32_t)0x00002000) /*!< Bit 5 */ +#define FSMC_PIO4_IOWAIT4_6 ((uint32_t)0x00004000) /*!< Bit 6 */ +#define FSMC_PIO4_IOWAIT4_7 ((uint32_t)0x00008000) /*!< Bit 7 */ + +#define FSMC_PIO4_IOHOLD4 ((uint32_t)0x00FF0000) /*!< IOHOLD4[7:0] bits (I/O 4 hold time) */ +#define FSMC_PIO4_IOHOLD4_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define FSMC_PIO4_IOHOLD4_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define FSMC_PIO4_IOHOLD4_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define FSMC_PIO4_IOHOLD4_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define FSMC_PIO4_IOHOLD4_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define FSMC_PIO4_IOHOLD4_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define FSMC_PIO4_IOHOLD4_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define FSMC_PIO4_IOHOLD4_7 ((uint32_t)0x00800000) /*!< Bit 7 */ + +#define FSMC_PIO4_IOHIZ4 ((uint32_t)0xFF000000) /*!< IOHIZ4[7:0] bits (I/O 4 databus HiZ time) */ +#define FSMC_PIO4_IOHIZ4_0 ((uint32_t)0x01000000) /*!< Bit 0 */ +#define FSMC_PIO4_IOHIZ4_1 ((uint32_t)0x02000000) /*!< Bit 1 */ +#define FSMC_PIO4_IOHIZ4_2 ((uint32_t)0x04000000) /*!< Bit 2 */ +#define FSMC_PIO4_IOHIZ4_3 ((uint32_t)0x08000000) /*!< Bit 3 */ +#define FSMC_PIO4_IOHIZ4_4 ((uint32_t)0x10000000) /*!< Bit 4 */ +#define FSMC_PIO4_IOHIZ4_5 ((uint32_t)0x20000000) /*!< Bit 5 */ +#define FSMC_PIO4_IOHIZ4_6 ((uint32_t)0x40000000) /*!< Bit 6 */ +#define FSMC_PIO4_IOHIZ4_7 ((uint32_t)0x80000000) /*!< Bit 7 */ + +/****************** Bit definition for FSMC_ECCR2 register ******************/ +#define FSMC_ECCR2_ECC2 ((uint32_t)0xFFFFFFFF) /*!< ECC result */ + +/****************** Bit definition for FSMC_ECCR3 register ******************/ +#define FSMC_ECCR3_ECC3 ((uint32_t)0xFFFFFFFF) /*!< ECC result */ + +/******************************************************************************/ +/* */ +/* SD host Interface */ +/* */ +/******************************************************************************/ + +/****************** Bit definition for SDIO_POWER register ******************/ +#define SDIO_POWER_PWRCTRL ((uint8_t)0x03) /*!< PWRCTRL[1:0] bits (Power supply control bits) */ +#define SDIO_POWER_PWRCTRL_0 ((uint8_t)0x01) /*!< Bit 0 */ +#define SDIO_POWER_PWRCTRL_1 ((uint8_t)0x02) /*!< Bit 1 */ + +/****************** Bit definition for SDIO_CLKCR register ******************/ +#define SDIO_CLKCR_CLKDIV ((uint16_t)0x00FF) /*!< Clock divide factor */ +#define SDIO_CLKCR_CLKEN ((uint16_t)0x0100) /*!< Clock enable bit */ +#define SDIO_CLKCR_PWRSAV ((uint16_t)0x0200) /*!< Power saving configuration bit */ +#define SDIO_CLKCR_BYPASS ((uint16_t)0x0400) /*!< Clock divider bypass enable bit */ + +#define SDIO_CLKCR_WIDBUS ((uint16_t)0x1800) /*!< WIDBUS[1:0] bits (Wide bus mode enable bit) */ +#define SDIO_CLKCR_WIDBUS_0 ((uint16_t)0x0800) /*!< Bit 0 */ +#define SDIO_CLKCR_WIDBUS_1 ((uint16_t)0x1000) /*!< Bit 1 */ + +#define SDIO_CLKCR_NEGEDGE ((uint16_t)0x2000) /*!< SDIO_CK dephasing selection bit */ +#define SDIO_CLKCR_HWFC_EN ((uint16_t)0x4000) /*!< HW Flow Control enable */ + +/******************* Bit definition for SDIO_ARG register *******************/ +#define SDIO_ARG_CMDARG ((uint32_t)0xFFFFFFFF) /*!< Command argument */ + +/******************* Bit definition for SDIO_CMD register *******************/ +#define SDIO_CMD_CMDINDEX ((uint16_t)0x003F) /*!< Command Index */ + +#define SDIO_CMD_WAITRESP ((uint16_t)0x00C0) /*!< WAITRESP[1:0] bits (Wait for response bits) */ +#define SDIO_CMD_WAITRESP_0 ((uint16_t)0x0040) /*!< Bit 0 */ +#define SDIO_CMD_WAITRESP_1 ((uint16_t)0x0080) /*!< Bit 1 */ + +#define SDIO_CMD_WAITINT ((uint16_t)0x0100) /*!< CPSM Waits for Interrupt Request */ +#define SDIO_CMD_WAITPEND ((uint16_t)0x0200) /*!< CPSM Waits for ends of data transfer (CmdPend internal signal) */ +#define SDIO_CMD_CPSMEN ((uint16_t)0x0400) /*!< Command path state machine (CPSM) Enable bit */ +#define SDIO_CMD_SDIOSUSPEND ((uint16_t)0x0800) /*!< SD I/O suspend command */ +#define SDIO_CMD_ENCMDCOMPL ((uint16_t)0x1000) /*!< Enable CMD completion */ +#define SDIO_CMD_NIEN ((uint16_t)0x2000) /*!< Not Interrupt Enable */ +#define SDIO_CMD_CEATACMD ((uint16_t)0x4000) /*!< CE-ATA command */ + +/***************** Bit definition for SDIO_RESPCMD register *****************/ +#define SDIO_RESPCMD_RESPCMD ((uint8_t)0x3F) /*!< Response command index */ + +/****************** Bit definition for SDIO_RESP0 register ******************/ +#define SDIO_RESP0_CARDSTATUS0 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP1 register ******************/ +#define SDIO_RESP1_CARDSTATUS1 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP2 register ******************/ +#define SDIO_RESP2_CARDSTATUS2 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP3 register ******************/ +#define SDIO_RESP3_CARDSTATUS3 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_RESP4 register ******************/ +#define SDIO_RESP4_CARDSTATUS4 ((uint32_t)0xFFFFFFFF) /*!< Card Status */ + +/****************** Bit definition for SDIO_DTIMER register *****************/ +#define SDIO_DTIMER_DATATIME ((uint32_t)0xFFFFFFFF) /*!< Data timeout period. */ + +/****************** Bit definition for SDIO_DLEN register *******************/ +#define SDIO_DLEN_DATALENGTH ((uint32_t)0x01FFFFFF) /*!< Data length value */ + +/****************** Bit definition for SDIO_DCTRL register ******************/ +#define SDIO_DCTRL_DTEN ((uint16_t)0x0001) /*!< Data transfer enabled bit */ +#define SDIO_DCTRL_DTDIR ((uint16_t)0x0002) /*!< Data transfer direction selection */ +#define SDIO_DCTRL_DTMODE ((uint16_t)0x0004) /*!< Data transfer mode selection */ +#define SDIO_DCTRL_DMAEN ((uint16_t)0x0008) /*!< DMA enabled bit */ + +#define SDIO_DCTRL_DBLOCKSIZE ((uint16_t)0x00F0) /*!< DBLOCKSIZE[3:0] bits (Data block size) */ +#define SDIO_DCTRL_DBLOCKSIZE_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define SDIO_DCTRL_DBLOCKSIZE_1 ((uint16_t)0x0020) /*!< Bit 1 */ +#define SDIO_DCTRL_DBLOCKSIZE_2 ((uint16_t)0x0040) /*!< Bit 2 */ +#define SDIO_DCTRL_DBLOCKSIZE_3 ((uint16_t)0x0080) /*!< Bit 3 */ + +#define SDIO_DCTRL_RWSTART ((uint16_t)0x0100) /*!< Read wait start */ +#define SDIO_DCTRL_RWSTOP ((uint16_t)0x0200) /*!< Read wait stop */ +#define SDIO_DCTRL_RWMOD ((uint16_t)0x0400) /*!< Read wait mode */ +#define SDIO_DCTRL_SDIOEN ((uint16_t)0x0800) /*!< SD I/O enable functions */ + +/****************** Bit definition for SDIO_DCOUNT register *****************/ +#define SDIO_DCOUNT_DATACOUNT ((uint32_t)0x01FFFFFF) /*!< Data count value */ + +/****************** Bit definition for SDIO_STA register ********************/ +#define SDIO_STA_CCRCFAIL ((uint32_t)0x00000001) /*!< Command response received (CRC check failed) */ +#define SDIO_STA_DCRCFAIL ((uint32_t)0x00000002) /*!< Data block sent/received (CRC check failed) */ +#define SDIO_STA_CTIMEOUT ((uint32_t)0x00000004) /*!< Command response timeout */ +#define SDIO_STA_DTIMEOUT ((uint32_t)0x00000008) /*!< Data timeout */ +#define SDIO_STA_TXUNDERR ((uint32_t)0x00000010) /*!< Transmit FIFO underrun error */ +#define SDIO_STA_RXOVERR ((uint32_t)0x00000020) /*!< Received FIFO overrun error */ +#define SDIO_STA_CMDREND ((uint32_t)0x00000040) /*!< Command response received (CRC check passed) */ +#define SDIO_STA_CMDSENT ((uint32_t)0x00000080) /*!< Command sent (no response required) */ +#define SDIO_STA_DATAEND ((uint32_t)0x00000100) /*!< Data end (data counter, SDIDCOUNT, is zero) */ +#define SDIO_STA_STBITERR ((uint32_t)0x00000200) /*!< Start bit not detected on all data signals in wide bus mode */ +#define SDIO_STA_DBCKEND ((uint32_t)0x00000400) /*!< Data block sent/received (CRC check passed) */ +#define SDIO_STA_CMDACT ((uint32_t)0x00000800) /*!< Command transfer in progress */ +#define SDIO_STA_TXACT ((uint32_t)0x00001000) /*!< Data transmit in progress */ +#define SDIO_STA_RXACT ((uint32_t)0x00002000) /*!< Data receive in progress */ +#define SDIO_STA_TXFIFOHE ((uint32_t)0x00004000) /*!< Transmit FIFO Half Empty: at least 8 words can be written into the FIFO */ +#define SDIO_STA_RXFIFOHF ((uint32_t)0x00008000) /*!< Receive FIFO Half Full: there are at least 8 words in the FIFO */ +#define SDIO_STA_TXFIFOF ((uint32_t)0x00010000) /*!< Transmit FIFO full */ +#define SDIO_STA_RXFIFOF ((uint32_t)0x00020000) /*!< Receive FIFO full */ +#define SDIO_STA_TXFIFOE ((uint32_t)0x00040000) /*!< Transmit FIFO empty */ +#define SDIO_STA_RXFIFOE ((uint32_t)0x00080000) /*!< Receive FIFO empty */ +#define SDIO_STA_TXDAVL ((uint32_t)0x00100000) /*!< Data available in transmit FIFO */ +#define SDIO_STA_RXDAVL ((uint32_t)0x00200000) /*!< Data available in receive FIFO */ +#define SDIO_STA_SDIOIT ((uint32_t)0x00400000) /*!< SDIO interrupt received */ +#define SDIO_STA_CEATAEND ((uint32_t)0x00800000) /*!< CE-ATA command completion signal received for CMD61 */ + +/******************* Bit definition for SDIO_ICR register *******************/ +#define SDIO_ICR_CCRCFAILC ((uint32_t)0x00000001) /*!< CCRCFAIL flag clear bit */ +#define SDIO_ICR_DCRCFAILC ((uint32_t)0x00000002) /*!< DCRCFAIL flag clear bit */ +#define SDIO_ICR_CTIMEOUTC ((uint32_t)0x00000004) /*!< CTIMEOUT flag clear bit */ +#define SDIO_ICR_DTIMEOUTC ((uint32_t)0x00000008) /*!< DTIMEOUT flag clear bit */ +#define SDIO_ICR_TXUNDERRC ((uint32_t)0x00000010) /*!< TXUNDERR flag clear bit */ +#define SDIO_ICR_RXOVERRC ((uint32_t)0x00000020) /*!< RXOVERR flag clear bit */ +#define SDIO_ICR_CMDRENDC ((uint32_t)0x00000040) /*!< CMDREND flag clear bit */ +#define SDIO_ICR_CMDSENTC ((uint32_t)0x00000080) /*!< CMDSENT flag clear bit */ +#define SDIO_ICR_DATAENDC ((uint32_t)0x00000100) /*!< DATAEND flag clear bit */ +#define SDIO_ICR_STBITERRC ((uint32_t)0x00000200) /*!< STBITERR flag clear bit */ +#define SDIO_ICR_DBCKENDC ((uint32_t)0x00000400) /*!< DBCKEND flag clear bit */ +#define SDIO_ICR_SDIOITC ((uint32_t)0x00400000) /*!< SDIOIT flag clear bit */ +#define SDIO_ICR_CEATAENDC ((uint32_t)0x00800000) /*!< CEATAEND flag clear bit */ + +/****************** Bit definition for SDIO_MASK register *******************/ +#define SDIO_MASK_CCRCFAILIE ((uint32_t)0x00000001) /*!< Command CRC Fail Interrupt Enable */ +#define SDIO_MASK_DCRCFAILIE ((uint32_t)0x00000002) /*!< Data CRC Fail Interrupt Enable */ +#define SDIO_MASK_CTIMEOUTIE ((uint32_t)0x00000004) /*!< Command TimeOut Interrupt Enable */ +#define SDIO_MASK_DTIMEOUTIE ((uint32_t)0x00000008) /*!< Data TimeOut Interrupt Enable */ +#define SDIO_MASK_TXUNDERRIE ((uint32_t)0x00000010) /*!< Tx FIFO UnderRun Error Interrupt Enable */ +#define SDIO_MASK_RXOVERRIE ((uint32_t)0x00000020) /*!< Rx FIFO OverRun Error Interrupt Enable */ +#define SDIO_MASK_CMDRENDIE ((uint32_t)0x00000040) /*!< Command Response Received Interrupt Enable */ +#define SDIO_MASK_CMDSENTIE ((uint32_t)0x00000080) /*!< Command Sent Interrupt Enable */ +#define SDIO_MASK_DATAENDIE ((uint32_t)0x00000100) /*!< Data End Interrupt Enable */ +#define SDIO_MASK_STBITERRIE ((uint32_t)0x00000200) /*!< Start Bit Error Interrupt Enable */ +#define SDIO_MASK_DBCKENDIE ((uint32_t)0x00000400) /*!< Data Block End Interrupt Enable */ +#define SDIO_MASK_CMDACTIE ((uint32_t)0x00000800) /*!< Command Acting Interrupt Enable */ +#define SDIO_MASK_TXACTIE ((uint32_t)0x00001000) /*!< Data Transmit Acting Interrupt Enable */ +#define SDIO_MASK_RXACTIE ((uint32_t)0x00002000) /*!< Data receive acting interrupt enabled */ +#define SDIO_MASK_TXFIFOHEIE ((uint32_t)0x00004000) /*!< Tx FIFO Half Empty interrupt Enable */ +#define SDIO_MASK_RXFIFOHFIE ((uint32_t)0x00008000) /*!< Rx FIFO Half Full interrupt Enable */ +#define SDIO_MASK_TXFIFOFIE ((uint32_t)0x00010000) /*!< Tx FIFO Full interrupt Enable */ +#define SDIO_MASK_RXFIFOFIE ((uint32_t)0x00020000) /*!< Rx FIFO Full interrupt Enable */ +#define SDIO_MASK_TXFIFOEIE ((uint32_t)0x00040000) /*!< Tx FIFO Empty interrupt Enable */ +#define SDIO_MASK_RXFIFOEIE ((uint32_t)0x00080000) /*!< Rx FIFO Empty interrupt Enable */ +#define SDIO_MASK_TXDAVLIE ((uint32_t)0x00100000) /*!< Data available in Tx FIFO interrupt Enable */ +#define SDIO_MASK_RXDAVLIE ((uint32_t)0x00200000) /*!< Data available in Rx FIFO interrupt Enable */ +#define SDIO_MASK_SDIOITIE ((uint32_t)0x00400000) /*!< SDIO Mode Interrupt Received interrupt Enable */ +#define SDIO_MASK_CEATAENDIE ((uint32_t)0x00800000) /*!< CE-ATA command completion signal received Interrupt Enable */ + +/***************** Bit definition for SDIO_FIFOCNT register *****************/ +#define SDIO_FIFOCNT_FIFOCOUNT ((uint32_t)0x00FFFFFF) /*!< Remaining number of words to be written to or read from the FIFO */ + +/****************** Bit definition for SDIO_FIFO register *******************/ +#define SDIO_FIFO_FIFODATA ((uint32_t)0xFFFFFFFF) /*!< Receive and transmit FIFO data */ + +/******************************************************************************/ +/* */ +/* USB Device FS */ +/* */ +/******************************************************************************/ + +/*!< Endpoint-specific registers */ +/******************* Bit definition for USB_EP0R register *******************/ +#define USB_EP0R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP0R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP0R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP0R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP0R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP0R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP0R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP0R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP0R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP0R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP0R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP0R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP0R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP0R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP0R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP0R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP1R register *******************/ +#define USB_EP1R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP1R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP1R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP1R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP1R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP1R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP1R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP1R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP1R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP1R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP1R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP1R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP1R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP1R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP1R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP1R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP2R register *******************/ +#define USB_EP2R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP2R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP2R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP2R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP2R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP2R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP2R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP2R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP2R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP2R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP2R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP2R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP2R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP2R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP2R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP2R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP3R register *******************/ +#define USB_EP3R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP3R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP3R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP3R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP3R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP3R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP3R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP3R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP3R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP3R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP3R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP3R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP3R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP3R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP3R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP3R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP4R register *******************/ +#define USB_EP4R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP4R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP4R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP4R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP4R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP4R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP4R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP4R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP4R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP4R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP4R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP4R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP4R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP4R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP4R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP4R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP5R register *******************/ +#define USB_EP5R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP5R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP5R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP5R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP5R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP5R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP5R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP5R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP5R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP5R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP5R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP5R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP5R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP5R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP5R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP5R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP6R register *******************/ +#define USB_EP6R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP6R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP6R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP6R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP6R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP6R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP6R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP6R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP6R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP6R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP6R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP6R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP6R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP6R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP6R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP6R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/******************* Bit definition for USB_EP7R register *******************/ +#define USB_EP7R_EA ((uint16_t)0x000F) /*!< Endpoint Address */ + +#define USB_EP7R_STAT_TX ((uint16_t)0x0030) /*!< STAT_TX[1:0] bits (Status bits, for transmission transfers) */ +#define USB_EP7R_STAT_TX_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define USB_EP7R_STAT_TX_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define USB_EP7R_DTOG_TX ((uint16_t)0x0040) /*!< Data Toggle, for transmission transfers */ +#define USB_EP7R_CTR_TX ((uint16_t)0x0080) /*!< Correct Transfer for transmission */ +#define USB_EP7R_EP_KIND ((uint16_t)0x0100) /*!< Endpoint Kind */ + +#define USB_EP7R_EP_TYPE ((uint16_t)0x0600) /*!< EP_TYPE[1:0] bits (Endpoint type) */ +#define USB_EP7R_EP_TYPE_0 ((uint16_t)0x0200) /*!< Bit 0 */ +#define USB_EP7R_EP_TYPE_1 ((uint16_t)0x0400) /*!< Bit 1 */ + +#define USB_EP7R_SETUP ((uint16_t)0x0800) /*!< Setup transaction completed */ + +#define USB_EP7R_STAT_RX ((uint16_t)0x3000) /*!< STAT_RX[1:0] bits (Status bits, for reception transfers) */ +#define USB_EP7R_STAT_RX_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USB_EP7R_STAT_RX_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USB_EP7R_DTOG_RX ((uint16_t)0x4000) /*!< Data Toggle, for reception transfers */ +#define USB_EP7R_CTR_RX ((uint16_t)0x8000) /*!< Correct Transfer for reception */ + +/*!< Common registers */ +/******************* Bit definition for USB_CNTR register *******************/ +#define USB_CNTR_FRES ((uint16_t)0x0001) /*!< Force USB Reset */ +#define USB_CNTR_PDWN ((uint16_t)0x0002) /*!< Power down */ +#define USB_CNTR_LP_MODE ((uint16_t)0x0004) /*!< Low-power mode */ +#define USB_CNTR_FSUSP ((uint16_t)0x0008) /*!< Force suspend */ +#define USB_CNTR_RESUME ((uint16_t)0x0010) /*!< Resume request */ +#define USB_CNTR_ESOFM ((uint16_t)0x0100) /*!< Expected Start Of Frame Interrupt Mask */ +#define USB_CNTR_SOFM ((uint16_t)0x0200) /*!< Start Of Frame Interrupt Mask */ +#define USB_CNTR_RESETM ((uint16_t)0x0400) /*!< RESET Interrupt Mask */ +#define USB_CNTR_SUSPM ((uint16_t)0x0800) /*!< Suspend mode Interrupt Mask */ +#define USB_CNTR_WKUPM ((uint16_t)0x1000) /*!< Wakeup Interrupt Mask */ +#define USB_CNTR_ERRM ((uint16_t)0x2000) /*!< Error Interrupt Mask */ +#define USB_CNTR_PMAOVRM ((uint16_t)0x4000) /*!< Packet Memory Area Over / Underrun Interrupt Mask */ +#define USB_CNTR_CTRM ((uint16_t)0x8000) /*!< Correct Transfer Interrupt Mask */ + +/******************* Bit definition for USB_ISTR register *******************/ +#define USB_ISTR_EP_ID ((uint16_t)0x000F) /*!< Endpoint Identifier */ +#define USB_ISTR_DIR ((uint16_t)0x0010) /*!< Direction of transaction */ +#define USB_ISTR_ESOF ((uint16_t)0x0100) /*!< Expected Start Of Frame */ +#define USB_ISTR_SOF ((uint16_t)0x0200) /*!< Start Of Frame */ +#define USB_ISTR_RESET ((uint16_t)0x0400) /*!< USB RESET request */ +#define USB_ISTR_SUSP ((uint16_t)0x0800) /*!< Suspend mode request */ +#define USB_ISTR_WKUP ((uint16_t)0x1000) /*!< Wake up */ +#define USB_ISTR_ERR ((uint16_t)0x2000) /*!< Error */ +#define USB_ISTR_PMAOVR ((uint16_t)0x4000) /*!< Packet Memory Area Over / Underrun */ +#define USB_ISTR_CTR ((uint16_t)0x8000) /*!< Correct Transfer */ + +/******************* Bit definition for USB_FNR register ********************/ +#define USB_FNR_FN ((uint16_t)0x07FF) /*!< Frame Number */ +#define USB_FNR_LSOF ((uint16_t)0x1800) /*!< Lost SOF */ +#define USB_FNR_LCK ((uint16_t)0x2000) /*!< Locked */ +#define USB_FNR_RXDM ((uint16_t)0x4000) /*!< Receive Data - Line Status */ +#define USB_FNR_RXDP ((uint16_t)0x8000) /*!< Receive Data + Line Status */ + +/****************** Bit definition for USB_DADDR register *******************/ +#define USB_DADDR_ADD ((uint8_t)0x7F) /*!< ADD[6:0] bits (Device Address) */ +#define USB_DADDR_ADD0 ((uint8_t)0x01) /*!< Bit 0 */ +#define USB_DADDR_ADD1 ((uint8_t)0x02) /*!< Bit 1 */ +#define USB_DADDR_ADD2 ((uint8_t)0x04) /*!< Bit 2 */ +#define USB_DADDR_ADD3 ((uint8_t)0x08) /*!< Bit 3 */ +#define USB_DADDR_ADD4 ((uint8_t)0x10) /*!< Bit 4 */ +#define USB_DADDR_ADD5 ((uint8_t)0x20) /*!< Bit 5 */ +#define USB_DADDR_ADD6 ((uint8_t)0x40) /*!< Bit 6 */ + +#define USB_DADDR_EF ((uint8_t)0x80) /*!< Enable Function */ + +/****************** Bit definition for USB_BTABLE register ******************/ +#define USB_BTABLE_BTABLE ((uint16_t)0xFFF8) /*!< Buffer Table */ + +/*!< Buffer descriptor table */ +/***************** Bit definition for USB_ADDR0_TX register *****************/ +#define USB_ADDR0_TX_ADDR0_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 0 */ + +/***************** Bit definition for USB_ADDR1_TX register *****************/ +#define USB_ADDR1_TX_ADDR1_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 1 */ + +/***************** Bit definition for USB_ADDR2_TX register *****************/ +#define USB_ADDR2_TX_ADDR2_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 2 */ + +/***************** Bit definition for USB_ADDR3_TX register *****************/ +#define USB_ADDR3_TX_ADDR3_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 3 */ + +/***************** Bit definition for USB_ADDR4_TX register *****************/ +#define USB_ADDR4_TX_ADDR4_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 4 */ + +/***************** Bit definition for USB_ADDR5_TX register *****************/ +#define USB_ADDR5_TX_ADDR5_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 5 */ + +/***************** Bit definition for USB_ADDR6_TX register *****************/ +#define USB_ADDR6_TX_ADDR6_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 6 */ + +/***************** Bit definition for USB_ADDR7_TX register *****************/ +#define USB_ADDR7_TX_ADDR7_TX ((uint16_t)0xFFFE) /*!< Transmission Buffer Address 7 */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_COUNT0_TX register ****************/ +#define USB_COUNT0_TX_COUNT0_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 0 */ + +/***************** Bit definition for USB_COUNT1_TX register ****************/ +#define USB_COUNT1_TX_COUNT1_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 1 */ + +/***************** Bit definition for USB_COUNT2_TX register ****************/ +#define USB_COUNT2_TX_COUNT2_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 2 */ + +/***************** Bit definition for USB_COUNT3_TX register ****************/ +#define USB_COUNT3_TX_COUNT3_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 3 */ + +/***************** Bit definition for USB_COUNT4_TX register ****************/ +#define USB_COUNT4_TX_COUNT4_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 4 */ + +/***************** Bit definition for USB_COUNT5_TX register ****************/ +#define USB_COUNT5_TX_COUNT5_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 5 */ + +/***************** Bit definition for USB_COUNT6_TX register ****************/ +#define USB_COUNT6_TX_COUNT6_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 6 */ + +/***************** Bit definition for USB_COUNT7_TX register ****************/ +#define USB_COUNT7_TX_COUNT7_TX ((uint16_t)0x03FF) /*!< Transmission Byte Count 7 */ + +/*----------------------------------------------------------------------------*/ + +/**************** Bit definition for USB_COUNT0_TX_0 register ***************/ +#define USB_COUNT0_TX_0_COUNT0_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 0 (low) */ + +/**************** Bit definition for USB_COUNT0_TX_1 register ***************/ +#define USB_COUNT0_TX_1_COUNT0_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 0 (high) */ + +/**************** Bit definition for USB_COUNT1_TX_0 register ***************/ +#define USB_COUNT1_TX_0_COUNT1_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 1 (low) */ + +/**************** Bit definition for USB_COUNT1_TX_1 register ***************/ +#define USB_COUNT1_TX_1_COUNT1_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 1 (high) */ + +/**************** Bit definition for USB_COUNT2_TX_0 register ***************/ +#define USB_COUNT2_TX_0_COUNT2_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 2 (low) */ + +/**************** Bit definition for USB_COUNT2_TX_1 register ***************/ +#define USB_COUNT2_TX_1_COUNT2_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 2 (high) */ + +/**************** Bit definition for USB_COUNT3_TX_0 register ***************/ +#define USB_COUNT3_TX_0_COUNT3_TX_0 ((uint16_t)0x000003FF) /*!< Transmission Byte Count 3 (low) */ + +/**************** Bit definition for USB_COUNT3_TX_1 register ***************/ +#define USB_COUNT3_TX_1_COUNT3_TX_1 ((uint16_t)0x03FF0000) /*!< Transmission Byte Count 3 (high) */ + +/**************** Bit definition for USB_COUNT4_TX_0 register ***************/ +#define USB_COUNT4_TX_0_COUNT4_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 4 (low) */ + +/**************** Bit definition for USB_COUNT4_TX_1 register ***************/ +#define USB_COUNT4_TX_1_COUNT4_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 4 (high) */ + +/**************** Bit definition for USB_COUNT5_TX_0 register ***************/ +#define USB_COUNT5_TX_0_COUNT5_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 5 (low) */ + +/**************** Bit definition for USB_COUNT5_TX_1 register ***************/ +#define USB_COUNT5_TX_1_COUNT5_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 5 (high) */ + +/**************** Bit definition for USB_COUNT6_TX_0 register ***************/ +#define USB_COUNT6_TX_0_COUNT6_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 6 (low) */ + +/**************** Bit definition for USB_COUNT6_TX_1 register ***************/ +#define USB_COUNT6_TX_1_COUNT6_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 6 (high) */ + +/**************** Bit definition for USB_COUNT7_TX_0 register ***************/ +#define USB_COUNT7_TX_0_COUNT7_TX_0 ((uint32_t)0x000003FF) /*!< Transmission Byte Count 7 (low) */ + +/**************** Bit definition for USB_COUNT7_TX_1 register ***************/ +#define USB_COUNT7_TX_1_COUNT7_TX_1 ((uint32_t)0x03FF0000) /*!< Transmission Byte Count 7 (high) */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_ADDR0_RX register *****************/ +#define USB_ADDR0_RX_ADDR0_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 0 */ + +/***************** Bit definition for USB_ADDR1_RX register *****************/ +#define USB_ADDR1_RX_ADDR1_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 1 */ + +/***************** Bit definition for USB_ADDR2_RX register *****************/ +#define USB_ADDR2_RX_ADDR2_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 2 */ + +/***************** Bit definition for USB_ADDR3_RX register *****************/ +#define USB_ADDR3_RX_ADDR3_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 3 */ + +/***************** Bit definition for USB_ADDR4_RX register *****************/ +#define USB_ADDR4_RX_ADDR4_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 4 */ + +/***************** Bit definition for USB_ADDR5_RX register *****************/ +#define USB_ADDR5_RX_ADDR5_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 5 */ + +/***************** Bit definition for USB_ADDR6_RX register *****************/ +#define USB_ADDR6_RX_ADDR6_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 6 */ + +/***************** Bit definition for USB_ADDR7_RX register *****************/ +#define USB_ADDR7_RX_ADDR7_RX ((uint16_t)0xFFFE) /*!< Reception Buffer Address 7 */ + +/*----------------------------------------------------------------------------*/ + +/***************** Bit definition for USB_COUNT0_RX register ****************/ +#define USB_COUNT0_RX_COUNT0_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT0_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT0_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT0_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT0_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT0_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT0_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT0_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT1_RX register ****************/ +#define USB_COUNT1_RX_COUNT1_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT1_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT1_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT1_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT1_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT1_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT1_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT1_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT2_RX register ****************/ +#define USB_COUNT2_RX_COUNT2_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT2_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT2_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT2_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT2_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT2_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT2_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT2_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT3_RX register ****************/ +#define USB_COUNT3_RX_COUNT3_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT3_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT3_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT3_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT3_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT3_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT3_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT3_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT4_RX register ****************/ +#define USB_COUNT4_RX_COUNT4_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT4_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT4_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT4_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT4_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT4_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT4_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT4_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT5_RX register ****************/ +#define USB_COUNT5_RX_COUNT5_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT5_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT5_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT5_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT5_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT5_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT5_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT5_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT6_RX register ****************/ +#define USB_COUNT6_RX_COUNT6_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT6_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT6_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT6_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT6_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT6_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT6_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT6_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/***************** Bit definition for USB_COUNT7_RX register ****************/ +#define USB_COUNT7_RX_COUNT7_RX ((uint16_t)0x03FF) /*!< Reception Byte Count */ + +#define USB_COUNT7_RX_NUM_BLOCK ((uint16_t)0x7C00) /*!< NUM_BLOCK[4:0] bits (Number of blocks) */ +#define USB_COUNT7_RX_NUM_BLOCK_0 ((uint16_t)0x0400) /*!< Bit 0 */ +#define USB_COUNT7_RX_NUM_BLOCK_1 ((uint16_t)0x0800) /*!< Bit 1 */ +#define USB_COUNT7_RX_NUM_BLOCK_2 ((uint16_t)0x1000) /*!< Bit 2 */ +#define USB_COUNT7_RX_NUM_BLOCK_3 ((uint16_t)0x2000) /*!< Bit 3 */ +#define USB_COUNT7_RX_NUM_BLOCK_4 ((uint16_t)0x4000) /*!< Bit 4 */ + +#define USB_COUNT7_RX_BLSIZE ((uint16_t)0x8000) /*!< BLock SIZE */ + +/*----------------------------------------------------------------------------*/ + +/**************** Bit definition for USB_COUNT0_RX_0 register ***************/ +#define USB_COUNT0_RX_0_COUNT0_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT0_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT0_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT0_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT0_RX_1 register ***************/ +#define USB_COUNT0_RX_1_COUNT0_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT0_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 1 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT0_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT0_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT1_RX_0 register ***************/ +#define USB_COUNT1_RX_0_COUNT1_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT1_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT1_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT1_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT1_RX_1 register ***************/ +#define USB_COUNT1_RX_1_COUNT1_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT1_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT1_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT1_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT2_RX_0 register ***************/ +#define USB_COUNT2_RX_0_COUNT2_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT2_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT2_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT2_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT2_RX_1 register ***************/ +#define USB_COUNT2_RX_1_COUNT2_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT2_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT2_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT2_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT3_RX_0 register ***************/ +#define USB_COUNT3_RX_0_COUNT3_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT3_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT3_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT3_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT3_RX_1 register ***************/ +#define USB_COUNT3_RX_1_COUNT3_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT3_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT3_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT3_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT4_RX_0 register ***************/ +#define USB_COUNT4_RX_0_COUNT4_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT4_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT4_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT4_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT4_RX_1 register ***************/ +#define USB_COUNT4_RX_1_COUNT4_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT4_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT4_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT4_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/**************** Bit definition for USB_COUNT5_RX_0 register ***************/ +#define USB_COUNT5_RX_0_COUNT5_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT5_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT5_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT5_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT5_RX_1 register ***************/ +#define USB_COUNT5_RX_1_COUNT5_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT5_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT5_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT5_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/*************** Bit definition for USB_COUNT6_RX_0 register ***************/ +#define USB_COUNT6_RX_0_COUNT6_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT6_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT6_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT6_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/**************** Bit definition for USB_COUNT6_RX_1 register ***************/ +#define USB_COUNT6_RX_1_COUNT6_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT6_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT6_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT6_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/*************** Bit definition for USB_COUNT7_RX_0 register ****************/ +#define USB_COUNT7_RX_0_COUNT7_RX_0 ((uint32_t)0x000003FF) /*!< Reception Byte Count (low) */ + +#define USB_COUNT7_RX_0_NUM_BLOCK_0 ((uint32_t)0x00007C00) /*!< NUM_BLOCK_0[4:0] bits (Number of blocks) (low) */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_0 ((uint32_t)0x00000400) /*!< Bit 0 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_1 ((uint32_t)0x00000800) /*!< Bit 1 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_2 ((uint32_t)0x00001000) /*!< Bit 2 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_3 ((uint32_t)0x00002000) /*!< Bit 3 */ +#define USB_COUNT7_RX_0_NUM_BLOCK_0_4 ((uint32_t)0x00004000) /*!< Bit 4 */ + +#define USB_COUNT7_RX_0_BLSIZE_0 ((uint32_t)0x00008000) /*!< BLock SIZE (low) */ + +/*************** Bit definition for USB_COUNT7_RX_1 register ****************/ +#define USB_COUNT7_RX_1_COUNT7_RX_1 ((uint32_t)0x03FF0000) /*!< Reception Byte Count (high) */ + +#define USB_COUNT7_RX_1_NUM_BLOCK_1 ((uint32_t)0x7C000000) /*!< NUM_BLOCK_1[4:0] bits (Number of blocks) (high) */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_0 ((uint32_t)0x04000000) /*!< Bit 0 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_1 ((uint32_t)0x08000000) /*!< Bit 1 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_2 ((uint32_t)0x10000000) /*!< Bit 2 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_3 ((uint32_t)0x20000000) /*!< Bit 3 */ +#define USB_COUNT7_RX_1_NUM_BLOCK_1_4 ((uint32_t)0x40000000) /*!< Bit 4 */ + +#define USB_COUNT7_RX_1_BLSIZE_1 ((uint32_t)0x80000000) /*!< BLock SIZE (high) */ + +/******************************************************************************/ +/* */ +/* Controller Area Network */ +/* */ +/******************************************************************************/ + +/*!< CAN control and status registers */ +/******************* Bit definition for CAN_MCR register ********************/ +#define CAN_MCR_INRQ ((uint16_t)0x0001) /*!< Initialization Request */ +#define CAN_MCR_SLEEP ((uint16_t)0x0002) /*!< Sleep Mode Request */ +#define CAN_MCR_TXFP ((uint16_t)0x0004) /*!< Transmit FIFO Priority */ +#define CAN_MCR_RFLM ((uint16_t)0x0008) /*!< Receive FIFO Locked Mode */ +#define CAN_MCR_NART ((uint16_t)0x0010) /*!< No Automatic Retransmission */ +#define CAN_MCR_AWUM ((uint16_t)0x0020) /*!< Automatic Wakeup Mode */ +#define CAN_MCR_ABOM ((uint16_t)0x0040) /*!< Automatic Bus-Off Management */ +#define CAN_MCR_TTCM ((uint16_t)0x0080) /*!< Time Triggered Communication Mode */ +#define CAN_MCR_RESET ((uint16_t)0x8000) /*!< CAN software master reset */ + +/******************* Bit definition for CAN_MSR register ********************/ +#define CAN_MSR_INAK ((uint16_t)0x0001) /*!< Initialization Acknowledge */ +#define CAN_MSR_SLAK ((uint16_t)0x0002) /*!< Sleep Acknowledge */ +#define CAN_MSR_ERRI ((uint16_t)0x0004) /*!< Error Interrupt */ +#define CAN_MSR_WKUI ((uint16_t)0x0008) /*!< Wakeup Interrupt */ +#define CAN_MSR_SLAKI ((uint16_t)0x0010) /*!< Sleep Acknowledge Interrupt */ +#define CAN_MSR_TXM ((uint16_t)0x0100) /*!< Transmit Mode */ +#define CAN_MSR_RXM ((uint16_t)0x0200) /*!< Receive Mode */ +#define CAN_MSR_SAMP ((uint16_t)0x0400) /*!< Last Sample Point */ +#define CAN_MSR_RX ((uint16_t)0x0800) /*!< CAN Rx Signal */ + +/******************* Bit definition for CAN_TSR register ********************/ +#define CAN_TSR_RQCP0 ((uint32_t)0x00000001) /*!< Request Completed Mailbox0 */ +#define CAN_TSR_TXOK0 ((uint32_t)0x00000002) /*!< Transmission OK of Mailbox0 */ +#define CAN_TSR_ALST0 ((uint32_t)0x00000004) /*!< Arbitration Lost for Mailbox0 */ +#define CAN_TSR_TERR0 ((uint32_t)0x00000008) /*!< Transmission Error of Mailbox0 */ +#define CAN_TSR_ABRQ0 ((uint32_t)0x00000080) /*!< Abort Request for Mailbox0 */ +#define CAN_TSR_RQCP1 ((uint32_t)0x00000100) /*!< Request Completed Mailbox1 */ +#define CAN_TSR_TXOK1 ((uint32_t)0x00000200) /*!< Transmission OK of Mailbox1 */ +#define CAN_TSR_ALST1 ((uint32_t)0x00000400) /*!< Arbitration Lost for Mailbox1 */ +#define CAN_TSR_TERR1 ((uint32_t)0x00000800) /*!< Transmission Error of Mailbox1 */ +#define CAN_TSR_ABRQ1 ((uint32_t)0x00008000) /*!< Abort Request for Mailbox 1 */ +#define CAN_TSR_RQCP2 ((uint32_t)0x00010000) /*!< Request Completed Mailbox2 */ +#define CAN_TSR_TXOK2 ((uint32_t)0x00020000) /*!< Transmission OK of Mailbox 2 */ +#define CAN_TSR_ALST2 ((uint32_t)0x00040000) /*!< Arbitration Lost for mailbox 2 */ +#define CAN_TSR_TERR2 ((uint32_t)0x00080000) /*!< Transmission Error of Mailbox 2 */ +#define CAN_TSR_ABRQ2 ((uint32_t)0x00800000) /*!< Abort Request for Mailbox 2 */ +#define CAN_TSR_CODE ((uint32_t)0x03000000) /*!< Mailbox Code */ + +#define CAN_TSR_TME ((uint32_t)0x1C000000) /*!< TME[2:0] bits */ +#define CAN_TSR_TME0 ((uint32_t)0x04000000) /*!< Transmit Mailbox 0 Empty */ +#define CAN_TSR_TME1 ((uint32_t)0x08000000) /*!< Transmit Mailbox 1 Empty */ +#define CAN_TSR_TME2 ((uint32_t)0x10000000) /*!< Transmit Mailbox 2 Empty */ + +#define CAN_TSR_LOW ((uint32_t)0xE0000000) /*!< LOW[2:0] bits */ +#define CAN_TSR_LOW0 ((uint32_t)0x20000000) /*!< Lowest Priority Flag for Mailbox 0 */ +#define CAN_TSR_LOW1 ((uint32_t)0x40000000) /*!< Lowest Priority Flag for Mailbox 1 */ +#define CAN_TSR_LOW2 ((uint32_t)0x80000000) /*!< Lowest Priority Flag for Mailbox 2 */ + +/******************* Bit definition for CAN_RF0R register *******************/ +#define CAN_RF0R_FMP0 ((uint8_t)0x03) /*!< FIFO 0 Message Pending */ +#define CAN_RF0R_FULL0 ((uint8_t)0x08) /*!< FIFO 0 Full */ +#define CAN_RF0R_FOVR0 ((uint8_t)0x10) /*!< FIFO 0 Overrun */ +#define CAN_RF0R_RFOM0 ((uint8_t)0x20) /*!< Release FIFO 0 Output Mailbox */ + +/******************* Bit definition for CAN_RF1R register *******************/ +#define CAN_RF1R_FMP1 ((uint8_t)0x03) /*!< FIFO 1 Message Pending */ +#define CAN_RF1R_FULL1 ((uint8_t)0x08) /*!< FIFO 1 Full */ +#define CAN_RF1R_FOVR1 ((uint8_t)0x10) /*!< FIFO 1 Overrun */ +#define CAN_RF1R_RFOM1 ((uint8_t)0x20) /*!< Release FIFO 1 Output Mailbox */ + +/******************** Bit definition for CAN_IER register *******************/ +#define CAN_IER_TMEIE ((uint32_t)0x00000001) /*!< Transmit Mailbox Empty Interrupt Enable */ +#define CAN_IER_FMPIE0 ((uint32_t)0x00000002) /*!< FIFO Message Pending Interrupt Enable */ +#define CAN_IER_FFIE0 ((uint32_t)0x00000004) /*!< FIFO Full Interrupt Enable */ +#define CAN_IER_FOVIE0 ((uint32_t)0x00000008) /*!< FIFO Overrun Interrupt Enable */ +#define CAN_IER_FMPIE1 ((uint32_t)0x00000010) /*!< FIFO Message Pending Interrupt Enable */ +#define CAN_IER_FFIE1 ((uint32_t)0x00000020) /*!< FIFO Full Interrupt Enable */ +#define CAN_IER_FOVIE1 ((uint32_t)0x00000040) /*!< FIFO Overrun Interrupt Enable */ +#define CAN_IER_EWGIE ((uint32_t)0x00000100) /*!< Error Warning Interrupt Enable */ +#define CAN_IER_EPVIE ((uint32_t)0x00000200) /*!< Error Passive Interrupt Enable */ +#define CAN_IER_BOFIE ((uint32_t)0x00000400) /*!< Bus-Off Interrupt Enable */ +#define CAN_IER_LECIE ((uint32_t)0x00000800) /*!< Last Error Code Interrupt Enable */ +#define CAN_IER_ERRIE ((uint32_t)0x00008000) /*!< Error Interrupt Enable */ +#define CAN_IER_WKUIE ((uint32_t)0x00010000) /*!< Wakeup Interrupt Enable */ +#define CAN_IER_SLKIE ((uint32_t)0x00020000) /*!< Sleep Interrupt Enable */ + +/******************** Bit definition for CAN_ESR register *******************/ +#define CAN_ESR_EWGF ((uint32_t)0x00000001) /*!< Error Warning Flag */ +#define CAN_ESR_EPVF ((uint32_t)0x00000002) /*!< Error Passive Flag */ +#define CAN_ESR_BOFF ((uint32_t)0x00000004) /*!< Bus-Off Flag */ + +#define CAN_ESR_LEC ((uint32_t)0x00000070) /*!< LEC[2:0] bits (Last Error Code) */ +#define CAN_ESR_LEC_0 ((uint32_t)0x00000010) /*!< Bit 0 */ +#define CAN_ESR_LEC_1 ((uint32_t)0x00000020) /*!< Bit 1 */ +#define CAN_ESR_LEC_2 ((uint32_t)0x00000040) /*!< Bit 2 */ + +#define CAN_ESR_TEC ((uint32_t)0x00FF0000) /*!< Least significant byte of the 9-bit Transmit Error Counter */ +#define CAN_ESR_REC ((uint32_t)0xFF000000) /*!< Receive Error Counter */ + +/******************* Bit definition for CAN_BTR register ********************/ +#define CAN_BTR_BRP ((uint32_t)0x000003FF) /*!< Baud Rate Prescaler */ +#define CAN_BTR_TS1 ((uint32_t)0x000F0000) /*!< Time Segment 1 */ +#define CAN_BTR_TS2 ((uint32_t)0x00700000) /*!< Time Segment 2 */ +#define CAN_BTR_SJW ((uint32_t)0x03000000) /*!< Resynchronization Jump Width */ +#define CAN_BTR_LBKM ((uint32_t)0x40000000) /*!< Loop Back Mode (Debug) */ +#define CAN_BTR_SILM ((uint32_t)0x80000000) /*!< Silent Mode */ + +/*!< Mailbox registers */ +/****************** Bit definition for CAN_TI0R register ********************/ +#define CAN_TI0R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ +#define CAN_TI0R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_TI0R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_TI0R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ +#define CAN_TI0R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/****************** Bit definition for CAN_TDT0R register *******************/ +#define CAN_TDT0R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_TDT0R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ +#define CAN_TDT0R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/****************** Bit definition for CAN_TDL0R register *******************/ +#define CAN_TDL0R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_TDL0R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_TDL0R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_TDL0R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/****************** Bit definition for CAN_TDH0R register *******************/ +#define CAN_TDH0R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_TDH0R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_TDH0R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_TDH0R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_TI1R register *******************/ +#define CAN_TI1R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ +#define CAN_TI1R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_TI1R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_TI1R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ +#define CAN_TI1R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_TDT1R register ******************/ +#define CAN_TDT1R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_TDT1R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ +#define CAN_TDT1R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_TDL1R register ******************/ +#define CAN_TDL1R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_TDL1R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_TDL1R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_TDL1R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_TDH1R register ******************/ +#define CAN_TDH1R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_TDH1R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_TDH1R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_TDH1R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_TI2R register *******************/ +#define CAN_TI2R_TXRQ ((uint32_t)0x00000001) /*!< Transmit Mailbox Request */ +#define CAN_TI2R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_TI2R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_TI2R_EXID ((uint32_t)0x001FFFF8) /*!< Extended identifier */ +#define CAN_TI2R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_TDT2R register ******************/ +#define CAN_TDT2R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_TDT2R_TGT ((uint32_t)0x00000100) /*!< Transmit Global Time */ +#define CAN_TDT2R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_TDL2R register ******************/ +#define CAN_TDL2R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_TDL2R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_TDL2R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_TDL2R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_TDH2R register ******************/ +#define CAN_TDH2R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_TDH2R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_TDH2R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_TDH2R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_RI0R register *******************/ +#define CAN_RI0R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_RI0R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_RI0R_EXID ((uint32_t)0x001FFFF8) /*!< Extended Identifier */ +#define CAN_RI0R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_RDT0R register ******************/ +#define CAN_RDT0R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_RDT0R_FMI ((uint32_t)0x0000FF00) /*!< Filter Match Index */ +#define CAN_RDT0R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_RDL0R register ******************/ +#define CAN_RDL0R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_RDL0R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_RDL0R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_RDL0R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_RDH0R register ******************/ +#define CAN_RDH0R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_RDH0R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_RDH0R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_RDH0R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/******************* Bit definition for CAN_RI1R register *******************/ +#define CAN_RI1R_RTR ((uint32_t)0x00000002) /*!< Remote Transmission Request */ +#define CAN_RI1R_IDE ((uint32_t)0x00000004) /*!< Identifier Extension */ +#define CAN_RI1R_EXID ((uint32_t)0x001FFFF8) /*!< Extended identifier */ +#define CAN_RI1R_STID ((uint32_t)0xFFE00000) /*!< Standard Identifier or Extended Identifier */ + +/******************* Bit definition for CAN_RDT1R register ******************/ +#define CAN_RDT1R_DLC ((uint32_t)0x0000000F) /*!< Data Length Code */ +#define CAN_RDT1R_FMI ((uint32_t)0x0000FF00) /*!< Filter Match Index */ +#define CAN_RDT1R_TIME ((uint32_t)0xFFFF0000) /*!< Message Time Stamp */ + +/******************* Bit definition for CAN_RDL1R register ******************/ +#define CAN_RDL1R_DATA0 ((uint32_t)0x000000FF) /*!< Data byte 0 */ +#define CAN_RDL1R_DATA1 ((uint32_t)0x0000FF00) /*!< Data byte 1 */ +#define CAN_RDL1R_DATA2 ((uint32_t)0x00FF0000) /*!< Data byte 2 */ +#define CAN_RDL1R_DATA3 ((uint32_t)0xFF000000) /*!< Data byte 3 */ + +/******************* Bit definition for CAN_RDH1R register ******************/ +#define CAN_RDH1R_DATA4 ((uint32_t)0x000000FF) /*!< Data byte 4 */ +#define CAN_RDH1R_DATA5 ((uint32_t)0x0000FF00) /*!< Data byte 5 */ +#define CAN_RDH1R_DATA6 ((uint32_t)0x00FF0000) /*!< Data byte 6 */ +#define CAN_RDH1R_DATA7 ((uint32_t)0xFF000000) /*!< Data byte 7 */ + +/*!< CAN filter registers */ +/******************* Bit definition for CAN_FMR register ********************/ +#define CAN_FMR_FINIT ((uint8_t)0x01) /*!< Filter Init Mode */ + +/******************* Bit definition for CAN_FM1R register *******************/ +#define CAN_FM1R_FBM ((uint16_t)0x3FFF) /*!< Filter Mode */ +#define CAN_FM1R_FBM0 ((uint16_t)0x0001) /*!< Filter Init Mode bit 0 */ +#define CAN_FM1R_FBM1 ((uint16_t)0x0002) /*!< Filter Init Mode bit 1 */ +#define CAN_FM1R_FBM2 ((uint16_t)0x0004) /*!< Filter Init Mode bit 2 */ +#define CAN_FM1R_FBM3 ((uint16_t)0x0008) /*!< Filter Init Mode bit 3 */ +#define CAN_FM1R_FBM4 ((uint16_t)0x0010) /*!< Filter Init Mode bit 4 */ +#define CAN_FM1R_FBM5 ((uint16_t)0x0020) /*!< Filter Init Mode bit 5 */ +#define CAN_FM1R_FBM6 ((uint16_t)0x0040) /*!< Filter Init Mode bit 6 */ +#define CAN_FM1R_FBM7 ((uint16_t)0x0080) /*!< Filter Init Mode bit 7 */ +#define CAN_FM1R_FBM8 ((uint16_t)0x0100) /*!< Filter Init Mode bit 8 */ +#define CAN_FM1R_FBM9 ((uint16_t)0x0200) /*!< Filter Init Mode bit 9 */ +#define CAN_FM1R_FBM10 ((uint16_t)0x0400) /*!< Filter Init Mode bit 10 */ +#define CAN_FM1R_FBM11 ((uint16_t)0x0800) /*!< Filter Init Mode bit 11 */ +#define CAN_FM1R_FBM12 ((uint16_t)0x1000) /*!< Filter Init Mode bit 12 */ +#define CAN_FM1R_FBM13 ((uint16_t)0x2000) /*!< Filter Init Mode bit 13 */ + +/******************* Bit definition for CAN_FS1R register *******************/ +#define CAN_FS1R_FSC ((uint16_t)0x3FFF) /*!< Filter Scale Configuration */ +#define CAN_FS1R_FSC0 ((uint16_t)0x0001) /*!< Filter Scale Configuration bit 0 */ +#define CAN_FS1R_FSC1 ((uint16_t)0x0002) /*!< Filter Scale Configuration bit 1 */ +#define CAN_FS1R_FSC2 ((uint16_t)0x0004) /*!< Filter Scale Configuration bit 2 */ +#define CAN_FS1R_FSC3 ((uint16_t)0x0008) /*!< Filter Scale Configuration bit 3 */ +#define CAN_FS1R_FSC4 ((uint16_t)0x0010) /*!< Filter Scale Configuration bit 4 */ +#define CAN_FS1R_FSC5 ((uint16_t)0x0020) /*!< Filter Scale Configuration bit 5 */ +#define CAN_FS1R_FSC6 ((uint16_t)0x0040) /*!< Filter Scale Configuration bit 6 */ +#define CAN_FS1R_FSC7 ((uint16_t)0x0080) /*!< Filter Scale Configuration bit 7 */ +#define CAN_FS1R_FSC8 ((uint16_t)0x0100) /*!< Filter Scale Configuration bit 8 */ +#define CAN_FS1R_FSC9 ((uint16_t)0x0200) /*!< Filter Scale Configuration bit 9 */ +#define CAN_FS1R_FSC10 ((uint16_t)0x0400) /*!< Filter Scale Configuration bit 10 */ +#define CAN_FS1R_FSC11 ((uint16_t)0x0800) /*!< Filter Scale Configuration bit 11 */ +#define CAN_FS1R_FSC12 ((uint16_t)0x1000) /*!< Filter Scale Configuration bit 12 */ +#define CAN_FS1R_FSC13 ((uint16_t)0x2000) /*!< Filter Scale Configuration bit 13 */ + +/****************** Bit definition for CAN_FFA1R register *******************/ +#define CAN_FFA1R_FFA ((uint16_t)0x3FFF) /*!< Filter FIFO Assignment */ +#define CAN_FFA1R_FFA0 ((uint16_t)0x0001) /*!< Filter FIFO Assignment for Filter 0 */ +#define CAN_FFA1R_FFA1 ((uint16_t)0x0002) /*!< Filter FIFO Assignment for Filter 1 */ +#define CAN_FFA1R_FFA2 ((uint16_t)0x0004) /*!< Filter FIFO Assignment for Filter 2 */ +#define CAN_FFA1R_FFA3 ((uint16_t)0x0008) /*!< Filter FIFO Assignment for Filter 3 */ +#define CAN_FFA1R_FFA4 ((uint16_t)0x0010) /*!< Filter FIFO Assignment for Filter 4 */ +#define CAN_FFA1R_FFA5 ((uint16_t)0x0020) /*!< Filter FIFO Assignment for Filter 5 */ +#define CAN_FFA1R_FFA6 ((uint16_t)0x0040) /*!< Filter FIFO Assignment for Filter 6 */ +#define CAN_FFA1R_FFA7 ((uint16_t)0x0080) /*!< Filter FIFO Assignment for Filter 7 */ +#define CAN_FFA1R_FFA8 ((uint16_t)0x0100) /*!< Filter FIFO Assignment for Filter 8 */ +#define CAN_FFA1R_FFA9 ((uint16_t)0x0200) /*!< Filter FIFO Assignment for Filter 9 */ +#define CAN_FFA1R_FFA10 ((uint16_t)0x0400) /*!< Filter FIFO Assignment for Filter 10 */ +#define CAN_FFA1R_FFA11 ((uint16_t)0x0800) /*!< Filter FIFO Assignment for Filter 11 */ +#define CAN_FFA1R_FFA12 ((uint16_t)0x1000) /*!< Filter FIFO Assignment for Filter 12 */ +#define CAN_FFA1R_FFA13 ((uint16_t)0x2000) /*!< Filter FIFO Assignment for Filter 13 */ + +/******************* Bit definition for CAN_FA1R register *******************/ +#define CAN_FA1R_FACT ((uint16_t)0x3FFF) /*!< Filter Active */ +#define CAN_FA1R_FACT0 ((uint16_t)0x0001) /*!< Filter 0 Active */ +#define CAN_FA1R_FACT1 ((uint16_t)0x0002) /*!< Filter 1 Active */ +#define CAN_FA1R_FACT2 ((uint16_t)0x0004) /*!< Filter 2 Active */ +#define CAN_FA1R_FACT3 ((uint16_t)0x0008) /*!< Filter 3 Active */ +#define CAN_FA1R_FACT4 ((uint16_t)0x0010) /*!< Filter 4 Active */ +#define CAN_FA1R_FACT5 ((uint16_t)0x0020) /*!< Filter 5 Active */ +#define CAN_FA1R_FACT6 ((uint16_t)0x0040) /*!< Filter 6 Active */ +#define CAN_FA1R_FACT7 ((uint16_t)0x0080) /*!< Filter 7 Active */ +#define CAN_FA1R_FACT8 ((uint16_t)0x0100) /*!< Filter 8 Active */ +#define CAN_FA1R_FACT9 ((uint16_t)0x0200) /*!< Filter 9 Active */ +#define CAN_FA1R_FACT10 ((uint16_t)0x0400) /*!< Filter 10 Active */ +#define CAN_FA1R_FACT11 ((uint16_t)0x0800) /*!< Filter 11 Active */ +#define CAN_FA1R_FACT12 ((uint16_t)0x1000) /*!< Filter 12 Active */ +#define CAN_FA1R_FACT13 ((uint16_t)0x2000) /*!< Filter 13 Active */ + +/******************* Bit definition for CAN_F0R1 register *******************/ +#define CAN_F0R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F0R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F0R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F0R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F0R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F0R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F0R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F0R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F0R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F0R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F0R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F0R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F0R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F0R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F0R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F0R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F0R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F0R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F0R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F0R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F0R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F0R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F0R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F0R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F0R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F0R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F0R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F0R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F0R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F0R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F0R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F0R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F1R1 register *******************/ +#define CAN_F1R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F1R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F1R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F1R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F1R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F1R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F1R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F1R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F1R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F1R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F1R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F1R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F1R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F1R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F1R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F1R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F1R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F1R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F1R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F1R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F1R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F1R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F1R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F1R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F1R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F1R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F1R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F1R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F1R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F1R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F1R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F1R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F2R1 register *******************/ +#define CAN_F2R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F2R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F2R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F2R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F2R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F2R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F2R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F2R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F2R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F2R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F2R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F2R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F2R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F2R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F2R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F2R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F2R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F2R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F2R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F2R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F2R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F2R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F2R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F2R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F2R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F2R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F2R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F2R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F2R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F2R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F2R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F2R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F3R1 register *******************/ +#define CAN_F3R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F3R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F3R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F3R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F3R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F3R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F3R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F3R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F3R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F3R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F3R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F3R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F3R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F3R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F3R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F3R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F3R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F3R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F3R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F3R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F3R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F3R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F3R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F3R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F3R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F3R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F3R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F3R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F3R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F3R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F3R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F3R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F4R1 register *******************/ +#define CAN_F4R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F4R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F4R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F4R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F4R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F4R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F4R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F4R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F4R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F4R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F4R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F4R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F4R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F4R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F4R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F4R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F4R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F4R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F4R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F4R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F4R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F4R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F4R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F4R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F4R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F4R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F4R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F4R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F4R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F4R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F4R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F4R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F5R1 register *******************/ +#define CAN_F5R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F5R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F5R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F5R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F5R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F5R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F5R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F5R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F5R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F5R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F5R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F5R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F5R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F5R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F5R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F5R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F5R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F5R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F5R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F5R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F5R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F5R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F5R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F5R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F5R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F5R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F5R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F5R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F5R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F5R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F5R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F5R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F6R1 register *******************/ +#define CAN_F6R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F6R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F6R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F6R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F6R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F6R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F6R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F6R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F6R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F6R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F6R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F6R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F6R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F6R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F6R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F6R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F6R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F6R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F6R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F6R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F6R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F6R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F6R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F6R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F6R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F6R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F6R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F6R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F6R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F6R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F6R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F6R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F7R1 register *******************/ +#define CAN_F7R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F7R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F7R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F7R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F7R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F7R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F7R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F7R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F7R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F7R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F7R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F7R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F7R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F7R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F7R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F7R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F7R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F7R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F7R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F7R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F7R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F7R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F7R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F7R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F7R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F7R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F7R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F7R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F7R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F7R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F7R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F7R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F8R1 register *******************/ +#define CAN_F8R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F8R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F8R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F8R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F8R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F8R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F8R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F8R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F8R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F8R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F8R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F8R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F8R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F8R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F8R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F8R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F8R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F8R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F8R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F8R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F8R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F8R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F8R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F8R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F8R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F8R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F8R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F8R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F8R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F8R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F8R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F8R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F9R1 register *******************/ +#define CAN_F9R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F9R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F9R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F9R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F9R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F9R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F9R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F9R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F9R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F9R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F9R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F9R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F9R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F9R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F9R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F9R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F9R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F9R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F9R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F9R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F9R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F9R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F9R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F9R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F9R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F9R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F9R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F9R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F9R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F9R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F9R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F9R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F10R1 register ******************/ +#define CAN_F10R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F10R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F10R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F10R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F10R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F10R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F10R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F10R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F10R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F10R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F10R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F10R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F10R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F10R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F10R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F10R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F10R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F10R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F10R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F10R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F10R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F10R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F10R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F10R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F10R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F10R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F10R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F10R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F10R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F10R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F10R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F10R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F11R1 register ******************/ +#define CAN_F11R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F11R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F11R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F11R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F11R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F11R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F11R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F11R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F11R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F11R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F11R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F11R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F11R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F11R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F11R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F11R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F11R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F11R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F11R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F11R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F11R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F11R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F11R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F11R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F11R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F11R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F11R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F11R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F11R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F11R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F11R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F11R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F12R1 register ******************/ +#define CAN_F12R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F12R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F12R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F12R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F12R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F12R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F12R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F12R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F12R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F12R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F12R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F12R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F12R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F12R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F12R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F12R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F12R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F12R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F12R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F12R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F12R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F12R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F12R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F12R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F12R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F12R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F12R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F12R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F12R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F12R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F12R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F12R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F13R1 register ******************/ +#define CAN_F13R1_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F13R1_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F13R1_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F13R1_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F13R1_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F13R1_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F13R1_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F13R1_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F13R1_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F13R1_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F13R1_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F13R1_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F13R1_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F13R1_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F13R1_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F13R1_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F13R1_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F13R1_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F13R1_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F13R1_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F13R1_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F13R1_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F13R1_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F13R1_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F13R1_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F13R1_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F13R1_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F13R1_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F13R1_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F13R1_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F13R1_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F13R1_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F0R2 register *******************/ +#define CAN_F0R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F0R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F0R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F0R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F0R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F0R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F0R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F0R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F0R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F0R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F0R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F0R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F0R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F0R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F0R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F0R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F0R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F0R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F0R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F0R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F0R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F0R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F0R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F0R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F0R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F0R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F0R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F0R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F0R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F0R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F0R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F0R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F1R2 register *******************/ +#define CAN_F1R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F1R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F1R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F1R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F1R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F1R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F1R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F1R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F1R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F1R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F1R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F1R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F1R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F1R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F1R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F1R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F1R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F1R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F1R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F1R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F1R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F1R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F1R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F1R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F1R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F1R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F1R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F1R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F1R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F1R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F1R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F1R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F2R2 register *******************/ +#define CAN_F2R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F2R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F2R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F2R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F2R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F2R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F2R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F2R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F2R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F2R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F2R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F2R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F2R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F2R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F2R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F2R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F2R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F2R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F2R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F2R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F2R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F2R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F2R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F2R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F2R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F2R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F2R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F2R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F2R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F2R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F2R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F2R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F3R2 register *******************/ +#define CAN_F3R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F3R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F3R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F3R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F3R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F3R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F3R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F3R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F3R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F3R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F3R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F3R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F3R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F3R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F3R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F3R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F3R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F3R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F3R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F3R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F3R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F3R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F3R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F3R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F3R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F3R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F3R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F3R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F3R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F3R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F3R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F3R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F4R2 register *******************/ +#define CAN_F4R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F4R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F4R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F4R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F4R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F4R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F4R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F4R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F4R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F4R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F4R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F4R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F4R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F4R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F4R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F4R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F4R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F4R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F4R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F4R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F4R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F4R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F4R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F4R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F4R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F4R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F4R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F4R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F4R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F4R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F4R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F4R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F5R2 register *******************/ +#define CAN_F5R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F5R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F5R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F5R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F5R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F5R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F5R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F5R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F5R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F5R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F5R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F5R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F5R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F5R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F5R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F5R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F5R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F5R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F5R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F5R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F5R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F5R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F5R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F5R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F5R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F5R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F5R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F5R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F5R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F5R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F5R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F5R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F6R2 register *******************/ +#define CAN_F6R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F6R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F6R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F6R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F6R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F6R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F6R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F6R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F6R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F6R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F6R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F6R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F6R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F6R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F6R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F6R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F6R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F6R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F6R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F6R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F6R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F6R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F6R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F6R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F6R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F6R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F6R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F6R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F6R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F6R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F6R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F6R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F7R2 register *******************/ +#define CAN_F7R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F7R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F7R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F7R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F7R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F7R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F7R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F7R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F7R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F7R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F7R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F7R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F7R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F7R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F7R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F7R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F7R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F7R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F7R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F7R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F7R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F7R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F7R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F7R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F7R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F7R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F7R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F7R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F7R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F7R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F7R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F7R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F8R2 register *******************/ +#define CAN_F8R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F8R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F8R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F8R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F8R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F8R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F8R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F8R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F8R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F8R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F8R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F8R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F8R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F8R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F8R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F8R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F8R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F8R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F8R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F8R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F8R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F8R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F8R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F8R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F8R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F8R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F8R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F8R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F8R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F8R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F8R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F8R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F9R2 register *******************/ +#define CAN_F9R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F9R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F9R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F9R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F9R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F9R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F9R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F9R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F9R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F9R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F9R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F9R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F9R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F9R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F9R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F9R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F9R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F9R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F9R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F9R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F9R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F9R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F9R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F9R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F9R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F9R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F9R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F9R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F9R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F9R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F9R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F9R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F10R2 register ******************/ +#define CAN_F10R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F10R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F10R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F10R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F10R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F10R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F10R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F10R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F10R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F10R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F10R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F10R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F10R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F10R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F10R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F10R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F10R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F10R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F10R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F10R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F10R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F10R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F10R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F10R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F10R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F10R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F10R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F10R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F10R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F10R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F10R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F10R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F11R2 register ******************/ +#define CAN_F11R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F11R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F11R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F11R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F11R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F11R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F11R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F11R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F11R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F11R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F11R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F11R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F11R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F11R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F11R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F11R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F11R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F11R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F11R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F11R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F11R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F11R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F11R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F11R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F11R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F11R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F11R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F11R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F11R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F11R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F11R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F11R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F12R2 register ******************/ +#define CAN_F12R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F12R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F12R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F12R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F12R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F12R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F12R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F12R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F12R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F12R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F12R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F12R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F12R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F12R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F12R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F12R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F12R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F12R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F12R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F12R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F12R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F12R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F12R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F12R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F12R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F12R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F12R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F12R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F12R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F12R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F12R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F12R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************* Bit definition for CAN_F13R2 register ******************/ +#define CAN_F13R2_FB0 ((uint32_t)0x00000001) /*!< Filter bit 0 */ +#define CAN_F13R2_FB1 ((uint32_t)0x00000002) /*!< Filter bit 1 */ +#define CAN_F13R2_FB2 ((uint32_t)0x00000004) /*!< Filter bit 2 */ +#define CAN_F13R2_FB3 ((uint32_t)0x00000008) /*!< Filter bit 3 */ +#define CAN_F13R2_FB4 ((uint32_t)0x00000010) /*!< Filter bit 4 */ +#define CAN_F13R2_FB5 ((uint32_t)0x00000020) /*!< Filter bit 5 */ +#define CAN_F13R2_FB6 ((uint32_t)0x00000040) /*!< Filter bit 6 */ +#define CAN_F13R2_FB7 ((uint32_t)0x00000080) /*!< Filter bit 7 */ +#define CAN_F13R2_FB8 ((uint32_t)0x00000100) /*!< Filter bit 8 */ +#define CAN_F13R2_FB9 ((uint32_t)0x00000200) /*!< Filter bit 9 */ +#define CAN_F13R2_FB10 ((uint32_t)0x00000400) /*!< Filter bit 10 */ +#define CAN_F13R2_FB11 ((uint32_t)0x00000800) /*!< Filter bit 11 */ +#define CAN_F13R2_FB12 ((uint32_t)0x00001000) /*!< Filter bit 12 */ +#define CAN_F13R2_FB13 ((uint32_t)0x00002000) /*!< Filter bit 13 */ +#define CAN_F13R2_FB14 ((uint32_t)0x00004000) /*!< Filter bit 14 */ +#define CAN_F13R2_FB15 ((uint32_t)0x00008000) /*!< Filter bit 15 */ +#define CAN_F13R2_FB16 ((uint32_t)0x00010000) /*!< Filter bit 16 */ +#define CAN_F13R2_FB17 ((uint32_t)0x00020000) /*!< Filter bit 17 */ +#define CAN_F13R2_FB18 ((uint32_t)0x00040000) /*!< Filter bit 18 */ +#define CAN_F13R2_FB19 ((uint32_t)0x00080000) /*!< Filter bit 19 */ +#define CAN_F13R2_FB20 ((uint32_t)0x00100000) /*!< Filter bit 20 */ +#define CAN_F13R2_FB21 ((uint32_t)0x00200000) /*!< Filter bit 21 */ +#define CAN_F13R2_FB22 ((uint32_t)0x00400000) /*!< Filter bit 22 */ +#define CAN_F13R2_FB23 ((uint32_t)0x00800000) /*!< Filter bit 23 */ +#define CAN_F13R2_FB24 ((uint32_t)0x01000000) /*!< Filter bit 24 */ +#define CAN_F13R2_FB25 ((uint32_t)0x02000000) /*!< Filter bit 25 */ +#define CAN_F13R2_FB26 ((uint32_t)0x04000000) /*!< Filter bit 26 */ +#define CAN_F13R2_FB27 ((uint32_t)0x08000000) /*!< Filter bit 27 */ +#define CAN_F13R2_FB28 ((uint32_t)0x10000000) /*!< Filter bit 28 */ +#define CAN_F13R2_FB29 ((uint32_t)0x20000000) /*!< Filter bit 29 */ +#define CAN_F13R2_FB30 ((uint32_t)0x40000000) /*!< Filter bit 30 */ +#define CAN_F13R2_FB31 ((uint32_t)0x80000000) /*!< Filter bit 31 */ + +/******************************************************************************/ +/* */ +/* Serial Peripheral Interface */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for SPI_CR1 register ********************/ +#define SPI_CR1_CPHA ((uint16_t)0x0001) /*!< Clock Phase */ +#define SPI_CR1_CPOL ((uint16_t)0x0002) /*!< Clock Polarity */ +#define SPI_CR1_MSTR ((uint16_t)0x0004) /*!< Master Selection */ + +#define SPI_CR1_BR ((uint16_t)0x0038) /*!< BR[2:0] bits (Baud Rate Control) */ +#define SPI_CR1_BR_0 ((uint16_t)0x0008) /*!< Bit 0 */ +#define SPI_CR1_BR_1 ((uint16_t)0x0010) /*!< Bit 1 */ +#define SPI_CR1_BR_2 ((uint16_t)0x0020) /*!< Bit 2 */ + +#define SPI_CR1_SPE ((uint16_t)0x0040) /*!< SPI Enable */ +#define SPI_CR1_LSBFIRST ((uint16_t)0x0080) /*!< Frame Format */ +#define SPI_CR1_SSI ((uint16_t)0x0100) /*!< Internal slave select */ +#define SPI_CR1_SSM ((uint16_t)0x0200) /*!< Software slave management */ +#define SPI_CR1_RXONLY ((uint16_t)0x0400) /*!< Receive only */ +#define SPI_CR1_DFF ((uint16_t)0x0800) /*!< Data Frame Format */ +#define SPI_CR1_CRCNEXT ((uint16_t)0x1000) /*!< Transmit CRC next */ +#define SPI_CR1_CRCEN ((uint16_t)0x2000) /*!< Hardware CRC calculation enable */ +#define SPI_CR1_BIDIOE ((uint16_t)0x4000) /*!< Output enable in bidirectional mode */ +#define SPI_CR1_BIDIMODE ((uint16_t)0x8000) /*!< Bidirectional data mode enable */ + +/******************* Bit definition for SPI_CR2 register ********************/ +#define SPI_CR2_RXDMAEN ((uint8_t)0x01) /*!< Rx Buffer DMA Enable */ +#define SPI_CR2_TXDMAEN ((uint8_t)0x02) /*!< Tx Buffer DMA Enable */ +#define SPI_CR2_SSOE ((uint8_t)0x04) /*!< SS Output Enable */ +#define SPI_CR2_ERRIE ((uint8_t)0x20) /*!< Error Interrupt Enable */ +#define SPI_CR2_RXNEIE ((uint8_t)0x40) /*!< RX buffer Not Empty Interrupt Enable */ +#define SPI_CR2_TXEIE ((uint8_t)0x80) /*!< Tx buffer Empty Interrupt Enable */ + +/******************** Bit definition for SPI_SR register ********************/ +#define SPI_SR_RXNE ((uint8_t)0x01) /*!< Receive buffer Not Empty */ +#define SPI_SR_TXE ((uint8_t)0x02) /*!< Transmit buffer Empty */ +#define SPI_SR_CHSIDE ((uint8_t)0x04) /*!< Channel side */ +#define SPI_SR_UDR ((uint8_t)0x08) /*!< Underrun flag */ +#define SPI_SR_CRCERR ((uint8_t)0x10) /*!< CRC Error flag */ +#define SPI_SR_MODF ((uint8_t)0x20) /*!< Mode fault */ +#define SPI_SR_OVR ((uint8_t)0x40) /*!< Overrun flag */ +#define SPI_SR_BSY ((uint8_t)0x80) /*!< Busy flag */ + +/******************** Bit definition for SPI_DR register ********************/ +#define SPI_DR_DR ((uint16_t)0xFFFF) /*!< Data Register */ + +/******************* Bit definition for SPI_CRCPR register ******************/ +#define SPI_CRCPR_CRCPOLY ((uint16_t)0xFFFF) /*!< CRC polynomial register */ + +/****************** Bit definition for SPI_RXCRCR register ******************/ +#define SPI_RXCRCR_RXCRC ((uint16_t)0xFFFF) /*!< Rx CRC Register */ + +/****************** Bit definition for SPI_TXCRCR register ******************/ +#define SPI_TXCRCR_TXCRC ((uint16_t)0xFFFF) /*!< Tx CRC Register */ + +/****************** Bit definition for SPI_I2SCFGR register *****************/ +#define SPI_I2SCFGR_CHLEN ((uint16_t)0x0001) /*!< Channel length (number of bits per audio channel) */ + +#define SPI_I2SCFGR_DATLEN ((uint16_t)0x0006) /*!< DATLEN[1:0] bits (Data length to be transferred) */ +#define SPI_I2SCFGR_DATLEN_0 ((uint16_t)0x0002) /*!< Bit 0 */ +#define SPI_I2SCFGR_DATLEN_1 ((uint16_t)0x0004) /*!< Bit 1 */ + +#define SPI_I2SCFGR_CKPOL ((uint16_t)0x0008) /*!< steady state clock polarity */ + +#define SPI_I2SCFGR_I2SSTD ((uint16_t)0x0030) /*!< I2SSTD[1:0] bits (I2S standard selection) */ +#define SPI_I2SCFGR_I2SSTD_0 ((uint16_t)0x0010) /*!< Bit 0 */ +#define SPI_I2SCFGR_I2SSTD_1 ((uint16_t)0x0020) /*!< Bit 1 */ + +#define SPI_I2SCFGR_PCMSYNC ((uint16_t)0x0080) /*!< PCM frame synchronization */ + +#define SPI_I2SCFGR_I2SCFG ((uint16_t)0x0300) /*!< I2SCFG[1:0] bits (I2S configuration mode) */ +#define SPI_I2SCFGR_I2SCFG_0 ((uint16_t)0x0100) /*!< Bit 0 */ +#define SPI_I2SCFGR_I2SCFG_1 ((uint16_t)0x0200) /*!< Bit 1 */ + +#define SPI_I2SCFGR_I2SE ((uint16_t)0x0400) /*!< I2S Enable */ +#define SPI_I2SCFGR_I2SMOD ((uint16_t)0x0800) /*!< I2S mode selection */ + +/****************** Bit definition for SPI_I2SPR register *******************/ +#define SPI_I2SPR_I2SDIV ((uint16_t)0x00FF) /*!< I2S Linear prescaler */ +#define SPI_I2SPR_ODD ((uint16_t)0x0100) /*!< Odd factor for the prescaler */ +#define SPI_I2SPR_MCKOE ((uint16_t)0x0200) /*!< Master Clock Output Enable */ + +/******************************************************************************/ +/* */ +/* Inter-integrated Circuit Interface */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for I2C_CR1 register ********************/ +#define I2C_CR1_PE ((uint16_t)0x0001) /*!< Peripheral Enable */ +#define I2C_CR1_SMBUS ((uint16_t)0x0002) /*!< SMBus Mode */ +#define I2C_CR1_SMBTYPE ((uint16_t)0x0008) /*!< SMBus Type */ +#define I2C_CR1_ENARP ((uint16_t)0x0010) /*!< ARP Enable */ +#define I2C_CR1_ENPEC ((uint16_t)0x0020) /*!< PEC Enable */ +#define I2C_CR1_ENGC ((uint16_t)0x0040) /*!< General Call Enable */ +#define I2C_CR1_NOSTRETCH ((uint16_t)0x0080) /*!< Clock Stretching Disable (Slave mode) */ +#define I2C_CR1_START ((uint16_t)0x0100) /*!< Start Generation */ +#define I2C_CR1_STOP ((uint16_t)0x0200) /*!< Stop Generation */ +#define I2C_CR1_ACK ((uint16_t)0x0400) /*!< Acknowledge Enable */ +#define I2C_CR1_POS ((uint16_t)0x0800) /*!< Acknowledge/PEC Position (for data reception) */ +#define I2C_CR1_PEC ((uint16_t)0x1000) /*!< Packet Error Checking */ +#define I2C_CR1_ALERT ((uint16_t)0x2000) /*!< SMBus Alert */ +#define I2C_CR1_SWRST ((uint16_t)0x8000) /*!< Software Reset */ + +/******************* Bit definition for I2C_CR2 register ********************/ +#define I2C_CR2_FREQ ((uint16_t)0x003F) /*!< FREQ[5:0] bits (Peripheral Clock Frequency) */ +#define I2C_CR2_FREQ_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define I2C_CR2_FREQ_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define I2C_CR2_FREQ_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define I2C_CR2_FREQ_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define I2C_CR2_FREQ_4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define I2C_CR2_FREQ_5 ((uint16_t)0x0020) /*!< Bit 5 */ + +#define I2C_CR2_ITERREN ((uint16_t)0x0100) /*!< Error Interrupt Enable */ +#define I2C_CR2_ITEVTEN ((uint16_t)0x0200) /*!< Event Interrupt Enable */ +#define I2C_CR2_ITBUFEN ((uint16_t)0x0400) /*!< Buffer Interrupt Enable */ +#define I2C_CR2_DMAEN ((uint16_t)0x0800) /*!< DMA Requests Enable */ +#define I2C_CR2_LAST ((uint16_t)0x1000) /*!< DMA Last Transfer */ + +/******************* Bit definition for I2C_OAR1 register *******************/ +#define I2C_OAR1_ADD1_7 ((uint16_t)0x00FE) /*!< Interface Address */ +#define I2C_OAR1_ADD8_9 ((uint16_t)0x0300) /*!< Interface Address */ + +#define I2C_OAR1_ADD0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define I2C_OAR1_ADD1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define I2C_OAR1_ADD2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define I2C_OAR1_ADD3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define I2C_OAR1_ADD4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define I2C_OAR1_ADD5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define I2C_OAR1_ADD6 ((uint16_t)0x0040) /*!< Bit 6 */ +#define I2C_OAR1_ADD7 ((uint16_t)0x0080) /*!< Bit 7 */ +#define I2C_OAR1_ADD8 ((uint16_t)0x0100) /*!< Bit 8 */ +#define I2C_OAR1_ADD9 ((uint16_t)0x0200) /*!< Bit 9 */ + +#define I2C_OAR1_ADDMODE ((uint16_t)0x8000) /*!< Addressing Mode (Slave mode) */ + +/******************* Bit definition for I2C_OAR2 register *******************/ +#define I2C_OAR2_ENDUAL ((uint8_t)0x01) /*!< Dual addressing mode enable */ +#define I2C_OAR2_ADD2 ((uint8_t)0xFE) /*!< Interface address */ + +/******************** Bit definition for I2C_DR register ********************/ +#define I2C_DR_DR ((uint8_t)0xFF) /*!< 8-bit Data Register */ + +/******************* Bit definition for I2C_SR1 register ********************/ +#define I2C_SR1_SB ((uint16_t)0x0001) /*!< Start Bit (Master mode) */ +#define I2C_SR1_ADDR ((uint16_t)0x0002) /*!< Address sent (master mode)/matched (slave mode) */ +#define I2C_SR1_BTF ((uint16_t)0x0004) /*!< Byte Transfer Finished */ +#define I2C_SR1_ADD10 ((uint16_t)0x0008) /*!< 10-bit header sent (Master mode) */ +#define I2C_SR1_STOPF ((uint16_t)0x0010) /*!< Stop detection (Slave mode) */ +#define I2C_SR1_RXNE ((uint16_t)0x0040) /*!< Data Register not Empty (receivers) */ +#define I2C_SR1_TXE ((uint16_t)0x0080) /*!< Data Register Empty (transmitters) */ +#define I2C_SR1_BERR ((uint16_t)0x0100) /*!< Bus Error */ +#define I2C_SR1_ARLO ((uint16_t)0x0200) /*!< Arbitration Lost (master mode) */ +#define I2C_SR1_AF ((uint16_t)0x0400) /*!< Acknowledge Failure */ +#define I2C_SR1_OVR ((uint16_t)0x0800) /*!< Overrun/Underrun */ +#define I2C_SR1_PECERR ((uint16_t)0x1000) /*!< PEC Error in reception */ +#define I2C_SR1_TIMEOUT ((uint16_t)0x4000) /*!< Timeout or Tlow Error */ +#define I2C_SR1_SMBALERT ((uint16_t)0x8000) /*!< SMBus Alert */ + +/******************* Bit definition for I2C_SR2 register ********************/ +#define I2C_SR2_MSL ((uint16_t)0x0001) /*!< Master/Slave */ +#define I2C_SR2_BUSY ((uint16_t)0x0002) /*!< Bus Busy */ +#define I2C_SR2_TRA ((uint16_t)0x0004) /*!< Transmitter/Receiver */ +#define I2C_SR2_GENCALL ((uint16_t)0x0010) /*!< General Call Address (Slave mode) */ +#define I2C_SR2_SMBDEFAULT ((uint16_t)0x0020) /*!< SMBus Device Default Address (Slave mode) */ +#define I2C_SR2_SMBHOST ((uint16_t)0x0040) /*!< SMBus Host Header (Slave mode) */ +#define I2C_SR2_DUALF ((uint16_t)0x0080) /*!< Dual Flag (Slave mode) */ +#define I2C_SR2_PEC ((uint16_t)0xFF00) /*!< Packet Error Checking Register */ + +/******************* Bit definition for I2C_CCR register ********************/ +#define I2C_CCR_CCR ((uint16_t)0x0FFF) /*!< Clock Control Register in Fast/Standard mode (Master mode) */ +#define I2C_CCR_DUTY ((uint16_t)0x4000) /*!< Fast Mode Duty Cycle */ +#define I2C_CCR_FS ((uint16_t)0x8000) /*!< I2C Master Mode Selection */ + +/****************** Bit definition for I2C_TRISE register *******************/ +#define I2C_TRISE_TRISE ((uint8_t)0x3F) /*!< Maximum Rise Time in Fast/Standard mode (Master mode) */ + +/******************************************************************************/ +/* */ +/* Universal Synchronous Asynchronous Receiver Transmitter */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for USART_SR register *******************/ +#define USART_SR_PE ((uint16_t)0x0001) /*!< Parity Error */ +#define USART_SR_FE ((uint16_t)0x0002) /*!< Framing Error */ +#define USART_SR_NE ((uint16_t)0x0004) /*!< Noise Error Flag */ +#define USART_SR_ORE ((uint16_t)0x0008) /*!< OverRun Error */ +#define USART_SR_IDLE ((uint16_t)0x0010) /*!< IDLE line detected */ +#define USART_SR_RXNE ((uint16_t)0x0020) /*!< Read Data Register Not Empty */ +#define USART_SR_TC ((uint16_t)0x0040) /*!< Transmission Complete */ +#define USART_SR_TXE ((uint16_t)0x0080) /*!< Transmit Data Register Empty */ +#define USART_SR_LBD ((uint16_t)0x0100) /*!< LIN Break Detection Flag */ +#define USART_SR_CTS ((uint16_t)0x0200) /*!< CTS Flag */ + +/******************* Bit definition for USART_DR register *******************/ +#define USART_DR_DR ((uint16_t)0x01FF) /*!< Data value */ + +/****************** Bit definition for USART_BRR register *******************/ +#define USART_BRR_DIV_Fraction ((uint16_t)0x000F) /*!< Fraction of USARTDIV */ +#define USART_BRR_DIV_Mantissa ((uint16_t)0xFFF0) /*!< Mantissa of USARTDIV */ + +/****************** Bit definition for USART_CR1 register *******************/ +#define USART_CR1_SBK ((uint16_t)0x0001) /*!< Send Break */ +#define USART_CR1_RWU ((uint16_t)0x0002) /*!< Receiver wakeup */ +#define USART_CR1_RE ((uint16_t)0x0004) /*!< Receiver Enable */ +#define USART_CR1_TE ((uint16_t)0x0008) /*!< Transmitter Enable */ +#define USART_CR1_IDLEIE ((uint16_t)0x0010) /*!< IDLE Interrupt Enable */ +#define USART_CR1_RXNEIE ((uint16_t)0x0020) /*!< RXNE Interrupt Enable */ +#define USART_CR1_TCIE ((uint16_t)0x0040) /*!< Transmission Complete Interrupt Enable */ +#define USART_CR1_TXEIE ((uint16_t)0x0080) /*!< PE Interrupt Enable */ +#define USART_CR1_PEIE ((uint16_t)0x0100) /*!< PE Interrupt Enable */ +#define USART_CR1_PS ((uint16_t)0x0200) /*!< Parity Selection */ +#define USART_CR1_PCE ((uint16_t)0x0400) /*!< Parity Control Enable */ +#define USART_CR1_WAKE ((uint16_t)0x0800) /*!< Wakeup method */ +#define USART_CR1_M ((uint16_t)0x1000) /*!< Word length */ +#define USART_CR1_UE ((uint16_t)0x2000) /*!< USART Enable */ +#define USART_CR1_OVER8 ((uint16_t)0x8000) /*!< USART Oversmapling 8-bits */ + +/****************** Bit definition for USART_CR2 register *******************/ +#define USART_CR2_ADD ((uint16_t)0x000F) /*!< Address of the USART node */ +#define USART_CR2_LBDL ((uint16_t)0x0020) /*!< LIN Break Detection Length */ +#define USART_CR2_LBDIE ((uint16_t)0x0040) /*!< LIN Break Detection Interrupt Enable */ +#define USART_CR2_LBCL ((uint16_t)0x0100) /*!< Last Bit Clock pulse */ +#define USART_CR2_CPHA ((uint16_t)0x0200) /*!< Clock Phase */ +#define USART_CR2_CPOL ((uint16_t)0x0400) /*!< Clock Polarity */ +#define USART_CR2_CLKEN ((uint16_t)0x0800) /*!< Clock Enable */ + +#define USART_CR2_STOP ((uint16_t)0x3000) /*!< STOP[1:0] bits (STOP bits) */ +#define USART_CR2_STOP_0 ((uint16_t)0x1000) /*!< Bit 0 */ +#define USART_CR2_STOP_1 ((uint16_t)0x2000) /*!< Bit 1 */ + +#define USART_CR2_LINEN ((uint16_t)0x4000) /*!< LIN mode enable */ + +/****************** Bit definition for USART_CR3 register *******************/ +#define USART_CR3_EIE ((uint16_t)0x0001) /*!< Error Interrupt Enable */ +#define USART_CR3_IREN ((uint16_t)0x0002) /*!< IrDA mode Enable */ +#define USART_CR3_IRLP ((uint16_t)0x0004) /*!< IrDA Low-Power */ +#define USART_CR3_HDSEL ((uint16_t)0x0008) /*!< Half-Duplex Selection */ +#define USART_CR3_NACK ((uint16_t)0x0010) /*!< Smartcard NACK enable */ +#define USART_CR3_SCEN ((uint16_t)0x0020) /*!< Smartcard mode enable */ +#define USART_CR3_DMAR ((uint16_t)0x0040) /*!< DMA Enable Receiver */ +#define USART_CR3_DMAT ((uint16_t)0x0080) /*!< DMA Enable Transmitter */ +#define USART_CR3_RTSE ((uint16_t)0x0100) /*!< RTS Enable */ +#define USART_CR3_CTSE ((uint16_t)0x0200) /*!< CTS Enable */ +#define USART_CR3_CTSIE ((uint16_t)0x0400) /*!< CTS Interrupt Enable */ +#define USART_CR3_ONEBIT ((uint16_t)0x0800) /*!< One Bit method */ + +/****************** Bit definition for USART_GTPR register ******************/ +#define USART_GTPR_PSC ((uint16_t)0x00FF) /*!< PSC[7:0] bits (Prescaler value) */ +#define USART_GTPR_PSC_0 ((uint16_t)0x0001) /*!< Bit 0 */ +#define USART_GTPR_PSC_1 ((uint16_t)0x0002) /*!< Bit 1 */ +#define USART_GTPR_PSC_2 ((uint16_t)0x0004) /*!< Bit 2 */ +#define USART_GTPR_PSC_3 ((uint16_t)0x0008) /*!< Bit 3 */ +#define USART_GTPR_PSC_4 ((uint16_t)0x0010) /*!< Bit 4 */ +#define USART_GTPR_PSC_5 ((uint16_t)0x0020) /*!< Bit 5 */ +#define USART_GTPR_PSC_6 ((uint16_t)0x0040) /*!< Bit 6 */ +#define USART_GTPR_PSC_7 ((uint16_t)0x0080) /*!< Bit 7 */ + +#define USART_GTPR_GT ((uint16_t)0xFF00) /*!< Guard time value */ + +/******************************************************************************/ +/* */ +/* Debug MCU */ +/* */ +/******************************************************************************/ + +/**************** Bit definition for DBGMCU_IDCODE register *****************/ +#define DBGMCU_IDCODE_DEV_ID ((uint32_t)0x00000FFF) /*!< Device Identifier */ + +#define DBGMCU_IDCODE_REV_ID ((uint32_t)0xFFFF0000) /*!< REV_ID[15:0] bits (Revision Identifier) */ +#define DBGMCU_IDCODE_REV_ID_0 ((uint32_t)0x00010000) /*!< Bit 0 */ +#define DBGMCU_IDCODE_REV_ID_1 ((uint32_t)0x00020000) /*!< Bit 1 */ +#define DBGMCU_IDCODE_REV_ID_2 ((uint32_t)0x00040000) /*!< Bit 2 */ +#define DBGMCU_IDCODE_REV_ID_3 ((uint32_t)0x00080000) /*!< Bit 3 */ +#define DBGMCU_IDCODE_REV_ID_4 ((uint32_t)0x00100000) /*!< Bit 4 */ +#define DBGMCU_IDCODE_REV_ID_5 ((uint32_t)0x00200000) /*!< Bit 5 */ +#define DBGMCU_IDCODE_REV_ID_6 ((uint32_t)0x00400000) /*!< Bit 6 */ +#define DBGMCU_IDCODE_REV_ID_7 ((uint32_t)0x00800000) /*!< Bit 7 */ +#define DBGMCU_IDCODE_REV_ID_8 ((uint32_t)0x01000000) /*!< Bit 8 */ +#define DBGMCU_IDCODE_REV_ID_9 ((uint32_t)0x02000000) /*!< Bit 9 */ +#define DBGMCU_IDCODE_REV_ID_10 ((uint32_t)0x04000000) /*!< Bit 10 */ +#define DBGMCU_IDCODE_REV_ID_11 ((uint32_t)0x08000000) /*!< Bit 11 */ +#define DBGMCU_IDCODE_REV_ID_12 ((uint32_t)0x10000000) /*!< Bit 12 */ +#define DBGMCU_IDCODE_REV_ID_13 ((uint32_t)0x20000000) /*!< Bit 13 */ +#define DBGMCU_IDCODE_REV_ID_14 ((uint32_t)0x40000000) /*!< Bit 14 */ +#define DBGMCU_IDCODE_REV_ID_15 ((uint32_t)0x80000000) /*!< Bit 15 */ + +/****************** Bit definition for DBGMCU_CR register *******************/ +#define DBGMCU_CR_DBG_SLEEP ((uint32_t)0x00000001) /*!< Debug Sleep Mode */ +#define DBGMCU_CR_DBG_STOP ((uint32_t)0x00000002) /*!< Debug Stop Mode */ +#define DBGMCU_CR_DBG_STANDBY ((uint32_t)0x00000004) /*!< Debug Standby mode */ +#define DBGMCU_CR_TRACE_IOEN ((uint32_t)0x00000020) /*!< Trace Pin Assignment Control */ + +#define DBGMCU_CR_TRACE_MODE ((uint32_t)0x000000C0) /*!< TRACE_MODE[1:0] bits (Trace Pin Assignment Control) */ +#define DBGMCU_CR_TRACE_MODE_0 ((uint32_t)0x00000040) /*!< Bit 0 */ +#define DBGMCU_CR_TRACE_MODE_1 ((uint32_t)0x00000080) /*!< Bit 1 */ + +#define DBGMCU_CR_DBG_IWDG_STOP ((uint32_t)0x00000100) /*!< Debug Independent Watchdog stopped when Core is halted */ +#define DBGMCU_CR_DBG_WWDG_STOP ((uint32_t)0x00000200) /*!< Debug Window Watchdog stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM1_STOP ((uint32_t)0x00000400) /*!< TIM1 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM2_STOP ((uint32_t)0x00000800) /*!< TIM2 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM3_STOP ((uint32_t)0x00001000) /*!< TIM3 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM4_STOP ((uint32_t)0x00002000) /*!< TIM4 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_CAN1_STOP ((uint32_t)0x00004000) /*!< Debug CAN1 stopped when Core is halted */ +#define DBGMCU_CR_DBG_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) /*!< SMBUS timeout mode stopped when Core is halted */ +#define DBGMCU_CR_DBG_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) /*!< SMBUS timeout mode stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM8_STOP ((uint32_t)0x00020000) /*!< TIM8 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM5_STOP ((uint32_t)0x00040000) /*!< TIM5 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM6_STOP ((uint32_t)0x00080000) /*!< TIM6 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_TIM7_STOP ((uint32_t)0x00100000) /*!< TIM7 counter stopped when core is halted */ +#define DBGMCU_CR_DBG_CAN2_STOP ((uint32_t)0x00200000) /*!< Debug CAN2 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM15_STOP ((uint32_t)0x00400000) /*!< Debug TIM15 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM16_STOP ((uint32_t)0x00800000) /*!< Debug TIM16 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM17_STOP ((uint32_t)0x01000000) /*!< Debug TIM17 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM12_STOP ((uint32_t)0x02000000) /*!< Debug TIM12 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM13_STOP ((uint32_t)0x04000000) /*!< Debug TIM13 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM14_STOP ((uint32_t)0x08000000) /*!< Debug TIM14 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM9_STOP ((uint32_t)0x10000000) /*!< Debug TIM9 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM10_STOP ((uint32_t)0x20000000) /*!< Debug TIM10 stopped when Core is halted */ +#define DBGMCU_CR_DBG_TIM11_STOP ((uint32_t)0x40000000) /*!< Debug TIM11 stopped when Core is halted */ + +/******************************************************************************/ +/* */ +/* FLASH and Option Bytes Registers */ +/* */ +/******************************************************************************/ + +/******************* Bit definition for FLASH_ACR register ******************/ +#define FLASH_ACR_LATENCY ((uint8_t)0x03) /*!< LATENCY[2:0] bits (Latency) */ +#define FLASH_ACR_LATENCY_0 ((uint8_t)0x00) /*!< Bit 0 */ +#define FLASH_ACR_LATENCY_1 ((uint8_t)0x01) /*!< Bit 0 */ +#define FLASH_ACR_LATENCY_2 ((uint8_t)0x02) /*!< Bit 1 */ + +#define FLASH_ACR_HLFCYA ((uint8_t)0x08) /*!< Flash Half Cycle Access Enable */ +#define FLASH_ACR_PRFTBE ((uint8_t)0x10) /*!< Prefetch Buffer Enable */ +#define FLASH_ACR_PRFTBS ((uint8_t)0x20) /*!< Prefetch Buffer Status */ + +/****************** Bit definition for FLASH_KEYR register ******************/ +#define FLASH_KEYR_FKEYR ((uint32_t)0xFFFFFFFF) /*!< FPEC Key */ + +/***************** Bit definition for FLASH_OPTKEYR register ****************/ +#define FLASH_OPTKEYR_OPTKEYR ((uint32_t)0xFFFFFFFF) /*!< Option Byte Key */ + +/****************** Bit definition for FLASH_SR register *******************/ +#define FLASH_SR_BSY ((uint8_t)0x01) /*!< Busy */ +#define FLASH_SR_PGERR ((uint8_t)0x04) /*!< Programming Error */ +#define FLASH_SR_WRPRTERR ((uint8_t)0x10) /*!< Write Protection Error */ +#define FLASH_SR_EOP ((uint8_t)0x20) /*!< End of operation */ + +/******************* Bit definition for FLASH_CR register *******************/ +#define FLASH_CR_PG ((uint16_t)0x0001) /*!< Programming */ +#define FLASH_CR_PER ((uint16_t)0x0002) /*!< Page Erase */ +#define FLASH_CR_MER ((uint16_t)0x0004) /*!< Mass Erase */ +#define FLASH_CR_OPTPG ((uint16_t)0x0010) /*!< Option Byte Programming */ +#define FLASH_CR_OPTER ((uint16_t)0x0020) /*!< Option Byte Erase */ +#define FLASH_CR_STRT ((uint16_t)0x0040) /*!< Start */ +#define FLASH_CR_LOCK ((uint16_t)0x0080) /*!< Lock */ +#define FLASH_CR_OPTWRE ((uint16_t)0x0200) /*!< Option Bytes Write Enable */ +#define FLASH_CR_ERRIE ((uint16_t)0x0400) /*!< Error Interrupt Enable */ +#define FLASH_CR_EOPIE ((uint16_t)0x1000) /*!< End of operation interrupt enable */ + +/******************* Bit definition for FLASH_AR register *******************/ +#define FLASH_AR_FAR ((uint32_t)0xFFFFFFFF) /*!< Flash Address */ + +/****************** Bit definition for FLASH_OBR register *******************/ +#define FLASH_OBR_OPTERR ((uint16_t)0x0001) /*!< Option Byte Error */ +#define FLASH_OBR_RDPRT ((uint16_t)0x0002) /*!< Read protection */ + +#define FLASH_OBR_USER ((uint16_t)0x03FC) /*!< User Option Bytes */ +#define FLASH_OBR_WDG_SW ((uint16_t)0x0004) /*!< WDG_SW */ +#define FLASH_OBR_nRST_STOP ((uint16_t)0x0008) /*!< nRST_STOP */ +#define FLASH_OBR_nRST_STDBY ((uint16_t)0x0010) /*!< nRST_STDBY */ +#define FLASH_OBR_BFB2 ((uint16_t)0x0020) /*!< BFB2 */ + +/****************** Bit definition for FLASH_WRPR register ******************/ +#define FLASH_WRPR_WRP ((uint32_t)0xFFFFFFFF) /*!< Write Protect */ + +/*----------------------------------------------------------------------------*/ + +/****************** Bit definition for FLASH_RDP register *******************/ +#define FLASH_RDP_RDP ((uint32_t)0x000000FF) /*!< Read protection option byte */ +#define FLASH_RDP_nRDP ((uint32_t)0x0000FF00) /*!< Read protection complemented option byte */ + +/****************** Bit definition for FLASH_USER register ******************/ +#define FLASH_USER_USER ((uint32_t)0x00FF0000) /*!< User option byte */ +#define FLASH_USER_nUSER ((uint32_t)0xFF000000) /*!< User complemented option byte */ + +/****************** Bit definition for FLASH_Data0 register *****************/ +#define FLASH_Data0_Data0 ((uint32_t)0x000000FF) /*!< User data storage option byte */ +#define FLASH_Data0_nData0 ((uint32_t)0x0000FF00) /*!< User data storage complemented option byte */ + +/****************** Bit definition for FLASH_Data1 register *****************/ +#define FLASH_Data1_Data1 ((uint32_t)0x00FF0000) /*!< User data storage option byte */ +#define FLASH_Data1_nData1 ((uint32_t)0xFF000000) /*!< User data storage complemented option byte */ + +/****************** Bit definition for FLASH_WRP0 register ******************/ +#define FLASH_WRP0_WRP0 ((uint32_t)0x000000FF) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP0_nWRP0 ((uint32_t)0x0000FF00) /*!< Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRP1 register ******************/ +#define FLASH_WRP1_WRP1 ((uint32_t)0x00FF0000) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP1_nWRP1 ((uint32_t)0xFF000000) /*!< Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRP2 register ******************/ +#define FLASH_WRP2_WRP2 ((uint32_t)0x000000FF) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP2_nWRP2 ((uint32_t)0x0000FF00) /*!< Flash memory write protection complemented option bytes */ + +/****************** Bit definition for FLASH_WRP3 register ******************/ +#define FLASH_WRP3_WRP3 ((uint32_t)0x00FF0000) /*!< Flash memory write protection option bytes */ +#define FLASH_WRP3_nWRP3 ((uint32_t)0xFF000000) /*!< Flash memory write protection complemented option bytes */ + +#ifdef STM32F10X_CL +/******************************************************************************/ +/* Ethernet MAC Registers bits definitions */ +/******************************************************************************/ +/* Bit definition for Ethernet MAC Control Register register */ +#define ETH_MACCR_WD ((uint32_t)0x00800000) /* Watchdog disable */ +#define ETH_MACCR_JD ((uint32_t)0x00400000) /* Jabber disable */ +#define ETH_MACCR_IFG ((uint32_t)0x000E0000) /* Inter-frame gap */ + #define ETH_MACCR_IFG_96Bit ((uint32_t)0x00000000) /* Minimum IFG between frames during transmission is 96Bit */ + #define ETH_MACCR_IFG_88Bit ((uint32_t)0x00020000) /* Minimum IFG between frames during transmission is 88Bit */ + #define ETH_MACCR_IFG_80Bit ((uint32_t)0x00040000) /* Minimum IFG between frames during transmission is 80Bit */ + #define ETH_MACCR_IFG_72Bit ((uint32_t)0x00060000) /* Minimum IFG between frames during transmission is 72Bit */ + #define ETH_MACCR_IFG_64Bit ((uint32_t)0x00080000) /* Minimum IFG between frames during transmission is 64Bit */ + #define ETH_MACCR_IFG_56Bit ((uint32_t)0x000A0000) /* Minimum IFG between frames during transmission is 56Bit */ + #define ETH_MACCR_IFG_48Bit ((uint32_t)0x000C0000) /* Minimum IFG between frames during transmission is 48Bit */ + #define ETH_MACCR_IFG_40Bit ((uint32_t)0x000E0000) /* Minimum IFG between frames during transmission is 40Bit */ +#define ETH_MACCR_CSD ((uint32_t)0x00010000) /* Carrier sense disable (during transmission) */ +#define ETH_MACCR_FES ((uint32_t)0x00004000) /* Fast ethernet speed */ +#define ETH_MACCR_ROD ((uint32_t)0x00002000) /* Receive own disable */ +#define ETH_MACCR_LM ((uint32_t)0x00001000) /* loopback mode */ +#define ETH_MACCR_DM ((uint32_t)0x00000800) /* Duplex mode */ +#define ETH_MACCR_IPCO ((uint32_t)0x00000400) /* IP Checksum offload */ +#define ETH_MACCR_RD ((uint32_t)0x00000200) /* Retry disable */ +#define ETH_MACCR_APCS ((uint32_t)0x00000080) /* Automatic Pad/CRC stripping */ +#define ETH_MACCR_BL ((uint32_t)0x00000060) /* Back-off limit: random integer number (r) of slot time delays before rescheduling + a transmission attempt during retries after a collision: 0 =< r <2^k */ + #define ETH_MACCR_BL_10 ((uint32_t)0x00000000) /* k = min (n, 10) */ + #define ETH_MACCR_BL_8 ((uint32_t)0x00000020) /* k = min (n, 8) */ + #define ETH_MACCR_BL_4 ((uint32_t)0x00000040) /* k = min (n, 4) */ + #define ETH_MACCR_BL_1 ((uint32_t)0x00000060) /* k = min (n, 1) */ +#define ETH_MACCR_DC ((uint32_t)0x00000010) /* Defferal check */ +#define ETH_MACCR_TE ((uint32_t)0x00000008) /* Transmitter enable */ +#define ETH_MACCR_RE ((uint32_t)0x00000004) /* Receiver enable */ + +/* Bit definition for Ethernet MAC Frame Filter Register */ +#define ETH_MACFFR_RA ((uint32_t)0x80000000) /* Receive all */ +#define ETH_MACFFR_HPF ((uint32_t)0x00000400) /* Hash or perfect filter */ +#define ETH_MACFFR_SAF ((uint32_t)0x00000200) /* Source address filter enable */ +#define ETH_MACFFR_SAIF ((uint32_t)0x00000100) /* SA inverse filtering */ +#define ETH_MACFFR_PCF ((uint32_t)0x000000C0) /* Pass control frames: 3 cases */ + #define ETH_MACFFR_PCF_BlockAll ((uint32_t)0x00000040) /* MAC filters all control frames from reaching the application */ + #define ETH_MACFFR_PCF_ForwardAll ((uint32_t)0x00000080) /* MAC forwards all control frames to application even if they fail the Address Filter */ + #define ETH_MACFFR_PCF_ForwardPassedAddrFilter ((uint32_t)0x000000C0) /* MAC forwards control frames that pass the Address Filter. */ +#define ETH_MACFFR_BFD ((uint32_t)0x00000020) /* Broadcast frame disable */ +#define ETH_MACFFR_PAM ((uint32_t)0x00000010) /* Pass all mutlicast */ +#define ETH_MACFFR_DAIF ((uint32_t)0x00000008) /* DA Inverse filtering */ +#define ETH_MACFFR_HM ((uint32_t)0x00000004) /* Hash multicast */ +#define ETH_MACFFR_HU ((uint32_t)0x00000002) /* Hash unicast */ +#define ETH_MACFFR_PM ((uint32_t)0x00000001) /* Promiscuous mode */ + +/* Bit definition for Ethernet MAC Hash Table High Register */ +#define ETH_MACHTHR_HTH ((uint32_t)0xFFFFFFFF) /* Hash table high */ + +/* Bit definition for Ethernet MAC Hash Table Low Register */ +#define ETH_MACHTLR_HTL ((uint32_t)0xFFFFFFFF) /* Hash table low */ + +/* Bit definition for Ethernet MAC MII Address Register */ +#define ETH_MACMIIAR_PA ((uint32_t)0x0000F800) /* Physical layer address */ +#define ETH_MACMIIAR_MR ((uint32_t)0x000007C0) /* MII register in the selected PHY */ +#define ETH_MACMIIAR_CR ((uint32_t)0x0000001C) /* CR clock range: 6 cases */ + #define ETH_MACMIIAR_CR_Div42 ((uint32_t)0x00000000) /* HCLK:60-72 MHz; MDC clock= HCLK/42 */ + #define ETH_MACMIIAR_CR_Div16 ((uint32_t)0x00000008) /* HCLK:20-35 MHz; MDC clock= HCLK/16 */ + #define ETH_MACMIIAR_CR_Div26 ((uint32_t)0x0000000C) /* HCLK:35-60 MHz; MDC clock= HCLK/26 */ +#define ETH_MACMIIAR_MW ((uint32_t)0x00000002) /* MII write */ +#define ETH_MACMIIAR_MB ((uint32_t)0x00000001) /* MII busy */ + +/* Bit definition for Ethernet MAC MII Data Register */ +#define ETH_MACMIIDR_MD ((uint32_t)0x0000FFFF) /* MII data: read/write data from/to PHY */ + +/* Bit definition for Ethernet MAC Flow Control Register */ +#define ETH_MACFCR_PT ((uint32_t)0xFFFF0000) /* Pause time */ +#define ETH_MACFCR_ZQPD ((uint32_t)0x00000080) /* Zero-quanta pause disable */ +#define ETH_MACFCR_PLT ((uint32_t)0x00000030) /* Pause low threshold: 4 cases */ + #define ETH_MACFCR_PLT_Minus4 ((uint32_t)0x00000000) /* Pause time minus 4 slot times */ + #define ETH_MACFCR_PLT_Minus28 ((uint32_t)0x00000010) /* Pause time minus 28 slot times */ + #define ETH_MACFCR_PLT_Minus144 ((uint32_t)0x00000020) /* Pause time minus 144 slot times */ + #define ETH_MACFCR_PLT_Minus256 ((uint32_t)0x00000030) /* Pause time minus 256 slot times */ +#define ETH_MACFCR_UPFD ((uint32_t)0x00000008) /* Unicast pause frame detect */ +#define ETH_MACFCR_RFCE ((uint32_t)0x00000004) /* Receive flow control enable */ +#define ETH_MACFCR_TFCE ((uint32_t)0x00000002) /* Transmit flow control enable */ +#define ETH_MACFCR_FCBBPA ((uint32_t)0x00000001) /* Flow control busy/backpressure activate */ + +/* Bit definition for Ethernet MAC VLAN Tag Register */ +#define ETH_MACVLANTR_VLANTC ((uint32_t)0x00010000) /* 12-bit VLAN tag comparison */ +#define ETH_MACVLANTR_VLANTI ((uint32_t)0x0000FFFF) /* VLAN tag identifier (for receive frames) */ + +/* Bit definition for Ethernet MAC Remote Wake-UpFrame Filter Register */ +#define ETH_MACRWUFFR_D ((uint32_t)0xFFFFFFFF) /* Wake-up frame filter register data */ +/* Eight sequential Writes to this address (offset 0x28) will write all Wake-UpFrame Filter Registers. + Eight sequential Reads from this address (offset 0x28) will read all Wake-UpFrame Filter Registers. */ +/* Wake-UpFrame Filter Reg0 : Filter 0 Byte Mask + Wake-UpFrame Filter Reg1 : Filter 1 Byte Mask + Wake-UpFrame Filter Reg2 : Filter 2 Byte Mask + Wake-UpFrame Filter Reg3 : Filter 3 Byte Mask + Wake-UpFrame Filter Reg4 : RSVD - Filter3 Command - RSVD - Filter2 Command - + RSVD - Filter1 Command - RSVD - Filter0 Command + Wake-UpFrame Filter Re5 : Filter3 Offset - Filter2 Offset - Filter1 Offset - Filter0 Offset + Wake-UpFrame Filter Re6 : Filter1 CRC16 - Filter0 CRC16 + Wake-UpFrame Filter Re7 : Filter3 CRC16 - Filter2 CRC16 */ + +/* Bit definition for Ethernet MAC PMT Control and Status Register */ +#define ETH_MACPMTCSR_WFFRPR ((uint32_t)0x80000000) /* Wake-Up Frame Filter Register Pointer Reset */ +#define ETH_MACPMTCSR_GU ((uint32_t)0x00000200) /* Global Unicast */ +#define ETH_MACPMTCSR_WFR ((uint32_t)0x00000040) /* Wake-Up Frame Received */ +#define ETH_MACPMTCSR_MPR ((uint32_t)0x00000020) /* Magic Packet Received */ +#define ETH_MACPMTCSR_WFE ((uint32_t)0x00000004) /* Wake-Up Frame Enable */ +#define ETH_MACPMTCSR_MPE ((uint32_t)0x00000002) /* Magic Packet Enable */ +#define ETH_MACPMTCSR_PD ((uint32_t)0x00000001) /* Power Down */ + +/* Bit definition for Ethernet MAC Status Register */ +#define ETH_MACSR_TSTS ((uint32_t)0x00000200) /* Time stamp trigger status */ +#define ETH_MACSR_MMCTS ((uint32_t)0x00000040) /* MMC transmit status */ +#define ETH_MACSR_MMMCRS ((uint32_t)0x00000020) /* MMC receive status */ +#define ETH_MACSR_MMCS ((uint32_t)0x00000010) /* MMC status */ +#define ETH_MACSR_PMTS ((uint32_t)0x00000008) /* PMT status */ + +/* Bit definition for Ethernet MAC Interrupt Mask Register */ +#define ETH_MACIMR_TSTIM ((uint32_t)0x00000200) /* Time stamp trigger interrupt mask */ +#define ETH_MACIMR_PMTIM ((uint32_t)0x00000008) /* PMT interrupt mask */ + +/* Bit definition for Ethernet MAC Address0 High Register */ +#define ETH_MACA0HR_MACA0H ((uint32_t)0x0000FFFF) /* MAC address0 high */ + +/* Bit definition for Ethernet MAC Address0 Low Register */ +#define ETH_MACA0LR_MACA0L ((uint32_t)0xFFFFFFFF) /* MAC address0 low */ + +/* Bit definition for Ethernet MAC Address1 High Register */ +#define ETH_MACA1HR_AE ((uint32_t)0x80000000) /* Address enable */ +#define ETH_MACA1HR_SA ((uint32_t)0x40000000) /* Source address */ +#define ETH_MACA1HR_MBC ((uint32_t)0x3F000000) /* Mask byte control: bits to mask for comparison of the MAC Address bytes */ + #define ETH_MACA1HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ + #define ETH_MACA1HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ + #define ETH_MACA1HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ + #define ETH_MACA1HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ + #define ETH_MACA1HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ + #define ETH_MACA1HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [7:0] */ +#define ETH_MACA1HR_MACA1H ((uint32_t)0x0000FFFF) /* MAC address1 high */ + +/* Bit definition for Ethernet MAC Address1 Low Register */ +#define ETH_MACA1LR_MACA1L ((uint32_t)0xFFFFFFFF) /* MAC address1 low */ + +/* Bit definition for Ethernet MAC Address2 High Register */ +#define ETH_MACA2HR_AE ((uint32_t)0x80000000) /* Address enable */ +#define ETH_MACA2HR_SA ((uint32_t)0x40000000) /* Source address */ +#define ETH_MACA2HR_MBC ((uint32_t)0x3F000000) /* Mask byte control */ + #define ETH_MACA2HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ + #define ETH_MACA2HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ + #define ETH_MACA2HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ + #define ETH_MACA2HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ + #define ETH_MACA2HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ + #define ETH_MACA2HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */ +#define ETH_MACA2HR_MACA2H ((uint32_t)0x0000FFFF) /* MAC address1 high */ + +/* Bit definition for Ethernet MAC Address2 Low Register */ +#define ETH_MACA2LR_MACA2L ((uint32_t)0xFFFFFFFF) /* MAC address2 low */ + +/* Bit definition for Ethernet MAC Address3 High Register */ +#define ETH_MACA3HR_AE ((uint32_t)0x80000000) /* Address enable */ +#define ETH_MACA3HR_SA ((uint32_t)0x40000000) /* Source address */ +#define ETH_MACA3HR_MBC ((uint32_t)0x3F000000) /* Mask byte control */ + #define ETH_MACA3HR_MBC_HBits15_8 ((uint32_t)0x20000000) /* Mask MAC Address high reg bits [15:8] */ + #define ETH_MACA3HR_MBC_HBits7_0 ((uint32_t)0x10000000) /* Mask MAC Address high reg bits [7:0] */ + #define ETH_MACA3HR_MBC_LBits31_24 ((uint32_t)0x08000000) /* Mask MAC Address low reg bits [31:24] */ + #define ETH_MACA3HR_MBC_LBits23_16 ((uint32_t)0x04000000) /* Mask MAC Address low reg bits [23:16] */ + #define ETH_MACA3HR_MBC_LBits15_8 ((uint32_t)0x02000000) /* Mask MAC Address low reg bits [15:8] */ + #define ETH_MACA3HR_MBC_LBits7_0 ((uint32_t)0x01000000) /* Mask MAC Address low reg bits [70] */ +#define ETH_MACA3HR_MACA3H ((uint32_t)0x0000FFFF) /* MAC address3 high */ + +/* Bit definition for Ethernet MAC Address3 Low Register */ +#define ETH_MACA3LR_MACA3L ((uint32_t)0xFFFFFFFF) /* MAC address3 low */ + +/******************************************************************************/ +/* Ethernet MMC Registers bits definition */ +/******************************************************************************/ + +/* Bit definition for Ethernet MMC Contol Register */ +#define ETH_MMCCR_MCF ((uint32_t)0x00000008) /* MMC Counter Freeze */ +#define ETH_MMCCR_ROR ((uint32_t)0x00000004) /* Reset on Read */ +#define ETH_MMCCR_CSR ((uint32_t)0x00000002) /* Counter Stop Rollover */ +#define ETH_MMCCR_CR ((uint32_t)0x00000001) /* Counters Reset */ + +/* Bit definition for Ethernet MMC Receive Interrupt Register */ +#define ETH_MMCRIR_RGUFS ((uint32_t)0x00020000) /* Set when Rx good unicast frames counter reaches half the maximum value */ +#define ETH_MMCRIR_RFAES ((uint32_t)0x00000040) /* Set when Rx alignment error counter reaches half the maximum value */ +#define ETH_MMCRIR_RFCES ((uint32_t)0x00000020) /* Set when Rx crc error counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Transmit Interrupt Register */ +#define ETH_MMCTIR_TGFS ((uint32_t)0x00200000) /* Set when Tx good frame count counter reaches half the maximum value */ +#define ETH_MMCTIR_TGFMSCS ((uint32_t)0x00008000) /* Set when Tx good multi col counter reaches half the maximum value */ +#define ETH_MMCTIR_TGFSCS ((uint32_t)0x00004000) /* Set when Tx good single col counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Receive Interrupt Mask Register */ +#define ETH_MMCRIMR_RGUFM ((uint32_t)0x00020000) /* Mask the interrupt when Rx good unicast frames counter reaches half the maximum value */ +#define ETH_MMCRIMR_RFAEM ((uint32_t)0x00000040) /* Mask the interrupt when when Rx alignment error counter reaches half the maximum value */ +#define ETH_MMCRIMR_RFCEM ((uint32_t)0x00000020) /* Mask the interrupt when Rx crc error counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Transmit Interrupt Mask Register */ +#define ETH_MMCTIMR_TGFM ((uint32_t)0x00200000) /* Mask the interrupt when Tx good frame count counter reaches half the maximum value */ +#define ETH_MMCTIMR_TGFMSCM ((uint32_t)0x00008000) /* Mask the interrupt when Tx good multi col counter reaches half the maximum value */ +#define ETH_MMCTIMR_TGFSCM ((uint32_t)0x00004000) /* Mask the interrupt when Tx good single col counter reaches half the maximum value */ + +/* Bit definition for Ethernet MMC Transmitted Good Frames after Single Collision Counter Register */ +#define ETH_MMCTGFSCCR_TGFSCC ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after a single collision in Half-duplex mode. */ + +/* Bit definition for Ethernet MMC Transmitted Good Frames after More than a Single Collision Counter Register */ +#define ETH_MMCTGFMSCCR_TGFMSCC ((uint32_t)0xFFFFFFFF) /* Number of successfully transmitted frames after more than a single collision in Half-duplex mode. */ + +/* Bit definition for Ethernet MMC Transmitted Good Frames Counter Register */ +#define ETH_MMCTGFCR_TGFC ((uint32_t)0xFFFFFFFF) /* Number of good frames transmitted. */ + +/* Bit definition for Ethernet MMC Received Frames with CRC Error Counter Register */ +#define ETH_MMCRFCECR_RFCEC ((uint32_t)0xFFFFFFFF) /* Number of frames received with CRC error. */ + +/* Bit definition for Ethernet MMC Received Frames with Alignement Error Counter Register */ +#define ETH_MMCRFAECR_RFAEC ((uint32_t)0xFFFFFFFF) /* Number of frames received with alignment (dribble) error */ + +/* Bit definition for Ethernet MMC Received Good Unicast Frames Counter Register */ +#define ETH_MMCRGUFCR_RGUFC ((uint32_t)0xFFFFFFFF) /* Number of good unicast frames received. */ + +/******************************************************************************/ +/* Ethernet PTP Registers bits definition */ +/******************************************************************************/ + +/* Bit definition for Ethernet PTP Time Stamp Contol Register */ +#define ETH_PTPTSCR_TSARU ((uint32_t)0x00000020) /* Addend register update */ +#define ETH_PTPTSCR_TSITE ((uint32_t)0x00000010) /* Time stamp interrupt trigger enable */ +#define ETH_PTPTSCR_TSSTU ((uint32_t)0x00000008) /* Time stamp update */ +#define ETH_PTPTSCR_TSSTI ((uint32_t)0x00000004) /* Time stamp initialize */ +#define ETH_PTPTSCR_TSFCU ((uint32_t)0x00000002) /* Time stamp fine or coarse update */ +#define ETH_PTPTSCR_TSE ((uint32_t)0x00000001) /* Time stamp enable */ + +/* Bit definition for Ethernet PTP Sub-Second Increment Register */ +#define ETH_PTPSSIR_STSSI ((uint32_t)0x000000FF) /* System time Sub-second increment value */ + +/* Bit definition for Ethernet PTP Time Stamp High Register */ +#define ETH_PTPTSHR_STS ((uint32_t)0xFFFFFFFF) /* System Time second */ + +/* Bit definition for Ethernet PTP Time Stamp Low Register */ +#define ETH_PTPTSLR_STPNS ((uint32_t)0x80000000) /* System Time Positive or negative time */ +#define ETH_PTPTSLR_STSS ((uint32_t)0x7FFFFFFF) /* System Time sub-seconds */ + +/* Bit definition for Ethernet PTP Time Stamp High Update Register */ +#define ETH_PTPTSHUR_TSUS ((uint32_t)0xFFFFFFFF) /* Time stamp update seconds */ + +/* Bit definition for Ethernet PTP Time Stamp Low Update Register */ +#define ETH_PTPTSLUR_TSUPNS ((uint32_t)0x80000000) /* Time stamp update Positive or negative time */ +#define ETH_PTPTSLUR_TSUSS ((uint32_t)0x7FFFFFFF) /* Time stamp update sub-seconds */ + +/* Bit definition for Ethernet PTP Time Stamp Addend Register */ +#define ETH_PTPTSAR_TSA ((uint32_t)0xFFFFFFFF) /* Time stamp addend */ + +/* Bit definition for Ethernet PTP Target Time High Register */ +#define ETH_PTPTTHR_TTSH ((uint32_t)0xFFFFFFFF) /* Target time stamp high */ + +/* Bit definition for Ethernet PTP Target Time Low Register */ +#define ETH_PTPTTLR_TTSL ((uint32_t)0xFFFFFFFF) /* Target time stamp low */ + +/******************************************************************************/ +/* Ethernet DMA Registers bits definition */ +/******************************************************************************/ + +/* Bit definition for Ethernet DMA Bus Mode Register */ +#define ETH_DMABMR_AAB ((uint32_t)0x02000000) /* Address-Aligned beats */ +#define ETH_DMABMR_FPM ((uint32_t)0x01000000) /* 4xPBL mode */ +#define ETH_DMABMR_USP ((uint32_t)0x00800000) /* Use separate PBL */ +#define ETH_DMABMR_RDP ((uint32_t)0x007E0000) /* RxDMA PBL */ + #define ETH_DMABMR_RDP_1Beat ((uint32_t)0x00020000) /* maximum number of beats to be transferred in one RxDMA transaction is 1 */ + #define ETH_DMABMR_RDP_2Beat ((uint32_t)0x00040000) /* maximum number of beats to be transferred in one RxDMA transaction is 2 */ + #define ETH_DMABMR_RDP_4Beat ((uint32_t)0x00080000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ + #define ETH_DMABMR_RDP_8Beat ((uint32_t)0x00100000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ + #define ETH_DMABMR_RDP_16Beat ((uint32_t)0x00200000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ + #define ETH_DMABMR_RDP_32Beat ((uint32_t)0x00400000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ + #define ETH_DMABMR_RDP_4xPBL_4Beat ((uint32_t)0x01020000) /* maximum number of beats to be transferred in one RxDMA transaction is 4 */ + #define ETH_DMABMR_RDP_4xPBL_8Beat ((uint32_t)0x01040000) /* maximum number of beats to be transferred in one RxDMA transaction is 8 */ + #define ETH_DMABMR_RDP_4xPBL_16Beat ((uint32_t)0x01080000) /* maximum number of beats to be transferred in one RxDMA transaction is 16 */ + #define ETH_DMABMR_RDP_4xPBL_32Beat ((uint32_t)0x01100000) /* maximum number of beats to be transferred in one RxDMA transaction is 32 */ + #define ETH_DMABMR_RDP_4xPBL_64Beat ((uint32_t)0x01200000) /* maximum number of beats to be transferred in one RxDMA transaction is 64 */ + #define ETH_DMABMR_RDP_4xPBL_128Beat ((uint32_t)0x01400000) /* maximum number of beats to be transferred in one RxDMA transaction is 128 */ +#define ETH_DMABMR_FB ((uint32_t)0x00010000) /* Fixed Burst */ +#define ETH_DMABMR_RTPR ((uint32_t)0x0000C000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_1_1 ((uint32_t)0x00000000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_2_1 ((uint32_t)0x00004000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_3_1 ((uint32_t)0x00008000) /* Rx Tx priority ratio */ + #define ETH_DMABMR_RTPR_4_1 ((uint32_t)0x0000C000) /* Rx Tx priority ratio */ +#define ETH_DMABMR_PBL ((uint32_t)0x00003F00) /* Programmable burst length */ + #define ETH_DMABMR_PBL_1Beat ((uint32_t)0x00000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */ + #define ETH_DMABMR_PBL_2Beat ((uint32_t)0x00000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */ + #define ETH_DMABMR_PBL_4Beat ((uint32_t)0x00000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ + #define ETH_DMABMR_PBL_8Beat ((uint32_t)0x00000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ + #define ETH_DMABMR_PBL_16Beat ((uint32_t)0x00001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ + #define ETH_DMABMR_PBL_32Beat ((uint32_t)0x00002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ + #define ETH_DMABMR_PBL_4xPBL_4Beat ((uint32_t)0x01000100) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */ + #define ETH_DMABMR_PBL_4xPBL_8Beat ((uint32_t)0x01000200) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */ + #define ETH_DMABMR_PBL_4xPBL_16Beat ((uint32_t)0x01000400) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */ + #define ETH_DMABMR_PBL_4xPBL_32Beat ((uint32_t)0x01000800) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */ + #define ETH_DMABMR_PBL_4xPBL_64Beat ((uint32_t)0x01001000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */ + #define ETH_DMABMR_PBL_4xPBL_128Beat ((uint32_t)0x01002000) /* maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */ +#define ETH_DMABMR_DSL ((uint32_t)0x0000007C) /* Descriptor Skip Length */ +#define ETH_DMABMR_DA ((uint32_t)0x00000002) /* DMA arbitration scheme */ +#define ETH_DMABMR_SR ((uint32_t)0x00000001) /* Software reset */ + +/* Bit definition for Ethernet DMA Transmit Poll Demand Register */ +#define ETH_DMATPDR_TPD ((uint32_t)0xFFFFFFFF) /* Transmit poll demand */ + +/* Bit definition for Ethernet DMA Receive Poll Demand Register */ +#define ETH_DMARPDR_RPD ((uint32_t)0xFFFFFFFF) /* Receive poll demand */ + +/* Bit definition for Ethernet DMA Receive Descriptor List Address Register */ +#define ETH_DMARDLAR_SRL ((uint32_t)0xFFFFFFFF) /* Start of receive list */ + +/* Bit definition for Ethernet DMA Transmit Descriptor List Address Register */ +#define ETH_DMATDLAR_STL ((uint32_t)0xFFFFFFFF) /* Start of transmit list */ + +/* Bit definition for Ethernet DMA Status Register */ +#define ETH_DMASR_TSTS ((uint32_t)0x20000000) /* Time-stamp trigger status */ +#define ETH_DMASR_PMTS ((uint32_t)0x10000000) /* PMT status */ +#define ETH_DMASR_MMCS ((uint32_t)0x08000000) /* MMC status */ +#define ETH_DMASR_EBS ((uint32_t)0x03800000) /* Error bits status */ + /* combination with EBS[2:0] for GetFlagStatus function */ + #define ETH_DMASR_EBS_DescAccess ((uint32_t)0x02000000) /* Error bits 0-data buffer, 1-desc. access */ + #define ETH_DMASR_EBS_ReadTransf ((uint32_t)0x01000000) /* Error bits 0-write trnsf, 1-read transfr */ + #define ETH_DMASR_EBS_DataTransfTx ((uint32_t)0x00800000) /* Error bits 0-Rx DMA, 1-Tx DMA */ +#define ETH_DMASR_TPS ((uint32_t)0x00700000) /* Transmit process state */ + #define ETH_DMASR_TPS_Stopped ((uint32_t)0x00000000) /* Stopped - Reset or Stop Tx Command issued */ + #define ETH_DMASR_TPS_Fetching ((uint32_t)0x00100000) /* Running - fetching the Tx descriptor */ + #define ETH_DMASR_TPS_Waiting ((uint32_t)0x00200000) /* Running - waiting for status */ + #define ETH_DMASR_TPS_Reading ((uint32_t)0x00300000) /* Running - reading the data from host memory */ + #define ETH_DMASR_TPS_Suspended ((uint32_t)0x00600000) /* Suspended - Tx Descriptor unavailabe */ + #define ETH_DMASR_TPS_Closing ((uint32_t)0x00700000) /* Running - closing Rx descriptor */ +#define ETH_DMASR_RPS ((uint32_t)0x000E0000) /* Receive process state */ + #define ETH_DMASR_RPS_Stopped ((uint32_t)0x00000000) /* Stopped - Reset or Stop Rx Command issued */ + #define ETH_DMASR_RPS_Fetching ((uint32_t)0x00020000) /* Running - fetching the Rx descriptor */ + #define ETH_DMASR_RPS_Waiting ((uint32_t)0x00060000) /* Running - waiting for packet */ + #define ETH_DMASR_RPS_Suspended ((uint32_t)0x00080000) /* Suspended - Rx Descriptor unavailable */ + #define ETH_DMASR_RPS_Closing ((uint32_t)0x000A0000) /* Running - closing descriptor */ + #define ETH_DMASR_RPS_Queuing ((uint32_t)0x000E0000) /* Running - queuing the recieve frame into host memory */ +#define ETH_DMASR_NIS ((uint32_t)0x00010000) /* Normal interrupt summary */ +#define ETH_DMASR_AIS ((uint32_t)0x00008000) /* Abnormal interrupt summary */ +#define ETH_DMASR_ERS ((uint32_t)0x00004000) /* Early receive status */ +#define ETH_DMASR_FBES ((uint32_t)0x00002000) /* Fatal bus error status */ +#define ETH_DMASR_ETS ((uint32_t)0x00000400) /* Early transmit status */ +#define ETH_DMASR_RWTS ((uint32_t)0x00000200) /* Receive watchdog timeout status */ +#define ETH_DMASR_RPSS ((uint32_t)0x00000100) /* Receive process stopped status */ +#define ETH_DMASR_RBUS ((uint32_t)0x00000080) /* Receive buffer unavailable status */ +#define ETH_DMASR_RS ((uint32_t)0x00000040) /* Receive status */ +#define ETH_DMASR_TUS ((uint32_t)0x00000020) /* Transmit underflow status */ +#define ETH_DMASR_ROS ((uint32_t)0x00000010) /* Receive overflow status */ +#define ETH_DMASR_TJTS ((uint32_t)0x00000008) /* Transmit jabber timeout status */ +#define ETH_DMASR_TBUS ((uint32_t)0x00000004) /* Transmit buffer unavailable status */ +#define ETH_DMASR_TPSS ((uint32_t)0x00000002) /* Transmit process stopped status */ +#define ETH_DMASR_TS ((uint32_t)0x00000001) /* Transmit status */ + +/* Bit definition for Ethernet DMA Operation Mode Register */ +#define ETH_DMAOMR_DTCEFD ((uint32_t)0x04000000) /* Disable Dropping of TCP/IP checksum error frames */ +#define ETH_DMAOMR_RSF ((uint32_t)0x02000000) /* Receive store and forward */ +#define ETH_DMAOMR_DFRF ((uint32_t)0x01000000) /* Disable flushing of received frames */ +#define ETH_DMAOMR_TSF ((uint32_t)0x00200000) /* Transmit store and forward */ +#define ETH_DMAOMR_FTF ((uint32_t)0x00100000) /* Flush transmit FIFO */ +#define ETH_DMAOMR_TTC ((uint32_t)0x0001C000) /* Transmit threshold control */ + #define ETH_DMAOMR_TTC_64Bytes ((uint32_t)0x00000000) /* threshold level of the MTL Transmit FIFO is 64 Bytes */ + #define ETH_DMAOMR_TTC_128Bytes ((uint32_t)0x00004000) /* threshold level of the MTL Transmit FIFO is 128 Bytes */ + #define ETH_DMAOMR_TTC_192Bytes ((uint32_t)0x00008000) /* threshold level of the MTL Transmit FIFO is 192 Bytes */ + #define ETH_DMAOMR_TTC_256Bytes ((uint32_t)0x0000C000) /* threshold level of the MTL Transmit FIFO is 256 Bytes */ + #define ETH_DMAOMR_TTC_40Bytes ((uint32_t)0x00010000) /* threshold level of the MTL Transmit FIFO is 40 Bytes */ + #define ETH_DMAOMR_TTC_32Bytes ((uint32_t)0x00014000) /* threshold level of the MTL Transmit FIFO is 32 Bytes */ + #define ETH_DMAOMR_TTC_24Bytes ((uint32_t)0x00018000) /* threshold level of the MTL Transmit FIFO is 24 Bytes */ + #define ETH_DMAOMR_TTC_16Bytes ((uint32_t)0x0001C000) /* threshold level of the MTL Transmit FIFO is 16 Bytes */ +#define ETH_DMAOMR_ST ((uint32_t)0x00002000) /* Start/stop transmission command */ +#define ETH_DMAOMR_FEF ((uint32_t)0x00000080) /* Forward error frames */ +#define ETH_DMAOMR_FUGF ((uint32_t)0x00000040) /* Forward undersized good frames */ +#define ETH_DMAOMR_RTC ((uint32_t)0x00000018) /* receive threshold control */ + #define ETH_DMAOMR_RTC_64Bytes ((uint32_t)0x00000000) /* threshold level of the MTL Receive FIFO is 64 Bytes */ + #define ETH_DMAOMR_RTC_32Bytes ((uint32_t)0x00000008) /* threshold level of the MTL Receive FIFO is 32 Bytes */ + #define ETH_DMAOMR_RTC_96Bytes ((uint32_t)0x00000010) /* threshold level of the MTL Receive FIFO is 96 Bytes */ + #define ETH_DMAOMR_RTC_128Bytes ((uint32_t)0x00000018) /* threshold level of the MTL Receive FIFO is 128 Bytes */ +#define ETH_DMAOMR_OSF ((uint32_t)0x00000004) /* operate on second frame */ +#define ETH_DMAOMR_SR ((uint32_t)0x00000002) /* Start/stop receive */ + +/* Bit definition for Ethernet DMA Interrupt Enable Register */ +#define ETH_DMAIER_NISE ((uint32_t)0x00010000) /* Normal interrupt summary enable */ +#define ETH_DMAIER_AISE ((uint32_t)0x00008000) /* Abnormal interrupt summary enable */ +#define ETH_DMAIER_ERIE ((uint32_t)0x00004000) /* Early receive interrupt enable */ +#define ETH_DMAIER_FBEIE ((uint32_t)0x00002000) /* Fatal bus error interrupt enable */ +#define ETH_DMAIER_ETIE ((uint32_t)0x00000400) /* Early transmit interrupt enable */ +#define ETH_DMAIER_RWTIE ((uint32_t)0x00000200) /* Receive watchdog timeout interrupt enable */ +#define ETH_DMAIER_RPSIE ((uint32_t)0x00000100) /* Receive process stopped interrupt enable */ +#define ETH_DMAIER_RBUIE ((uint32_t)0x00000080) /* Receive buffer unavailable interrupt enable */ +#define ETH_DMAIER_RIE ((uint32_t)0x00000040) /* Receive interrupt enable */ +#define ETH_DMAIER_TUIE ((uint32_t)0x00000020) /* Transmit Underflow interrupt enable */ +#define ETH_DMAIER_ROIE ((uint32_t)0x00000010) /* Receive Overflow interrupt enable */ +#define ETH_DMAIER_TJTIE ((uint32_t)0x00000008) /* Transmit jabber timeout interrupt enable */ +#define ETH_DMAIER_TBUIE ((uint32_t)0x00000004) /* Transmit buffer unavailable interrupt enable */ +#define ETH_DMAIER_TPSIE ((uint32_t)0x00000002) /* Transmit process stopped interrupt enable */ +#define ETH_DMAIER_TIE ((uint32_t)0x00000001) /* Transmit interrupt enable */ + +/* Bit definition for Ethernet DMA Missed Frame and Buffer Overflow Counter Register */ +#define ETH_DMAMFBOCR_OFOC ((uint32_t)0x10000000) /* Overflow bit for FIFO overflow counter */ +#define ETH_DMAMFBOCR_MFA ((uint32_t)0x0FFE0000) /* Number of frames missed by the application */ +#define ETH_DMAMFBOCR_OMFC ((uint32_t)0x00010000) /* Overflow bit for missed frame counter */ +#define ETH_DMAMFBOCR_MFC ((uint32_t)0x0000FFFF) /* Number of frames missed by the controller */ + +/* Bit definition for Ethernet DMA Current Host Transmit Descriptor Register */ +#define ETH_DMACHTDR_HTDAP ((uint32_t)0xFFFFFFFF) /* Host transmit descriptor address pointer */ + +/* Bit definition for Ethernet DMA Current Host Receive Descriptor Register */ +#define ETH_DMACHRDR_HRDAP ((uint32_t)0xFFFFFFFF) /* Host receive descriptor address pointer */ + +/* Bit definition for Ethernet DMA Current Host Transmit Buffer Address Register */ +#define ETH_DMACHTBAR_HTBAP ((uint32_t)0xFFFFFFFF) /* Host transmit buffer address pointer */ + +/* Bit definition for Ethernet DMA Current Host Receive Buffer Address Register */ +#define ETH_DMACHRBAR_HRBAP ((uint32_t)0xFFFFFFFF) /* Host receive buffer address pointer */ +#endif /* STM32F10X_CL */ + +/** + * @} + */ + + /** + * @} + */ + +#ifdef USE_STDPERIPH_DRIVER + #include "stm32f10x_conf.h" +#endif + +/** @addtogroup Exported_macro + * @{ + */ + +#define SET_BIT(REG, BIT) ((REG) |= (BIT)) + +#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) + +#define READ_BIT(REG, BIT) ((REG) & (BIT)) + +#define CLEAR_REG(REG) ((REG) = (0x0)) + +#define WRITE_REG(REG, VAL) ((REG) = (VAL)) + +#define READ_REG(REG) ((REG)) + +#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) + +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_H */ + +/** + * @} + */ + + /** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c index 71efc858..6fb4579e 100644 --- a/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c +++ b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.c @@ -1,1094 +1,1094 @@ -/** - ****************************************************************************** - * @file system_stm32f10x.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. - * - * 1. This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier - * factors, AHB/APBx prescalers and Flash settings). - * This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32f10x_xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * 2. After each device reset the HSI (8 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to - * configure the system clock before to branch to main program. - * - * 3. If the system clock source selected by user fails to startup, the SystemInit() - * function will do nothing and HSI still used as system clock source. User can - * add some code to deal with this issue inside the SetSysClock() function. - * - * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on - * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. - * When HSE is used as system clock source, directly or through PLL, and you - * are using different crystal you have to adapt the HSE value to your own - * configuration. - * - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x_system - * @{ - */ - -/** @addtogroup STM32F10x_System_Private_Includes - * @{ - */ - -#include "stm32f10x.h" - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Defines - * @{ - */ - -/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) - frequency (after reset the HSI is used as SYSCLK source) - - IMPORTANT NOTE: - ============== - 1. After each device reset the HSI is used as System clock source. - - 2. Please make sure that the selected System clock doesn't exceed your device's - maximum frequency. - - 3. If none of the define below is enabled, the HSI is used as System clock - source. - - 4. The System clock configuration functions provided within this file assume that: - - For Low, Medium and High density Value line devices an external 8MHz - crystal is used to drive the System clock. - - For Low, Medium and High density devices an external 8MHz crystal is - used to drive the System clock. - - For Connectivity line devices an external 25MHz crystal is used to drive - the System clock. - If you are using different crystal you have to adapt those functions accordingly. - */ - -#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) -/* #define SYSCLK_FREQ_HSE HSE_VALUE */ - #define SYSCLK_FREQ_24MHz 24000000 -#else -/* #define SYSCLK_FREQ_HSE HSE_VALUE */ -/* #define SYSCLK_FREQ_24MHz 24000000 */ -/* #define SYSCLK_FREQ_36MHz 36000000 */ -/* #define SYSCLK_FREQ_48MHz 48000000 */ -/* #define SYSCLK_FREQ_56MHz 56000000 */ -#define SYSCLK_FREQ_72MHz 72000000 -#endif - -/*!< Uncomment the following line if you need to use external SRAM mounted - on STM3210E-EVAL board (STM32 High density and XL-density devices) or on - STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ -#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) -/* #define DATA_IN_ExtSRAM */ -#endif - -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. - This value must be a multiple of 0x200. */ - - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Variables - * @{ - */ - -/******************************************************************************* -* Clock Definitions -*******************************************************************************/ -#ifdef SYSCLK_FREQ_HSE - uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_24MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_36MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_48MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_56MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ -#elif defined SYSCLK_FREQ_72MHz - uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ -#else /*!< HSI Selected as System Clock source */ - uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ -#endif - -__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_FunctionPrototypes - * @{ - */ - -static void SetSysClock(void); - -#ifdef SYSCLK_FREQ_HSE - static void SetSysClockToHSE(void); -#elif defined SYSCLK_FREQ_24MHz - static void SetSysClockTo24(void); -#elif defined SYSCLK_FREQ_36MHz - static void SetSysClockTo36(void); -#elif defined SYSCLK_FREQ_48MHz - static void SetSysClockTo48(void); -#elif defined SYSCLK_FREQ_56MHz - static void SetSysClockTo56(void); -#elif defined SYSCLK_FREQ_72MHz - static void SetSysClockTo72(void); -#endif - -#ifdef DATA_IN_ExtSRAM - static void SystemInit_ExtMemCtl(void); -#endif /* DATA_IN_ExtSRAM */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system - * Initialize the Embedded Flash Interface, the PLL and update the - * SystemCoreClock variable. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -void SystemInit (void) -{ - /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ -#ifndef STM32F10X_CL - RCC->CFGR &= (uint32_t)0xF8FF0000; -#else - RCC->CFGR &= (uint32_t)0xF0FF0000; -#endif /* STM32F10X_CL */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ - RCC->CFGR &= (uint32_t)0xFF80FFFF; - -#ifdef STM32F10X_CL - /* Reset PLL2ON and PLL3ON bits */ - RCC->CR &= (uint32_t)0xEBFFFFFF; - - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x00FF0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#else - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) - #ifdef DATA_IN_ExtSRAM - SystemInit_ExtMemCtl(); - #endif /* DATA_IN_ExtSRAM */ -#endif - - /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ - /* Configure the Flash Latency cycles and enable prefetch buffer */ - SetSysClock(); - -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) - * or HSI_VALUE(*) multiplied by the PLL factors. - * - * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value - * 8 MHz or 25 MHz, depedning on the product used), user has to ensure - * that HSE_VALUE is same as the real frequency of the crystal used. - * Otherwise, this function may have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0; - -#ifdef STM32F10X_CL - uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - uint32_t prediv1factor = 0; -#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - case 0x04: /* HSE used as system clock */ - SystemCoreClock = HSE_VALUE; - break; - case 0x08: /* PLL used as system clock */ - - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - -#ifndef STM32F10X_CL - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - { - #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - #else - /* HSE selected as PLL clock entry */ - if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) - {/* HSE oscillator clock divided by 2 */ - SystemCoreClock = (HSE_VALUE >> 1) * pllmull; - } - else - { - SystemCoreClock = HSE_VALUE * pllmull; - } - #endif - } -#else - pllmull = pllmull >> 18; - - if (pllmull != 0x0D) - { - pllmull += 2; - } - else - { /* PLL multiplication factor = PLL input clock * 6.5 */ - pllmull = 13 / 2; - } - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - {/* PREDIV1 selected as PLL clock entry */ - - /* Get PREDIV1 clock source and division factor */ - prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - - if (prediv1source == 0) - { - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - } - else - {/* PLL2 clock selected as PREDIV1 clock entry */ - - /* Get PREDIV2 division factor and PLL2 multiplication factor */ - prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; - pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; - SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; - } - } -#endif /* STM32F10X_CL */ - break; - - default: - SystemCoreClock = HSI_VALUE; - break; - } - - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. - * @param None - * @retval None - */ -static void SetSysClock(void) -{ -#ifdef SYSCLK_FREQ_HSE - SetSysClockToHSE(); -#elif defined SYSCLK_FREQ_24MHz - SetSysClockTo24(); -#elif defined SYSCLK_FREQ_36MHz - SetSysClockTo36(); -#elif defined SYSCLK_FREQ_48MHz - SetSysClockTo48(); -#elif defined SYSCLK_FREQ_56MHz - SetSysClockTo56(); -#elif defined SYSCLK_FREQ_72MHz - SetSysClockTo72(); -#endif - - /* If none of the define above is enabled, the HSI is used as System clock - source (default after reset) */ -} - -/** - * @brief Setup the external memory controller. Called in startup_stm32f10x.s - * before jump to __main - * @param None - * @retval None - */ -#ifdef DATA_IN_ExtSRAM -/** - * @brief Setup the external memory controller. - * Called in startup_stm32f10x_xx.s/.c before jump to main. - * This function configures the external SRAM mounted on STM3210E-EVAL - * board (STM32 High density devices). This SRAM will be used as program - * data memory (including heap and stack). - * @param None - * @retval None - */ -void SystemInit_ExtMemCtl(void) -{ -/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is - required, then adjust the Register Addresses */ - - /* Enable FSMC clock */ - RCC->AHBENR = 0x00000114; - - /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ - RCC->APB2ENR = 0x000001E0; - -/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ -/*---------------- SRAM Address lines configuration -------------------------*/ -/*---------------- NOE and NWE configuration --------------------------------*/ -/*---------------- NE3 configuration ----------------------------------------*/ -/*---------------- NBL0, NBL1 configuration ---------------------------------*/ - - GPIOD->CRL = 0x44BB44BB; - GPIOD->CRH = 0xBBBBBBBB; - - GPIOE->CRL = 0xB44444BB; - GPIOE->CRH = 0xBBBBBBBB; - - GPIOF->CRL = 0x44BBBBBB; - GPIOF->CRH = 0xBBBB4444; - - GPIOG->CRL = 0x44BBBBBB; - GPIOG->CRH = 0x44444B44; - -/*---------------- FSMC Configuration ---------------------------------------*/ -/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ - - FSMC_Bank1->BTCR[4] = 0x00001011; - FSMC_Bank1->BTCR[5] = 0x00000200; -} -#endif /* DATA_IN_ExtSRAM */ - -#ifdef SYSCLK_FREQ_HSE -/** - * @brief Selects HSE as System clock source and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockToHSE(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - -#ifndef STM32F10X_CL - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#else - if (HSE_VALUE <= 24000000) - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; - } - else - { - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - } -#endif /* STM32F10X_CL */ -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - - /* Select HSE as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; - - /* Wait till HSE is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_24MHz -/** - * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo24(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { -#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 0 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; -#endif - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); - - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_36MHz -/** - * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo36(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); - - /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - -#else - /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#elif defined SYSCLK_FREQ_48MHz -/** - * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo48(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 1 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL6); -#else - /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_56MHz -/** - * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo56(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL7); -#else - /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); - -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} - -#elif defined SYSCLK_FREQ_72MHz -/** - * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 - * and PCLK1 prescalers. - * @note This function should be used only after reset. - * @param None - * @retval None - */ -static void SetSysClockTo72(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer */ - FLASH->ACR |= FLASH_ACR_PRFTBE; - - /* Flash 2 wait state */ - FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); - FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; - - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK2 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; - - /* PCLK1 = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; - -#ifdef STM32F10X_CL - /* Configure PLLs ------------------------------------------------------*/ - /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ - /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ - - RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | - RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); - RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | - RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); - - /* Enable PLL2 */ - RCC->CR |= RCC_CR_PLL2ON; - /* Wait till PLL2 is ready */ - while((RCC->CR & RCC_CR_PLL2RDY) == 0) - { - } - - - /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | - RCC_CFGR_PLLMULL9); -#else - /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | - RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); -#endif /* STM32F10X_CL */ - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file system_stm32f10x.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depedning on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + +#ifndef STM32F10X_CL + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#else + if (HSE_VALUE <= 24000000) + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + } + else + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + } +#endif /* STM32F10X_CL */ +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); + + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); + + /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + +#else + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL7); +#else + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); +#else + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h index 54bc1abe..739f3328 100644 --- a/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h +++ b/firmware/stm32-esp/libraries/cmsis/system_stm32f10x.h @@ -1,98 +1,98 @@ -/** - ****************************************************************************** - * @file system_stm32f10x.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f10x_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32F10X_H -#define __SYSTEM_STM32F10X_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32F10x_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32F10x_System_Exported_types - * @{ - */ - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F10x_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32F10X_H */ - -/** - * @} - */ - -/** - * @} - */ -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file system_stm32f10x.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Header File. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** + * @brief Define to prevent recursive inclusion + */ +#ifndef __SYSTEM_STM32F10X_H +#define __SYSTEM_STM32F10X_H + +#ifdef __cplusplus + extern "C" { +#endif + +/** @addtogroup STM32F10x_System_Includes + * @{ + */ + +/** + * @} + */ + + +/** @addtogroup STM32F10x_System_Exported_types + * @{ + */ + +extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Exported_Constants + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Exported_Functions + * @{ + */ + +extern void SystemInit(void); +extern void SystemCoreClockUpdate(void); +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /*__SYSTEM_STM32F10X_H */ + +/** + * @} + */ + +/** + * @} + */ +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/misc.h b/firmware/stm32-esp/libraries/fwlib/inc/misc.h index 9a6bd07c..7d401ca9 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/misc.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/misc.h @@ -1,220 +1,220 @@ -/** - ****************************************************************************** - * @file misc.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the miscellaneous - * firmware library functions (add-on to CMSIS functions). - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __MISC_H -#define __MISC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup MISC - * @{ - */ - -/** @defgroup MISC_Exported_Types - * @{ - */ - -/** - * @brief NVIC Init Structure definition - */ - -typedef struct -{ - uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. - This parameter can be a value of @ref IRQn_Type - (For the complete STM32 Devices IRQ Channels list, please - refer to stm32f10x.h file) */ - - uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel - specified in NVIC_IRQChannel. This parameter can be a value - between 0 and 15 as described in the table @ref NVIC_Priority_Table */ - - uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified - in NVIC_IRQChannel. This parameter can be a value - between 0 and 15 as described in the table @ref NVIC_Priority_Table */ - - FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel - will be enabled or disabled. - This parameter can be set either to ENABLE or DISABLE */ -} NVIC_InitTypeDef; - -/** - * @} - */ - -/** @defgroup NVIC_Priority_Table - * @{ - */ - -/** -@code - The table below gives the allowed values of the pre-emption priority and subpriority according - to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function - ============================================================================================================================ - NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description - ============================================================================================================================ - NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority - | | | 4 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority - | | | 3 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority - | | | 2 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority - | | | 1 bits for subpriority - ---------------------------------------------------------------------------------------------------------------------------- - NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority - | | | 0 bits for subpriority - ============================================================================================================================ -@endcode -*/ - -/** - * @} - */ - -/** @defgroup MISC_Exported_Constants - * @{ - */ - -/** @defgroup Vector_Table_Base - * @{ - */ - -#define NVIC_VectTab_RAM ((uint32_t)0x20000000) -#define NVIC_VectTab_FLASH ((uint32_t)0x08000000) -#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ - ((VECTTAB) == NVIC_VectTab_FLASH)) -/** - * @} - */ - -/** @defgroup System_Low_Power - * @{ - */ - -#define NVIC_LP_SEVONPEND ((uint8_t)0x10) -#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) -#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) -#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ - ((LP) == NVIC_LP_SLEEPDEEP) || \ - ((LP) == NVIC_LP_SLEEPONEXIT)) -/** - * @} - */ - -/** @defgroup Preemption_Priority_Group - * @{ - */ - -#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority - 4 bits for subpriority */ -#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority - 3 bits for subpriority */ -#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority - 2 bits for subpriority */ -#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority - 1 bits for subpriority */ -#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority - 0 bits for subpriority */ - -#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ - ((GROUP) == NVIC_PriorityGroup_1) || \ - ((GROUP) == NVIC_PriorityGroup_2) || \ - ((GROUP) == NVIC_PriorityGroup_3) || \ - ((GROUP) == NVIC_PriorityGroup_4)) - -#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) - -#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) - -/** - * @} - */ - -/** @defgroup SysTick_clock_source - * @{ - */ - -#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) -#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) -#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ - ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup MISC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Exported_Functions - * @{ - */ - -void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); -void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); -void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); -void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); -void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); - -#ifdef __cplusplus -} -#endif - -#endif /* __MISC_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file misc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the miscellaneous + * firmware library functions (add-on to CMSIS functions). + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MISC_H +#define __MISC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup MISC + * @{ + */ + +/** @defgroup MISC_Exported_Types + * @{ + */ + +/** + * @brief NVIC Init Structure definition + */ + +typedef struct +{ + uint8_t NVIC_IRQChannel; /*!< Specifies the IRQ channel to be enabled or disabled. + This parameter can be a value of @ref IRQn_Type + (For the complete STM32 Devices IRQ Channels list, please + refer to stm32f10x.h file) */ + + uint8_t NVIC_IRQChannelPreemptionPriority; /*!< Specifies the pre-emption priority for the IRQ channel + specified in NVIC_IRQChannel. This parameter can be a value + between 0 and 15 as described in the table @ref NVIC_Priority_Table */ + + uint8_t NVIC_IRQChannelSubPriority; /*!< Specifies the subpriority level for the IRQ channel specified + in NVIC_IRQChannel. This parameter can be a value + between 0 and 15 as described in the table @ref NVIC_Priority_Table */ + + FunctionalState NVIC_IRQChannelCmd; /*!< Specifies whether the IRQ channel defined in NVIC_IRQChannel + will be enabled or disabled. + This parameter can be set either to ENABLE or DISABLE */ +} NVIC_InitTypeDef; + +/** + * @} + */ + +/** @defgroup NVIC_Priority_Table + * @{ + */ + +/** +@code + The table below gives the allowed values of the pre-emption priority and subpriority according + to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function + ============================================================================================================================ + NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description + ============================================================================================================================ + NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority + | | | 4 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority + | | | 3 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority + | | | 2 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority + | | | 1 bits for subpriority + ---------------------------------------------------------------------------------------------------------------------------- + NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority + | | | 0 bits for subpriority + ============================================================================================================================ +@endcode +*/ + +/** + * @} + */ + +/** @defgroup MISC_Exported_Constants + * @{ + */ + +/** @defgroup Vector_Table_Base + * @{ + */ + +#define NVIC_VectTab_RAM ((uint32_t)0x20000000) +#define NVIC_VectTab_FLASH ((uint32_t)0x08000000) +#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \ + ((VECTTAB) == NVIC_VectTab_FLASH)) +/** + * @} + */ + +/** @defgroup System_Low_Power + * @{ + */ + +#define NVIC_LP_SEVONPEND ((uint8_t)0x10) +#define NVIC_LP_SLEEPDEEP ((uint8_t)0x04) +#define NVIC_LP_SLEEPONEXIT ((uint8_t)0x02) +#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \ + ((LP) == NVIC_LP_SLEEPDEEP) || \ + ((LP) == NVIC_LP_SLEEPONEXIT)) +/** + * @} + */ + +/** @defgroup Preemption_Priority_Group + * @{ + */ + +#define NVIC_PriorityGroup_0 ((uint32_t)0x700) /*!< 0 bits for pre-emption priority + 4 bits for subpriority */ +#define NVIC_PriorityGroup_1 ((uint32_t)0x600) /*!< 1 bits for pre-emption priority + 3 bits for subpriority */ +#define NVIC_PriorityGroup_2 ((uint32_t)0x500) /*!< 2 bits for pre-emption priority + 2 bits for subpriority */ +#define NVIC_PriorityGroup_3 ((uint32_t)0x400) /*!< 3 bits for pre-emption priority + 1 bits for subpriority */ +#define NVIC_PriorityGroup_4 ((uint32_t)0x300) /*!< 4 bits for pre-emption priority + 0 bits for subpriority */ + +#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \ + ((GROUP) == NVIC_PriorityGroup_1) || \ + ((GROUP) == NVIC_PriorityGroup_2) || \ + ((GROUP) == NVIC_PriorityGroup_3) || \ + ((GROUP) == NVIC_PriorityGroup_4)) + +#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) + +#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) + +#define IS_NVIC_OFFSET(OFFSET) ((OFFSET) < 0x000FFFFF) + +/** + * @} + */ + +/** @defgroup SysTick_clock_source + * @{ + */ + +#define SysTick_CLKSource_HCLK_Div8 ((uint32_t)0xFFFFFFFB) +#define SysTick_CLKSource_HCLK ((uint32_t)0x00000004) +#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SysTick_CLKSource_HCLK) || \ + ((SOURCE) == SysTick_CLKSource_HCLK_Div8)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup MISC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Exported_Functions + * @{ + */ + +void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup); +void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct); +void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset); +void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState); +void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource); + +#ifdef __cplusplus +} +#endif + +#endif /* __MISC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h index c465d335..d1b2653a 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_adc.h @@ -1,483 +1,483 @@ -/** - ****************************************************************************** - * @file stm32f10x_adc.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the ADC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_ADC_H -#define __STM32F10x_ADC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup ADC - * @{ - */ - -/** @defgroup ADC_Exported_Types - * @{ - */ - -/** - * @brief ADC Init structure definition - */ - -typedef struct -{ - uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or - dual mode. - This parameter can be a value of @ref ADC_mode */ - - FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in - Scan (multichannels) or Single (one channel) mode. - This parameter can be set to ENABLE or DISABLE */ - - FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in - Continuous or Single mode. - This parameter can be set to ENABLE or DISABLE. */ - - uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog - to digital conversion of regular channels. This parameter - can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ - - uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. - This parameter can be a value of @ref ADC_data_align */ - - uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted - using the sequencer for regular channel group. - This parameter must range from 1 to 16. */ -}ADC_InitTypeDef; -/** - * @} - */ - -/** @defgroup ADC_Exported_Constants - * @{ - */ - -#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ - ((PERIPH) == ADC2) || \ - ((PERIPH) == ADC3)) - -#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ - ((PERIPH) == ADC3)) - -/** @defgroup ADC_mode - * @{ - */ - -#define ADC_Mode_Independent ((uint32_t)0x00000000) -#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) -#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) -#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) -#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) -#define ADC_Mode_InjecSimult ((uint32_t)0x00050000) -#define ADC_Mode_RegSimult ((uint32_t)0x00060000) -#define ADC_Mode_FastInterl ((uint32_t)0x00070000) -#define ADC_Mode_SlowInterl ((uint32_t)0x00080000) -#define ADC_Mode_AlterTrig ((uint32_t)0x00090000) - -#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ - ((MODE) == ADC_Mode_RegInjecSimult) || \ - ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ - ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ - ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ - ((MODE) == ADC_Mode_InjecSimult) || \ - ((MODE) == ADC_Mode_RegSimult) || \ - ((MODE) == ADC_Mode_FastInterl) || \ - ((MODE) == ADC_Mode_SlowInterl) || \ - ((MODE) == ADC_Mode_AlterTrig)) -/** - * @} - */ - -/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion - * @{ - */ - -#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ - -#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ -#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ - -#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ -#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ - -#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ - ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ - ((REGTRIG) == ADC_ExternalTrigConv_None) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ - ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) -/** - * @} - */ - -/** @defgroup ADC_data_align - * @{ - */ - -#define ADC_DataAlign_Right ((uint32_t)0x00000000) -#define ADC_DataAlign_Left ((uint32_t)0x00000800) -#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ - ((ALIGN) == ADC_DataAlign_Left)) -/** - * @} - */ - -/** @defgroup ADC_channels - * @{ - */ - -#define ADC_Channel_0 ((uint8_t)0x00) -#define ADC_Channel_1 ((uint8_t)0x01) -#define ADC_Channel_2 ((uint8_t)0x02) -#define ADC_Channel_3 ((uint8_t)0x03) -#define ADC_Channel_4 ((uint8_t)0x04) -#define ADC_Channel_5 ((uint8_t)0x05) -#define ADC_Channel_6 ((uint8_t)0x06) -#define ADC_Channel_7 ((uint8_t)0x07) -#define ADC_Channel_8 ((uint8_t)0x08) -#define ADC_Channel_9 ((uint8_t)0x09) -#define ADC_Channel_10 ((uint8_t)0x0A) -#define ADC_Channel_11 ((uint8_t)0x0B) -#define ADC_Channel_12 ((uint8_t)0x0C) -#define ADC_Channel_13 ((uint8_t)0x0D) -#define ADC_Channel_14 ((uint8_t)0x0E) -#define ADC_Channel_15 ((uint8_t)0x0F) -#define ADC_Channel_16 ((uint8_t)0x10) -#define ADC_Channel_17 ((uint8_t)0x11) - -#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) -#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) - -#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ - ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ - ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ - ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ - ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ - ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ - ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ - ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ - ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) -/** - * @} - */ - -/** @defgroup ADC_sampling_time - * @{ - */ - -#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) -#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) -#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) -#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) -#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) -#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) -#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) -#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) -#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ - ((TIME) == ADC_SampleTime_7Cycles5) || \ - ((TIME) == ADC_SampleTime_13Cycles5) || \ - ((TIME) == ADC_SampleTime_28Cycles5) || \ - ((TIME) == ADC_SampleTime_41Cycles5) || \ - ((TIME) == ADC_SampleTime_55Cycles5) || \ - ((TIME) == ADC_SampleTime_71Cycles5) || \ - ((TIME) == ADC_SampleTime_239Cycles5)) -/** - * @} - */ - -/** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion - * @{ - */ - -#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ -#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ - -#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ -#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ -#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ - -#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ -#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ - -#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ - ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) -/** - * @} - */ - -/** @defgroup ADC_injected_channel_selection - * @{ - */ - -#define ADC_InjectedChannel_1 ((uint8_t)0x14) -#define ADC_InjectedChannel_2 ((uint8_t)0x18) -#define ADC_InjectedChannel_3 ((uint8_t)0x1C) -#define ADC_InjectedChannel_4 ((uint8_t)0x20) -#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ - ((CHANNEL) == ADC_InjectedChannel_2) || \ - ((CHANNEL) == ADC_InjectedChannel_3) || \ - ((CHANNEL) == ADC_InjectedChannel_4)) -/** - * @} - */ - -/** @defgroup ADC_analog_watchdog_selection - * @{ - */ - -#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) -#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) -#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) -#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) -#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) -#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) -#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) - -#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ - ((WATCHDOG) == ADC_AnalogWatchdog_None)) -/** - * @} - */ - -/** @defgroup ADC_interrupts_definition - * @{ - */ - -#define ADC_IT_EOC ((uint16_t)0x0220) -#define ADC_IT_AWD ((uint16_t)0x0140) -#define ADC_IT_JEOC ((uint16_t)0x0480) - -#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) - -#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ - ((IT) == ADC_IT_JEOC)) -/** - * @} - */ - -/** @defgroup ADC_flags_definition - * @{ - */ - -#define ADC_FLAG_AWD ((uint8_t)0x01) -#define ADC_FLAG_EOC ((uint8_t)0x02) -#define ADC_FLAG_JEOC ((uint8_t)0x04) -#define ADC_FLAG_JSTRT ((uint8_t)0x08) -#define ADC_FLAG_STRT ((uint8_t)0x10) -#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) -#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ - ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ - ((FLAG) == ADC_FLAG_STRT)) -/** - * @} - */ - -/** @defgroup ADC_thresholds - * @{ - */ - -#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) - -/** - * @} - */ - -/** @defgroup ADC_injected_offset - * @{ - */ - -#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) - -/** - * @} - */ - -/** @defgroup ADC_injected_length - * @{ - */ - -#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) - -/** - * @} - */ - -/** @defgroup ADC_injected_rank - * @{ - */ - -#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) - -/** - * @} - */ - - -/** @defgroup ADC_regular_length - * @{ - */ - -#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) -/** - * @} - */ - -/** @defgroup ADC_regular_rank - * @{ - */ - -#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) - -/** - * @} - */ - -/** @defgroup ADC_regular_discontinuous_mode_number - * @{ - */ - -#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup ADC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Exported_Functions - * @{ - */ - -void ADC_DeInit(ADC_TypeDef* ADCx); -void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); -void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); -void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); -void ADC_ResetCalibration(ADC_TypeDef* ADCx); -FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); -void ADC_StartCalibration(ADC_TypeDef* ADCx); -FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); -void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); -void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); -void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); -void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); -uint32_t ADC_GetDualModeConversionValue(void); -void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); -void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); -FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); -void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); -void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); -void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); -uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); -void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); -void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); -void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); -void ADC_TempSensorVrefintCmd(FunctionalState NewState); -FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); -void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); -ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); -void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_ADC_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_adc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the ADC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_ADC_H +#define __STM32F10x_ADC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup ADC + * @{ + */ + +/** @defgroup ADC_Exported_Types + * @{ + */ + +/** + * @brief ADC Init structure definition + */ + +typedef struct +{ + uint32_t ADC_Mode; /*!< Configures the ADC to operate in independent or + dual mode. + This parameter can be a value of @ref ADC_mode */ + + FunctionalState ADC_ScanConvMode; /*!< Specifies whether the conversion is performed in + Scan (multichannels) or Single (one channel) mode. + This parameter can be set to ENABLE or DISABLE */ + + FunctionalState ADC_ContinuousConvMode; /*!< Specifies whether the conversion is performed in + Continuous or Single mode. + This parameter can be set to ENABLE or DISABLE. */ + + uint32_t ADC_ExternalTrigConv; /*!< Defines the external trigger used to start the analog + to digital conversion of regular channels. This parameter + can be a value of @ref ADC_external_trigger_sources_for_regular_channels_conversion */ + + uint32_t ADC_DataAlign; /*!< Specifies whether the ADC data alignment is left or right. + This parameter can be a value of @ref ADC_data_align */ + + uint8_t ADC_NbrOfChannel; /*!< Specifies the number of ADC channels that will be converted + using the sequencer for regular channel group. + This parameter must range from 1 to 16. */ +}ADC_InitTypeDef; +/** + * @} + */ + +/** @defgroup ADC_Exported_Constants + * @{ + */ + +#define IS_ADC_ALL_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ + ((PERIPH) == ADC2) || \ + ((PERIPH) == ADC3)) + +#define IS_ADC_DMA_PERIPH(PERIPH) (((PERIPH) == ADC1) || \ + ((PERIPH) == ADC3)) + +/** @defgroup ADC_mode + * @{ + */ + +#define ADC_Mode_Independent ((uint32_t)0x00000000) +#define ADC_Mode_RegInjecSimult ((uint32_t)0x00010000) +#define ADC_Mode_RegSimult_AlterTrig ((uint32_t)0x00020000) +#define ADC_Mode_InjecSimult_FastInterl ((uint32_t)0x00030000) +#define ADC_Mode_InjecSimult_SlowInterl ((uint32_t)0x00040000) +#define ADC_Mode_InjecSimult ((uint32_t)0x00050000) +#define ADC_Mode_RegSimult ((uint32_t)0x00060000) +#define ADC_Mode_FastInterl ((uint32_t)0x00070000) +#define ADC_Mode_SlowInterl ((uint32_t)0x00080000) +#define ADC_Mode_AlterTrig ((uint32_t)0x00090000) + +#define IS_ADC_MODE(MODE) (((MODE) == ADC_Mode_Independent) || \ + ((MODE) == ADC_Mode_RegInjecSimult) || \ + ((MODE) == ADC_Mode_RegSimult_AlterTrig) || \ + ((MODE) == ADC_Mode_InjecSimult_FastInterl) || \ + ((MODE) == ADC_Mode_InjecSimult_SlowInterl) || \ + ((MODE) == ADC_Mode_InjecSimult) || \ + ((MODE) == ADC_Mode_RegSimult) || \ + ((MODE) == ADC_Mode_FastInterl) || \ + ((MODE) == ADC_Mode_SlowInterl) || \ + ((MODE) == ADC_Mode_AlterTrig)) +/** + * @} + */ + +/** @defgroup ADC_external_trigger_sources_for_regular_channels_conversion + * @{ + */ + +#define ADC_ExternalTrigConv_T1_CC1 ((uint32_t)0x00000000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T1_CC2 ((uint32_t)0x00020000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T2_CC2 ((uint32_t)0x00060000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T3_TRGO ((uint32_t)0x00080000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_T4_CC4 ((uint32_t)0x000A0000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO ((uint32_t)0x000C0000) /*!< For ADC1 and ADC2 */ + +#define ADC_ExternalTrigConv_T1_CC3 ((uint32_t)0x00040000) /*!< For ADC1, ADC2 and ADC3 */ +#define ADC_ExternalTrigConv_None ((uint32_t)0x000E0000) /*!< For ADC1, ADC2 and ADC3 */ + +#define ADC_ExternalTrigConv_T3_CC1 ((uint32_t)0x00000000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T2_CC3 ((uint32_t)0x00020000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T8_CC1 ((uint32_t)0x00060000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T8_TRGO ((uint32_t)0x00080000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T5_CC1 ((uint32_t)0x000A0000) /*!< For ADC3 only */ +#define ADC_ExternalTrigConv_T5_CC3 ((uint32_t)0x000C0000) /*!< For ADC3 only */ + +#define IS_ADC_EXT_TRIG(REGTRIG) (((REGTRIG) == ADC_ExternalTrigConv_T1_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T1_CC2) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T1_CC3) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T2_CC2) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T3_TRGO) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T4_CC4) || \ + ((REGTRIG) == ADC_ExternalTrigConv_Ext_IT11_TIM8_TRGO) || \ + ((REGTRIG) == ADC_ExternalTrigConv_None) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T3_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T2_CC3) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T8_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T8_TRGO) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T5_CC1) || \ + ((REGTRIG) == ADC_ExternalTrigConv_T5_CC3)) +/** + * @} + */ + +/** @defgroup ADC_data_align + * @{ + */ + +#define ADC_DataAlign_Right ((uint32_t)0x00000000) +#define ADC_DataAlign_Left ((uint32_t)0x00000800) +#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DataAlign_Right) || \ + ((ALIGN) == ADC_DataAlign_Left)) +/** + * @} + */ + +/** @defgroup ADC_channels + * @{ + */ + +#define ADC_Channel_0 ((uint8_t)0x00) +#define ADC_Channel_1 ((uint8_t)0x01) +#define ADC_Channel_2 ((uint8_t)0x02) +#define ADC_Channel_3 ((uint8_t)0x03) +#define ADC_Channel_4 ((uint8_t)0x04) +#define ADC_Channel_5 ((uint8_t)0x05) +#define ADC_Channel_6 ((uint8_t)0x06) +#define ADC_Channel_7 ((uint8_t)0x07) +#define ADC_Channel_8 ((uint8_t)0x08) +#define ADC_Channel_9 ((uint8_t)0x09) +#define ADC_Channel_10 ((uint8_t)0x0A) +#define ADC_Channel_11 ((uint8_t)0x0B) +#define ADC_Channel_12 ((uint8_t)0x0C) +#define ADC_Channel_13 ((uint8_t)0x0D) +#define ADC_Channel_14 ((uint8_t)0x0E) +#define ADC_Channel_15 ((uint8_t)0x0F) +#define ADC_Channel_16 ((uint8_t)0x10) +#define ADC_Channel_17 ((uint8_t)0x11) + +#define ADC_Channel_TempSensor ((uint8_t)ADC_Channel_16) +#define ADC_Channel_Vrefint ((uint8_t)ADC_Channel_17) + +#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_Channel_0) || ((CHANNEL) == ADC_Channel_1) || \ + ((CHANNEL) == ADC_Channel_2) || ((CHANNEL) == ADC_Channel_3) || \ + ((CHANNEL) == ADC_Channel_4) || ((CHANNEL) == ADC_Channel_5) || \ + ((CHANNEL) == ADC_Channel_6) || ((CHANNEL) == ADC_Channel_7) || \ + ((CHANNEL) == ADC_Channel_8) || ((CHANNEL) == ADC_Channel_9) || \ + ((CHANNEL) == ADC_Channel_10) || ((CHANNEL) == ADC_Channel_11) || \ + ((CHANNEL) == ADC_Channel_12) || ((CHANNEL) == ADC_Channel_13) || \ + ((CHANNEL) == ADC_Channel_14) || ((CHANNEL) == ADC_Channel_15) || \ + ((CHANNEL) == ADC_Channel_16) || ((CHANNEL) == ADC_Channel_17)) +/** + * @} + */ + +/** @defgroup ADC_sampling_time + * @{ + */ + +#define ADC_SampleTime_1Cycles5 ((uint8_t)0x00) +#define ADC_SampleTime_7Cycles5 ((uint8_t)0x01) +#define ADC_SampleTime_13Cycles5 ((uint8_t)0x02) +#define ADC_SampleTime_28Cycles5 ((uint8_t)0x03) +#define ADC_SampleTime_41Cycles5 ((uint8_t)0x04) +#define ADC_SampleTime_55Cycles5 ((uint8_t)0x05) +#define ADC_SampleTime_71Cycles5 ((uint8_t)0x06) +#define ADC_SampleTime_239Cycles5 ((uint8_t)0x07) +#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SampleTime_1Cycles5) || \ + ((TIME) == ADC_SampleTime_7Cycles5) || \ + ((TIME) == ADC_SampleTime_13Cycles5) || \ + ((TIME) == ADC_SampleTime_28Cycles5) || \ + ((TIME) == ADC_SampleTime_41Cycles5) || \ + ((TIME) == ADC_SampleTime_55Cycles5) || \ + ((TIME) == ADC_SampleTime_71Cycles5) || \ + ((TIME) == ADC_SampleTime_239Cycles5)) +/** + * @} + */ + +/** @defgroup ADC_external_trigger_sources_for_injected_channels_conversion + * @{ + */ + +#define ADC_ExternalTrigInjecConv_T2_TRGO ((uint32_t)0x00002000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_T2_CC1 ((uint32_t)0x00003000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_T3_CC4 ((uint32_t)0x00004000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_T4_TRGO ((uint32_t)0x00005000) /*!< For ADC1 and ADC2 */ +#define ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4 ((uint32_t)0x00006000) /*!< For ADC1 and ADC2 */ + +#define ADC_ExternalTrigInjecConv_T1_TRGO ((uint32_t)0x00000000) /*!< For ADC1, ADC2 and ADC3 */ +#define ADC_ExternalTrigInjecConv_T1_CC4 ((uint32_t)0x00001000) /*!< For ADC1, ADC2 and ADC3 */ +#define ADC_ExternalTrigInjecConv_None ((uint32_t)0x00007000) /*!< For ADC1, ADC2 and ADC3 */ + +#define ADC_ExternalTrigInjecConv_T4_CC3 ((uint32_t)0x00002000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T8_CC2 ((uint32_t)0x00003000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T8_CC4 ((uint32_t)0x00004000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T5_TRGO ((uint32_t)0x00005000) /*!< For ADC3 only */ +#define ADC_ExternalTrigInjecConv_T5_CC4 ((uint32_t)0x00006000) /*!< For ADC3 only */ + +#define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_ExternalTrigInjecConv_T1_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T1_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T2_CC1) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T3_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_None) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T4_CC3) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC2) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T8_CC4) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_TRGO) || \ + ((INJTRIG) == ADC_ExternalTrigInjecConv_T5_CC4)) +/** + * @} + */ + +/** @defgroup ADC_injected_channel_selection + * @{ + */ + +#define ADC_InjectedChannel_1 ((uint8_t)0x14) +#define ADC_InjectedChannel_2 ((uint8_t)0x18) +#define ADC_InjectedChannel_3 ((uint8_t)0x1C) +#define ADC_InjectedChannel_4 ((uint8_t)0x20) +#define IS_ADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) == ADC_InjectedChannel_1) || \ + ((CHANNEL) == ADC_InjectedChannel_2) || \ + ((CHANNEL) == ADC_InjectedChannel_3) || \ + ((CHANNEL) == ADC_InjectedChannel_4)) +/** + * @} + */ + +/** @defgroup ADC_analog_watchdog_selection + * @{ + */ + +#define ADC_AnalogWatchdog_SingleRegEnable ((uint32_t)0x00800200) +#define ADC_AnalogWatchdog_SingleInjecEnable ((uint32_t)0x00400200) +#define ADC_AnalogWatchdog_SingleRegOrInjecEnable ((uint32_t)0x00C00200) +#define ADC_AnalogWatchdog_AllRegEnable ((uint32_t)0x00800000) +#define ADC_AnalogWatchdog_AllInjecEnable ((uint32_t)0x00400000) +#define ADC_AnalogWatchdog_AllRegAllInjecEnable ((uint32_t)0x00C00000) +#define ADC_AnalogWatchdog_None ((uint32_t)0x00000000) + +#define IS_ADC_ANALOG_WATCHDOG(WATCHDOG) (((WATCHDOG) == ADC_AnalogWatchdog_SingleRegEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_SingleInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_SingleRegOrInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_AllRegEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_AllInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_AllRegAllInjecEnable) || \ + ((WATCHDOG) == ADC_AnalogWatchdog_None)) +/** + * @} + */ + +/** @defgroup ADC_interrupts_definition + * @{ + */ + +#define ADC_IT_EOC ((uint16_t)0x0220) +#define ADC_IT_AWD ((uint16_t)0x0140) +#define ADC_IT_JEOC ((uint16_t)0x0480) + +#define IS_ADC_IT(IT) ((((IT) & (uint16_t)0xF81F) == 0x00) && ((IT) != 0x00)) + +#define IS_ADC_GET_IT(IT) (((IT) == ADC_IT_EOC) || ((IT) == ADC_IT_AWD) || \ + ((IT) == ADC_IT_JEOC)) +/** + * @} + */ + +/** @defgroup ADC_flags_definition + * @{ + */ + +#define ADC_FLAG_AWD ((uint8_t)0x01) +#define ADC_FLAG_EOC ((uint8_t)0x02) +#define ADC_FLAG_JEOC ((uint8_t)0x04) +#define ADC_FLAG_JSTRT ((uint8_t)0x08) +#define ADC_FLAG_STRT ((uint8_t)0x10) +#define IS_ADC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint8_t)0xE0) == 0x00) && ((FLAG) != 0x00)) +#define IS_ADC_GET_FLAG(FLAG) (((FLAG) == ADC_FLAG_AWD) || ((FLAG) == ADC_FLAG_EOC) || \ + ((FLAG) == ADC_FLAG_JEOC) || ((FLAG)== ADC_FLAG_JSTRT) || \ + ((FLAG) == ADC_FLAG_STRT)) +/** + * @} + */ + +/** @defgroup ADC_thresholds + * @{ + */ + +#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFF) + +/** + * @} + */ + +/** @defgroup ADC_injected_offset + * @{ + */ + +#define IS_ADC_OFFSET(OFFSET) ((OFFSET) <= 0xFFF) + +/** + * @} + */ + +/** @defgroup ADC_injected_length + * @{ + */ + +#define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x4)) + +/** + * @} + */ + +/** @defgroup ADC_injected_rank + * @{ + */ + +#define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x4)) + +/** + * @} + */ + + +/** @defgroup ADC_regular_length + * @{ + */ + +#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 0x1) && ((LENGTH) <= 0x10)) +/** + * @} + */ + +/** @defgroup ADC_regular_rank + * @{ + */ + +#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 0x1) && ((RANK) <= 0x10)) + +/** + * @} + */ + +/** @defgroup ADC_regular_discontinuous_mode_number + * @{ + */ + +#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 0x1) && ((NUMBER) <= 0x8)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup ADC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Exported_Functions + * @{ + */ + +void ADC_DeInit(ADC_TypeDef* ADCx); +void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct); +void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct); +void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState); +void ADC_ResetCalibration(ADC_TypeDef* ADCx); +FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx); +void ADC_StartCalibration(ADC_TypeDef* ADCx); +FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx); +void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx); +void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number); +void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); +void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx); +uint32_t ADC_GetDualModeConversionValue(void); +void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv); +void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState); +FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx); +void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime); +void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length); +void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset); +uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel); +void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog); +void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, uint16_t LowThreshold); +void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel); +void ADC_TempSensorVrefintCmd(FunctionalState NewState); +FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); +void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG); +ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT); +void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_ADC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h index 275c5e1f..b620753e 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_bkp.h @@ -1,195 +1,195 @@ -/** - ****************************************************************************** - * @file stm32f10x_bkp.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the BKP firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_BKP_H -#define __STM32F10x_BKP_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup BKP - * @{ - */ - -/** @defgroup BKP_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Exported_Constants - * @{ - */ - -/** @defgroup Tamper_Pin_active_level - * @{ - */ - -#define BKP_TamperPinLevel_High ((uint16_t)0x0000) -#define BKP_TamperPinLevel_Low ((uint16_t)0x0001) -#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ - ((LEVEL) == BKP_TamperPinLevel_Low)) -/** - * @} - */ - -/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin - * @{ - */ - -#define BKP_RTCOutputSource_None ((uint16_t)0x0000) -#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) -#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) -#define BKP_RTCOutputSource_Second ((uint16_t)0x0300) -#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ - ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \ - ((SOURCE) == BKP_RTCOutputSource_Alarm) || \ - ((SOURCE) == BKP_RTCOutputSource_Second)) -/** - * @} - */ - -/** @defgroup Data_Backup_Register - * @{ - */ - -#define BKP_DR1 ((uint16_t)0x0004) -#define BKP_DR2 ((uint16_t)0x0008) -#define BKP_DR3 ((uint16_t)0x000C) -#define BKP_DR4 ((uint16_t)0x0010) -#define BKP_DR5 ((uint16_t)0x0014) -#define BKP_DR6 ((uint16_t)0x0018) -#define BKP_DR7 ((uint16_t)0x001C) -#define BKP_DR8 ((uint16_t)0x0020) -#define BKP_DR9 ((uint16_t)0x0024) -#define BKP_DR10 ((uint16_t)0x0028) -#define BKP_DR11 ((uint16_t)0x0040) -#define BKP_DR12 ((uint16_t)0x0044) -#define BKP_DR13 ((uint16_t)0x0048) -#define BKP_DR14 ((uint16_t)0x004C) -#define BKP_DR15 ((uint16_t)0x0050) -#define BKP_DR16 ((uint16_t)0x0054) -#define BKP_DR17 ((uint16_t)0x0058) -#define BKP_DR18 ((uint16_t)0x005C) -#define BKP_DR19 ((uint16_t)0x0060) -#define BKP_DR20 ((uint16_t)0x0064) -#define BKP_DR21 ((uint16_t)0x0068) -#define BKP_DR22 ((uint16_t)0x006C) -#define BKP_DR23 ((uint16_t)0x0070) -#define BKP_DR24 ((uint16_t)0x0074) -#define BKP_DR25 ((uint16_t)0x0078) -#define BKP_DR26 ((uint16_t)0x007C) -#define BKP_DR27 ((uint16_t)0x0080) -#define BKP_DR28 ((uint16_t)0x0084) -#define BKP_DR29 ((uint16_t)0x0088) -#define BKP_DR30 ((uint16_t)0x008C) -#define BKP_DR31 ((uint16_t)0x0090) -#define BKP_DR32 ((uint16_t)0x0094) -#define BKP_DR33 ((uint16_t)0x0098) -#define BKP_DR34 ((uint16_t)0x009C) -#define BKP_DR35 ((uint16_t)0x00A0) -#define BKP_DR36 ((uint16_t)0x00A4) -#define BKP_DR37 ((uint16_t)0x00A8) -#define BKP_DR38 ((uint16_t)0x00AC) -#define BKP_DR39 ((uint16_t)0x00B0) -#define BKP_DR40 ((uint16_t)0x00B4) -#define BKP_DR41 ((uint16_t)0x00B8) -#define BKP_DR42 ((uint16_t)0x00BC) - -#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \ - ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \ - ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \ - ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \ - ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \ - ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \ - ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \ - ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \ - ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \ - ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \ - ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \ - ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \ - ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \ - ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42)) - -#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup BKP_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Exported_Functions - * @{ - */ - -void BKP_DeInit(void); -void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); -void BKP_TamperPinCmd(FunctionalState NewState); -void BKP_ITConfig(FunctionalState NewState); -void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); -void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); -void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); -uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); -FlagStatus BKP_GetFlagStatus(void); -void BKP_ClearFlag(void); -ITStatus BKP_GetITStatus(void); -void BKP_ClearITPendingBit(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_BKP_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_bkp.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the BKP firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_BKP_H +#define __STM32F10x_BKP_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup BKP + * @{ + */ + +/** @defgroup BKP_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Exported_Constants + * @{ + */ + +/** @defgroup Tamper_Pin_active_level + * @{ + */ + +#define BKP_TamperPinLevel_High ((uint16_t)0x0000) +#define BKP_TamperPinLevel_Low ((uint16_t)0x0001) +#define IS_BKP_TAMPER_PIN_LEVEL(LEVEL) (((LEVEL) == BKP_TamperPinLevel_High) || \ + ((LEVEL) == BKP_TamperPinLevel_Low)) +/** + * @} + */ + +/** @defgroup RTC_output_source_to_output_on_the_Tamper_pin + * @{ + */ + +#define BKP_RTCOutputSource_None ((uint16_t)0x0000) +#define BKP_RTCOutputSource_CalibClock ((uint16_t)0x0080) +#define BKP_RTCOutputSource_Alarm ((uint16_t)0x0100) +#define BKP_RTCOutputSource_Second ((uint16_t)0x0300) +#define IS_BKP_RTC_OUTPUT_SOURCE(SOURCE) (((SOURCE) == BKP_RTCOutputSource_None) || \ + ((SOURCE) == BKP_RTCOutputSource_CalibClock) || \ + ((SOURCE) == BKP_RTCOutputSource_Alarm) || \ + ((SOURCE) == BKP_RTCOutputSource_Second)) +/** + * @} + */ + +/** @defgroup Data_Backup_Register + * @{ + */ + +#define BKP_DR1 ((uint16_t)0x0004) +#define BKP_DR2 ((uint16_t)0x0008) +#define BKP_DR3 ((uint16_t)0x000C) +#define BKP_DR4 ((uint16_t)0x0010) +#define BKP_DR5 ((uint16_t)0x0014) +#define BKP_DR6 ((uint16_t)0x0018) +#define BKP_DR7 ((uint16_t)0x001C) +#define BKP_DR8 ((uint16_t)0x0020) +#define BKP_DR9 ((uint16_t)0x0024) +#define BKP_DR10 ((uint16_t)0x0028) +#define BKP_DR11 ((uint16_t)0x0040) +#define BKP_DR12 ((uint16_t)0x0044) +#define BKP_DR13 ((uint16_t)0x0048) +#define BKP_DR14 ((uint16_t)0x004C) +#define BKP_DR15 ((uint16_t)0x0050) +#define BKP_DR16 ((uint16_t)0x0054) +#define BKP_DR17 ((uint16_t)0x0058) +#define BKP_DR18 ((uint16_t)0x005C) +#define BKP_DR19 ((uint16_t)0x0060) +#define BKP_DR20 ((uint16_t)0x0064) +#define BKP_DR21 ((uint16_t)0x0068) +#define BKP_DR22 ((uint16_t)0x006C) +#define BKP_DR23 ((uint16_t)0x0070) +#define BKP_DR24 ((uint16_t)0x0074) +#define BKP_DR25 ((uint16_t)0x0078) +#define BKP_DR26 ((uint16_t)0x007C) +#define BKP_DR27 ((uint16_t)0x0080) +#define BKP_DR28 ((uint16_t)0x0084) +#define BKP_DR29 ((uint16_t)0x0088) +#define BKP_DR30 ((uint16_t)0x008C) +#define BKP_DR31 ((uint16_t)0x0090) +#define BKP_DR32 ((uint16_t)0x0094) +#define BKP_DR33 ((uint16_t)0x0098) +#define BKP_DR34 ((uint16_t)0x009C) +#define BKP_DR35 ((uint16_t)0x00A0) +#define BKP_DR36 ((uint16_t)0x00A4) +#define BKP_DR37 ((uint16_t)0x00A8) +#define BKP_DR38 ((uint16_t)0x00AC) +#define BKP_DR39 ((uint16_t)0x00B0) +#define BKP_DR40 ((uint16_t)0x00B4) +#define BKP_DR41 ((uint16_t)0x00B8) +#define BKP_DR42 ((uint16_t)0x00BC) + +#define IS_BKP_DR(DR) (((DR) == BKP_DR1) || ((DR) == BKP_DR2) || ((DR) == BKP_DR3) || \ + ((DR) == BKP_DR4) || ((DR) == BKP_DR5) || ((DR) == BKP_DR6) || \ + ((DR) == BKP_DR7) || ((DR) == BKP_DR8) || ((DR) == BKP_DR9) || \ + ((DR) == BKP_DR10) || ((DR) == BKP_DR11) || ((DR) == BKP_DR12) || \ + ((DR) == BKP_DR13) || ((DR) == BKP_DR14) || ((DR) == BKP_DR15) || \ + ((DR) == BKP_DR16) || ((DR) == BKP_DR17) || ((DR) == BKP_DR18) || \ + ((DR) == BKP_DR19) || ((DR) == BKP_DR20) || ((DR) == BKP_DR21) || \ + ((DR) == BKP_DR22) || ((DR) == BKP_DR23) || ((DR) == BKP_DR24) || \ + ((DR) == BKP_DR25) || ((DR) == BKP_DR26) || ((DR) == BKP_DR27) || \ + ((DR) == BKP_DR28) || ((DR) == BKP_DR29) || ((DR) == BKP_DR30) || \ + ((DR) == BKP_DR31) || ((DR) == BKP_DR32) || ((DR) == BKP_DR33) || \ + ((DR) == BKP_DR34) || ((DR) == BKP_DR35) || ((DR) == BKP_DR36) || \ + ((DR) == BKP_DR37) || ((DR) == BKP_DR38) || ((DR) == BKP_DR39) || \ + ((DR) == BKP_DR40) || ((DR) == BKP_DR41) || ((DR) == BKP_DR42)) + +#define IS_BKP_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x7F) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup BKP_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Exported_Functions + * @{ + */ + +void BKP_DeInit(void); +void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel); +void BKP_TamperPinCmd(FunctionalState NewState); +void BKP_ITConfig(FunctionalState NewState); +void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource); +void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue); +void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data); +uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR); +FlagStatus BKP_GetFlagStatus(void); +void BKP_ClearFlag(void); +ITStatus BKP_GetITStatus(void); +void BKP_ClearITPendingBit(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_BKP_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h index d185aa21..648f747c 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_can.h @@ -1,697 +1,697 @@ -/** - ****************************************************************************** - * @file stm32f10x_can.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the CAN firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CAN_H -#define __STM32F10x_CAN_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup CAN - * @{ - */ - -/** @defgroup CAN_Exported_Types - * @{ - */ - -#define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \ - ((PERIPH) == CAN2)) - -/** - * @brief CAN init structure definition - */ - -typedef struct -{ - uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum. - It ranges from 1 to 1024. */ - - uint8_t CAN_Mode; /*!< Specifies the CAN operating mode. - This parameter can be a value of - @ref CAN_operating_mode */ - - uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta - the CAN hardware is allowed to lengthen or - shorten a bit to perform resynchronization. - This parameter can be a value of - @ref CAN_synchronisation_jump_width */ - - uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit - Segment 1. This parameter can be a value of - @ref CAN_time_quantum_in_bit_segment_1 */ - - uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit - Segment 2. - This parameter can be a value of - @ref CAN_time_quantum_in_bit_segment_2 */ - - FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered - communication mode. This parameter can be set - either to ENABLE or DISABLE. */ - - FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off - management. This parameter can be set either - to ENABLE or DISABLE. */ - - FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode. - This parameter can be set either to ENABLE or - DISABLE. */ - - FunctionalState CAN_NART; /*!< Enable or disable the no-automatic - retransmission mode. This parameter can be - set either to ENABLE or DISABLE. */ - - FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode. - This parameter can be set either to ENABLE - or DISABLE. */ - - FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority. - This parameter can be set either to ENABLE - or DISABLE. */ -} CAN_InitTypeDef; - -/** - * @brief CAN filter init structure definition - */ - -typedef struct -{ - uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit - configuration, first one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit - configuration, second one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, - according to the mode (MSBs for a 32-bit configuration, - first one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, - according to the mode (LSBs for a 32-bit configuration, - second one for a 16-bit configuration). - This parameter can be a value between 0x0000 and 0xFFFF */ - - uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. - This parameter can be a value of @ref CAN_filter_FIFO */ - - uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */ - - uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized. - This parameter can be a value of @ref CAN_filter_mode */ - - uint8_t CAN_FilterScale; /*!< Specifies the filter scale. - This parameter can be a value of @ref CAN_filter_scale */ - - FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter. - This parameter can be set either to ENABLE or DISABLE. */ -} CAN_FilterInitTypeDef; - -/** - * @brief CAN Tx message structure definition - */ - -typedef struct -{ - uint32_t StdId; /*!< Specifies the standard identifier. - This parameter can be a value between 0 to 0x7FF. */ - - uint32_t ExtId; /*!< Specifies the extended identifier. - This parameter can be a value between 0 to 0x1FFFFFFF. */ - - uint8_t IDE; /*!< Specifies the type of identifier for the message that - will be transmitted. This parameter can be a value - of @ref CAN_identifier_type */ - - uint8_t RTR; /*!< Specifies the type of frame for the message that will - be transmitted. This parameter can be a value of - @ref CAN_remote_transmission_request */ - - uint8_t DLC; /*!< Specifies the length of the frame that will be - transmitted. This parameter can be a value between - 0 to 8 */ - - uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 - to 0xFF. */ -} CanTxMsg; - -/** - * @brief CAN Rx message structure definition - */ - -typedef struct -{ - uint32_t StdId; /*!< Specifies the standard identifier. - This parameter can be a value between 0 to 0x7FF. */ - - uint32_t ExtId; /*!< Specifies the extended identifier. - This parameter can be a value between 0 to 0x1FFFFFFF. */ - - uint8_t IDE; /*!< Specifies the type of identifier for the message that - will be received. This parameter can be a value of - @ref CAN_identifier_type */ - - uint8_t RTR; /*!< Specifies the type of frame for the received message. - This parameter can be a value of - @ref CAN_remote_transmission_request */ - - uint8_t DLC; /*!< Specifies the length of the frame that will be received. - This parameter can be a value between 0 to 8 */ - - uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to - 0xFF. */ - - uint8_t FMI; /*!< Specifies the index of the filter the message stored in - the mailbox passes through. This parameter can be a - value between 0 to 0xFF */ -} CanRxMsg; - -/** - * @} - */ - -/** @defgroup CAN_Exported_Constants - * @{ - */ - -/** @defgroup CAN_sleep_constants - * @{ - */ - -#define CAN_InitStatus_Failed ((uint8_t)0x00) /*!< CAN initialization failed */ -#define CAN_InitStatus_Success ((uint8_t)0x01) /*!< CAN initialization OK */ - -/** - * @} - */ - -/** @defgroup CAN_Mode - * @{ - */ - -#define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */ -#define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */ -#define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */ -#define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */ - -#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || \ - ((MODE) == CAN_Mode_LoopBack)|| \ - ((MODE) == CAN_Mode_Silent) || \ - ((MODE) == CAN_Mode_Silent_LoopBack)) -/** - * @} - */ - - -/** - * @defgroup CAN_Operating_Mode - * @{ - */ -#define CAN_OperatingMode_Initialization ((uint8_t)0x00) /*!< Initialization mode */ -#define CAN_OperatingMode_Normal ((uint8_t)0x01) /*!< Normal mode */ -#define CAN_OperatingMode_Sleep ((uint8_t)0x02) /*!< sleep mode */ - - -#define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ - ((MODE) == CAN_OperatingMode_Normal)|| \ - ((MODE) == CAN_OperatingMode_Sleep)) -/** - * @} - */ - -/** - * @defgroup CAN_Mode_Status - * @{ - */ - -#define CAN_ModeStatus_Failed ((uint8_t)0x00) /*!< CAN entering the specific mode failed */ -#define CAN_ModeStatus_Success ((uint8_t)!CAN_ModeStatus_Failed) /*!< CAN entering the specific mode Succeed */ - - -/** - * @} - */ - -/** @defgroup CAN_synchronisation_jump_width - * @{ - */ - -#define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */ -#define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */ -#define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */ -#define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */ - -#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \ - ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq)) -/** - * @} - */ - -/** @defgroup CAN_time_quantum_in_bit_segment_1 - * @{ - */ - -#define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */ -#define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */ -#define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */ -#define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */ -#define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */ -#define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */ -#define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */ -#define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */ -#define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */ -#define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */ -#define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */ -#define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */ -#define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */ -#define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */ -#define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */ -#define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */ - -#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq) -/** - * @} - */ - -/** @defgroup CAN_time_quantum_in_bit_segment_2 - * @{ - */ - -#define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */ -#define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */ -#define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */ -#define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */ -#define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */ -#define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */ -#define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */ -#define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */ - -#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq) - -/** - * @} - */ - -/** @defgroup CAN_clock_prescaler - * @{ - */ - -#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) - -/** - * @} - */ - -/** @defgroup CAN_filter_number - * @{ - */ -#ifndef STM32F10X_CL - #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13) -#else - #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) -#endif /* STM32F10X_CL */ -/** - * @} - */ - -/** @defgroup CAN_filter_mode - * @{ - */ - -#define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< identifier/mask mode */ -#define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */ - -#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \ - ((MODE) == CAN_FilterMode_IdList)) -/** - * @} - */ - -/** @defgroup CAN_filter_scale - * @{ - */ - -#define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */ -#define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */ - -#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \ - ((SCALE) == CAN_FilterScale_32bit)) - -/** - * @} - */ - -/** @defgroup CAN_filter_FIFO - * @{ - */ - -#define CAN_Filter_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ -#define CAN_Filter_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ -#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \ - ((FIFO) == CAN_FilterFIFO1)) -/** - * @} - */ - -/** @defgroup Start_bank_filter_for_slave_CAN - * @{ - */ -#define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27)) -/** - * @} - */ - -/** @defgroup CAN_Tx - * @{ - */ - -#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) -#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) -#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) -#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) - -/** - * @} - */ - -/** @defgroup CAN_identifier_type - * @{ - */ - -#define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */ -#define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */ -#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || \ - ((IDTYPE) == CAN_Id_Extended)) -/** - * @} - */ - -/** @defgroup CAN_remote_transmission_request - * @{ - */ - -#define CAN_RTR_Data ((uint32_t)0x00000000) /*!< Data frame */ -#define CAN_RTR_Remote ((uint32_t)0x00000002) /*!< Remote frame */ -#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote)) - -/** - * @} - */ - -/** @defgroup CAN_transmit_constants - * @{ - */ - -#define CAN_TxStatus_Failed ((uint8_t)0x00)/*!< CAN transmission failed */ -#define CAN_TxStatus_Ok ((uint8_t)0x01) /*!< CAN transmission succeeded */ -#define CAN_TxStatus_Pending ((uint8_t)0x02) /*!< CAN transmission pending */ -#define CAN_TxStatus_NoMailBox ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */ - -/** - * @} - */ - -/** @defgroup CAN_receive_FIFO_number_constants - * @{ - */ - -#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ -#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ - -#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) - -/** - * @} - */ - -/** @defgroup CAN_sleep_constants - * @{ - */ - -#define CAN_Sleep_Failed ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */ -#define CAN_Sleep_Ok ((uint8_t)0x01) /*!< CAN entered the sleep mode */ - -/** - * @} - */ - -/** @defgroup CAN_wake_up_constants - * @{ - */ - -#define CAN_WakeUp_Failed ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */ -#define CAN_WakeUp_Ok ((uint8_t)0x01) /*!< CAN leaved the sleep mode */ - -/** - * @} - */ - -/** - * @defgroup CAN_Error_Code_constants - * @{ - */ - -#define CAN_ErrorCode_NoErr ((uint8_t)0x00) /*!< No Error */ -#define CAN_ErrorCode_StuffErr ((uint8_t)0x10) /*!< Stuff Error */ -#define CAN_ErrorCode_FormErr ((uint8_t)0x20) /*!< Form Error */ -#define CAN_ErrorCode_ACKErr ((uint8_t)0x30) /*!< Acknowledgment Error */ -#define CAN_ErrorCode_BitRecessiveErr ((uint8_t)0x40) /*!< Bit Recessive Error */ -#define CAN_ErrorCode_BitDominantErr ((uint8_t)0x50) /*!< Bit Dominant Error */ -#define CAN_ErrorCode_CRCErr ((uint8_t)0x60) /*!< CRC Error */ -#define CAN_ErrorCode_SoftwareSetErr ((uint8_t)0x70) /*!< Software Set Error */ - - -/** - * @} - */ - -/** @defgroup CAN_flags - * @{ - */ -/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() - and CAN_ClearFlag() functions. */ -/* If the flag is 0x1XXXXXXX, it means that it can only be used with CAN_GetFlagStatus() function. */ - -/* Transmit Flags */ -#define CAN_FLAG_RQCP0 ((uint32_t)0x38000001) /*!< Request MailBox0 Flag */ -#define CAN_FLAG_RQCP1 ((uint32_t)0x38000100) /*!< Request MailBox1 Flag */ -#define CAN_FLAG_RQCP2 ((uint32_t)0x38010000) /*!< Request MailBox2 Flag */ - -/* Receive Flags */ -#define CAN_FLAG_FMP0 ((uint32_t)0x12000003) /*!< FIFO 0 Message Pending Flag */ -#define CAN_FLAG_FF0 ((uint32_t)0x32000008) /*!< FIFO 0 Full Flag */ -#define CAN_FLAG_FOV0 ((uint32_t)0x32000010) /*!< FIFO 0 Overrun Flag */ -#define CAN_FLAG_FMP1 ((uint32_t)0x14000003) /*!< FIFO 1 Message Pending Flag */ -#define CAN_FLAG_FF1 ((uint32_t)0x34000008) /*!< FIFO 1 Full Flag */ -#define CAN_FLAG_FOV1 ((uint32_t)0x34000010) /*!< FIFO 1 Overrun Flag */ - -/* Operating Mode Flags */ -#define CAN_FLAG_WKU ((uint32_t)0x31000008) /*!< Wake up Flag */ -#define CAN_FLAG_SLAK ((uint32_t)0x31000012) /*!< Sleep acknowledge Flag */ -/* Note: When SLAK intterupt is disabled (SLKIE=0), no polling on SLAKI is possible. - In this case the SLAK bit can be polled.*/ - -/* Error Flags */ -#define CAN_FLAG_EWG ((uint32_t)0x10F00001) /*!< Error Warning Flag */ -#define CAN_FLAG_EPV ((uint32_t)0x10F00002) /*!< Error Passive Flag */ -#define CAN_FLAG_BOF ((uint32_t)0x10F00004) /*!< Bus-Off Flag */ -#define CAN_FLAG_LEC ((uint32_t)0x30F00070) /*!< Last error code Flag */ - -#define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_BOF) || \ - ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \ - ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \ - ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FMP0) || \ - ((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \ - ((FLAG) == CAN_FLAG_FMP1) || ((FLAG) == CAN_FLAG_RQCP2) || \ - ((FLAG) == CAN_FLAG_RQCP1)|| ((FLAG) == CAN_FLAG_RQCP0) || \ - ((FLAG) == CAN_FLAG_SLAK )) - -#define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_RQCP2) || \ - ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \ - ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) ||\ - ((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \ - ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_SLAK)) -/** - * @} - */ - - -/** @defgroup CAN_interrupts - * @{ - */ - - - -#define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty Interrupt*/ - -/* Receive Interrupts */ -#define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending Interrupt*/ -#define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full Interrupt*/ -#define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun Interrupt*/ -#define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending Interrupt*/ -#define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full Interrupt*/ -#define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun Interrupt*/ - -/* Operating Mode Interrupts */ -#define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up Interrupt*/ -#define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep acknowledge Interrupt*/ - -/* Error Interrupts */ -#define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning Interrupt*/ -#define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive Interrupt*/ -#define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off Interrupt*/ -#define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code Interrupt*/ -#define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error Interrupt*/ - -/* Flags named as Interrupts : kept only for FW compatibility */ -#define CAN_IT_RQCP0 CAN_IT_TME -#define CAN_IT_RQCP1 CAN_IT_TME -#define CAN_IT_RQCP2 CAN_IT_TME - - -#define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\ - ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\ - ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\ - ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ - ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ - ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ - ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) - -#define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\ - ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\ - ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\ - ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ - ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ - ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) - -/** - * @} - */ - -/** @defgroup CAN_Legacy - * @{ - */ -#define CANINITFAILED CAN_InitStatus_Failed -#define CANINITOK CAN_InitStatus_Success -#define CAN_FilterFIFO0 CAN_Filter_FIFO0 -#define CAN_FilterFIFO1 CAN_Filter_FIFO1 -#define CAN_ID_STD CAN_Id_Standard -#define CAN_ID_EXT CAN_Id_Extended -#define CAN_RTR_DATA CAN_RTR_Data -#define CAN_RTR_REMOTE CAN_RTR_Remote -#define CANTXFAILE CAN_TxStatus_Failed -#define CANTXOK CAN_TxStatus_Ok -#define CANTXPENDING CAN_TxStatus_Pending -#define CAN_NO_MB CAN_TxStatus_NoMailBox -#define CANSLEEPFAILED CAN_Sleep_Failed -#define CANSLEEPOK CAN_Sleep_Ok -#define CANWAKEUPFAILED CAN_WakeUp_Failed -#define CANWAKEUPOK CAN_WakeUp_Ok - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup CAN_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Exported_Functions - * @{ - */ -/* Function used to set the CAN configuration to the default reset state *****/ -void CAN_DeInit(CAN_TypeDef* CANx); - -/* Initialization and Configuration functions *********************************/ -uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct); -void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct); -void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct); -void CAN_SlaveStartBank(uint8_t CAN_BankNumber); -void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState); -void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState); - -/* Transmit functions *********************************************************/ -uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage); -uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox); -void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox); - -/* Receive functions **********************************************************/ -void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage); -void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber); -uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber); - - -/* Operation modes functions **************************************************/ -uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode); -uint8_t CAN_Sleep(CAN_TypeDef* CANx); -uint8_t CAN_WakeUp(CAN_TypeDef* CANx); - -/* Error management functions *************************************************/ -uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx); -uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx); -uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx); - -/* Interrupts and flags management functions **********************************/ -void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState); -FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG); -void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG); -ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT); -void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_CAN_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_can.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the CAN firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CAN_H +#define __STM32F10x_CAN_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup CAN + * @{ + */ + +/** @defgroup CAN_Exported_Types + * @{ + */ + +#define IS_CAN_ALL_PERIPH(PERIPH) (((PERIPH) == CAN1) || \ + ((PERIPH) == CAN2)) + +/** + * @brief CAN init structure definition + */ + +typedef struct +{ + uint16_t CAN_Prescaler; /*!< Specifies the length of a time quantum. + It ranges from 1 to 1024. */ + + uint8_t CAN_Mode; /*!< Specifies the CAN operating mode. + This parameter can be a value of + @ref CAN_operating_mode */ + + uint8_t CAN_SJW; /*!< Specifies the maximum number of time quanta + the CAN hardware is allowed to lengthen or + shorten a bit to perform resynchronization. + This parameter can be a value of + @ref CAN_synchronisation_jump_width */ + + uint8_t CAN_BS1; /*!< Specifies the number of time quanta in Bit + Segment 1. This parameter can be a value of + @ref CAN_time_quantum_in_bit_segment_1 */ + + uint8_t CAN_BS2; /*!< Specifies the number of time quanta in Bit + Segment 2. + This parameter can be a value of + @ref CAN_time_quantum_in_bit_segment_2 */ + + FunctionalState CAN_TTCM; /*!< Enable or disable the time triggered + communication mode. This parameter can be set + either to ENABLE or DISABLE. */ + + FunctionalState CAN_ABOM; /*!< Enable or disable the automatic bus-off + management. This parameter can be set either + to ENABLE or DISABLE. */ + + FunctionalState CAN_AWUM; /*!< Enable or disable the automatic wake-up mode. + This parameter can be set either to ENABLE or + DISABLE. */ + + FunctionalState CAN_NART; /*!< Enable or disable the no-automatic + retransmission mode. This parameter can be + set either to ENABLE or DISABLE. */ + + FunctionalState CAN_RFLM; /*!< Enable or disable the Receive FIFO Locked mode. + This parameter can be set either to ENABLE + or DISABLE. */ + + FunctionalState CAN_TXFP; /*!< Enable or disable the transmit FIFO priority. + This parameter can be set either to ENABLE + or DISABLE. */ +} CAN_InitTypeDef; + +/** + * @brief CAN filter init structure definition + */ + +typedef struct +{ + uint16_t CAN_FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit + configuration, first one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit + configuration, second one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, + according to the mode (MSBs for a 32-bit configuration, + first one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, + according to the mode (LSBs for a 32-bit configuration, + second one for a 16-bit configuration). + This parameter can be a value between 0x0000 and 0xFFFF */ + + uint16_t CAN_FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. + This parameter can be a value of @ref CAN_filter_FIFO */ + + uint8_t CAN_FilterNumber; /*!< Specifies the filter which will be initialized. It ranges from 0 to 13. */ + + uint8_t CAN_FilterMode; /*!< Specifies the filter mode to be initialized. + This parameter can be a value of @ref CAN_filter_mode */ + + uint8_t CAN_FilterScale; /*!< Specifies the filter scale. + This parameter can be a value of @ref CAN_filter_scale */ + + FunctionalState CAN_FilterActivation; /*!< Enable or disable the filter. + This parameter can be set either to ENABLE or DISABLE. */ +} CAN_FilterInitTypeDef; + +/** + * @brief CAN Tx message structure definition + */ + +typedef struct +{ + uint32_t StdId; /*!< Specifies the standard identifier. + This parameter can be a value between 0 to 0x7FF. */ + + uint32_t ExtId; /*!< Specifies the extended identifier. + This parameter can be a value between 0 to 0x1FFFFFFF. */ + + uint8_t IDE; /*!< Specifies the type of identifier for the message that + will be transmitted. This parameter can be a value + of @ref CAN_identifier_type */ + + uint8_t RTR; /*!< Specifies the type of frame for the message that will + be transmitted. This parameter can be a value of + @ref CAN_remote_transmission_request */ + + uint8_t DLC; /*!< Specifies the length of the frame that will be + transmitted. This parameter can be a value between + 0 to 8 */ + + uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0 + to 0xFF. */ +} CanTxMsg; + +/** + * @brief CAN Rx message structure definition + */ + +typedef struct +{ + uint32_t StdId; /*!< Specifies the standard identifier. + This parameter can be a value between 0 to 0x7FF. */ + + uint32_t ExtId; /*!< Specifies the extended identifier. + This parameter can be a value between 0 to 0x1FFFFFFF. */ + + uint8_t IDE; /*!< Specifies the type of identifier for the message that + will be received. This parameter can be a value of + @ref CAN_identifier_type */ + + uint8_t RTR; /*!< Specifies the type of frame for the received message. + This parameter can be a value of + @ref CAN_remote_transmission_request */ + + uint8_t DLC; /*!< Specifies the length of the frame that will be received. + This parameter can be a value between 0 to 8 */ + + uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to + 0xFF. */ + + uint8_t FMI; /*!< Specifies the index of the filter the message stored in + the mailbox passes through. This parameter can be a + value between 0 to 0xFF */ +} CanRxMsg; + +/** + * @} + */ + +/** @defgroup CAN_Exported_Constants + * @{ + */ + +/** @defgroup CAN_sleep_constants + * @{ + */ + +#define CAN_InitStatus_Failed ((uint8_t)0x00) /*!< CAN initialization failed */ +#define CAN_InitStatus_Success ((uint8_t)0x01) /*!< CAN initialization OK */ + +/** + * @} + */ + +/** @defgroup CAN_Mode + * @{ + */ + +#define CAN_Mode_Normal ((uint8_t)0x00) /*!< normal mode */ +#define CAN_Mode_LoopBack ((uint8_t)0x01) /*!< loopback mode */ +#define CAN_Mode_Silent ((uint8_t)0x02) /*!< silent mode */ +#define CAN_Mode_Silent_LoopBack ((uint8_t)0x03) /*!< loopback combined with silent mode */ + +#define IS_CAN_MODE(MODE) (((MODE) == CAN_Mode_Normal) || \ + ((MODE) == CAN_Mode_LoopBack)|| \ + ((MODE) == CAN_Mode_Silent) || \ + ((MODE) == CAN_Mode_Silent_LoopBack)) +/** + * @} + */ + + +/** + * @defgroup CAN_Operating_Mode + * @{ + */ +#define CAN_OperatingMode_Initialization ((uint8_t)0x00) /*!< Initialization mode */ +#define CAN_OperatingMode_Normal ((uint8_t)0x01) /*!< Normal mode */ +#define CAN_OperatingMode_Sleep ((uint8_t)0x02) /*!< sleep mode */ + + +#define IS_CAN_OPERATING_MODE(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ + ((MODE) == CAN_OperatingMode_Normal)|| \ + ((MODE) == CAN_OperatingMode_Sleep)) +/** + * @} + */ + +/** + * @defgroup CAN_Mode_Status + * @{ + */ + +#define CAN_ModeStatus_Failed ((uint8_t)0x00) /*!< CAN entering the specific mode failed */ +#define CAN_ModeStatus_Success ((uint8_t)!CAN_ModeStatus_Failed) /*!< CAN entering the specific mode Succeed */ + + +/** + * @} + */ + +/** @defgroup CAN_synchronisation_jump_width + * @{ + */ + +#define CAN_SJW_1tq ((uint8_t)0x00) /*!< 1 time quantum */ +#define CAN_SJW_2tq ((uint8_t)0x01) /*!< 2 time quantum */ +#define CAN_SJW_3tq ((uint8_t)0x02) /*!< 3 time quantum */ +#define CAN_SJW_4tq ((uint8_t)0x03) /*!< 4 time quantum */ + +#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1tq) || ((SJW) == CAN_SJW_2tq)|| \ + ((SJW) == CAN_SJW_3tq) || ((SJW) == CAN_SJW_4tq)) +/** + * @} + */ + +/** @defgroup CAN_time_quantum_in_bit_segment_1 + * @{ + */ + +#define CAN_BS1_1tq ((uint8_t)0x00) /*!< 1 time quantum */ +#define CAN_BS1_2tq ((uint8_t)0x01) /*!< 2 time quantum */ +#define CAN_BS1_3tq ((uint8_t)0x02) /*!< 3 time quantum */ +#define CAN_BS1_4tq ((uint8_t)0x03) /*!< 4 time quantum */ +#define CAN_BS1_5tq ((uint8_t)0x04) /*!< 5 time quantum */ +#define CAN_BS1_6tq ((uint8_t)0x05) /*!< 6 time quantum */ +#define CAN_BS1_7tq ((uint8_t)0x06) /*!< 7 time quantum */ +#define CAN_BS1_8tq ((uint8_t)0x07) /*!< 8 time quantum */ +#define CAN_BS1_9tq ((uint8_t)0x08) /*!< 9 time quantum */ +#define CAN_BS1_10tq ((uint8_t)0x09) /*!< 10 time quantum */ +#define CAN_BS1_11tq ((uint8_t)0x0A) /*!< 11 time quantum */ +#define CAN_BS1_12tq ((uint8_t)0x0B) /*!< 12 time quantum */ +#define CAN_BS1_13tq ((uint8_t)0x0C) /*!< 13 time quantum */ +#define CAN_BS1_14tq ((uint8_t)0x0D) /*!< 14 time quantum */ +#define CAN_BS1_15tq ((uint8_t)0x0E) /*!< 15 time quantum */ +#define CAN_BS1_16tq ((uint8_t)0x0F) /*!< 16 time quantum */ + +#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16tq) +/** + * @} + */ + +/** @defgroup CAN_time_quantum_in_bit_segment_2 + * @{ + */ + +#define CAN_BS2_1tq ((uint8_t)0x00) /*!< 1 time quantum */ +#define CAN_BS2_2tq ((uint8_t)0x01) /*!< 2 time quantum */ +#define CAN_BS2_3tq ((uint8_t)0x02) /*!< 3 time quantum */ +#define CAN_BS2_4tq ((uint8_t)0x03) /*!< 4 time quantum */ +#define CAN_BS2_5tq ((uint8_t)0x04) /*!< 5 time quantum */ +#define CAN_BS2_6tq ((uint8_t)0x05) /*!< 6 time quantum */ +#define CAN_BS2_7tq ((uint8_t)0x06) /*!< 7 time quantum */ +#define CAN_BS2_8tq ((uint8_t)0x07) /*!< 8 time quantum */ + +#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8tq) + +/** + * @} + */ + +/** @defgroup CAN_clock_prescaler + * @{ + */ + +#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) + +/** + * @} + */ + +/** @defgroup CAN_filter_number + * @{ + */ +#ifndef STM32F10X_CL + #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 13) +#else + #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) +#endif /* STM32F10X_CL */ +/** + * @} + */ + +/** @defgroup CAN_filter_mode + * @{ + */ + +#define CAN_FilterMode_IdMask ((uint8_t)0x00) /*!< identifier/mask mode */ +#define CAN_FilterMode_IdList ((uint8_t)0x01) /*!< identifier list mode */ + +#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FilterMode_IdMask) || \ + ((MODE) == CAN_FilterMode_IdList)) +/** + * @} + */ + +/** @defgroup CAN_filter_scale + * @{ + */ + +#define CAN_FilterScale_16bit ((uint8_t)0x00) /*!< Two 16-bit filters */ +#define CAN_FilterScale_32bit ((uint8_t)0x01) /*!< One 32-bit filter */ + +#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FilterScale_16bit) || \ + ((SCALE) == CAN_FilterScale_32bit)) + +/** + * @} + */ + +/** @defgroup CAN_filter_FIFO + * @{ + */ + +#define CAN_Filter_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ +#define CAN_Filter_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ +#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FilterFIFO0) || \ + ((FIFO) == CAN_FilterFIFO1)) +/** + * @} + */ + +/** @defgroup Start_bank_filter_for_slave_CAN + * @{ + */ +#define IS_CAN_BANKNUMBER(BANKNUMBER) (((BANKNUMBER) >= 1) && ((BANKNUMBER) <= 27)) +/** + * @} + */ + +/** @defgroup CAN_Tx + * @{ + */ + +#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) +#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) +#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) +#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) + +/** + * @} + */ + +/** @defgroup CAN_identifier_type + * @{ + */ + +#define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */ +#define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */ +#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || \ + ((IDTYPE) == CAN_Id_Extended)) +/** + * @} + */ + +/** @defgroup CAN_remote_transmission_request + * @{ + */ + +#define CAN_RTR_Data ((uint32_t)0x00000000) /*!< Data frame */ +#define CAN_RTR_Remote ((uint32_t)0x00000002) /*!< Remote frame */ +#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote)) + +/** + * @} + */ + +/** @defgroup CAN_transmit_constants + * @{ + */ + +#define CAN_TxStatus_Failed ((uint8_t)0x00)/*!< CAN transmission failed */ +#define CAN_TxStatus_Ok ((uint8_t)0x01) /*!< CAN transmission succeeded */ +#define CAN_TxStatus_Pending ((uint8_t)0x02) /*!< CAN transmission pending */ +#define CAN_TxStatus_NoMailBox ((uint8_t)0x04) /*!< CAN cell did not provide an empty mailbox */ + +/** + * @} + */ + +/** @defgroup CAN_receive_FIFO_number_constants + * @{ + */ + +#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ +#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ + +#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) + +/** + * @} + */ + +/** @defgroup CAN_sleep_constants + * @{ + */ + +#define CAN_Sleep_Failed ((uint8_t)0x00) /*!< CAN did not enter the sleep mode */ +#define CAN_Sleep_Ok ((uint8_t)0x01) /*!< CAN entered the sleep mode */ + +/** + * @} + */ + +/** @defgroup CAN_wake_up_constants + * @{ + */ + +#define CAN_WakeUp_Failed ((uint8_t)0x00) /*!< CAN did not leave the sleep mode */ +#define CAN_WakeUp_Ok ((uint8_t)0x01) /*!< CAN leaved the sleep mode */ + +/** + * @} + */ + +/** + * @defgroup CAN_Error_Code_constants + * @{ + */ + +#define CAN_ErrorCode_NoErr ((uint8_t)0x00) /*!< No Error */ +#define CAN_ErrorCode_StuffErr ((uint8_t)0x10) /*!< Stuff Error */ +#define CAN_ErrorCode_FormErr ((uint8_t)0x20) /*!< Form Error */ +#define CAN_ErrorCode_ACKErr ((uint8_t)0x30) /*!< Acknowledgment Error */ +#define CAN_ErrorCode_BitRecessiveErr ((uint8_t)0x40) /*!< Bit Recessive Error */ +#define CAN_ErrorCode_BitDominantErr ((uint8_t)0x50) /*!< Bit Dominant Error */ +#define CAN_ErrorCode_CRCErr ((uint8_t)0x60) /*!< CRC Error */ +#define CAN_ErrorCode_SoftwareSetErr ((uint8_t)0x70) /*!< Software Set Error */ + + +/** + * @} + */ + +/** @defgroup CAN_flags + * @{ + */ +/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() + and CAN_ClearFlag() functions. */ +/* If the flag is 0x1XXXXXXX, it means that it can only be used with CAN_GetFlagStatus() function. */ + +/* Transmit Flags */ +#define CAN_FLAG_RQCP0 ((uint32_t)0x38000001) /*!< Request MailBox0 Flag */ +#define CAN_FLAG_RQCP1 ((uint32_t)0x38000100) /*!< Request MailBox1 Flag */ +#define CAN_FLAG_RQCP2 ((uint32_t)0x38010000) /*!< Request MailBox2 Flag */ + +/* Receive Flags */ +#define CAN_FLAG_FMP0 ((uint32_t)0x12000003) /*!< FIFO 0 Message Pending Flag */ +#define CAN_FLAG_FF0 ((uint32_t)0x32000008) /*!< FIFO 0 Full Flag */ +#define CAN_FLAG_FOV0 ((uint32_t)0x32000010) /*!< FIFO 0 Overrun Flag */ +#define CAN_FLAG_FMP1 ((uint32_t)0x14000003) /*!< FIFO 1 Message Pending Flag */ +#define CAN_FLAG_FF1 ((uint32_t)0x34000008) /*!< FIFO 1 Full Flag */ +#define CAN_FLAG_FOV1 ((uint32_t)0x34000010) /*!< FIFO 1 Overrun Flag */ + +/* Operating Mode Flags */ +#define CAN_FLAG_WKU ((uint32_t)0x31000008) /*!< Wake up Flag */ +#define CAN_FLAG_SLAK ((uint32_t)0x31000012) /*!< Sleep acknowledge Flag */ +/* Note: When SLAK intterupt is disabled (SLKIE=0), no polling on SLAKI is possible. + In this case the SLAK bit can be polled.*/ + +/* Error Flags */ +#define CAN_FLAG_EWG ((uint32_t)0x10F00001) /*!< Error Warning Flag */ +#define CAN_FLAG_EPV ((uint32_t)0x10F00002) /*!< Error Passive Flag */ +#define CAN_FLAG_BOF ((uint32_t)0x10F00004) /*!< Bus-Off Flag */ +#define CAN_FLAG_LEC ((uint32_t)0x30F00070) /*!< Last error code Flag */ + +#define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_BOF) || \ + ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \ + ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \ + ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FMP0) || \ + ((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \ + ((FLAG) == CAN_FLAG_FMP1) || ((FLAG) == CAN_FLAG_RQCP2) || \ + ((FLAG) == CAN_FLAG_RQCP1)|| ((FLAG) == CAN_FLAG_RQCP0) || \ + ((FLAG) == CAN_FLAG_SLAK )) + +#define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_LEC) || ((FLAG) == CAN_FLAG_RQCP2) || \ + ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \ + ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) ||\ + ((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \ + ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_SLAK)) +/** + * @} + */ + + +/** @defgroup CAN_interrupts + * @{ + */ + + + +#define CAN_IT_TME ((uint32_t)0x00000001) /*!< Transmit mailbox empty Interrupt*/ + +/* Receive Interrupts */ +#define CAN_IT_FMP0 ((uint32_t)0x00000002) /*!< FIFO 0 message pending Interrupt*/ +#define CAN_IT_FF0 ((uint32_t)0x00000004) /*!< FIFO 0 full Interrupt*/ +#define CAN_IT_FOV0 ((uint32_t)0x00000008) /*!< FIFO 0 overrun Interrupt*/ +#define CAN_IT_FMP1 ((uint32_t)0x00000010) /*!< FIFO 1 message pending Interrupt*/ +#define CAN_IT_FF1 ((uint32_t)0x00000020) /*!< FIFO 1 full Interrupt*/ +#define CAN_IT_FOV1 ((uint32_t)0x00000040) /*!< FIFO 1 overrun Interrupt*/ + +/* Operating Mode Interrupts */ +#define CAN_IT_WKU ((uint32_t)0x00010000) /*!< Wake-up Interrupt*/ +#define CAN_IT_SLK ((uint32_t)0x00020000) /*!< Sleep acknowledge Interrupt*/ + +/* Error Interrupts */ +#define CAN_IT_EWG ((uint32_t)0x00000100) /*!< Error warning Interrupt*/ +#define CAN_IT_EPV ((uint32_t)0x00000200) /*!< Error passive Interrupt*/ +#define CAN_IT_BOF ((uint32_t)0x00000400) /*!< Bus-off Interrupt*/ +#define CAN_IT_LEC ((uint32_t)0x00000800) /*!< Last error code Interrupt*/ +#define CAN_IT_ERR ((uint32_t)0x00008000) /*!< Error Interrupt*/ + +/* Flags named as Interrupts : kept only for FW compatibility */ +#define CAN_IT_RQCP0 CAN_IT_TME +#define CAN_IT_RQCP1 CAN_IT_TME +#define CAN_IT_RQCP2 CAN_IT_TME + + +#define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\ + ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\ + ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\ + ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ + ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ + ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ + ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) + +#define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\ + ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\ + ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\ + ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ + ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ + ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) + +/** + * @} + */ + +/** @defgroup CAN_Legacy + * @{ + */ +#define CANINITFAILED CAN_InitStatus_Failed +#define CANINITOK CAN_InitStatus_Success +#define CAN_FilterFIFO0 CAN_Filter_FIFO0 +#define CAN_FilterFIFO1 CAN_Filter_FIFO1 +#define CAN_ID_STD CAN_Id_Standard +#define CAN_ID_EXT CAN_Id_Extended +#define CAN_RTR_DATA CAN_RTR_Data +#define CAN_RTR_REMOTE CAN_RTR_Remote +#define CANTXFAILE CAN_TxStatus_Failed +#define CANTXOK CAN_TxStatus_Ok +#define CANTXPENDING CAN_TxStatus_Pending +#define CAN_NO_MB CAN_TxStatus_NoMailBox +#define CANSLEEPFAILED CAN_Sleep_Failed +#define CANSLEEPOK CAN_Sleep_Ok +#define CANWAKEUPFAILED CAN_WakeUp_Failed +#define CANWAKEUPOK CAN_WakeUp_Ok + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup CAN_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Exported_Functions + * @{ + */ +/* Function used to set the CAN configuration to the default reset state *****/ +void CAN_DeInit(CAN_TypeDef* CANx); + +/* Initialization and Configuration functions *********************************/ +uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct); +void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct); +void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct); +void CAN_SlaveStartBank(uint8_t CAN_BankNumber); +void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState); +void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState); + +/* Transmit functions *********************************************************/ +uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage); +uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox); +void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox); + +/* Receive functions **********************************************************/ +void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage); +void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber); +uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber); + + +/* Operation modes functions **************************************************/ +uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode); +uint8_t CAN_Sleep(CAN_TypeDef* CANx); +uint8_t CAN_WakeUp(CAN_TypeDef* CANx); + +/* Error management functions *************************************************/ +uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx); +uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx); +uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx); + +/* Interrupts and flags management functions **********************************/ +void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState); +FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG); +void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG); +ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT); +void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_CAN_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h index 7ce68961..a3f8fc78 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_cec.h @@ -1,210 +1,210 @@ -/** - ****************************************************************************** - * @file stm32f10x_cec.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the CEC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CEC_H -#define __STM32F10x_CEC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup CEC - * @{ - */ - - -/** @defgroup CEC_Exported_Types - * @{ - */ - -/** - * @brief CEC Init structure definition - */ -typedef struct -{ - uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. - This parameter can be a value of @ref CEC_BitTiming_Mode */ - uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. - This parameter can be a value of @ref CEC_BitPeriod_Mode */ -}CEC_InitTypeDef; - -/** - * @} - */ - -/** @defgroup CEC_Exported_Constants - * @{ - */ - -/** @defgroup CEC_BitTiming_Mode - * @{ - */ -#define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ -#define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ - -#define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ - ((MODE) == CEC_BitTimingErrFreeMode)) -/** - * @} - */ - -/** @defgroup CEC_BitPeriod_Mode - * @{ - */ -#define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ -#define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ - -#define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ - ((MODE) == CEC_BitPeriodFlexibleMode)) -/** - * @} - */ - - -/** @defgroup CEC_interrupts_definition - * @{ - */ -#define CEC_IT_TERR CEC_CSR_TERR -#define CEC_IT_TBTRF CEC_CSR_TBTRF -#define CEC_IT_RERR CEC_CSR_RERR -#define CEC_IT_RBTF CEC_CSR_RBTF -#define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ - ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) -/** - * @} - */ - - -/** @defgroup CEC_Own_Address - * @{ - */ -#define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) -/** - * @} - */ - -/** @defgroup CEC_Prescaler - * @{ - */ -#define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) - -/** - * @} - */ - -/** @defgroup CEC_flags_definition - * @{ - */ - -/** - * @brief ESR register flags - */ -#define CEC_FLAG_BTE ((uint32_t)0x10010000) -#define CEC_FLAG_BPE ((uint32_t)0x10020000) -#define CEC_FLAG_RBTFE ((uint32_t)0x10040000) -#define CEC_FLAG_SBE ((uint32_t)0x10080000) -#define CEC_FLAG_ACKE ((uint32_t)0x10100000) -#define CEC_FLAG_LINE ((uint32_t)0x10200000) -#define CEC_FLAG_TBTFE ((uint32_t)0x10400000) - -/** - * @brief CSR register flags - */ -#define CEC_FLAG_TEOM ((uint32_t)0x00000002) -#define CEC_FLAG_TERR ((uint32_t)0x00000004) -#define CEC_FLAG_TBTRF ((uint32_t)0x00000008) -#define CEC_FLAG_RSOM ((uint32_t)0x00000010) -#define CEC_FLAG_REOM ((uint32_t)0x00000020) -#define CEC_FLAG_RERR ((uint32_t)0x00000040) -#define CEC_FLAG_RBTF ((uint32_t)0x00000080) - -#define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) - -#define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ - ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ - ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ - ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ - ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ - ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ - ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup CEC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CEC_Exported_Functions - * @{ - */ -void CEC_DeInit(void); -void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); -void CEC_Cmd(FunctionalState NewState); -void CEC_ITConfig(FunctionalState NewState); -void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); -void CEC_SetPrescaler(uint16_t CEC_Prescaler); -void CEC_SendDataByte(uint8_t Data); -uint8_t CEC_ReceiveDataByte(void); -void CEC_StartOfMessage(void); -void CEC_EndOfMessageCmd(FunctionalState NewState); -FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); -void CEC_ClearFlag(uint32_t CEC_FLAG); -ITStatus CEC_GetITStatus(uint8_t CEC_IT); -void CEC_ClearITPendingBit(uint16_t CEC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_CEC_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_cec.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the CEC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CEC_H +#define __STM32F10x_CEC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup CEC + * @{ + */ + + +/** @defgroup CEC_Exported_Types + * @{ + */ + +/** + * @brief CEC Init structure definition + */ +typedef struct +{ + uint16_t CEC_BitTimingMode; /*!< Configures the CEC Bit Timing Error Mode. + This parameter can be a value of @ref CEC_BitTiming_Mode */ + uint16_t CEC_BitPeriodMode; /*!< Configures the CEC Bit Period Error Mode. + This parameter can be a value of @ref CEC_BitPeriod_Mode */ +}CEC_InitTypeDef; + +/** + * @} + */ + +/** @defgroup CEC_Exported_Constants + * @{ + */ + +/** @defgroup CEC_BitTiming_Mode + * @{ + */ +#define CEC_BitTimingStdMode ((uint16_t)0x00) /*!< Bit timing error Standard Mode */ +#define CEC_BitTimingErrFreeMode CEC_CFGR_BTEM /*!< Bit timing error Free Mode */ + +#define IS_CEC_BIT_TIMING_ERROR_MODE(MODE) (((MODE) == CEC_BitTimingStdMode) || \ + ((MODE) == CEC_BitTimingErrFreeMode)) +/** + * @} + */ + +/** @defgroup CEC_BitPeriod_Mode + * @{ + */ +#define CEC_BitPeriodStdMode ((uint16_t)0x00) /*!< Bit period error Standard Mode */ +#define CEC_BitPeriodFlexibleMode CEC_CFGR_BPEM /*!< Bit period error Flexible Mode */ + +#define IS_CEC_BIT_PERIOD_ERROR_MODE(MODE) (((MODE) == CEC_BitPeriodStdMode) || \ + ((MODE) == CEC_BitPeriodFlexibleMode)) +/** + * @} + */ + + +/** @defgroup CEC_interrupts_definition + * @{ + */ +#define CEC_IT_TERR CEC_CSR_TERR +#define CEC_IT_TBTRF CEC_CSR_TBTRF +#define CEC_IT_RERR CEC_CSR_RERR +#define CEC_IT_RBTF CEC_CSR_RBTF +#define IS_CEC_GET_IT(IT) (((IT) == CEC_IT_TERR) || ((IT) == CEC_IT_TBTRF) || \ + ((IT) == CEC_IT_RERR) || ((IT) == CEC_IT_RBTF)) +/** + * @} + */ + + +/** @defgroup CEC_Own_Address + * @{ + */ +#define IS_CEC_ADDRESS(ADDRESS) ((ADDRESS) < 0x10) +/** + * @} + */ + +/** @defgroup CEC_Prescaler + * @{ + */ +#define IS_CEC_PRESCALER(PRESCALER) ((PRESCALER) <= 0x3FFF) + +/** + * @} + */ + +/** @defgroup CEC_flags_definition + * @{ + */ + +/** + * @brief ESR register flags + */ +#define CEC_FLAG_BTE ((uint32_t)0x10010000) +#define CEC_FLAG_BPE ((uint32_t)0x10020000) +#define CEC_FLAG_RBTFE ((uint32_t)0x10040000) +#define CEC_FLAG_SBE ((uint32_t)0x10080000) +#define CEC_FLAG_ACKE ((uint32_t)0x10100000) +#define CEC_FLAG_LINE ((uint32_t)0x10200000) +#define CEC_FLAG_TBTFE ((uint32_t)0x10400000) + +/** + * @brief CSR register flags + */ +#define CEC_FLAG_TEOM ((uint32_t)0x00000002) +#define CEC_FLAG_TERR ((uint32_t)0x00000004) +#define CEC_FLAG_TBTRF ((uint32_t)0x00000008) +#define CEC_FLAG_RSOM ((uint32_t)0x00000010) +#define CEC_FLAG_REOM ((uint32_t)0x00000020) +#define CEC_FLAG_RERR ((uint32_t)0x00000040) +#define CEC_FLAG_RBTF ((uint32_t)0x00000080) + +#define IS_CEC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFF03) == 0x00) && ((FLAG) != 0x00)) + +#define IS_CEC_GET_FLAG(FLAG) (((FLAG) == CEC_FLAG_BTE) || ((FLAG) == CEC_FLAG_BPE) || \ + ((FLAG) == CEC_FLAG_RBTFE) || ((FLAG)== CEC_FLAG_SBE) || \ + ((FLAG) == CEC_FLAG_ACKE) || ((FLAG) == CEC_FLAG_LINE) || \ + ((FLAG) == CEC_FLAG_TBTFE) || ((FLAG) == CEC_FLAG_TEOM) || \ + ((FLAG) == CEC_FLAG_TERR) || ((FLAG) == CEC_FLAG_TBTRF) || \ + ((FLAG) == CEC_FLAG_RSOM) || ((FLAG) == CEC_FLAG_REOM) || \ + ((FLAG) == CEC_FLAG_RERR) || ((FLAG) == CEC_FLAG_RBTF)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup CEC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CEC_Exported_Functions + * @{ + */ +void CEC_DeInit(void); +void CEC_Init(CEC_InitTypeDef* CEC_InitStruct); +void CEC_Cmd(FunctionalState NewState); +void CEC_ITConfig(FunctionalState NewState); +void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress); +void CEC_SetPrescaler(uint16_t CEC_Prescaler); +void CEC_SendDataByte(uint8_t Data); +uint8_t CEC_ReceiveDataByte(void); +void CEC_StartOfMessage(void); +void CEC_EndOfMessageCmd(FunctionalState NewState); +FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG); +void CEC_ClearFlag(uint32_t CEC_FLAG); +ITStatus CEC_GetITStatus(uint8_t CEC_IT); +void CEC_ClearITPendingBit(uint16_t CEC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_CEC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h index 3362fcaa..658a51ce 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_crc.h @@ -1,94 +1,94 @@ -/** - ****************************************************************************** - * @file stm32f10x_crc.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the CRC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CRC_H -#define __STM32F10x_CRC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup CRC - * @{ - */ - -/** @defgroup CRC_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Exported_Functions - * @{ - */ - -void CRC_ResetDR(void); -uint32_t CRC_CalcCRC(uint32_t Data); -uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); -uint32_t CRC_GetCRC(void); -void CRC_SetIDRegister(uint8_t IDValue); -uint8_t CRC_GetIDRegister(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_CRC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_crc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the CRC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CRC_H +#define __STM32F10x_CRC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup CRC + * @{ + */ + +/** @defgroup CRC_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Exported_Constants + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Exported_Functions + * @{ + */ + +void CRC_ResetDR(void); +uint32_t CRC_CalcCRC(uint32_t Data); +uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength); +uint32_t CRC_GetCRC(void); +void CRC_SetIDRegister(uint8_t IDValue); +uint8_t CRC_GetIDRegister(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_CRC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h index 174773cd..71061641 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dac.h @@ -1,317 +1,317 @@ -/** - ****************************************************************************** - * @file stm32f10x_dac.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the DAC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_DAC_H -#define __STM32F10x_DAC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup DAC - * @{ - */ - -/** @defgroup DAC_Exported_Types - * @{ - */ - -/** - * @brief DAC Init structure definition - */ - -typedef struct -{ - uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. - This parameter can be a value of @ref DAC_trigger_selection */ - - uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves - are generated, or whether no wave is generated. - This parameter can be a value of @ref DAC_wave_generation */ - - uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or - the maximum amplitude triangle generation for the DAC channel. - This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */ - - uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. - This parameter can be a value of @ref DAC_output_buffer */ -}DAC_InitTypeDef; - -/** - * @} - */ - -/** @defgroup DAC_Exported_Constants - * @{ - */ - -/** @defgroup DAC_trigger_selection - * @{ - */ - -#define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register - has been loaded, and not by external trigger */ -#define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel - only in High-density devices*/ -#define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel - only in Connectivity line, Medium-density and Low-density Value Line devices */ -#define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T15_TRGO ((uint32_t)0x0000001C) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel - only in Medium-density and Low-density Value Line devices*/ -#define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ -#define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */ - -#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \ - ((TRIGGER) == DAC_Trigger_T6_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T8_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T7_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T5_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T2_TRGO) || \ - ((TRIGGER) == DAC_Trigger_T4_TRGO) || \ - ((TRIGGER) == DAC_Trigger_Ext_IT9) || \ - ((TRIGGER) == DAC_Trigger_Software)) - -/** - * @} - */ - -/** @defgroup DAC_wave_generation - * @{ - */ - -#define DAC_WaveGeneration_None ((uint32_t)0x00000000) -#define DAC_WaveGeneration_Noise ((uint32_t)0x00000040) -#define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080) -#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \ - ((WAVE) == DAC_WaveGeneration_Noise) || \ - ((WAVE) == DAC_WaveGeneration_Triangle)) -/** - * @} - */ - -/** @defgroup DAC_lfsrunmask_triangleamplitude - * @{ - */ - -#define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ -#define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ -#define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ -#define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ -#define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */ -#define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */ -#define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */ -#define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */ -#define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */ -#define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */ -#define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */ -#define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */ -#define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */ -#define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */ -#define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */ - -#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \ - ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \ - ((VALUE) == DAC_TriangleAmplitude_1) || \ - ((VALUE) == DAC_TriangleAmplitude_3) || \ - ((VALUE) == DAC_TriangleAmplitude_7) || \ - ((VALUE) == DAC_TriangleAmplitude_15) || \ - ((VALUE) == DAC_TriangleAmplitude_31) || \ - ((VALUE) == DAC_TriangleAmplitude_63) || \ - ((VALUE) == DAC_TriangleAmplitude_127) || \ - ((VALUE) == DAC_TriangleAmplitude_255) || \ - ((VALUE) == DAC_TriangleAmplitude_511) || \ - ((VALUE) == DAC_TriangleAmplitude_1023) || \ - ((VALUE) == DAC_TriangleAmplitude_2047) || \ - ((VALUE) == DAC_TriangleAmplitude_4095)) -/** - * @} - */ - -/** @defgroup DAC_output_buffer - * @{ - */ - -#define DAC_OutputBuffer_Enable ((uint32_t)0x00000000) -#define DAC_OutputBuffer_Disable ((uint32_t)0x00000002) -#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \ - ((STATE) == DAC_OutputBuffer_Disable)) -/** - * @} - */ - -/** @defgroup DAC_Channel_selection - * @{ - */ - -#define DAC_Channel_1 ((uint32_t)0x00000000) -#define DAC_Channel_2 ((uint32_t)0x00000010) -#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \ - ((CHANNEL) == DAC_Channel_2)) -/** - * @} - */ - -/** @defgroup DAC_data_alignment - * @{ - */ - -#define DAC_Align_12b_R ((uint32_t)0x00000000) -#define DAC_Align_12b_L ((uint32_t)0x00000004) -#define DAC_Align_8b_R ((uint32_t)0x00000008) -#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \ - ((ALIGN) == DAC_Align_12b_L) || \ - ((ALIGN) == DAC_Align_8b_R)) -/** - * @} - */ - -/** @defgroup DAC_wave_generation - * @{ - */ - -#define DAC_Wave_Noise ((uint32_t)0x00000040) -#define DAC_Wave_Triangle ((uint32_t)0x00000080) -#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \ - ((WAVE) == DAC_Wave_Triangle)) -/** - * @} - */ - -/** @defgroup DAC_data - * @{ - */ - -#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) -/** - * @} - */ -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -/** @defgroup DAC_interrupts_definition - * @{ - */ - -#define DAC_IT_DMAUDR ((uint32_t)0x00002000) -#define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR)) - -/** - * @} - */ - -/** @defgroup DAC_flags_definition - * @{ - */ - -#define DAC_FLAG_DMAUDR ((uint32_t)0x00002000) -#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR)) - -/** - * @} - */ -#endif - -/** - * @} - */ - -/** @defgroup DAC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Exported_Functions - * @{ - */ - -void DAC_DeInit(void); -void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct); -void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct); -void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState); -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState); -#endif -void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState); -void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState); -void DAC_DualSoftwareTriggerCmd(FunctionalState NewState); -void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState); -void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data); -void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data); -void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1); -uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel); -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG); -void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG); -ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT); -void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_DAC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_dac.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the DAC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_DAC_H +#define __STM32F10x_DAC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup DAC + * @{ + */ + +/** @defgroup DAC_Exported_Types + * @{ + */ + +/** + * @brief DAC Init structure definition + */ + +typedef struct +{ + uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. + This parameter can be a value of @ref DAC_trigger_selection */ + + uint32_t DAC_WaveGeneration; /*!< Specifies whether DAC channel noise waves or triangle waves + are generated, or whether no wave is generated. + This parameter can be a value of @ref DAC_wave_generation */ + + uint32_t DAC_LFSRUnmask_TriangleAmplitude; /*!< Specifies the LFSR mask for noise wave generation or + the maximum amplitude triangle generation for the DAC channel. + This parameter can be a value of @ref DAC_lfsrunmask_triangleamplitude */ + + uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. + This parameter can be a value of @ref DAC_output_buffer */ +}DAC_InitTypeDef; + +/** + * @} + */ + +/** @defgroup DAC_Exported_Constants + * @{ + */ + +/** @defgroup DAC_trigger_selection + * @{ + */ + +#define DAC_Trigger_None ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register + has been loaded, and not by external trigger */ +#define DAC_Trigger_T6_TRGO ((uint32_t)0x00000004) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T8_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel + only in High-density devices*/ +#define DAC_Trigger_T3_TRGO ((uint32_t)0x0000000C) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel + only in Connectivity line, Medium-density and Low-density Value Line devices */ +#define DAC_Trigger_T7_TRGO ((uint32_t)0x00000014) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T5_TRGO ((uint32_t)0x0000001C) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T15_TRGO ((uint32_t)0x0000001C) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel + only in Medium-density and Low-density Value Line devices*/ +#define DAC_Trigger_T2_TRGO ((uint32_t)0x00000024) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_T4_TRGO ((uint32_t)0x0000002C) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_Ext_IT9 ((uint32_t)0x00000034) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ +#define DAC_Trigger_Software ((uint32_t)0x0000003C) /*!< Conversion started by software trigger for DAC channel */ + +#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_Trigger_None) || \ + ((TRIGGER) == DAC_Trigger_T6_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T8_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T7_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T5_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T2_TRGO) || \ + ((TRIGGER) == DAC_Trigger_T4_TRGO) || \ + ((TRIGGER) == DAC_Trigger_Ext_IT9) || \ + ((TRIGGER) == DAC_Trigger_Software)) + +/** + * @} + */ + +/** @defgroup DAC_wave_generation + * @{ + */ + +#define DAC_WaveGeneration_None ((uint32_t)0x00000000) +#define DAC_WaveGeneration_Noise ((uint32_t)0x00000040) +#define DAC_WaveGeneration_Triangle ((uint32_t)0x00000080) +#define IS_DAC_GENERATE_WAVE(WAVE) (((WAVE) == DAC_WaveGeneration_None) || \ + ((WAVE) == DAC_WaveGeneration_Noise) || \ + ((WAVE) == DAC_WaveGeneration_Triangle)) +/** + * @} + */ + +/** @defgroup DAC_lfsrunmask_triangleamplitude + * @{ + */ + +#define DAC_LFSRUnmask_Bit0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ +#define DAC_LFSRUnmask_Bits1_0 ((uint32_t)0x00000100) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits2_0 ((uint32_t)0x00000200) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits3_0 ((uint32_t)0x00000300) /*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits4_0 ((uint32_t)0x00000400) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits5_0 ((uint32_t)0x00000500) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits6_0 ((uint32_t)0x00000600) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits7_0 ((uint32_t)0x00000700) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits8_0 ((uint32_t)0x00000800) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits9_0 ((uint32_t)0x00000900) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits10_0 ((uint32_t)0x00000A00) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ +#define DAC_LFSRUnmask_Bits11_0 ((uint32_t)0x00000B00) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ +#define DAC_TriangleAmplitude_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ +#define DAC_TriangleAmplitude_3 ((uint32_t)0x00000100) /*!< Select max triangle amplitude of 3 */ +#define DAC_TriangleAmplitude_7 ((uint32_t)0x00000200) /*!< Select max triangle amplitude of 7 */ +#define DAC_TriangleAmplitude_15 ((uint32_t)0x00000300) /*!< Select max triangle amplitude of 15 */ +#define DAC_TriangleAmplitude_31 ((uint32_t)0x00000400) /*!< Select max triangle amplitude of 31 */ +#define DAC_TriangleAmplitude_63 ((uint32_t)0x00000500) /*!< Select max triangle amplitude of 63 */ +#define DAC_TriangleAmplitude_127 ((uint32_t)0x00000600) /*!< Select max triangle amplitude of 127 */ +#define DAC_TriangleAmplitude_255 ((uint32_t)0x00000700) /*!< Select max triangle amplitude of 255 */ +#define DAC_TriangleAmplitude_511 ((uint32_t)0x00000800) /*!< Select max triangle amplitude of 511 */ +#define DAC_TriangleAmplitude_1023 ((uint32_t)0x00000900) /*!< Select max triangle amplitude of 1023 */ +#define DAC_TriangleAmplitude_2047 ((uint32_t)0x00000A00) /*!< Select max triangle amplitude of 2047 */ +#define DAC_TriangleAmplitude_4095 ((uint32_t)0x00000B00) /*!< Select max triangle amplitude of 4095 */ + +#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUnmask_Bit0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits1_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits2_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits3_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits4_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits5_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits6_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits7_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits8_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits9_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits10_0) || \ + ((VALUE) == DAC_LFSRUnmask_Bits11_0) || \ + ((VALUE) == DAC_TriangleAmplitude_1) || \ + ((VALUE) == DAC_TriangleAmplitude_3) || \ + ((VALUE) == DAC_TriangleAmplitude_7) || \ + ((VALUE) == DAC_TriangleAmplitude_15) || \ + ((VALUE) == DAC_TriangleAmplitude_31) || \ + ((VALUE) == DAC_TriangleAmplitude_63) || \ + ((VALUE) == DAC_TriangleAmplitude_127) || \ + ((VALUE) == DAC_TriangleAmplitude_255) || \ + ((VALUE) == DAC_TriangleAmplitude_511) || \ + ((VALUE) == DAC_TriangleAmplitude_1023) || \ + ((VALUE) == DAC_TriangleAmplitude_2047) || \ + ((VALUE) == DAC_TriangleAmplitude_4095)) +/** + * @} + */ + +/** @defgroup DAC_output_buffer + * @{ + */ + +#define DAC_OutputBuffer_Enable ((uint32_t)0x00000000) +#define DAC_OutputBuffer_Disable ((uint32_t)0x00000002) +#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OutputBuffer_Enable) || \ + ((STATE) == DAC_OutputBuffer_Disable)) +/** + * @} + */ + +/** @defgroup DAC_Channel_selection + * @{ + */ + +#define DAC_Channel_1 ((uint32_t)0x00000000) +#define DAC_Channel_2 ((uint32_t)0x00000010) +#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_Channel_1) || \ + ((CHANNEL) == DAC_Channel_2)) +/** + * @} + */ + +/** @defgroup DAC_data_alignment + * @{ + */ + +#define DAC_Align_12b_R ((uint32_t)0x00000000) +#define DAC_Align_12b_L ((uint32_t)0x00000004) +#define DAC_Align_8b_R ((uint32_t)0x00000008) +#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_Align_12b_R) || \ + ((ALIGN) == DAC_Align_12b_L) || \ + ((ALIGN) == DAC_Align_8b_R)) +/** + * @} + */ + +/** @defgroup DAC_wave_generation + * @{ + */ + +#define DAC_Wave_Noise ((uint32_t)0x00000040) +#define DAC_Wave_Triangle ((uint32_t)0x00000080) +#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_Wave_Noise) || \ + ((WAVE) == DAC_Wave_Triangle)) +/** + * @} + */ + +/** @defgroup DAC_data + * @{ + */ + +#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) +/** + * @} + */ +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/** @defgroup DAC_interrupts_definition + * @{ + */ + +#define DAC_IT_DMAUDR ((uint32_t)0x00002000) +#define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR)) + +/** + * @} + */ + +/** @defgroup DAC_flags_definition + * @{ + */ + +#define DAC_FLAG_DMAUDR ((uint32_t)0x00002000) +#define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR)) + +/** + * @} + */ +#endif + +/** + * @} + */ + +/** @defgroup DAC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Exported_Functions + * @{ + */ + +void DAC_DeInit(void); +void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct); +void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct); +void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState); +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState); +#endif +void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState); +void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState); +void DAC_DualSoftwareTriggerCmd(FunctionalState NewState); +void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState); +void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data); +void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data); +void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1); +uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel); +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG); +void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG); +ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT); +void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_DAC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h index 89ceb9a4..1e6a68ac 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dbgmcu.h @@ -1,119 +1,119 @@ -/** - ****************************************************************************** - * @file stm32f10x_dbgmcu.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the DBGMCU - * firmware library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_DBGMCU_H -#define __STM32F10x_DBGMCU_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup DBGMCU - * @{ - */ - -/** @defgroup DBGMCU_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Exported_Constants - * @{ - */ - -#define DBGMCU_SLEEP ((uint32_t)0x00000001) -#define DBGMCU_STOP ((uint32_t)0x00000002) -#define DBGMCU_STANDBY ((uint32_t)0x00000004) -#define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) -#define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) -#define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) -#define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) -#define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) -#define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) -#define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) -#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) -#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) -#define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) -#define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) -#define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) -#define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) -#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) -#define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) -#define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) -#define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) -#define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) -#define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) -#define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) -#define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) -#define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) -#define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) - -#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) -/** - * @} - */ - -/** @defgroup DBGMCU_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Exported_Functions - * @{ - */ - -uint32_t DBGMCU_GetREVID(void); -uint32_t DBGMCU_GetDEVID(void); -void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_DBGMCU_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_dbgmcu.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the DBGMCU + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_DBGMCU_H +#define __STM32F10x_DBGMCU_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup DBGMCU + * @{ + */ + +/** @defgroup DBGMCU_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Exported_Constants + * @{ + */ + +#define DBGMCU_SLEEP ((uint32_t)0x00000001) +#define DBGMCU_STOP ((uint32_t)0x00000002) +#define DBGMCU_STANDBY ((uint32_t)0x00000004) +#define DBGMCU_IWDG_STOP ((uint32_t)0x00000100) +#define DBGMCU_WWDG_STOP ((uint32_t)0x00000200) +#define DBGMCU_TIM1_STOP ((uint32_t)0x00000400) +#define DBGMCU_TIM2_STOP ((uint32_t)0x00000800) +#define DBGMCU_TIM3_STOP ((uint32_t)0x00001000) +#define DBGMCU_TIM4_STOP ((uint32_t)0x00002000) +#define DBGMCU_CAN1_STOP ((uint32_t)0x00004000) +#define DBGMCU_I2C1_SMBUS_TIMEOUT ((uint32_t)0x00008000) +#define DBGMCU_I2C2_SMBUS_TIMEOUT ((uint32_t)0x00010000) +#define DBGMCU_TIM8_STOP ((uint32_t)0x00020000) +#define DBGMCU_TIM5_STOP ((uint32_t)0x00040000) +#define DBGMCU_TIM6_STOP ((uint32_t)0x00080000) +#define DBGMCU_TIM7_STOP ((uint32_t)0x00100000) +#define DBGMCU_CAN2_STOP ((uint32_t)0x00200000) +#define DBGMCU_TIM15_STOP ((uint32_t)0x00400000) +#define DBGMCU_TIM16_STOP ((uint32_t)0x00800000) +#define DBGMCU_TIM17_STOP ((uint32_t)0x01000000) +#define DBGMCU_TIM12_STOP ((uint32_t)0x02000000) +#define DBGMCU_TIM13_STOP ((uint32_t)0x04000000) +#define DBGMCU_TIM14_STOP ((uint32_t)0x08000000) +#define DBGMCU_TIM9_STOP ((uint32_t)0x10000000) +#define DBGMCU_TIM10_STOP ((uint32_t)0x20000000) +#define DBGMCU_TIM11_STOP ((uint32_t)0x40000000) + +#define IS_DBGMCU_PERIPH(PERIPH) ((((PERIPH) & 0x800000F8) == 0x00) && ((PERIPH) != 0x00)) +/** + * @} + */ + +/** @defgroup DBGMCU_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Exported_Functions + * @{ + */ + +uint32_t DBGMCU_GetREVID(void); +uint32_t DBGMCU_GetDEVID(void); +void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_DBGMCU_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h index 14275fe1..b5dc6a80 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_dma.h @@ -1,439 +1,439 @@ -/** - ****************************************************************************** - * @file stm32f10x_dma.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the DMA firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_DMA_H -#define __STM32F10x_DMA_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup DMA - * @{ - */ - -/** @defgroup DMA_Exported_Types - * @{ - */ - -/** - * @brief DMA Init structure definition - */ - -typedef struct -{ - uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */ - - uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */ - - uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination. - This parameter can be a value of @ref DMA_data_transfer_direction */ - - uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. - The data unit is equal to the configuration set in DMA_PeripheralDataSize - or DMA_MemoryDataSize members depending in the transfer direction. */ - - uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not. - This parameter can be a value of @ref DMA_peripheral_incremented_mode */ - - uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not. - This parameter can be a value of @ref DMA_memory_incremented_mode */ - - uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width. - This parameter can be a value of @ref DMA_peripheral_data_size */ - - uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width. - This parameter can be a value of @ref DMA_memory_data_size */ - - uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx. - This parameter can be a value of @ref DMA_circular_normal_mode. - @note: The circular buffer mode cannot be used if the memory-to-memory - data transfer is configured on the selected Channel */ - - uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx. - This parameter can be a value of @ref DMA_priority_level */ - - uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer. - This parameter can be a value of @ref DMA_memory_to_memory */ -}DMA_InitTypeDef; - -/** - * @} - */ - -/** @defgroup DMA_Exported_Constants - * @{ - */ - -#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \ - ((PERIPH) == DMA1_Channel2) || \ - ((PERIPH) == DMA1_Channel3) || \ - ((PERIPH) == DMA1_Channel4) || \ - ((PERIPH) == DMA1_Channel5) || \ - ((PERIPH) == DMA1_Channel6) || \ - ((PERIPH) == DMA1_Channel7) || \ - ((PERIPH) == DMA2_Channel1) || \ - ((PERIPH) == DMA2_Channel2) || \ - ((PERIPH) == DMA2_Channel3) || \ - ((PERIPH) == DMA2_Channel4) || \ - ((PERIPH) == DMA2_Channel5)) - -/** @defgroup DMA_data_transfer_direction - * @{ - */ - -#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) -#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) -#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ - ((DIR) == DMA_DIR_PeripheralSRC)) -/** - * @} - */ - -/** @defgroup DMA_peripheral_incremented_mode - * @{ - */ - -#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) -#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) -#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ - ((STATE) == DMA_PeripheralInc_Disable)) -/** - * @} - */ - -/** @defgroup DMA_memory_incremented_mode - * @{ - */ - -#define DMA_MemoryInc_Enable ((uint32_t)0x00000080) -#define DMA_MemoryInc_Disable ((uint32_t)0x00000000) -#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ - ((STATE) == DMA_MemoryInc_Disable)) -/** - * @} - */ - -/** @defgroup DMA_peripheral_data_size - * @{ - */ - -#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) -#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) -#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) -#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ - ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ - ((SIZE) == DMA_PeripheralDataSize_Word)) -/** - * @} - */ - -/** @defgroup DMA_memory_data_size - * @{ - */ - -#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) -#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) -#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) -#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ - ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ - ((SIZE) == DMA_MemoryDataSize_Word)) -/** - * @} - */ - -/** @defgroup DMA_circular_normal_mode - * @{ - */ - -#define DMA_Mode_Circular ((uint32_t)0x00000020) -#define DMA_Mode_Normal ((uint32_t)0x00000000) -#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) -/** - * @} - */ - -/** @defgroup DMA_priority_level - * @{ - */ - -#define DMA_Priority_VeryHigh ((uint32_t)0x00003000) -#define DMA_Priority_High ((uint32_t)0x00002000) -#define DMA_Priority_Medium ((uint32_t)0x00001000) -#define DMA_Priority_Low ((uint32_t)0x00000000) -#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ - ((PRIORITY) == DMA_Priority_High) || \ - ((PRIORITY) == DMA_Priority_Medium) || \ - ((PRIORITY) == DMA_Priority_Low)) -/** - * @} - */ - -/** @defgroup DMA_memory_to_memory - * @{ - */ - -#define DMA_M2M_Enable ((uint32_t)0x00004000) -#define DMA_M2M_Disable ((uint32_t)0x00000000) -#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) - -/** - * @} - */ - -/** @defgroup DMA_interrupts_definition - * @{ - */ - -#define DMA_IT_TC ((uint32_t)0x00000002) -#define DMA_IT_HT ((uint32_t)0x00000004) -#define DMA_IT_TE ((uint32_t)0x00000008) -#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) - -#define DMA1_IT_GL1 ((uint32_t)0x00000001) -#define DMA1_IT_TC1 ((uint32_t)0x00000002) -#define DMA1_IT_HT1 ((uint32_t)0x00000004) -#define DMA1_IT_TE1 ((uint32_t)0x00000008) -#define DMA1_IT_GL2 ((uint32_t)0x00000010) -#define DMA1_IT_TC2 ((uint32_t)0x00000020) -#define DMA1_IT_HT2 ((uint32_t)0x00000040) -#define DMA1_IT_TE2 ((uint32_t)0x00000080) -#define DMA1_IT_GL3 ((uint32_t)0x00000100) -#define DMA1_IT_TC3 ((uint32_t)0x00000200) -#define DMA1_IT_HT3 ((uint32_t)0x00000400) -#define DMA1_IT_TE3 ((uint32_t)0x00000800) -#define DMA1_IT_GL4 ((uint32_t)0x00001000) -#define DMA1_IT_TC4 ((uint32_t)0x00002000) -#define DMA1_IT_HT4 ((uint32_t)0x00004000) -#define DMA1_IT_TE4 ((uint32_t)0x00008000) -#define DMA1_IT_GL5 ((uint32_t)0x00010000) -#define DMA1_IT_TC5 ((uint32_t)0x00020000) -#define DMA1_IT_HT5 ((uint32_t)0x00040000) -#define DMA1_IT_TE5 ((uint32_t)0x00080000) -#define DMA1_IT_GL6 ((uint32_t)0x00100000) -#define DMA1_IT_TC6 ((uint32_t)0x00200000) -#define DMA1_IT_HT6 ((uint32_t)0x00400000) -#define DMA1_IT_TE6 ((uint32_t)0x00800000) -#define DMA1_IT_GL7 ((uint32_t)0x01000000) -#define DMA1_IT_TC7 ((uint32_t)0x02000000) -#define DMA1_IT_HT7 ((uint32_t)0x04000000) -#define DMA1_IT_TE7 ((uint32_t)0x08000000) - -#define DMA2_IT_GL1 ((uint32_t)0x10000001) -#define DMA2_IT_TC1 ((uint32_t)0x10000002) -#define DMA2_IT_HT1 ((uint32_t)0x10000004) -#define DMA2_IT_TE1 ((uint32_t)0x10000008) -#define DMA2_IT_GL2 ((uint32_t)0x10000010) -#define DMA2_IT_TC2 ((uint32_t)0x10000020) -#define DMA2_IT_HT2 ((uint32_t)0x10000040) -#define DMA2_IT_TE2 ((uint32_t)0x10000080) -#define DMA2_IT_GL3 ((uint32_t)0x10000100) -#define DMA2_IT_TC3 ((uint32_t)0x10000200) -#define DMA2_IT_HT3 ((uint32_t)0x10000400) -#define DMA2_IT_TE3 ((uint32_t)0x10000800) -#define DMA2_IT_GL4 ((uint32_t)0x10001000) -#define DMA2_IT_TC4 ((uint32_t)0x10002000) -#define DMA2_IT_HT4 ((uint32_t)0x10004000) -#define DMA2_IT_TE4 ((uint32_t)0x10008000) -#define DMA2_IT_GL5 ((uint32_t)0x10010000) -#define DMA2_IT_TC5 ((uint32_t)0x10020000) -#define DMA2_IT_HT5 ((uint32_t)0x10040000) -#define DMA2_IT_TE5 ((uint32_t)0x10080000) - -#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) - -#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ - ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ - ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ - ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ - ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ - ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ - ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ - ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ - ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ - ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ - ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ - ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ - ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ - ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ - ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ - ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ - ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ - ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ - ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ - ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ - ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ - ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ - ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ - ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) - -/** - * @} - */ - -/** @defgroup DMA_flags_definition - * @{ - */ -#define DMA1_FLAG_GL1 ((uint32_t)0x00000001) -#define DMA1_FLAG_TC1 ((uint32_t)0x00000002) -#define DMA1_FLAG_HT1 ((uint32_t)0x00000004) -#define DMA1_FLAG_TE1 ((uint32_t)0x00000008) -#define DMA1_FLAG_GL2 ((uint32_t)0x00000010) -#define DMA1_FLAG_TC2 ((uint32_t)0x00000020) -#define DMA1_FLAG_HT2 ((uint32_t)0x00000040) -#define DMA1_FLAG_TE2 ((uint32_t)0x00000080) -#define DMA1_FLAG_GL3 ((uint32_t)0x00000100) -#define DMA1_FLAG_TC3 ((uint32_t)0x00000200) -#define DMA1_FLAG_HT3 ((uint32_t)0x00000400) -#define DMA1_FLAG_TE3 ((uint32_t)0x00000800) -#define DMA1_FLAG_GL4 ((uint32_t)0x00001000) -#define DMA1_FLAG_TC4 ((uint32_t)0x00002000) -#define DMA1_FLAG_HT4 ((uint32_t)0x00004000) -#define DMA1_FLAG_TE4 ((uint32_t)0x00008000) -#define DMA1_FLAG_GL5 ((uint32_t)0x00010000) -#define DMA1_FLAG_TC5 ((uint32_t)0x00020000) -#define DMA1_FLAG_HT5 ((uint32_t)0x00040000) -#define DMA1_FLAG_TE5 ((uint32_t)0x00080000) -#define DMA1_FLAG_GL6 ((uint32_t)0x00100000) -#define DMA1_FLAG_TC6 ((uint32_t)0x00200000) -#define DMA1_FLAG_HT6 ((uint32_t)0x00400000) -#define DMA1_FLAG_TE6 ((uint32_t)0x00800000) -#define DMA1_FLAG_GL7 ((uint32_t)0x01000000) -#define DMA1_FLAG_TC7 ((uint32_t)0x02000000) -#define DMA1_FLAG_HT7 ((uint32_t)0x04000000) -#define DMA1_FLAG_TE7 ((uint32_t)0x08000000) - -#define DMA2_FLAG_GL1 ((uint32_t)0x10000001) -#define DMA2_FLAG_TC1 ((uint32_t)0x10000002) -#define DMA2_FLAG_HT1 ((uint32_t)0x10000004) -#define DMA2_FLAG_TE1 ((uint32_t)0x10000008) -#define DMA2_FLAG_GL2 ((uint32_t)0x10000010) -#define DMA2_FLAG_TC2 ((uint32_t)0x10000020) -#define DMA2_FLAG_HT2 ((uint32_t)0x10000040) -#define DMA2_FLAG_TE2 ((uint32_t)0x10000080) -#define DMA2_FLAG_GL3 ((uint32_t)0x10000100) -#define DMA2_FLAG_TC3 ((uint32_t)0x10000200) -#define DMA2_FLAG_HT3 ((uint32_t)0x10000400) -#define DMA2_FLAG_TE3 ((uint32_t)0x10000800) -#define DMA2_FLAG_GL4 ((uint32_t)0x10001000) -#define DMA2_FLAG_TC4 ((uint32_t)0x10002000) -#define DMA2_FLAG_HT4 ((uint32_t)0x10004000) -#define DMA2_FLAG_TE4 ((uint32_t)0x10008000) -#define DMA2_FLAG_GL5 ((uint32_t)0x10010000) -#define DMA2_FLAG_TC5 ((uint32_t)0x10020000) -#define DMA2_FLAG_HT5 ((uint32_t)0x10040000) -#define DMA2_FLAG_TE5 ((uint32_t)0x10080000) - -#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) - -#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ - ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ - ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ - ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ - ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ - ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ - ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ - ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ - ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ - ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ - ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ - ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ - ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ - ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ - ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ - ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ - ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ - ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ - ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ - ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ - ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ - ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ - ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ - ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) -/** - * @} - */ - -/** @defgroup DMA_Buffer_Size - * @{ - */ - -#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup DMA_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Exported_Functions - * @{ - */ - -void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); -void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); -void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); -void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); -void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); -void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); -uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); -FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG); -void DMA_ClearFlag(uint32_t DMAy_FLAG); -ITStatus DMA_GetITStatus(uint32_t DMAy_IT); -void DMA_ClearITPendingBit(uint32_t DMAy_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_DMA_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_dma.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the DMA firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_DMA_H +#define __STM32F10x_DMA_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup DMA + * @{ + */ + +/** @defgroup DMA_Exported_Types + * @{ + */ + +/** + * @brief DMA Init structure definition + */ + +typedef struct +{ + uint32_t DMA_PeripheralBaseAddr; /*!< Specifies the peripheral base address for DMAy Channelx. */ + + uint32_t DMA_MemoryBaseAddr; /*!< Specifies the memory base address for DMAy Channelx. */ + + uint32_t DMA_DIR; /*!< Specifies if the peripheral is the source or destination. + This parameter can be a value of @ref DMA_data_transfer_direction */ + + uint32_t DMA_BufferSize; /*!< Specifies the buffer size, in data unit, of the specified Channel. + The data unit is equal to the configuration set in DMA_PeripheralDataSize + or DMA_MemoryDataSize members depending in the transfer direction. */ + + uint32_t DMA_PeripheralInc; /*!< Specifies whether the Peripheral address register is incremented or not. + This parameter can be a value of @ref DMA_peripheral_incremented_mode */ + + uint32_t DMA_MemoryInc; /*!< Specifies whether the memory address register is incremented or not. + This parameter can be a value of @ref DMA_memory_incremented_mode */ + + uint32_t DMA_PeripheralDataSize; /*!< Specifies the Peripheral data width. + This parameter can be a value of @ref DMA_peripheral_data_size */ + + uint32_t DMA_MemoryDataSize; /*!< Specifies the Memory data width. + This parameter can be a value of @ref DMA_memory_data_size */ + + uint32_t DMA_Mode; /*!< Specifies the operation mode of the DMAy Channelx. + This parameter can be a value of @ref DMA_circular_normal_mode. + @note: The circular buffer mode cannot be used if the memory-to-memory + data transfer is configured on the selected Channel */ + + uint32_t DMA_Priority; /*!< Specifies the software priority for the DMAy Channelx. + This parameter can be a value of @ref DMA_priority_level */ + + uint32_t DMA_M2M; /*!< Specifies if the DMAy Channelx will be used in memory-to-memory transfer. + This parameter can be a value of @ref DMA_memory_to_memory */ +}DMA_InitTypeDef; + +/** + * @} + */ + +/** @defgroup DMA_Exported_Constants + * @{ + */ + +#define IS_DMA_ALL_PERIPH(PERIPH) (((PERIPH) == DMA1_Channel1) || \ + ((PERIPH) == DMA1_Channel2) || \ + ((PERIPH) == DMA1_Channel3) || \ + ((PERIPH) == DMA1_Channel4) || \ + ((PERIPH) == DMA1_Channel5) || \ + ((PERIPH) == DMA1_Channel6) || \ + ((PERIPH) == DMA1_Channel7) || \ + ((PERIPH) == DMA2_Channel1) || \ + ((PERIPH) == DMA2_Channel2) || \ + ((PERIPH) == DMA2_Channel3) || \ + ((PERIPH) == DMA2_Channel4) || \ + ((PERIPH) == DMA2_Channel5)) + +/** @defgroup DMA_data_transfer_direction + * @{ + */ + +#define DMA_DIR_PeripheralDST ((uint32_t)0x00000010) +#define DMA_DIR_PeripheralSRC ((uint32_t)0x00000000) +#define IS_DMA_DIR(DIR) (((DIR) == DMA_DIR_PeripheralDST) || \ + ((DIR) == DMA_DIR_PeripheralSRC)) +/** + * @} + */ + +/** @defgroup DMA_peripheral_incremented_mode + * @{ + */ + +#define DMA_PeripheralInc_Enable ((uint32_t)0x00000040) +#define DMA_PeripheralInc_Disable ((uint32_t)0x00000000) +#define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PeripheralInc_Enable) || \ + ((STATE) == DMA_PeripheralInc_Disable)) +/** + * @} + */ + +/** @defgroup DMA_memory_incremented_mode + * @{ + */ + +#define DMA_MemoryInc_Enable ((uint32_t)0x00000080) +#define DMA_MemoryInc_Disable ((uint32_t)0x00000000) +#define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MemoryInc_Enable) || \ + ((STATE) == DMA_MemoryInc_Disable)) +/** + * @} + */ + +/** @defgroup DMA_peripheral_data_size + * @{ + */ + +#define DMA_PeripheralDataSize_Byte ((uint32_t)0x00000000) +#define DMA_PeripheralDataSize_HalfWord ((uint32_t)0x00000100) +#define DMA_PeripheralDataSize_Word ((uint32_t)0x00000200) +#define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PeripheralDataSize_Byte) || \ + ((SIZE) == DMA_PeripheralDataSize_HalfWord) || \ + ((SIZE) == DMA_PeripheralDataSize_Word)) +/** + * @} + */ + +/** @defgroup DMA_memory_data_size + * @{ + */ + +#define DMA_MemoryDataSize_Byte ((uint32_t)0x00000000) +#define DMA_MemoryDataSize_HalfWord ((uint32_t)0x00000400) +#define DMA_MemoryDataSize_Word ((uint32_t)0x00000800) +#define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MemoryDataSize_Byte) || \ + ((SIZE) == DMA_MemoryDataSize_HalfWord) || \ + ((SIZE) == DMA_MemoryDataSize_Word)) +/** + * @} + */ + +/** @defgroup DMA_circular_normal_mode + * @{ + */ + +#define DMA_Mode_Circular ((uint32_t)0x00000020) +#define DMA_Mode_Normal ((uint32_t)0x00000000) +#define IS_DMA_MODE(MODE) (((MODE) == DMA_Mode_Circular) || ((MODE) == DMA_Mode_Normal)) +/** + * @} + */ + +/** @defgroup DMA_priority_level + * @{ + */ + +#define DMA_Priority_VeryHigh ((uint32_t)0x00003000) +#define DMA_Priority_High ((uint32_t)0x00002000) +#define DMA_Priority_Medium ((uint32_t)0x00001000) +#define DMA_Priority_Low ((uint32_t)0x00000000) +#define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_Priority_VeryHigh) || \ + ((PRIORITY) == DMA_Priority_High) || \ + ((PRIORITY) == DMA_Priority_Medium) || \ + ((PRIORITY) == DMA_Priority_Low)) +/** + * @} + */ + +/** @defgroup DMA_memory_to_memory + * @{ + */ + +#define DMA_M2M_Enable ((uint32_t)0x00004000) +#define DMA_M2M_Disable ((uint32_t)0x00000000) +#define IS_DMA_M2M_STATE(STATE) (((STATE) == DMA_M2M_Enable) || ((STATE) == DMA_M2M_Disable)) + +/** + * @} + */ + +/** @defgroup DMA_interrupts_definition + * @{ + */ + +#define DMA_IT_TC ((uint32_t)0x00000002) +#define DMA_IT_HT ((uint32_t)0x00000004) +#define DMA_IT_TE ((uint32_t)0x00000008) +#define IS_DMA_CONFIG_IT(IT) ((((IT) & 0xFFFFFFF1) == 0x00) && ((IT) != 0x00)) + +#define DMA1_IT_GL1 ((uint32_t)0x00000001) +#define DMA1_IT_TC1 ((uint32_t)0x00000002) +#define DMA1_IT_HT1 ((uint32_t)0x00000004) +#define DMA1_IT_TE1 ((uint32_t)0x00000008) +#define DMA1_IT_GL2 ((uint32_t)0x00000010) +#define DMA1_IT_TC2 ((uint32_t)0x00000020) +#define DMA1_IT_HT2 ((uint32_t)0x00000040) +#define DMA1_IT_TE2 ((uint32_t)0x00000080) +#define DMA1_IT_GL3 ((uint32_t)0x00000100) +#define DMA1_IT_TC3 ((uint32_t)0x00000200) +#define DMA1_IT_HT3 ((uint32_t)0x00000400) +#define DMA1_IT_TE3 ((uint32_t)0x00000800) +#define DMA1_IT_GL4 ((uint32_t)0x00001000) +#define DMA1_IT_TC4 ((uint32_t)0x00002000) +#define DMA1_IT_HT4 ((uint32_t)0x00004000) +#define DMA1_IT_TE4 ((uint32_t)0x00008000) +#define DMA1_IT_GL5 ((uint32_t)0x00010000) +#define DMA1_IT_TC5 ((uint32_t)0x00020000) +#define DMA1_IT_HT5 ((uint32_t)0x00040000) +#define DMA1_IT_TE5 ((uint32_t)0x00080000) +#define DMA1_IT_GL6 ((uint32_t)0x00100000) +#define DMA1_IT_TC6 ((uint32_t)0x00200000) +#define DMA1_IT_HT6 ((uint32_t)0x00400000) +#define DMA1_IT_TE6 ((uint32_t)0x00800000) +#define DMA1_IT_GL7 ((uint32_t)0x01000000) +#define DMA1_IT_TC7 ((uint32_t)0x02000000) +#define DMA1_IT_HT7 ((uint32_t)0x04000000) +#define DMA1_IT_TE7 ((uint32_t)0x08000000) + +#define DMA2_IT_GL1 ((uint32_t)0x10000001) +#define DMA2_IT_TC1 ((uint32_t)0x10000002) +#define DMA2_IT_HT1 ((uint32_t)0x10000004) +#define DMA2_IT_TE1 ((uint32_t)0x10000008) +#define DMA2_IT_GL2 ((uint32_t)0x10000010) +#define DMA2_IT_TC2 ((uint32_t)0x10000020) +#define DMA2_IT_HT2 ((uint32_t)0x10000040) +#define DMA2_IT_TE2 ((uint32_t)0x10000080) +#define DMA2_IT_GL3 ((uint32_t)0x10000100) +#define DMA2_IT_TC3 ((uint32_t)0x10000200) +#define DMA2_IT_HT3 ((uint32_t)0x10000400) +#define DMA2_IT_TE3 ((uint32_t)0x10000800) +#define DMA2_IT_GL4 ((uint32_t)0x10001000) +#define DMA2_IT_TC4 ((uint32_t)0x10002000) +#define DMA2_IT_HT4 ((uint32_t)0x10004000) +#define DMA2_IT_TE4 ((uint32_t)0x10008000) +#define DMA2_IT_GL5 ((uint32_t)0x10010000) +#define DMA2_IT_TC5 ((uint32_t)0x10020000) +#define DMA2_IT_HT5 ((uint32_t)0x10040000) +#define DMA2_IT_TE5 ((uint32_t)0x10080000) + +#define IS_DMA_CLEAR_IT(IT) (((((IT) & 0xF0000000) == 0x00) || (((IT) & 0xEFF00000) == 0x00)) && ((IT) != 0x00)) + +#define IS_DMA_GET_IT(IT) (((IT) == DMA1_IT_GL1) || ((IT) == DMA1_IT_TC1) || \ + ((IT) == DMA1_IT_HT1) || ((IT) == DMA1_IT_TE1) || \ + ((IT) == DMA1_IT_GL2) || ((IT) == DMA1_IT_TC2) || \ + ((IT) == DMA1_IT_HT2) || ((IT) == DMA1_IT_TE2) || \ + ((IT) == DMA1_IT_GL3) || ((IT) == DMA1_IT_TC3) || \ + ((IT) == DMA1_IT_HT3) || ((IT) == DMA1_IT_TE3) || \ + ((IT) == DMA1_IT_GL4) || ((IT) == DMA1_IT_TC4) || \ + ((IT) == DMA1_IT_HT4) || ((IT) == DMA1_IT_TE4) || \ + ((IT) == DMA1_IT_GL5) || ((IT) == DMA1_IT_TC5) || \ + ((IT) == DMA1_IT_HT5) || ((IT) == DMA1_IT_TE5) || \ + ((IT) == DMA1_IT_GL6) || ((IT) == DMA1_IT_TC6) || \ + ((IT) == DMA1_IT_HT6) || ((IT) == DMA1_IT_TE6) || \ + ((IT) == DMA1_IT_GL7) || ((IT) == DMA1_IT_TC7) || \ + ((IT) == DMA1_IT_HT7) || ((IT) == DMA1_IT_TE7) || \ + ((IT) == DMA2_IT_GL1) || ((IT) == DMA2_IT_TC1) || \ + ((IT) == DMA2_IT_HT1) || ((IT) == DMA2_IT_TE1) || \ + ((IT) == DMA2_IT_GL2) || ((IT) == DMA2_IT_TC2) || \ + ((IT) == DMA2_IT_HT2) || ((IT) == DMA2_IT_TE2) || \ + ((IT) == DMA2_IT_GL3) || ((IT) == DMA2_IT_TC3) || \ + ((IT) == DMA2_IT_HT3) || ((IT) == DMA2_IT_TE3) || \ + ((IT) == DMA2_IT_GL4) || ((IT) == DMA2_IT_TC4) || \ + ((IT) == DMA2_IT_HT4) || ((IT) == DMA2_IT_TE4) || \ + ((IT) == DMA2_IT_GL5) || ((IT) == DMA2_IT_TC5) || \ + ((IT) == DMA2_IT_HT5) || ((IT) == DMA2_IT_TE5)) + +/** + * @} + */ + +/** @defgroup DMA_flags_definition + * @{ + */ +#define DMA1_FLAG_GL1 ((uint32_t)0x00000001) +#define DMA1_FLAG_TC1 ((uint32_t)0x00000002) +#define DMA1_FLAG_HT1 ((uint32_t)0x00000004) +#define DMA1_FLAG_TE1 ((uint32_t)0x00000008) +#define DMA1_FLAG_GL2 ((uint32_t)0x00000010) +#define DMA1_FLAG_TC2 ((uint32_t)0x00000020) +#define DMA1_FLAG_HT2 ((uint32_t)0x00000040) +#define DMA1_FLAG_TE2 ((uint32_t)0x00000080) +#define DMA1_FLAG_GL3 ((uint32_t)0x00000100) +#define DMA1_FLAG_TC3 ((uint32_t)0x00000200) +#define DMA1_FLAG_HT3 ((uint32_t)0x00000400) +#define DMA1_FLAG_TE3 ((uint32_t)0x00000800) +#define DMA1_FLAG_GL4 ((uint32_t)0x00001000) +#define DMA1_FLAG_TC4 ((uint32_t)0x00002000) +#define DMA1_FLAG_HT4 ((uint32_t)0x00004000) +#define DMA1_FLAG_TE4 ((uint32_t)0x00008000) +#define DMA1_FLAG_GL5 ((uint32_t)0x00010000) +#define DMA1_FLAG_TC5 ((uint32_t)0x00020000) +#define DMA1_FLAG_HT5 ((uint32_t)0x00040000) +#define DMA1_FLAG_TE5 ((uint32_t)0x00080000) +#define DMA1_FLAG_GL6 ((uint32_t)0x00100000) +#define DMA1_FLAG_TC6 ((uint32_t)0x00200000) +#define DMA1_FLAG_HT6 ((uint32_t)0x00400000) +#define DMA1_FLAG_TE6 ((uint32_t)0x00800000) +#define DMA1_FLAG_GL7 ((uint32_t)0x01000000) +#define DMA1_FLAG_TC7 ((uint32_t)0x02000000) +#define DMA1_FLAG_HT7 ((uint32_t)0x04000000) +#define DMA1_FLAG_TE7 ((uint32_t)0x08000000) + +#define DMA2_FLAG_GL1 ((uint32_t)0x10000001) +#define DMA2_FLAG_TC1 ((uint32_t)0x10000002) +#define DMA2_FLAG_HT1 ((uint32_t)0x10000004) +#define DMA2_FLAG_TE1 ((uint32_t)0x10000008) +#define DMA2_FLAG_GL2 ((uint32_t)0x10000010) +#define DMA2_FLAG_TC2 ((uint32_t)0x10000020) +#define DMA2_FLAG_HT2 ((uint32_t)0x10000040) +#define DMA2_FLAG_TE2 ((uint32_t)0x10000080) +#define DMA2_FLAG_GL3 ((uint32_t)0x10000100) +#define DMA2_FLAG_TC3 ((uint32_t)0x10000200) +#define DMA2_FLAG_HT3 ((uint32_t)0x10000400) +#define DMA2_FLAG_TE3 ((uint32_t)0x10000800) +#define DMA2_FLAG_GL4 ((uint32_t)0x10001000) +#define DMA2_FLAG_TC4 ((uint32_t)0x10002000) +#define DMA2_FLAG_HT4 ((uint32_t)0x10004000) +#define DMA2_FLAG_TE4 ((uint32_t)0x10008000) +#define DMA2_FLAG_GL5 ((uint32_t)0x10010000) +#define DMA2_FLAG_TC5 ((uint32_t)0x10020000) +#define DMA2_FLAG_HT5 ((uint32_t)0x10040000) +#define DMA2_FLAG_TE5 ((uint32_t)0x10080000) + +#define IS_DMA_CLEAR_FLAG(FLAG) (((((FLAG) & 0xF0000000) == 0x00) || (((FLAG) & 0xEFF00000) == 0x00)) && ((FLAG) != 0x00)) + +#define IS_DMA_GET_FLAG(FLAG) (((FLAG) == DMA1_FLAG_GL1) || ((FLAG) == DMA1_FLAG_TC1) || \ + ((FLAG) == DMA1_FLAG_HT1) || ((FLAG) == DMA1_FLAG_TE1) || \ + ((FLAG) == DMA1_FLAG_GL2) || ((FLAG) == DMA1_FLAG_TC2) || \ + ((FLAG) == DMA1_FLAG_HT2) || ((FLAG) == DMA1_FLAG_TE2) || \ + ((FLAG) == DMA1_FLAG_GL3) || ((FLAG) == DMA1_FLAG_TC3) || \ + ((FLAG) == DMA1_FLAG_HT3) || ((FLAG) == DMA1_FLAG_TE3) || \ + ((FLAG) == DMA1_FLAG_GL4) || ((FLAG) == DMA1_FLAG_TC4) || \ + ((FLAG) == DMA1_FLAG_HT4) || ((FLAG) == DMA1_FLAG_TE4) || \ + ((FLAG) == DMA1_FLAG_GL5) || ((FLAG) == DMA1_FLAG_TC5) || \ + ((FLAG) == DMA1_FLAG_HT5) || ((FLAG) == DMA1_FLAG_TE5) || \ + ((FLAG) == DMA1_FLAG_GL6) || ((FLAG) == DMA1_FLAG_TC6) || \ + ((FLAG) == DMA1_FLAG_HT6) || ((FLAG) == DMA1_FLAG_TE6) || \ + ((FLAG) == DMA1_FLAG_GL7) || ((FLAG) == DMA1_FLAG_TC7) || \ + ((FLAG) == DMA1_FLAG_HT7) || ((FLAG) == DMA1_FLAG_TE7) || \ + ((FLAG) == DMA2_FLAG_GL1) || ((FLAG) == DMA2_FLAG_TC1) || \ + ((FLAG) == DMA2_FLAG_HT1) || ((FLAG) == DMA2_FLAG_TE1) || \ + ((FLAG) == DMA2_FLAG_GL2) || ((FLAG) == DMA2_FLAG_TC2) || \ + ((FLAG) == DMA2_FLAG_HT2) || ((FLAG) == DMA2_FLAG_TE2) || \ + ((FLAG) == DMA2_FLAG_GL3) || ((FLAG) == DMA2_FLAG_TC3) || \ + ((FLAG) == DMA2_FLAG_HT3) || ((FLAG) == DMA2_FLAG_TE3) || \ + ((FLAG) == DMA2_FLAG_GL4) || ((FLAG) == DMA2_FLAG_TC4) || \ + ((FLAG) == DMA2_FLAG_HT4) || ((FLAG) == DMA2_FLAG_TE4) || \ + ((FLAG) == DMA2_FLAG_GL5) || ((FLAG) == DMA2_FLAG_TC5) || \ + ((FLAG) == DMA2_FLAG_HT5) || ((FLAG) == DMA2_FLAG_TE5)) +/** + * @} + */ + +/** @defgroup DMA_Buffer_Size + * @{ + */ + +#define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup DMA_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Exported_Functions + * @{ + */ + +void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx); +void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct); +void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct); +void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState); +void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState); +void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber); +uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx); +FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG); +void DMA_ClearFlag(uint32_t DMAy_FLAG); +ITStatus DMA_GetITStatus(uint32_t DMAy_IT); +void DMA_ClearITPendingBit(uint32_t DMAy_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_DMA_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h index bb9d7f67..a1ab7d03 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_exti.h @@ -1,184 +1,184 @@ -/** - ****************************************************************************** - * @file stm32f10x_exti.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the EXTI firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_EXTI_H -#define __STM32F10x_EXTI_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup EXTI - * @{ - */ - -/** @defgroup EXTI_Exported_Types - * @{ - */ - -/** - * @brief EXTI mode enumeration - */ - -typedef enum -{ - EXTI_Mode_Interrupt = 0x00, - EXTI_Mode_Event = 0x04 -}EXTIMode_TypeDef; - -#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) - -/** - * @brief EXTI Trigger enumeration - */ - -typedef enum -{ - EXTI_Trigger_Rising = 0x08, - EXTI_Trigger_Falling = 0x0C, - EXTI_Trigger_Rising_Falling = 0x10 -}EXTITrigger_TypeDef; - -#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ - ((TRIGGER) == EXTI_Trigger_Falling) || \ - ((TRIGGER) == EXTI_Trigger_Rising_Falling)) -/** - * @brief EXTI Init Structure definition - */ - -typedef struct -{ - uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. - This parameter can be any combination of @ref EXTI_Lines */ - - EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. - This parameter can be a value of @ref EXTIMode_TypeDef */ - - EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. - This parameter can be a value of @ref EXTIMode_TypeDef */ - - FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. - This parameter can be set either to ENABLE or DISABLE */ -}EXTI_InitTypeDef; - -/** - * @} - */ - -/** @defgroup EXTI_Exported_Constants - * @{ - */ - -/** @defgroup EXTI_Lines - * @{ - */ - -#define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ -#define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ -#define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ -#define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ -#define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ -#define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ -#define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ -#define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ -#define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ -#define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ -#define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ -#define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ -#define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ -#define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ -#define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ -#define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ -#define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ -#define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ -#define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS - Wakeup from suspend event */ -#define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ - -#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) -#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ - ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ - ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ - ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ - ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ - ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ - ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ - ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ - ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ - ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) - - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup EXTI_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Exported_Functions - * @{ - */ - -void EXTI_DeInit(void); -void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); -void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); -void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); -FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); -void EXTI_ClearFlag(uint32_t EXTI_Line); -ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); -void EXTI_ClearITPendingBit(uint32_t EXTI_Line); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_EXTI_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_exti.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the EXTI firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_EXTI_H +#define __STM32F10x_EXTI_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup EXTI + * @{ + */ + +/** @defgroup EXTI_Exported_Types + * @{ + */ + +/** + * @brief EXTI mode enumeration + */ + +typedef enum +{ + EXTI_Mode_Interrupt = 0x00, + EXTI_Mode_Event = 0x04 +}EXTIMode_TypeDef; + +#define IS_EXTI_MODE(MODE) (((MODE) == EXTI_Mode_Interrupt) || ((MODE) == EXTI_Mode_Event)) + +/** + * @brief EXTI Trigger enumeration + */ + +typedef enum +{ + EXTI_Trigger_Rising = 0x08, + EXTI_Trigger_Falling = 0x0C, + EXTI_Trigger_Rising_Falling = 0x10 +}EXTITrigger_TypeDef; + +#define IS_EXTI_TRIGGER(TRIGGER) (((TRIGGER) == EXTI_Trigger_Rising) || \ + ((TRIGGER) == EXTI_Trigger_Falling) || \ + ((TRIGGER) == EXTI_Trigger_Rising_Falling)) +/** + * @brief EXTI Init Structure definition + */ + +typedef struct +{ + uint32_t EXTI_Line; /*!< Specifies the EXTI lines to be enabled or disabled. + This parameter can be any combination of @ref EXTI_Lines */ + + EXTIMode_TypeDef EXTI_Mode; /*!< Specifies the mode for the EXTI lines. + This parameter can be a value of @ref EXTIMode_TypeDef */ + + EXTITrigger_TypeDef EXTI_Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines. + This parameter can be a value of @ref EXTIMode_TypeDef */ + + FunctionalState EXTI_LineCmd; /*!< Specifies the new state of the selected EXTI lines. + This parameter can be set either to ENABLE or DISABLE */ +}EXTI_InitTypeDef; + +/** + * @} + */ + +/** @defgroup EXTI_Exported_Constants + * @{ + */ + +/** @defgroup EXTI_Lines + * @{ + */ + +#define EXTI_Line0 ((uint32_t)0x00001) /*!< External interrupt line 0 */ +#define EXTI_Line1 ((uint32_t)0x00002) /*!< External interrupt line 1 */ +#define EXTI_Line2 ((uint32_t)0x00004) /*!< External interrupt line 2 */ +#define EXTI_Line3 ((uint32_t)0x00008) /*!< External interrupt line 3 */ +#define EXTI_Line4 ((uint32_t)0x00010) /*!< External interrupt line 4 */ +#define EXTI_Line5 ((uint32_t)0x00020) /*!< External interrupt line 5 */ +#define EXTI_Line6 ((uint32_t)0x00040) /*!< External interrupt line 6 */ +#define EXTI_Line7 ((uint32_t)0x00080) /*!< External interrupt line 7 */ +#define EXTI_Line8 ((uint32_t)0x00100) /*!< External interrupt line 8 */ +#define EXTI_Line9 ((uint32_t)0x00200) /*!< External interrupt line 9 */ +#define EXTI_Line10 ((uint32_t)0x00400) /*!< External interrupt line 10 */ +#define EXTI_Line11 ((uint32_t)0x00800) /*!< External interrupt line 11 */ +#define EXTI_Line12 ((uint32_t)0x01000) /*!< External interrupt line 12 */ +#define EXTI_Line13 ((uint32_t)0x02000) /*!< External interrupt line 13 */ +#define EXTI_Line14 ((uint32_t)0x04000) /*!< External interrupt line 14 */ +#define EXTI_Line15 ((uint32_t)0x08000) /*!< External interrupt line 15 */ +#define EXTI_Line16 ((uint32_t)0x10000) /*!< External interrupt line 16 Connected to the PVD Output */ +#define EXTI_Line17 ((uint32_t)0x20000) /*!< External interrupt line 17 Connected to the RTC Alarm event */ +#define EXTI_Line18 ((uint32_t)0x40000) /*!< External interrupt line 18 Connected to the USB Device/USB OTG FS + Wakeup from suspend event */ +#define EXTI_Line19 ((uint32_t)0x80000) /*!< External interrupt line 19 Connected to the Ethernet Wakeup event */ + +#define IS_EXTI_LINE(LINE) ((((LINE) & (uint32_t)0xFFF00000) == 0x00) && ((LINE) != (uint16_t)0x00)) +#define IS_GET_EXTI_LINE(LINE) (((LINE) == EXTI_Line0) || ((LINE) == EXTI_Line1) || \ + ((LINE) == EXTI_Line2) || ((LINE) == EXTI_Line3) || \ + ((LINE) == EXTI_Line4) || ((LINE) == EXTI_Line5) || \ + ((LINE) == EXTI_Line6) || ((LINE) == EXTI_Line7) || \ + ((LINE) == EXTI_Line8) || ((LINE) == EXTI_Line9) || \ + ((LINE) == EXTI_Line10) || ((LINE) == EXTI_Line11) || \ + ((LINE) == EXTI_Line12) || ((LINE) == EXTI_Line13) || \ + ((LINE) == EXTI_Line14) || ((LINE) == EXTI_Line15) || \ + ((LINE) == EXTI_Line16) || ((LINE) == EXTI_Line17) || \ + ((LINE) == EXTI_Line18) || ((LINE) == EXTI_Line19)) + + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup EXTI_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Exported_Functions + * @{ + */ + +void EXTI_DeInit(void); +void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct); +void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct); +void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line); +FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line); +void EXTI_ClearFlag(uint32_t EXTI_Line); +ITStatus EXTI_GetITStatus(uint32_t EXTI_Line); +void EXTI_ClearITPendingBit(uint32_t EXTI_Line); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_EXTI_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h index 63720dea..f46d4e87 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_flash.h @@ -1,426 +1,426 @@ -/** - ****************************************************************************** - * @file stm32f10x_flash.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the FLASH - * firmware library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_FLASH_H -#define __STM32F10x_FLASH_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup FLASH - * @{ - */ - -/** @defgroup FLASH_Exported_Types - * @{ - */ - -/** - * @brief FLASH Status - */ - -typedef enum -{ - FLASH_BUSY = 1, - FLASH_ERROR_PG, - FLASH_ERROR_WRP, - FLASH_COMPLETE, - FLASH_TIMEOUT -}FLASH_Status; - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Constants - * @{ - */ - -/** @defgroup Flash_Latency - * @{ - */ - -#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */ -#define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */ -#define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */ -#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ - ((LATENCY) == FLASH_Latency_1) || \ - ((LATENCY) == FLASH_Latency_2)) -/** - * @} - */ - -/** @defgroup Half_Cycle_Enable_Disable - * @{ - */ - -#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */ -#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */ -#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \ - ((STATE) == FLASH_HalfCycleAccess_Disable)) -/** - * @} - */ - -/** @defgroup Prefetch_Buffer_Enable_Disable - * @{ - */ - -#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */ -#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */ -#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \ - ((STATE) == FLASH_PrefetchBuffer_Disable)) -/** - * @} - */ - -/** @defgroup Option_Bytes_Write_Protection - * @{ - */ - -/* Values to be used with STM32 Low and Medium density devices */ -#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */ -#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */ -#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */ -#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */ -#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */ -#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */ -#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */ -#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */ - -/* Values to be used with STM32 Medium-density devices */ -#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */ -#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */ -#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */ -#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */ -#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */ -#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */ -#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */ -#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */ -#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */ -#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */ -#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */ -#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */ -#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */ -#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */ -#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */ -#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */ -#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */ -#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */ -#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */ -#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */ -#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */ -#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */ -#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */ -#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */ - -/* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */ -#define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 0 to 1 */ -#define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 2 to 3 */ -#define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 4 to 5 */ -#define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 6 to 7 */ -#define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 8 to 9 */ -#define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 10 to 11 */ -#define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 12 to 13 */ -#define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 14 to 15 */ -#define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 16 to 17 */ -#define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 18 to 19 */ -#define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 20 to 21 */ -#define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 22 to 23 */ -#define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 24 to 25 */ -#define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 26 to 27 */ -#define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 28 to 29 */ -#define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 30 to 31 */ -#define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 32 to 33 */ -#define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 34 to 35 */ -#define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 36 to 37 */ -#define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 38 to 39 */ -#define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 40 to 41 */ -#define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 42 to 43 */ -#define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 44 to 45 */ -#define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 46 to 47 */ -#define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 48 to 49 */ -#define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 50 to 51 */ -#define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 52 to 53 */ -#define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 54 to 55 */ -#define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 56 to 57 */ -#define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 58 to 59 */ -#define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 High-density, XL-density and Connectivity line devices: - Write protection of page 60 to 61 */ -#define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */ -#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */ -#define FLASH_WRProt_Pages62to511 ((uint32_t)0x80000000) /*!< STM32 XL-density devices: Write protection of page 62 to 511 */ - -#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ - -#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000)) - -#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) - -#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806)) - -/** - * @} - */ - -/** @defgroup Option_Bytes_IWatchdog - * @{ - */ - -#define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ -#define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ -#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) - -/** - * @} - */ - -/** @defgroup Option_Bytes_nRST_STOP - * @{ - */ - -#define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ -#define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ -#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) - -/** - * @} - */ - -/** @defgroup Option_Bytes_nRST_STDBY - * @{ - */ - -#define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ -#define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ -#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) - -#ifdef STM32F10X_XL -/** - * @} - */ -/** @defgroup FLASH_Boot - * @{ - */ -#define FLASH_BOOT_Bank1 ((uint16_t)0x0000) /*!< At startup, if boot pins are set in boot from user Flash position - and this parameter is selected the device will boot from Bank1(Default) */ -#define FLASH_BOOT_Bank2 ((uint16_t)0x0001) /*!< At startup, if boot pins are set in boot from user Flash position - and this parameter is selected the device will boot from Bank 2 or Bank 1, - depending on the activation of the bank */ -#define IS_FLASH_BOOT(BOOT) (((BOOT) == FLASH_BOOT_Bank1) || ((BOOT) == FLASH_BOOT_Bank2)) -#endif -/** - * @} - */ -/** @defgroup FLASH_Interrupts - * @{ - */ -#ifdef STM32F10X_XL -#define FLASH_IT_BANK2_ERROR ((uint32_t)0x80000400) /*!< FPEC BANK2 error interrupt source */ -#define FLASH_IT_BANK2_EOP ((uint32_t)0x80001000) /*!< End of FLASH BANK2 Operation Interrupt source */ - -#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */ -#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */ - -#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC BANK1 error interrupt source */ -#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH BANK1 Operation Interrupt source */ -#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0x7FFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) -#else -#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */ -#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */ -#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */ -#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */ - -#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) -#endif - -/** - * @} - */ - -/** @defgroup FLASH_Flags - * @{ - */ -#ifdef STM32F10X_XL -#define FLASH_FLAG_BANK2_BSY ((uint32_t)0x80000001) /*!< FLASH BANK2 Busy flag */ -#define FLASH_FLAG_BANK2_EOP ((uint32_t)0x80000020) /*!< FLASH BANK2 End of Operation flag */ -#define FLASH_FLAG_BANK2_PGERR ((uint32_t)0x80000004) /*!< FLASH BANK2 Program error flag */ -#define FLASH_FLAG_BANK2_WRPRTERR ((uint32_t)0x80000010) /*!< FLASH BANK2 Write protected error flag */ - -#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/ -#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */ -#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */ -#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */ - -#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ -#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ -#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ -#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ -#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ - -#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0x7FFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) -#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ - ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ - ((FLAG) == FLASH_FLAG_OPTERR)|| \ - ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \ - ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \ - ((FLAG) == FLASH_FLAG_BANK2_BSY) || ((FLAG) == FLASH_FLAG_BANK2_EOP) || \ - ((FLAG) == FLASH_FLAG_BANK2_PGERR) || ((FLAG) == FLASH_FLAG_BANK2_WRPRTERR)) -#else -#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ -#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ -#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ -#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ -#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ - -#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/ -#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */ -#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */ -#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */ - -#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) -#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ - ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ - ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \ - ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \ - ((FLAG) == FLASH_FLAG_OPTERR)) -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Exported_Functions - * @{ - */ - -/*------------ Functions used for all STM32F10x devices -----*/ -void FLASH_SetLatency(uint32_t FLASH_Latency); -void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess); -void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer); -void FLASH_Unlock(void); -void FLASH_Lock(void); -FLASH_Status FLASH_ErasePage(uint32_t Page_Address); -FLASH_Status FLASH_EraseAllPages(void); -FLASH_Status FLASH_EraseOptionBytes(void); -FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); -FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); -FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages); -FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState); -FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY); -uint32_t FLASH_GetUserOptionByte(void); -uint32_t FLASH_GetWriteProtectionOptionByte(void); -FlagStatus FLASH_GetReadOutProtectionStatus(void); -FlagStatus FLASH_GetPrefetchBufferStatus(void); -void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); -FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); -void FLASH_ClearFlag(uint32_t FLASH_FLAG); -FLASH_Status FLASH_GetStatus(void); -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); - -/*------------ New function used for all STM32F10x devices -----*/ -void FLASH_UnlockBank1(void); -void FLASH_LockBank1(void); -FLASH_Status FLASH_EraseAllBank1Pages(void); -FLASH_Status FLASH_GetBank1Status(void); -FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout); - -#ifdef STM32F10X_XL -/*---- New Functions used only with STM32F10x_XL density devices -----*/ -void FLASH_UnlockBank2(void); -void FLASH_LockBank2(void); -FLASH_Status FLASH_EraseAllBank2Pages(void); -FLASH_Status FLASH_GetBank2Status(void); -FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout); -FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT); -#endif - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_FLASH_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_flash.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the FLASH + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_FLASH_H +#define __STM32F10x_FLASH_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup FLASH + * @{ + */ + +/** @defgroup FLASH_Exported_Types + * @{ + */ + +/** + * @brief FLASH Status + */ + +typedef enum +{ + FLASH_BUSY = 1, + FLASH_ERROR_PG, + FLASH_ERROR_WRP, + FLASH_COMPLETE, + FLASH_TIMEOUT +}FLASH_Status; + +/** + * @} + */ + +/** @defgroup FLASH_Exported_Constants + * @{ + */ + +/** @defgroup Flash_Latency + * @{ + */ + +#define FLASH_Latency_0 ((uint32_t)0x00000000) /*!< FLASH Zero Latency cycle */ +#define FLASH_Latency_1 ((uint32_t)0x00000001) /*!< FLASH One Latency cycle */ +#define FLASH_Latency_2 ((uint32_t)0x00000002) /*!< FLASH Two Latency cycles */ +#define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \ + ((LATENCY) == FLASH_Latency_1) || \ + ((LATENCY) == FLASH_Latency_2)) +/** + * @} + */ + +/** @defgroup Half_Cycle_Enable_Disable + * @{ + */ + +#define FLASH_HalfCycleAccess_Enable ((uint32_t)0x00000008) /*!< FLASH Half Cycle Enable */ +#define FLASH_HalfCycleAccess_Disable ((uint32_t)0x00000000) /*!< FLASH Half Cycle Disable */ +#define IS_FLASH_HALFCYCLEACCESS_STATE(STATE) (((STATE) == FLASH_HalfCycleAccess_Enable) || \ + ((STATE) == FLASH_HalfCycleAccess_Disable)) +/** + * @} + */ + +/** @defgroup Prefetch_Buffer_Enable_Disable + * @{ + */ + +#define FLASH_PrefetchBuffer_Enable ((uint32_t)0x00000010) /*!< FLASH Prefetch Buffer Enable */ +#define FLASH_PrefetchBuffer_Disable ((uint32_t)0x00000000) /*!< FLASH Prefetch Buffer Disable */ +#define IS_FLASH_PREFETCHBUFFER_STATE(STATE) (((STATE) == FLASH_PrefetchBuffer_Enable) || \ + ((STATE) == FLASH_PrefetchBuffer_Disable)) +/** + * @} + */ + +/** @defgroup Option_Bytes_Write_Protection + * @{ + */ + +/* Values to be used with STM32 Low and Medium density devices */ +#define FLASH_WRProt_Pages0to3 ((uint32_t)0x00000001) /*!< STM32 Low and Medium density devices: Write protection of page 0 to 3 */ +#define FLASH_WRProt_Pages4to7 ((uint32_t)0x00000002) /*!< STM32 Low and Medium density devices: Write protection of page 4 to 7 */ +#define FLASH_WRProt_Pages8to11 ((uint32_t)0x00000004) /*!< STM32 Low and Medium density devices: Write protection of page 8 to 11 */ +#define FLASH_WRProt_Pages12to15 ((uint32_t)0x00000008) /*!< STM32 Low and Medium density devices: Write protection of page 12 to 15 */ +#define FLASH_WRProt_Pages16to19 ((uint32_t)0x00000010) /*!< STM32 Low and Medium density devices: Write protection of page 16 to 19 */ +#define FLASH_WRProt_Pages20to23 ((uint32_t)0x00000020) /*!< STM32 Low and Medium density devices: Write protection of page 20 to 23 */ +#define FLASH_WRProt_Pages24to27 ((uint32_t)0x00000040) /*!< STM32 Low and Medium density devices: Write protection of page 24 to 27 */ +#define FLASH_WRProt_Pages28to31 ((uint32_t)0x00000080) /*!< STM32 Low and Medium density devices: Write protection of page 28 to 31 */ + +/* Values to be used with STM32 Medium-density devices */ +#define FLASH_WRProt_Pages32to35 ((uint32_t)0x00000100) /*!< STM32 Medium-density devices: Write protection of page 32 to 35 */ +#define FLASH_WRProt_Pages36to39 ((uint32_t)0x00000200) /*!< STM32 Medium-density devices: Write protection of page 36 to 39 */ +#define FLASH_WRProt_Pages40to43 ((uint32_t)0x00000400) /*!< STM32 Medium-density devices: Write protection of page 40 to 43 */ +#define FLASH_WRProt_Pages44to47 ((uint32_t)0x00000800) /*!< STM32 Medium-density devices: Write protection of page 44 to 47 */ +#define FLASH_WRProt_Pages48to51 ((uint32_t)0x00001000) /*!< STM32 Medium-density devices: Write protection of page 48 to 51 */ +#define FLASH_WRProt_Pages52to55 ((uint32_t)0x00002000) /*!< STM32 Medium-density devices: Write protection of page 52 to 55 */ +#define FLASH_WRProt_Pages56to59 ((uint32_t)0x00004000) /*!< STM32 Medium-density devices: Write protection of page 56 to 59 */ +#define FLASH_WRProt_Pages60to63 ((uint32_t)0x00008000) /*!< STM32 Medium-density devices: Write protection of page 60 to 63 */ +#define FLASH_WRProt_Pages64to67 ((uint32_t)0x00010000) /*!< STM32 Medium-density devices: Write protection of page 64 to 67 */ +#define FLASH_WRProt_Pages68to71 ((uint32_t)0x00020000) /*!< STM32 Medium-density devices: Write protection of page 68 to 71 */ +#define FLASH_WRProt_Pages72to75 ((uint32_t)0x00040000) /*!< STM32 Medium-density devices: Write protection of page 72 to 75 */ +#define FLASH_WRProt_Pages76to79 ((uint32_t)0x00080000) /*!< STM32 Medium-density devices: Write protection of page 76 to 79 */ +#define FLASH_WRProt_Pages80to83 ((uint32_t)0x00100000) /*!< STM32 Medium-density devices: Write protection of page 80 to 83 */ +#define FLASH_WRProt_Pages84to87 ((uint32_t)0x00200000) /*!< STM32 Medium-density devices: Write protection of page 84 to 87 */ +#define FLASH_WRProt_Pages88to91 ((uint32_t)0x00400000) /*!< STM32 Medium-density devices: Write protection of page 88 to 91 */ +#define FLASH_WRProt_Pages92to95 ((uint32_t)0x00800000) /*!< STM32 Medium-density devices: Write protection of page 92 to 95 */ +#define FLASH_WRProt_Pages96to99 ((uint32_t)0x01000000) /*!< STM32 Medium-density devices: Write protection of page 96 to 99 */ +#define FLASH_WRProt_Pages100to103 ((uint32_t)0x02000000) /*!< STM32 Medium-density devices: Write protection of page 100 to 103 */ +#define FLASH_WRProt_Pages104to107 ((uint32_t)0x04000000) /*!< STM32 Medium-density devices: Write protection of page 104 to 107 */ +#define FLASH_WRProt_Pages108to111 ((uint32_t)0x08000000) /*!< STM32 Medium-density devices: Write protection of page 108 to 111 */ +#define FLASH_WRProt_Pages112to115 ((uint32_t)0x10000000) /*!< STM32 Medium-density devices: Write protection of page 112 to 115 */ +#define FLASH_WRProt_Pages116to119 ((uint32_t)0x20000000) /*!< STM32 Medium-density devices: Write protection of page 115 to 119 */ +#define FLASH_WRProt_Pages120to123 ((uint32_t)0x40000000) /*!< STM32 Medium-density devices: Write protection of page 120 to 123 */ +#define FLASH_WRProt_Pages124to127 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 124 to 127 */ + +/* Values to be used with STM32 High-density and STM32F10X Connectivity line devices */ +#define FLASH_WRProt_Pages0to1 ((uint32_t)0x00000001) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 0 to 1 */ +#define FLASH_WRProt_Pages2to3 ((uint32_t)0x00000002) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 2 to 3 */ +#define FLASH_WRProt_Pages4to5 ((uint32_t)0x00000004) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 4 to 5 */ +#define FLASH_WRProt_Pages6to7 ((uint32_t)0x00000008) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 6 to 7 */ +#define FLASH_WRProt_Pages8to9 ((uint32_t)0x00000010) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 8 to 9 */ +#define FLASH_WRProt_Pages10to11 ((uint32_t)0x00000020) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 10 to 11 */ +#define FLASH_WRProt_Pages12to13 ((uint32_t)0x00000040) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 12 to 13 */ +#define FLASH_WRProt_Pages14to15 ((uint32_t)0x00000080) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 14 to 15 */ +#define FLASH_WRProt_Pages16to17 ((uint32_t)0x00000100) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 16 to 17 */ +#define FLASH_WRProt_Pages18to19 ((uint32_t)0x00000200) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 18 to 19 */ +#define FLASH_WRProt_Pages20to21 ((uint32_t)0x00000400) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 20 to 21 */ +#define FLASH_WRProt_Pages22to23 ((uint32_t)0x00000800) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 22 to 23 */ +#define FLASH_WRProt_Pages24to25 ((uint32_t)0x00001000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 24 to 25 */ +#define FLASH_WRProt_Pages26to27 ((uint32_t)0x00002000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 26 to 27 */ +#define FLASH_WRProt_Pages28to29 ((uint32_t)0x00004000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 28 to 29 */ +#define FLASH_WRProt_Pages30to31 ((uint32_t)0x00008000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 30 to 31 */ +#define FLASH_WRProt_Pages32to33 ((uint32_t)0x00010000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 32 to 33 */ +#define FLASH_WRProt_Pages34to35 ((uint32_t)0x00020000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 34 to 35 */ +#define FLASH_WRProt_Pages36to37 ((uint32_t)0x00040000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 36 to 37 */ +#define FLASH_WRProt_Pages38to39 ((uint32_t)0x00080000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 38 to 39 */ +#define FLASH_WRProt_Pages40to41 ((uint32_t)0x00100000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 40 to 41 */ +#define FLASH_WRProt_Pages42to43 ((uint32_t)0x00200000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 42 to 43 */ +#define FLASH_WRProt_Pages44to45 ((uint32_t)0x00400000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 44 to 45 */ +#define FLASH_WRProt_Pages46to47 ((uint32_t)0x00800000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 46 to 47 */ +#define FLASH_WRProt_Pages48to49 ((uint32_t)0x01000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 48 to 49 */ +#define FLASH_WRProt_Pages50to51 ((uint32_t)0x02000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 50 to 51 */ +#define FLASH_WRProt_Pages52to53 ((uint32_t)0x04000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 52 to 53 */ +#define FLASH_WRProt_Pages54to55 ((uint32_t)0x08000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 54 to 55 */ +#define FLASH_WRProt_Pages56to57 ((uint32_t)0x10000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 56 to 57 */ +#define FLASH_WRProt_Pages58to59 ((uint32_t)0x20000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 58 to 59 */ +#define FLASH_WRProt_Pages60to61 ((uint32_t)0x40000000) /*!< STM32 High-density, XL-density and Connectivity line devices: + Write protection of page 60 to 61 */ +#define FLASH_WRProt_Pages62to127 ((uint32_t)0x80000000) /*!< STM32 Connectivity line devices: Write protection of page 62 to 127 */ +#define FLASH_WRProt_Pages62to255 ((uint32_t)0x80000000) /*!< STM32 Medium-density devices: Write protection of page 62 to 255 */ +#define FLASH_WRProt_Pages62to511 ((uint32_t)0x80000000) /*!< STM32 XL-density devices: Write protection of page 62 to 511 */ + +#define FLASH_WRProt_AllPages ((uint32_t)0xFFFFFFFF) /*!< Write protection of all Pages */ + +#define IS_FLASH_WRPROT_PAGE(PAGE) (((PAGE) != 0x00000000)) + +#define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= 0x08000000) && ((ADDRESS) < 0x080FFFFF)) + +#define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == 0x1FFFF804) || ((ADDRESS) == 0x1FFFF806)) + +/** + * @} + */ + +/** @defgroup Option_Bytes_IWatchdog + * @{ + */ + +#define OB_IWDG_SW ((uint16_t)0x0001) /*!< Software IWDG selected */ +#define OB_IWDG_HW ((uint16_t)0x0000) /*!< Hardware IWDG selected */ +#define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) + +/** + * @} + */ + +/** @defgroup Option_Bytes_nRST_STOP + * @{ + */ + +#define OB_STOP_NoRST ((uint16_t)0x0002) /*!< No reset generated when entering in STOP */ +#define OB_STOP_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STOP */ +#define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST)) + +/** + * @} + */ + +/** @defgroup Option_Bytes_nRST_STDBY + * @{ + */ + +#define OB_STDBY_NoRST ((uint16_t)0x0004) /*!< No reset generated when entering in STANDBY */ +#define OB_STDBY_RST ((uint16_t)0x0000) /*!< Reset generated when entering in STANDBY */ +#define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST)) + +#ifdef STM32F10X_XL +/** + * @} + */ +/** @defgroup FLASH_Boot + * @{ + */ +#define FLASH_BOOT_Bank1 ((uint16_t)0x0000) /*!< At startup, if boot pins are set in boot from user Flash position + and this parameter is selected the device will boot from Bank1(Default) */ +#define FLASH_BOOT_Bank2 ((uint16_t)0x0001) /*!< At startup, if boot pins are set in boot from user Flash position + and this parameter is selected the device will boot from Bank 2 or Bank 1, + depending on the activation of the bank */ +#define IS_FLASH_BOOT(BOOT) (((BOOT) == FLASH_BOOT_Bank1) || ((BOOT) == FLASH_BOOT_Bank2)) +#endif +/** + * @} + */ +/** @defgroup FLASH_Interrupts + * @{ + */ +#ifdef STM32F10X_XL +#define FLASH_IT_BANK2_ERROR ((uint32_t)0x80000400) /*!< FPEC BANK2 error interrupt source */ +#define FLASH_IT_BANK2_EOP ((uint32_t)0x80001000) /*!< End of FLASH BANK2 Operation Interrupt source */ + +#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */ +#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */ + +#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC BANK1 error interrupt source */ +#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH BANK1 Operation Interrupt source */ +#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0x7FFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) +#else +#define FLASH_IT_ERROR ((uint32_t)0x00000400) /*!< FPEC error interrupt source */ +#define FLASH_IT_EOP ((uint32_t)0x00001000) /*!< End of FLASH Operation Interrupt source */ +#define FLASH_IT_BANK1_ERROR FLASH_IT_ERROR /*!< FPEC BANK1 error interrupt source */ +#define FLASH_IT_BANK1_EOP FLASH_IT_EOP /*!< End of FLASH BANK1 Operation Interrupt source */ + +#define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFFFFEBFF) == 0x00000000) && (((IT) != 0x00000000))) +#endif + +/** + * @} + */ + +/** @defgroup FLASH_Flags + * @{ + */ +#ifdef STM32F10X_XL +#define FLASH_FLAG_BANK2_BSY ((uint32_t)0x80000001) /*!< FLASH BANK2 Busy flag */ +#define FLASH_FLAG_BANK2_EOP ((uint32_t)0x80000020) /*!< FLASH BANK2 End of Operation flag */ +#define FLASH_FLAG_BANK2_PGERR ((uint32_t)0x80000004) /*!< FLASH BANK2 Program error flag */ +#define FLASH_FLAG_BANK2_WRPRTERR ((uint32_t)0x80000010) /*!< FLASH BANK2 Write protected error flag */ + +#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/ +#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */ +#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */ +#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */ + +#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ +#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ +#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ +#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ +#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ + +#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0x7FFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) +#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ + ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_OPTERR)|| \ + ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \ + ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_BANK2_BSY) || ((FLAG) == FLASH_FLAG_BANK2_EOP) || \ + ((FLAG) == FLASH_FLAG_BANK2_PGERR) || ((FLAG) == FLASH_FLAG_BANK2_WRPRTERR)) +#else +#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /*!< FLASH Busy flag */ +#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /*!< FLASH End of Operation flag */ +#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /*!< FLASH Program error flag */ +#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */ +#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /*!< FLASH Option Byte error flag */ + +#define FLASH_FLAG_BANK1_BSY FLASH_FLAG_BSY /*!< FLASH BANK1 Busy flag*/ +#define FLASH_FLAG_BANK1_EOP FLASH_FLAG_EOP /*!< FLASH BANK1 End of Operation flag */ +#define FLASH_FLAG_BANK1_PGERR FLASH_FLAG_PGERR /*!< FLASH BANK1 Program error flag */ +#define FLASH_FLAG_BANK1_WRPRTERR FLASH_FLAG_WRPRTERR /*!< FLASH BANK1 Write protected error flag */ + +#define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFCA) == 0x00000000) && ((FLAG) != 0x00000000)) +#define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_EOP) || \ + ((FLAG) == FLASH_FLAG_PGERR) || ((FLAG) == FLASH_FLAG_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_BANK1_BSY) || ((FLAG) == FLASH_FLAG_BANK1_EOP) || \ + ((FLAG) == FLASH_FLAG_BANK1_PGERR) || ((FLAG) == FLASH_FLAG_BANK1_WRPRTERR) || \ + ((FLAG) == FLASH_FLAG_OPTERR)) +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup FLASH_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Exported_Functions + * @{ + */ + +/*------------ Functions used for all STM32F10x devices -----*/ +void FLASH_SetLatency(uint32_t FLASH_Latency); +void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess); +void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer); +void FLASH_Unlock(void); +void FLASH_Lock(void); +FLASH_Status FLASH_ErasePage(uint32_t Page_Address); +FLASH_Status FLASH_EraseAllPages(void); +FLASH_Status FLASH_EraseOptionBytes(void); +FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data); +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data); +FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data); +FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages); +FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState); +FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY); +uint32_t FLASH_GetUserOptionByte(void); +uint32_t FLASH_GetWriteProtectionOptionByte(void); +FlagStatus FLASH_GetReadOutProtectionStatus(void); +FlagStatus FLASH_GetPrefetchBufferStatus(void); +void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState); +FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG); +void FLASH_ClearFlag(uint32_t FLASH_FLAG); +FLASH_Status FLASH_GetStatus(void); +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout); + +/*------------ New function used for all STM32F10x devices -----*/ +void FLASH_UnlockBank1(void); +void FLASH_LockBank1(void); +FLASH_Status FLASH_EraseAllBank1Pages(void); +FLASH_Status FLASH_GetBank1Status(void); +FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout); + +#ifdef STM32F10X_XL +/*---- New Functions used only with STM32F10x_XL density devices -----*/ +void FLASH_UnlockBank2(void); +void FLASH_LockBank2(void); +FLASH_Status FLASH_EraseAllBank2Pages(void); +FLASH_Status FLASH_GetBank2Status(void); +FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout); +FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_FLASH_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h index 6e1769d9..ee707e74 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_fsmc.h @@ -1,733 +1,733 @@ -/** - ****************************************************************************** - * @file stm32f10x_fsmc.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the FSMC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_FSMC_H -#define __STM32F10x_FSMC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup FSMC - * @{ - */ - -/** @defgroup FSMC_Exported_Types - * @{ - */ - -/** - * @brief Timing parameters For NOR/SRAM Banks - */ - -typedef struct -{ - uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure - the duration of the address setup time. - This parameter can be a value between 0 and 0xF. - @note: It is not used with synchronous NOR Flash memories. */ - - uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure - the duration of the address hold time. - This parameter can be a value between 0 and 0xF. - @note: It is not used with synchronous NOR Flash memories.*/ - - uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure - the duration of the data setup time. - This parameter can be a value between 0 and 0xFF. - @note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */ - - uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure - the duration of the bus turnaround. - This parameter can be a value between 0 and 0xF. - @note: It is only used for multiplexed NOR Flash memories. */ - - uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles. - This parameter can be a value between 1 and 0xF. - @note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */ - - uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue - to the memory before getting the first data. - The value of this parameter depends on the memory type as shown below: - - It must be set to 0 in case of a CRAM - - It is don't care in asynchronous NOR, SRAM or ROM accesses - - It may assume a value between 0 and 0xF in NOR Flash memories - with synchronous burst mode enable */ - - uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode. - This parameter can be a value of @ref FSMC_Access_Mode */ -}FSMC_NORSRAMTimingInitTypeDef; - -/** - * @brief FSMC NOR/SRAM Init structure definition - */ - -typedef struct -{ - uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used. - This parameter can be a value of @ref FSMC_NORSRAM_Bank */ - - uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are - multiplexed on the databus or not. - This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */ - - uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to - the corresponding memory bank. - This parameter can be a value of @ref FSMC_Memory_Type */ - - uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be a value of @ref FSMC_Data_Width */ - - uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, - valid only with synchronous burst Flash memories. - This parameter can be a value of @ref FSMC_Burst_Access_Mode */ - - uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, - valid only with asynchronous Flash memories. - This parameter can be a value of @ref FSMC_AsynchronousWait */ - - uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing - the Flash memory in burst mode. - This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */ - - uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash - memory, valid only when accessing Flash memories in burst mode. - This parameter can be a value of @ref FSMC_Wrap_Mode */ - - uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one - clock cycle before the wait state or during the wait state, - valid only when accessing memories in burst mode. - This parameter can be a value of @ref FSMC_Wait_Timing */ - - uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC. - This parameter can be a value of @ref FSMC_Write_Operation */ - - uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait - signal, valid for Flash memory access in burst mode. - This parameter can be a value of @ref FSMC_Wait_Signal */ - - uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode. - This parameter can be a value of @ref FSMC_Extended_Mode */ - - uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation. - This parameter can be a value of @ref FSMC_Write_Burst */ - - FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/ - - FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/ -}FSMC_NORSRAMInitTypeDef; - -/** - * @brief Timing parameters For FSMC NAND and PCCARD Banks - */ - -typedef struct -{ - uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before - the command assertion for NAND-Flash read or write access - to common/Attribute or I/O memory space (depending on - the memory space timing to be configured). - This parameter can be a value between 0 and 0xFF.*/ - - uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the - command for NAND-Flash read or write access to - common/Attribute or I/O memory space (depending on the - memory space timing to be configured). - This parameter can be a number between 0x00 and 0xFF */ - - uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address - (and data for write access) after the command deassertion - for NAND-Flash read or write access to common/Attribute - or I/O memory space (depending on the memory space timing - to be configured). - This parameter can be a number between 0x00 and 0xFF */ - - uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the - databus is kept in HiZ after the start of a NAND-Flash - write access to common/Attribute or I/O memory space (depending - on the memory space timing to be configured). - This parameter can be a number between 0x00 and 0xFF */ -}FSMC_NAND_PCCARDTimingInitTypeDef; - -/** - * @brief FSMC NAND Init structure definition - */ - -typedef struct -{ - uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used. - This parameter can be a value of @ref FSMC_NAND_Bank */ - - uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank. - This parameter can be any value of @ref FSMC_Wait_feature */ - - uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. - This parameter can be any value of @ref FSMC_Data_Width */ - - uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation. - This parameter can be any value of @ref FSMC_ECC */ - - uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC. - This parameter can be any value of @ref FSMC_ECC_Page_Size */ - - uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between CLE low and RE low. - This parameter can be a value between 0 and 0xFF. */ - - uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between ALE low and RE low. - This parameter can be a number between 0x0 and 0xFF */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ -}FSMC_NANDInitTypeDef; - -/** - * @brief FSMC PCCARD Init structure definition - */ - -typedef struct -{ - uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank. - This parameter can be any value of @ref FSMC_Wait_feature */ - - uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between CLE low and RE low. - This parameter can be a value between 0 and 0xFF. */ - - uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the - delay between ALE low and RE low. - This parameter can be a number between 0x0 and 0xFF */ - - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ - - FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */ -}FSMC_PCCARDInitTypeDef; - -/** - * @} - */ - -/** @defgroup FSMC_Exported_Constants - * @{ - */ - -/** @defgroup FSMC_NORSRAM_Bank - * @{ - */ -#define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000) -#define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002) -#define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004) -#define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006) -/** - * @} - */ - -/** @defgroup FSMC_NAND_Bank - * @{ - */ -#define FSMC_Bank2_NAND ((uint32_t)0x00000010) -#define FSMC_Bank3_NAND ((uint32_t)0x00000100) -/** - * @} - */ - -/** @defgroup FSMC_PCCARD_Bank - * @{ - */ -#define FSMC_Bank4_PCCARD ((uint32_t)0x00001000) -/** - * @} - */ - -#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \ - ((BANK) == FSMC_Bank1_NORSRAM2) || \ - ((BANK) == FSMC_Bank1_NORSRAM3) || \ - ((BANK) == FSMC_Bank1_NORSRAM4)) - -#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ - ((BANK) == FSMC_Bank3_NAND)) - -#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ - ((BANK) == FSMC_Bank3_NAND) || \ - ((BANK) == FSMC_Bank4_PCCARD)) - -#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ - ((BANK) == FSMC_Bank3_NAND) || \ - ((BANK) == FSMC_Bank4_PCCARD)) - -/** @defgroup NOR_SRAM_Controller - * @{ - */ - -/** @defgroup FSMC_Data_Address_Bus_Multiplexing - * @{ - */ - -#define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000) -#define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002) -#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \ - ((MUX) == FSMC_DataAddressMux_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Memory_Type - * @{ - */ - -#define FSMC_MemoryType_SRAM ((uint32_t)0x00000000) -#define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004) -#define FSMC_MemoryType_NOR ((uint32_t)0x00000008) -#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \ - ((MEMORY) == FSMC_MemoryType_PSRAM)|| \ - ((MEMORY) == FSMC_MemoryType_NOR)) - -/** - * @} - */ - -/** @defgroup FSMC_Data_Width - * @{ - */ - -#define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000) -#define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010) -#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \ - ((WIDTH) == FSMC_MemoryDataWidth_16b)) - -/** - * @} - */ - -/** @defgroup FSMC_Burst_Access_Mode - * @{ - */ - -#define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000) -#define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100) -#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \ - ((STATE) == FSMC_BurstAccessMode_Enable)) -/** - * @} - */ - -/** @defgroup FSMC_AsynchronousWait - * @{ - */ -#define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000) -#define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000) -#define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \ - ((STATE) == FSMC_AsynchronousWait_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Signal_Polarity - * @{ - */ - -#define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000) -#define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200) -#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \ - ((POLARITY) == FSMC_WaitSignalPolarity_High)) - -/** - * @} - */ - -/** @defgroup FSMC_Wrap_Mode - * @{ - */ - -#define FSMC_WrapMode_Disable ((uint32_t)0x00000000) -#define FSMC_WrapMode_Enable ((uint32_t)0x00000400) -#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \ - ((MODE) == FSMC_WrapMode_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Timing - * @{ - */ - -#define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000) -#define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800) -#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \ - ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState)) - -/** - * @} - */ - -/** @defgroup FSMC_Write_Operation - * @{ - */ - -#define FSMC_WriteOperation_Disable ((uint32_t)0x00000000) -#define FSMC_WriteOperation_Enable ((uint32_t)0x00001000) -#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \ - ((OPERATION) == FSMC_WriteOperation_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Signal - * @{ - */ - -#define FSMC_WaitSignal_Disable ((uint32_t)0x00000000) -#define FSMC_WaitSignal_Enable ((uint32_t)0x00002000) -#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \ - ((SIGNAL) == FSMC_WaitSignal_Enable)) -/** - * @} - */ - -/** @defgroup FSMC_Extended_Mode - * @{ - */ - -#define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000) -#define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000) - -#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \ - ((MODE) == FSMC_ExtendedMode_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_Write_Burst - * @{ - */ - -#define FSMC_WriteBurst_Disable ((uint32_t)0x00000000) -#define FSMC_WriteBurst_Enable ((uint32_t)0x00080000) -#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \ - ((BURST) == FSMC_WriteBurst_Enable)) -/** - * @} - */ - -/** @defgroup FSMC_Address_Setup_Time - * @{ - */ - -#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Address_Hold_Time - * @{ - */ - -#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Data_Setup_Time - * @{ - */ - -#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF)) - -/** - * @} - */ - -/** @defgroup FSMC_Bus_Turn_around_Duration - * @{ - */ - -#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_CLK_Division - * @{ - */ - -#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Data_Latency - * @{ - */ - -#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF) - -/** - * @} - */ - -/** @defgroup FSMC_Access_Mode - * @{ - */ - -#define FSMC_AccessMode_A ((uint32_t)0x00000000) -#define FSMC_AccessMode_B ((uint32_t)0x10000000) -#define FSMC_AccessMode_C ((uint32_t)0x20000000) -#define FSMC_AccessMode_D ((uint32_t)0x30000000) -#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \ - ((MODE) == FSMC_AccessMode_B) || \ - ((MODE) == FSMC_AccessMode_C) || \ - ((MODE) == FSMC_AccessMode_D)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup NAND_PCCARD_Controller - * @{ - */ - -/** @defgroup FSMC_Wait_feature - * @{ - */ - -#define FSMC_Waitfeature_Disable ((uint32_t)0x00000000) -#define FSMC_Waitfeature_Enable ((uint32_t)0x00000002) -#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \ - ((FEATURE) == FSMC_Waitfeature_Enable)) - -/** - * @} - */ - - -/** @defgroup FSMC_ECC - * @{ - */ - -#define FSMC_ECC_Disable ((uint32_t)0x00000000) -#define FSMC_ECC_Enable ((uint32_t)0x00000040) -#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \ - ((STATE) == FSMC_ECC_Enable)) - -/** - * @} - */ - -/** @defgroup FSMC_ECC_Page_Size - * @{ - */ - -#define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000) -#define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000) -#define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000) -#define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000) -#define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000) -#define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000) -#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_512Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \ - ((SIZE) == FSMC_ECCPageSize_8192Bytes)) - -/** - * @} - */ - -/** @defgroup FSMC_TCLR_Setup_Time - * @{ - */ - -#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_TAR_Setup_Time - * @{ - */ - -#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Setup_Time - * @{ - */ - -#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Wait_Setup_Time - * @{ - */ - -#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Hold_Setup_Time - * @{ - */ - -#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_HiZ_Setup_Time - * @{ - */ - -#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF) - -/** - * @} - */ - -/** @defgroup FSMC_Interrupt_sources - * @{ - */ - -#define FSMC_IT_RisingEdge ((uint32_t)0x00000008) -#define FSMC_IT_Level ((uint32_t)0x00000010) -#define FSMC_IT_FallingEdge ((uint32_t)0x00000020) -#define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000)) -#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \ - ((IT) == FSMC_IT_Level) || \ - ((IT) == FSMC_IT_FallingEdge)) -/** - * @} - */ - -/** @defgroup FSMC_Flags - * @{ - */ - -#define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001) -#define FSMC_FLAG_Level ((uint32_t)0x00000002) -#define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004) -#define FSMC_FLAG_FEMPT ((uint32_t)0x00000040) -#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \ - ((FLAG) == FSMC_FLAG_Level) || \ - ((FLAG) == FSMC_FLAG_FallingEdge) || \ - ((FLAG) == FSMC_FLAG_FEMPT)) - -#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000)) - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup FSMC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Exported_Functions - * @{ - */ - -void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank); -void FSMC_NANDDeInit(uint32_t FSMC_Bank); -void FSMC_PCCARDDeInit(void); -void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); -void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); -void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); -void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); -void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); -void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); -void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState); -void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState); -void FSMC_PCCARDCmd(FunctionalState NewState); -void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState); -uint32_t FSMC_GetECC(uint32_t FSMC_Bank); -void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState); -FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); -void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); -ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT); -void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_FSMC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_fsmc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the FSMC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_FSMC_H +#define __STM32F10x_FSMC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup FSMC + * @{ + */ + +/** @defgroup FSMC_Exported_Types + * @{ + */ + +/** + * @brief Timing parameters For NOR/SRAM Banks + */ + +typedef struct +{ + uint32_t FSMC_AddressSetupTime; /*!< Defines the number of HCLK cycles to configure + the duration of the address setup time. + This parameter can be a value between 0 and 0xF. + @note: It is not used with synchronous NOR Flash memories. */ + + uint32_t FSMC_AddressHoldTime; /*!< Defines the number of HCLK cycles to configure + the duration of the address hold time. + This parameter can be a value between 0 and 0xF. + @note: It is not used with synchronous NOR Flash memories.*/ + + uint32_t FSMC_DataSetupTime; /*!< Defines the number of HCLK cycles to configure + the duration of the data setup time. + This parameter can be a value between 0 and 0xFF. + @note: It is used for SRAMs, ROMs and asynchronous multiplexed NOR Flash memories. */ + + uint32_t FSMC_BusTurnAroundDuration; /*!< Defines the number of HCLK cycles to configure + the duration of the bus turnaround. + This parameter can be a value between 0 and 0xF. + @note: It is only used for multiplexed NOR Flash memories. */ + + uint32_t FSMC_CLKDivision; /*!< Defines the period of CLK clock output signal, expressed in number of HCLK cycles. + This parameter can be a value between 1 and 0xF. + @note: This parameter is not used for asynchronous NOR Flash, SRAM or ROM accesses. */ + + uint32_t FSMC_DataLatency; /*!< Defines the number of memory clock cycles to issue + to the memory before getting the first data. + The value of this parameter depends on the memory type as shown below: + - It must be set to 0 in case of a CRAM + - It is don't care in asynchronous NOR, SRAM or ROM accesses + - It may assume a value between 0 and 0xF in NOR Flash memories + with synchronous burst mode enable */ + + uint32_t FSMC_AccessMode; /*!< Specifies the asynchronous access mode. + This parameter can be a value of @ref FSMC_Access_Mode */ +}FSMC_NORSRAMTimingInitTypeDef; + +/** + * @brief FSMC NOR/SRAM Init structure definition + */ + +typedef struct +{ + uint32_t FSMC_Bank; /*!< Specifies the NOR/SRAM memory bank that will be used. + This parameter can be a value of @ref FSMC_NORSRAM_Bank */ + + uint32_t FSMC_DataAddressMux; /*!< Specifies whether the address and data values are + multiplexed on the databus or not. + This parameter can be a value of @ref FSMC_Data_Address_Bus_Multiplexing */ + + uint32_t FSMC_MemoryType; /*!< Specifies the type of external memory attached to + the corresponding memory bank. + This parameter can be a value of @ref FSMC_Memory_Type */ + + uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. + This parameter can be a value of @ref FSMC_Data_Width */ + + uint32_t FSMC_BurstAccessMode; /*!< Enables or disables the burst access mode for Flash memory, + valid only with synchronous burst Flash memories. + This parameter can be a value of @ref FSMC_Burst_Access_Mode */ + + uint32_t FSMC_AsynchronousWait; /*!< Enables or disables wait signal during asynchronous transfers, + valid only with asynchronous Flash memories. + This parameter can be a value of @ref FSMC_AsynchronousWait */ + + uint32_t FSMC_WaitSignalPolarity; /*!< Specifies the wait signal polarity, valid only when accessing + the Flash memory in burst mode. + This parameter can be a value of @ref FSMC_Wait_Signal_Polarity */ + + uint32_t FSMC_WrapMode; /*!< Enables or disables the Wrapped burst access mode for Flash + memory, valid only when accessing Flash memories in burst mode. + This parameter can be a value of @ref FSMC_Wrap_Mode */ + + uint32_t FSMC_WaitSignalActive; /*!< Specifies if the wait signal is asserted by the memory one + clock cycle before the wait state or during the wait state, + valid only when accessing memories in burst mode. + This parameter can be a value of @ref FSMC_Wait_Timing */ + + uint32_t FSMC_WriteOperation; /*!< Enables or disables the write operation in the selected bank by the FSMC. + This parameter can be a value of @ref FSMC_Write_Operation */ + + uint32_t FSMC_WaitSignal; /*!< Enables or disables the wait-state insertion via wait + signal, valid for Flash memory access in burst mode. + This parameter can be a value of @ref FSMC_Wait_Signal */ + + uint32_t FSMC_ExtendedMode; /*!< Enables or disables the extended mode. + This parameter can be a value of @ref FSMC_Extended_Mode */ + + uint32_t FSMC_WriteBurst; /*!< Enables or disables the write burst operation. + This parameter can be a value of @ref FSMC_Write_Burst */ + + FSMC_NORSRAMTimingInitTypeDef* FSMC_ReadWriteTimingStruct; /*!< Timing Parameters for write and read access if the ExtendedMode is not used*/ + + FSMC_NORSRAMTimingInitTypeDef* FSMC_WriteTimingStruct; /*!< Timing Parameters for write access if the ExtendedMode is used*/ +}FSMC_NORSRAMInitTypeDef; + +/** + * @brief Timing parameters For FSMC NAND and PCCARD Banks + */ + +typedef struct +{ + uint32_t FSMC_SetupTime; /*!< Defines the number of HCLK cycles to setup address before + the command assertion for NAND-Flash read or write access + to common/Attribute or I/O memory space (depending on + the memory space timing to be configured). + This parameter can be a value between 0 and 0xFF.*/ + + uint32_t FSMC_WaitSetupTime; /*!< Defines the minimum number of HCLK cycles to assert the + command for NAND-Flash read or write access to + common/Attribute or I/O memory space (depending on the + memory space timing to be configured). + This parameter can be a number between 0x00 and 0xFF */ + + uint32_t FSMC_HoldSetupTime; /*!< Defines the number of HCLK clock cycles to hold address + (and data for write access) after the command deassertion + for NAND-Flash read or write access to common/Attribute + or I/O memory space (depending on the memory space timing + to be configured). + This parameter can be a number between 0x00 and 0xFF */ + + uint32_t FSMC_HiZSetupTime; /*!< Defines the number of HCLK clock cycles during which the + databus is kept in HiZ after the start of a NAND-Flash + write access to common/Attribute or I/O memory space (depending + on the memory space timing to be configured). + This parameter can be a number between 0x00 and 0xFF */ +}FSMC_NAND_PCCARDTimingInitTypeDef; + +/** + * @brief FSMC NAND Init structure definition + */ + +typedef struct +{ + uint32_t FSMC_Bank; /*!< Specifies the NAND memory bank that will be used. + This parameter can be a value of @ref FSMC_NAND_Bank */ + + uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the NAND Memory Bank. + This parameter can be any value of @ref FSMC_Wait_feature */ + + uint32_t FSMC_MemoryDataWidth; /*!< Specifies the external memory device width. + This parameter can be any value of @ref FSMC_Data_Width */ + + uint32_t FSMC_ECC; /*!< Enables or disables the ECC computation. + This parameter can be any value of @ref FSMC_ECC */ + + uint32_t FSMC_ECCPageSize; /*!< Defines the page size for the extended ECC. + This parameter can be any value of @ref FSMC_ECC_Page_Size */ + + uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between CLE low and RE low. + This parameter can be a value between 0 and 0xFF. */ + + uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between ALE low and RE low. + This parameter can be a number between 0x0 and 0xFF */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ +}FSMC_NANDInitTypeDef; + +/** + * @brief FSMC PCCARD Init structure definition + */ + +typedef struct +{ + uint32_t FSMC_Waitfeature; /*!< Enables or disables the Wait feature for the Memory Bank. + This parameter can be any value of @ref FSMC_Wait_feature */ + + uint32_t FSMC_TCLRSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between CLE low and RE low. + This parameter can be a value between 0 and 0xFF. */ + + uint32_t FSMC_TARSetupTime; /*!< Defines the number of HCLK cycles to configure the + delay between ALE low and RE low. + This parameter can be a number between 0x0 and 0xFF */ + + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_CommonSpaceTimingStruct; /*!< FSMC Common Space Timing */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_AttributeSpaceTimingStruct; /*!< FSMC Attribute Space Timing */ + + FSMC_NAND_PCCARDTimingInitTypeDef* FSMC_IOSpaceTimingStruct; /*!< FSMC IO Space Timing */ +}FSMC_PCCARDInitTypeDef; + +/** + * @} + */ + +/** @defgroup FSMC_Exported_Constants + * @{ + */ + +/** @defgroup FSMC_NORSRAM_Bank + * @{ + */ +#define FSMC_Bank1_NORSRAM1 ((uint32_t)0x00000000) +#define FSMC_Bank1_NORSRAM2 ((uint32_t)0x00000002) +#define FSMC_Bank1_NORSRAM3 ((uint32_t)0x00000004) +#define FSMC_Bank1_NORSRAM4 ((uint32_t)0x00000006) +/** + * @} + */ + +/** @defgroup FSMC_NAND_Bank + * @{ + */ +#define FSMC_Bank2_NAND ((uint32_t)0x00000010) +#define FSMC_Bank3_NAND ((uint32_t)0x00000100) +/** + * @} + */ + +/** @defgroup FSMC_PCCARD_Bank + * @{ + */ +#define FSMC_Bank4_PCCARD ((uint32_t)0x00001000) +/** + * @} + */ + +#define IS_FSMC_NORSRAM_BANK(BANK) (((BANK) == FSMC_Bank1_NORSRAM1) || \ + ((BANK) == FSMC_Bank1_NORSRAM2) || \ + ((BANK) == FSMC_Bank1_NORSRAM3) || \ + ((BANK) == FSMC_Bank1_NORSRAM4)) + +#define IS_FSMC_NAND_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ + ((BANK) == FSMC_Bank3_NAND)) + +#define IS_FSMC_GETFLAG_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ + ((BANK) == FSMC_Bank3_NAND) || \ + ((BANK) == FSMC_Bank4_PCCARD)) + +#define IS_FSMC_IT_BANK(BANK) (((BANK) == FSMC_Bank2_NAND) || \ + ((BANK) == FSMC_Bank3_NAND) || \ + ((BANK) == FSMC_Bank4_PCCARD)) + +/** @defgroup NOR_SRAM_Controller + * @{ + */ + +/** @defgroup FSMC_Data_Address_Bus_Multiplexing + * @{ + */ + +#define FSMC_DataAddressMux_Disable ((uint32_t)0x00000000) +#define FSMC_DataAddressMux_Enable ((uint32_t)0x00000002) +#define IS_FSMC_MUX(MUX) (((MUX) == FSMC_DataAddressMux_Disable) || \ + ((MUX) == FSMC_DataAddressMux_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Memory_Type + * @{ + */ + +#define FSMC_MemoryType_SRAM ((uint32_t)0x00000000) +#define FSMC_MemoryType_PSRAM ((uint32_t)0x00000004) +#define FSMC_MemoryType_NOR ((uint32_t)0x00000008) +#define IS_FSMC_MEMORY(MEMORY) (((MEMORY) == FSMC_MemoryType_SRAM) || \ + ((MEMORY) == FSMC_MemoryType_PSRAM)|| \ + ((MEMORY) == FSMC_MemoryType_NOR)) + +/** + * @} + */ + +/** @defgroup FSMC_Data_Width + * @{ + */ + +#define FSMC_MemoryDataWidth_8b ((uint32_t)0x00000000) +#define FSMC_MemoryDataWidth_16b ((uint32_t)0x00000010) +#define IS_FSMC_MEMORY_WIDTH(WIDTH) (((WIDTH) == FSMC_MemoryDataWidth_8b) || \ + ((WIDTH) == FSMC_MemoryDataWidth_16b)) + +/** + * @} + */ + +/** @defgroup FSMC_Burst_Access_Mode + * @{ + */ + +#define FSMC_BurstAccessMode_Disable ((uint32_t)0x00000000) +#define FSMC_BurstAccessMode_Enable ((uint32_t)0x00000100) +#define IS_FSMC_BURSTMODE(STATE) (((STATE) == FSMC_BurstAccessMode_Disable) || \ + ((STATE) == FSMC_BurstAccessMode_Enable)) +/** + * @} + */ + +/** @defgroup FSMC_AsynchronousWait + * @{ + */ +#define FSMC_AsynchronousWait_Disable ((uint32_t)0x00000000) +#define FSMC_AsynchronousWait_Enable ((uint32_t)0x00008000) +#define IS_FSMC_ASYNWAIT(STATE) (((STATE) == FSMC_AsynchronousWait_Disable) || \ + ((STATE) == FSMC_AsynchronousWait_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Signal_Polarity + * @{ + */ + +#define FSMC_WaitSignalPolarity_Low ((uint32_t)0x00000000) +#define FSMC_WaitSignalPolarity_High ((uint32_t)0x00000200) +#define IS_FSMC_WAIT_POLARITY(POLARITY) (((POLARITY) == FSMC_WaitSignalPolarity_Low) || \ + ((POLARITY) == FSMC_WaitSignalPolarity_High)) + +/** + * @} + */ + +/** @defgroup FSMC_Wrap_Mode + * @{ + */ + +#define FSMC_WrapMode_Disable ((uint32_t)0x00000000) +#define FSMC_WrapMode_Enable ((uint32_t)0x00000400) +#define IS_FSMC_WRAP_MODE(MODE) (((MODE) == FSMC_WrapMode_Disable) || \ + ((MODE) == FSMC_WrapMode_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Timing + * @{ + */ + +#define FSMC_WaitSignalActive_BeforeWaitState ((uint32_t)0x00000000) +#define FSMC_WaitSignalActive_DuringWaitState ((uint32_t)0x00000800) +#define IS_FSMC_WAIT_SIGNAL_ACTIVE(ACTIVE) (((ACTIVE) == FSMC_WaitSignalActive_BeforeWaitState) || \ + ((ACTIVE) == FSMC_WaitSignalActive_DuringWaitState)) + +/** + * @} + */ + +/** @defgroup FSMC_Write_Operation + * @{ + */ + +#define FSMC_WriteOperation_Disable ((uint32_t)0x00000000) +#define FSMC_WriteOperation_Enable ((uint32_t)0x00001000) +#define IS_FSMC_WRITE_OPERATION(OPERATION) (((OPERATION) == FSMC_WriteOperation_Disable) || \ + ((OPERATION) == FSMC_WriteOperation_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Signal + * @{ + */ + +#define FSMC_WaitSignal_Disable ((uint32_t)0x00000000) +#define FSMC_WaitSignal_Enable ((uint32_t)0x00002000) +#define IS_FSMC_WAITE_SIGNAL(SIGNAL) (((SIGNAL) == FSMC_WaitSignal_Disable) || \ + ((SIGNAL) == FSMC_WaitSignal_Enable)) +/** + * @} + */ + +/** @defgroup FSMC_Extended_Mode + * @{ + */ + +#define FSMC_ExtendedMode_Disable ((uint32_t)0x00000000) +#define FSMC_ExtendedMode_Enable ((uint32_t)0x00004000) + +#define IS_FSMC_EXTENDED_MODE(MODE) (((MODE) == FSMC_ExtendedMode_Disable) || \ + ((MODE) == FSMC_ExtendedMode_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_Write_Burst + * @{ + */ + +#define FSMC_WriteBurst_Disable ((uint32_t)0x00000000) +#define FSMC_WriteBurst_Enable ((uint32_t)0x00080000) +#define IS_FSMC_WRITE_BURST(BURST) (((BURST) == FSMC_WriteBurst_Disable) || \ + ((BURST) == FSMC_WriteBurst_Enable)) +/** + * @} + */ + +/** @defgroup FSMC_Address_Setup_Time + * @{ + */ + +#define IS_FSMC_ADDRESS_SETUP_TIME(TIME) ((TIME) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Address_Hold_Time + * @{ + */ + +#define IS_FSMC_ADDRESS_HOLD_TIME(TIME) ((TIME) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Data_Setup_Time + * @{ + */ + +#define IS_FSMC_DATASETUP_TIME(TIME) (((TIME) > 0) && ((TIME) <= 0xFF)) + +/** + * @} + */ + +/** @defgroup FSMC_Bus_Turn_around_Duration + * @{ + */ + +#define IS_FSMC_TURNAROUND_TIME(TIME) ((TIME) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_CLK_Division + * @{ + */ + +#define IS_FSMC_CLK_DIV(DIV) ((DIV) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Data_Latency + * @{ + */ + +#define IS_FSMC_DATA_LATENCY(LATENCY) ((LATENCY) <= 0xF) + +/** + * @} + */ + +/** @defgroup FSMC_Access_Mode + * @{ + */ + +#define FSMC_AccessMode_A ((uint32_t)0x00000000) +#define FSMC_AccessMode_B ((uint32_t)0x10000000) +#define FSMC_AccessMode_C ((uint32_t)0x20000000) +#define FSMC_AccessMode_D ((uint32_t)0x30000000) +#define IS_FSMC_ACCESS_MODE(MODE) (((MODE) == FSMC_AccessMode_A) || \ + ((MODE) == FSMC_AccessMode_B) || \ + ((MODE) == FSMC_AccessMode_C) || \ + ((MODE) == FSMC_AccessMode_D)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup NAND_PCCARD_Controller + * @{ + */ + +/** @defgroup FSMC_Wait_feature + * @{ + */ + +#define FSMC_Waitfeature_Disable ((uint32_t)0x00000000) +#define FSMC_Waitfeature_Enable ((uint32_t)0x00000002) +#define IS_FSMC_WAIT_FEATURE(FEATURE) (((FEATURE) == FSMC_Waitfeature_Disable) || \ + ((FEATURE) == FSMC_Waitfeature_Enable)) + +/** + * @} + */ + + +/** @defgroup FSMC_ECC + * @{ + */ + +#define FSMC_ECC_Disable ((uint32_t)0x00000000) +#define FSMC_ECC_Enable ((uint32_t)0x00000040) +#define IS_FSMC_ECC_STATE(STATE) (((STATE) == FSMC_ECC_Disable) || \ + ((STATE) == FSMC_ECC_Enable)) + +/** + * @} + */ + +/** @defgroup FSMC_ECC_Page_Size + * @{ + */ + +#define FSMC_ECCPageSize_256Bytes ((uint32_t)0x00000000) +#define FSMC_ECCPageSize_512Bytes ((uint32_t)0x00020000) +#define FSMC_ECCPageSize_1024Bytes ((uint32_t)0x00040000) +#define FSMC_ECCPageSize_2048Bytes ((uint32_t)0x00060000) +#define FSMC_ECCPageSize_4096Bytes ((uint32_t)0x00080000) +#define FSMC_ECCPageSize_8192Bytes ((uint32_t)0x000A0000) +#define IS_FSMC_ECCPAGE_SIZE(SIZE) (((SIZE) == FSMC_ECCPageSize_256Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_512Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_1024Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_2048Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_4096Bytes) || \ + ((SIZE) == FSMC_ECCPageSize_8192Bytes)) + +/** + * @} + */ + +/** @defgroup FSMC_TCLR_Setup_Time + * @{ + */ + +#define IS_FSMC_TCLR_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_TAR_Setup_Time + * @{ + */ + +#define IS_FSMC_TAR_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Setup_Time + * @{ + */ + +#define IS_FSMC_SETUP_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Wait_Setup_Time + * @{ + */ + +#define IS_FSMC_WAIT_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Hold_Setup_Time + * @{ + */ + +#define IS_FSMC_HOLD_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_HiZ_Setup_Time + * @{ + */ + +#define IS_FSMC_HIZ_TIME(TIME) ((TIME) <= 0xFF) + +/** + * @} + */ + +/** @defgroup FSMC_Interrupt_sources + * @{ + */ + +#define FSMC_IT_RisingEdge ((uint32_t)0x00000008) +#define FSMC_IT_Level ((uint32_t)0x00000010) +#define FSMC_IT_FallingEdge ((uint32_t)0x00000020) +#define IS_FSMC_IT(IT) ((((IT) & (uint32_t)0xFFFFFFC7) == 0x00000000) && ((IT) != 0x00000000)) +#define IS_FSMC_GET_IT(IT) (((IT) == FSMC_IT_RisingEdge) || \ + ((IT) == FSMC_IT_Level) || \ + ((IT) == FSMC_IT_FallingEdge)) +/** + * @} + */ + +/** @defgroup FSMC_Flags + * @{ + */ + +#define FSMC_FLAG_RisingEdge ((uint32_t)0x00000001) +#define FSMC_FLAG_Level ((uint32_t)0x00000002) +#define FSMC_FLAG_FallingEdge ((uint32_t)0x00000004) +#define FSMC_FLAG_FEMPT ((uint32_t)0x00000040) +#define IS_FSMC_GET_FLAG(FLAG) (((FLAG) == FSMC_FLAG_RisingEdge) || \ + ((FLAG) == FSMC_FLAG_Level) || \ + ((FLAG) == FSMC_FLAG_FallingEdge) || \ + ((FLAG) == FSMC_FLAG_FEMPT)) + +#define IS_FSMC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF8) == 0x00000000) && ((FLAG) != 0x00000000)) + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup FSMC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Exported_Functions + * @{ + */ + +void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank); +void FSMC_NANDDeInit(uint32_t FSMC_Bank); +void FSMC_PCCARDDeInit(void); +void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); +void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); +void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); +void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct); +void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct); +void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct); +void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState); +void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState); +void FSMC_PCCARDCmd(FunctionalState NewState); +void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState); +uint32_t FSMC_GetECC(uint32_t FSMC_Bank); +void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState); +FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); +void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG); +ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT); +void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_FSMC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h index dd28da89..b8aa49a2 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_gpio.h @@ -1,385 +1,385 @@ -/** - ****************************************************************************** - * @file stm32f10x_gpio.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the GPIO - * firmware library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_GPIO_H -#define __STM32F10x_GPIO_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup GPIO - * @{ - */ - -/** @defgroup GPIO_Exported_Types - * @{ - */ - -#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \ - ((PERIPH) == GPIOB) || \ - ((PERIPH) == GPIOC) || \ - ((PERIPH) == GPIOD) || \ - ((PERIPH) == GPIOE) || \ - ((PERIPH) == GPIOF) || \ - ((PERIPH) == GPIOG)) - -/** - * @brief Output Maximum frequency selection - */ - -typedef enum -{ - GPIO_Speed_10MHz = 1, - GPIO_Speed_2MHz, - GPIO_Speed_50MHz -}GPIOSpeed_TypeDef; -#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \ - ((SPEED) == GPIO_Speed_50MHz)) - -/** - * @brief Configuration Mode enumeration - */ - -typedef enum -{ GPIO_Mode_AIN = 0x0, - GPIO_Mode_IN_FLOATING = 0x04, - GPIO_Mode_IPD = 0x28, - GPIO_Mode_IPU = 0x48, - GPIO_Mode_Out_OD = 0x14, - GPIO_Mode_Out_PP = 0x10, - GPIO_Mode_AF_OD = 0x1C, - GPIO_Mode_AF_PP = 0x18 -}GPIOMode_TypeDef; - -#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \ - ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \ - ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \ - ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP)) - -/** - * @brief GPIO Init structure definition - */ - -typedef struct -{ - uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. - This parameter can be any value of @ref GPIO_pins_define */ - - GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins. - This parameter can be a value of @ref GPIOSpeed_TypeDef */ - - GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. - This parameter can be a value of @ref GPIOMode_TypeDef */ -}GPIO_InitTypeDef; - - -/** - * @brief Bit_SET and Bit_RESET enumeration - */ - -typedef enum -{ Bit_RESET = 0, - Bit_SET -}BitAction; - -#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) - -/** - * @} - */ - -/** @defgroup GPIO_Exported_Constants - * @{ - */ - -/** @defgroup GPIO_pins_define - * @{ - */ - -#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */ -#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */ -#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */ -#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */ -#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */ -#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */ -#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */ -#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */ -#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */ -#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */ -#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */ -#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */ -#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */ -#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */ -#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */ -#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */ -#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */ - -#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00)) - -#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ - ((PIN) == GPIO_Pin_1) || \ - ((PIN) == GPIO_Pin_2) || \ - ((PIN) == GPIO_Pin_3) || \ - ((PIN) == GPIO_Pin_4) || \ - ((PIN) == GPIO_Pin_5) || \ - ((PIN) == GPIO_Pin_6) || \ - ((PIN) == GPIO_Pin_7) || \ - ((PIN) == GPIO_Pin_8) || \ - ((PIN) == GPIO_Pin_9) || \ - ((PIN) == GPIO_Pin_10) || \ - ((PIN) == GPIO_Pin_11) || \ - ((PIN) == GPIO_Pin_12) || \ - ((PIN) == GPIO_Pin_13) || \ - ((PIN) == GPIO_Pin_14) || \ - ((PIN) == GPIO_Pin_15)) - -/** - * @} - */ - -/** @defgroup GPIO_Remap_define - * @{ - */ - -#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */ -#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */ -#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */ -#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */ -#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */ -#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */ -#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */ -#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */ -#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */ -#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */ -#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */ -#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */ -#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */ -#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */ -#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */ -#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */ -#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */ -#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */ -#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */ -#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */ -#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */ -#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */ -#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */ -#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */ -#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ -#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */ -#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */ -#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */ -#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected - to TIM2 Internal Trigger 1 for calibration - (only for Connectivity line devices) */ -#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */ - -#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */ -#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */ - -#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */ -#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */ -#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */ -#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */ -#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */ -#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */ - -#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */ -#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */ -#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, - only for High density Value line devices) */ - -#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \ - ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \ - ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \ - ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \ - ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \ - ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \ - ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \ - ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \ - ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \ - ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \ - ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \ - ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \ - ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \ - ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \ - ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \ - ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \ - ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \ - ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \ - ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \ - ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \ - ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \ - ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC)) - -/** - * @} - */ - -/** @defgroup GPIO_Port_Sources - * @{ - */ - -#define GPIO_PortSourceGPIOA ((uint8_t)0x00) -#define GPIO_PortSourceGPIOB ((uint8_t)0x01) -#define GPIO_PortSourceGPIOC ((uint8_t)0x02) -#define GPIO_PortSourceGPIOD ((uint8_t)0x03) -#define GPIO_PortSourceGPIOE ((uint8_t)0x04) -#define GPIO_PortSourceGPIOF ((uint8_t)0x05) -#define GPIO_PortSourceGPIOG ((uint8_t)0x06) -#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOE)) - -#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \ - ((PORTSOURCE) == GPIO_PortSourceGPIOG)) - -/** - * @} - */ - -/** @defgroup GPIO_Pin_sources - * @{ - */ - -#define GPIO_PinSource0 ((uint8_t)0x00) -#define GPIO_PinSource1 ((uint8_t)0x01) -#define GPIO_PinSource2 ((uint8_t)0x02) -#define GPIO_PinSource3 ((uint8_t)0x03) -#define GPIO_PinSource4 ((uint8_t)0x04) -#define GPIO_PinSource5 ((uint8_t)0x05) -#define GPIO_PinSource6 ((uint8_t)0x06) -#define GPIO_PinSource7 ((uint8_t)0x07) -#define GPIO_PinSource8 ((uint8_t)0x08) -#define GPIO_PinSource9 ((uint8_t)0x09) -#define GPIO_PinSource10 ((uint8_t)0x0A) -#define GPIO_PinSource11 ((uint8_t)0x0B) -#define GPIO_PinSource12 ((uint8_t)0x0C) -#define GPIO_PinSource13 ((uint8_t)0x0D) -#define GPIO_PinSource14 ((uint8_t)0x0E) -#define GPIO_PinSource15 ((uint8_t)0x0F) - -#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ - ((PINSOURCE) == GPIO_PinSource1) || \ - ((PINSOURCE) == GPIO_PinSource2) || \ - ((PINSOURCE) == GPIO_PinSource3) || \ - ((PINSOURCE) == GPIO_PinSource4) || \ - ((PINSOURCE) == GPIO_PinSource5) || \ - ((PINSOURCE) == GPIO_PinSource6) || \ - ((PINSOURCE) == GPIO_PinSource7) || \ - ((PINSOURCE) == GPIO_PinSource8) || \ - ((PINSOURCE) == GPIO_PinSource9) || \ - ((PINSOURCE) == GPIO_PinSource10) || \ - ((PINSOURCE) == GPIO_PinSource11) || \ - ((PINSOURCE) == GPIO_PinSource12) || \ - ((PINSOURCE) == GPIO_PinSource13) || \ - ((PINSOURCE) == GPIO_PinSource14) || \ - ((PINSOURCE) == GPIO_PinSource15)) - -/** - * @} - */ - -/** @defgroup Ethernet_Media_Interface - * @{ - */ -#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000) -#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001) - -#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \ - ((INTERFACE) == GPIO_ETH_MediaInterface_RMII)) - -/** - * @} - */ -/** - * @} - */ - -/** @defgroup GPIO_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Exported_Functions - * @{ - */ - -void GPIO_DeInit(GPIO_TypeDef* GPIOx); -void GPIO_AFIODeInit(void); -void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); -void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); -uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); -uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); -void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); -void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); -void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); -void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); -void GPIO_EventOutputCmd(FunctionalState NewState); -void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState); -void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); -void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_GPIO_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_gpio.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the GPIO + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_GPIO_H +#define __STM32F10x_GPIO_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup GPIO + * @{ + */ + +/** @defgroup GPIO_Exported_Types + * @{ + */ + +#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \ + ((PERIPH) == GPIOB) || \ + ((PERIPH) == GPIOC) || \ + ((PERIPH) == GPIOD) || \ + ((PERIPH) == GPIOE) || \ + ((PERIPH) == GPIOF) || \ + ((PERIPH) == GPIOG)) + +/** + * @brief Output Maximum frequency selection + */ + +typedef enum +{ + GPIO_Speed_10MHz = 1, + GPIO_Speed_2MHz, + GPIO_Speed_50MHz +}GPIOSpeed_TypeDef; +#define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \ + ((SPEED) == GPIO_Speed_50MHz)) + +/** + * @brief Configuration Mode enumeration + */ + +typedef enum +{ GPIO_Mode_AIN = 0x0, + GPIO_Mode_IN_FLOATING = 0x04, + GPIO_Mode_IPD = 0x28, + GPIO_Mode_IPU = 0x48, + GPIO_Mode_Out_OD = 0x14, + GPIO_Mode_Out_PP = 0x10, + GPIO_Mode_AF_OD = 0x1C, + GPIO_Mode_AF_PP = 0x18 +}GPIOMode_TypeDef; + +#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \ + ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \ + ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \ + ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP)) + +/** + * @brief GPIO Init structure definition + */ + +typedef struct +{ + uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. + This parameter can be any value of @ref GPIO_pins_define */ + + GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins. + This parameter can be a value of @ref GPIOSpeed_TypeDef */ + + GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. + This parameter can be a value of @ref GPIOMode_TypeDef */ +}GPIO_InitTypeDef; + + +/** + * @brief Bit_SET and Bit_RESET enumeration + */ + +typedef enum +{ Bit_RESET = 0, + Bit_SET +}BitAction; + +#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET)) + +/** + * @} + */ + +/** @defgroup GPIO_Exported_Constants + * @{ + */ + +/** @defgroup GPIO_pins_define + * @{ + */ + +#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */ +#define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */ +#define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */ +#define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */ +#define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */ +#define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */ +#define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */ +#define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */ +#define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */ +#define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */ +#define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */ +#define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */ +#define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */ +#define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */ +#define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */ +#define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */ +#define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */ + +#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00)) + +#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \ + ((PIN) == GPIO_Pin_1) || \ + ((PIN) == GPIO_Pin_2) || \ + ((PIN) == GPIO_Pin_3) || \ + ((PIN) == GPIO_Pin_4) || \ + ((PIN) == GPIO_Pin_5) || \ + ((PIN) == GPIO_Pin_6) || \ + ((PIN) == GPIO_Pin_7) || \ + ((PIN) == GPIO_Pin_8) || \ + ((PIN) == GPIO_Pin_9) || \ + ((PIN) == GPIO_Pin_10) || \ + ((PIN) == GPIO_Pin_11) || \ + ((PIN) == GPIO_Pin_12) || \ + ((PIN) == GPIO_Pin_13) || \ + ((PIN) == GPIO_Pin_14) || \ + ((PIN) == GPIO_Pin_15)) + +/** + * @} + */ + +/** @defgroup GPIO_Remap_define + * @{ + */ + +#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */ +#define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */ +#define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */ +#define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */ +#define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */ +#define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */ +#define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */ +#define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */ +#define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */ +#define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */ +#define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */ +#define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */ +#define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */ +#define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */ +#define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */ +#define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */ +#define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */ +#define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */ +#define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */ +#define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */ +#define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */ +#define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */ +#define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */ +#define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */ +#define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ +#define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */ +#define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */ +#define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */ +#define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected + to TIM2 Internal Trigger 1 for calibration + (only for Connectivity line devices) */ +#define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */ + +#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */ +#define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */ + +#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */ +#define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */ +#define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */ +#define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */ +#define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */ +#define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */ + +#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */ +#define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */ +#define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, + only for High density Value line devices) */ + +#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \ + ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \ + ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \ + ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \ + ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \ + ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \ + ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \ + ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \ + ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \ + ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \ + ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \ + ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \ + ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \ + ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \ + ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \ + ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \ + ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \ + ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \ + ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \ + ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \ + ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \ + ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC)) + +/** + * @} + */ + +/** @defgroup GPIO_Port_Sources + * @{ + */ + +#define GPIO_PortSourceGPIOA ((uint8_t)0x00) +#define GPIO_PortSourceGPIOB ((uint8_t)0x01) +#define GPIO_PortSourceGPIOC ((uint8_t)0x02) +#define GPIO_PortSourceGPIOD ((uint8_t)0x03) +#define GPIO_PortSourceGPIOE ((uint8_t)0x04) +#define GPIO_PortSourceGPIOF ((uint8_t)0x05) +#define GPIO_PortSourceGPIOG ((uint8_t)0x06) +#define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOE)) + +#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \ + ((PORTSOURCE) == GPIO_PortSourceGPIOG)) + +/** + * @} + */ + +/** @defgroup GPIO_Pin_sources + * @{ + */ + +#define GPIO_PinSource0 ((uint8_t)0x00) +#define GPIO_PinSource1 ((uint8_t)0x01) +#define GPIO_PinSource2 ((uint8_t)0x02) +#define GPIO_PinSource3 ((uint8_t)0x03) +#define GPIO_PinSource4 ((uint8_t)0x04) +#define GPIO_PinSource5 ((uint8_t)0x05) +#define GPIO_PinSource6 ((uint8_t)0x06) +#define GPIO_PinSource7 ((uint8_t)0x07) +#define GPIO_PinSource8 ((uint8_t)0x08) +#define GPIO_PinSource9 ((uint8_t)0x09) +#define GPIO_PinSource10 ((uint8_t)0x0A) +#define GPIO_PinSource11 ((uint8_t)0x0B) +#define GPIO_PinSource12 ((uint8_t)0x0C) +#define GPIO_PinSource13 ((uint8_t)0x0D) +#define GPIO_PinSource14 ((uint8_t)0x0E) +#define GPIO_PinSource15 ((uint8_t)0x0F) + +#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \ + ((PINSOURCE) == GPIO_PinSource1) || \ + ((PINSOURCE) == GPIO_PinSource2) || \ + ((PINSOURCE) == GPIO_PinSource3) || \ + ((PINSOURCE) == GPIO_PinSource4) || \ + ((PINSOURCE) == GPIO_PinSource5) || \ + ((PINSOURCE) == GPIO_PinSource6) || \ + ((PINSOURCE) == GPIO_PinSource7) || \ + ((PINSOURCE) == GPIO_PinSource8) || \ + ((PINSOURCE) == GPIO_PinSource9) || \ + ((PINSOURCE) == GPIO_PinSource10) || \ + ((PINSOURCE) == GPIO_PinSource11) || \ + ((PINSOURCE) == GPIO_PinSource12) || \ + ((PINSOURCE) == GPIO_PinSource13) || \ + ((PINSOURCE) == GPIO_PinSource14) || \ + ((PINSOURCE) == GPIO_PinSource15)) + +/** + * @} + */ + +/** @defgroup Ethernet_Media_Interface + * @{ + */ +#define GPIO_ETH_MediaInterface_MII ((u32)0x00000000) +#define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001) + +#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \ + ((INTERFACE) == GPIO_ETH_MediaInterface_RMII)) + +/** + * @} + */ +/** + * @} + */ + +/** @defgroup GPIO_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Exported_Functions + * @{ + */ + +void GPIO_DeInit(GPIO_TypeDef* GPIOx); +void GPIO_AFIODeInit(void); +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); +void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); +void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); +void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); +void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); +void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); +void GPIO_EventOutputCmd(FunctionalState NewState); +void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState); +void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); +void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_GPIO_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h index 60e4b14f..2d42e5ce 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_i2c.h @@ -1,684 +1,684 @@ -/** - ****************************************************************************** - * @file stm32f10x_i2c.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the I2C firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_I2C_H -#define __STM32F10x_I2C_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup I2C - * @{ - */ - -/** @defgroup I2C_Exported_Types - * @{ - */ - -/** - * @brief I2C Init structure definition - */ - -typedef struct -{ - uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. - This parameter must be set to a value lower than 400kHz */ - - uint16_t I2C_Mode; /*!< Specifies the I2C mode. - This parameter can be a value of @ref I2C_mode */ - - uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle. - This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ - - uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ - - uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement. - This parameter can be a value of @ref I2C_acknowledgement */ - - uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. - This parameter can be a value of @ref I2C_acknowledged_address */ -}I2C_InitTypeDef; - -/** - * @} - */ - - -/** @defgroup I2C_Exported_Constants - * @{ - */ - -#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ - ((PERIPH) == I2C2)) -/** @defgroup I2C_mode - * @{ - */ - -#define I2C_Mode_I2C ((uint16_t)0x0000) -#define I2C_Mode_SMBusDevice ((uint16_t)0x0002) -#define I2C_Mode_SMBusHost ((uint16_t)0x000A) -#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ - ((MODE) == I2C_Mode_SMBusDevice) || \ - ((MODE) == I2C_Mode_SMBusHost)) -/** - * @} - */ - -/** @defgroup I2C_duty_cycle_in_fast_mode - * @{ - */ - -#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */ -#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */ -#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ - ((CYCLE) == I2C_DutyCycle_2)) -/** - * @} - */ - -/** @defgroup I2C_acknowledgement - * @{ - */ - -#define I2C_Ack_Enable ((uint16_t)0x0400) -#define I2C_Ack_Disable ((uint16_t)0x0000) -#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ - ((STATE) == I2C_Ack_Disable)) -/** - * @} - */ - -/** @defgroup I2C_transfer_direction - * @{ - */ - -#define I2C_Direction_Transmitter ((uint8_t)0x00) -#define I2C_Direction_Receiver ((uint8_t)0x01) -#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ - ((DIRECTION) == I2C_Direction_Receiver)) -/** - * @} - */ - -/** @defgroup I2C_acknowledged_address - * @{ - */ - -#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) -#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) -#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ - ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) -/** - * @} - */ - -/** @defgroup I2C_registers - * @{ - */ - -#define I2C_Register_CR1 ((uint8_t)0x00) -#define I2C_Register_CR2 ((uint8_t)0x04) -#define I2C_Register_OAR1 ((uint8_t)0x08) -#define I2C_Register_OAR2 ((uint8_t)0x0C) -#define I2C_Register_DR ((uint8_t)0x10) -#define I2C_Register_SR1 ((uint8_t)0x14) -#define I2C_Register_SR2 ((uint8_t)0x18) -#define I2C_Register_CCR ((uint8_t)0x1C) -#define I2C_Register_TRISE ((uint8_t)0x20) -#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ - ((REGISTER) == I2C_Register_CR2) || \ - ((REGISTER) == I2C_Register_OAR1) || \ - ((REGISTER) == I2C_Register_OAR2) || \ - ((REGISTER) == I2C_Register_DR) || \ - ((REGISTER) == I2C_Register_SR1) || \ - ((REGISTER) == I2C_Register_SR2) || \ - ((REGISTER) == I2C_Register_CCR) || \ - ((REGISTER) == I2C_Register_TRISE)) -/** - * @} - */ - -/** @defgroup I2C_SMBus_alert_pin_level - * @{ - */ - -#define I2C_SMBusAlert_Low ((uint16_t)0x2000) -#define I2C_SMBusAlert_High ((uint16_t)0xDFFF) -#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ - ((ALERT) == I2C_SMBusAlert_High)) -/** - * @} - */ - -/** @defgroup I2C_PEC_position - * @{ - */ - -#define I2C_PECPosition_Next ((uint16_t)0x0800) -#define I2C_PECPosition_Current ((uint16_t)0xF7FF) -#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ - ((POSITION) == I2C_PECPosition_Current)) -/** - * @} - */ - -/** @defgroup I2C_NCAK_position - * @{ - */ - -#define I2C_NACKPosition_Next ((uint16_t)0x0800) -#define I2C_NACKPosition_Current ((uint16_t)0xF7FF) -#define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \ - ((POSITION) == I2C_NACKPosition_Current)) -/** - * @} - */ - -/** @defgroup I2C_interrupts_definition - * @{ - */ - -#define I2C_IT_BUF ((uint16_t)0x0400) -#define I2C_IT_EVT ((uint16_t)0x0200) -#define I2C_IT_ERR ((uint16_t)0x0100) -#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) -/** - * @} - */ - -/** @defgroup I2C_interrupts_definition - * @{ - */ - -#define I2C_IT_SMBALERT ((uint32_t)0x01008000) -#define I2C_IT_TIMEOUT ((uint32_t)0x01004000) -#define I2C_IT_PECERR ((uint32_t)0x01001000) -#define I2C_IT_OVR ((uint32_t)0x01000800) -#define I2C_IT_AF ((uint32_t)0x01000400) -#define I2C_IT_ARLO ((uint32_t)0x01000200) -#define I2C_IT_BERR ((uint32_t)0x01000100) -#define I2C_IT_TXE ((uint32_t)0x06000080) -#define I2C_IT_RXNE ((uint32_t)0x06000040) -#define I2C_IT_STOPF ((uint32_t)0x02000010) -#define I2C_IT_ADD10 ((uint32_t)0x02000008) -#define I2C_IT_BTF ((uint32_t)0x02000004) -#define I2C_IT_ADDR ((uint32_t)0x02000002) -#define I2C_IT_SB ((uint32_t)0x02000001) - -#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) - -#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ - ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ - ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ - ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ - ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ - ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ - ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) -/** - * @} - */ - -/** @defgroup I2C_flags_definition - * @{ - */ - -/** - * @brief SR2 register flags - */ - -#define I2C_FLAG_DUALF ((uint32_t)0x00800000) -#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) -#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) -#define I2C_FLAG_GENCALL ((uint32_t)0x00100000) -#define I2C_FLAG_TRA ((uint32_t)0x00040000) -#define I2C_FLAG_BUSY ((uint32_t)0x00020000) -#define I2C_FLAG_MSL ((uint32_t)0x00010000) - -/** - * @brief SR1 register flags - */ - -#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) -#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) -#define I2C_FLAG_PECERR ((uint32_t)0x10001000) -#define I2C_FLAG_OVR ((uint32_t)0x10000800) -#define I2C_FLAG_AF ((uint32_t)0x10000400) -#define I2C_FLAG_ARLO ((uint32_t)0x10000200) -#define I2C_FLAG_BERR ((uint32_t)0x10000100) -#define I2C_FLAG_TXE ((uint32_t)0x10000080) -#define I2C_FLAG_RXNE ((uint32_t)0x10000040) -#define I2C_FLAG_STOPF ((uint32_t)0x10000010) -#define I2C_FLAG_ADD10 ((uint32_t)0x10000008) -#define I2C_FLAG_BTF ((uint32_t)0x10000004) -#define I2C_FLAG_ADDR ((uint32_t)0x10000002) -#define I2C_FLAG_SB ((uint32_t)0x10000001) - -#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) - -#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ - ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ - ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ - ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ - ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ - ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ - ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ - ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ - ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ - ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ - ((FLAG) == I2C_FLAG_SB)) -/** - * @} - */ - -/** @defgroup I2C_Events - * @{ - */ - -/*======================================== - - I2C Master Events (Events grouped in order of communication) - ==========================================*/ -/** - * @brief Communication start - * - * After sending the START condition (I2C_GenerateSTART() function) the master - * has to wait for this event. It means that the Start condition has been correctly - * released on the I2C bus (the bus is free, no other devices is communicating). - * - */ -/* --EV5 */ -#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ - -/** - * @brief Address Acknowledge - * - * After checking on EV5 (start condition correctly released on the bus), the - * master sends the address of the slave(s) with which it will communicate - * (I2C_Send7bitAddress() function, it also determines the direction of the communication: - * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges - * his address. If an acknowledge is sent on the bus, one of the following events will - * be set: - * - * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED - * event is set. - * - * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED - * is set - * - * 3) In case of 10-Bit addressing mode, the master (just after generating the START - * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() - * function). Then master should wait on EV9. It means that the 10-bit addressing - * header has been correctly sent on the bus. Then master should send the second part of - * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master - * should wait for event EV6. - * - */ - -/* --EV6 */ -#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ -#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ -/* --EV9 */ -#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ - -/** - * @brief Communication events - * - * If a communication is established (START condition generated and slave address - * acknowledged) then the master has to check on one of the following events for - * communication procedures: - * - * 1) Master Receiver mode: The master has to wait on the event EV7 then to read - * the data received from the slave (I2C_ReceiveData() function). - * - * 2) Master Transmitter mode: The master has to send data (I2C_SendData() - * function) then to wait on event EV8 or EV8_2. - * These two events are similar: - * - EV8 means that the data has been written in the data register and is - * being shifted out. - * - EV8_2 means that the data has been physically shifted out and output - * on the bus. - * In most cases, using EV8 is sufficient for the application. - * Using EV8_2 leads to a slower communication but ensure more reliable test. - * EV8_2 is also more suitable than EV8 for testing on the last data transmission - * (before Stop condition generation). - * - * @note In case the user software does not guarantee that this event EV7 is - * managed before the current byte end of transfer, then user may check on EV7 - * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). - * In this case the communication may be slower. - * - */ - -/* Master RECEIVER mode -----------------------------*/ -/* --EV7 */ -#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ - -/* Master TRANSMITTER mode --------------------------*/ -/* --EV8 */ -#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ -/* --EV8_2 */ -#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ - - -/*======================================== - - I2C Slave Events (Events grouped in order of communication) - ==========================================*/ - -/** - * @brief Communication start events - * - * Wait on one of these events at the start of the communication. It means that - * the I2C peripheral detected a Start condition on the bus (generated by master - * device) followed by the peripheral address. The peripheral generates an ACK - * condition on the bus (if the acknowledge feature is enabled through function - * I2C_AcknowledgeConfig()) and the events listed above are set : - * - * 1) In normal case (only one address managed by the slave), when the address - * sent by the master matches the own address of the peripheral (configured by - * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set - * (where XXX could be TRANSMITTER or RECEIVER). - * - * 2) In case the address sent by the master matches the second address of the - * peripheral (configured by the function I2C_OwnAddress2Config() and enabled - * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED - * (where XXX could be TRANSMITTER or RECEIVER) are set. - * - * 3) In case the address sent by the master is General Call (address 0x00) and - * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) - * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. - * - */ - -/* --EV1 (all the events below are variants of EV1) */ -/* 1) Case of One Single Address managed by the slave */ -#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ -#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ - -/* 2) Case of Dual address managed by the slave */ -#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ -#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ - -/* 3) Case of General Call enabled for the slave */ -#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ - -/** - * @brief Communication events - * - * Wait on one of these events when EV1 has already been checked and: - * - * - Slave RECEIVER mode: - * - EV2: When the application is expecting a data byte to be received. - * - EV4: When the application is expecting the end of the communication: master - * sends a stop condition and data transmission is stopped. - * - * - Slave Transmitter mode: - * - EV3: When a byte has been transmitted by the slave and the application is expecting - * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and - * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be - * used when the user software doesn't guarantee the EV3 is managed before the - * current byte end of transfer. - * - EV3_2: When the master sends a NACK in order to tell slave that data transmission - * shall end (before sending the STOP condition). In this case slave has to stop sending - * data bytes and expect a Stop condition on the bus. - * - * @note In case the user software does not guarantee that the event EV2 is - * managed before the current byte end of transfer, then user may check on EV2 - * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). - * In this case the communication may be slower. - * - */ - -/* Slave RECEIVER mode --------------------------*/ -/* --EV2 */ -#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ -/* --EV4 */ -#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ - -/* Slave TRANSMITTER mode -----------------------*/ -/* --EV3 */ -#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ -#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ -/* --EV3_2 */ -#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ - -/*=========================== End of Events Description ==========================================*/ - -#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ - ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ - ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ - ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ - ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ - ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) -/** - * @} - */ - -/** @defgroup I2C_own_address1 - * @{ - */ - -#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) -/** - * @} - */ - -/** @defgroup I2C_clock_speed - * @{ - */ - -#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup I2C_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Exported_Functions - * @{ - */ - -void I2C_DeInit(I2C_TypeDef* I2Cx); -void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); -void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); -void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); -void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); -void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); -uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); -void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); -uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); -void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition); -void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); -void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); -void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); -uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); -void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); -void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); - -/** - * @brief - **************************************************************************************** - * - * I2C State Monitoring Functions - * - **************************************************************************************** - * This I2C driver provides three different ways for I2C state monitoring - * depending on the application requirements and constraints: - * - * - * 1) Basic state monitoring: - * Using I2C_CheckEvent() function: - * It compares the status registers (SR1 and SR2) content to a given event - * (can be the combination of one or more flags). - * It returns SUCCESS if the current status includes the given flags - * and returns ERROR if one or more flags are missing in the current status. - * - When to use: - * - This function is suitable for most applications as well as for startup - * activity since the events are fully described in the product reference manual - * (RM0008). - * - It is also suitable for users who need to define their own events. - * - Limitations: - * - If an error occurs (ie. error flags are set besides to the monitored flags), - * the I2C_CheckEvent() function may return SUCCESS despite the communication - * hold or corrupted real state. - * In this case, it is advised to use error interrupts to monitor the error - * events and handle them in the interrupt IRQ handler. - * - * @note - * For error management, it is advised to use the following functions: - * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). - * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. - * Where x is the peripheral instance (I2C1, I2C2 ...) - * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() - * in order to determine which error occurred. - * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() - * and/or I2C_GenerateStop() in order to clear the error flag and source, - * and return to correct communication status. - * - * - * 2) Advanced state monitoring: - * Using the function I2C_GetLastEvent() which returns the image of both status - * registers in a single word (uint32_t) (Status Register 2 value is shifted left - * by 16 bits and concatenated to Status Register 1). - * - When to use: - * - This function is suitable for the same applications above but it allows to - * overcome the limitations of I2C_GetFlagStatus() function (see below). - * The returned value could be compared to events already defined in the - * library (stm32f10x_i2c.h) or to custom values defined by user. - * - This function is suitable when multiple flags are monitored at the same time. - * - At the opposite of I2C_CheckEvent() function, this function allows user to - * choose when an event is accepted (when all events flags are set and no - * other flags are set or just when the needed flags are set like - * I2C_CheckEvent() function). - * - Limitations: - * - User may need to define his own events. - * - Same remark concerning the error management is applicable for this - * function if user decides to check only regular communication flags (and - * ignores error flags). - * - * - * 3) Flag-based state monitoring: - * Using the function I2C_GetFlagStatus() which simply returns the status of - * one single flag (ie. I2C_FLAG_RXNE ...). - * - When to use: - * - This function could be used for specific applications or in debug phase. - * - It is suitable when only one flag checking is needed (most I2C events - * are monitored through multiple flags). - * - Limitations: - * - When calling this function, the Status register is accessed. Some flags are - * cleared when the status register is accessed. So checking the status - * of one Flag, may clear other ones. - * - Function may need to be called twice or more in order to monitor one - * single event. - * - */ - -/** - * - * 1) Basic state monitoring - ******************************************************************************* - */ -ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); -/** - * - * 2) Advanced state monitoring - ******************************************************************************* - */ -uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); -/** - * - * 3) Flag-based state monitoring - ******************************************************************************* - */ -FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); -/** - * - ******************************************************************************* - */ - -void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); -ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); -void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_I2C_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_i2c.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the I2C firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_I2C_H +#define __STM32F10x_I2C_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup I2C + * @{ + */ + +/** @defgroup I2C_Exported_Types + * @{ + */ + +/** + * @brief I2C Init structure definition + */ + +typedef struct +{ + uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency. + This parameter must be set to a value lower than 400kHz */ + + uint16_t I2C_Mode; /*!< Specifies the I2C mode. + This parameter can be a value of @ref I2C_mode */ + + uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle. + This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */ + + uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address. + This parameter can be a 7-bit or 10-bit address. */ + + uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement. + This parameter can be a value of @ref I2C_acknowledgement */ + + uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged. + This parameter can be a value of @ref I2C_acknowledged_address */ +}I2C_InitTypeDef; + +/** + * @} + */ + + +/** @defgroup I2C_Exported_Constants + * @{ + */ + +#define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \ + ((PERIPH) == I2C2)) +/** @defgroup I2C_mode + * @{ + */ + +#define I2C_Mode_I2C ((uint16_t)0x0000) +#define I2C_Mode_SMBusDevice ((uint16_t)0x0002) +#define I2C_Mode_SMBusHost ((uint16_t)0x000A) +#define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \ + ((MODE) == I2C_Mode_SMBusDevice) || \ + ((MODE) == I2C_Mode_SMBusHost)) +/** + * @} + */ + +/** @defgroup I2C_duty_cycle_in_fast_mode + * @{ + */ + +#define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */ +#define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */ +#define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \ + ((CYCLE) == I2C_DutyCycle_2)) +/** + * @} + */ + +/** @defgroup I2C_acknowledgement + * @{ + */ + +#define I2C_Ack_Enable ((uint16_t)0x0400) +#define I2C_Ack_Disable ((uint16_t)0x0000) +#define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \ + ((STATE) == I2C_Ack_Disable)) +/** + * @} + */ + +/** @defgroup I2C_transfer_direction + * @{ + */ + +#define I2C_Direction_Transmitter ((uint8_t)0x00) +#define I2C_Direction_Receiver ((uint8_t)0x01) +#define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \ + ((DIRECTION) == I2C_Direction_Receiver)) +/** + * @} + */ + +/** @defgroup I2C_acknowledged_address + * @{ + */ + +#define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000) +#define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000) +#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \ + ((ADDRESS) == I2C_AcknowledgedAddress_10bit)) +/** + * @} + */ + +/** @defgroup I2C_registers + * @{ + */ + +#define I2C_Register_CR1 ((uint8_t)0x00) +#define I2C_Register_CR2 ((uint8_t)0x04) +#define I2C_Register_OAR1 ((uint8_t)0x08) +#define I2C_Register_OAR2 ((uint8_t)0x0C) +#define I2C_Register_DR ((uint8_t)0x10) +#define I2C_Register_SR1 ((uint8_t)0x14) +#define I2C_Register_SR2 ((uint8_t)0x18) +#define I2C_Register_CCR ((uint8_t)0x1C) +#define I2C_Register_TRISE ((uint8_t)0x20) +#define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \ + ((REGISTER) == I2C_Register_CR2) || \ + ((REGISTER) == I2C_Register_OAR1) || \ + ((REGISTER) == I2C_Register_OAR2) || \ + ((REGISTER) == I2C_Register_DR) || \ + ((REGISTER) == I2C_Register_SR1) || \ + ((REGISTER) == I2C_Register_SR2) || \ + ((REGISTER) == I2C_Register_CCR) || \ + ((REGISTER) == I2C_Register_TRISE)) +/** + * @} + */ + +/** @defgroup I2C_SMBus_alert_pin_level + * @{ + */ + +#define I2C_SMBusAlert_Low ((uint16_t)0x2000) +#define I2C_SMBusAlert_High ((uint16_t)0xDFFF) +#define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \ + ((ALERT) == I2C_SMBusAlert_High)) +/** + * @} + */ + +/** @defgroup I2C_PEC_position + * @{ + */ + +#define I2C_PECPosition_Next ((uint16_t)0x0800) +#define I2C_PECPosition_Current ((uint16_t)0xF7FF) +#define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \ + ((POSITION) == I2C_PECPosition_Current)) +/** + * @} + */ + +/** @defgroup I2C_NCAK_position + * @{ + */ + +#define I2C_NACKPosition_Next ((uint16_t)0x0800) +#define I2C_NACKPosition_Current ((uint16_t)0xF7FF) +#define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \ + ((POSITION) == I2C_NACKPosition_Current)) +/** + * @} + */ + +/** @defgroup I2C_interrupts_definition + * @{ + */ + +#define I2C_IT_BUF ((uint16_t)0x0400) +#define I2C_IT_EVT ((uint16_t)0x0200) +#define I2C_IT_ERR ((uint16_t)0x0100) +#define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00)) +/** + * @} + */ + +/** @defgroup I2C_interrupts_definition + * @{ + */ + +#define I2C_IT_SMBALERT ((uint32_t)0x01008000) +#define I2C_IT_TIMEOUT ((uint32_t)0x01004000) +#define I2C_IT_PECERR ((uint32_t)0x01001000) +#define I2C_IT_OVR ((uint32_t)0x01000800) +#define I2C_IT_AF ((uint32_t)0x01000400) +#define I2C_IT_ARLO ((uint32_t)0x01000200) +#define I2C_IT_BERR ((uint32_t)0x01000100) +#define I2C_IT_TXE ((uint32_t)0x06000080) +#define I2C_IT_RXNE ((uint32_t)0x06000040) +#define I2C_IT_STOPF ((uint32_t)0x02000010) +#define I2C_IT_ADD10 ((uint32_t)0x02000008) +#define I2C_IT_BTF ((uint32_t)0x02000004) +#define I2C_IT_ADDR ((uint32_t)0x02000002) +#define I2C_IT_SB ((uint32_t)0x02000001) + +#define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00)) + +#define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \ + ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \ + ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \ + ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \ + ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \ + ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \ + ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB)) +/** + * @} + */ + +/** @defgroup I2C_flags_definition + * @{ + */ + +/** + * @brief SR2 register flags + */ + +#define I2C_FLAG_DUALF ((uint32_t)0x00800000) +#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) +#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) +#define I2C_FLAG_GENCALL ((uint32_t)0x00100000) +#define I2C_FLAG_TRA ((uint32_t)0x00040000) +#define I2C_FLAG_BUSY ((uint32_t)0x00020000) +#define I2C_FLAG_MSL ((uint32_t)0x00010000) + +/** + * @brief SR1 register flags + */ + +#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) +#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) +#define I2C_FLAG_PECERR ((uint32_t)0x10001000) +#define I2C_FLAG_OVR ((uint32_t)0x10000800) +#define I2C_FLAG_AF ((uint32_t)0x10000400) +#define I2C_FLAG_ARLO ((uint32_t)0x10000200) +#define I2C_FLAG_BERR ((uint32_t)0x10000100) +#define I2C_FLAG_TXE ((uint32_t)0x10000080) +#define I2C_FLAG_RXNE ((uint32_t)0x10000040) +#define I2C_FLAG_STOPF ((uint32_t)0x10000010) +#define I2C_FLAG_ADD10 ((uint32_t)0x10000008) +#define I2C_FLAG_BTF ((uint32_t)0x10000004) +#define I2C_FLAG_ADDR ((uint32_t)0x10000002) +#define I2C_FLAG_SB ((uint32_t)0x10000001) + +#define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00)) + +#define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \ + ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \ + ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \ + ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \ + ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \ + ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \ + ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \ + ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \ + ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \ + ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \ + ((FLAG) == I2C_FLAG_SB)) +/** + * @} + */ + +/** @defgroup I2C_Events + * @{ + */ + +/*======================================== + + I2C Master Events (Events grouped in order of communication) + ==========================================*/ +/** + * @brief Communication start + * + * After sending the START condition (I2C_GenerateSTART() function) the master + * has to wait for this event. It means that the Start condition has been correctly + * released on the I2C bus (the bus is free, no other devices is communicating). + * + */ +/* --EV5 */ +#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ + +/** + * @brief Address Acknowledge + * + * After checking on EV5 (start condition correctly released on the bus), the + * master sends the address of the slave(s) with which it will communicate + * (I2C_Send7bitAddress() function, it also determines the direction of the communication: + * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges + * his address. If an acknowledge is sent on the bus, one of the following events will + * be set: + * + * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED + * event is set. + * + * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED + * is set + * + * 3) In case of 10-Bit addressing mode, the master (just after generating the START + * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() + * function). Then master should wait on EV9. It means that the 10-bit addressing + * header has been correctly sent on the bus. Then master should send the second part of + * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master + * should wait for event EV6. + * + */ + +/* --EV6 */ +#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ +#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ +/* --EV9 */ +#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ + +/** + * @brief Communication events + * + * If a communication is established (START condition generated and slave address + * acknowledged) then the master has to check on one of the following events for + * communication procedures: + * + * 1) Master Receiver mode: The master has to wait on the event EV7 then to read + * the data received from the slave (I2C_ReceiveData() function). + * + * 2) Master Transmitter mode: The master has to send data (I2C_SendData() + * function) then to wait on event EV8 or EV8_2. + * These two events are similar: + * - EV8 means that the data has been written in the data register and is + * being shifted out. + * - EV8_2 means that the data has been physically shifted out and output + * on the bus. + * In most cases, using EV8 is sufficient for the application. + * Using EV8_2 leads to a slower communication but ensure more reliable test. + * EV8_2 is also more suitable than EV8 for testing on the last data transmission + * (before Stop condition generation). + * + * @note In case the user software does not guarantee that this event EV7 is + * managed before the current byte end of transfer, then user may check on EV7 + * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). + * In this case the communication may be slower. + * + */ + +/* Master RECEIVER mode -----------------------------*/ +/* --EV7 */ +#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ + +/* Master TRANSMITTER mode --------------------------*/ +/* --EV8 */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ +/* --EV8_2 */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ + + +/*======================================== + + I2C Slave Events (Events grouped in order of communication) + ==========================================*/ + +/** + * @brief Communication start events + * + * Wait on one of these events at the start of the communication. It means that + * the I2C peripheral detected a Start condition on the bus (generated by master + * device) followed by the peripheral address. The peripheral generates an ACK + * condition on the bus (if the acknowledge feature is enabled through function + * I2C_AcknowledgeConfig()) and the events listed above are set : + * + * 1) In normal case (only one address managed by the slave), when the address + * sent by the master matches the own address of the peripheral (configured by + * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set + * (where XXX could be TRANSMITTER or RECEIVER). + * + * 2) In case the address sent by the master matches the second address of the + * peripheral (configured by the function I2C_OwnAddress2Config() and enabled + * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED + * (where XXX could be TRANSMITTER or RECEIVER) are set. + * + * 3) In case the address sent by the master is General Call (address 0x00) and + * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) + * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. + * + */ + +/* --EV1 (all the events below are variants of EV1) */ +/* 1) Case of One Single Address managed by the slave */ +#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ + +/* 2) Case of Dual address managed by the slave */ +#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ + +/* 3) Case of General Call enabled for the slave */ +#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ + +/** + * @brief Communication events + * + * Wait on one of these events when EV1 has already been checked and: + * + * - Slave RECEIVER mode: + * - EV2: When the application is expecting a data byte to be received. + * - EV4: When the application is expecting the end of the communication: master + * sends a stop condition and data transmission is stopped. + * + * - Slave Transmitter mode: + * - EV3: When a byte has been transmitted by the slave and the application is expecting + * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and + * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be + * used when the user software doesn't guarantee the EV3 is managed before the + * current byte end of transfer. + * - EV3_2: When the master sends a NACK in order to tell slave that data transmission + * shall end (before sending the STOP condition). In this case slave has to stop sending + * data bytes and expect a Stop condition on the bus. + * + * @note In case the user software does not guarantee that the event EV2 is + * managed before the current byte end of transfer, then user may check on EV2 + * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). + * In this case the communication may be slower. + * + */ + +/* Slave RECEIVER mode --------------------------*/ +/* --EV2 */ +#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ +/* --EV4 */ +#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ + +/* Slave TRANSMITTER mode -----------------------*/ +/* --EV3 */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */ +/* --EV3_2 */ +#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ + +/*=========================== End of Events Description ==========================================*/ + +#define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \ + ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \ + ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ + ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ + ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \ + ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE)) +/** + * @} + */ + +/** @defgroup I2C_own_address1 + * @{ + */ + +#define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF) +/** + * @} + */ + +/** @defgroup I2C_clock_speed + * @{ + */ + +#define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup I2C_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Exported_Functions + * @{ + */ + +void I2C_DeInit(I2C_TypeDef* I2Cx); +void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct); +void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct); +void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address); +void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState); +void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data); +uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx); +void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction); +uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register); +void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition); +void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert); +void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition); +void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState); +uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx); +void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState); +void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle); + +/** + * @brief + **************************************************************************************** + * + * I2C State Monitoring Functions + * + **************************************************************************************** + * This I2C driver provides three different ways for I2C state monitoring + * depending on the application requirements and constraints: + * + * + * 1) Basic state monitoring: + * Using I2C_CheckEvent() function: + * It compares the status registers (SR1 and SR2) content to a given event + * (can be the combination of one or more flags). + * It returns SUCCESS if the current status includes the given flags + * and returns ERROR if one or more flags are missing in the current status. + * - When to use: + * - This function is suitable for most applications as well as for startup + * activity since the events are fully described in the product reference manual + * (RM0008). + * - It is also suitable for users who need to define their own events. + * - Limitations: + * - If an error occurs (ie. error flags are set besides to the monitored flags), + * the I2C_CheckEvent() function may return SUCCESS despite the communication + * hold or corrupted real state. + * In this case, it is advised to use error interrupts to monitor the error + * events and handle them in the interrupt IRQ handler. + * + * @note + * For error management, it is advised to use the following functions: + * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). + * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. + * Where x is the peripheral instance (I2C1, I2C2 ...) + * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() + * in order to determine which error occurred. + * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() + * and/or I2C_GenerateStop() in order to clear the error flag and source, + * and return to correct communication status. + * + * + * 2) Advanced state monitoring: + * Using the function I2C_GetLastEvent() which returns the image of both status + * registers in a single word (uint32_t) (Status Register 2 value is shifted left + * by 16 bits and concatenated to Status Register 1). + * - When to use: + * - This function is suitable for the same applications above but it allows to + * overcome the limitations of I2C_GetFlagStatus() function (see below). + * The returned value could be compared to events already defined in the + * library (stm32f10x_i2c.h) or to custom values defined by user. + * - This function is suitable when multiple flags are monitored at the same time. + * - At the opposite of I2C_CheckEvent() function, this function allows user to + * choose when an event is accepted (when all events flags are set and no + * other flags are set or just when the needed flags are set like + * I2C_CheckEvent() function). + * - Limitations: + * - User may need to define his own events. + * - Same remark concerning the error management is applicable for this + * function if user decides to check only regular communication flags (and + * ignores error flags). + * + * + * 3) Flag-based state monitoring: + * Using the function I2C_GetFlagStatus() which simply returns the status of + * one single flag (ie. I2C_FLAG_RXNE ...). + * - When to use: + * - This function could be used for specific applications or in debug phase. + * - It is suitable when only one flag checking is needed (most I2C events + * are monitored through multiple flags). + * - Limitations: + * - When calling this function, the Status register is accessed. Some flags are + * cleared when the status register is accessed. So checking the status + * of one Flag, may clear other ones. + * - Function may need to be called twice or more in order to monitor one + * single event. + * + */ + +/** + * + * 1) Basic state monitoring + ******************************************************************************* + */ +ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT); +/** + * + * 2) Advanced state monitoring + ******************************************************************************* + */ +uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx); +/** + * + * 3) Flag-based state monitoring + ******************************************************************************* + */ +FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); +/** + * + ******************************************************************************* + */ + +void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG); +ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT); +void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_I2C_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h index 25b0bb52..7f5ab764 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_iwdg.h @@ -1,140 +1,140 @@ -/** - ****************************************************************************** - * @file stm32f10x_iwdg.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the IWDG - * firmware library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_IWDG_H -#define __STM32F10x_IWDG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup IWDG - * @{ - */ - -/** @defgroup IWDG_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Constants - * @{ - */ - -/** @defgroup IWDG_WriteAccess - * @{ - */ - -#define IWDG_WriteAccess_Enable ((uint16_t)0x5555) -#define IWDG_WriteAccess_Disable ((uint16_t)0x0000) -#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ - ((ACCESS) == IWDG_WriteAccess_Disable)) -/** - * @} - */ - -/** @defgroup IWDG_prescaler - * @{ - */ - -#define IWDG_Prescaler_4 ((uint8_t)0x00) -#define IWDG_Prescaler_8 ((uint8_t)0x01) -#define IWDG_Prescaler_16 ((uint8_t)0x02) -#define IWDG_Prescaler_32 ((uint8_t)0x03) -#define IWDG_Prescaler_64 ((uint8_t)0x04) -#define IWDG_Prescaler_128 ((uint8_t)0x05) -#define IWDG_Prescaler_256 ((uint8_t)0x06) -#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ - ((PRESCALER) == IWDG_Prescaler_8) || \ - ((PRESCALER) == IWDG_Prescaler_16) || \ - ((PRESCALER) == IWDG_Prescaler_32) || \ - ((PRESCALER) == IWDG_Prescaler_64) || \ - ((PRESCALER) == IWDG_Prescaler_128)|| \ - ((PRESCALER) == IWDG_Prescaler_256)) -/** - * @} - */ - -/** @defgroup IWDG_Flag - * @{ - */ - -#define IWDG_FLAG_PVU ((uint16_t)0x0001) -#define IWDG_FLAG_RVU ((uint16_t)0x0002) -#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) -#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Functions - * @{ - */ - -void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); -void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); -void IWDG_SetReload(uint16_t Reload); -void IWDG_ReloadCounter(void); -void IWDG_Enable(void); -FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_IWDG_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_iwdg.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the IWDG + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IWDG_H +#define __STM32F10x_IWDG_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup IWDG + * @{ + */ + +/** @defgroup IWDG_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Exported_Constants + * @{ + */ + +/** @defgroup IWDG_WriteAccess + * @{ + */ + +#define IWDG_WriteAccess_Enable ((uint16_t)0x5555) +#define IWDG_WriteAccess_Disable ((uint16_t)0x0000) +#define IS_IWDG_WRITE_ACCESS(ACCESS) (((ACCESS) == IWDG_WriteAccess_Enable) || \ + ((ACCESS) == IWDG_WriteAccess_Disable)) +/** + * @} + */ + +/** @defgroup IWDG_prescaler + * @{ + */ + +#define IWDG_Prescaler_4 ((uint8_t)0x00) +#define IWDG_Prescaler_8 ((uint8_t)0x01) +#define IWDG_Prescaler_16 ((uint8_t)0x02) +#define IWDG_Prescaler_32 ((uint8_t)0x03) +#define IWDG_Prescaler_64 ((uint8_t)0x04) +#define IWDG_Prescaler_128 ((uint8_t)0x05) +#define IWDG_Prescaler_256 ((uint8_t)0x06) +#define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_Prescaler_4) || \ + ((PRESCALER) == IWDG_Prescaler_8) || \ + ((PRESCALER) == IWDG_Prescaler_16) || \ + ((PRESCALER) == IWDG_Prescaler_32) || \ + ((PRESCALER) == IWDG_Prescaler_64) || \ + ((PRESCALER) == IWDG_Prescaler_128)|| \ + ((PRESCALER) == IWDG_Prescaler_256)) +/** + * @} + */ + +/** @defgroup IWDG_Flag + * @{ + */ + +#define IWDG_FLAG_PVU ((uint16_t)0x0001) +#define IWDG_FLAG_RVU ((uint16_t)0x0002) +#define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || ((FLAG) == IWDG_FLAG_RVU)) +#define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup IWDG_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Exported_Functions + * @{ + */ + +void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess); +void IWDG_SetPrescaler(uint8_t IWDG_Prescaler); +void IWDG_SetReload(uint16_t Reload); +void IWDG_ReloadCounter(void); +void IWDG_Enable(void); +FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_IWDG_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h index 1c025e2f..76e6ce91 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_pwr.h @@ -1,156 +1,156 @@ -/** - ****************************************************************************** - * @file stm32f10x_pwr.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the PWR firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_PWR_H -#define __STM32F10x_PWR_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup PWR - * @{ - */ - -/** @defgroup PWR_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Exported_Constants - * @{ - */ - -/** @defgroup PVD_detection_level - * @{ - */ - -#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) -#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) -#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) -#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) -#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) -#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) -#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) -#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) -#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ - ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ - ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ - ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) -/** - * @} - */ - -/** @defgroup Regulator_state_is_STOP_mode - * @{ - */ - -#define PWR_Regulator_ON ((uint32_t)0x00000000) -#define PWR_Regulator_LowPower ((uint32_t)0x00000001) -#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ - ((REGULATOR) == PWR_Regulator_LowPower)) -/** - * @} - */ - -/** @defgroup STOP_mode_entry - * @{ - */ - -#define PWR_STOPEntry_WFI ((uint8_t)0x01) -#define PWR_STOPEntry_WFE ((uint8_t)0x02) -#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) - -/** - * @} - */ - -/** @defgroup PWR_Flag - * @{ - */ - -#define PWR_FLAG_WU ((uint32_t)0x00000001) -#define PWR_FLAG_SB ((uint32_t)0x00000002) -#define PWR_FLAG_PVDO ((uint32_t)0x00000004) -#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ - ((FLAG) == PWR_FLAG_PVDO)) - -#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup PWR_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Exported_Functions - * @{ - */ - -void PWR_DeInit(void); -void PWR_BackupAccessCmd(FunctionalState NewState); -void PWR_PVDCmd(FunctionalState NewState); -void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); -void PWR_WakeUpPinCmd(FunctionalState NewState); -void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); -void PWR_EnterSTANDBYMode(void); -FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); -void PWR_ClearFlag(uint32_t PWR_FLAG); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_PWR_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_pwr.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the PWR firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_PWR_H +#define __STM32F10x_PWR_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup PWR + * @{ + */ + +/** @defgroup PWR_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Exported_Constants + * @{ + */ + +/** @defgroup PVD_detection_level + * @{ + */ + +#define PWR_PVDLevel_2V2 ((uint32_t)0x00000000) +#define PWR_PVDLevel_2V3 ((uint32_t)0x00000020) +#define PWR_PVDLevel_2V4 ((uint32_t)0x00000040) +#define PWR_PVDLevel_2V5 ((uint32_t)0x00000060) +#define PWR_PVDLevel_2V6 ((uint32_t)0x00000080) +#define PWR_PVDLevel_2V7 ((uint32_t)0x000000A0) +#define PWR_PVDLevel_2V8 ((uint32_t)0x000000C0) +#define PWR_PVDLevel_2V9 ((uint32_t)0x000000E0) +#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLevel_2V2) || ((LEVEL) == PWR_PVDLevel_2V3)|| \ + ((LEVEL) == PWR_PVDLevel_2V4) || ((LEVEL) == PWR_PVDLevel_2V5)|| \ + ((LEVEL) == PWR_PVDLevel_2V6) || ((LEVEL) == PWR_PVDLevel_2V7)|| \ + ((LEVEL) == PWR_PVDLevel_2V8) || ((LEVEL) == PWR_PVDLevel_2V9)) +/** + * @} + */ + +/** @defgroup Regulator_state_is_STOP_mode + * @{ + */ + +#define PWR_Regulator_ON ((uint32_t)0x00000000) +#define PWR_Regulator_LowPower ((uint32_t)0x00000001) +#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_Regulator_ON) || \ + ((REGULATOR) == PWR_Regulator_LowPower)) +/** + * @} + */ + +/** @defgroup STOP_mode_entry + * @{ + */ + +#define PWR_STOPEntry_WFI ((uint8_t)0x01) +#define PWR_STOPEntry_WFE ((uint8_t)0x02) +#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPEntry_WFI) || ((ENTRY) == PWR_STOPEntry_WFE)) + +/** + * @} + */ + +/** @defgroup PWR_Flag + * @{ + */ + +#define PWR_FLAG_WU ((uint32_t)0x00000001) +#define PWR_FLAG_SB ((uint32_t)0x00000002) +#define PWR_FLAG_PVDO ((uint32_t)0x00000004) +#define IS_PWR_GET_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB) || \ + ((FLAG) == PWR_FLAG_PVDO)) + +#define IS_PWR_CLEAR_FLAG(FLAG) (((FLAG) == PWR_FLAG_WU) || ((FLAG) == PWR_FLAG_SB)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup PWR_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Exported_Functions + * @{ + */ + +void PWR_DeInit(void); +void PWR_BackupAccessCmd(FunctionalState NewState); +void PWR_PVDCmd(FunctionalState NewState); +void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel); +void PWR_WakeUpPinCmd(FunctionalState NewState); +void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry); +void PWR_EnterSTANDBYMode(void); +FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG); +void PWR_ClearFlag(uint32_t PWR_FLAG); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_PWR_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h index 1149c347..b3b7d821 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rcc.h @@ -1,727 +1,727 @@ -/** - ****************************************************************************** - * @file stm32f10x_rcc.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the RCC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_RCC_H -#define __STM32F10x_RCC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup RCC - * @{ - */ - -/** @defgroup RCC_Exported_Types - * @{ - */ - -typedef struct -{ - uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */ - uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */ - uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */ - uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */ - uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */ -}RCC_ClocksTypeDef; - -/** - * @} - */ - -/** @defgroup RCC_Exported_Constants - * @{ - */ - -/** @defgroup HSE_configuration - * @{ - */ - -#define RCC_HSE_OFF ((uint32_t)0x00000000) -#define RCC_HSE_ON ((uint32_t)0x00010000) -#define RCC_HSE_Bypass ((uint32_t)0x00040000) -#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \ - ((HSE) == RCC_HSE_Bypass)) - -/** - * @} - */ - -/** @defgroup PLL_entry_clock_source - * @{ - */ - -#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000) - -#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL) - #define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000) - #define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000) - #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ - ((SOURCE) == RCC_PLLSource_HSE_Div1) || \ - ((SOURCE) == RCC_PLLSource_HSE_Div2)) -#else - #define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000) - #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ - ((SOURCE) == RCC_PLLSource_PREDIV1)) -#endif /* STM32F10X_CL */ - -/** - * @} - */ - -/** @defgroup PLL_multiplication_factor - * @{ - */ -#ifndef STM32F10X_CL - #define RCC_PLLMul_2 ((uint32_t)0x00000000) - #define RCC_PLLMul_3 ((uint32_t)0x00040000) - #define RCC_PLLMul_4 ((uint32_t)0x00080000) - #define RCC_PLLMul_5 ((uint32_t)0x000C0000) - #define RCC_PLLMul_6 ((uint32_t)0x00100000) - #define RCC_PLLMul_7 ((uint32_t)0x00140000) - #define RCC_PLLMul_8 ((uint32_t)0x00180000) - #define RCC_PLLMul_9 ((uint32_t)0x001C0000) - #define RCC_PLLMul_10 ((uint32_t)0x00200000) - #define RCC_PLLMul_11 ((uint32_t)0x00240000) - #define RCC_PLLMul_12 ((uint32_t)0x00280000) - #define RCC_PLLMul_13 ((uint32_t)0x002C0000) - #define RCC_PLLMul_14 ((uint32_t)0x00300000) - #define RCC_PLLMul_15 ((uint32_t)0x00340000) - #define RCC_PLLMul_16 ((uint32_t)0x00380000) - #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \ - ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ - ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ - ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ - ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \ - ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \ - ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \ - ((MUL) == RCC_PLLMul_16)) - -#else - #define RCC_PLLMul_4 ((uint32_t)0x00080000) - #define RCC_PLLMul_5 ((uint32_t)0x000C0000) - #define RCC_PLLMul_6 ((uint32_t)0x00100000) - #define RCC_PLLMul_7 ((uint32_t)0x00140000) - #define RCC_PLLMul_8 ((uint32_t)0x00180000) - #define RCC_PLLMul_9 ((uint32_t)0x001C0000) - #define RCC_PLLMul_6_5 ((uint32_t)0x00340000) - - #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ - ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ - ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ - ((MUL) == RCC_PLLMul_6_5)) -#endif /* STM32F10X_CL */ -/** - * @} - */ - -/** @defgroup PREDIV1_division_factor - * @{ - */ -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) - #define RCC_PREDIV1_Div1 ((uint32_t)0x00000000) - #define RCC_PREDIV1_Div2 ((uint32_t)0x00000001) - #define RCC_PREDIV1_Div3 ((uint32_t)0x00000002) - #define RCC_PREDIV1_Div4 ((uint32_t)0x00000003) - #define RCC_PREDIV1_Div5 ((uint32_t)0x00000004) - #define RCC_PREDIV1_Div6 ((uint32_t)0x00000005) - #define RCC_PREDIV1_Div7 ((uint32_t)0x00000006) - #define RCC_PREDIV1_Div8 ((uint32_t)0x00000007) - #define RCC_PREDIV1_Div9 ((uint32_t)0x00000008) - #define RCC_PREDIV1_Div10 ((uint32_t)0x00000009) - #define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A) - #define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B) - #define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C) - #define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D) - #define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E) - #define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F) - - #define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \ - ((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \ - ((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \ - ((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \ - ((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \ - ((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \ - ((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \ - ((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16)) -#endif -/** - * @} - */ - - -/** @defgroup PREDIV1_clock_source - * @{ - */ -#ifdef STM32F10X_CL -/* PREDIV1 clock source (for STM32 connectivity line devices) */ - #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) - #define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000) - - #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \ - ((SOURCE) == RCC_PREDIV1_Source_PLL2)) -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -/* PREDIV1 clock source (for STM32 Value line devices) */ - #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) - - #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE)) -#endif -/** - * @} - */ - -#ifdef STM32F10X_CL -/** @defgroup PREDIV2_division_factor - * @{ - */ - - #define RCC_PREDIV2_Div1 ((uint32_t)0x00000000) - #define RCC_PREDIV2_Div2 ((uint32_t)0x00000010) - #define RCC_PREDIV2_Div3 ((uint32_t)0x00000020) - #define RCC_PREDIV2_Div4 ((uint32_t)0x00000030) - #define RCC_PREDIV2_Div5 ((uint32_t)0x00000040) - #define RCC_PREDIV2_Div6 ((uint32_t)0x00000050) - #define RCC_PREDIV2_Div7 ((uint32_t)0x00000060) - #define RCC_PREDIV2_Div8 ((uint32_t)0x00000070) - #define RCC_PREDIV2_Div9 ((uint32_t)0x00000080) - #define RCC_PREDIV2_Div10 ((uint32_t)0x00000090) - #define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0) - #define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0) - #define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0) - #define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0) - #define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0) - #define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0) - - #define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \ - ((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \ - ((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \ - ((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \ - ((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \ - ((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \ - ((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \ - ((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16)) -/** - * @} - */ - - -/** @defgroup PLL2_multiplication_factor - * @{ - */ - - #define RCC_PLL2Mul_8 ((uint32_t)0x00000600) - #define RCC_PLL2Mul_9 ((uint32_t)0x00000700) - #define RCC_PLL2Mul_10 ((uint32_t)0x00000800) - #define RCC_PLL2Mul_11 ((uint32_t)0x00000900) - #define RCC_PLL2Mul_12 ((uint32_t)0x00000A00) - #define RCC_PLL2Mul_13 ((uint32_t)0x00000B00) - #define RCC_PLL2Mul_14 ((uint32_t)0x00000C00) - #define RCC_PLL2Mul_16 ((uint32_t)0x00000E00) - #define RCC_PLL2Mul_20 ((uint32_t)0x00000F00) - - #define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \ - ((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \ - ((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \ - ((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \ - ((MUL) == RCC_PLL2Mul_20)) -/** - * @} - */ - - -/** @defgroup PLL3_multiplication_factor - * @{ - */ - - #define RCC_PLL3Mul_8 ((uint32_t)0x00006000) - #define RCC_PLL3Mul_9 ((uint32_t)0x00007000) - #define RCC_PLL3Mul_10 ((uint32_t)0x00008000) - #define RCC_PLL3Mul_11 ((uint32_t)0x00009000) - #define RCC_PLL3Mul_12 ((uint32_t)0x0000A000) - #define RCC_PLL3Mul_13 ((uint32_t)0x0000B000) - #define RCC_PLL3Mul_14 ((uint32_t)0x0000C000) - #define RCC_PLL3Mul_16 ((uint32_t)0x0000E000) - #define RCC_PLL3Mul_20 ((uint32_t)0x0000F000) - - #define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \ - ((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \ - ((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \ - ((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \ - ((MUL) == RCC_PLL3Mul_20)) -/** - * @} - */ - -#endif /* STM32F10X_CL */ - - -/** @defgroup System_clock_source - * @{ - */ - -#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000) -#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001) -#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002) -#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ - ((SOURCE) == RCC_SYSCLKSource_HSE) || \ - ((SOURCE) == RCC_SYSCLKSource_PLLCLK)) -/** - * @} - */ - -/** @defgroup AHB_clock_source - * @{ - */ - -#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000) -#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080) -#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090) -#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0) -#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0) -#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0) -#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0) -#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0) -#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0) -#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \ - ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \ - ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \ - ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \ - ((HCLK) == RCC_SYSCLK_Div512)) -/** - * @} - */ - -/** @defgroup APB1_APB2_clock_source - * @{ - */ - -#define RCC_HCLK_Div1 ((uint32_t)0x00000000) -#define RCC_HCLK_Div2 ((uint32_t)0x00000400) -#define RCC_HCLK_Div4 ((uint32_t)0x00000500) -#define RCC_HCLK_Div8 ((uint32_t)0x00000600) -#define RCC_HCLK_Div16 ((uint32_t)0x00000700) -#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \ - ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \ - ((PCLK) == RCC_HCLK_Div16)) -/** - * @} - */ - -/** @defgroup RCC_Interrupt_source - * @{ - */ - -#define RCC_IT_LSIRDY ((uint8_t)0x01) -#define RCC_IT_LSERDY ((uint8_t)0x02) -#define RCC_IT_HSIRDY ((uint8_t)0x04) -#define RCC_IT_HSERDY ((uint8_t)0x08) -#define RCC_IT_PLLRDY ((uint8_t)0x10) -#define RCC_IT_CSS ((uint8_t)0x80) - -#ifndef STM32F10X_CL - #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00)) - #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ - ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ - ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS)) - #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00)) -#else - #define RCC_IT_PLL2RDY ((uint8_t)0x20) - #define RCC_IT_PLL3RDY ((uint8_t)0x40) - #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00)) - #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ - ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ - ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \ - ((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY)) - #define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00) -#endif /* STM32F10X_CL */ - - -/** - * @} - */ - -#ifndef STM32F10X_CL -/** @defgroup USB_Device_clock_source - * @{ - */ - - #define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00) - #define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01) - - #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \ - ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1)) -/** - * @} - */ -#else -/** @defgroup USB_OTG_FS_clock_source - * @{ - */ - #define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00) - #define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01) - - #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \ - ((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2)) -/** - * @} - */ -#endif /* STM32F10X_CL */ - - -#ifdef STM32F10X_CL -/** @defgroup I2S2_clock_source - * @{ - */ - #define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00) - #define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01) - - #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \ - ((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO)) -/** - * @} - */ - -/** @defgroup I2S3_clock_source - * @{ - */ - #define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00) - #define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01) - - #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \ - ((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO)) -/** - * @} - */ -#endif /* STM32F10X_CL */ - - -/** @defgroup ADC_clock_source - * @{ - */ - -#define RCC_PCLK2_Div2 ((uint32_t)0x00000000) -#define RCC_PCLK2_Div4 ((uint32_t)0x00004000) -#define RCC_PCLK2_Div6 ((uint32_t)0x00008000) -#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000) -#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \ - ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8)) -/** - * @} - */ - -/** @defgroup LSE_configuration - * @{ - */ - -#define RCC_LSE_OFF ((uint8_t)0x00) -#define RCC_LSE_ON ((uint8_t)0x01) -#define RCC_LSE_Bypass ((uint8_t)0x04) -#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \ - ((LSE) == RCC_LSE_Bypass)) -/** - * @} - */ - -/** @defgroup RTC_clock_source - * @{ - */ - -#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100) -#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200) -#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300) -#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ - ((SOURCE) == RCC_RTCCLKSource_LSI) || \ - ((SOURCE) == RCC_RTCCLKSource_HSE_Div128)) -/** - * @} - */ - -/** @defgroup AHB_peripheral - * @{ - */ - -#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001) -#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002) -#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004) -#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010) -#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040) - -#ifndef STM32F10X_CL - #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100) - #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400) - #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00)) -#else - #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000) - #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000) - #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000) - #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000) - - #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00)) - #define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00)) -#endif /* STM32F10X_CL */ -/** - * @} - */ - -/** @defgroup APB2_peripheral - * @{ - */ - -#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001) -#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004) -#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008) -#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010) -#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020) -#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040) -#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080) -#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100) -#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200) -#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400) -#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800) -#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000) -#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000) -#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000) -#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000) -#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000) -#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000) -#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000) -#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000) -#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000) -#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000) - -#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00)) -/** - * @} - */ - -/** @defgroup APB1_peripheral - * @{ - */ - -#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001) -#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002) -#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004) -#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008) -#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010) -#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020) -#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040) -#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080) -#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100) -#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800) -#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000) -#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000) -#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000) -#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000) -#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000) -#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000) -#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000) -#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000) -#define RCC_APB1Periph_USB ((uint32_t)0x00800000) -#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000) -#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000) -#define RCC_APB1Periph_BKP ((uint32_t)0x08000000) -#define RCC_APB1Periph_PWR ((uint32_t)0x10000000) -#define RCC_APB1Periph_DAC ((uint32_t)0x20000000) -#define RCC_APB1Periph_CEC ((uint32_t)0x40000000) - -#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00)) - -/** - * @} - */ - -/** @defgroup Clock_source_to_output_on_MCO_pin - * @{ - */ - -#define RCC_MCO_NoClock ((uint8_t)0x00) -#define RCC_MCO_SYSCLK ((uint8_t)0x04) -#define RCC_MCO_HSI ((uint8_t)0x05) -#define RCC_MCO_HSE ((uint8_t)0x06) -#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07) - -#ifndef STM32F10X_CL - #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ - ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ - ((MCO) == RCC_MCO_PLLCLK_Div2)) -#else - #define RCC_MCO_PLL2CLK ((uint8_t)0x08) - #define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09) - #define RCC_MCO_XT1 ((uint8_t)0x0A) - #define RCC_MCO_PLL3CLK ((uint8_t)0x0B) - - #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ - ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ - ((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \ - ((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \ - ((MCO) == RCC_MCO_PLL3CLK)) -#endif /* STM32F10X_CL */ - -/** - * @} - */ - -/** @defgroup RCC_Flag - * @{ - */ - -#define RCC_FLAG_HSIRDY ((uint8_t)0x21) -#define RCC_FLAG_HSERDY ((uint8_t)0x31) -#define RCC_FLAG_PLLRDY ((uint8_t)0x39) -#define RCC_FLAG_LSERDY ((uint8_t)0x41) -#define RCC_FLAG_LSIRDY ((uint8_t)0x61) -#define RCC_FLAG_PINRST ((uint8_t)0x7A) -#define RCC_FLAG_PORRST ((uint8_t)0x7B) -#define RCC_FLAG_SFTRST ((uint8_t)0x7C) -#define RCC_FLAG_IWDGRST ((uint8_t)0x7D) -#define RCC_FLAG_WWDGRST ((uint8_t)0x7E) -#define RCC_FLAG_LPWRRST ((uint8_t)0x7F) - -#ifndef STM32F10X_CL - #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ - ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ - ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ - ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ - ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ - ((FLAG) == RCC_FLAG_LPWRRST)) -#else - #define RCC_FLAG_PLL2RDY ((uint8_t)0x3B) - #define RCC_FLAG_PLL3RDY ((uint8_t)0x3D) - #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ - ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ - ((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \ - ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ - ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ - ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ - ((FLAG) == RCC_FLAG_LPWRRST)) -#endif /* STM32F10X_CL */ - -#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup RCC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Exported_Functions - * @{ - */ - -void RCC_DeInit(void); -void RCC_HSEConfig(uint32_t RCC_HSE); -ErrorStatus RCC_WaitForHSEStartUp(void); -void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue); -void RCC_HSICmd(FunctionalState NewState); -void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul); -void RCC_PLLCmd(FunctionalState NewState); - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) - void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div); -#endif - -#ifdef STM32F10X_CL - void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div); - void RCC_PLL2Config(uint32_t RCC_PLL2Mul); - void RCC_PLL2Cmd(FunctionalState NewState); - void RCC_PLL3Config(uint32_t RCC_PLL3Mul); - void RCC_PLL3Cmd(FunctionalState NewState); -#endif /* STM32F10X_CL */ - -void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource); -uint8_t RCC_GetSYSCLKSource(void); -void RCC_HCLKConfig(uint32_t RCC_SYSCLK); -void RCC_PCLK1Config(uint32_t RCC_HCLK); -void RCC_PCLK2Config(uint32_t RCC_HCLK); -void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState); - -#ifndef STM32F10X_CL - void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource); -#else - void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource); -#endif /* STM32F10X_CL */ - -void RCC_ADCCLKConfig(uint32_t RCC_PCLK2); - -#ifdef STM32F10X_CL - void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource); - void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource); -#endif /* STM32F10X_CL */ - -void RCC_LSEConfig(uint8_t RCC_LSE); -void RCC_LSICmd(FunctionalState NewState); -void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource); -void RCC_RTCCLKCmd(FunctionalState NewState); -void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); -void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); -void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); -void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); - -#ifdef STM32F10X_CL -void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); -#endif /* STM32F10X_CL */ - -void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); -void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); -void RCC_BackupResetCmd(FunctionalState NewState); -void RCC_ClockSecuritySystemCmd(FunctionalState NewState); -void RCC_MCOConfig(uint8_t RCC_MCO); -FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG); -void RCC_ClearFlag(void); -ITStatus RCC_GetITStatus(uint8_t RCC_IT); -void RCC_ClearITPendingBit(uint8_t RCC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_RCC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_rcc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the RCC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_RCC_H +#define __STM32F10x_RCC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup RCC + * @{ + */ + +/** @defgroup RCC_Exported_Types + * @{ + */ + +typedef struct +{ + uint32_t SYSCLK_Frequency; /*!< returns SYSCLK clock frequency expressed in Hz */ + uint32_t HCLK_Frequency; /*!< returns HCLK clock frequency expressed in Hz */ + uint32_t PCLK1_Frequency; /*!< returns PCLK1 clock frequency expressed in Hz */ + uint32_t PCLK2_Frequency; /*!< returns PCLK2 clock frequency expressed in Hz */ + uint32_t ADCCLK_Frequency; /*!< returns ADCCLK clock frequency expressed in Hz */ +}RCC_ClocksTypeDef; + +/** + * @} + */ + +/** @defgroup RCC_Exported_Constants + * @{ + */ + +/** @defgroup HSE_configuration + * @{ + */ + +#define RCC_HSE_OFF ((uint32_t)0x00000000) +#define RCC_HSE_ON ((uint32_t)0x00010000) +#define RCC_HSE_Bypass ((uint32_t)0x00040000) +#define IS_RCC_HSE(HSE) (((HSE) == RCC_HSE_OFF) || ((HSE) == RCC_HSE_ON) || \ + ((HSE) == RCC_HSE_Bypass)) + +/** + * @} + */ + +/** @defgroup PLL_entry_clock_source + * @{ + */ + +#define RCC_PLLSource_HSI_Div2 ((uint32_t)0x00000000) + +#if !defined (STM32F10X_LD_VL) && !defined (STM32F10X_MD_VL) && !defined (STM32F10X_HD_VL) && !defined (STM32F10X_CL) + #define RCC_PLLSource_HSE_Div1 ((uint32_t)0x00010000) + #define RCC_PLLSource_HSE_Div2 ((uint32_t)0x00030000) + #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ + ((SOURCE) == RCC_PLLSource_HSE_Div1) || \ + ((SOURCE) == RCC_PLLSource_HSE_Div2)) +#else + #define RCC_PLLSource_PREDIV1 ((uint32_t)0x00010000) + #define IS_RCC_PLL_SOURCE(SOURCE) (((SOURCE) == RCC_PLLSource_HSI_Div2) || \ + ((SOURCE) == RCC_PLLSource_PREDIV1)) +#endif /* STM32F10X_CL */ + +/** + * @} + */ + +/** @defgroup PLL_multiplication_factor + * @{ + */ +#ifndef STM32F10X_CL + #define RCC_PLLMul_2 ((uint32_t)0x00000000) + #define RCC_PLLMul_3 ((uint32_t)0x00040000) + #define RCC_PLLMul_4 ((uint32_t)0x00080000) + #define RCC_PLLMul_5 ((uint32_t)0x000C0000) + #define RCC_PLLMul_6 ((uint32_t)0x00100000) + #define RCC_PLLMul_7 ((uint32_t)0x00140000) + #define RCC_PLLMul_8 ((uint32_t)0x00180000) + #define RCC_PLLMul_9 ((uint32_t)0x001C0000) + #define RCC_PLLMul_10 ((uint32_t)0x00200000) + #define RCC_PLLMul_11 ((uint32_t)0x00240000) + #define RCC_PLLMul_12 ((uint32_t)0x00280000) + #define RCC_PLLMul_13 ((uint32_t)0x002C0000) + #define RCC_PLLMul_14 ((uint32_t)0x00300000) + #define RCC_PLLMul_15 ((uint32_t)0x00340000) + #define RCC_PLLMul_16 ((uint32_t)0x00380000) + #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_2) || ((MUL) == RCC_PLLMul_3) || \ + ((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ + ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ + ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ + ((MUL) == RCC_PLLMul_10) || ((MUL) == RCC_PLLMul_11) || \ + ((MUL) == RCC_PLLMul_12) || ((MUL) == RCC_PLLMul_13) || \ + ((MUL) == RCC_PLLMul_14) || ((MUL) == RCC_PLLMul_15) || \ + ((MUL) == RCC_PLLMul_16)) + +#else + #define RCC_PLLMul_4 ((uint32_t)0x00080000) + #define RCC_PLLMul_5 ((uint32_t)0x000C0000) + #define RCC_PLLMul_6 ((uint32_t)0x00100000) + #define RCC_PLLMul_7 ((uint32_t)0x00140000) + #define RCC_PLLMul_8 ((uint32_t)0x00180000) + #define RCC_PLLMul_9 ((uint32_t)0x001C0000) + #define RCC_PLLMul_6_5 ((uint32_t)0x00340000) + + #define IS_RCC_PLL_MUL(MUL) (((MUL) == RCC_PLLMul_4) || ((MUL) == RCC_PLLMul_5) || \ + ((MUL) == RCC_PLLMul_6) || ((MUL) == RCC_PLLMul_7) || \ + ((MUL) == RCC_PLLMul_8) || ((MUL) == RCC_PLLMul_9) || \ + ((MUL) == RCC_PLLMul_6_5)) +#endif /* STM32F10X_CL */ +/** + * @} + */ + +/** @defgroup PREDIV1_division_factor + * @{ + */ +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) + #define RCC_PREDIV1_Div1 ((uint32_t)0x00000000) + #define RCC_PREDIV1_Div2 ((uint32_t)0x00000001) + #define RCC_PREDIV1_Div3 ((uint32_t)0x00000002) + #define RCC_PREDIV1_Div4 ((uint32_t)0x00000003) + #define RCC_PREDIV1_Div5 ((uint32_t)0x00000004) + #define RCC_PREDIV1_Div6 ((uint32_t)0x00000005) + #define RCC_PREDIV1_Div7 ((uint32_t)0x00000006) + #define RCC_PREDIV1_Div8 ((uint32_t)0x00000007) + #define RCC_PREDIV1_Div9 ((uint32_t)0x00000008) + #define RCC_PREDIV1_Div10 ((uint32_t)0x00000009) + #define RCC_PREDIV1_Div11 ((uint32_t)0x0000000A) + #define RCC_PREDIV1_Div12 ((uint32_t)0x0000000B) + #define RCC_PREDIV1_Div13 ((uint32_t)0x0000000C) + #define RCC_PREDIV1_Div14 ((uint32_t)0x0000000D) + #define RCC_PREDIV1_Div15 ((uint32_t)0x0000000E) + #define RCC_PREDIV1_Div16 ((uint32_t)0x0000000F) + + #define IS_RCC_PREDIV1(PREDIV1) (((PREDIV1) == RCC_PREDIV1_Div1) || ((PREDIV1) == RCC_PREDIV1_Div2) || \ + ((PREDIV1) == RCC_PREDIV1_Div3) || ((PREDIV1) == RCC_PREDIV1_Div4) || \ + ((PREDIV1) == RCC_PREDIV1_Div5) || ((PREDIV1) == RCC_PREDIV1_Div6) || \ + ((PREDIV1) == RCC_PREDIV1_Div7) || ((PREDIV1) == RCC_PREDIV1_Div8) || \ + ((PREDIV1) == RCC_PREDIV1_Div9) || ((PREDIV1) == RCC_PREDIV1_Div10) || \ + ((PREDIV1) == RCC_PREDIV1_Div11) || ((PREDIV1) == RCC_PREDIV1_Div12) || \ + ((PREDIV1) == RCC_PREDIV1_Div13) || ((PREDIV1) == RCC_PREDIV1_Div14) || \ + ((PREDIV1) == RCC_PREDIV1_Div15) || ((PREDIV1) == RCC_PREDIV1_Div16)) +#endif +/** + * @} + */ + + +/** @defgroup PREDIV1_clock_source + * @{ + */ +#ifdef STM32F10X_CL +/* PREDIV1 clock source (for STM32 connectivity line devices) */ + #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) + #define RCC_PREDIV1_Source_PLL2 ((uint32_t)0x00010000) + + #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE) || \ + ((SOURCE) == RCC_PREDIV1_Source_PLL2)) +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/* PREDIV1 clock source (for STM32 Value line devices) */ + #define RCC_PREDIV1_Source_HSE ((uint32_t)0x00000000) + + #define IS_RCC_PREDIV1_SOURCE(SOURCE) (((SOURCE) == RCC_PREDIV1_Source_HSE)) +#endif +/** + * @} + */ + +#ifdef STM32F10X_CL +/** @defgroup PREDIV2_division_factor + * @{ + */ + + #define RCC_PREDIV2_Div1 ((uint32_t)0x00000000) + #define RCC_PREDIV2_Div2 ((uint32_t)0x00000010) + #define RCC_PREDIV2_Div3 ((uint32_t)0x00000020) + #define RCC_PREDIV2_Div4 ((uint32_t)0x00000030) + #define RCC_PREDIV2_Div5 ((uint32_t)0x00000040) + #define RCC_PREDIV2_Div6 ((uint32_t)0x00000050) + #define RCC_PREDIV2_Div7 ((uint32_t)0x00000060) + #define RCC_PREDIV2_Div8 ((uint32_t)0x00000070) + #define RCC_PREDIV2_Div9 ((uint32_t)0x00000080) + #define RCC_PREDIV2_Div10 ((uint32_t)0x00000090) + #define RCC_PREDIV2_Div11 ((uint32_t)0x000000A0) + #define RCC_PREDIV2_Div12 ((uint32_t)0x000000B0) + #define RCC_PREDIV2_Div13 ((uint32_t)0x000000C0) + #define RCC_PREDIV2_Div14 ((uint32_t)0x000000D0) + #define RCC_PREDIV2_Div15 ((uint32_t)0x000000E0) + #define RCC_PREDIV2_Div16 ((uint32_t)0x000000F0) + + #define IS_RCC_PREDIV2(PREDIV2) (((PREDIV2) == RCC_PREDIV2_Div1) || ((PREDIV2) == RCC_PREDIV2_Div2) || \ + ((PREDIV2) == RCC_PREDIV2_Div3) || ((PREDIV2) == RCC_PREDIV2_Div4) || \ + ((PREDIV2) == RCC_PREDIV2_Div5) || ((PREDIV2) == RCC_PREDIV2_Div6) || \ + ((PREDIV2) == RCC_PREDIV2_Div7) || ((PREDIV2) == RCC_PREDIV2_Div8) || \ + ((PREDIV2) == RCC_PREDIV2_Div9) || ((PREDIV2) == RCC_PREDIV2_Div10) || \ + ((PREDIV2) == RCC_PREDIV2_Div11) || ((PREDIV2) == RCC_PREDIV2_Div12) || \ + ((PREDIV2) == RCC_PREDIV2_Div13) || ((PREDIV2) == RCC_PREDIV2_Div14) || \ + ((PREDIV2) == RCC_PREDIV2_Div15) || ((PREDIV2) == RCC_PREDIV2_Div16)) +/** + * @} + */ + + +/** @defgroup PLL2_multiplication_factor + * @{ + */ + + #define RCC_PLL2Mul_8 ((uint32_t)0x00000600) + #define RCC_PLL2Mul_9 ((uint32_t)0x00000700) + #define RCC_PLL2Mul_10 ((uint32_t)0x00000800) + #define RCC_PLL2Mul_11 ((uint32_t)0x00000900) + #define RCC_PLL2Mul_12 ((uint32_t)0x00000A00) + #define RCC_PLL2Mul_13 ((uint32_t)0x00000B00) + #define RCC_PLL2Mul_14 ((uint32_t)0x00000C00) + #define RCC_PLL2Mul_16 ((uint32_t)0x00000E00) + #define RCC_PLL2Mul_20 ((uint32_t)0x00000F00) + + #define IS_RCC_PLL2_MUL(MUL) (((MUL) == RCC_PLL2Mul_8) || ((MUL) == RCC_PLL2Mul_9) || \ + ((MUL) == RCC_PLL2Mul_10) || ((MUL) == RCC_PLL2Mul_11) || \ + ((MUL) == RCC_PLL2Mul_12) || ((MUL) == RCC_PLL2Mul_13) || \ + ((MUL) == RCC_PLL2Mul_14) || ((MUL) == RCC_PLL2Mul_16) || \ + ((MUL) == RCC_PLL2Mul_20)) +/** + * @} + */ + + +/** @defgroup PLL3_multiplication_factor + * @{ + */ + + #define RCC_PLL3Mul_8 ((uint32_t)0x00006000) + #define RCC_PLL3Mul_9 ((uint32_t)0x00007000) + #define RCC_PLL3Mul_10 ((uint32_t)0x00008000) + #define RCC_PLL3Mul_11 ((uint32_t)0x00009000) + #define RCC_PLL3Mul_12 ((uint32_t)0x0000A000) + #define RCC_PLL3Mul_13 ((uint32_t)0x0000B000) + #define RCC_PLL3Mul_14 ((uint32_t)0x0000C000) + #define RCC_PLL3Mul_16 ((uint32_t)0x0000E000) + #define RCC_PLL3Mul_20 ((uint32_t)0x0000F000) + + #define IS_RCC_PLL3_MUL(MUL) (((MUL) == RCC_PLL3Mul_8) || ((MUL) == RCC_PLL3Mul_9) || \ + ((MUL) == RCC_PLL3Mul_10) || ((MUL) == RCC_PLL3Mul_11) || \ + ((MUL) == RCC_PLL3Mul_12) || ((MUL) == RCC_PLL3Mul_13) || \ + ((MUL) == RCC_PLL3Mul_14) || ((MUL) == RCC_PLL3Mul_16) || \ + ((MUL) == RCC_PLL3Mul_20)) +/** + * @} + */ + +#endif /* STM32F10X_CL */ + + +/** @defgroup System_clock_source + * @{ + */ + +#define RCC_SYSCLKSource_HSI ((uint32_t)0x00000000) +#define RCC_SYSCLKSource_HSE ((uint32_t)0x00000001) +#define RCC_SYSCLKSource_PLLCLK ((uint32_t)0x00000002) +#define IS_RCC_SYSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_SYSCLKSource_HSI) || \ + ((SOURCE) == RCC_SYSCLKSource_HSE) || \ + ((SOURCE) == RCC_SYSCLKSource_PLLCLK)) +/** + * @} + */ + +/** @defgroup AHB_clock_source + * @{ + */ + +#define RCC_SYSCLK_Div1 ((uint32_t)0x00000000) +#define RCC_SYSCLK_Div2 ((uint32_t)0x00000080) +#define RCC_SYSCLK_Div4 ((uint32_t)0x00000090) +#define RCC_SYSCLK_Div8 ((uint32_t)0x000000A0) +#define RCC_SYSCLK_Div16 ((uint32_t)0x000000B0) +#define RCC_SYSCLK_Div64 ((uint32_t)0x000000C0) +#define RCC_SYSCLK_Div128 ((uint32_t)0x000000D0) +#define RCC_SYSCLK_Div256 ((uint32_t)0x000000E0) +#define RCC_SYSCLK_Div512 ((uint32_t)0x000000F0) +#define IS_RCC_HCLK(HCLK) (((HCLK) == RCC_SYSCLK_Div1) || ((HCLK) == RCC_SYSCLK_Div2) || \ + ((HCLK) == RCC_SYSCLK_Div4) || ((HCLK) == RCC_SYSCLK_Div8) || \ + ((HCLK) == RCC_SYSCLK_Div16) || ((HCLK) == RCC_SYSCLK_Div64) || \ + ((HCLK) == RCC_SYSCLK_Div128) || ((HCLK) == RCC_SYSCLK_Div256) || \ + ((HCLK) == RCC_SYSCLK_Div512)) +/** + * @} + */ + +/** @defgroup APB1_APB2_clock_source + * @{ + */ + +#define RCC_HCLK_Div1 ((uint32_t)0x00000000) +#define RCC_HCLK_Div2 ((uint32_t)0x00000400) +#define RCC_HCLK_Div4 ((uint32_t)0x00000500) +#define RCC_HCLK_Div8 ((uint32_t)0x00000600) +#define RCC_HCLK_Div16 ((uint32_t)0x00000700) +#define IS_RCC_PCLK(PCLK) (((PCLK) == RCC_HCLK_Div1) || ((PCLK) == RCC_HCLK_Div2) || \ + ((PCLK) == RCC_HCLK_Div4) || ((PCLK) == RCC_HCLK_Div8) || \ + ((PCLK) == RCC_HCLK_Div16)) +/** + * @} + */ + +/** @defgroup RCC_Interrupt_source + * @{ + */ + +#define RCC_IT_LSIRDY ((uint8_t)0x01) +#define RCC_IT_LSERDY ((uint8_t)0x02) +#define RCC_IT_HSIRDY ((uint8_t)0x04) +#define RCC_IT_HSERDY ((uint8_t)0x08) +#define RCC_IT_PLLRDY ((uint8_t)0x10) +#define RCC_IT_CSS ((uint8_t)0x80) + +#ifndef STM32F10X_CL + #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0xE0) == 0x00) && ((IT) != 0x00)) + #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ + ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ + ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS)) + #define IS_RCC_CLEAR_IT(IT) ((((IT) & (uint8_t)0x60) == 0x00) && ((IT) != 0x00)) +#else + #define RCC_IT_PLL2RDY ((uint8_t)0x20) + #define RCC_IT_PLL3RDY ((uint8_t)0x40) + #define IS_RCC_IT(IT) ((((IT) & (uint8_t)0x80) == 0x00) && ((IT) != 0x00)) + #define IS_RCC_GET_IT(IT) (((IT) == RCC_IT_LSIRDY) || ((IT) == RCC_IT_LSERDY) || \ + ((IT) == RCC_IT_HSIRDY) || ((IT) == RCC_IT_HSERDY) || \ + ((IT) == RCC_IT_PLLRDY) || ((IT) == RCC_IT_CSS) || \ + ((IT) == RCC_IT_PLL2RDY) || ((IT) == RCC_IT_PLL3RDY)) + #define IS_RCC_CLEAR_IT(IT) ((IT) != 0x00) +#endif /* STM32F10X_CL */ + + +/** + * @} + */ + +#ifndef STM32F10X_CL +/** @defgroup USB_Device_clock_source + * @{ + */ + + #define RCC_USBCLKSource_PLLCLK_1Div5 ((uint8_t)0x00) + #define RCC_USBCLKSource_PLLCLK_Div1 ((uint8_t)0x01) + + #define IS_RCC_USBCLK_SOURCE(SOURCE) (((SOURCE) == RCC_USBCLKSource_PLLCLK_1Div5) || \ + ((SOURCE) == RCC_USBCLKSource_PLLCLK_Div1)) +/** + * @} + */ +#else +/** @defgroup USB_OTG_FS_clock_source + * @{ + */ + #define RCC_OTGFSCLKSource_PLLVCO_Div3 ((uint8_t)0x00) + #define RCC_OTGFSCLKSource_PLLVCO_Div2 ((uint8_t)0x01) + + #define IS_RCC_OTGFSCLK_SOURCE(SOURCE) (((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div3) || \ + ((SOURCE) == RCC_OTGFSCLKSource_PLLVCO_Div2)) +/** + * @} + */ +#endif /* STM32F10X_CL */ + + +#ifdef STM32F10X_CL +/** @defgroup I2S2_clock_source + * @{ + */ + #define RCC_I2S2CLKSource_SYSCLK ((uint8_t)0x00) + #define RCC_I2S2CLKSource_PLL3_VCO ((uint8_t)0x01) + + #define IS_RCC_I2S2CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S2CLKSource_SYSCLK) || \ + ((SOURCE) == RCC_I2S2CLKSource_PLL3_VCO)) +/** + * @} + */ + +/** @defgroup I2S3_clock_source + * @{ + */ + #define RCC_I2S3CLKSource_SYSCLK ((uint8_t)0x00) + #define RCC_I2S3CLKSource_PLL3_VCO ((uint8_t)0x01) + + #define IS_RCC_I2S3CLK_SOURCE(SOURCE) (((SOURCE) == RCC_I2S3CLKSource_SYSCLK) || \ + ((SOURCE) == RCC_I2S3CLKSource_PLL3_VCO)) +/** + * @} + */ +#endif /* STM32F10X_CL */ + + +/** @defgroup ADC_clock_source + * @{ + */ + +#define RCC_PCLK2_Div2 ((uint32_t)0x00000000) +#define RCC_PCLK2_Div4 ((uint32_t)0x00004000) +#define RCC_PCLK2_Div6 ((uint32_t)0x00008000) +#define RCC_PCLK2_Div8 ((uint32_t)0x0000C000) +#define IS_RCC_ADCCLK(ADCCLK) (((ADCCLK) == RCC_PCLK2_Div2) || ((ADCCLK) == RCC_PCLK2_Div4) || \ + ((ADCCLK) == RCC_PCLK2_Div6) || ((ADCCLK) == RCC_PCLK2_Div8)) +/** + * @} + */ + +/** @defgroup LSE_configuration + * @{ + */ + +#define RCC_LSE_OFF ((uint8_t)0x00) +#define RCC_LSE_ON ((uint8_t)0x01) +#define RCC_LSE_Bypass ((uint8_t)0x04) +#define IS_RCC_LSE(LSE) (((LSE) == RCC_LSE_OFF) || ((LSE) == RCC_LSE_ON) || \ + ((LSE) == RCC_LSE_Bypass)) +/** + * @} + */ + +/** @defgroup RTC_clock_source + * @{ + */ + +#define RCC_RTCCLKSource_LSE ((uint32_t)0x00000100) +#define RCC_RTCCLKSource_LSI ((uint32_t)0x00000200) +#define RCC_RTCCLKSource_HSE_Div128 ((uint32_t)0x00000300) +#define IS_RCC_RTCCLK_SOURCE(SOURCE) (((SOURCE) == RCC_RTCCLKSource_LSE) || \ + ((SOURCE) == RCC_RTCCLKSource_LSI) || \ + ((SOURCE) == RCC_RTCCLKSource_HSE_Div128)) +/** + * @} + */ + +/** @defgroup AHB_peripheral + * @{ + */ + +#define RCC_AHBPeriph_DMA1 ((uint32_t)0x00000001) +#define RCC_AHBPeriph_DMA2 ((uint32_t)0x00000002) +#define RCC_AHBPeriph_SRAM ((uint32_t)0x00000004) +#define RCC_AHBPeriph_FLITF ((uint32_t)0x00000010) +#define RCC_AHBPeriph_CRC ((uint32_t)0x00000040) + +#ifndef STM32F10X_CL + #define RCC_AHBPeriph_FSMC ((uint32_t)0x00000100) + #define RCC_AHBPeriph_SDIO ((uint32_t)0x00000400) + #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFFFAA8) == 0x00) && ((PERIPH) != 0x00)) +#else + #define RCC_AHBPeriph_OTG_FS ((uint32_t)0x00001000) + #define RCC_AHBPeriph_ETH_MAC ((uint32_t)0x00004000) + #define RCC_AHBPeriph_ETH_MAC_Tx ((uint32_t)0x00008000) + #define RCC_AHBPeriph_ETH_MAC_Rx ((uint32_t)0x00010000) + + #define IS_RCC_AHB_PERIPH(PERIPH) ((((PERIPH) & 0xFFFE2FA8) == 0x00) && ((PERIPH) != 0x00)) + #define IS_RCC_AHB_PERIPH_RESET(PERIPH) ((((PERIPH) & 0xFFFFAFFF) == 0x00) && ((PERIPH) != 0x00)) +#endif /* STM32F10X_CL */ +/** + * @} + */ + +/** @defgroup APB2_peripheral + * @{ + */ + +#define RCC_APB2Periph_AFIO ((uint32_t)0x00000001) +#define RCC_APB2Periph_GPIOA ((uint32_t)0x00000004) +#define RCC_APB2Periph_GPIOB ((uint32_t)0x00000008) +#define RCC_APB2Periph_GPIOC ((uint32_t)0x00000010) +#define RCC_APB2Periph_GPIOD ((uint32_t)0x00000020) +#define RCC_APB2Periph_GPIOE ((uint32_t)0x00000040) +#define RCC_APB2Periph_GPIOF ((uint32_t)0x00000080) +#define RCC_APB2Periph_GPIOG ((uint32_t)0x00000100) +#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000200) +#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000400) +#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000800) +#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000) +#define RCC_APB2Periph_TIM8 ((uint32_t)0x00002000) +#define RCC_APB2Periph_USART1 ((uint32_t)0x00004000) +#define RCC_APB2Periph_ADC3 ((uint32_t)0x00008000) +#define RCC_APB2Periph_TIM15 ((uint32_t)0x00010000) +#define RCC_APB2Periph_TIM16 ((uint32_t)0x00020000) +#define RCC_APB2Periph_TIM17 ((uint32_t)0x00040000) +#define RCC_APB2Periph_TIM9 ((uint32_t)0x00080000) +#define RCC_APB2Periph_TIM10 ((uint32_t)0x00100000) +#define RCC_APB2Periph_TIM11 ((uint32_t)0x00200000) + +#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFC00002) == 0x00) && ((PERIPH) != 0x00)) +/** + * @} + */ + +/** @defgroup APB1_peripheral + * @{ + */ + +#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001) +#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002) +#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004) +#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008) +#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010) +#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020) +#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040) +#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080) +#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100) +#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800) +#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000) +#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000) +#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000) +#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000) +#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000) +#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000) +#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000) +#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000) +#define RCC_APB1Periph_USB ((uint32_t)0x00800000) +#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000) +#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000) +#define RCC_APB1Periph_BKP ((uint32_t)0x08000000) +#define RCC_APB1Periph_PWR ((uint32_t)0x10000000) +#define RCC_APB1Periph_DAC ((uint32_t)0x20000000) +#define RCC_APB1Periph_CEC ((uint32_t)0x40000000) + +#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0x81013600) == 0x00) && ((PERIPH) != 0x00)) + +/** + * @} + */ + +/** @defgroup Clock_source_to_output_on_MCO_pin + * @{ + */ + +#define RCC_MCO_NoClock ((uint8_t)0x00) +#define RCC_MCO_SYSCLK ((uint8_t)0x04) +#define RCC_MCO_HSI ((uint8_t)0x05) +#define RCC_MCO_HSE ((uint8_t)0x06) +#define RCC_MCO_PLLCLK_Div2 ((uint8_t)0x07) + +#ifndef STM32F10X_CL + #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ + ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ + ((MCO) == RCC_MCO_PLLCLK_Div2)) +#else + #define RCC_MCO_PLL2CLK ((uint8_t)0x08) + #define RCC_MCO_PLL3CLK_Div2 ((uint8_t)0x09) + #define RCC_MCO_XT1 ((uint8_t)0x0A) + #define RCC_MCO_PLL3CLK ((uint8_t)0x0B) + + #define IS_RCC_MCO(MCO) (((MCO) == RCC_MCO_NoClock) || ((MCO) == RCC_MCO_HSI) || \ + ((MCO) == RCC_MCO_SYSCLK) || ((MCO) == RCC_MCO_HSE) || \ + ((MCO) == RCC_MCO_PLLCLK_Div2) || ((MCO) == RCC_MCO_PLL2CLK) || \ + ((MCO) == RCC_MCO_PLL3CLK_Div2) || ((MCO) == RCC_MCO_XT1) || \ + ((MCO) == RCC_MCO_PLL3CLK)) +#endif /* STM32F10X_CL */ + +/** + * @} + */ + +/** @defgroup RCC_Flag + * @{ + */ + +#define RCC_FLAG_HSIRDY ((uint8_t)0x21) +#define RCC_FLAG_HSERDY ((uint8_t)0x31) +#define RCC_FLAG_PLLRDY ((uint8_t)0x39) +#define RCC_FLAG_LSERDY ((uint8_t)0x41) +#define RCC_FLAG_LSIRDY ((uint8_t)0x61) +#define RCC_FLAG_PINRST ((uint8_t)0x7A) +#define RCC_FLAG_PORRST ((uint8_t)0x7B) +#define RCC_FLAG_SFTRST ((uint8_t)0x7C) +#define RCC_FLAG_IWDGRST ((uint8_t)0x7D) +#define RCC_FLAG_WWDGRST ((uint8_t)0x7E) +#define RCC_FLAG_LPWRRST ((uint8_t)0x7F) + +#ifndef STM32F10X_CL + #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ + ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ + ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ + ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ + ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ + ((FLAG) == RCC_FLAG_LPWRRST)) +#else + #define RCC_FLAG_PLL2RDY ((uint8_t)0x3B) + #define RCC_FLAG_PLL3RDY ((uint8_t)0x3D) + #define IS_RCC_FLAG(FLAG) (((FLAG) == RCC_FLAG_HSIRDY) || ((FLAG) == RCC_FLAG_HSERDY) || \ + ((FLAG) == RCC_FLAG_PLLRDY) || ((FLAG) == RCC_FLAG_LSERDY) || \ + ((FLAG) == RCC_FLAG_PLL2RDY) || ((FLAG) == RCC_FLAG_PLL3RDY) || \ + ((FLAG) == RCC_FLAG_LSIRDY) || ((FLAG) == RCC_FLAG_PINRST) || \ + ((FLAG) == RCC_FLAG_PORRST) || ((FLAG) == RCC_FLAG_SFTRST) || \ + ((FLAG) == RCC_FLAG_IWDGRST)|| ((FLAG) == RCC_FLAG_WWDGRST)|| \ + ((FLAG) == RCC_FLAG_LPWRRST)) +#endif /* STM32F10X_CL */ + +#define IS_RCC_CALIBRATION_VALUE(VALUE) ((VALUE) <= 0x1F) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup RCC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Exported_Functions + * @{ + */ + +void RCC_DeInit(void); +void RCC_HSEConfig(uint32_t RCC_HSE); +ErrorStatus RCC_WaitForHSEStartUp(void); +void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue); +void RCC_HSICmd(FunctionalState NewState); +void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul); +void RCC_PLLCmd(FunctionalState NewState); + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) + void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div); +#endif + +#ifdef STM32F10X_CL + void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div); + void RCC_PLL2Config(uint32_t RCC_PLL2Mul); + void RCC_PLL2Cmd(FunctionalState NewState); + void RCC_PLL3Config(uint32_t RCC_PLL3Mul); + void RCC_PLL3Cmd(FunctionalState NewState); +#endif /* STM32F10X_CL */ + +void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource); +uint8_t RCC_GetSYSCLKSource(void); +void RCC_HCLKConfig(uint32_t RCC_SYSCLK); +void RCC_PCLK1Config(uint32_t RCC_HCLK); +void RCC_PCLK2Config(uint32_t RCC_HCLK); +void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState); + +#ifndef STM32F10X_CL + void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource); +#else + void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource); +#endif /* STM32F10X_CL */ + +void RCC_ADCCLKConfig(uint32_t RCC_PCLK2); + +#ifdef STM32F10X_CL + void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource); + void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource); +#endif /* STM32F10X_CL */ + +void RCC_LSEConfig(uint8_t RCC_LSE); +void RCC_LSICmd(FunctionalState NewState); +void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource); +void RCC_RTCCLKCmd(FunctionalState NewState); +void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks); +void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); +void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); +void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); + +#ifdef STM32F10X_CL +void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState); +#endif /* STM32F10X_CL */ + +void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState); +void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState); +void RCC_BackupResetCmd(FunctionalState NewState); +void RCC_ClockSecuritySystemCmd(FunctionalState NewState); +void RCC_MCOConfig(uint8_t RCC_MCO); +FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG); +void RCC_ClearFlag(void); +ITStatus RCC_GetITStatus(uint8_t RCC_IT); +void RCC_ClearITPendingBit(uint8_t RCC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_RCC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h index fd8beb5b..214a5893 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_rtc.h @@ -1,135 +1,135 @@ -/** - ****************************************************************************** - * @file stm32f10x_rtc.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the RTC firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_RTC_H -#define __STM32F10x_RTC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup RTC - * @{ - */ - -/** @defgroup RTC_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Exported_Constants - * @{ - */ - -/** @defgroup RTC_interrupts_define - * @{ - */ - -#define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ -#define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ -#define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ -#define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) -#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ - ((IT) == RTC_IT_SEC)) -/** - * @} - */ - -/** @defgroup RTC_interrupts_flags - * @{ - */ - -#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ -#define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ -#define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ -#define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ -#define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ -#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) -#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ - ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ - ((FLAG) == RTC_FLAG_SEC)) -#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup RTC_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Exported_Functions - * @{ - */ - -void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); -void RTC_EnterConfigMode(void); -void RTC_ExitConfigMode(void); -uint32_t RTC_GetCounter(void); -void RTC_SetCounter(uint32_t CounterValue); -void RTC_SetPrescaler(uint32_t PrescalerValue); -void RTC_SetAlarm(uint32_t AlarmValue); -uint32_t RTC_GetDivider(void); -void RTC_WaitForLastTask(void); -void RTC_WaitForSynchro(void); -FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); -void RTC_ClearFlag(uint16_t RTC_FLAG); -ITStatus RTC_GetITStatus(uint16_t RTC_IT); -void RTC_ClearITPendingBit(uint16_t RTC_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_RTC_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_rtc.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the RTC firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_RTC_H +#define __STM32F10x_RTC_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup RTC + * @{ + */ + +/** @defgroup RTC_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Exported_Constants + * @{ + */ + +/** @defgroup RTC_interrupts_define + * @{ + */ + +#define RTC_IT_OW ((uint16_t)0x0004) /*!< Overflow interrupt */ +#define RTC_IT_ALR ((uint16_t)0x0002) /*!< Alarm interrupt */ +#define RTC_IT_SEC ((uint16_t)0x0001) /*!< Second interrupt */ +#define IS_RTC_IT(IT) ((((IT) & (uint16_t)0xFFF8) == 0x00) && ((IT) != 0x00)) +#define IS_RTC_GET_IT(IT) (((IT) == RTC_IT_OW) || ((IT) == RTC_IT_ALR) || \ + ((IT) == RTC_IT_SEC)) +/** + * @} + */ + +/** @defgroup RTC_interrupts_flags + * @{ + */ + +#define RTC_FLAG_RTOFF ((uint16_t)0x0020) /*!< RTC Operation OFF flag */ +#define RTC_FLAG_RSF ((uint16_t)0x0008) /*!< Registers Synchronized flag */ +#define RTC_FLAG_OW ((uint16_t)0x0004) /*!< Overflow flag */ +#define RTC_FLAG_ALR ((uint16_t)0x0002) /*!< Alarm flag */ +#define RTC_FLAG_SEC ((uint16_t)0x0001) /*!< Second flag */ +#define IS_RTC_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFFF0) == 0x00) && ((FLAG) != 0x00)) +#define IS_RTC_GET_FLAG(FLAG) (((FLAG) == RTC_FLAG_RTOFF) || ((FLAG) == RTC_FLAG_RSF) || \ + ((FLAG) == RTC_FLAG_OW) || ((FLAG) == RTC_FLAG_ALR) || \ + ((FLAG) == RTC_FLAG_SEC)) +#define IS_RTC_PRESCALER(PRESCALER) ((PRESCALER) <= 0xFFFFF) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup RTC_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Exported_Functions + * @{ + */ + +void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState); +void RTC_EnterConfigMode(void); +void RTC_ExitConfigMode(void); +uint32_t RTC_GetCounter(void); +void RTC_SetCounter(uint32_t CounterValue); +void RTC_SetPrescaler(uint32_t PrescalerValue); +void RTC_SetAlarm(uint32_t AlarmValue); +uint32_t RTC_GetDivider(void); +void RTC_WaitForLastTask(void); +void RTC_WaitForSynchro(void); +FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG); +void RTC_ClearFlag(uint16_t RTC_FLAG); +ITStatus RTC_GetITStatus(uint16_t RTC_IT); +void RTC_ClearITPendingBit(uint16_t RTC_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_RTC_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h index 81c058ad..40cfdedc 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_sdio.h @@ -1,531 +1,531 @@ -/** - ****************************************************************************** - * @file stm32f10x_sdio.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the SDIO firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_SDIO_H -#define __STM32F10x_SDIO_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup SDIO - * @{ - */ - -/** @defgroup SDIO_Exported_Types - * @{ - */ - -typedef struct -{ - uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref SDIO_Clock_Edge */ - - uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is - enabled or disabled. - This parameter can be a value of @ref SDIO_Clock_Bypass */ - - uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or - disabled when the bus is idle. - This parameter can be a value of @ref SDIO_Clock_Power_Save */ - - uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. - This parameter can be a value of @ref SDIO_Bus_Wide */ - - uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. - This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ - - uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. - This parameter can be a value between 0x00 and 0xFF. */ - -} SDIO_InitTypeDef; - -typedef struct -{ - uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent - to a card as part of a command message. If a command - contains an argument, it must be loaded into this register - before writing the command to the command register */ - - uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ - - uint32_t SDIO_Response; /*!< Specifies the SDIO response type. - This parameter can be a value of @ref SDIO_Response_Type */ - - uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled. - This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ - - uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) - is enabled or disabled. - This parameter can be a value of @ref SDIO_CPSM_State */ -} SDIO_CmdInitTypeDef; - -typedef struct -{ - uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ - - uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ - - uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. - This parameter can be a value of @ref SDIO_Data_Block_Size */ - - uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer - is a read or write. - This parameter can be a value of @ref SDIO_Transfer_Direction */ - - uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. - This parameter can be a value of @ref SDIO_Transfer_Type */ - - uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) - is enabled or disabled. - This parameter can be a value of @ref SDIO_DPSM_State */ -} SDIO_DataInitTypeDef; - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Constants - * @{ - */ - -/** @defgroup SDIO_Clock_Edge - * @{ - */ - -#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) -#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) -#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ - ((EDGE) == SDIO_ClockEdge_Falling)) -/** - * @} - */ - -/** @defgroup SDIO_Clock_Bypass - * @{ - */ - -#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) -#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) -#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ - ((BYPASS) == SDIO_ClockBypass_Enable)) -/** - * @} - */ - -/** @defgroup SDIO_Clock_Power_Save - * @{ - */ - -#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) -#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) -#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ - ((SAVE) == SDIO_ClockPowerSave_Enable)) -/** - * @} - */ - -/** @defgroup SDIO_Bus_Wide - * @{ - */ - -#define SDIO_BusWide_1b ((uint32_t)0x00000000) -#define SDIO_BusWide_4b ((uint32_t)0x00000800) -#define SDIO_BusWide_8b ((uint32_t)0x00001000) -#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ - ((WIDE) == SDIO_BusWide_8b)) - -/** - * @} - */ - -/** @defgroup SDIO_Hardware_Flow_Control - * @{ - */ - -#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) -#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) -#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ - ((CONTROL) == SDIO_HardwareFlowControl_Enable)) -/** - * @} - */ - -/** @defgroup SDIO_Power_State - * @{ - */ - -#define SDIO_PowerState_OFF ((uint32_t)0x00000000) -#define SDIO_PowerState_ON ((uint32_t)0x00000003) -#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) -/** - * @} - */ - - -/** @defgroup SDIO_Interrupt_sources - * @{ - */ - -#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) -#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) -#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) -#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) -#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) -#define SDIO_IT_RXOVERR ((uint32_t)0x00000020) -#define SDIO_IT_CMDREND ((uint32_t)0x00000040) -#define SDIO_IT_CMDSENT ((uint32_t)0x00000080) -#define SDIO_IT_DATAEND ((uint32_t)0x00000100) -#define SDIO_IT_STBITERR ((uint32_t)0x00000200) -#define SDIO_IT_DBCKEND ((uint32_t)0x00000400) -#define SDIO_IT_CMDACT ((uint32_t)0x00000800) -#define SDIO_IT_TXACT ((uint32_t)0x00001000) -#define SDIO_IT_RXACT ((uint32_t)0x00002000) -#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) -#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) -#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) -#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) -#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) -#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) -#define SDIO_IT_TXDAVL ((uint32_t)0x00100000) -#define SDIO_IT_RXDAVL ((uint32_t)0x00200000) -#define SDIO_IT_SDIOIT ((uint32_t)0x00400000) -#define SDIO_IT_CEATAEND ((uint32_t)0x00800000) -#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) -/** - * @} - */ - -/** @defgroup SDIO_Command_Index - * @{ - */ - -#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) -/** - * @} - */ - -/** @defgroup SDIO_Response_Type - * @{ - */ - -#define SDIO_Response_No ((uint32_t)0x00000000) -#define SDIO_Response_Short ((uint32_t)0x00000040) -#define SDIO_Response_Long ((uint32_t)0x000000C0) -#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ - ((RESPONSE) == SDIO_Response_Short) || \ - ((RESPONSE) == SDIO_Response_Long)) -/** - * @} - */ - -/** @defgroup SDIO_Wait_Interrupt_State - * @{ - */ - -#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ -#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ -#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ -#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ - ((WAIT) == SDIO_Wait_Pend)) -/** - * @} - */ - -/** @defgroup SDIO_CPSM_State - * @{ - */ - -#define SDIO_CPSM_Disable ((uint32_t)0x00000000) -#define SDIO_CPSM_Enable ((uint32_t)0x00000400) -#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) -/** - * @} - */ - -/** @defgroup SDIO_Response_Registers - * @{ - */ - -#define SDIO_RESP1 ((uint32_t)0x00000000) -#define SDIO_RESP2 ((uint32_t)0x00000004) -#define SDIO_RESP3 ((uint32_t)0x00000008) -#define SDIO_RESP4 ((uint32_t)0x0000000C) -#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ - ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) -/** - * @} - */ - -/** @defgroup SDIO_Data_Length - * @{ - */ - -#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) -/** - * @} - */ - -/** @defgroup SDIO_Data_Block_Size - * @{ - */ - -#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) -#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) -#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) -#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) -#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) -#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) -#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) -#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) -#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) -#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) -#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) -#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) -#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) -#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) -#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) -#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ - ((SIZE) == SDIO_DataBlockSize_2b) || \ - ((SIZE) == SDIO_DataBlockSize_4b) || \ - ((SIZE) == SDIO_DataBlockSize_8b) || \ - ((SIZE) == SDIO_DataBlockSize_16b) || \ - ((SIZE) == SDIO_DataBlockSize_32b) || \ - ((SIZE) == SDIO_DataBlockSize_64b) || \ - ((SIZE) == SDIO_DataBlockSize_128b) || \ - ((SIZE) == SDIO_DataBlockSize_256b) || \ - ((SIZE) == SDIO_DataBlockSize_512b) || \ - ((SIZE) == SDIO_DataBlockSize_1024b) || \ - ((SIZE) == SDIO_DataBlockSize_2048b) || \ - ((SIZE) == SDIO_DataBlockSize_4096b) || \ - ((SIZE) == SDIO_DataBlockSize_8192b) || \ - ((SIZE) == SDIO_DataBlockSize_16384b)) -/** - * @} - */ - -/** @defgroup SDIO_Transfer_Direction - * @{ - */ - -#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) -#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) -#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ - ((DIR) == SDIO_TransferDir_ToSDIO)) -/** - * @} - */ - -/** @defgroup SDIO_Transfer_Type - * @{ - */ - -#define SDIO_TransferMode_Block ((uint32_t)0x00000000) -#define SDIO_TransferMode_Stream ((uint32_t)0x00000004) -#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ - ((MODE) == SDIO_TransferMode_Block)) -/** - * @} - */ - -/** @defgroup SDIO_DPSM_State - * @{ - */ - -#define SDIO_DPSM_Disable ((uint32_t)0x00000000) -#define SDIO_DPSM_Enable ((uint32_t)0x00000001) -#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) -/** - * @} - */ - -/** @defgroup SDIO_Flags - * @{ - */ - -#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) -#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) -#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) -#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) -#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) -#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) -#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) -#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) -#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) -#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) -#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) -#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) -#define SDIO_FLAG_TXACT ((uint32_t)0x00001000) -#define SDIO_FLAG_RXACT ((uint32_t)0x00002000) -#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) -#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) -#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) -#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) -#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) -#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) -#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) -#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) -#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) -#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) -#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ - ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ - ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ - ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ - ((FLAG) == SDIO_FLAG_TXUNDERR) || \ - ((FLAG) == SDIO_FLAG_RXOVERR) || \ - ((FLAG) == SDIO_FLAG_CMDREND) || \ - ((FLAG) == SDIO_FLAG_CMDSENT) || \ - ((FLAG) == SDIO_FLAG_DATAEND) || \ - ((FLAG) == SDIO_FLAG_STBITERR) || \ - ((FLAG) == SDIO_FLAG_DBCKEND) || \ - ((FLAG) == SDIO_FLAG_CMDACT) || \ - ((FLAG) == SDIO_FLAG_TXACT) || \ - ((FLAG) == SDIO_FLAG_RXACT) || \ - ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ - ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ - ((FLAG) == SDIO_FLAG_TXFIFOF) || \ - ((FLAG) == SDIO_FLAG_RXFIFOF) || \ - ((FLAG) == SDIO_FLAG_TXFIFOE) || \ - ((FLAG) == SDIO_FLAG_RXFIFOE) || \ - ((FLAG) == SDIO_FLAG_TXDAVL) || \ - ((FLAG) == SDIO_FLAG_RXDAVL) || \ - ((FLAG) == SDIO_FLAG_SDIOIT) || \ - ((FLAG) == SDIO_FLAG_CEATAEND)) - -#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) - -#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ - ((IT) == SDIO_IT_DCRCFAIL) || \ - ((IT) == SDIO_IT_CTIMEOUT) || \ - ((IT) == SDIO_IT_DTIMEOUT) || \ - ((IT) == SDIO_IT_TXUNDERR) || \ - ((IT) == SDIO_IT_RXOVERR) || \ - ((IT) == SDIO_IT_CMDREND) || \ - ((IT) == SDIO_IT_CMDSENT) || \ - ((IT) == SDIO_IT_DATAEND) || \ - ((IT) == SDIO_IT_STBITERR) || \ - ((IT) == SDIO_IT_DBCKEND) || \ - ((IT) == SDIO_IT_CMDACT) || \ - ((IT) == SDIO_IT_TXACT) || \ - ((IT) == SDIO_IT_RXACT) || \ - ((IT) == SDIO_IT_TXFIFOHE) || \ - ((IT) == SDIO_IT_RXFIFOHF) || \ - ((IT) == SDIO_IT_TXFIFOF) || \ - ((IT) == SDIO_IT_RXFIFOF) || \ - ((IT) == SDIO_IT_TXFIFOE) || \ - ((IT) == SDIO_IT_RXFIFOE) || \ - ((IT) == SDIO_IT_TXDAVL) || \ - ((IT) == SDIO_IT_RXDAVL) || \ - ((IT) == SDIO_IT_SDIOIT) || \ - ((IT) == SDIO_IT_CEATAEND)) - -#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) - -/** - * @} - */ - -/** @defgroup SDIO_Read_Wait_Mode - * @{ - */ - -#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) -#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) -#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ - ((MODE) == SDIO_ReadWaitMode_DATA2)) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Exported_Functions - * @{ - */ - -void SDIO_DeInit(void); -void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); -void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); -void SDIO_ClockCmd(FunctionalState NewState); -void SDIO_SetPowerState(uint32_t SDIO_PowerState); -uint32_t SDIO_GetPowerState(void); -void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); -void SDIO_DMACmd(FunctionalState NewState); -void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); -void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); -uint8_t SDIO_GetCommandResponse(void); -uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); -void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); -void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); -uint32_t SDIO_GetDataCounter(void); -uint32_t SDIO_ReadData(void); -void SDIO_WriteData(uint32_t Data); -uint32_t SDIO_GetFIFOCount(void); -void SDIO_StartSDIOReadWait(FunctionalState NewState); -void SDIO_StopSDIOReadWait(FunctionalState NewState); -void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); -void SDIO_SetSDIOOperation(FunctionalState NewState); -void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); -void SDIO_CommandCompletionCmd(FunctionalState NewState); -void SDIO_CEATAITCmd(FunctionalState NewState); -void SDIO_SendCEATACmd(FunctionalState NewState); -FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); -void SDIO_ClearFlag(uint32_t SDIO_FLAG); -ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); -void SDIO_ClearITPendingBit(uint32_t SDIO_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_SDIO_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_sdio.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the SDIO firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_SDIO_H +#define __STM32F10x_SDIO_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup SDIO + * @{ + */ + +/** @defgroup SDIO_Exported_Types + * @{ + */ + +typedef struct +{ + uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref SDIO_Clock_Edge */ + + uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is + enabled or disabled. + This parameter can be a value of @ref SDIO_Clock_Bypass */ + + uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or + disabled when the bus is idle. + This parameter can be a value of @ref SDIO_Clock_Power_Save */ + + uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width. + This parameter can be a value of @ref SDIO_Bus_Wide */ + + uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled. + This parameter can be a value of @ref SDIO_Hardware_Flow_Control */ + + uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller. + This parameter can be a value between 0x00 and 0xFF. */ + +} SDIO_InitTypeDef; + +typedef struct +{ + uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent + to a card as part of a command message. If a command + contains an argument, it must be loaded into this register + before writing the command to the command register */ + + uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */ + + uint32_t SDIO_Response; /*!< Specifies the SDIO response type. + This parameter can be a value of @ref SDIO_Response_Type */ + + uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled. + This parameter can be a value of @ref SDIO_Wait_Interrupt_State */ + + uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM) + is enabled or disabled. + This parameter can be a value of @ref SDIO_CPSM_State */ +} SDIO_CmdInitTypeDef; + +typedef struct +{ + uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */ + + uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */ + + uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer. + This parameter can be a value of @ref SDIO_Data_Block_Size */ + + uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer + is a read or write. + This parameter can be a value of @ref SDIO_Transfer_Direction */ + + uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode. + This parameter can be a value of @ref SDIO_Transfer_Type */ + + uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM) + is enabled or disabled. + This parameter can be a value of @ref SDIO_DPSM_State */ +} SDIO_DataInitTypeDef; + +/** + * @} + */ + +/** @defgroup SDIO_Exported_Constants + * @{ + */ + +/** @defgroup SDIO_Clock_Edge + * @{ + */ + +#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) +#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) +#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \ + ((EDGE) == SDIO_ClockEdge_Falling)) +/** + * @} + */ + +/** @defgroup SDIO_Clock_Bypass + * @{ + */ + +#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) +#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) +#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \ + ((BYPASS) == SDIO_ClockBypass_Enable)) +/** + * @} + */ + +/** @defgroup SDIO_Clock_Power_Save + * @{ + */ + +#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) +#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) +#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \ + ((SAVE) == SDIO_ClockPowerSave_Enable)) +/** + * @} + */ + +/** @defgroup SDIO_Bus_Wide + * @{ + */ + +#define SDIO_BusWide_1b ((uint32_t)0x00000000) +#define SDIO_BusWide_4b ((uint32_t)0x00000800) +#define SDIO_BusWide_8b ((uint32_t)0x00001000) +#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \ + ((WIDE) == SDIO_BusWide_8b)) + +/** + * @} + */ + +/** @defgroup SDIO_Hardware_Flow_Control + * @{ + */ + +#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) +#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) +#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \ + ((CONTROL) == SDIO_HardwareFlowControl_Enable)) +/** + * @} + */ + +/** @defgroup SDIO_Power_State + * @{ + */ + +#define SDIO_PowerState_OFF ((uint32_t)0x00000000) +#define SDIO_PowerState_ON ((uint32_t)0x00000003) +#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON)) +/** + * @} + */ + + +/** @defgroup SDIO_Interrupt_sources + * @{ + */ + +#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) +#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) +#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) +#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) +#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) +#define SDIO_IT_RXOVERR ((uint32_t)0x00000020) +#define SDIO_IT_CMDREND ((uint32_t)0x00000040) +#define SDIO_IT_CMDSENT ((uint32_t)0x00000080) +#define SDIO_IT_DATAEND ((uint32_t)0x00000100) +#define SDIO_IT_STBITERR ((uint32_t)0x00000200) +#define SDIO_IT_DBCKEND ((uint32_t)0x00000400) +#define SDIO_IT_CMDACT ((uint32_t)0x00000800) +#define SDIO_IT_TXACT ((uint32_t)0x00001000) +#define SDIO_IT_RXACT ((uint32_t)0x00002000) +#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) +#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) +#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) +#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) +#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) +#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) +#define SDIO_IT_TXDAVL ((uint32_t)0x00100000) +#define SDIO_IT_RXDAVL ((uint32_t)0x00200000) +#define SDIO_IT_SDIOIT ((uint32_t)0x00400000) +#define SDIO_IT_CEATAEND ((uint32_t)0x00800000) +#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) +/** + * @} + */ + +/** @defgroup SDIO_Command_Index + * @{ + */ + +#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) +/** + * @} + */ + +/** @defgroup SDIO_Response_Type + * @{ + */ + +#define SDIO_Response_No ((uint32_t)0x00000000) +#define SDIO_Response_Short ((uint32_t)0x00000040) +#define SDIO_Response_Long ((uint32_t)0x000000C0) +#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \ + ((RESPONSE) == SDIO_Response_Short) || \ + ((RESPONSE) == SDIO_Response_Long)) +/** + * @} + */ + +/** @defgroup SDIO_Wait_Interrupt_State + * @{ + */ + +#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ +#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ +#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ +#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \ + ((WAIT) == SDIO_Wait_Pend)) +/** + * @} + */ + +/** @defgroup SDIO_CPSM_State + * @{ + */ + +#define SDIO_CPSM_Disable ((uint32_t)0x00000000) +#define SDIO_CPSM_Enable ((uint32_t)0x00000400) +#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable)) +/** + * @} + */ + +/** @defgroup SDIO_Response_Registers + * @{ + */ + +#define SDIO_RESP1 ((uint32_t)0x00000000) +#define SDIO_RESP2 ((uint32_t)0x00000004) +#define SDIO_RESP3 ((uint32_t)0x00000008) +#define SDIO_RESP4 ((uint32_t)0x0000000C) +#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \ + ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) +/** + * @} + */ + +/** @defgroup SDIO_Data_Length + * @{ + */ + +#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) +/** + * @} + */ + +/** @defgroup SDIO_Data_Block_Size + * @{ + */ + +#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) +#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) +#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) +#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) +#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) +#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) +#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) +#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) +#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) +#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) +#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) +#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) +#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) +#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) +#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) +#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \ + ((SIZE) == SDIO_DataBlockSize_2b) || \ + ((SIZE) == SDIO_DataBlockSize_4b) || \ + ((SIZE) == SDIO_DataBlockSize_8b) || \ + ((SIZE) == SDIO_DataBlockSize_16b) || \ + ((SIZE) == SDIO_DataBlockSize_32b) || \ + ((SIZE) == SDIO_DataBlockSize_64b) || \ + ((SIZE) == SDIO_DataBlockSize_128b) || \ + ((SIZE) == SDIO_DataBlockSize_256b) || \ + ((SIZE) == SDIO_DataBlockSize_512b) || \ + ((SIZE) == SDIO_DataBlockSize_1024b) || \ + ((SIZE) == SDIO_DataBlockSize_2048b) || \ + ((SIZE) == SDIO_DataBlockSize_4096b) || \ + ((SIZE) == SDIO_DataBlockSize_8192b) || \ + ((SIZE) == SDIO_DataBlockSize_16384b)) +/** + * @} + */ + +/** @defgroup SDIO_Transfer_Direction + * @{ + */ + +#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) +#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) +#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \ + ((DIR) == SDIO_TransferDir_ToSDIO)) +/** + * @} + */ + +/** @defgroup SDIO_Transfer_Type + * @{ + */ + +#define SDIO_TransferMode_Block ((uint32_t)0x00000000) +#define SDIO_TransferMode_Stream ((uint32_t)0x00000004) +#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \ + ((MODE) == SDIO_TransferMode_Block)) +/** + * @} + */ + +/** @defgroup SDIO_DPSM_State + * @{ + */ + +#define SDIO_DPSM_Disable ((uint32_t)0x00000000) +#define SDIO_DPSM_Enable ((uint32_t)0x00000001) +#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable)) +/** + * @} + */ + +/** @defgroup SDIO_Flags + * @{ + */ + +#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) +#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) +#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) +#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) +#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) +#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) +#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) +#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) +#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) +#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) +#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) +#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) +#define SDIO_FLAG_TXACT ((uint32_t)0x00001000) +#define SDIO_FLAG_RXACT ((uint32_t)0x00002000) +#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) +#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) +#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) +#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) +#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) +#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) +#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) +#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) +#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) +#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) +#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \ + ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ + ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ + ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ + ((FLAG) == SDIO_FLAG_TXUNDERR) || \ + ((FLAG) == SDIO_FLAG_RXOVERR) || \ + ((FLAG) == SDIO_FLAG_CMDREND) || \ + ((FLAG) == SDIO_FLAG_CMDSENT) || \ + ((FLAG) == SDIO_FLAG_DATAEND) || \ + ((FLAG) == SDIO_FLAG_STBITERR) || \ + ((FLAG) == SDIO_FLAG_DBCKEND) || \ + ((FLAG) == SDIO_FLAG_CMDACT) || \ + ((FLAG) == SDIO_FLAG_TXACT) || \ + ((FLAG) == SDIO_FLAG_RXACT) || \ + ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ + ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ + ((FLAG) == SDIO_FLAG_TXFIFOF) || \ + ((FLAG) == SDIO_FLAG_RXFIFOF) || \ + ((FLAG) == SDIO_FLAG_TXFIFOE) || \ + ((FLAG) == SDIO_FLAG_RXFIFOE) || \ + ((FLAG) == SDIO_FLAG_TXDAVL) || \ + ((FLAG) == SDIO_FLAG_RXDAVL) || \ + ((FLAG) == SDIO_FLAG_SDIOIT) || \ + ((FLAG) == SDIO_FLAG_CEATAEND)) + +#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) + +#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \ + ((IT) == SDIO_IT_DCRCFAIL) || \ + ((IT) == SDIO_IT_CTIMEOUT) || \ + ((IT) == SDIO_IT_DTIMEOUT) || \ + ((IT) == SDIO_IT_TXUNDERR) || \ + ((IT) == SDIO_IT_RXOVERR) || \ + ((IT) == SDIO_IT_CMDREND) || \ + ((IT) == SDIO_IT_CMDSENT) || \ + ((IT) == SDIO_IT_DATAEND) || \ + ((IT) == SDIO_IT_STBITERR) || \ + ((IT) == SDIO_IT_DBCKEND) || \ + ((IT) == SDIO_IT_CMDACT) || \ + ((IT) == SDIO_IT_TXACT) || \ + ((IT) == SDIO_IT_RXACT) || \ + ((IT) == SDIO_IT_TXFIFOHE) || \ + ((IT) == SDIO_IT_RXFIFOHF) || \ + ((IT) == SDIO_IT_TXFIFOF) || \ + ((IT) == SDIO_IT_RXFIFOF) || \ + ((IT) == SDIO_IT_TXFIFOE) || \ + ((IT) == SDIO_IT_RXFIFOE) || \ + ((IT) == SDIO_IT_TXDAVL) || \ + ((IT) == SDIO_IT_RXDAVL) || \ + ((IT) == SDIO_IT_SDIOIT) || \ + ((IT) == SDIO_IT_CEATAEND)) + +#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) + +/** + * @} + */ + +/** @defgroup SDIO_Read_Wait_Mode + * @{ + */ + +#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) +#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) +#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \ + ((MODE) == SDIO_ReadWaitMode_DATA2)) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup SDIO_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Exported_Functions + * @{ + */ + +void SDIO_DeInit(void); +void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct); +void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct); +void SDIO_ClockCmd(FunctionalState NewState); +void SDIO_SetPowerState(uint32_t SDIO_PowerState); +uint32_t SDIO_GetPowerState(void); +void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState); +void SDIO_DMACmd(FunctionalState NewState); +void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct); +void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct); +uint8_t SDIO_GetCommandResponse(void); +uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); +void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct); +void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct); +uint32_t SDIO_GetDataCounter(void); +uint32_t SDIO_ReadData(void); +void SDIO_WriteData(uint32_t Data); +uint32_t SDIO_GetFIFOCount(void); +void SDIO_StartSDIOReadWait(FunctionalState NewState); +void SDIO_StopSDIOReadWait(FunctionalState NewState); +void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode); +void SDIO_SetSDIOOperation(FunctionalState NewState); +void SDIO_SendSDIOSuspendCmd(FunctionalState NewState); +void SDIO_CommandCompletionCmd(FunctionalState NewState); +void SDIO_CEATAITCmd(FunctionalState NewState); +void SDIO_SendCEATACmd(FunctionalState NewState); +FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); +void SDIO_ClearFlag(uint32_t SDIO_FLAG); +ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); +void SDIO_ClearITPendingBit(uint32_t SDIO_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_SDIO_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h index 23cc26d2..6056c4c6 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_spi.h @@ -1,487 +1,487 @@ -/** - ****************************************************************************** - * @file stm32f10x_spi.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the SPI firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_SPI_H -#define __STM32F10x_SPI_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup SPI - * @{ - */ - -/** @defgroup SPI_Exported_Types - * @{ - */ - -/** - * @brief SPI Init structure definition - */ - -typedef struct -{ - uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode. - This parameter can be a value of @ref SPI_data_direction */ - - uint16_t SPI_Mode; /*!< Specifies the SPI operating mode. - This parameter can be a value of @ref SPI_mode */ - - uint16_t SPI_DataSize; /*!< Specifies the SPI data size. - This parameter can be a value of @ref SPI_data_size */ - - uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state. - This parameter can be a value of @ref SPI_Clock_Polarity */ - - uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture. - This parameter can be a value of @ref SPI_Clock_Phase */ - - uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by - hardware (NSS pin) or by software using the SSI bit. - This parameter can be a value of @ref SPI_Slave_Select_management */ - - uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be - used to configure the transmit and receive SCK clock. - This parameter can be a value of @ref SPI_BaudRate_Prescaler. - @note The communication clock is derived from the master - clock. The slave clock does not need to be set. */ - - uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. - This parameter can be a value of @ref SPI_MSB_LSB_transmission */ - - uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */ -}SPI_InitTypeDef; - -/** - * @brief I2S Init structure definition - */ - -typedef struct -{ - - uint16_t I2S_Mode; /*!< Specifies the I2S operating mode. - This parameter can be a value of @ref I2S_Mode */ - - uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication. - This parameter can be a value of @ref I2S_Standard */ - - uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication. - This parameter can be a value of @ref I2S_Data_Format */ - - uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. - This parameter can be a value of @ref I2S_MCLK_Output */ - - uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication. - This parameter can be a value of @ref I2S_Audio_Frequency */ - - uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock. - This parameter can be a value of @ref I2S_Clock_Polarity */ -}I2S_InitTypeDef; - -/** - * @} - */ - -/** @defgroup SPI_Exported_Constants - * @{ - */ - -#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \ - ((PERIPH) == SPI2) || \ - ((PERIPH) == SPI3)) - -#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \ - ((PERIPH) == SPI3)) - -/** @defgroup SPI_data_direction - * @{ - */ - -#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) -#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) -#define SPI_Direction_1Line_Rx ((uint16_t)0x8000) -#define SPI_Direction_1Line_Tx ((uint16_t)0xC000) -#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \ - ((MODE) == SPI_Direction_2Lines_RxOnly) || \ - ((MODE) == SPI_Direction_1Line_Rx) || \ - ((MODE) == SPI_Direction_1Line_Tx)) -/** - * @} - */ - -/** @defgroup SPI_mode - * @{ - */ - -#define SPI_Mode_Master ((uint16_t)0x0104) -#define SPI_Mode_Slave ((uint16_t)0x0000) -#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \ - ((MODE) == SPI_Mode_Slave)) -/** - * @} - */ - -/** @defgroup SPI_data_size - * @{ - */ - -#define SPI_DataSize_16b ((uint16_t)0x0800) -#define SPI_DataSize_8b ((uint16_t)0x0000) -#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \ - ((DATASIZE) == SPI_DataSize_8b)) -/** - * @} - */ - -/** @defgroup SPI_Clock_Polarity - * @{ - */ - -#define SPI_CPOL_Low ((uint16_t)0x0000) -#define SPI_CPOL_High ((uint16_t)0x0002) -#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \ - ((CPOL) == SPI_CPOL_High)) -/** - * @} - */ - -/** @defgroup SPI_Clock_Phase - * @{ - */ - -#define SPI_CPHA_1Edge ((uint16_t)0x0000) -#define SPI_CPHA_2Edge ((uint16_t)0x0001) -#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \ - ((CPHA) == SPI_CPHA_2Edge)) -/** - * @} - */ - -/** @defgroup SPI_Slave_Select_management - * @{ - */ - -#define SPI_NSS_Soft ((uint16_t)0x0200) -#define SPI_NSS_Hard ((uint16_t)0x0000) -#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \ - ((NSS) == SPI_NSS_Hard)) -/** - * @} - */ - -/** @defgroup SPI_BaudRate_Prescaler - * @{ - */ - -#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) -#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) -#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) -#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) -#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) -#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) -#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) -#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) -#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_4) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_8) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_16) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_32) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_64) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_128) || \ - ((PRESCALER) == SPI_BaudRatePrescaler_256)) -/** - * @} - */ - -/** @defgroup SPI_MSB_LSB_transmission - * @{ - */ - -#define SPI_FirstBit_MSB ((uint16_t)0x0000) -#define SPI_FirstBit_LSB ((uint16_t)0x0080) -#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \ - ((BIT) == SPI_FirstBit_LSB)) -/** - * @} - */ - -/** @defgroup I2S_Mode - * @{ - */ - -#define I2S_Mode_SlaveTx ((uint16_t)0x0000) -#define I2S_Mode_SlaveRx ((uint16_t)0x0100) -#define I2S_Mode_MasterTx ((uint16_t)0x0200) -#define I2S_Mode_MasterRx ((uint16_t)0x0300) -#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \ - ((MODE) == I2S_Mode_SlaveRx) || \ - ((MODE) == I2S_Mode_MasterTx) || \ - ((MODE) == I2S_Mode_MasterRx) ) -/** - * @} - */ - -/** @defgroup I2S_Standard - * @{ - */ - -#define I2S_Standard_Phillips ((uint16_t)0x0000) -#define I2S_Standard_MSB ((uint16_t)0x0010) -#define I2S_Standard_LSB ((uint16_t)0x0020) -#define I2S_Standard_PCMShort ((uint16_t)0x0030) -#define I2S_Standard_PCMLong ((uint16_t)0x00B0) -#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \ - ((STANDARD) == I2S_Standard_MSB) || \ - ((STANDARD) == I2S_Standard_LSB) || \ - ((STANDARD) == I2S_Standard_PCMShort) || \ - ((STANDARD) == I2S_Standard_PCMLong)) -/** - * @} - */ - -/** @defgroup I2S_Data_Format - * @{ - */ - -#define I2S_DataFormat_16b ((uint16_t)0x0000) -#define I2S_DataFormat_16bextended ((uint16_t)0x0001) -#define I2S_DataFormat_24b ((uint16_t)0x0003) -#define I2S_DataFormat_32b ((uint16_t)0x0005) -#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \ - ((FORMAT) == I2S_DataFormat_16bextended) || \ - ((FORMAT) == I2S_DataFormat_24b) || \ - ((FORMAT) == I2S_DataFormat_32b)) -/** - * @} - */ - -/** @defgroup I2S_MCLK_Output - * @{ - */ - -#define I2S_MCLKOutput_Enable ((uint16_t)0x0200) -#define I2S_MCLKOutput_Disable ((uint16_t)0x0000) -#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \ - ((OUTPUT) == I2S_MCLKOutput_Disable)) -/** - * @} - */ - -/** @defgroup I2S_Audio_Frequency - * @{ - */ - -#define I2S_AudioFreq_192k ((uint32_t)192000) -#define I2S_AudioFreq_96k ((uint32_t)96000) -#define I2S_AudioFreq_48k ((uint32_t)48000) -#define I2S_AudioFreq_44k ((uint32_t)44100) -#define I2S_AudioFreq_32k ((uint32_t)32000) -#define I2S_AudioFreq_22k ((uint32_t)22050) -#define I2S_AudioFreq_16k ((uint32_t)16000) -#define I2S_AudioFreq_11k ((uint32_t)11025) -#define I2S_AudioFreq_8k ((uint32_t)8000) -#define I2S_AudioFreq_Default ((uint32_t)2) - -#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \ - ((FREQ) <= I2S_AudioFreq_192k)) || \ - ((FREQ) == I2S_AudioFreq_Default)) -/** - * @} - */ - -/** @defgroup I2S_Clock_Polarity - * @{ - */ - -#define I2S_CPOL_Low ((uint16_t)0x0000) -#define I2S_CPOL_High ((uint16_t)0x0008) -#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \ - ((CPOL) == I2S_CPOL_High)) -/** - * @} - */ - -/** @defgroup SPI_I2S_DMA_transfer_requests - * @{ - */ - -#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) -#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) -#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) -/** - * @} - */ - -/** @defgroup SPI_NSS_internal_software_management - * @{ - */ - -#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) -#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) -#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \ - ((INTERNAL) == SPI_NSSInternalSoft_Reset)) -/** - * @} - */ - -/** @defgroup SPI_CRC_Transmit_Receive - * @{ - */ - -#define SPI_CRC_Tx ((uint8_t)0x00) -#define SPI_CRC_Rx ((uint8_t)0x01) -#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx)) -/** - * @} - */ - -/** @defgroup SPI_direction_transmit_receive - * @{ - */ - -#define SPI_Direction_Rx ((uint16_t)0xBFFF) -#define SPI_Direction_Tx ((uint16_t)0x4000) -#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \ - ((DIRECTION) == SPI_Direction_Tx)) -/** - * @} - */ - -/** @defgroup SPI_I2S_interrupts_definition - * @{ - */ - -#define SPI_I2S_IT_TXE ((uint8_t)0x71) -#define SPI_I2S_IT_RXNE ((uint8_t)0x60) -#define SPI_I2S_IT_ERR ((uint8_t)0x50) -#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \ - ((IT) == SPI_I2S_IT_RXNE) || \ - ((IT) == SPI_I2S_IT_ERR)) -#define SPI_I2S_IT_OVR ((uint8_t)0x56) -#define SPI_IT_MODF ((uint8_t)0x55) -#define SPI_IT_CRCERR ((uint8_t)0x54) -#define I2S_IT_UDR ((uint8_t)0x53) -#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR)) -#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \ - ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \ - ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR)) -/** - * @} - */ - -/** @defgroup SPI_I2S_flags_definition - * @{ - */ - -#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) -#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) -#define I2S_FLAG_CHSIDE ((uint16_t)0x0004) -#define I2S_FLAG_UDR ((uint16_t)0x0008) -#define SPI_FLAG_CRCERR ((uint16_t)0x0010) -#define SPI_FLAG_MODF ((uint16_t)0x0020) -#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) -#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) -#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR)) -#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \ - ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ - ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ - ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)) -/** - * @} - */ - -/** @defgroup SPI_CRC_polynomial - * @{ - */ - -#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup SPI_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Exported_Functions - * @{ - */ - -void SPI_I2S_DeInit(SPI_TypeDef* SPIx); -void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); -void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct); -void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); -void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct); -void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); -void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); -void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState); -void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState); -void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data); -uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); -void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft); -void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); -void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize); -void SPI_TransmitCRC(SPI_TypeDef* SPIx); -void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); -uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); -uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); -void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction); -FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); -void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); -ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); -void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_SPI_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_spi.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the SPI firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_SPI_H +#define __STM32F10x_SPI_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup SPI + * @{ + */ + +/** @defgroup SPI_Exported_Types + * @{ + */ + +/** + * @brief SPI Init structure definition + */ + +typedef struct +{ + uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode. + This parameter can be a value of @ref SPI_data_direction */ + + uint16_t SPI_Mode; /*!< Specifies the SPI operating mode. + This parameter can be a value of @ref SPI_mode */ + + uint16_t SPI_DataSize; /*!< Specifies the SPI data size. + This parameter can be a value of @ref SPI_data_size */ + + uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state. + This parameter can be a value of @ref SPI_Clock_Polarity */ + + uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture. + This parameter can be a value of @ref SPI_Clock_Phase */ + + uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by + hardware (NSS pin) or by software using the SSI bit. + This parameter can be a value of @ref SPI_Slave_Select_management */ + + uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be + used to configure the transmit and receive SCK clock. + This parameter can be a value of @ref SPI_BaudRate_Prescaler. + @note The communication clock is derived from the master + clock. The slave clock does not need to be set. */ + + uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. + This parameter can be a value of @ref SPI_MSB_LSB_transmission */ + + uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */ +}SPI_InitTypeDef; + +/** + * @brief I2S Init structure definition + */ + +typedef struct +{ + + uint16_t I2S_Mode; /*!< Specifies the I2S operating mode. + This parameter can be a value of @ref I2S_Mode */ + + uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication. + This parameter can be a value of @ref I2S_Standard */ + + uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication. + This parameter can be a value of @ref I2S_Data_Format */ + + uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. + This parameter can be a value of @ref I2S_MCLK_Output */ + + uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication. + This parameter can be a value of @ref I2S_Audio_Frequency */ + + uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock. + This parameter can be a value of @ref I2S_Clock_Polarity */ +}I2S_InitTypeDef; + +/** + * @} + */ + +/** @defgroup SPI_Exported_Constants + * @{ + */ + +#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \ + ((PERIPH) == SPI2) || \ + ((PERIPH) == SPI3)) + +#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \ + ((PERIPH) == SPI3)) + +/** @defgroup SPI_data_direction + * @{ + */ + +#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) +#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) +#define SPI_Direction_1Line_Rx ((uint16_t)0x8000) +#define SPI_Direction_1Line_Tx ((uint16_t)0xC000) +#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \ + ((MODE) == SPI_Direction_2Lines_RxOnly) || \ + ((MODE) == SPI_Direction_1Line_Rx) || \ + ((MODE) == SPI_Direction_1Line_Tx)) +/** + * @} + */ + +/** @defgroup SPI_mode + * @{ + */ + +#define SPI_Mode_Master ((uint16_t)0x0104) +#define SPI_Mode_Slave ((uint16_t)0x0000) +#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \ + ((MODE) == SPI_Mode_Slave)) +/** + * @} + */ + +/** @defgroup SPI_data_size + * @{ + */ + +#define SPI_DataSize_16b ((uint16_t)0x0800) +#define SPI_DataSize_8b ((uint16_t)0x0000) +#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \ + ((DATASIZE) == SPI_DataSize_8b)) +/** + * @} + */ + +/** @defgroup SPI_Clock_Polarity + * @{ + */ + +#define SPI_CPOL_Low ((uint16_t)0x0000) +#define SPI_CPOL_High ((uint16_t)0x0002) +#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \ + ((CPOL) == SPI_CPOL_High)) +/** + * @} + */ + +/** @defgroup SPI_Clock_Phase + * @{ + */ + +#define SPI_CPHA_1Edge ((uint16_t)0x0000) +#define SPI_CPHA_2Edge ((uint16_t)0x0001) +#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \ + ((CPHA) == SPI_CPHA_2Edge)) +/** + * @} + */ + +/** @defgroup SPI_Slave_Select_management + * @{ + */ + +#define SPI_NSS_Soft ((uint16_t)0x0200) +#define SPI_NSS_Hard ((uint16_t)0x0000) +#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \ + ((NSS) == SPI_NSS_Hard)) +/** + * @} + */ + +/** @defgroup SPI_BaudRate_Prescaler + * @{ + */ + +#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) +#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) +#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) +#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) +#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) +#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) +#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) +#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) +#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_4) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_8) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_16) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_32) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_64) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_128) || \ + ((PRESCALER) == SPI_BaudRatePrescaler_256)) +/** + * @} + */ + +/** @defgroup SPI_MSB_LSB_transmission + * @{ + */ + +#define SPI_FirstBit_MSB ((uint16_t)0x0000) +#define SPI_FirstBit_LSB ((uint16_t)0x0080) +#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \ + ((BIT) == SPI_FirstBit_LSB)) +/** + * @} + */ + +/** @defgroup I2S_Mode + * @{ + */ + +#define I2S_Mode_SlaveTx ((uint16_t)0x0000) +#define I2S_Mode_SlaveRx ((uint16_t)0x0100) +#define I2S_Mode_MasterTx ((uint16_t)0x0200) +#define I2S_Mode_MasterRx ((uint16_t)0x0300) +#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \ + ((MODE) == I2S_Mode_SlaveRx) || \ + ((MODE) == I2S_Mode_MasterTx) || \ + ((MODE) == I2S_Mode_MasterRx) ) +/** + * @} + */ + +/** @defgroup I2S_Standard + * @{ + */ + +#define I2S_Standard_Phillips ((uint16_t)0x0000) +#define I2S_Standard_MSB ((uint16_t)0x0010) +#define I2S_Standard_LSB ((uint16_t)0x0020) +#define I2S_Standard_PCMShort ((uint16_t)0x0030) +#define I2S_Standard_PCMLong ((uint16_t)0x00B0) +#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \ + ((STANDARD) == I2S_Standard_MSB) || \ + ((STANDARD) == I2S_Standard_LSB) || \ + ((STANDARD) == I2S_Standard_PCMShort) || \ + ((STANDARD) == I2S_Standard_PCMLong)) +/** + * @} + */ + +/** @defgroup I2S_Data_Format + * @{ + */ + +#define I2S_DataFormat_16b ((uint16_t)0x0000) +#define I2S_DataFormat_16bextended ((uint16_t)0x0001) +#define I2S_DataFormat_24b ((uint16_t)0x0003) +#define I2S_DataFormat_32b ((uint16_t)0x0005) +#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \ + ((FORMAT) == I2S_DataFormat_16bextended) || \ + ((FORMAT) == I2S_DataFormat_24b) || \ + ((FORMAT) == I2S_DataFormat_32b)) +/** + * @} + */ + +/** @defgroup I2S_MCLK_Output + * @{ + */ + +#define I2S_MCLKOutput_Enable ((uint16_t)0x0200) +#define I2S_MCLKOutput_Disable ((uint16_t)0x0000) +#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \ + ((OUTPUT) == I2S_MCLKOutput_Disable)) +/** + * @} + */ + +/** @defgroup I2S_Audio_Frequency + * @{ + */ + +#define I2S_AudioFreq_192k ((uint32_t)192000) +#define I2S_AudioFreq_96k ((uint32_t)96000) +#define I2S_AudioFreq_48k ((uint32_t)48000) +#define I2S_AudioFreq_44k ((uint32_t)44100) +#define I2S_AudioFreq_32k ((uint32_t)32000) +#define I2S_AudioFreq_22k ((uint32_t)22050) +#define I2S_AudioFreq_16k ((uint32_t)16000) +#define I2S_AudioFreq_11k ((uint32_t)11025) +#define I2S_AudioFreq_8k ((uint32_t)8000) +#define I2S_AudioFreq_Default ((uint32_t)2) + +#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \ + ((FREQ) <= I2S_AudioFreq_192k)) || \ + ((FREQ) == I2S_AudioFreq_Default)) +/** + * @} + */ + +/** @defgroup I2S_Clock_Polarity + * @{ + */ + +#define I2S_CPOL_Low ((uint16_t)0x0000) +#define I2S_CPOL_High ((uint16_t)0x0008) +#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \ + ((CPOL) == I2S_CPOL_High)) +/** + * @} + */ + +/** @defgroup SPI_I2S_DMA_transfer_requests + * @{ + */ + +#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) +#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) +#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) +/** + * @} + */ + +/** @defgroup SPI_NSS_internal_software_management + * @{ + */ + +#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) +#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) +#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \ + ((INTERNAL) == SPI_NSSInternalSoft_Reset)) +/** + * @} + */ + +/** @defgroup SPI_CRC_Transmit_Receive + * @{ + */ + +#define SPI_CRC_Tx ((uint8_t)0x00) +#define SPI_CRC_Rx ((uint8_t)0x01) +#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx)) +/** + * @} + */ + +/** @defgroup SPI_direction_transmit_receive + * @{ + */ + +#define SPI_Direction_Rx ((uint16_t)0xBFFF) +#define SPI_Direction_Tx ((uint16_t)0x4000) +#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \ + ((DIRECTION) == SPI_Direction_Tx)) +/** + * @} + */ + +/** @defgroup SPI_I2S_interrupts_definition + * @{ + */ + +#define SPI_I2S_IT_TXE ((uint8_t)0x71) +#define SPI_I2S_IT_RXNE ((uint8_t)0x60) +#define SPI_I2S_IT_ERR ((uint8_t)0x50) +#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \ + ((IT) == SPI_I2S_IT_RXNE) || \ + ((IT) == SPI_I2S_IT_ERR)) +#define SPI_I2S_IT_OVR ((uint8_t)0x56) +#define SPI_IT_MODF ((uint8_t)0x55) +#define SPI_IT_CRCERR ((uint8_t)0x54) +#define I2S_IT_UDR ((uint8_t)0x53) +#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR)) +#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \ + ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \ + ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR)) +/** + * @} + */ + +/** @defgroup SPI_I2S_flags_definition + * @{ + */ + +#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) +#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) +#define I2S_FLAG_CHSIDE ((uint16_t)0x0004) +#define I2S_FLAG_UDR ((uint16_t)0x0008) +#define SPI_FLAG_CRCERR ((uint16_t)0x0010) +#define SPI_FLAG_MODF ((uint16_t)0x0020) +#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) +#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) +#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR)) +#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \ + ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ + ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ + ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)) +/** + * @} + */ + +/** @defgroup SPI_CRC_polynomial + * @{ + */ + +#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup SPI_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Exported_Functions + * @{ + */ + +void SPI_I2S_DeInit(SPI_TypeDef* SPIx); +void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); +void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct); +void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); +void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct); +void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState); +void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState); +void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data); +uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); +void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft); +void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); +void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize); +void SPI_TransmitCRC(SPI_TypeDef* SPIx); +void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); +uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); +uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); +void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction); +FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); +void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); +ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); +void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_SPI_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h index 65bf76aa..cd7ac3e9 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_tim.h @@ -1,1164 +1,1164 @@ -/** - ****************************************************************************** - * @file stm32f10x_tim.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the TIM firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_TIM_H -#define __STM32F10x_TIM_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup TIM - * @{ - */ - -/** @defgroup TIM_Exported_Types - * @{ - */ - -/** - * @brief TIM Time Base Init structure definition - * @note This structure is used with all TIMx except for TIM6 and TIM7. - */ - -typedef struct -{ - uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. - This parameter can be a number between 0x0000 and 0xFFFF */ - - uint16_t TIM_CounterMode; /*!< Specifies the counter mode. - This parameter can be a value of @ref TIM_Counter_Mode */ - - uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active - Auto-Reload Register at the next update event. - This parameter must be a number between 0x0000 and 0xFFFF. */ - - uint16_t TIM_ClockDivision; /*!< Specifies the clock division. - This parameter can be a value of @ref TIM_Clock_Division_CKD */ - - uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter - reaches zero, an update event is generated and counting restarts - from the RCR value (N). - This means in PWM mode that (N+1) corresponds to: - - the number of PWM periods in edge-aligned mode - - the number of half PWM period in center-aligned mode - This parameter must be a number between 0x00 and 0xFF. - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_TimeBaseInitTypeDef; - -/** - * @brief TIM Output Compare Init structure definition - */ - -typedef struct -{ - uint16_t TIM_OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. - This parameter can be a value of @ref TIM_Output_Compare_state */ - - uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. - This parameter can be a value of @ref TIM_Output_Compare_N_state - @note This parameter is valid only for TIM1 and TIM8. */ - - uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between 0x0000 and 0xFFFF */ - - uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_OCInitTypeDef; - -/** - * @brief TIM Input Capture Init structure definition - */ - -typedef struct -{ - - uint16_t TIM_Channel; /*!< Specifies the TIM channel. - This parameter can be a value of @ref TIM_Channel */ - - uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint16_t TIM_ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between 0x0 and 0xF */ -} TIM_ICInitTypeDef; - -/** - * @brief BDTR structure definition - * @note This structure is used only with TIM1 and TIM8. - */ - -typedef struct -{ - - uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. - This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */ - - uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. - This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */ - - uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. - This parameter can be a value of @ref Lock_level */ - - uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the - switching-on of the outputs. - This parameter can be a number between 0x00 and 0xFF */ - - uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. - This parameter can be a value of @ref Break_Input_enable_disable */ - - uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. - This parameter can be a value of @ref Break_Polarity */ - - uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. - This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ -} TIM_BDTRInitTypeDef; - -/** @defgroup TIM_Exported_constants - * @{ - */ - -#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM6) || \ - ((PERIPH) == TIM7) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM9) || \ - ((PERIPH) == TIM10)|| \ - ((PERIPH) == TIM11)|| \ - ((PERIPH) == TIM12)|| \ - ((PERIPH) == TIM13)|| \ - ((PERIPH) == TIM14)|| \ - ((PERIPH) == TIM15)|| \ - ((PERIPH) == TIM16)|| \ - ((PERIPH) == TIM17)) - -/* LIST1: TIM 1 and 8 */ -#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM8)) - -/* LIST2: TIM 1, 8, 15 16 and 17 */ -#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15)|| \ - ((PERIPH) == TIM16)|| \ - ((PERIPH) == TIM17)) - -/* LIST3: TIM 1, 2, 3, 4, 5 and 8 */ -#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8)) - -/* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */ -#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15)|| \ - ((PERIPH) == TIM16)|| \ - ((PERIPH) == TIM17)) - -/* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */ -#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15)) - -/* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */ -#define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM9) || \ - ((PERIPH) == TIM12)|| \ - ((PERIPH) == TIM15)) - -/* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */ -#define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM6) || \ - ((PERIPH) == TIM7) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM9) || \ - ((PERIPH) == TIM12)|| \ - ((PERIPH) == TIM15)) - -/* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */ -#define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM9) || \ - ((PERIPH) == TIM10)|| \ - ((PERIPH) == TIM11)|| \ - ((PERIPH) == TIM12)|| \ - ((PERIPH) == TIM13)|| \ - ((PERIPH) == TIM14)|| \ - ((PERIPH) == TIM15)|| \ - ((PERIPH) == TIM16)|| \ - ((PERIPH) == TIM17)) - -/* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */ -#define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ - ((PERIPH) == TIM2) || \ - ((PERIPH) == TIM3) || \ - ((PERIPH) == TIM4) || \ - ((PERIPH) == TIM5) || \ - ((PERIPH) == TIM6) || \ - ((PERIPH) == TIM7) || \ - ((PERIPH) == TIM8) || \ - ((PERIPH) == TIM15)|| \ - ((PERIPH) == TIM16)|| \ - ((PERIPH) == TIM17)) - -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_and_PWM_modes - * @{ - */ - -#define TIM_OCMode_Timing ((uint16_t)0x0000) -#define TIM_OCMode_Active ((uint16_t)0x0010) -#define TIM_OCMode_Inactive ((uint16_t)0x0020) -#define TIM_OCMode_Toggle ((uint16_t)0x0030) -#define TIM_OCMode_PWM1 ((uint16_t)0x0060) -#define TIM_OCMode_PWM2 ((uint16_t)0x0070) -#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ - ((MODE) == TIM_OCMode_Active) || \ - ((MODE) == TIM_OCMode_Inactive) || \ - ((MODE) == TIM_OCMode_Toggle)|| \ - ((MODE) == TIM_OCMode_PWM1) || \ - ((MODE) == TIM_OCMode_PWM2)) -#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ - ((MODE) == TIM_OCMode_Active) || \ - ((MODE) == TIM_OCMode_Inactive) || \ - ((MODE) == TIM_OCMode_Toggle)|| \ - ((MODE) == TIM_OCMode_PWM1) || \ - ((MODE) == TIM_OCMode_PWM2) || \ - ((MODE) == TIM_ForcedAction_Active) || \ - ((MODE) == TIM_ForcedAction_InActive)) -/** - * @} - */ - -/** @defgroup TIM_One_Pulse_Mode - * @{ - */ - -#define TIM_OPMode_Single ((uint16_t)0x0008) -#define TIM_OPMode_Repetitive ((uint16_t)0x0000) -#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ - ((MODE) == TIM_OPMode_Repetitive)) -/** - * @} - */ - -/** @defgroup TIM_Channel - * @{ - */ - -#define TIM_Channel_1 ((uint16_t)0x0000) -#define TIM_Channel_2 ((uint16_t)0x0004) -#define TIM_Channel_3 ((uint16_t)0x0008) -#define TIM_Channel_4 ((uint16_t)0x000C) -#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ - ((CHANNEL) == TIM_Channel_2) || \ - ((CHANNEL) == TIM_Channel_3) || \ - ((CHANNEL) == TIM_Channel_4)) -#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ - ((CHANNEL) == TIM_Channel_2)) -#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ - ((CHANNEL) == TIM_Channel_2) || \ - ((CHANNEL) == TIM_Channel_3)) -/** - * @} - */ - -/** @defgroup TIM_Clock_Division_CKD - * @{ - */ - -#define TIM_CKD_DIV1 ((uint16_t)0x0000) -#define TIM_CKD_DIV2 ((uint16_t)0x0100) -#define TIM_CKD_DIV4 ((uint16_t)0x0200) -#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ - ((DIV) == TIM_CKD_DIV2) || \ - ((DIV) == TIM_CKD_DIV4)) -/** - * @} - */ - -/** @defgroup TIM_Counter_Mode - * @{ - */ - -#define TIM_CounterMode_Up ((uint16_t)0x0000) -#define TIM_CounterMode_Down ((uint16_t)0x0010) -#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) -#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) -#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) -#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ - ((MODE) == TIM_CounterMode_Down) || \ - ((MODE) == TIM_CounterMode_CenterAligned1) || \ - ((MODE) == TIM_CounterMode_CenterAligned2) || \ - ((MODE) == TIM_CounterMode_CenterAligned3)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Polarity - * @{ - */ - -#define TIM_OCPolarity_High ((uint16_t)0x0000) -#define TIM_OCPolarity_Low ((uint16_t)0x0002) -#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ - ((POLARITY) == TIM_OCPolarity_Low)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Polarity - * @{ - */ - -#define TIM_OCNPolarity_High ((uint16_t)0x0000) -#define TIM_OCNPolarity_Low ((uint16_t)0x0008) -#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ - ((POLARITY) == TIM_OCNPolarity_Low)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_state - * @{ - */ - -#define TIM_OutputState_Disable ((uint16_t)0x0000) -#define TIM_OutputState_Enable ((uint16_t)0x0001) -#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ - ((STATE) == TIM_OutputState_Enable)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_state - * @{ - */ - -#define TIM_OutputNState_Disable ((uint16_t)0x0000) -#define TIM_OutputNState_Enable ((uint16_t)0x0004) -#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ - ((STATE) == TIM_OutputNState_Enable)) -/** - * @} - */ - -/** @defgroup TIM_Capture_Compare_state - * @{ - */ - -#define TIM_CCx_Enable ((uint16_t)0x0001) -#define TIM_CCx_Disable ((uint16_t)0x0000) -#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ - ((CCX) == TIM_CCx_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Capture_Compare_N_state - * @{ - */ - -#define TIM_CCxN_Enable ((uint16_t)0x0004) -#define TIM_CCxN_Disable ((uint16_t)0x0000) -#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ - ((CCXN) == TIM_CCxN_Disable)) -/** - * @} - */ - -/** @defgroup Break_Input_enable_disable - * @{ - */ - -#define TIM_Break_Enable ((uint16_t)0x1000) -#define TIM_Break_Disable ((uint16_t)0x0000) -#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ - ((STATE) == TIM_Break_Disable)) -/** - * @} - */ - -/** @defgroup Break_Polarity - * @{ - */ - -#define TIM_BreakPolarity_Low ((uint16_t)0x0000) -#define TIM_BreakPolarity_High ((uint16_t)0x2000) -#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ - ((POLARITY) == TIM_BreakPolarity_High)) -/** - * @} - */ - -/** @defgroup TIM_AOE_Bit_Set_Reset - * @{ - */ - -#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) -#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) -#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ - ((STATE) == TIM_AutomaticOutput_Disable)) -/** - * @} - */ - -/** @defgroup Lock_level - * @{ - */ - -#define TIM_LOCKLevel_OFF ((uint16_t)0x0000) -#define TIM_LOCKLevel_1 ((uint16_t)0x0100) -#define TIM_LOCKLevel_2 ((uint16_t)0x0200) -#define TIM_LOCKLevel_3 ((uint16_t)0x0300) -#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ - ((LEVEL) == TIM_LOCKLevel_1) || \ - ((LEVEL) == TIM_LOCKLevel_2) || \ - ((LEVEL) == TIM_LOCKLevel_3)) -/** - * @} - */ - -/** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state - * @{ - */ - -#define TIM_OSSIState_Enable ((uint16_t)0x0400) -#define TIM_OSSIState_Disable ((uint16_t)0x0000) -#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ - ((STATE) == TIM_OSSIState_Disable)) -/** - * @} - */ - -/** @defgroup OSSR_Off_State_Selection_for_Run_mode_state - * @{ - */ - -#define TIM_OSSRState_Enable ((uint16_t)0x0800) -#define TIM_OSSRState_Disable ((uint16_t)0x0000) -#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ - ((STATE) == TIM_OSSRState_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Idle_State - * @{ - */ - -#define TIM_OCIdleState_Set ((uint16_t)0x0100) -#define TIM_OCIdleState_Reset ((uint16_t)0x0000) -#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ - ((STATE) == TIM_OCIdleState_Reset)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Idle_State - * @{ - */ - -#define TIM_OCNIdleState_Set ((uint16_t)0x0200) -#define TIM_OCNIdleState_Reset ((uint16_t)0x0000) -#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ - ((STATE) == TIM_OCNIdleState_Reset)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Polarity - * @{ - */ - -#define TIM_ICPolarity_Rising ((uint16_t)0x0000) -#define TIM_ICPolarity_Falling ((uint16_t)0x0002) -#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) -#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ - ((POLARITY) == TIM_ICPolarity_Falling)) -#define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ - ((POLARITY) == TIM_ICPolarity_Falling)|| \ - ((POLARITY) == TIM_ICPolarity_BothEdge)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Selection - * @{ - */ - -#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC1, IC2, IC3 or IC4, respectively */ -#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC2, IC1, IC4 or IC3, respectively. */ -#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ -#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ - ((SELECTION) == TIM_ICSelection_IndirectTI) || \ - ((SELECTION) == TIM_ICSelection_TRC)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Prescaler - * @{ - */ - -#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ -#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ -#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ -#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ -#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ - ((PRESCALER) == TIM_ICPSC_DIV2) || \ - ((PRESCALER) == TIM_ICPSC_DIV4) || \ - ((PRESCALER) == TIM_ICPSC_DIV8)) -/** - * @} - */ - -/** @defgroup TIM_interrupt_sources - * @{ - */ - -#define TIM_IT_Update ((uint16_t)0x0001) -#define TIM_IT_CC1 ((uint16_t)0x0002) -#define TIM_IT_CC2 ((uint16_t)0x0004) -#define TIM_IT_CC3 ((uint16_t)0x0008) -#define TIM_IT_CC4 ((uint16_t)0x0010) -#define TIM_IT_COM ((uint16_t)0x0020) -#define TIM_IT_Trigger ((uint16_t)0x0040) -#define TIM_IT_Break ((uint16_t)0x0080) -#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) - -#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ - ((IT) == TIM_IT_CC1) || \ - ((IT) == TIM_IT_CC2) || \ - ((IT) == TIM_IT_CC3) || \ - ((IT) == TIM_IT_CC4) || \ - ((IT) == TIM_IT_COM) || \ - ((IT) == TIM_IT_Trigger) || \ - ((IT) == TIM_IT_Break)) -/** - * @} - */ - -/** @defgroup TIM_DMA_Base_address - * @{ - */ - -#define TIM_DMABase_CR1 ((uint16_t)0x0000) -#define TIM_DMABase_CR2 ((uint16_t)0x0001) -#define TIM_DMABase_SMCR ((uint16_t)0x0002) -#define TIM_DMABase_DIER ((uint16_t)0x0003) -#define TIM_DMABase_SR ((uint16_t)0x0004) -#define TIM_DMABase_EGR ((uint16_t)0x0005) -#define TIM_DMABase_CCMR1 ((uint16_t)0x0006) -#define TIM_DMABase_CCMR2 ((uint16_t)0x0007) -#define TIM_DMABase_CCER ((uint16_t)0x0008) -#define TIM_DMABase_CNT ((uint16_t)0x0009) -#define TIM_DMABase_PSC ((uint16_t)0x000A) -#define TIM_DMABase_ARR ((uint16_t)0x000B) -#define TIM_DMABase_RCR ((uint16_t)0x000C) -#define TIM_DMABase_CCR1 ((uint16_t)0x000D) -#define TIM_DMABase_CCR2 ((uint16_t)0x000E) -#define TIM_DMABase_CCR3 ((uint16_t)0x000F) -#define TIM_DMABase_CCR4 ((uint16_t)0x0010) -#define TIM_DMABase_BDTR ((uint16_t)0x0011) -#define TIM_DMABase_DCR ((uint16_t)0x0012) -#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ - ((BASE) == TIM_DMABase_CR2) || \ - ((BASE) == TIM_DMABase_SMCR) || \ - ((BASE) == TIM_DMABase_DIER) || \ - ((BASE) == TIM_DMABase_SR) || \ - ((BASE) == TIM_DMABase_EGR) || \ - ((BASE) == TIM_DMABase_CCMR1) || \ - ((BASE) == TIM_DMABase_CCMR2) || \ - ((BASE) == TIM_DMABase_CCER) || \ - ((BASE) == TIM_DMABase_CNT) || \ - ((BASE) == TIM_DMABase_PSC) || \ - ((BASE) == TIM_DMABase_ARR) || \ - ((BASE) == TIM_DMABase_RCR) || \ - ((BASE) == TIM_DMABase_CCR1) || \ - ((BASE) == TIM_DMABase_CCR2) || \ - ((BASE) == TIM_DMABase_CCR3) || \ - ((BASE) == TIM_DMABase_CCR4) || \ - ((BASE) == TIM_DMABase_BDTR) || \ - ((BASE) == TIM_DMABase_DCR)) -/** - * @} - */ - -/** @defgroup TIM_DMA_Burst_Length - * @{ - */ - -#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) -#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) -#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) -#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) -#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) -#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) -#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) -#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) -#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) -#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) -#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) -#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) -#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) -#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) -#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) -#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) -#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) -#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) -#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \ - ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_7Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_8Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_11Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_12Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_13Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_15Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_16Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_17Transfers) || \ - ((LENGTH) == TIM_DMABurstLength_18Transfers)) -/** - * @} - */ - -/** @defgroup TIM_DMA_sources - * @{ - */ - -#define TIM_DMA_Update ((uint16_t)0x0100) -#define TIM_DMA_CC1 ((uint16_t)0x0200) -#define TIM_DMA_CC2 ((uint16_t)0x0400) -#define TIM_DMA_CC3 ((uint16_t)0x0800) -#define TIM_DMA_CC4 ((uint16_t)0x1000) -#define TIM_DMA_COM ((uint16_t)0x2000) -#define TIM_DMA_Trigger ((uint16_t)0x4000) -#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) - -/** - * @} - */ - -/** @defgroup TIM_External_Trigger_Prescaler - * @{ - */ - -#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) -#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) -#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) -#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) -#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ - ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ - ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ - ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) -/** - * @} - */ - -/** @defgroup TIM_Internal_Trigger_Selection - * @{ - */ - -#define TIM_TS_ITR0 ((uint16_t)0x0000) -#define TIM_TS_ITR1 ((uint16_t)0x0010) -#define TIM_TS_ITR2 ((uint16_t)0x0020) -#define TIM_TS_ITR3 ((uint16_t)0x0030) -#define TIM_TS_TI1F_ED ((uint16_t)0x0040) -#define TIM_TS_TI1FP1 ((uint16_t)0x0050) -#define TIM_TS_TI2FP2 ((uint16_t)0x0060) -#define TIM_TS_ETRF ((uint16_t)0x0070) -#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ - ((SELECTION) == TIM_TS_ITR1) || \ - ((SELECTION) == TIM_TS_ITR2) || \ - ((SELECTION) == TIM_TS_ITR3) || \ - ((SELECTION) == TIM_TS_TI1F_ED) || \ - ((SELECTION) == TIM_TS_TI1FP1) || \ - ((SELECTION) == TIM_TS_TI2FP2) || \ - ((SELECTION) == TIM_TS_ETRF)) -#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ - ((SELECTION) == TIM_TS_ITR1) || \ - ((SELECTION) == TIM_TS_ITR2) || \ - ((SELECTION) == TIM_TS_ITR3)) -/** - * @} - */ - -/** @defgroup TIM_TIx_External_Clock_Source - * @{ - */ - -#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) -#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) -#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) -#define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ - ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \ - ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED)) -/** - * @} - */ - -/** @defgroup TIM_External_Trigger_Polarity - * @{ - */ -#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) -#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) -#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ - ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) -/** - * @} - */ - -/** @defgroup TIM_Prescaler_Reload_Mode - * @{ - */ - -#define TIM_PSCReloadMode_Update ((uint16_t)0x0000) -#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) -#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ - ((RELOAD) == TIM_PSCReloadMode_Immediate)) -/** - * @} - */ - -/** @defgroup TIM_Forced_Action - * @{ - */ - -#define TIM_ForcedAction_Active ((uint16_t)0x0050) -#define TIM_ForcedAction_InActive ((uint16_t)0x0040) -#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ - ((ACTION) == TIM_ForcedAction_InActive)) -/** - * @} - */ - -/** @defgroup TIM_Encoder_Mode - * @{ - */ - -#define TIM_EncoderMode_TI1 ((uint16_t)0x0001) -#define TIM_EncoderMode_TI2 ((uint16_t)0x0002) -#define TIM_EncoderMode_TI12 ((uint16_t)0x0003) -#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ - ((MODE) == TIM_EncoderMode_TI2) || \ - ((MODE) == TIM_EncoderMode_TI12)) -/** - * @} - */ - - -/** @defgroup TIM_Event_Source - * @{ - */ - -#define TIM_EventSource_Update ((uint16_t)0x0001) -#define TIM_EventSource_CC1 ((uint16_t)0x0002) -#define TIM_EventSource_CC2 ((uint16_t)0x0004) -#define TIM_EventSource_CC3 ((uint16_t)0x0008) -#define TIM_EventSource_CC4 ((uint16_t)0x0010) -#define TIM_EventSource_COM ((uint16_t)0x0020) -#define TIM_EventSource_Trigger ((uint16_t)0x0040) -#define TIM_EventSource_Break ((uint16_t)0x0080) -#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) - -/** - * @} - */ - -/** @defgroup TIM_Update_Source - * @{ - */ - -#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow - or the setting of UG bit, or an update generation - through the slave mode controller. */ -#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ -#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ - ((SOURCE) == TIM_UpdateSource_Regular)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Preload_State - * @{ - */ - -#define TIM_OCPreload_Enable ((uint16_t)0x0008) -#define TIM_OCPreload_Disable ((uint16_t)0x0000) -#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ - ((STATE) == TIM_OCPreload_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Fast_State - * @{ - */ - -#define TIM_OCFast_Enable ((uint16_t)0x0004) -#define TIM_OCFast_Disable ((uint16_t)0x0000) -#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ - ((STATE) == TIM_OCFast_Disable)) - -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Clear_State - * @{ - */ - -#define TIM_OCClear_Enable ((uint16_t)0x0080) -#define TIM_OCClear_Disable ((uint16_t)0x0000) -#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ - ((STATE) == TIM_OCClear_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Output_Source - * @{ - */ - -#define TIM_TRGOSource_Reset ((uint16_t)0x0000) -#define TIM_TRGOSource_Enable ((uint16_t)0x0010) -#define TIM_TRGOSource_Update ((uint16_t)0x0020) -#define TIM_TRGOSource_OC1 ((uint16_t)0x0030) -#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) -#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) -#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) -#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) -#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ - ((SOURCE) == TIM_TRGOSource_Enable) || \ - ((SOURCE) == TIM_TRGOSource_Update) || \ - ((SOURCE) == TIM_TRGOSource_OC1) || \ - ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ - ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ - ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ - ((SOURCE) == TIM_TRGOSource_OC4Ref)) -/** - * @} - */ - -/** @defgroup TIM_Slave_Mode - * @{ - */ - -#define TIM_SlaveMode_Reset ((uint16_t)0x0004) -#define TIM_SlaveMode_Gated ((uint16_t)0x0005) -#define TIM_SlaveMode_Trigger ((uint16_t)0x0006) -#define TIM_SlaveMode_External1 ((uint16_t)0x0007) -#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ - ((MODE) == TIM_SlaveMode_Gated) || \ - ((MODE) == TIM_SlaveMode_Trigger) || \ - ((MODE) == TIM_SlaveMode_External1)) -/** - * @} - */ - -/** @defgroup TIM_Master_Slave_Mode - * @{ - */ - -#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) -#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) -#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ - ((STATE) == TIM_MasterSlaveMode_Disable)) -/** - * @} - */ - -/** @defgroup TIM_Flags - * @{ - */ - -#define TIM_FLAG_Update ((uint16_t)0x0001) -#define TIM_FLAG_CC1 ((uint16_t)0x0002) -#define TIM_FLAG_CC2 ((uint16_t)0x0004) -#define TIM_FLAG_CC3 ((uint16_t)0x0008) -#define TIM_FLAG_CC4 ((uint16_t)0x0010) -#define TIM_FLAG_COM ((uint16_t)0x0020) -#define TIM_FLAG_Trigger ((uint16_t)0x0040) -#define TIM_FLAG_Break ((uint16_t)0x0080) -#define TIM_FLAG_CC1OF ((uint16_t)0x0200) -#define TIM_FLAG_CC2OF ((uint16_t)0x0400) -#define TIM_FLAG_CC3OF ((uint16_t)0x0800) -#define TIM_FLAG_CC4OF ((uint16_t)0x1000) -#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ - ((FLAG) == TIM_FLAG_CC1) || \ - ((FLAG) == TIM_FLAG_CC2) || \ - ((FLAG) == TIM_FLAG_CC3) || \ - ((FLAG) == TIM_FLAG_CC4) || \ - ((FLAG) == TIM_FLAG_COM) || \ - ((FLAG) == TIM_FLAG_Trigger) || \ - ((FLAG) == TIM_FLAG_Break) || \ - ((FLAG) == TIM_FLAG_CC1OF) || \ - ((FLAG) == TIM_FLAG_CC2OF) || \ - ((FLAG) == TIM_FLAG_CC3OF) || \ - ((FLAG) == TIM_FLAG_CC4OF)) - - -#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Filer_Value - * @{ - */ - -#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) -/** - * @} - */ - -/** @defgroup TIM_External_Trigger_Filter - * @{ - */ - -#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) -/** - * @} - */ - -/** @defgroup TIM_Legacy - * @{ - */ - -#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer -#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers -#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers -#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers -#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers -#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers -#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers -#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers -#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers -#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers -#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers -#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers -#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers -#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers -#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers -#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers -#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers -#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup TIM_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions - * @{ - */ - -void TIM_DeInit(TIM_TypeDef* TIMx); -void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); -void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); -void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); -void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); -void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); -void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); -void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); -void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); -void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); -void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); -void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); -void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); -void TIM_InternalClockConfig(TIM_TypeDef* TIMx); -void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); -void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, - uint16_t TIM_ICPolarity, uint16_t ICFilter); -void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter); -void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, - uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); -void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter); -void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); -void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); -void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); -void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, - uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); -void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); -void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); -void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); -void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); -void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); -void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); -void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); -void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); -void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); -void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); -void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); -void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); -void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); -void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); -void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); -void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); -void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); -void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); -void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); -void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); -void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); -void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); -void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); -void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); -void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); -uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); -uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); -uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); -uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); -uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); -uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); -FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); -void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); -ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); -void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32F10x_TIM_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_tim.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the TIM firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_TIM_H +#define __STM32F10x_TIM_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup TIM + * @{ + */ + +/** @defgroup TIM_Exported_Types + * @{ + */ + +/** + * @brief TIM Time Base Init structure definition + * @note This structure is used with all TIMx except for TIM6 and TIM7. + */ + +typedef struct +{ + uint16_t TIM_Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. + This parameter can be a number between 0x0000 and 0xFFFF */ + + uint16_t TIM_CounterMode; /*!< Specifies the counter mode. + This parameter can be a value of @ref TIM_Counter_Mode */ + + uint16_t TIM_Period; /*!< Specifies the period value to be loaded into the active + Auto-Reload Register at the next update event. + This parameter must be a number between 0x0000 and 0xFFFF. */ + + uint16_t TIM_ClockDivision; /*!< Specifies the clock division. + This parameter can be a value of @ref TIM_Clock_Division_CKD */ + + uint8_t TIM_RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter + reaches zero, an update event is generated and counting restarts + from the RCR value (N). + This means in PWM mode that (N+1) corresponds to: + - the number of PWM periods in edge-aligned mode + - the number of half PWM period in center-aligned mode + This parameter must be a number between 0x00 and 0xFF. + @note This parameter is valid only for TIM1 and TIM8. */ +} TIM_TimeBaseInitTypeDef; + +/** + * @brief TIM Output Compare Init structure definition + */ + +typedef struct +{ + uint16_t TIM_OCMode; /*!< Specifies the TIM mode. + This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ + + uint16_t TIM_OutputState; /*!< Specifies the TIM Output Compare state. + This parameter can be a value of @ref TIM_Output_Compare_state */ + + uint16_t TIM_OutputNState; /*!< Specifies the TIM complementary Output Compare state. + This parameter can be a value of @ref TIM_Output_Compare_N_state + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. + This parameter can be a number between 0x0000 and 0xFFFF */ + + uint16_t TIM_OCPolarity; /*!< Specifies the output polarity. + This parameter can be a value of @ref TIM_Output_Compare_Polarity */ + + uint16_t TIM_OCNPolarity; /*!< Specifies the complementary output polarity. + This parameter can be a value of @ref TIM_Output_Compare_N_Polarity + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_Output_Compare_Idle_State + @note This parameter is valid only for TIM1 and TIM8. */ + + uint16_t TIM_OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. + This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State + @note This parameter is valid only for TIM1 and TIM8. */ +} TIM_OCInitTypeDef; + +/** + * @brief TIM Input Capture Init structure definition + */ + +typedef struct +{ + + uint16_t TIM_Channel; /*!< Specifies the TIM channel. + This parameter can be a value of @ref TIM_Channel */ + + uint16_t TIM_ICPolarity; /*!< Specifies the active edge of the input signal. + This parameter can be a value of @ref TIM_Input_Capture_Polarity */ + + uint16_t TIM_ICSelection; /*!< Specifies the input. + This parameter can be a value of @ref TIM_Input_Capture_Selection */ + + uint16_t TIM_ICPrescaler; /*!< Specifies the Input Capture Prescaler. + This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ + + uint16_t TIM_ICFilter; /*!< Specifies the input capture filter. + This parameter can be a number between 0x0 and 0xF */ +} TIM_ICInitTypeDef; + +/** + * @brief BDTR structure definition + * @note This structure is used only with TIM1 and TIM8. + */ + +typedef struct +{ + + uint16_t TIM_OSSRState; /*!< Specifies the Off-State selection used in Run mode. + This parameter can be a value of @ref OSSR_Off_State_Selection_for_Run_mode_state */ + + uint16_t TIM_OSSIState; /*!< Specifies the Off-State used in Idle state. + This parameter can be a value of @ref OSSI_Off_State_Selection_for_Idle_mode_state */ + + uint16_t TIM_LOCKLevel; /*!< Specifies the LOCK level parameters. + This parameter can be a value of @ref Lock_level */ + + uint16_t TIM_DeadTime; /*!< Specifies the delay time between the switching-off and the + switching-on of the outputs. + This parameter can be a number between 0x00 and 0xFF */ + + uint16_t TIM_Break; /*!< Specifies whether the TIM Break input is enabled or not. + This parameter can be a value of @ref Break_Input_enable_disable */ + + uint16_t TIM_BreakPolarity; /*!< Specifies the TIM Break Input pin polarity. + This parameter can be a value of @ref Break_Polarity */ + + uint16_t TIM_AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled or not. + This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ +} TIM_BDTRInitTypeDef; + +/** @defgroup TIM_Exported_constants + * @{ + */ + +#define IS_TIM_ALL_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM6) || \ + ((PERIPH) == TIM7) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM10)|| \ + ((PERIPH) == TIM11)|| \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM13)|| \ + ((PERIPH) == TIM14)|| \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST1: TIM 1 and 8 */ +#define IS_TIM_LIST1_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM8)) + +/* LIST2: TIM 1, 8, 15 16 and 17 */ +#define IS_TIM_LIST2_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST3: TIM 1, 2, 3, 4, 5 and 8 */ +#define IS_TIM_LIST3_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8)) + +/* LIST4: TIM 1, 2, 3, 4, 5, 8, 15, 16 and 17 */ +#define IS_TIM_LIST4_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST5: TIM 1, 2, 3, 4, 5, 8 and 15 */ +#define IS_TIM_LIST5_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)) + +/* LIST6: TIM 1, 2, 3, 4, 5, 8, 9, 12 and 15 */ +#define IS_TIM_LIST6_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM15)) + +/* LIST7: TIM 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 and 15 */ +#define IS_TIM_LIST7_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM6) || \ + ((PERIPH) == TIM7) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM15)) + +/* LIST8: TIM 1, 2, 3, 4, 5, 8, 9, 10, 11, 12, 13, 14, 15, 16 and 17 */ +#define IS_TIM_LIST8_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM9) || \ + ((PERIPH) == TIM10)|| \ + ((PERIPH) == TIM11)|| \ + ((PERIPH) == TIM12)|| \ + ((PERIPH) == TIM13)|| \ + ((PERIPH) == TIM14)|| \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/* LIST9: TIM 1, 2, 3, 4, 5, 6, 7, 8, 15, 16, and 17 */ +#define IS_TIM_LIST9_PERIPH(PERIPH) (((PERIPH) == TIM1) || \ + ((PERIPH) == TIM2) || \ + ((PERIPH) == TIM3) || \ + ((PERIPH) == TIM4) || \ + ((PERIPH) == TIM5) || \ + ((PERIPH) == TIM6) || \ + ((PERIPH) == TIM7) || \ + ((PERIPH) == TIM8) || \ + ((PERIPH) == TIM15)|| \ + ((PERIPH) == TIM16)|| \ + ((PERIPH) == TIM17)) + +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_and_PWM_modes + * @{ + */ + +#define TIM_OCMode_Timing ((uint16_t)0x0000) +#define TIM_OCMode_Active ((uint16_t)0x0010) +#define TIM_OCMode_Inactive ((uint16_t)0x0020) +#define TIM_OCMode_Toggle ((uint16_t)0x0030) +#define TIM_OCMode_PWM1 ((uint16_t)0x0060) +#define TIM_OCMode_PWM2 ((uint16_t)0x0070) +#define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMode_Timing) || \ + ((MODE) == TIM_OCMode_Active) || \ + ((MODE) == TIM_OCMode_Inactive) || \ + ((MODE) == TIM_OCMode_Toggle)|| \ + ((MODE) == TIM_OCMode_PWM1) || \ + ((MODE) == TIM_OCMode_PWM2)) +#define IS_TIM_OCM(MODE) (((MODE) == TIM_OCMode_Timing) || \ + ((MODE) == TIM_OCMode_Active) || \ + ((MODE) == TIM_OCMode_Inactive) || \ + ((MODE) == TIM_OCMode_Toggle)|| \ + ((MODE) == TIM_OCMode_PWM1) || \ + ((MODE) == TIM_OCMode_PWM2) || \ + ((MODE) == TIM_ForcedAction_Active) || \ + ((MODE) == TIM_ForcedAction_InActive)) +/** + * @} + */ + +/** @defgroup TIM_One_Pulse_Mode + * @{ + */ + +#define TIM_OPMode_Single ((uint16_t)0x0008) +#define TIM_OPMode_Repetitive ((uint16_t)0x0000) +#define IS_TIM_OPM_MODE(MODE) (((MODE) == TIM_OPMode_Single) || \ + ((MODE) == TIM_OPMode_Repetitive)) +/** + * @} + */ + +/** @defgroup TIM_Channel + * @{ + */ + +#define TIM_Channel_1 ((uint16_t)0x0000) +#define TIM_Channel_2 ((uint16_t)0x0004) +#define TIM_Channel_3 ((uint16_t)0x0008) +#define TIM_Channel_4 ((uint16_t)0x000C) +#define IS_TIM_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ + ((CHANNEL) == TIM_Channel_2) || \ + ((CHANNEL) == TIM_Channel_3) || \ + ((CHANNEL) == TIM_Channel_4)) +#define IS_TIM_PWMI_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ + ((CHANNEL) == TIM_Channel_2)) +#define IS_TIM_COMPLEMENTARY_CHANNEL(CHANNEL) (((CHANNEL) == TIM_Channel_1) || \ + ((CHANNEL) == TIM_Channel_2) || \ + ((CHANNEL) == TIM_Channel_3)) +/** + * @} + */ + +/** @defgroup TIM_Clock_Division_CKD + * @{ + */ + +#define TIM_CKD_DIV1 ((uint16_t)0x0000) +#define TIM_CKD_DIV2 ((uint16_t)0x0100) +#define TIM_CKD_DIV4 ((uint16_t)0x0200) +#define IS_TIM_CKD_DIV(DIV) (((DIV) == TIM_CKD_DIV1) || \ + ((DIV) == TIM_CKD_DIV2) || \ + ((DIV) == TIM_CKD_DIV4)) +/** + * @} + */ + +/** @defgroup TIM_Counter_Mode + * @{ + */ + +#define TIM_CounterMode_Up ((uint16_t)0x0000) +#define TIM_CounterMode_Down ((uint16_t)0x0010) +#define TIM_CounterMode_CenterAligned1 ((uint16_t)0x0020) +#define TIM_CounterMode_CenterAligned2 ((uint16_t)0x0040) +#define TIM_CounterMode_CenterAligned3 ((uint16_t)0x0060) +#define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_CounterMode_Up) || \ + ((MODE) == TIM_CounterMode_Down) || \ + ((MODE) == TIM_CounterMode_CenterAligned1) || \ + ((MODE) == TIM_CounterMode_CenterAligned2) || \ + ((MODE) == TIM_CounterMode_CenterAligned3)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Polarity + * @{ + */ + +#define TIM_OCPolarity_High ((uint16_t)0x0000) +#define TIM_OCPolarity_Low ((uint16_t)0x0002) +#define IS_TIM_OC_POLARITY(POLARITY) (((POLARITY) == TIM_OCPolarity_High) || \ + ((POLARITY) == TIM_OCPolarity_Low)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_N_Polarity + * @{ + */ + +#define TIM_OCNPolarity_High ((uint16_t)0x0000) +#define TIM_OCNPolarity_Low ((uint16_t)0x0008) +#define IS_TIM_OCN_POLARITY(POLARITY) (((POLARITY) == TIM_OCNPolarity_High) || \ + ((POLARITY) == TIM_OCNPolarity_Low)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_state + * @{ + */ + +#define TIM_OutputState_Disable ((uint16_t)0x0000) +#define TIM_OutputState_Enable ((uint16_t)0x0001) +#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OutputState_Disable) || \ + ((STATE) == TIM_OutputState_Enable)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_N_state + * @{ + */ + +#define TIM_OutputNState_Disable ((uint16_t)0x0000) +#define TIM_OutputNState_Enable ((uint16_t)0x0004) +#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OutputNState_Disable) || \ + ((STATE) == TIM_OutputNState_Enable)) +/** + * @} + */ + +/** @defgroup TIM_Capture_Compare_state + * @{ + */ + +#define TIM_CCx_Enable ((uint16_t)0x0001) +#define TIM_CCx_Disable ((uint16_t)0x0000) +#define IS_TIM_CCX(CCX) (((CCX) == TIM_CCx_Enable) || \ + ((CCX) == TIM_CCx_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Capture_Compare_N_state + * @{ + */ + +#define TIM_CCxN_Enable ((uint16_t)0x0004) +#define TIM_CCxN_Disable ((uint16_t)0x0000) +#define IS_TIM_CCXN(CCXN) (((CCXN) == TIM_CCxN_Enable) || \ + ((CCXN) == TIM_CCxN_Disable)) +/** + * @} + */ + +/** @defgroup Break_Input_enable_disable + * @{ + */ + +#define TIM_Break_Enable ((uint16_t)0x1000) +#define TIM_Break_Disable ((uint16_t)0x0000) +#define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_Break_Enable) || \ + ((STATE) == TIM_Break_Disable)) +/** + * @} + */ + +/** @defgroup Break_Polarity + * @{ + */ + +#define TIM_BreakPolarity_Low ((uint16_t)0x0000) +#define TIM_BreakPolarity_High ((uint16_t)0x2000) +#define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BreakPolarity_Low) || \ + ((POLARITY) == TIM_BreakPolarity_High)) +/** + * @} + */ + +/** @defgroup TIM_AOE_Bit_Set_Reset + * @{ + */ + +#define TIM_AutomaticOutput_Enable ((uint16_t)0x4000) +#define TIM_AutomaticOutput_Disable ((uint16_t)0x0000) +#define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AutomaticOutput_Enable) || \ + ((STATE) == TIM_AutomaticOutput_Disable)) +/** + * @} + */ + +/** @defgroup Lock_level + * @{ + */ + +#define TIM_LOCKLevel_OFF ((uint16_t)0x0000) +#define TIM_LOCKLevel_1 ((uint16_t)0x0100) +#define TIM_LOCKLevel_2 ((uint16_t)0x0200) +#define TIM_LOCKLevel_3 ((uint16_t)0x0300) +#define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLevel_OFF) || \ + ((LEVEL) == TIM_LOCKLevel_1) || \ + ((LEVEL) == TIM_LOCKLevel_2) || \ + ((LEVEL) == TIM_LOCKLevel_3)) +/** + * @} + */ + +/** @defgroup OSSI_Off_State_Selection_for_Idle_mode_state + * @{ + */ + +#define TIM_OSSIState_Enable ((uint16_t)0x0400) +#define TIM_OSSIState_Disable ((uint16_t)0x0000) +#define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSIState_Enable) || \ + ((STATE) == TIM_OSSIState_Disable)) +/** + * @} + */ + +/** @defgroup OSSR_Off_State_Selection_for_Run_mode_state + * @{ + */ + +#define TIM_OSSRState_Enable ((uint16_t)0x0800) +#define TIM_OSSRState_Disable ((uint16_t)0x0000) +#define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSRState_Enable) || \ + ((STATE) == TIM_OSSRState_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Idle_State + * @{ + */ + +#define TIM_OCIdleState_Set ((uint16_t)0x0100) +#define TIM_OCIdleState_Reset ((uint16_t)0x0000) +#define IS_TIM_OCIDLE_STATE(STATE) (((STATE) == TIM_OCIdleState_Set) || \ + ((STATE) == TIM_OCIdleState_Reset)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_N_Idle_State + * @{ + */ + +#define TIM_OCNIdleState_Set ((uint16_t)0x0200) +#define TIM_OCNIdleState_Reset ((uint16_t)0x0000) +#define IS_TIM_OCNIDLE_STATE(STATE) (((STATE) == TIM_OCNIdleState_Set) || \ + ((STATE) == TIM_OCNIdleState_Reset)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Polarity + * @{ + */ + +#define TIM_ICPolarity_Rising ((uint16_t)0x0000) +#define TIM_ICPolarity_Falling ((uint16_t)0x0002) +#define TIM_ICPolarity_BothEdge ((uint16_t)0x000A) +#define IS_TIM_IC_POLARITY(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ + ((POLARITY) == TIM_ICPolarity_Falling)) +#define IS_TIM_IC_POLARITY_LITE(POLARITY) (((POLARITY) == TIM_ICPolarity_Rising) || \ + ((POLARITY) == TIM_ICPolarity_Falling)|| \ + ((POLARITY) == TIM_ICPolarity_BothEdge)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Selection + * @{ + */ + +#define TIM_ICSelection_DirectTI ((uint16_t)0x0001) /*!< TIM Input 1, 2, 3 or 4 is selected to be + connected to IC1, IC2, IC3 or IC4, respectively */ +#define TIM_ICSelection_IndirectTI ((uint16_t)0x0002) /*!< TIM Input 1, 2, 3 or 4 is selected to be + connected to IC2, IC1, IC4 or IC3, respectively. */ +#define TIM_ICSelection_TRC ((uint16_t)0x0003) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC. */ +#define IS_TIM_IC_SELECTION(SELECTION) (((SELECTION) == TIM_ICSelection_DirectTI) || \ + ((SELECTION) == TIM_ICSelection_IndirectTI) || \ + ((SELECTION) == TIM_ICSelection_TRC)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Prescaler + * @{ + */ + +#define TIM_ICPSC_DIV1 ((uint16_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input. */ +#define TIM_ICPSC_DIV2 ((uint16_t)0x0004) /*!< Capture performed once every 2 events. */ +#define TIM_ICPSC_DIV4 ((uint16_t)0x0008) /*!< Capture performed once every 4 events. */ +#define TIM_ICPSC_DIV8 ((uint16_t)0x000C) /*!< Capture performed once every 8 events. */ +#define IS_TIM_IC_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ICPSC_DIV1) || \ + ((PRESCALER) == TIM_ICPSC_DIV2) || \ + ((PRESCALER) == TIM_ICPSC_DIV4) || \ + ((PRESCALER) == TIM_ICPSC_DIV8)) +/** + * @} + */ + +/** @defgroup TIM_interrupt_sources + * @{ + */ + +#define TIM_IT_Update ((uint16_t)0x0001) +#define TIM_IT_CC1 ((uint16_t)0x0002) +#define TIM_IT_CC2 ((uint16_t)0x0004) +#define TIM_IT_CC3 ((uint16_t)0x0008) +#define TIM_IT_CC4 ((uint16_t)0x0010) +#define TIM_IT_COM ((uint16_t)0x0020) +#define TIM_IT_Trigger ((uint16_t)0x0040) +#define TIM_IT_Break ((uint16_t)0x0080) +#define IS_TIM_IT(IT) ((((IT) & (uint16_t)0xFF00) == 0x0000) && ((IT) != 0x0000)) + +#define IS_TIM_GET_IT(IT) (((IT) == TIM_IT_Update) || \ + ((IT) == TIM_IT_CC1) || \ + ((IT) == TIM_IT_CC2) || \ + ((IT) == TIM_IT_CC3) || \ + ((IT) == TIM_IT_CC4) || \ + ((IT) == TIM_IT_COM) || \ + ((IT) == TIM_IT_Trigger) || \ + ((IT) == TIM_IT_Break)) +/** + * @} + */ + +/** @defgroup TIM_DMA_Base_address + * @{ + */ + +#define TIM_DMABase_CR1 ((uint16_t)0x0000) +#define TIM_DMABase_CR2 ((uint16_t)0x0001) +#define TIM_DMABase_SMCR ((uint16_t)0x0002) +#define TIM_DMABase_DIER ((uint16_t)0x0003) +#define TIM_DMABase_SR ((uint16_t)0x0004) +#define TIM_DMABase_EGR ((uint16_t)0x0005) +#define TIM_DMABase_CCMR1 ((uint16_t)0x0006) +#define TIM_DMABase_CCMR2 ((uint16_t)0x0007) +#define TIM_DMABase_CCER ((uint16_t)0x0008) +#define TIM_DMABase_CNT ((uint16_t)0x0009) +#define TIM_DMABase_PSC ((uint16_t)0x000A) +#define TIM_DMABase_ARR ((uint16_t)0x000B) +#define TIM_DMABase_RCR ((uint16_t)0x000C) +#define TIM_DMABase_CCR1 ((uint16_t)0x000D) +#define TIM_DMABase_CCR2 ((uint16_t)0x000E) +#define TIM_DMABase_CCR3 ((uint16_t)0x000F) +#define TIM_DMABase_CCR4 ((uint16_t)0x0010) +#define TIM_DMABase_BDTR ((uint16_t)0x0011) +#define TIM_DMABase_DCR ((uint16_t)0x0012) +#define IS_TIM_DMA_BASE(BASE) (((BASE) == TIM_DMABase_CR1) || \ + ((BASE) == TIM_DMABase_CR2) || \ + ((BASE) == TIM_DMABase_SMCR) || \ + ((BASE) == TIM_DMABase_DIER) || \ + ((BASE) == TIM_DMABase_SR) || \ + ((BASE) == TIM_DMABase_EGR) || \ + ((BASE) == TIM_DMABase_CCMR1) || \ + ((BASE) == TIM_DMABase_CCMR2) || \ + ((BASE) == TIM_DMABase_CCER) || \ + ((BASE) == TIM_DMABase_CNT) || \ + ((BASE) == TIM_DMABase_PSC) || \ + ((BASE) == TIM_DMABase_ARR) || \ + ((BASE) == TIM_DMABase_RCR) || \ + ((BASE) == TIM_DMABase_CCR1) || \ + ((BASE) == TIM_DMABase_CCR2) || \ + ((BASE) == TIM_DMABase_CCR3) || \ + ((BASE) == TIM_DMABase_CCR4) || \ + ((BASE) == TIM_DMABase_BDTR) || \ + ((BASE) == TIM_DMABase_DCR)) +/** + * @} + */ + +/** @defgroup TIM_DMA_Burst_Length + * @{ + */ + +#define TIM_DMABurstLength_1Transfer ((uint16_t)0x0000) +#define TIM_DMABurstLength_2Transfers ((uint16_t)0x0100) +#define TIM_DMABurstLength_3Transfers ((uint16_t)0x0200) +#define TIM_DMABurstLength_4Transfers ((uint16_t)0x0300) +#define TIM_DMABurstLength_5Transfers ((uint16_t)0x0400) +#define TIM_DMABurstLength_6Transfers ((uint16_t)0x0500) +#define TIM_DMABurstLength_7Transfers ((uint16_t)0x0600) +#define TIM_DMABurstLength_8Transfers ((uint16_t)0x0700) +#define TIM_DMABurstLength_9Transfers ((uint16_t)0x0800) +#define TIM_DMABurstLength_10Transfers ((uint16_t)0x0900) +#define TIM_DMABurstLength_11Transfers ((uint16_t)0x0A00) +#define TIM_DMABurstLength_12Transfers ((uint16_t)0x0B00) +#define TIM_DMABurstLength_13Transfers ((uint16_t)0x0C00) +#define TIM_DMABurstLength_14Transfers ((uint16_t)0x0D00) +#define TIM_DMABurstLength_15Transfers ((uint16_t)0x0E00) +#define TIM_DMABurstLength_16Transfers ((uint16_t)0x0F00) +#define TIM_DMABurstLength_17Transfers ((uint16_t)0x1000) +#define TIM_DMABurstLength_18Transfers ((uint16_t)0x1100) +#define IS_TIM_DMA_LENGTH(LENGTH) (((LENGTH) == TIM_DMABurstLength_1Transfer) || \ + ((LENGTH) == TIM_DMABurstLength_2Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_3Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_4Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_5Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_6Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_7Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_8Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_9Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_10Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_11Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_12Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_13Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_14Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_15Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_16Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_17Transfers) || \ + ((LENGTH) == TIM_DMABurstLength_18Transfers)) +/** + * @} + */ + +/** @defgroup TIM_DMA_sources + * @{ + */ + +#define TIM_DMA_Update ((uint16_t)0x0100) +#define TIM_DMA_CC1 ((uint16_t)0x0200) +#define TIM_DMA_CC2 ((uint16_t)0x0400) +#define TIM_DMA_CC3 ((uint16_t)0x0800) +#define TIM_DMA_CC4 ((uint16_t)0x1000) +#define TIM_DMA_COM ((uint16_t)0x2000) +#define TIM_DMA_Trigger ((uint16_t)0x4000) +#define IS_TIM_DMA_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0x80FF) == 0x0000) && ((SOURCE) != 0x0000)) + +/** + * @} + */ + +/** @defgroup TIM_External_Trigger_Prescaler + * @{ + */ + +#define TIM_ExtTRGPSC_OFF ((uint16_t)0x0000) +#define TIM_ExtTRGPSC_DIV2 ((uint16_t)0x1000) +#define TIM_ExtTRGPSC_DIV4 ((uint16_t)0x2000) +#define TIM_ExtTRGPSC_DIV8 ((uint16_t)0x3000) +#define IS_TIM_EXT_PRESCALER(PRESCALER) (((PRESCALER) == TIM_ExtTRGPSC_OFF) || \ + ((PRESCALER) == TIM_ExtTRGPSC_DIV2) || \ + ((PRESCALER) == TIM_ExtTRGPSC_DIV4) || \ + ((PRESCALER) == TIM_ExtTRGPSC_DIV8)) +/** + * @} + */ + +/** @defgroup TIM_Internal_Trigger_Selection + * @{ + */ + +#define TIM_TS_ITR0 ((uint16_t)0x0000) +#define TIM_TS_ITR1 ((uint16_t)0x0010) +#define TIM_TS_ITR2 ((uint16_t)0x0020) +#define TIM_TS_ITR3 ((uint16_t)0x0030) +#define TIM_TS_TI1F_ED ((uint16_t)0x0040) +#define TIM_TS_TI1FP1 ((uint16_t)0x0050) +#define TIM_TS_TI2FP2 ((uint16_t)0x0060) +#define TIM_TS_ETRF ((uint16_t)0x0070) +#define IS_TIM_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ + ((SELECTION) == TIM_TS_ITR1) || \ + ((SELECTION) == TIM_TS_ITR2) || \ + ((SELECTION) == TIM_TS_ITR3) || \ + ((SELECTION) == TIM_TS_TI1F_ED) || \ + ((SELECTION) == TIM_TS_TI1FP1) || \ + ((SELECTION) == TIM_TS_TI2FP2) || \ + ((SELECTION) == TIM_TS_ETRF)) +#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) || \ + ((SELECTION) == TIM_TS_ITR1) || \ + ((SELECTION) == TIM_TS_ITR2) || \ + ((SELECTION) == TIM_TS_ITR3)) +/** + * @} + */ + +/** @defgroup TIM_TIx_External_Clock_Source + * @{ + */ + +#define TIM_TIxExternalCLK1Source_TI1 ((uint16_t)0x0050) +#define TIM_TIxExternalCLK1Source_TI2 ((uint16_t)0x0060) +#define TIM_TIxExternalCLK1Source_TI1ED ((uint16_t)0x0040) +#define IS_TIM_TIXCLK_SOURCE(SOURCE) (((SOURCE) == TIM_TIxExternalCLK1Source_TI1) || \ + ((SOURCE) == TIM_TIxExternalCLK1Source_TI2) || \ + ((SOURCE) == TIM_TIxExternalCLK1Source_TI1ED)) +/** + * @} + */ + +/** @defgroup TIM_External_Trigger_Polarity + * @{ + */ +#define TIM_ExtTRGPolarity_Inverted ((uint16_t)0x8000) +#define TIM_ExtTRGPolarity_NonInverted ((uint16_t)0x0000) +#define IS_TIM_EXT_POLARITY(POLARITY) (((POLARITY) == TIM_ExtTRGPolarity_Inverted) || \ + ((POLARITY) == TIM_ExtTRGPolarity_NonInverted)) +/** + * @} + */ + +/** @defgroup TIM_Prescaler_Reload_Mode + * @{ + */ + +#define TIM_PSCReloadMode_Update ((uint16_t)0x0000) +#define TIM_PSCReloadMode_Immediate ((uint16_t)0x0001) +#define IS_TIM_PRESCALER_RELOAD(RELOAD) (((RELOAD) == TIM_PSCReloadMode_Update) || \ + ((RELOAD) == TIM_PSCReloadMode_Immediate)) +/** + * @} + */ + +/** @defgroup TIM_Forced_Action + * @{ + */ + +#define TIM_ForcedAction_Active ((uint16_t)0x0050) +#define TIM_ForcedAction_InActive ((uint16_t)0x0040) +#define IS_TIM_FORCED_ACTION(ACTION) (((ACTION) == TIM_ForcedAction_Active) || \ + ((ACTION) == TIM_ForcedAction_InActive)) +/** + * @} + */ + +/** @defgroup TIM_Encoder_Mode + * @{ + */ + +#define TIM_EncoderMode_TI1 ((uint16_t)0x0001) +#define TIM_EncoderMode_TI2 ((uint16_t)0x0002) +#define TIM_EncoderMode_TI12 ((uint16_t)0x0003) +#define IS_TIM_ENCODER_MODE(MODE) (((MODE) == TIM_EncoderMode_TI1) || \ + ((MODE) == TIM_EncoderMode_TI2) || \ + ((MODE) == TIM_EncoderMode_TI12)) +/** + * @} + */ + + +/** @defgroup TIM_Event_Source + * @{ + */ + +#define TIM_EventSource_Update ((uint16_t)0x0001) +#define TIM_EventSource_CC1 ((uint16_t)0x0002) +#define TIM_EventSource_CC2 ((uint16_t)0x0004) +#define TIM_EventSource_CC3 ((uint16_t)0x0008) +#define TIM_EventSource_CC4 ((uint16_t)0x0010) +#define TIM_EventSource_COM ((uint16_t)0x0020) +#define TIM_EventSource_Trigger ((uint16_t)0x0040) +#define TIM_EventSource_Break ((uint16_t)0x0080) +#define IS_TIM_EVENT_SOURCE(SOURCE) ((((SOURCE) & (uint16_t)0xFF00) == 0x0000) && ((SOURCE) != 0x0000)) + +/** + * @} + */ + +/** @defgroup TIM_Update_Source + * @{ + */ + +#define TIM_UpdateSource_Global ((uint16_t)0x0000) /*!< Source of update is the counter overflow/underflow + or the setting of UG bit, or an update generation + through the slave mode controller. */ +#define TIM_UpdateSource_Regular ((uint16_t)0x0001) /*!< Source of update is counter overflow/underflow. */ +#define IS_TIM_UPDATE_SOURCE(SOURCE) (((SOURCE) == TIM_UpdateSource_Global) || \ + ((SOURCE) == TIM_UpdateSource_Regular)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Preload_State + * @{ + */ + +#define TIM_OCPreload_Enable ((uint16_t)0x0008) +#define TIM_OCPreload_Disable ((uint16_t)0x0000) +#define IS_TIM_OCPRELOAD_STATE(STATE) (((STATE) == TIM_OCPreload_Enable) || \ + ((STATE) == TIM_OCPreload_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Fast_State + * @{ + */ + +#define TIM_OCFast_Enable ((uint16_t)0x0004) +#define TIM_OCFast_Disable ((uint16_t)0x0000) +#define IS_TIM_OCFAST_STATE(STATE) (((STATE) == TIM_OCFast_Enable) || \ + ((STATE) == TIM_OCFast_Disable)) + +/** + * @} + */ + +/** @defgroup TIM_Output_Compare_Clear_State + * @{ + */ + +#define TIM_OCClear_Enable ((uint16_t)0x0080) +#define TIM_OCClear_Disable ((uint16_t)0x0000) +#define IS_TIM_OCCLEAR_STATE(STATE) (((STATE) == TIM_OCClear_Enable) || \ + ((STATE) == TIM_OCClear_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Trigger_Output_Source + * @{ + */ + +#define TIM_TRGOSource_Reset ((uint16_t)0x0000) +#define TIM_TRGOSource_Enable ((uint16_t)0x0010) +#define TIM_TRGOSource_Update ((uint16_t)0x0020) +#define TIM_TRGOSource_OC1 ((uint16_t)0x0030) +#define TIM_TRGOSource_OC1Ref ((uint16_t)0x0040) +#define TIM_TRGOSource_OC2Ref ((uint16_t)0x0050) +#define TIM_TRGOSource_OC3Ref ((uint16_t)0x0060) +#define TIM_TRGOSource_OC4Ref ((uint16_t)0x0070) +#define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGOSource_Reset) || \ + ((SOURCE) == TIM_TRGOSource_Enable) || \ + ((SOURCE) == TIM_TRGOSource_Update) || \ + ((SOURCE) == TIM_TRGOSource_OC1) || \ + ((SOURCE) == TIM_TRGOSource_OC1Ref) || \ + ((SOURCE) == TIM_TRGOSource_OC2Ref) || \ + ((SOURCE) == TIM_TRGOSource_OC3Ref) || \ + ((SOURCE) == TIM_TRGOSource_OC4Ref)) +/** + * @} + */ + +/** @defgroup TIM_Slave_Mode + * @{ + */ + +#define TIM_SlaveMode_Reset ((uint16_t)0x0004) +#define TIM_SlaveMode_Gated ((uint16_t)0x0005) +#define TIM_SlaveMode_Trigger ((uint16_t)0x0006) +#define TIM_SlaveMode_External1 ((uint16_t)0x0007) +#define IS_TIM_SLAVE_MODE(MODE) (((MODE) == TIM_SlaveMode_Reset) || \ + ((MODE) == TIM_SlaveMode_Gated) || \ + ((MODE) == TIM_SlaveMode_Trigger) || \ + ((MODE) == TIM_SlaveMode_External1)) +/** + * @} + */ + +/** @defgroup TIM_Master_Slave_Mode + * @{ + */ + +#define TIM_MasterSlaveMode_Enable ((uint16_t)0x0080) +#define TIM_MasterSlaveMode_Disable ((uint16_t)0x0000) +#define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MasterSlaveMode_Enable) || \ + ((STATE) == TIM_MasterSlaveMode_Disable)) +/** + * @} + */ + +/** @defgroup TIM_Flags + * @{ + */ + +#define TIM_FLAG_Update ((uint16_t)0x0001) +#define TIM_FLAG_CC1 ((uint16_t)0x0002) +#define TIM_FLAG_CC2 ((uint16_t)0x0004) +#define TIM_FLAG_CC3 ((uint16_t)0x0008) +#define TIM_FLAG_CC4 ((uint16_t)0x0010) +#define TIM_FLAG_COM ((uint16_t)0x0020) +#define TIM_FLAG_Trigger ((uint16_t)0x0040) +#define TIM_FLAG_Break ((uint16_t)0x0080) +#define TIM_FLAG_CC1OF ((uint16_t)0x0200) +#define TIM_FLAG_CC2OF ((uint16_t)0x0400) +#define TIM_FLAG_CC3OF ((uint16_t)0x0800) +#define TIM_FLAG_CC4OF ((uint16_t)0x1000) +#define IS_TIM_GET_FLAG(FLAG) (((FLAG) == TIM_FLAG_Update) || \ + ((FLAG) == TIM_FLAG_CC1) || \ + ((FLAG) == TIM_FLAG_CC2) || \ + ((FLAG) == TIM_FLAG_CC3) || \ + ((FLAG) == TIM_FLAG_CC4) || \ + ((FLAG) == TIM_FLAG_COM) || \ + ((FLAG) == TIM_FLAG_Trigger) || \ + ((FLAG) == TIM_FLAG_Break) || \ + ((FLAG) == TIM_FLAG_CC1OF) || \ + ((FLAG) == TIM_FLAG_CC2OF) || \ + ((FLAG) == TIM_FLAG_CC3OF) || \ + ((FLAG) == TIM_FLAG_CC4OF)) + + +#define IS_TIM_CLEAR_FLAG(TIM_FLAG) ((((TIM_FLAG) & (uint16_t)0xE100) == 0x0000) && ((TIM_FLAG) != 0x0000)) +/** + * @} + */ + +/** @defgroup TIM_Input_Capture_Filer_Value + * @{ + */ + +#define IS_TIM_IC_FILTER(ICFILTER) ((ICFILTER) <= 0xF) +/** + * @} + */ + +/** @defgroup TIM_External_Trigger_Filter + * @{ + */ + +#define IS_TIM_EXT_FILTER(EXTFILTER) ((EXTFILTER) <= 0xF) +/** + * @} + */ + +/** @defgroup TIM_Legacy + * @{ + */ + +#define TIM_DMABurstLength_1Byte TIM_DMABurstLength_1Transfer +#define TIM_DMABurstLength_2Bytes TIM_DMABurstLength_2Transfers +#define TIM_DMABurstLength_3Bytes TIM_DMABurstLength_3Transfers +#define TIM_DMABurstLength_4Bytes TIM_DMABurstLength_4Transfers +#define TIM_DMABurstLength_5Bytes TIM_DMABurstLength_5Transfers +#define TIM_DMABurstLength_6Bytes TIM_DMABurstLength_6Transfers +#define TIM_DMABurstLength_7Bytes TIM_DMABurstLength_7Transfers +#define TIM_DMABurstLength_8Bytes TIM_DMABurstLength_8Transfers +#define TIM_DMABurstLength_9Bytes TIM_DMABurstLength_9Transfers +#define TIM_DMABurstLength_10Bytes TIM_DMABurstLength_10Transfers +#define TIM_DMABurstLength_11Bytes TIM_DMABurstLength_11Transfers +#define TIM_DMABurstLength_12Bytes TIM_DMABurstLength_12Transfers +#define TIM_DMABurstLength_13Bytes TIM_DMABurstLength_13Transfers +#define TIM_DMABurstLength_14Bytes TIM_DMABurstLength_14Transfers +#define TIM_DMABurstLength_15Bytes TIM_DMABurstLength_15Transfers +#define TIM_DMABurstLength_16Bytes TIM_DMABurstLength_16Transfers +#define TIM_DMABurstLength_17Bytes TIM_DMABurstLength_17Transfers +#define TIM_DMABurstLength_18Bytes TIM_DMABurstLength_18Transfers +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup TIM_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Exported_Functions + * @{ + */ + +void TIM_DeInit(TIM_TypeDef* TIMx); +void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); +void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct); +void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct); +void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct); +void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct); +void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct); +void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState); +void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource); +void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength); +void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState); +void TIM_InternalClockConfig(TIM_TypeDef* TIMx); +void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); +void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, + uint16_t TIM_ICPolarity, uint16_t ICFilter); +void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter); +void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, + uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter); +void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter); +void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode); +void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode); +void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource); +void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, + uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity); +void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction); +void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload); +void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast); +void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear); +void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity); +void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity); +void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx); +void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN); +void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode); +void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource); +void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState); +void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode); +void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource); +void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode); +void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode); +void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter); +void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload); +void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1); +void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2); +void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3); +void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4); +void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC); +void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD); +uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx); +uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx); +uint16_t TIM_GetCounter(TIM_TypeDef* TIMx); +uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx); +FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); +void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG); +ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT); +void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT); + +#ifdef __cplusplus +} +#endif + +#endif /*__STM32F10x_TIM_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h index 162fa87c..61ae249a 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_usart.h @@ -1,412 +1,412 @@ -/** - ****************************************************************************** - * @file stm32f10x_usart.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the USART - * firmware library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_USART_H -#define __STM32F10x_USART_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup USART - * @{ - */ - -/** @defgroup USART_Exported_Types - * @{ - */ - -/** - * @brief USART Init Structure definition - */ - -typedef struct -{ - uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate. - The baud rate is computed using the following formula: - - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate))) - - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */ - - uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref USART_Word_Length */ - - uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref USART_Stop_Bits */ - - uint16_t USART_Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref USART_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref USART_Mode */ - - uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled - or disabled. - This parameter can be a value of @ref USART_Hardware_Flow_Control */ -} USART_InitTypeDef; - -/** - * @brief USART Clock Init Structure definition - */ - -typedef struct -{ - - uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled. - This parameter can be a value of @ref USART_Clock */ - - uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock. - This parameter can be a value of @ref USART_Clock_Polarity */ - - uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref USART_Clock_Phase */ - - uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted - data bit (MSB) has to be output on the SCLK pin in synchronous mode. - This parameter can be a value of @ref USART_Last_Bit */ -} USART_ClockInitTypeDef; - -/** - * @} - */ - -/** @defgroup USART_Exported_Constants - * @{ - */ - -#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \ - ((PERIPH) == USART2) || \ - ((PERIPH) == USART3) || \ - ((PERIPH) == UART4) || \ - ((PERIPH) == UART5)) - -#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \ - ((PERIPH) == USART2) || \ - ((PERIPH) == USART3)) - -#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \ - ((PERIPH) == USART2) || \ - ((PERIPH) == USART3) || \ - ((PERIPH) == UART4)) -/** @defgroup USART_Word_Length - * @{ - */ - -#define USART_WordLength_8b ((uint16_t)0x0000) -#define USART_WordLength_9b ((uint16_t)0x1000) - -#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \ - ((LENGTH) == USART_WordLength_9b)) -/** - * @} - */ - -/** @defgroup USART_Stop_Bits - * @{ - */ - -#define USART_StopBits_1 ((uint16_t)0x0000) -#define USART_StopBits_0_5 ((uint16_t)0x1000) -#define USART_StopBits_2 ((uint16_t)0x2000) -#define USART_StopBits_1_5 ((uint16_t)0x3000) -#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \ - ((STOPBITS) == USART_StopBits_0_5) || \ - ((STOPBITS) == USART_StopBits_2) || \ - ((STOPBITS) == USART_StopBits_1_5)) -/** - * @} - */ - -/** @defgroup USART_Parity - * @{ - */ - -#define USART_Parity_No ((uint16_t)0x0000) -#define USART_Parity_Even ((uint16_t)0x0400) -#define USART_Parity_Odd ((uint16_t)0x0600) -#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \ - ((PARITY) == USART_Parity_Even) || \ - ((PARITY) == USART_Parity_Odd)) -/** - * @} - */ - -/** @defgroup USART_Mode - * @{ - */ - -#define USART_Mode_Rx ((uint16_t)0x0004) -#define USART_Mode_Tx ((uint16_t)0x0008) -#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00)) -/** - * @} - */ - -/** @defgroup USART_Hardware_Flow_Control - * @{ - */ -#define USART_HardwareFlowControl_None ((uint16_t)0x0000) -#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100) -#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200) -#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300) -#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\ - (((CONTROL) == USART_HardwareFlowControl_None) || \ - ((CONTROL) == USART_HardwareFlowControl_RTS) || \ - ((CONTROL) == USART_HardwareFlowControl_CTS) || \ - ((CONTROL) == USART_HardwareFlowControl_RTS_CTS)) -/** - * @} - */ - -/** @defgroup USART_Clock - * @{ - */ -#define USART_Clock_Disable ((uint16_t)0x0000) -#define USART_Clock_Enable ((uint16_t)0x0800) -#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \ - ((CLOCK) == USART_Clock_Enable)) -/** - * @} - */ - -/** @defgroup USART_Clock_Polarity - * @{ - */ - -#define USART_CPOL_Low ((uint16_t)0x0000) -#define USART_CPOL_High ((uint16_t)0x0400) -#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High)) - -/** - * @} - */ - -/** @defgroup USART_Clock_Phase - * @{ - */ - -#define USART_CPHA_1Edge ((uint16_t)0x0000) -#define USART_CPHA_2Edge ((uint16_t)0x0200) -#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge)) - -/** - * @} - */ - -/** @defgroup USART_Last_Bit - * @{ - */ - -#define USART_LastBit_Disable ((uint16_t)0x0000) -#define USART_LastBit_Enable ((uint16_t)0x0100) -#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \ - ((LASTBIT) == USART_LastBit_Enable)) -/** - * @} - */ - -/** @defgroup USART_Interrupt_definition - * @{ - */ - -#define USART_IT_PE ((uint16_t)0x0028) -#define USART_IT_TXE ((uint16_t)0x0727) -#define USART_IT_TC ((uint16_t)0x0626) -#define USART_IT_RXNE ((uint16_t)0x0525) -#define USART_IT_IDLE ((uint16_t)0x0424) -#define USART_IT_LBD ((uint16_t)0x0846) -#define USART_IT_CTS ((uint16_t)0x096A) -#define USART_IT_ERR ((uint16_t)0x0060) -#define USART_IT_ORE ((uint16_t)0x0360) -#define USART_IT_NE ((uint16_t)0x0260) -#define USART_IT_FE ((uint16_t)0x0160) -#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ - ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ - ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ - ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR)) -#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ - ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ - ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ - ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \ - ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE)) -#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ - ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS)) -/** - * @} - */ - -/** @defgroup USART_DMA_Requests - * @{ - */ - -#define USART_DMAReq_Tx ((uint16_t)0x0080) -#define USART_DMAReq_Rx ((uint16_t)0x0040) -#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00)) - -/** - * @} - */ - -/** @defgroup USART_WakeUp_methods - * @{ - */ - -#define USART_WakeUp_IdleLine ((uint16_t)0x0000) -#define USART_WakeUp_AddressMark ((uint16_t)0x0800) -#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \ - ((WAKEUP) == USART_WakeUp_AddressMark)) -/** - * @} - */ - -/** @defgroup USART_LIN_Break_Detection_Length - * @{ - */ - -#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000) -#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020) -#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \ - (((LENGTH) == USART_LINBreakDetectLength_10b) || \ - ((LENGTH) == USART_LINBreakDetectLength_11b)) -/** - * @} - */ - -/** @defgroup USART_IrDA_Low_Power - * @{ - */ - -#define USART_IrDAMode_LowPower ((uint16_t)0x0004) -#define USART_IrDAMode_Normal ((uint16_t)0x0000) -#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \ - ((MODE) == USART_IrDAMode_Normal)) -/** - * @} - */ - -/** @defgroup USART_Flags - * @{ - */ - -#define USART_FLAG_CTS ((uint16_t)0x0200) -#define USART_FLAG_LBD ((uint16_t)0x0100) -#define USART_FLAG_TXE ((uint16_t)0x0080) -#define USART_FLAG_TC ((uint16_t)0x0040) -#define USART_FLAG_RXNE ((uint16_t)0x0020) -#define USART_FLAG_IDLE ((uint16_t)0x0010) -#define USART_FLAG_ORE ((uint16_t)0x0008) -#define USART_FLAG_NE ((uint16_t)0x0004) -#define USART_FLAG_FE ((uint16_t)0x0002) -#define USART_FLAG_PE ((uint16_t)0x0001) -#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \ - ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \ - ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \ - ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \ - ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE)) - -#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00)) -#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\ - ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \ - || ((USART_FLAG) != USART_FLAG_CTS)) -#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21)) -#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF) -#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup USART_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Exported_Functions - * @{ - */ - -void USART_DeInit(USART_TypeDef* USARTx); -void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct); -void USART_StructInit(USART_InitTypeDef* USART_InitStruct); -void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct); -void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct); -void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState); -void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState); -void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address); -void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp); -void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength); -void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); -uint16_t USART_ReceiveData(USART_TypeDef* USARTx); -void USART_SendBreak(USART_TypeDef* USARTx); -void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime); -void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler); -void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState); -void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode); -void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState); -FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG); -void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG); -ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT); -void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_USART_H */ -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_usart.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the USART + * firmware library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_USART_H +#define __STM32F10x_USART_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup USART + * @{ + */ + +/** @defgroup USART_Exported_Types + * @{ + */ + +/** + * @brief USART Init Structure definition + */ + +typedef struct +{ + uint32_t USART_BaudRate; /*!< This member configures the USART communication baud rate. + The baud rate is computed using the following formula: + - IntegerDivider = ((PCLKx) / (16 * (USART_InitStruct->USART_BaudRate))) + - FractionalDivider = ((IntegerDivider - ((u32) IntegerDivider)) * 16) + 0.5 */ + + uint16_t USART_WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. + This parameter can be a value of @ref USART_Word_Length */ + + uint16_t USART_StopBits; /*!< Specifies the number of stop bits transmitted. + This parameter can be a value of @ref USART_Stop_Bits */ + + uint16_t USART_Parity; /*!< Specifies the parity mode. + This parameter can be a value of @ref USART_Parity + @note When parity is enabled, the computed parity is inserted + at the MSB position of the transmitted data (9th bit when + the word length is set to 9 data bits; 8th bit when the + word length is set to 8 data bits). */ + + uint16_t USART_Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. + This parameter can be a value of @ref USART_Mode */ + + uint16_t USART_HardwareFlowControl; /*!< Specifies wether the hardware flow control mode is enabled + or disabled. + This parameter can be a value of @ref USART_Hardware_Flow_Control */ +} USART_InitTypeDef; + +/** + * @brief USART Clock Init Structure definition + */ + +typedef struct +{ + + uint16_t USART_Clock; /*!< Specifies whether the USART clock is enabled or disabled. + This parameter can be a value of @ref USART_Clock */ + + uint16_t USART_CPOL; /*!< Specifies the steady state value of the serial clock. + This parameter can be a value of @ref USART_Clock_Polarity */ + + uint16_t USART_CPHA; /*!< Specifies the clock transition on which the bit capture is made. + This parameter can be a value of @ref USART_Clock_Phase */ + + uint16_t USART_LastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted + data bit (MSB) has to be output on the SCLK pin in synchronous mode. + This parameter can be a value of @ref USART_Last_Bit */ +} USART_ClockInitTypeDef; + +/** + * @} + */ + +/** @defgroup USART_Exported_Constants + * @{ + */ + +#define IS_USART_ALL_PERIPH(PERIPH) (((PERIPH) == USART1) || \ + ((PERIPH) == USART2) || \ + ((PERIPH) == USART3) || \ + ((PERIPH) == UART4) || \ + ((PERIPH) == UART5)) + +#define IS_USART_123_PERIPH(PERIPH) (((PERIPH) == USART1) || \ + ((PERIPH) == USART2) || \ + ((PERIPH) == USART3)) + +#define IS_USART_1234_PERIPH(PERIPH) (((PERIPH) == USART1) || \ + ((PERIPH) == USART2) || \ + ((PERIPH) == USART3) || \ + ((PERIPH) == UART4)) +/** @defgroup USART_Word_Length + * @{ + */ + +#define USART_WordLength_8b ((uint16_t)0x0000) +#define USART_WordLength_9b ((uint16_t)0x1000) + +#define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WordLength_8b) || \ + ((LENGTH) == USART_WordLength_9b)) +/** + * @} + */ + +/** @defgroup USART_Stop_Bits + * @{ + */ + +#define USART_StopBits_1 ((uint16_t)0x0000) +#define USART_StopBits_0_5 ((uint16_t)0x1000) +#define USART_StopBits_2 ((uint16_t)0x2000) +#define USART_StopBits_1_5 ((uint16_t)0x3000) +#define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_StopBits_1) || \ + ((STOPBITS) == USART_StopBits_0_5) || \ + ((STOPBITS) == USART_StopBits_2) || \ + ((STOPBITS) == USART_StopBits_1_5)) +/** + * @} + */ + +/** @defgroup USART_Parity + * @{ + */ + +#define USART_Parity_No ((uint16_t)0x0000) +#define USART_Parity_Even ((uint16_t)0x0400) +#define USART_Parity_Odd ((uint16_t)0x0600) +#define IS_USART_PARITY(PARITY) (((PARITY) == USART_Parity_No) || \ + ((PARITY) == USART_Parity_Even) || \ + ((PARITY) == USART_Parity_Odd)) +/** + * @} + */ + +/** @defgroup USART_Mode + * @{ + */ + +#define USART_Mode_Rx ((uint16_t)0x0004) +#define USART_Mode_Tx ((uint16_t)0x0008) +#define IS_USART_MODE(MODE) ((((MODE) & (uint16_t)0xFFF3) == 0x00) && ((MODE) != (uint16_t)0x00)) +/** + * @} + */ + +/** @defgroup USART_Hardware_Flow_Control + * @{ + */ +#define USART_HardwareFlowControl_None ((uint16_t)0x0000) +#define USART_HardwareFlowControl_RTS ((uint16_t)0x0100) +#define USART_HardwareFlowControl_CTS ((uint16_t)0x0200) +#define USART_HardwareFlowControl_RTS_CTS ((uint16_t)0x0300) +#define IS_USART_HARDWARE_FLOW_CONTROL(CONTROL)\ + (((CONTROL) == USART_HardwareFlowControl_None) || \ + ((CONTROL) == USART_HardwareFlowControl_RTS) || \ + ((CONTROL) == USART_HardwareFlowControl_CTS) || \ + ((CONTROL) == USART_HardwareFlowControl_RTS_CTS)) +/** + * @} + */ + +/** @defgroup USART_Clock + * @{ + */ +#define USART_Clock_Disable ((uint16_t)0x0000) +#define USART_Clock_Enable ((uint16_t)0x0800) +#define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_Clock_Disable) || \ + ((CLOCK) == USART_Clock_Enable)) +/** + * @} + */ + +/** @defgroup USART_Clock_Polarity + * @{ + */ + +#define USART_CPOL_Low ((uint16_t)0x0000) +#define USART_CPOL_High ((uint16_t)0x0400) +#define IS_USART_CPOL(CPOL) (((CPOL) == USART_CPOL_Low) || ((CPOL) == USART_CPOL_High)) + +/** + * @} + */ + +/** @defgroup USART_Clock_Phase + * @{ + */ + +#define USART_CPHA_1Edge ((uint16_t)0x0000) +#define USART_CPHA_2Edge ((uint16_t)0x0200) +#define IS_USART_CPHA(CPHA) (((CPHA) == USART_CPHA_1Edge) || ((CPHA) == USART_CPHA_2Edge)) + +/** + * @} + */ + +/** @defgroup USART_Last_Bit + * @{ + */ + +#define USART_LastBit_Disable ((uint16_t)0x0000) +#define USART_LastBit_Enable ((uint16_t)0x0100) +#define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LastBit_Disable) || \ + ((LASTBIT) == USART_LastBit_Enable)) +/** + * @} + */ + +/** @defgroup USART_Interrupt_definition + * @{ + */ + +#define USART_IT_PE ((uint16_t)0x0028) +#define USART_IT_TXE ((uint16_t)0x0727) +#define USART_IT_TC ((uint16_t)0x0626) +#define USART_IT_RXNE ((uint16_t)0x0525) +#define USART_IT_IDLE ((uint16_t)0x0424) +#define USART_IT_LBD ((uint16_t)0x0846) +#define USART_IT_CTS ((uint16_t)0x096A) +#define USART_IT_ERR ((uint16_t)0x0060) +#define USART_IT_ORE ((uint16_t)0x0360) +#define USART_IT_NE ((uint16_t)0x0260) +#define USART_IT_FE ((uint16_t)0x0160) +#define IS_USART_CONFIG_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ + ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ + ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ + ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ERR)) +#define IS_USART_GET_IT(IT) (((IT) == USART_IT_PE) || ((IT) == USART_IT_TXE) || \ + ((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ + ((IT) == USART_IT_IDLE) || ((IT) == USART_IT_LBD) || \ + ((IT) == USART_IT_CTS) || ((IT) == USART_IT_ORE) || \ + ((IT) == USART_IT_NE) || ((IT) == USART_IT_FE)) +#define IS_USART_CLEAR_IT(IT) (((IT) == USART_IT_TC) || ((IT) == USART_IT_RXNE) || \ + ((IT) == USART_IT_LBD) || ((IT) == USART_IT_CTS)) +/** + * @} + */ + +/** @defgroup USART_DMA_Requests + * @{ + */ + +#define USART_DMAReq_Tx ((uint16_t)0x0080) +#define USART_DMAReq_Rx ((uint16_t)0x0040) +#define IS_USART_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFF3F) == 0x00) && ((DMAREQ) != (uint16_t)0x00)) + +/** + * @} + */ + +/** @defgroup USART_WakeUp_methods + * @{ + */ + +#define USART_WakeUp_IdleLine ((uint16_t)0x0000) +#define USART_WakeUp_AddressMark ((uint16_t)0x0800) +#define IS_USART_WAKEUP(WAKEUP) (((WAKEUP) == USART_WakeUp_IdleLine) || \ + ((WAKEUP) == USART_WakeUp_AddressMark)) +/** + * @} + */ + +/** @defgroup USART_LIN_Break_Detection_Length + * @{ + */ + +#define USART_LINBreakDetectLength_10b ((uint16_t)0x0000) +#define USART_LINBreakDetectLength_11b ((uint16_t)0x0020) +#define IS_USART_LIN_BREAK_DETECT_LENGTH(LENGTH) \ + (((LENGTH) == USART_LINBreakDetectLength_10b) || \ + ((LENGTH) == USART_LINBreakDetectLength_11b)) +/** + * @} + */ + +/** @defgroup USART_IrDA_Low_Power + * @{ + */ + +#define USART_IrDAMode_LowPower ((uint16_t)0x0004) +#define USART_IrDAMode_Normal ((uint16_t)0x0000) +#define IS_USART_IRDA_MODE(MODE) (((MODE) == USART_IrDAMode_LowPower) || \ + ((MODE) == USART_IrDAMode_Normal)) +/** + * @} + */ + +/** @defgroup USART_Flags + * @{ + */ + +#define USART_FLAG_CTS ((uint16_t)0x0200) +#define USART_FLAG_LBD ((uint16_t)0x0100) +#define USART_FLAG_TXE ((uint16_t)0x0080) +#define USART_FLAG_TC ((uint16_t)0x0040) +#define USART_FLAG_RXNE ((uint16_t)0x0020) +#define USART_FLAG_IDLE ((uint16_t)0x0010) +#define USART_FLAG_ORE ((uint16_t)0x0008) +#define USART_FLAG_NE ((uint16_t)0x0004) +#define USART_FLAG_FE ((uint16_t)0x0002) +#define USART_FLAG_PE ((uint16_t)0x0001) +#define IS_USART_FLAG(FLAG) (((FLAG) == USART_FLAG_PE) || ((FLAG) == USART_FLAG_TXE) || \ + ((FLAG) == USART_FLAG_TC) || ((FLAG) == USART_FLAG_RXNE) || \ + ((FLAG) == USART_FLAG_IDLE) || ((FLAG) == USART_FLAG_LBD) || \ + ((FLAG) == USART_FLAG_CTS) || ((FLAG) == USART_FLAG_ORE) || \ + ((FLAG) == USART_FLAG_NE) || ((FLAG) == USART_FLAG_FE)) + +#define IS_USART_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0xFC9F) == 0x00) && ((FLAG) != (uint16_t)0x00)) +#define IS_USART_PERIPH_FLAG(PERIPH, USART_FLAG) ((((*(uint32_t*)&(PERIPH)) != UART4_BASE) &&\ + ((*(uint32_t*)&(PERIPH)) != UART5_BASE)) \ + || ((USART_FLAG) != USART_FLAG_CTS)) +#define IS_USART_BAUDRATE(BAUDRATE) (((BAUDRATE) > 0) && ((BAUDRATE) < 0x0044AA21)) +#define IS_USART_ADDRESS(ADDRESS) ((ADDRESS) <= 0xF) +#define IS_USART_DATA(DATA) ((DATA) <= 0x1FF) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup USART_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Exported_Functions + * @{ + */ + +void USART_DeInit(USART_TypeDef* USARTx); +void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct); +void USART_StructInit(USART_InitTypeDef* USART_InitStruct); +void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct); +void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct); +void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState); +void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState); +void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address); +void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp); +void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength); +void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_SendData(USART_TypeDef* USARTx, uint16_t Data); +uint16_t USART_ReceiveData(USART_TypeDef* USARTx); +void USART_SendBreak(USART_TypeDef* USARTx); +void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime); +void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler); +void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState); +void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode); +void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState); +FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG); +void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG); +ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT); +void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_USART_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h index bdfa177b..cd573da4 100644 --- a/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h +++ b/firmware/stm32-esp/libraries/fwlib/inc/stm32f10x_wwdg.h @@ -1,115 +1,115 @@ -/** - ****************************************************************************** - * @file stm32f10x_wwdg.h - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file contains all the functions prototypes for the WWDG firmware - * library. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_WWDG_H -#define __STM32F10x_WWDG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @addtogroup WWDG - * @{ - */ - -/** @defgroup WWDG_Exported_Types - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Exported_Constants - * @{ - */ - -/** @defgroup WWDG_Prescaler - * @{ - */ - -#define WWDG_Prescaler_1 ((uint32_t)0x00000000) -#define WWDG_Prescaler_2 ((uint32_t)0x00000080) -#define WWDG_Prescaler_4 ((uint32_t)0x00000100) -#define WWDG_Prescaler_8 ((uint32_t)0x00000180) -#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ - ((PRESCALER) == WWDG_Prescaler_2) || \ - ((PRESCALER) == WWDG_Prescaler_4) || \ - ((PRESCALER) == WWDG_Prescaler_8)) -#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) -#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup WWDG_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup WWDG_Exported_Functions - * @{ - */ - -void WWDG_DeInit(void); -void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); -void WWDG_SetWindowValue(uint8_t WindowValue); -void WWDG_EnableIT(void); -void WWDG_SetCounter(uint8_t Counter); -void WWDG_Enable(uint8_t Counter); -FlagStatus WWDG_GetFlagStatus(void); -void WWDG_ClearFlag(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_WWDG_H */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_wwdg.h + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file contains all the functions prototypes for the WWDG firmware + * library. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_WWDG_H +#define __STM32F10x_WWDG_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @addtogroup WWDG + * @{ + */ + +/** @defgroup WWDG_Exported_Types + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Exported_Constants + * @{ + */ + +/** @defgroup WWDG_Prescaler + * @{ + */ + +#define WWDG_Prescaler_1 ((uint32_t)0x00000000) +#define WWDG_Prescaler_2 ((uint32_t)0x00000080) +#define WWDG_Prescaler_4 ((uint32_t)0x00000100) +#define WWDG_Prescaler_8 ((uint32_t)0x00000180) +#define IS_WWDG_PRESCALER(PRESCALER) (((PRESCALER) == WWDG_Prescaler_1) || \ + ((PRESCALER) == WWDG_Prescaler_2) || \ + ((PRESCALER) == WWDG_Prescaler_4) || \ + ((PRESCALER) == WWDG_Prescaler_8)) +#define IS_WWDG_WINDOW_VALUE(VALUE) ((VALUE) <= 0x7F) +#define IS_WWDG_COUNTER(COUNTER) (((COUNTER) >= 0x40) && ((COUNTER) <= 0x7F)) + +/** + * @} + */ + +/** + * @} + */ + +/** @defgroup WWDG_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup WWDG_Exported_Functions + * @{ + */ + +void WWDG_DeInit(void); +void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); +void WWDG_SetWindowValue(uint8_t WindowValue); +void WWDG_EnableIT(void); +void WWDG_SetCounter(uint8_t Counter); +void WWDG_Enable(uint8_t Counter); +FlagStatus WWDG_GetFlagStatus(void); +void WWDG_ClearFlag(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_WWDG_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/misc.c b/firmware/stm32-esp/libraries/fwlib/src/misc.c index c0a5e113..ec9165f7 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/misc.c +++ b/firmware/stm32-esp/libraries/fwlib/src/misc.c @@ -1,225 +1,225 @@ -/** - ****************************************************************************** - * @file misc.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the miscellaneous firmware functions (add-on - * to CMSIS functions). - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "misc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup MISC - * @brief MISC driver modules - * @{ - */ - -/** @defgroup MISC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_Defines - * @{ - */ - -#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) -/** - * @} - */ - -/** @defgroup MISC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup MISC_Private_Functions - * @{ - */ - -/** - * @brief Configures the priority grouping: pre-emption priority and subpriority. - * @param NVIC_PriorityGroup: specifies the priority grouping bits length. - * This parameter can be one of the following values: - * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority - * 4 bits for subpriority - * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority - * 3 bits for subpriority - * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority - * 2 bits for subpriority - * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority - * 1 bits for subpriority - * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority - * 0 bits for subpriority - * @retval None - */ -void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) -{ - /* Check the parameters */ - assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); - - /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ - SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; -} - -/** - * @brief Initializes the NVIC peripheral according to the specified - * parameters in the NVIC_InitStruct. - * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains - * the configuration information for the specified NVIC peripheral. - * @retval None - */ -void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) -{ - uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; - - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); - assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); - assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); - - if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) - { - /* Compute the Corresponding IRQ Priority --------------------------------*/ - tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; - tmppre = (0x4 - tmppriority); - tmpsub = tmpsub >> tmppriority; - - tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; - tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; - tmppriority = tmppriority << 0x04; - - NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; - - /* Enable the Selected IRQ Channels --------------------------------------*/ - NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = - (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); - } - else - { - /* Disable the Selected IRQ Channels -------------------------------------*/ - NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = - (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); - } -} - -/** - * @brief Sets the vector table location and Offset. - * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. - * This parameter can be one of the following values: - * @arg NVIC_VectTab_RAM - * @arg NVIC_VectTab_FLASH - * @param Offset: Vector Table base offset field. This value must be a multiple - * of 0x200. - * @retval None - */ -void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) -{ - /* Check the parameters */ - assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); - assert_param(IS_NVIC_OFFSET(Offset)); - - SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); -} - -/** - * @brief Selects the condition for the system to enter low power mode. - * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. - * This parameter can be one of the following values: - * @arg NVIC_LP_SEVONPEND - * @arg NVIC_LP_SLEEPDEEP - * @arg NVIC_LP_SLEEPONEXIT - * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_NVIC_LP(LowPowerMode)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - SCB->SCR |= LowPowerMode; - } - else - { - SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); - } -} - -/** - * @brief Configures the SysTick clock source. - * @param SysTick_CLKSource: specifies the SysTick clock source. - * This parameter can be one of the following values: - * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. - * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. - * @retval None - */ -void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) -{ - /* Check the parameters */ - assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); - if (SysTick_CLKSource == SysTick_CLKSource_HCLK) - { - SysTick->CTRL |= SysTick_CLKSource_HCLK; - } - else - { - SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file misc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the miscellaneous firmware functions (add-on + * to CMSIS functions). + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "misc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup MISC + * @brief MISC driver modules + * @{ + */ + +/** @defgroup MISC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_Defines + * @{ + */ + +#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) +/** + * @} + */ + +/** @defgroup MISC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup MISC_Private_Functions + * @{ + */ + +/** + * @brief Configures the priority grouping: pre-emption priority and subpriority. + * @param NVIC_PriorityGroup: specifies the priority grouping bits length. + * This parameter can be one of the following values: + * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority + * 4 bits for subpriority + * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority + * 3 bits for subpriority + * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority + * 2 bits for subpriority + * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority + * 1 bits for subpriority + * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority + * 0 bits for subpriority + * @retval None + */ +void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) +{ + /* Check the parameters */ + assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); + + /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */ + SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; +} + +/** + * @brief Initializes the NVIC peripheral according to the specified + * parameters in the NVIC_InitStruct. + * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains + * the configuration information for the specified NVIC peripheral. + * @retval None + */ +void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct) +{ + uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; + + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); + assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); + assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); + + if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE) + { + /* Compute the Corresponding IRQ Priority --------------------------------*/ + tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; + tmppre = (0x4 - tmppriority); + tmpsub = tmpsub >> tmppriority; + + tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; + tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub; + tmppriority = tmppriority << 0x04; + + NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; + + /* Enable the Selected IRQ Channels --------------------------------------*/ + NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = + (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); + } + else + { + /* Disable the Selected IRQ Channels -------------------------------------*/ + NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] = + (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); + } +} + +/** + * @brief Sets the vector table location and Offset. + * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory. + * This parameter can be one of the following values: + * @arg NVIC_VectTab_RAM + * @arg NVIC_VectTab_FLASH + * @param Offset: Vector Table base offset field. This value must be a multiple + * of 0x200. + * @retval None + */ +void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset) +{ + /* Check the parameters */ + assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); + assert_param(IS_NVIC_OFFSET(Offset)); + + SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80); +} + +/** + * @brief Selects the condition for the system to enter low power mode. + * @param LowPowerMode: Specifies the new mode for the system to enter low power mode. + * This parameter can be one of the following values: + * @arg NVIC_LP_SEVONPEND + * @arg NVIC_LP_SLEEPDEEP + * @arg NVIC_LP_SLEEPONEXIT + * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_NVIC_LP(LowPowerMode)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + SCB->SCR |= LowPowerMode; + } + else + { + SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); + } +} + +/** + * @brief Configures the SysTick clock source. + * @param SysTick_CLKSource: specifies the SysTick clock source. + * This parameter can be one of the following values: + * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source. + * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source. + * @retval None + */ +void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource) +{ + /* Check the parameters */ + assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); + if (SysTick_CLKSource == SysTick_CLKSource_HCLK) + { + SysTick->CTRL |= SysTick_CLKSource_HCLK; + } + else + { + SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c index 8155dc9b..916a096d 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_adc.c @@ -1,1307 +1,1307 @@ -/** - ****************************************************************************** - * @file stm32f10x_adc.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the ADC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_adc.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup ADC - * @brief ADC driver modules - * @{ - */ - -/** @defgroup ADC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_Defines - * @{ - */ - -/* ADC DISCNUM mask */ -#define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) - -/* ADC DISCEN mask */ -#define CR1_DISCEN_Set ((uint32_t)0x00000800) -#define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) - -/* ADC JAUTO mask */ -#define CR1_JAUTO_Set ((uint32_t)0x00000400) -#define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) - -/* ADC JDISCEN mask */ -#define CR1_JDISCEN_Set ((uint32_t)0x00001000) -#define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) - -/* ADC AWDCH mask */ -#define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) - -/* ADC Analog watchdog enable mode mask */ -#define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) - -/* CR1 register Mask */ -#define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) - -/* ADC ADON mask */ -#define CR2_ADON_Set ((uint32_t)0x00000001) -#define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE) - -/* ADC DMA mask */ -#define CR2_DMA_Set ((uint32_t)0x00000100) -#define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF) - -/* ADC RSTCAL mask */ -#define CR2_RSTCAL_Set ((uint32_t)0x00000008) - -/* ADC CAL mask */ -#define CR2_CAL_Set ((uint32_t)0x00000004) - -/* ADC SWSTART mask */ -#define CR2_SWSTART_Set ((uint32_t)0x00400000) - -/* ADC EXTTRIG mask */ -#define CR2_EXTTRIG_Set ((uint32_t)0x00100000) -#define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) - -/* ADC Software start mask */ -#define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) -#define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) - -/* ADC JEXTSEL mask */ -#define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) - -/* ADC JEXTTRIG mask */ -#define CR2_JEXTTRIG_Set ((uint32_t)0x00008000) -#define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) - -/* ADC JSWSTART mask */ -#define CR2_JSWSTART_Set ((uint32_t)0x00200000) - -/* ADC injected software start mask */ -#define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) -#define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) - -/* ADC TSPD mask */ -#define CR2_TSVREFE_Set ((uint32_t)0x00800000) -#define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) - -/* CR2 register Mask */ -#define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) - -/* ADC SQx mask */ -#define SQR3_SQ_Set ((uint32_t)0x0000001F) -#define SQR2_SQ_Set ((uint32_t)0x0000001F) -#define SQR1_SQ_Set ((uint32_t)0x0000001F) - -/* SQR1 register Mask */ -#define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) - -/* ADC JSQx mask */ -#define JSQR_JSQ_Set ((uint32_t)0x0000001F) - -/* ADC JL mask */ -#define JSQR_JL_Set ((uint32_t)0x00300000) -#define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF) - -/* ADC SMPx mask */ -#define SMPR1_SMP_Set ((uint32_t)0x00000007) -#define SMPR2_SMP_Set ((uint32_t)0x00000007) - -/* ADC JDRx registers offset */ -#define JDR_Offset ((uint8_t)0x28) - -/* ADC1 DR register base address */ -#define DR_ADDRESS ((uint32_t)0x4001244C) - -/** - * @} - */ - -/** @defgroup ADC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup ADC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the ADCx peripheral registers to their default reset values. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval None - */ -void ADC_DeInit(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - - if (ADCx == ADC1) - { - /* Enable ADC1 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); - /* Release ADC1 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); - } - else if (ADCx == ADC2) - { - /* Enable ADC2 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE); - /* Release ADC2 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE); - } - else - { - if (ADCx == ADC3) - { - /* Enable ADC3 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE); - /* Release ADC3 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE); - } - } -} - -/** - * @brief Initializes the ADCx peripheral according to the specified parameters - * in the ADC_InitStruct. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains - * the configuration information for the specified ADC peripheral. - * @retval None - */ -void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct) -{ - uint32_t tmpreg1 = 0; - uint8_t tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode)); - assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode)); - assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode)); - assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv)); - assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); - assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel)); - - /*---------------------------- ADCx CR1 Configuration -----------------*/ - /* Get the ADCx CR1 value */ - tmpreg1 = ADCx->CR1; - /* Clear DUALMOD and SCAN bits */ - tmpreg1 &= CR1_CLEAR_Mask; - /* Configure ADCx: Dual mode and scan conversion mode */ - /* Set DUALMOD bits according to ADC_Mode value */ - /* Set SCAN bit according to ADC_ScanConvMode value */ - tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8)); - /* Write to ADCx CR1 */ - ADCx->CR1 = tmpreg1; - - /*---------------------------- ADCx CR2 Configuration -----------------*/ - /* Get the ADCx CR2 value */ - tmpreg1 = ADCx->CR2; - /* Clear CONT, ALIGN and EXTSEL bits */ - tmpreg1 &= CR2_CLEAR_Mask; - /* Configure ADCx: external trigger event and continuous conversion mode */ - /* Set ALIGN bit according to ADC_DataAlign value */ - /* Set EXTSEL bits according to ADC_ExternalTrigConv value */ - /* Set CONT bit according to ADC_ContinuousConvMode value */ - tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv | - ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1)); - /* Write to ADCx CR2 */ - ADCx->CR2 = tmpreg1; - - /*---------------------------- ADCx SQR1 Configuration -----------------*/ - /* Get the ADCx SQR1 value */ - tmpreg1 = ADCx->SQR1; - /* Clear L bits */ - tmpreg1 &= SQR1_CLEAR_Mask; - /* Configure ADCx: regular channel sequence length */ - /* Set L bits according to ADC_NbrOfChannel value */ - tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1); - tmpreg1 |= (uint32_t)tmpreg2 << 20; - /* Write to ADCx SQR1 */ - ADCx->SQR1 = tmpreg1; -} - -/** - * @brief Fills each ADC_InitStruct member with its default value. - * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized. - * @retval None - */ -void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) -{ - /* Reset ADC init structure parameters values */ - /* Initialize the ADC_Mode member */ - ADC_InitStruct->ADC_Mode = ADC_Mode_Independent; - /* initialize the ADC_ScanConvMode member */ - ADC_InitStruct->ADC_ScanConvMode = DISABLE; - /* Initialize the ADC_ContinuousConvMode member */ - ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; - /* Initialize the ADC_ExternalTrigConv member */ - ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; - /* Initialize the ADC_DataAlign member */ - ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; - /* Initialize the ADC_NbrOfChannel member */ - ADC_InitStruct->ADC_NbrOfChannel = 1; -} - -/** - * @brief Enables or disables the specified ADC peripheral. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the ADCx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the ADON bit to wake up the ADC from power down mode */ - ADCx->CR2 |= CR2_ADON_Set; - } - else - { - /* Disable the selected ADC peripheral */ - ADCx->CR2 &= CR2_ADON_Reset; - } -} - -/** - * @brief Enables or disables the specified ADC DMA request. - * @param ADCx: where x can be 1 or 3 to select the ADC peripheral. - * Note: ADC2 hasn't a DMA capability. - * @param NewState: new state of the selected ADC DMA transfer. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_DMA_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC DMA request */ - ADCx->CR2 |= CR2_DMA_Set; - } - else - { - /* Disable the selected ADC DMA request */ - ADCx->CR2 &= CR2_DMA_Reset; - } -} - -/** - * @brief Enables or disables the specified ADC interrupts. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg ADC_IT_EOC: End of conversion interrupt mask - * @arg ADC_IT_AWD: Analog watchdog interrupt mask - * @arg ADC_IT_JEOC: End of injected conversion interrupt mask - * @param NewState: new state of the specified ADC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState) -{ - uint8_t itmask = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_ADC_IT(ADC_IT)); - /* Get the ADC IT index */ - itmask = (uint8_t)ADC_IT; - if (NewState != DISABLE) - { - /* Enable the selected ADC interrupts */ - ADCx->CR1 |= itmask; - } - else - { - /* Disable the selected ADC interrupts */ - ADCx->CR1 &= (~(uint32_t)itmask); - } -} - -/** - * @brief Resets the selected ADC calibration registers. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval None - */ -void ADC_ResetCalibration(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Resets the selected ADC calibration registers */ - ADCx->CR2 |= CR2_RSTCAL_Set; -} - -/** - * @brief Gets the selected ADC reset calibration registers status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC reset calibration registers (SET or RESET). - */ -FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of RSTCAL bit */ - if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET) - { - /* RSTCAL bit is set */ - bitstatus = SET; - } - else - { - /* RSTCAL bit is reset */ - bitstatus = RESET; - } - /* Return the RSTCAL bit status */ - return bitstatus; -} - -/** - * @brief Starts the selected ADC calibration process. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval None - */ -void ADC_StartCalibration(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Enable the selected ADC calibration process */ - ADCx->CR2 |= CR2_CAL_Set; -} - -/** - * @brief Gets the selected ADC calibration status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC calibration (SET or RESET). - */ -FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of CAL bit */ - if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET) - { - /* CAL bit is set: calibration on going */ - bitstatus = SET; - } - else - { - /* CAL bit is reset: end of calibration */ - bitstatus = RESET; - } - /* Return the CAL bit status */ - return bitstatus; -} - -/** - * @brief Enables or disables the selected ADC software start conversion . - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC software start conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC conversion on external event and start the selected - ADC conversion */ - ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set; - } - else - { - /* Disable the selected ADC conversion on external event and stop the selected - ADC conversion */ - ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset; - } -} - -/** - * @brief Gets the selected ADC Software start conversion Status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC software start conversion (SET or RESET). - */ -FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of SWSTART bit */ - if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET) - { - /* SWSTART bit is set */ - bitstatus = SET; - } - else - { - /* SWSTART bit is reset */ - bitstatus = RESET; - } - /* Return the SWSTART bit status */ - return bitstatus; -} - -/** - * @brief Configures the discontinuous mode for the selected ADC regular - * group channel. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param Number: specifies the discontinuous mode regular channel - * count value. This number must be between 1 and 8. - * @retval None - */ -void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number) -{ - uint32_t tmpreg1 = 0; - uint32_t tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number)); - /* Get the old register value */ - tmpreg1 = ADCx->CR1; - /* Clear the old discontinuous mode channel count */ - tmpreg1 &= CR1_DISCNUM_Reset; - /* Set the discontinuous mode channel count */ - tmpreg2 = Number - 1; - tmpreg1 |= tmpreg2 << 13; - /* Store the new register value */ - ADCx->CR1 = tmpreg1; -} - -/** - * @brief Enables or disables the discontinuous mode on regular group - * channel for the specified ADC - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC discontinuous mode - * on regular group channel. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC regular discontinuous mode */ - ADCx->CR1 |= CR1_DISCEN_Set; - } - else - { - /* Disable the selected ADC regular discontinuous mode */ - ADCx->CR1 &= CR1_DISCEN_Reset; - } -} - -/** - * @brief Configures for the selected ADC regular channel its corresponding - * rank in the sequencer and its sample time. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_Channel: the ADC channel to configure. - * This parameter can be one of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16. - * @param ADC_SampleTime: The sample time value to be set for the selected channel. - * This parameter can be one of the following values: - * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles - * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles - * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles - * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles - * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles - * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles - * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles - * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles - * @retval None - */ -void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CHANNEL(ADC_Channel)); - assert_param(IS_ADC_REGULAR_RANK(Rank)); - assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); - /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ - if (ADC_Channel > ADC_Channel_9) - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR1; - /* Calculate the mask to clear */ - tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10)); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR1 = tmpreg1; - } - else /* ADC_Channel include in ADC_Channel_[0..9] */ - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR2; - /* Calculate the mask to clear */ - tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR2 = tmpreg1; - } - /* For Rank 1 to 6 */ - if (Rank < 7) - { - /* Get the old register value */ - tmpreg1 = ADCx->SQR3; - /* Calculate the mask to clear */ - tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1)); - /* Clear the old SQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1)); - /* Set the SQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SQR3 = tmpreg1; - } - /* For Rank 7 to 12 */ - else if (Rank < 13) - { - /* Get the old register value */ - tmpreg1 = ADCx->SQR2; - /* Calculate the mask to clear */ - tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7)); - /* Clear the old SQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7)); - /* Set the SQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SQR2 = tmpreg1; - } - /* For Rank 13 to 16 */ - else - { - /* Get the old register value */ - tmpreg1 = ADCx->SQR1; - /* Calculate the mask to clear */ - tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13)); - /* Clear the old SQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13)); - /* Set the SQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SQR1 = tmpreg1; - } -} - -/** - * @brief Enables or disables the ADCx conversion through external trigger. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC external trigger start of conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC conversion on external event */ - ADCx->CR2 |= CR2_EXTTRIG_Set; - } - else - { - /* Disable the selected ADC conversion on external event */ - ADCx->CR2 &= CR2_EXTTRIG_Reset; - } -} - -/** - * @brief Returns the last ADCx conversion result data for regular channel. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The Data conversion value. - */ -uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Return the selected ADC conversion value */ - return (uint16_t) ADCx->DR; -} - -/** - * @brief Returns the last ADC1 and ADC2 conversion result data in dual mode. - * @retval The Data conversion value. - */ -uint32_t ADC_GetDualModeConversionValue(void) -{ - /* Return the dual mode conversion value */ - return (*(__IO uint32_t *) DR_ADDRESS); -} - -/** - * @brief Enables or disables the selected ADC automatic injected group - * conversion after regular one. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC auto injected conversion - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC automatic injected group conversion */ - ADCx->CR1 |= CR1_JAUTO_Set; - } - else - { - /* Disable the selected ADC automatic injected group conversion */ - ADCx->CR1 &= CR1_JAUTO_Reset; - } -} - -/** - * @brief Enables or disables the discontinuous mode for injected group - * channel for the specified ADC - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC discontinuous mode - * on injected group channel. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC injected discontinuous mode */ - ADCx->CR1 |= CR1_JDISCEN_Set; - } - else - { - /* Disable the selected ADC injected discontinuous mode */ - ADCx->CR1 &= CR1_JDISCEN_Reset; - } -} - -/** - * @brief Configures the ADCx external trigger for injected channels conversion. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. - * This parameter can be one of the following values: - * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3) - * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3) - * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8 - * capture compare4 event selected (for ADC1 and ADC2) - * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only) - * @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not - * by external trigger (for ADC1, ADC2 and ADC3) - * @retval None - */ -void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv)); - /* Get the old register value */ - tmpreg = ADCx->CR2; - /* Clear the old external event selection for injected group */ - tmpreg &= CR2_JEXTSEL_Reset; - /* Set the external event selection for injected group */ - tmpreg |= ADC_ExternalTrigInjecConv; - /* Store the new register value */ - ADCx->CR2 = tmpreg; -} - -/** - * @brief Enables or disables the ADCx injected channels conversion through - * external trigger - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC external trigger start of - * injected conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC external event selection for injected group */ - ADCx->CR2 |= CR2_JEXTTRIG_Set; - } - else - { - /* Disable the selected ADC external event selection for injected group */ - ADCx->CR2 &= CR2_JEXTTRIG_Reset; - } -} - -/** - * @brief Enables or disables the selected ADC start of the injected - * channels conversion. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param NewState: new state of the selected ADC software start injected conversion. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected ADC conversion for injected group on external event and start the selected - ADC injected conversion */ - ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set; - } - else - { - /* Disable the selected ADC conversion on external event for injected group and stop the selected - ADC injected conversion */ - ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset; - } -} - -/** - * @brief Gets the selected ADC Software start injected conversion Status. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @retval The new state of ADC software start injected conversion (SET or RESET). - */ -FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - /* Check the status of JSWSTART bit */ - if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET) - { - /* JSWSTART bit is set */ - bitstatus = SET; - } - else - { - /* JSWSTART bit is reset */ - bitstatus = RESET; - } - /* Return the JSWSTART bit status */ - return bitstatus; -} - -/** - * @brief Configures for the selected ADC injected channel its corresponding - * rank in the sequencer and its sample time. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_Channel: the ADC channel to configure. - * This parameter can be one of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @param Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4. - * @param ADC_SampleTime: The sample time value to be set for the selected channel. - * This parameter can be one of the following values: - * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles - * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles - * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles - * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles - * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles - * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles - * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles - * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles - * @retval None - */ -void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CHANNEL(ADC_Channel)); - assert_param(IS_ADC_INJECTED_RANK(Rank)); - assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); - /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ - if (ADC_Channel > ADC_Channel_9) - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR1; - /* Calculate the mask to clear */ - tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10)); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10)); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR1 = tmpreg1; - } - else /* ADC_Channel include in ADC_Channel_[0..9] */ - { - /* Get the old register value */ - tmpreg1 = ADCx->SMPR2; - /* Calculate the mask to clear */ - tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); - /* Clear the old channel sample time */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set */ - tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); - /* Set the new channel sample time */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->SMPR2 = tmpreg1; - } - /* Rank configuration */ - /* Get the old register value */ - tmpreg1 = ADCx->JSQR; - /* Get JL value: Number = JL+1 */ - tmpreg3 = (tmpreg1 & JSQR_JL_Set)>> 20; - /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */ - tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); - /* Clear the old JSQx bits for the selected rank */ - tmpreg1 &= ~tmpreg2; - /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */ - tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); - /* Set the JSQx bits for the selected rank */ - tmpreg1 |= tmpreg2; - /* Store the new register value */ - ADCx->JSQR = tmpreg1; -} - -/** - * @brief Configures the sequencer length for injected channels - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param Length: The sequencer length. - * This parameter must be a number between 1 to 4. - * @retval None - */ -void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length) -{ - uint32_t tmpreg1 = 0; - uint32_t tmpreg2 = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_INJECTED_LENGTH(Length)); - - /* Get the old register value */ - tmpreg1 = ADCx->JSQR; - /* Clear the old injected sequnence lenght JL bits */ - tmpreg1 &= JSQR_JL_Reset; - /* Set the injected sequnence lenght JL bits */ - tmpreg2 = Length - 1; - tmpreg1 |= tmpreg2 << 20; - /* Store the new register value */ - ADCx->JSQR = tmpreg1; -} - -/** - * @brief Set the injected channels conversion value offset - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_InjectedChannel: the ADC injected channel to set its offset. - * This parameter can be one of the following values: - * @arg ADC_InjectedChannel_1: Injected Channel1 selected - * @arg ADC_InjectedChannel_2: Injected Channel2 selected - * @arg ADC_InjectedChannel_3: Injected Channel3 selected - * @arg ADC_InjectedChannel_4: Injected Channel4 selected - * @param Offset: the offset value for the selected ADC injected channel - * This parameter must be a 12bit value. - * @retval None - */ -void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); - assert_param(IS_ADC_OFFSET(Offset)); - - tmp = (uint32_t)ADCx; - tmp += ADC_InjectedChannel; - - /* Set the selected injected channel data offset */ - *(__IO uint32_t *) tmp = (uint32_t)Offset; -} - -/** - * @brief Returns the ADC injected channel conversion result - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_InjectedChannel: the converted ADC injected channel. - * This parameter can be one of the following values: - * @arg ADC_InjectedChannel_1: Injected Channel1 selected - * @arg ADC_InjectedChannel_2: Injected Channel2 selected - * @arg ADC_InjectedChannel_3: Injected Channel3 selected - * @arg ADC_InjectedChannel_4: Injected Channel4 selected - * @retval The Data conversion value. - */ -uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); - - tmp = (uint32_t)ADCx; - tmp += ADC_InjectedChannel + JDR_Offset; - - /* Returns the selected injected channel conversion data value */ - return (uint16_t) (*(__IO uint32_t*) tmp); -} - -/** - * @brief Enables or disables the analog watchdog on single/all regular - * or injected channels - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration. - * This parameter can be one of the following values: - * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel - * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel - * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel - * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel - * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel - * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels - * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog - * @retval None - */ -void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog)); - /* Get the old register value */ - tmpreg = ADCx->CR1; - /* Clear AWDEN, AWDENJ and AWDSGL bits */ - tmpreg &= CR1_AWDMode_Reset; - /* Set the analog watchdog enable mode */ - tmpreg |= ADC_AnalogWatchdog; - /* Store the new register value */ - ADCx->CR1 = tmpreg; -} - -/** - * @brief Configures the high and low thresholds of the analog watchdog. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param HighThreshold: the ADC analog watchdog High threshold value. - * This parameter must be a 12bit value. - * @param LowThreshold: the ADC analog watchdog Low threshold value. - * This parameter must be a 12bit value. - * @retval None - */ -void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, - uint16_t LowThreshold) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_THRESHOLD(HighThreshold)); - assert_param(IS_ADC_THRESHOLD(LowThreshold)); - /* Set the ADCx high threshold */ - ADCx->HTR = HighThreshold; - /* Set the ADCx low threshold */ - ADCx->LTR = LowThreshold; -} - -/** - * @brief Configures the analog watchdog guarded single channel - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_Channel: the ADC channel to configure for the analog watchdog. - * This parameter can be one of the following values: - * @arg ADC_Channel_0: ADC Channel0 selected - * @arg ADC_Channel_1: ADC Channel1 selected - * @arg ADC_Channel_2: ADC Channel2 selected - * @arg ADC_Channel_3: ADC Channel3 selected - * @arg ADC_Channel_4: ADC Channel4 selected - * @arg ADC_Channel_5: ADC Channel5 selected - * @arg ADC_Channel_6: ADC Channel6 selected - * @arg ADC_Channel_7: ADC Channel7 selected - * @arg ADC_Channel_8: ADC Channel8 selected - * @arg ADC_Channel_9: ADC Channel9 selected - * @arg ADC_Channel_10: ADC Channel10 selected - * @arg ADC_Channel_11: ADC Channel11 selected - * @arg ADC_Channel_12: ADC Channel12 selected - * @arg ADC_Channel_13: ADC Channel13 selected - * @arg ADC_Channel_14: ADC Channel14 selected - * @arg ADC_Channel_15: ADC Channel15 selected - * @arg ADC_Channel_16: ADC Channel16 selected - * @arg ADC_Channel_17: ADC Channel17 selected - * @retval None - */ -void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CHANNEL(ADC_Channel)); - /* Get the old register value */ - tmpreg = ADCx->CR1; - /* Clear the Analog watchdog channel select bits */ - tmpreg &= CR1_AWDCH_Reset; - /* Set the Analog watchdog channel */ - tmpreg |= ADC_Channel; - /* Store the new register value */ - ADCx->CR1 = tmpreg; -} - -/** - * @brief Enables or disables the temperature sensor and Vrefint channel. - * @param NewState: new state of the temperature sensor. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void ADC_TempSensorVrefintCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the temperature sensor and Vrefint channel*/ - ADC1->CR2 |= CR2_TSVREFE_Set; - } - else - { - /* Disable the temperature sensor and Vrefint channel*/ - ADC1->CR2 &= CR2_TSVREFE_Reset; - } -} - -/** - * @brief Checks whether the specified ADC flag is set or not. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg ADC_FLAG_AWD: Analog watchdog flag - * @arg ADC_FLAG_EOC: End of conversion flag - * @arg ADC_FLAG_JEOC: End of injected group conversion flag - * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag - * @arg ADC_FLAG_STRT: Start of regular group conversion flag - * @retval The new state of ADC_FLAG (SET or RESET). - */ -FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_GET_FLAG(ADC_FLAG)); - /* Check the status of the specified ADC flag */ - if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET) - { - /* ADC_FLAG is set */ - bitstatus = SET; - } - else - { - /* ADC_FLAG is reset */ - bitstatus = RESET; - } - /* Return the ADC_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the ADCx's pending flags. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg ADC_FLAG_AWD: Analog watchdog flag - * @arg ADC_FLAG_EOC: End of conversion flag - * @arg ADC_FLAG_JEOC: End of injected group conversion flag - * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag - * @arg ADC_FLAG_STRT: Start of regular group conversion flag - * @retval None - */ -void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG)); - /* Clear the selected ADC flags */ - ADCx->SR = ~(uint32_t)ADC_FLAG; -} - -/** - * @brief Checks whether the specified ADC interrupt has occurred or not. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_IT: specifies the ADC interrupt source to check. - * This parameter can be one of the following values: - * @arg ADC_IT_EOC: End of conversion interrupt mask - * @arg ADC_IT_AWD: Analog watchdog interrupt mask - * @arg ADC_IT_JEOC: End of injected conversion interrupt mask - * @retval The new state of ADC_IT (SET or RESET). - */ -ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t itmask = 0, enablestatus = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_GET_IT(ADC_IT)); - /* Get the ADC IT index */ - itmask = ADC_IT >> 8; - /* Get the ADC_IT enable bit status */ - enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ; - /* Check the status of the specified ADC interrupt */ - if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus) - { - /* ADC_IT is set */ - bitstatus = SET; - } - else - { - /* ADC_IT is reset */ - bitstatus = RESET; - } - /* Return the ADC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the ADCx's interrupt pending bits. - * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. - * @param ADC_IT: specifies the ADC interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg ADC_IT_EOC: End of conversion interrupt mask - * @arg ADC_IT_AWD: Analog watchdog interrupt mask - * @arg ADC_IT_JEOC: End of injected conversion interrupt mask - * @retval None - */ -void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT) -{ - uint8_t itmask = 0; - /* Check the parameters */ - assert_param(IS_ADC_ALL_PERIPH(ADCx)); - assert_param(IS_ADC_IT(ADC_IT)); - /* Get the ADC IT index */ - itmask = (uint8_t)(ADC_IT >> 8); - /* Clear the selected ADC interrupt pending bits */ - ADCx->SR = ~(uint32_t)itmask; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_adc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the ADC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_adc.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup ADC + * @brief ADC driver modules + * @{ + */ + +/** @defgroup ADC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Defines + * @{ + */ + +/* ADC DISCNUM mask */ +#define CR1_DISCNUM_Reset ((uint32_t)0xFFFF1FFF) + +/* ADC DISCEN mask */ +#define CR1_DISCEN_Set ((uint32_t)0x00000800) +#define CR1_DISCEN_Reset ((uint32_t)0xFFFFF7FF) + +/* ADC JAUTO mask */ +#define CR1_JAUTO_Set ((uint32_t)0x00000400) +#define CR1_JAUTO_Reset ((uint32_t)0xFFFFFBFF) + +/* ADC JDISCEN mask */ +#define CR1_JDISCEN_Set ((uint32_t)0x00001000) +#define CR1_JDISCEN_Reset ((uint32_t)0xFFFFEFFF) + +/* ADC AWDCH mask */ +#define CR1_AWDCH_Reset ((uint32_t)0xFFFFFFE0) + +/* ADC Analog watchdog enable mode mask */ +#define CR1_AWDMode_Reset ((uint32_t)0xFF3FFDFF) + +/* CR1 register Mask */ +#define CR1_CLEAR_Mask ((uint32_t)0xFFF0FEFF) + +/* ADC ADON mask */ +#define CR2_ADON_Set ((uint32_t)0x00000001) +#define CR2_ADON_Reset ((uint32_t)0xFFFFFFFE) + +/* ADC DMA mask */ +#define CR2_DMA_Set ((uint32_t)0x00000100) +#define CR2_DMA_Reset ((uint32_t)0xFFFFFEFF) + +/* ADC RSTCAL mask */ +#define CR2_RSTCAL_Set ((uint32_t)0x00000008) + +/* ADC CAL mask */ +#define CR2_CAL_Set ((uint32_t)0x00000004) + +/* ADC SWSTART mask */ +#define CR2_SWSTART_Set ((uint32_t)0x00400000) + +/* ADC EXTTRIG mask */ +#define CR2_EXTTRIG_Set ((uint32_t)0x00100000) +#define CR2_EXTTRIG_Reset ((uint32_t)0xFFEFFFFF) + +/* ADC Software start mask */ +#define CR2_EXTTRIG_SWSTART_Set ((uint32_t)0x00500000) +#define CR2_EXTTRIG_SWSTART_Reset ((uint32_t)0xFFAFFFFF) + +/* ADC JEXTSEL mask */ +#define CR2_JEXTSEL_Reset ((uint32_t)0xFFFF8FFF) + +/* ADC JEXTTRIG mask */ +#define CR2_JEXTTRIG_Set ((uint32_t)0x00008000) +#define CR2_JEXTTRIG_Reset ((uint32_t)0xFFFF7FFF) + +/* ADC JSWSTART mask */ +#define CR2_JSWSTART_Set ((uint32_t)0x00200000) + +/* ADC injected software start mask */ +#define CR2_JEXTTRIG_JSWSTART_Set ((uint32_t)0x00208000) +#define CR2_JEXTTRIG_JSWSTART_Reset ((uint32_t)0xFFDF7FFF) + +/* ADC TSPD mask */ +#define CR2_TSVREFE_Set ((uint32_t)0x00800000) +#define CR2_TSVREFE_Reset ((uint32_t)0xFF7FFFFF) + +/* CR2 register Mask */ +#define CR2_CLEAR_Mask ((uint32_t)0xFFF1F7FD) + +/* ADC SQx mask */ +#define SQR3_SQ_Set ((uint32_t)0x0000001F) +#define SQR2_SQ_Set ((uint32_t)0x0000001F) +#define SQR1_SQ_Set ((uint32_t)0x0000001F) + +/* SQR1 register Mask */ +#define SQR1_CLEAR_Mask ((uint32_t)0xFF0FFFFF) + +/* ADC JSQx mask */ +#define JSQR_JSQ_Set ((uint32_t)0x0000001F) + +/* ADC JL mask */ +#define JSQR_JL_Set ((uint32_t)0x00300000) +#define JSQR_JL_Reset ((uint32_t)0xFFCFFFFF) + +/* ADC SMPx mask */ +#define SMPR1_SMP_Set ((uint32_t)0x00000007) +#define SMPR2_SMP_Set ((uint32_t)0x00000007) + +/* ADC JDRx registers offset */ +#define JDR_Offset ((uint8_t)0x28) + +/* ADC1 DR register base address */ +#define DR_ADDRESS ((uint32_t)0x4001244C) + +/** + * @} + */ + +/** @defgroup ADC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup ADC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the ADCx peripheral registers to their default reset values. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval None + */ +void ADC_DeInit(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + + if (ADCx == ADC1) + { + /* Enable ADC1 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); + /* Release ADC1 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); + } + else if (ADCx == ADC2) + { + /* Enable ADC2 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE); + /* Release ADC2 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE); + } + else + { + if (ADCx == ADC3) + { + /* Enable ADC3 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE); + /* Release ADC3 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE); + } + } +} + +/** + * @brief Initializes the ADCx peripheral according to the specified parameters + * in the ADC_InitStruct. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains + * the configuration information for the specified ADC peripheral. + * @retval None + */ +void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct) +{ + uint32_t tmpreg1 = 0; + uint8_t tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode)); + assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode)); + assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode)); + assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv)); + assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign)); + assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel)); + + /*---------------------------- ADCx CR1 Configuration -----------------*/ + /* Get the ADCx CR1 value */ + tmpreg1 = ADCx->CR1; + /* Clear DUALMOD and SCAN bits */ + tmpreg1 &= CR1_CLEAR_Mask; + /* Configure ADCx: Dual mode and scan conversion mode */ + /* Set DUALMOD bits according to ADC_Mode value */ + /* Set SCAN bit according to ADC_ScanConvMode value */ + tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_Mode | ((uint32_t)ADC_InitStruct->ADC_ScanConvMode << 8)); + /* Write to ADCx CR1 */ + ADCx->CR1 = tmpreg1; + + /*---------------------------- ADCx CR2 Configuration -----------------*/ + /* Get the ADCx CR2 value */ + tmpreg1 = ADCx->CR2; + /* Clear CONT, ALIGN and EXTSEL bits */ + tmpreg1 &= CR2_CLEAR_Mask; + /* Configure ADCx: external trigger event and continuous conversion mode */ + /* Set ALIGN bit according to ADC_DataAlign value */ + /* Set EXTSEL bits according to ADC_ExternalTrigConv value */ + /* Set CONT bit according to ADC_ContinuousConvMode value */ + tmpreg1 |= (uint32_t)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv | + ((uint32_t)ADC_InitStruct->ADC_ContinuousConvMode << 1)); + /* Write to ADCx CR2 */ + ADCx->CR2 = tmpreg1; + + /*---------------------------- ADCx SQR1 Configuration -----------------*/ + /* Get the ADCx SQR1 value */ + tmpreg1 = ADCx->SQR1; + /* Clear L bits */ + tmpreg1 &= SQR1_CLEAR_Mask; + /* Configure ADCx: regular channel sequence length */ + /* Set L bits according to ADC_NbrOfChannel value */ + tmpreg2 |= (uint8_t) (ADC_InitStruct->ADC_NbrOfChannel - (uint8_t)1); + tmpreg1 |= (uint32_t)tmpreg2 << 20; + /* Write to ADCx SQR1 */ + ADCx->SQR1 = tmpreg1; +} + +/** + * @brief Fills each ADC_InitStruct member with its default value. + * @param ADC_InitStruct : pointer to an ADC_InitTypeDef structure which will be initialized. + * @retval None + */ +void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct) +{ + /* Reset ADC init structure parameters values */ + /* Initialize the ADC_Mode member */ + ADC_InitStruct->ADC_Mode = ADC_Mode_Independent; + /* initialize the ADC_ScanConvMode member */ + ADC_InitStruct->ADC_ScanConvMode = DISABLE; + /* Initialize the ADC_ContinuousConvMode member */ + ADC_InitStruct->ADC_ContinuousConvMode = DISABLE; + /* Initialize the ADC_ExternalTrigConv member */ + ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; + /* Initialize the ADC_DataAlign member */ + ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right; + /* Initialize the ADC_NbrOfChannel member */ + ADC_InitStruct->ADC_NbrOfChannel = 1; +} + +/** + * @brief Enables or disables the specified ADC peripheral. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the ADCx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the ADON bit to wake up the ADC from power down mode */ + ADCx->CR2 |= CR2_ADON_Set; + } + else + { + /* Disable the selected ADC peripheral */ + ADCx->CR2 &= CR2_ADON_Reset; + } +} + +/** + * @brief Enables or disables the specified ADC DMA request. + * @param ADCx: where x can be 1 or 3 to select the ADC peripheral. + * Note: ADC2 hasn't a DMA capability. + * @param NewState: new state of the selected ADC DMA transfer. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_DMA_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC DMA request */ + ADCx->CR2 |= CR2_DMA_Set; + } + else + { + /* Disable the selected ADC DMA request */ + ADCx->CR2 &= CR2_DMA_Reset; + } +} + +/** + * @brief Enables or disables the specified ADC interrupts. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: End of conversion interrupt mask + * @arg ADC_IT_AWD: Analog watchdog interrupt mask + * @arg ADC_IT_JEOC: End of injected conversion interrupt mask + * @param NewState: new state of the specified ADC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_ITConfig(ADC_TypeDef* ADCx, uint16_t ADC_IT, FunctionalState NewState) +{ + uint8_t itmask = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_ADC_IT(ADC_IT)); + /* Get the ADC IT index */ + itmask = (uint8_t)ADC_IT; + if (NewState != DISABLE) + { + /* Enable the selected ADC interrupts */ + ADCx->CR1 |= itmask; + } + else + { + /* Disable the selected ADC interrupts */ + ADCx->CR1 &= (~(uint32_t)itmask); + } +} + +/** + * @brief Resets the selected ADC calibration registers. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval None + */ +void ADC_ResetCalibration(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Resets the selected ADC calibration registers */ + ADCx->CR2 |= CR2_RSTCAL_Set; +} + +/** + * @brief Gets the selected ADC reset calibration registers status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC reset calibration registers (SET or RESET). + */ +FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of RSTCAL bit */ + if ((ADCx->CR2 & CR2_RSTCAL_Set) != (uint32_t)RESET) + { + /* RSTCAL bit is set */ + bitstatus = SET; + } + else + { + /* RSTCAL bit is reset */ + bitstatus = RESET; + } + /* Return the RSTCAL bit status */ + return bitstatus; +} + +/** + * @brief Starts the selected ADC calibration process. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval None + */ +void ADC_StartCalibration(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Enable the selected ADC calibration process */ + ADCx->CR2 |= CR2_CAL_Set; +} + +/** + * @brief Gets the selected ADC calibration status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC calibration (SET or RESET). + */ +FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of CAL bit */ + if ((ADCx->CR2 & CR2_CAL_Set) != (uint32_t)RESET) + { + /* CAL bit is set: calibration on going */ + bitstatus = SET; + } + else + { + /* CAL bit is reset: end of calibration */ + bitstatus = RESET; + } + /* Return the CAL bit status */ + return bitstatus; +} + +/** + * @brief Enables or disables the selected ADC software start conversion . + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC software start conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC conversion on external event and start the selected + ADC conversion */ + ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set; + } + else + { + /* Disable the selected ADC conversion on external event and stop the selected + ADC conversion */ + ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset; + } +} + +/** + * @brief Gets the selected ADC Software start conversion Status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC software start conversion (SET or RESET). + */ +FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of SWSTART bit */ + if ((ADCx->CR2 & CR2_SWSTART_Set) != (uint32_t)RESET) + { + /* SWSTART bit is set */ + bitstatus = SET; + } + else + { + /* SWSTART bit is reset */ + bitstatus = RESET; + } + /* Return the SWSTART bit status */ + return bitstatus; +} + +/** + * @brief Configures the discontinuous mode for the selected ADC regular + * group channel. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param Number: specifies the discontinuous mode regular channel + * count value. This number must be between 1 and 8. + * @retval None + */ +void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, uint8_t Number) +{ + uint32_t tmpreg1 = 0; + uint32_t tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number)); + /* Get the old register value */ + tmpreg1 = ADCx->CR1; + /* Clear the old discontinuous mode channel count */ + tmpreg1 &= CR1_DISCNUM_Reset; + /* Set the discontinuous mode channel count */ + tmpreg2 = Number - 1; + tmpreg1 |= tmpreg2 << 13; + /* Store the new register value */ + ADCx->CR1 = tmpreg1; +} + +/** + * @brief Enables or disables the discontinuous mode on regular group + * channel for the specified ADC + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC discontinuous mode + * on regular group channel. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC regular discontinuous mode */ + ADCx->CR1 |= CR1_DISCEN_Set; + } + else + { + /* Disable the selected ADC regular discontinuous mode */ + ADCx->CR1 &= CR1_DISCEN_Reset; + } +} + +/** + * @brief Configures for the selected ADC regular channel its corresponding + * rank in the sequencer and its sample time. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_Channel: the ADC channel to configure. + * This parameter can be one of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @param Rank: The rank in the regular group sequencer. This parameter must be between 1 to 16. + * @param ADC_SampleTime: The sample time value to be set for the selected channel. + * This parameter can be one of the following values: + * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles + * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles + * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles + * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles + * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles + * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles + * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles + * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles + * @retval None + */ +void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CHANNEL(ADC_Channel)); + assert_param(IS_ADC_REGULAR_RANK(Rank)); + assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); + /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ + if (ADC_Channel > ADC_Channel_9) + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR1; + /* Calculate the mask to clear */ + tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10)); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * (ADC_Channel - 10)); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR1 = tmpreg1; + } + else /* ADC_Channel include in ADC_Channel_[0..9] */ + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR2; + /* Calculate the mask to clear */ + tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR2 = tmpreg1; + } + /* For Rank 1 to 6 */ + if (Rank < 7) + { + /* Get the old register value */ + tmpreg1 = ADCx->SQR3; + /* Calculate the mask to clear */ + tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1)); + /* Clear the old SQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 1)); + /* Set the SQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SQR3 = tmpreg1; + } + /* For Rank 7 to 12 */ + else if (Rank < 13) + { + /* Get the old register value */ + tmpreg1 = ADCx->SQR2; + /* Calculate the mask to clear */ + tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7)); + /* Clear the old SQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 7)); + /* Set the SQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SQR2 = tmpreg1; + } + /* For Rank 13 to 16 */ + else + { + /* Get the old register value */ + tmpreg1 = ADCx->SQR1; + /* Calculate the mask to clear */ + tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13)); + /* Clear the old SQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (Rank - 13)); + /* Set the SQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SQR1 = tmpreg1; + } +} + +/** + * @brief Enables or disables the ADCx conversion through external trigger. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC external trigger start of conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC conversion on external event */ + ADCx->CR2 |= CR2_EXTTRIG_Set; + } + else + { + /* Disable the selected ADC conversion on external event */ + ADCx->CR2 &= CR2_EXTTRIG_Reset; + } +} + +/** + * @brief Returns the last ADCx conversion result data for regular channel. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The Data conversion value. + */ +uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Return the selected ADC conversion value */ + return (uint16_t) ADCx->DR; +} + +/** + * @brief Returns the last ADC1 and ADC2 conversion result data in dual mode. + * @retval The Data conversion value. + */ +uint32_t ADC_GetDualModeConversionValue(void) +{ + /* Return the dual mode conversion value */ + return (*(__IO uint32_t *) DR_ADDRESS); +} + +/** + * @brief Enables or disables the selected ADC automatic injected group + * conversion after regular one. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC auto injected conversion + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC automatic injected group conversion */ + ADCx->CR1 |= CR1_JAUTO_Set; + } + else + { + /* Disable the selected ADC automatic injected group conversion */ + ADCx->CR1 &= CR1_JAUTO_Reset; + } +} + +/** + * @brief Enables or disables the discontinuous mode for injected group + * channel for the specified ADC + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC discontinuous mode + * on injected group channel. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC injected discontinuous mode */ + ADCx->CR1 |= CR1_JDISCEN_Set; + } + else + { + /* Disable the selected ADC injected discontinuous mode */ + ADCx->CR1 &= CR1_JDISCEN_Reset; + } +} + +/** + * @brief Configures the ADCx external trigger for injected channels conversion. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_ExternalTrigInjecConv: specifies the ADC trigger to start injected conversion. + * This parameter can be one of the following values: + * @arg ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event selected (for ADC1, ADC2 and ADC3) + * @arg ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture compare4 selected (for ADC1, ADC2 and ADC3) + * @arg ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture compare1 selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture compare4 selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_Ext_IT15_TIM8_CC4: External interrupt line 15 or Timer8 + * capture compare4 event selected (for ADC1 and ADC2) + * @arg ADC_ExternalTrigInjecConv_T4_CC3: Timer4 capture compare3 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T8_CC2: Timer8 capture compare2 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T8_CC4: Timer8 capture compare4 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T5_TRGO: Timer5 TRGO event selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_T5_CC4: Timer5 capture compare4 selected (for ADC3 only) + * @arg ADC_ExternalTrigInjecConv_None: Injected conversion started by software and not + * by external trigger (for ADC1, ADC2 and ADC3) + * @retval None + */ +void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, uint32_t ADC_ExternalTrigInjecConv) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv)); + /* Get the old register value */ + tmpreg = ADCx->CR2; + /* Clear the old external event selection for injected group */ + tmpreg &= CR2_JEXTSEL_Reset; + /* Set the external event selection for injected group */ + tmpreg |= ADC_ExternalTrigInjecConv; + /* Store the new register value */ + ADCx->CR2 = tmpreg; +} + +/** + * @brief Enables or disables the ADCx injected channels conversion through + * external trigger + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC external trigger start of + * injected conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC external event selection for injected group */ + ADCx->CR2 |= CR2_JEXTTRIG_Set; + } + else + { + /* Disable the selected ADC external event selection for injected group */ + ADCx->CR2 &= CR2_JEXTTRIG_Reset; + } +} + +/** + * @brief Enables or disables the selected ADC start of the injected + * channels conversion. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param NewState: new state of the selected ADC software start injected conversion. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected ADC conversion for injected group on external event and start the selected + ADC injected conversion */ + ADCx->CR2 |= CR2_JEXTTRIG_JSWSTART_Set; + } + else + { + /* Disable the selected ADC conversion on external event for injected group and stop the selected + ADC injected conversion */ + ADCx->CR2 &= CR2_JEXTTRIG_JSWSTART_Reset; + } +} + +/** + * @brief Gets the selected ADC Software start injected conversion Status. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @retval The new state of ADC software start injected conversion (SET or RESET). + */ +FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + /* Check the status of JSWSTART bit */ + if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET) + { + /* JSWSTART bit is set */ + bitstatus = SET; + } + else + { + /* JSWSTART bit is reset */ + bitstatus = RESET; + } + /* Return the JSWSTART bit status */ + return bitstatus; +} + +/** + * @brief Configures for the selected ADC injected channel its corresponding + * rank in the sequencer and its sample time. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_Channel: the ADC channel to configure. + * This parameter can be one of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @param Rank: The rank in the injected group sequencer. This parameter must be between 1 and 4. + * @param ADC_SampleTime: The sample time value to be set for the selected channel. + * This parameter can be one of the following values: + * @arg ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles + * @arg ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles + * @arg ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles + * @arg ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles + * @arg ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles + * @arg ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles + * @arg ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles + * @arg ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles + * @retval None + */ +void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel, uint8_t Rank, uint8_t ADC_SampleTime) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0, tmpreg3 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CHANNEL(ADC_Channel)); + assert_param(IS_ADC_INJECTED_RANK(Rank)); + assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime)); + /* if ADC_Channel_10 ... ADC_Channel_17 is selected */ + if (ADC_Channel > ADC_Channel_9) + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR1; + /* Calculate the mask to clear */ + tmpreg2 = SMPR1_SMP_Set << (3*(ADC_Channel - 10)); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3*(ADC_Channel - 10)); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR1 = tmpreg1; + } + else /* ADC_Channel include in ADC_Channel_[0..9] */ + { + /* Get the old register value */ + tmpreg1 = ADCx->SMPR2; + /* Calculate the mask to clear */ + tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel); + /* Clear the old channel sample time */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set */ + tmpreg2 = (uint32_t)ADC_SampleTime << (3 * ADC_Channel); + /* Set the new channel sample time */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->SMPR2 = tmpreg1; + } + /* Rank configuration */ + /* Get the old register value */ + tmpreg1 = ADCx->JSQR; + /* Get JL value: Number = JL+1 */ + tmpreg3 = (tmpreg1 & JSQR_JL_Set)>> 20; + /* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */ + tmpreg2 = JSQR_JSQ_Set << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); + /* Clear the old JSQx bits for the selected rank */ + tmpreg1 &= ~tmpreg2; + /* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */ + tmpreg2 = (uint32_t)ADC_Channel << (5 * (uint8_t)((Rank + 3) - (tmpreg3 + 1))); + /* Set the JSQx bits for the selected rank */ + tmpreg1 |= tmpreg2; + /* Store the new register value */ + ADCx->JSQR = tmpreg1; +} + +/** + * @brief Configures the sequencer length for injected channels + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param Length: The sequencer length. + * This parameter must be a number between 1 to 4. + * @retval None + */ +void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, uint8_t Length) +{ + uint32_t tmpreg1 = 0; + uint32_t tmpreg2 = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_INJECTED_LENGTH(Length)); + + /* Get the old register value */ + tmpreg1 = ADCx->JSQR; + /* Clear the old injected sequnence lenght JL bits */ + tmpreg1 &= JSQR_JL_Reset; + /* Set the injected sequnence lenght JL bits */ + tmpreg2 = Length - 1; + tmpreg1 |= tmpreg2 << 20; + /* Store the new register value */ + ADCx->JSQR = tmpreg1; +} + +/** + * @brief Set the injected channels conversion value offset + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_InjectedChannel: the ADC injected channel to set its offset. + * This parameter can be one of the following values: + * @arg ADC_InjectedChannel_1: Injected Channel1 selected + * @arg ADC_InjectedChannel_2: Injected Channel2 selected + * @arg ADC_InjectedChannel_3: Injected Channel3 selected + * @arg ADC_InjectedChannel_4: Injected Channel4 selected + * @param Offset: the offset value for the selected ADC injected channel + * This parameter must be a 12bit value. + * @retval None + */ +void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel, uint16_t Offset) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); + assert_param(IS_ADC_OFFSET(Offset)); + + tmp = (uint32_t)ADCx; + tmp += ADC_InjectedChannel; + + /* Set the selected injected channel data offset */ + *(__IO uint32_t *) tmp = (uint32_t)Offset; +} + +/** + * @brief Returns the ADC injected channel conversion result + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_InjectedChannel: the converted ADC injected channel. + * This parameter can be one of the following values: + * @arg ADC_InjectedChannel_1: Injected Channel1 selected + * @arg ADC_InjectedChannel_2: Injected Channel2 selected + * @arg ADC_InjectedChannel_3: Injected Channel3 selected + * @arg ADC_InjectedChannel_4: Injected Channel4 selected + * @retval The Data conversion value. + */ +uint16_t ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, uint8_t ADC_InjectedChannel) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel)); + + tmp = (uint32_t)ADCx; + tmp += ADC_InjectedChannel + JDR_Offset; + + /* Returns the selected injected channel conversion data value */ + return (uint16_t) (*(__IO uint32_t*) tmp); +} + +/** + * @brief Enables or disables the analog watchdog on single/all regular + * or injected channels + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_AnalogWatchdog: the ADC analog watchdog configuration. + * This parameter can be one of the following values: + * @arg ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on a single regular channel + * @arg ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on a single injected channel + * @arg ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog watchdog on a single regular or injected channel + * @arg ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on all regular channel + * @arg ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on all injected channel + * @arg ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog on all regular and injected channels + * @arg ADC_AnalogWatchdog_None: No channel guarded by the analog watchdog + * @retval None + */ +void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog)); + /* Get the old register value */ + tmpreg = ADCx->CR1; + /* Clear AWDEN, AWDENJ and AWDSGL bits */ + tmpreg &= CR1_AWDMode_Reset; + /* Set the analog watchdog enable mode */ + tmpreg |= ADC_AnalogWatchdog; + /* Store the new register value */ + ADCx->CR1 = tmpreg; +} + +/** + * @brief Configures the high and low thresholds of the analog watchdog. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param HighThreshold: the ADC analog watchdog High threshold value. + * This parameter must be a 12bit value. + * @param LowThreshold: the ADC analog watchdog Low threshold value. + * This parameter must be a 12bit value. + * @retval None + */ +void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold, + uint16_t LowThreshold) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_THRESHOLD(HighThreshold)); + assert_param(IS_ADC_THRESHOLD(LowThreshold)); + /* Set the ADCx high threshold */ + ADCx->HTR = HighThreshold; + /* Set the ADCx low threshold */ + ADCx->LTR = LowThreshold; +} + +/** + * @brief Configures the analog watchdog guarded single channel + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_Channel: the ADC channel to configure for the analog watchdog. + * This parameter can be one of the following values: + * @arg ADC_Channel_0: ADC Channel0 selected + * @arg ADC_Channel_1: ADC Channel1 selected + * @arg ADC_Channel_2: ADC Channel2 selected + * @arg ADC_Channel_3: ADC Channel3 selected + * @arg ADC_Channel_4: ADC Channel4 selected + * @arg ADC_Channel_5: ADC Channel5 selected + * @arg ADC_Channel_6: ADC Channel6 selected + * @arg ADC_Channel_7: ADC Channel7 selected + * @arg ADC_Channel_8: ADC Channel8 selected + * @arg ADC_Channel_9: ADC Channel9 selected + * @arg ADC_Channel_10: ADC Channel10 selected + * @arg ADC_Channel_11: ADC Channel11 selected + * @arg ADC_Channel_12: ADC Channel12 selected + * @arg ADC_Channel_13: ADC Channel13 selected + * @arg ADC_Channel_14: ADC Channel14 selected + * @arg ADC_Channel_15: ADC Channel15 selected + * @arg ADC_Channel_16: ADC Channel16 selected + * @arg ADC_Channel_17: ADC Channel17 selected + * @retval None + */ +void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint8_t ADC_Channel) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CHANNEL(ADC_Channel)); + /* Get the old register value */ + tmpreg = ADCx->CR1; + /* Clear the Analog watchdog channel select bits */ + tmpreg &= CR1_AWDCH_Reset; + /* Set the Analog watchdog channel */ + tmpreg |= ADC_Channel; + /* Store the new register value */ + ADCx->CR1 = tmpreg; +} + +/** + * @brief Enables or disables the temperature sensor and Vrefint channel. + * @param NewState: new state of the temperature sensor. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void ADC_TempSensorVrefintCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the temperature sensor and Vrefint channel*/ + ADC1->CR2 |= CR2_TSVREFE_Set; + } + else + { + /* Disable the temperature sensor and Vrefint channel*/ + ADC1->CR2 &= CR2_TSVREFE_Reset; + } +} + +/** + * @brief Checks whether the specified ADC flag is set or not. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg ADC_FLAG_AWD: Analog watchdog flag + * @arg ADC_FLAG_EOC: End of conversion flag + * @arg ADC_FLAG_JEOC: End of injected group conversion flag + * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag + * @arg ADC_FLAG_STRT: Start of regular group conversion flag + * @retval The new state of ADC_FLAG (SET or RESET). + */ +FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_GET_FLAG(ADC_FLAG)); + /* Check the status of the specified ADC flag */ + if ((ADCx->SR & ADC_FLAG) != (uint8_t)RESET) + { + /* ADC_FLAG is set */ + bitstatus = SET; + } + else + { + /* ADC_FLAG is reset */ + bitstatus = RESET; + } + /* Return the ADC_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the ADCx's pending flags. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg ADC_FLAG_AWD: Analog watchdog flag + * @arg ADC_FLAG_EOC: End of conversion flag + * @arg ADC_FLAG_JEOC: End of injected group conversion flag + * @arg ADC_FLAG_JSTRT: Start of injected group conversion flag + * @arg ADC_FLAG_STRT: Start of regular group conversion flag + * @retval None + */ +void ADC_ClearFlag(ADC_TypeDef* ADCx, uint8_t ADC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG)); + /* Clear the selected ADC flags */ + ADCx->SR = ~(uint32_t)ADC_FLAG; +} + +/** + * @brief Checks whether the specified ADC interrupt has occurred or not. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_IT: specifies the ADC interrupt source to check. + * This parameter can be one of the following values: + * @arg ADC_IT_EOC: End of conversion interrupt mask + * @arg ADC_IT_AWD: Analog watchdog interrupt mask + * @arg ADC_IT_JEOC: End of injected conversion interrupt mask + * @retval The new state of ADC_IT (SET or RESET). + */ +ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint16_t ADC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t itmask = 0, enablestatus = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_GET_IT(ADC_IT)); + /* Get the ADC IT index */ + itmask = ADC_IT >> 8; + /* Get the ADC_IT enable bit status */ + enablestatus = (ADCx->CR1 & (uint8_t)ADC_IT) ; + /* Check the status of the specified ADC interrupt */ + if (((ADCx->SR & itmask) != (uint32_t)RESET) && enablestatus) + { + /* ADC_IT is set */ + bitstatus = SET; + } + else + { + /* ADC_IT is reset */ + bitstatus = RESET; + } + /* Return the ADC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the ADCx's interrupt pending bits. + * @param ADCx: where x can be 1, 2 or 3 to select the ADC peripheral. + * @param ADC_IT: specifies the ADC interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg ADC_IT_EOC: End of conversion interrupt mask + * @arg ADC_IT_AWD: Analog watchdog interrupt mask + * @arg ADC_IT_JEOC: End of injected conversion interrupt mask + * @retval None + */ +void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint16_t ADC_IT) +{ + uint8_t itmask = 0; + /* Check the parameters */ + assert_param(IS_ADC_ALL_PERIPH(ADCx)); + assert_param(IS_ADC_IT(ADC_IT)); + /* Get the ADC IT index */ + itmask = (uint8_t)(ADC_IT >> 8); + /* Clear the selected ADC interrupt pending bits */ + ADCx->SR = ~(uint32_t)itmask; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c index 997eecc9..3004b9ef 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_bkp.c @@ -1,308 +1,308 @@ -/** - ****************************************************************************** - * @file stm32f10x_bkp.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the BKP firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_bkp.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup BKP - * @brief BKP driver modules - * @{ - */ - -/** @defgroup BKP_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_Defines - * @{ - */ - -/* ------------ BKP registers bit address in the alias region --------------- */ -#define BKP_OFFSET (BKP_BASE - PERIPH_BASE) - -/* --- CR Register ----*/ - -/* Alias word address of TPAL bit */ -#define CR_OFFSET (BKP_OFFSET + 0x30) -#define TPAL_BitNumber 0x01 -#define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4)) - -/* Alias word address of TPE bit */ -#define TPE_BitNumber 0x00 -#define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of TPIE bit */ -#define CSR_OFFSET (BKP_OFFSET + 0x34) -#define TPIE_BitNumber 0x02 -#define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4)) - -/* Alias word address of TIF bit */ -#define TIF_BitNumber 0x09 -#define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4)) - -/* Alias word address of TEF bit */ -#define TEF_BitNumber 0x08 -#define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4)) - -/* ---------------------- BKP registers bit mask ------------------------ */ - -/* RTCCR register bit mask */ -#define RTCCR_CAL_MASK ((uint16_t)0xFF80) -#define RTCCR_MASK ((uint16_t)0xFC7F) - -/** - * @} - */ - - -/** @defgroup BKP_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup BKP_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the BKP peripheral registers to their default reset values. - * @param None - * @retval None - */ -void BKP_DeInit(void) -{ - RCC_BackupResetCmd(ENABLE); - RCC_BackupResetCmd(DISABLE); -} - -/** - * @brief Configures the Tamper Pin active level. - * @param BKP_TamperPinLevel: specifies the Tamper Pin active level. - * This parameter can be one of the following values: - * @arg BKP_TamperPinLevel_High: Tamper pin active on high level - * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level - * @retval None - */ -void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) -{ - /* Check the parameters */ - assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel)); - *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel; -} - -/** - * @brief Enables or disables the Tamper Pin activation. - * @param NewState: new state of the Tamper Pin activation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void BKP_TamperPinCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the Tamper Pin Interrupt. - * @param NewState: new state of the Tamper Pin Interrupt. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void BKP_ITConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState; -} - -/** - * @brief Select the RTC output source to output on the Tamper pin. - * @param BKP_RTCOutputSource: specifies the RTC output source. - * This parameter can be one of the following values: - * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin. - * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency - * divided by 64 on the Tamper pin. - * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on - * the Tamper pin. - * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on - * the Tamper pin. - * @retval None - */ -void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) -{ - uint16_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource)); - tmpreg = BKP->RTCCR; - /* Clear CCO, ASOE and ASOS bits */ - tmpreg &= RTCCR_MASK; - - /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */ - tmpreg |= BKP_RTCOutputSource; - /* Store the new value */ - BKP->RTCCR = tmpreg; -} - -/** - * @brief Sets RTC Clock Calibration value. - * @param CalibrationValue: specifies the RTC Clock Calibration value. - * This parameter must be a number between 0 and 0x7F. - * @retval None - */ -void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) -{ - uint16_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue)); - tmpreg = BKP->RTCCR; - /* Clear CAL[6:0] bits */ - tmpreg &= RTCCR_CAL_MASK; - /* Set CAL[6:0] bits according to CalibrationValue value */ - tmpreg |= CalibrationValue; - /* Store the new value */ - BKP->RTCCR = tmpreg; -} - -/** - * @brief Writes user data to the specified Data Backup Register. - * @param BKP_DR: specifies the Data Backup Register. - * This parameter can be BKP_DRx where x:[1, 42] - * @param Data: data to write - * @retval None - */ -void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_BKP_DR(BKP_DR)); - - tmp = (uint32_t)BKP_BASE; - tmp += BKP_DR; - - *(__IO uint32_t *) tmp = Data; -} - -/** - * @brief Reads data from the specified Data Backup Register. - * @param BKP_DR: specifies the Data Backup Register. - * This parameter can be BKP_DRx where x:[1, 42] - * @retval The content of the specified Data Backup Register - */ -uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_BKP_DR(BKP_DR)); - - tmp = (uint32_t)BKP_BASE; - tmp += BKP_DR; - - return (*(__IO uint16_t *) tmp); -} - -/** - * @brief Checks whether the Tamper Pin Event flag is set or not. - * @param None - * @retval The new state of the Tamper Pin Event flag (SET or RESET). - */ -FlagStatus BKP_GetFlagStatus(void) -{ - return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB); -} - -/** - * @brief Clears Tamper Pin Event pending flag. - * @param None - * @retval None - */ -void BKP_ClearFlag(void) -{ - /* Set CTE bit to clear Tamper Pin Event flag */ - BKP->CSR |= BKP_CSR_CTE; -} - -/** - * @brief Checks whether the Tamper Pin Interrupt has occurred or not. - * @param None - * @retval The new state of the Tamper Pin Interrupt (SET or RESET). - */ -ITStatus BKP_GetITStatus(void) -{ - return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB); -} - -/** - * @brief Clears Tamper Pin Interrupt pending bit. - * @param None - * @retval None - */ -void BKP_ClearITPendingBit(void) -{ - /* Set CTI bit to clear Tamper Pin Interrupt pending bit */ - BKP->CSR |= BKP_CSR_CTI; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_bkp.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the BKP firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_bkp.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup BKP + * @brief BKP driver modules + * @{ + */ + +/** @defgroup BKP_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_Defines + * @{ + */ + +/* ------------ BKP registers bit address in the alias region --------------- */ +#define BKP_OFFSET (BKP_BASE - PERIPH_BASE) + +/* --- CR Register ----*/ + +/* Alias word address of TPAL bit */ +#define CR_OFFSET (BKP_OFFSET + 0x30) +#define TPAL_BitNumber 0x01 +#define CR_TPAL_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPAL_BitNumber * 4)) + +/* Alias word address of TPE bit */ +#define TPE_BitNumber 0x00 +#define CR_TPE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (TPE_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of TPIE bit */ +#define CSR_OFFSET (BKP_OFFSET + 0x34) +#define TPIE_BitNumber 0x02 +#define CSR_TPIE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TPIE_BitNumber * 4)) + +/* Alias word address of TIF bit */ +#define TIF_BitNumber 0x09 +#define CSR_TIF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TIF_BitNumber * 4)) + +/* Alias word address of TEF bit */ +#define TEF_BitNumber 0x08 +#define CSR_TEF_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEF_BitNumber * 4)) + +/* ---------------------- BKP registers bit mask ------------------------ */ + +/* RTCCR register bit mask */ +#define RTCCR_CAL_MASK ((uint16_t)0xFF80) +#define RTCCR_MASK ((uint16_t)0xFC7F) + +/** + * @} + */ + + +/** @defgroup BKP_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup BKP_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the BKP peripheral registers to their default reset values. + * @param None + * @retval None + */ +void BKP_DeInit(void) +{ + RCC_BackupResetCmd(ENABLE); + RCC_BackupResetCmd(DISABLE); +} + +/** + * @brief Configures the Tamper Pin active level. + * @param BKP_TamperPinLevel: specifies the Tamper Pin active level. + * This parameter can be one of the following values: + * @arg BKP_TamperPinLevel_High: Tamper pin active on high level + * @arg BKP_TamperPinLevel_Low: Tamper pin active on low level + * @retval None + */ +void BKP_TamperPinLevelConfig(uint16_t BKP_TamperPinLevel) +{ + /* Check the parameters */ + assert_param(IS_BKP_TAMPER_PIN_LEVEL(BKP_TamperPinLevel)); + *(__IO uint32_t *) CR_TPAL_BB = BKP_TamperPinLevel; +} + +/** + * @brief Enables or disables the Tamper Pin activation. + * @param NewState: new state of the Tamper Pin activation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void BKP_TamperPinCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_TPE_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the Tamper Pin Interrupt. + * @param NewState: new state of the Tamper Pin Interrupt. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void BKP_ITConfig(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CSR_TPIE_BB = (uint32_t)NewState; +} + +/** + * @brief Select the RTC output source to output on the Tamper pin. + * @param BKP_RTCOutputSource: specifies the RTC output source. + * This parameter can be one of the following values: + * @arg BKP_RTCOutputSource_None: no RTC output on the Tamper pin. + * @arg BKP_RTCOutputSource_CalibClock: output the RTC clock with frequency + * divided by 64 on the Tamper pin. + * @arg BKP_RTCOutputSource_Alarm: output the RTC Alarm pulse signal on + * the Tamper pin. + * @arg BKP_RTCOutputSource_Second: output the RTC Second pulse signal on + * the Tamper pin. + * @retval None + */ +void BKP_RTCOutputConfig(uint16_t BKP_RTCOutputSource) +{ + uint16_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_BKP_RTC_OUTPUT_SOURCE(BKP_RTCOutputSource)); + tmpreg = BKP->RTCCR; + /* Clear CCO, ASOE and ASOS bits */ + tmpreg &= RTCCR_MASK; + + /* Set CCO, ASOE and ASOS bits according to BKP_RTCOutputSource value */ + tmpreg |= BKP_RTCOutputSource; + /* Store the new value */ + BKP->RTCCR = tmpreg; +} + +/** + * @brief Sets RTC Clock Calibration value. + * @param CalibrationValue: specifies the RTC Clock Calibration value. + * This parameter must be a number between 0 and 0x7F. + * @retval None + */ +void BKP_SetRTCCalibrationValue(uint8_t CalibrationValue) +{ + uint16_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_BKP_CALIBRATION_VALUE(CalibrationValue)); + tmpreg = BKP->RTCCR; + /* Clear CAL[6:0] bits */ + tmpreg &= RTCCR_CAL_MASK; + /* Set CAL[6:0] bits according to CalibrationValue value */ + tmpreg |= CalibrationValue; + /* Store the new value */ + BKP->RTCCR = tmpreg; +} + +/** + * @brief Writes user data to the specified Data Backup Register. + * @param BKP_DR: specifies the Data Backup Register. + * This parameter can be BKP_DRx where x:[1, 42] + * @param Data: data to write + * @retval None + */ +void BKP_WriteBackupRegister(uint16_t BKP_DR, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_BKP_DR(BKP_DR)); + + tmp = (uint32_t)BKP_BASE; + tmp += BKP_DR; + + *(__IO uint32_t *) tmp = Data; +} + +/** + * @brief Reads data from the specified Data Backup Register. + * @param BKP_DR: specifies the Data Backup Register. + * This parameter can be BKP_DRx where x:[1, 42] + * @retval The content of the specified Data Backup Register + */ +uint16_t BKP_ReadBackupRegister(uint16_t BKP_DR) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_BKP_DR(BKP_DR)); + + tmp = (uint32_t)BKP_BASE; + tmp += BKP_DR; + + return (*(__IO uint16_t *) tmp); +} + +/** + * @brief Checks whether the Tamper Pin Event flag is set or not. + * @param None + * @retval The new state of the Tamper Pin Event flag (SET or RESET). + */ +FlagStatus BKP_GetFlagStatus(void) +{ + return (FlagStatus)(*(__IO uint32_t *) CSR_TEF_BB); +} + +/** + * @brief Clears Tamper Pin Event pending flag. + * @param None + * @retval None + */ +void BKP_ClearFlag(void) +{ + /* Set CTE bit to clear Tamper Pin Event flag */ + BKP->CSR |= BKP_CSR_CTE; +} + +/** + * @brief Checks whether the Tamper Pin Interrupt has occurred or not. + * @param None + * @retval The new state of the Tamper Pin Interrupt (SET or RESET). + */ +ITStatus BKP_GetITStatus(void) +{ + return (ITStatus)(*(__IO uint32_t *) CSR_TIF_BB); +} + +/** + * @brief Clears Tamper Pin Interrupt pending bit. + * @param None + * @retval None + */ +void BKP_ClearITPendingBit(void) +{ + /* Set CTI bit to clear Tamper Pin Interrupt pending bit */ + BKP->CSR |= BKP_CSR_CTI; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c index ec8e0498..607d6924 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_can.c @@ -1,1415 +1,1415 @@ -/** - ****************************************************************************** - * @file stm32f10x_can.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the CAN firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_can.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup CAN - * @brief CAN driver modules - * @{ - */ - -/** @defgroup CAN_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_Defines - * @{ - */ - -/* CAN Master Control Register bits */ - -#define MCR_DBF ((uint32_t)0x00010000) /* software master reset */ - -/* CAN Mailbox Transmit Request */ -#define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ - -/* CAN Filter Master Register bits */ -#define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */ - -/* Time out for INAK bit */ -#define INAK_TIMEOUT ((uint32_t)0x0000FFFF) -/* Time out for SLAK bit */ -#define SLAK_TIMEOUT ((uint32_t)0x0000FFFF) - - - -/* Flags in TSR register */ -#define CAN_FLAGS_TSR ((uint32_t)0x08000000) -/* Flags in RF1R register */ -#define CAN_FLAGS_RF1R ((uint32_t)0x04000000) -/* Flags in RF0R register */ -#define CAN_FLAGS_RF0R ((uint32_t)0x02000000) -/* Flags in MSR register */ -#define CAN_FLAGS_MSR ((uint32_t)0x01000000) -/* Flags in ESR register */ -#define CAN_FLAGS_ESR ((uint32_t)0x00F00000) - -/* Mailboxes definition */ -#define CAN_TXMAILBOX_0 ((uint8_t)0x00) -#define CAN_TXMAILBOX_1 ((uint8_t)0x01) -#define CAN_TXMAILBOX_2 ((uint8_t)0x02) - - - -#define CAN_MODE_MASK ((uint32_t) 0x00000003) -/** - * @} - */ - -/** @defgroup CAN_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_FunctionPrototypes - * @{ - */ - -static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit); - -/** - * @} - */ - -/** @defgroup CAN_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the CAN peripheral registers to their default reset values. - * @param CANx: where x can be 1 or 2 to select the CAN peripheral. - * @retval None. - */ -void CAN_DeInit(CAN_TypeDef* CANx) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - if (CANx == CAN1) - { - /* Enable CAN1 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); - /* Release CAN1 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); - } - else - { - /* Enable CAN2 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE); - /* Release CAN2 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE); - } -} - -/** - * @brief Initializes the CAN peripheral according to the specified - * parameters in the CAN_InitStruct. - * @param CANx: where x can be 1 or 2 to to select the CAN - * peripheral. - * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that - * contains the configuration information for the - * CAN peripheral. - * @retval Constant indicates initialization succeed which will be - * CAN_InitStatus_Failed or CAN_InitStatus_Success. - */ -uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct) -{ - uint8_t InitStatus = CAN_InitStatus_Failed; - uint32_t wait_ack = 0x00000000; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM)); - assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP)); - assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode)); - assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW)); - assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1)); - assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2)); - assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler)); - - /* Exit from sleep mode */ - CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP); - - /* Request initialisation */ - CANx->MCR |= CAN_MCR_INRQ ; - - /* Wait the acknowledge */ - while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) - { - wait_ack++; - } - - /* Check acknowledge */ - if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) - { - InitStatus = CAN_InitStatus_Failed; - } - else - { - /* Set the time triggered communication mode */ - if (CAN_InitStruct->CAN_TTCM == ENABLE) - { - CANx->MCR |= CAN_MCR_TTCM; - } - else - { - CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM; - } - - /* Set the automatic bus-off management */ - if (CAN_InitStruct->CAN_ABOM == ENABLE) - { - CANx->MCR |= CAN_MCR_ABOM; - } - else - { - CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM; - } - - /* Set the automatic wake-up mode */ - if (CAN_InitStruct->CAN_AWUM == ENABLE) - { - CANx->MCR |= CAN_MCR_AWUM; - } - else - { - CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM; - } - - /* Set the no automatic retransmission */ - if (CAN_InitStruct->CAN_NART == ENABLE) - { - CANx->MCR |= CAN_MCR_NART; - } - else - { - CANx->MCR &= ~(uint32_t)CAN_MCR_NART; - } - - /* Set the receive FIFO locked mode */ - if (CAN_InitStruct->CAN_RFLM == ENABLE) - { - CANx->MCR |= CAN_MCR_RFLM; - } - else - { - CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM; - } - - /* Set the transmit FIFO priority */ - if (CAN_InitStruct->CAN_TXFP == ENABLE) - { - CANx->MCR |= CAN_MCR_TXFP; - } - else - { - CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP; - } - - /* Set the bit timing register */ - CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \ - ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \ - ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \ - ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \ - ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1); - - /* Request leave initialisation */ - CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ; - - /* Wait the acknowledge */ - wait_ack = 0; - - while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) - { - wait_ack++; - } - - /* ...and check acknowledged */ - if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) - { - InitStatus = CAN_InitStatus_Failed; - } - else - { - InitStatus = CAN_InitStatus_Success ; - } - } - - /* At this step, return the status of initialization */ - return InitStatus; -} - -/** - * @brief Initializes the CAN peripheral according to the specified - * parameters in the CAN_FilterInitStruct. - * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef - * structure that contains the configuration - * information. - * @retval None. - */ -void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct) -{ - uint32_t filter_number_bit_pos = 0; - /* Check the parameters */ - assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber)); - assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode)); - assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale)); - assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment)); - assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation)); - - filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber; - - /* Initialisation mode for the filter */ - CAN1->FMR |= FMR_FINIT; - - /* Filter Deactivation */ - CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos; - - /* Filter Scale */ - if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit) - { - /* 16-bit scale for the filter */ - CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos; - - /* First 16-bit identifier and First 16-bit mask */ - /* Or First 16-bit identifier and Second 16-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); - - /* Second 16-bit identifier and Second 16-bit mask */ - /* Or Third 16-bit identifier and Fourth 16-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh); - } - - if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit) - { - /* 32-bit scale for the filter */ - CAN1->FS1R |= filter_number_bit_pos; - /* 32-bit identifier or First 32-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); - /* 32-bit mask or Second 32-bit identifier */ - CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = - ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | - (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow); - } - - /* Filter Mode */ - if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask) - { - /*Id/Mask mode for the filter*/ - CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos; - } - else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ - { - /*Identifier list mode for the filter*/ - CAN1->FM1R |= (uint32_t)filter_number_bit_pos; - } - - /* Filter FIFO assignment */ - if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0) - { - /* FIFO 0 assignation for the filter */ - CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos; - } - - if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1) - { - /* FIFO 1 assignation for the filter */ - CAN1->FFA1R |= (uint32_t)filter_number_bit_pos; - } - - /* Filter activation */ - if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE) - { - CAN1->FA1R |= filter_number_bit_pos; - } - - /* Leave the initialisation mode for the filter */ - CAN1->FMR &= ~FMR_FINIT; -} - -/** - * @brief Fills each CAN_InitStruct member with its default value. - * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which - * will be initialized. - * @retval None. - */ -void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct) -{ - /* Reset CAN init structure parameters values */ - - /* Initialize the time triggered communication mode */ - CAN_InitStruct->CAN_TTCM = DISABLE; - - /* Initialize the automatic bus-off management */ - CAN_InitStruct->CAN_ABOM = DISABLE; - - /* Initialize the automatic wake-up mode */ - CAN_InitStruct->CAN_AWUM = DISABLE; - - /* Initialize the no automatic retransmission */ - CAN_InitStruct->CAN_NART = DISABLE; - - /* Initialize the receive FIFO locked mode */ - CAN_InitStruct->CAN_RFLM = DISABLE; - - /* Initialize the transmit FIFO priority */ - CAN_InitStruct->CAN_TXFP = DISABLE; - - /* Initialize the CAN_Mode member */ - CAN_InitStruct->CAN_Mode = CAN_Mode_Normal; - - /* Initialize the CAN_SJW member */ - CAN_InitStruct->CAN_SJW = CAN_SJW_1tq; - - /* Initialize the CAN_BS1 member */ - CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq; - - /* Initialize the CAN_BS2 member */ - CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq; - - /* Initialize the CAN_Prescaler member */ - CAN_InitStruct->CAN_Prescaler = 1; -} - -/** - * @brief Select the start bank filter for slave CAN. - * @note This function applies only to STM32 Connectivity line devices. - * @param CAN_BankNumber: Select the start slave bank filter from 1..27. - * @retval None. - */ -void CAN_SlaveStartBank(uint8_t CAN_BankNumber) -{ - /* Check the parameters */ - assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber)); - - /* Enter Initialisation mode for the filter */ - CAN1->FMR |= FMR_FINIT; - - /* Select the start slave bank */ - CAN1->FMR &= (uint32_t)0xFFFFC0F1 ; - CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8; - - /* Leave Initialisation mode for the filter */ - CAN1->FMR &= ~FMR_FINIT; -} - -/** - * @brief Enables or disables the DBG Freeze for CAN. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param NewState: new state of the CAN peripheral. This parameter can - * be: ENABLE or DISABLE. - * @retval None. - */ -void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable Debug Freeze */ - CANx->MCR |= MCR_DBF; - } - else - { - /* Disable Debug Freeze */ - CANx->MCR &= ~MCR_DBF; - } -} - - -/** - * @brief Enables or disabes the CAN Time TriggerOperation communication mode. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param NewState : Mode new state , can be one of @ref FunctionalState. - * @note when enabled, Time stamp (TIME[15:0]) value is sent in the last - * two data bytes of the 8-byte message: TIME[7:0] in data byte 6 - * and TIME[15:8] in data byte 7 - * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be - * sent over the CAN bus. - * @retval None - */ -void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the TTCM mode */ - CANx->MCR |= CAN_MCR_TTCM; - - /* Set TGT bits */ - CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT); - CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT); - CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT); - } - else - { - /* Disable the TTCM mode */ - CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM); - - /* Reset TGT bits */ - CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT); - CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT); - CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT); - } -} -/** - * @brief Initiates the transmission of a message. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param TxMessage: pointer to a structure which contains CAN Id, CAN - * DLC and CAN data. - * @retval The number of the mailbox that is used for transmission - * or CAN_TxStatus_NoMailBox if there is no empty mailbox. - */ -uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage) -{ - uint8_t transmit_mailbox = 0; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_IDTYPE(TxMessage->IDE)); - assert_param(IS_CAN_RTR(TxMessage->RTR)); - assert_param(IS_CAN_DLC(TxMessage->DLC)); - - /* Select one empty transmit mailbox */ - if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) - { - transmit_mailbox = 0; - } - else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) - { - transmit_mailbox = 1; - } - else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) - { - transmit_mailbox = 2; - } - else - { - transmit_mailbox = CAN_TxStatus_NoMailBox; - } - - if (transmit_mailbox != CAN_TxStatus_NoMailBox) - { - /* Set up the Id */ - CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ; - if (TxMessage->IDE == CAN_Id_Standard) - { - assert_param(IS_CAN_STDID(TxMessage->StdId)); - CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \ - TxMessage->RTR); - } - else - { - assert_param(IS_CAN_EXTID(TxMessage->ExtId)); - CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \ - TxMessage->IDE | \ - TxMessage->RTR); - } - - /* Set up the DLC */ - TxMessage->DLC &= (uint8_t)0x0000000F; - CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0; - CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC; - - /* Set up the data field */ - CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | - ((uint32_t)TxMessage->Data[2] << 16) | - ((uint32_t)TxMessage->Data[1] << 8) | - ((uint32_t)TxMessage->Data[0])); - CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | - ((uint32_t)TxMessage->Data[6] << 16) | - ((uint32_t)TxMessage->Data[5] << 8) | - ((uint32_t)TxMessage->Data[4])); - /* Request transmission */ - CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ; - } - return transmit_mailbox; -} - -/** - * @brief Checks the transmission of a message. - * @param CANx: where x can be 1 or 2 to to select the - * CAN peripheral. - * @param TransmitMailbox: the number of the mailbox that is used for - * transmission. - * @retval CAN_TxStatus_Ok if the CAN driver transmits the message, CAN_TxStatus_Failed - * in an other case. - */ -uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox) -{ - uint32_t state = 0; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox)); - - switch (TransmitMailbox) - { - case (CAN_TXMAILBOX_0): - state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0); - break; - case (CAN_TXMAILBOX_1): - state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1); - break; - case (CAN_TXMAILBOX_2): - state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2); - break; - default: - state = CAN_TxStatus_Failed; - break; - } - switch (state) - { - /* transmit pending */ - case (0x0): state = CAN_TxStatus_Pending; - break; - /* transmit failed */ - case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed; - break; - case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed; - break; - case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed; - break; - /* transmit succeeded */ - case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok; - break; - case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok; - break; - case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok; - break; - default: state = CAN_TxStatus_Failed; - break; - } - return (uint8_t) state; -} - -/** - * @brief Cancels a transmit request. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param Mailbox: Mailbox number. - * @retval None. - */ -void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox)); - /* abort transmission */ - switch (Mailbox) - { - case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0; - break; - case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1; - break; - case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2; - break; - default: - break; - } -} - - -/** - * @brief Receives a message. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. - * @param RxMessage: pointer to a structure receive message which contains - * CAN Id, CAN DLC, CAN datas and FMI number. - * @retval None. - */ -void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FIFO(FIFONumber)); - /* Get the Id */ - RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR; - if (RxMessage->IDE == CAN_Id_Standard) - { - RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21); - } - else - { - RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3); - } - - RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR; - /* Get the DLC */ - RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR; - /* Get the FMI */ - RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8); - /* Get the data field */ - RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR; - RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8); - RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16); - RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24); - RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR; - RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8); - RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16); - RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24); - /* Release the FIFO */ - /* Release FIFO0 */ - if (FIFONumber == CAN_FIFO0) - { - CANx->RF0R |= CAN_RF0R_RFOM0; - } - /* Release FIFO1 */ - else /* FIFONumber == CAN_FIFO1 */ - { - CANx->RF1R |= CAN_RF1R_RFOM1; - } -} - -/** - * @brief Releases the specified FIFO. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1. - * @retval None. - */ -void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FIFO(FIFONumber)); - /* Release FIFO0 */ - if (FIFONumber == CAN_FIFO0) - { - CANx->RF0R |= CAN_RF0R_RFOM0; - } - /* Release FIFO1 */ - else /* FIFONumber == CAN_FIFO1 */ - { - CANx->RF1R |= CAN_RF1R_RFOM1; - } -} - -/** - * @brief Returns the number of pending messages. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. - * @retval NbMessage : which is the number of pending message. - */ -uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber) -{ - uint8_t message_pending=0; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_FIFO(FIFONumber)); - if (FIFONumber == CAN_FIFO0) - { - message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03); - } - else if (FIFONumber == CAN_FIFO1) - { - message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03); - } - else - { - message_pending = 0; - } - return message_pending; -} - - -/** - * @brief Select the CAN Operation mode. - * @param CAN_OperatingMode : CAN Operating Mode. This parameter can be one - * of @ref CAN_OperatingMode_TypeDef enumeration. - * @retval status of the requested mode which can be - * - CAN_ModeStatus_Failed CAN failed entering the specific mode - * - CAN_ModeStatus_Success CAN Succeed entering the specific mode - - */ -uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode) -{ - uint8_t status = CAN_ModeStatus_Failed; - - /* Timeout for INAK or also for SLAK bits*/ - uint32_t timeout = INAK_TIMEOUT; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode)); - - if (CAN_OperatingMode == CAN_OperatingMode_Initialization) - { - /* Request initialisation */ - CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ); - - /* Wait the acknowledge */ - while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0)) - { - timeout--; - } - if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) - { - status = CAN_ModeStatus_Failed; - } - else - { - status = CAN_ModeStatus_Success; - } - } - else if (CAN_OperatingMode == CAN_OperatingMode_Normal) - { - /* Request leave initialisation and sleep mode and enter Normal mode */ - CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ)); - - /* Wait the acknowledge */ - while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0)) - { - timeout--; - } - if ((CANx->MSR & CAN_MODE_MASK) != 0) - { - status = CAN_ModeStatus_Failed; - } - else - { - status = CAN_ModeStatus_Success; - } - } - else if (CAN_OperatingMode == CAN_OperatingMode_Sleep) - { - /* Request Sleep mode */ - CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); - - /* Wait the acknowledge */ - while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0)) - { - timeout--; - } - if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) - { - status = CAN_ModeStatus_Failed; - } - else - { - status = CAN_ModeStatus_Success; - } - } - else - { - status = CAN_ModeStatus_Failed; - } - - return (uint8_t) status; -} - -/** - * @brief Enters the low power mode. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval status: CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed in an - * other case. - */ -uint8_t CAN_Sleep(CAN_TypeDef* CANx) -{ - uint8_t sleepstatus = CAN_Sleep_Failed; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Request Sleep mode */ - CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); - - /* Sleep mode status */ - if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK) - { - /* Sleep mode not entered */ - sleepstatus = CAN_Sleep_Ok; - } - /* return sleep mode status */ - return (uint8_t)sleepstatus; -} - -/** - * @brief Wakes the CAN up. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval status: CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed in an - * other case. - */ -uint8_t CAN_WakeUp(CAN_TypeDef* CANx) -{ - uint32_t wait_slak = SLAK_TIMEOUT; - uint8_t wakeupstatus = CAN_WakeUp_Failed; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Wake up request */ - CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP; - - /* Sleep mode status */ - while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00)) - { - wait_slak--; - } - if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK) - { - /* wake up done : Sleep mode exited */ - wakeupstatus = CAN_WakeUp_Ok; - } - /* return wakeup status */ - return (uint8_t)wakeupstatus; -} - - -/** - * @brief Returns the CANx's last error code (LEC). - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval CAN_ErrorCode: specifies the Error code : - * - CAN_ERRORCODE_NoErr No Error - * - CAN_ERRORCODE_StuffErr Stuff Error - * - CAN_ERRORCODE_FormErr Form Error - * - CAN_ERRORCODE_ACKErr Acknowledgment Error - * - CAN_ERRORCODE_BitRecessiveErr Bit Recessive Error - * - CAN_ERRORCODE_BitDominantErr Bit Dominant Error - * - CAN_ERRORCODE_CRCErr CRC Error - * - CAN_ERRORCODE_SoftwareSetErr Software Set Error - */ - -uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx) -{ - uint8_t errorcode=0; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Get the error code*/ - errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC); - - /* Return the error code*/ - return errorcode; -} -/** - * @brief Returns the CANx Receive Error Counter (REC). - * @note In case of an error during reception, this counter is incremented - * by 1 or by 8 depending on the error condition as defined by the CAN - * standard. After every successful reception, the counter is - * decremented by 1 or reset to 120 if its value was higher than 128. - * When the counter value exceeds 127, the CAN controller enters the - * error passive state. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval CAN Receive Error Counter. - */ -uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx) -{ - uint8_t counter=0; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Get the Receive Error Counter*/ - counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24); - - /* Return the Receive Error Counter*/ - return counter; -} - - -/** - * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC). - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @retval LSB of the 9-bit CAN Transmit Error Counter. - */ -uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx) -{ - uint8_t counter=0; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - - /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ - counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16); - - /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ - return counter; -} - - -/** - * @brief Enables or disables the specified CANx interrupts. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled. - * This parameter can be: - * - CAN_IT_TME, - * - CAN_IT_FMP0, - * - CAN_IT_FF0, - * - CAN_IT_FOV0, - * - CAN_IT_FMP1, - * - CAN_IT_FF1, - * - CAN_IT_FOV1, - * - CAN_IT_EWG, - * - CAN_IT_EPV, - * - CAN_IT_LEC, - * - CAN_IT_ERR, - * - CAN_IT_WKU or - * - CAN_IT_SLK. - * @param NewState: new state of the CAN interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_IT(CAN_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected CANx interrupt */ - CANx->IER |= CAN_IT; - } - else - { - /* Disable the selected CANx interrupt */ - CANx->IER &= ~CAN_IT; - } -} -/** - * @brief Checks whether the specified CAN flag is set or not. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_FLAG: specifies the flag to check. - * This parameter can be one of the following flags: - * - CAN_FLAG_EWG - * - CAN_FLAG_EPV - * - CAN_FLAG_BOF - * - CAN_FLAG_RQCP0 - * - CAN_FLAG_RQCP1 - * - CAN_FLAG_RQCP2 - * - CAN_FLAG_FMP1 - * - CAN_FLAG_FF1 - * - CAN_FLAG_FOV1 - * - CAN_FLAG_FMP0 - * - CAN_FLAG_FF0 - * - CAN_FLAG_FOV0 - * - CAN_FLAG_WKU - * - CAN_FLAG_SLAK - * - CAN_FLAG_LEC - * @retval The new state of CAN_FLAG (SET or RESET). - */ -FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG) -{ - FlagStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_GET_FLAG(CAN_FLAG)); - - - if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET) - { - /* Check the status of the specified CAN flag */ - if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) - { - /* CAN_FLAG is set */ - bitstatus = SET; - } - else - { - /* CAN_FLAG is reset */ - bitstatus = RESET; - } - } - else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET) - { - /* Check the status of the specified CAN flag */ - if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) - { - /* CAN_FLAG is set */ - bitstatus = SET; - } - else - { - /* CAN_FLAG is reset */ - bitstatus = RESET; - } - } - else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET) - { - /* Check the status of the specified CAN flag */ - if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) - { - /* CAN_FLAG is set */ - bitstatus = SET; - } - else - { - /* CAN_FLAG is reset */ - bitstatus = RESET; - } - } - else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET) - { - /* Check the status of the specified CAN flag */ - if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) - { - /* CAN_FLAG is set */ - bitstatus = SET; - } - else - { - /* CAN_FLAG is reset */ - bitstatus = RESET; - } - } - else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */ - { - /* Check the status of the specified CAN flag */ - if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) - { - /* CAN_FLAG is set */ - bitstatus = SET; - } - else - { - /* CAN_FLAG is reset */ - bitstatus = RESET; - } - } - /* Return the CAN_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the CAN's pending flags. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_FLAG: specifies the flag to clear. - * This parameter can be one of the following flags: - * - CAN_FLAG_RQCP0 - * - CAN_FLAG_RQCP1 - * - CAN_FLAG_RQCP2 - * - CAN_FLAG_FF1 - * - CAN_FLAG_FOV1 - * - CAN_FLAG_FF0 - * - CAN_FLAG_FOV0 - * - CAN_FLAG_WKU - * - CAN_FLAG_SLAK - * - CAN_FLAG_LEC - * @retval None. - */ -void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG) -{ - uint32_t flagtmp=0; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG)); - - if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */ - { - /* Clear the selected CAN flags */ - CANx->ESR = (uint32_t)RESET; - } - else /* MSR or TSR or RF0R or RF1R */ - { - flagtmp = CAN_FLAG & 0x000FFFFF; - - if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET) - { - /* Receive Flags */ - CANx->RF0R = (uint32_t)(flagtmp); - } - else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET) - { - /* Receive Flags */ - CANx->RF1R = (uint32_t)(flagtmp); - } - else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET) - { - /* Transmit Flags */ - CANx->TSR = (uint32_t)(flagtmp); - } - else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */ - { - /* Operating mode Flags */ - CANx->MSR = (uint32_t)(flagtmp); - } - } -} - -/** - * @brief Checks whether the specified CANx interrupt has occurred or not. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_IT: specifies the CAN interrupt source to check. - * This parameter can be one of the following flags: - * - CAN_IT_TME - * - CAN_IT_FMP0 - * - CAN_IT_FF0 - * - CAN_IT_FOV0 - * - CAN_IT_FMP1 - * - CAN_IT_FF1 - * - CAN_IT_FOV1 - * - CAN_IT_WKU - * - CAN_IT_SLK - * - CAN_IT_EWG - * - CAN_IT_EPV - * - CAN_IT_BOF - * - CAN_IT_LEC - * - CAN_IT_ERR - * @retval The current state of CAN_IT (SET or RESET). - */ -ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT) -{ - ITStatus itstatus = RESET; - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_IT(CAN_IT)); - - /* check the enable interrupt bit */ - if((CANx->IER & CAN_IT) != RESET) - { - /* in case the Interrupt is enabled, .... */ - switch (CAN_IT) - { - case CAN_IT_TME: - /* Check CAN_TSR_RQCPx bits */ - itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2); - break; - case CAN_IT_FMP0: - /* Check CAN_RF0R_FMP0 bit */ - itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0); - break; - case CAN_IT_FF0: - /* Check CAN_RF0R_FULL0 bit */ - itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0); - break; - case CAN_IT_FOV0: - /* Check CAN_RF0R_FOVR0 bit */ - itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0); - break; - case CAN_IT_FMP1: - /* Check CAN_RF1R_FMP1 bit */ - itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1); - break; - case CAN_IT_FF1: - /* Check CAN_RF1R_FULL1 bit */ - itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1); - break; - case CAN_IT_FOV1: - /* Check CAN_RF1R_FOVR1 bit */ - itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1); - break; - case CAN_IT_WKU: - /* Check CAN_MSR_WKUI bit */ - itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI); - break; - case CAN_IT_SLK: - /* Check CAN_MSR_SLAKI bit */ - itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI); - break; - case CAN_IT_EWG: - /* Check CAN_ESR_EWGF bit */ - itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF); - break; - case CAN_IT_EPV: - /* Check CAN_ESR_EPVF bit */ - itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF); - break; - case CAN_IT_BOF: - /* Check CAN_ESR_BOFF bit */ - itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF); - break; - case CAN_IT_LEC: - /* Check CAN_ESR_LEC bit */ - itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC); - break; - case CAN_IT_ERR: - /* Check CAN_MSR_ERRI bit */ - itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI); - break; - default : - /* in case of error, return RESET */ - itstatus = RESET; - break; - } - } - else - { - /* in case the Interrupt is not enabled, return RESET */ - itstatus = RESET; - } - - /* Return the CAN_IT status */ - return itstatus; -} - -/** - * @brief Clears the CANx's interrupt pending bits. - * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. - * @param CAN_IT: specifies the interrupt pending bit to clear. - * - CAN_IT_TME - * - CAN_IT_FF0 - * - CAN_IT_FOV0 - * - CAN_IT_FF1 - * - CAN_IT_FOV1 - * - CAN_IT_WKU - * - CAN_IT_SLK - * - CAN_IT_EWG - * - CAN_IT_EPV - * - CAN_IT_BOF - * - CAN_IT_LEC - * - CAN_IT_ERR - * @retval None. - */ -void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT) -{ - /* Check the parameters */ - assert_param(IS_CAN_ALL_PERIPH(CANx)); - assert_param(IS_CAN_CLEAR_IT(CAN_IT)); - - switch (CAN_IT) - { - case CAN_IT_TME: - /* Clear CAN_TSR_RQCPx (rc_w1)*/ - CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2; - break; - case CAN_IT_FF0: - /* Clear CAN_RF0R_FULL0 (rc_w1)*/ - CANx->RF0R = CAN_RF0R_FULL0; - break; - case CAN_IT_FOV0: - /* Clear CAN_RF0R_FOVR0 (rc_w1)*/ - CANx->RF0R = CAN_RF0R_FOVR0; - break; - case CAN_IT_FF1: - /* Clear CAN_RF1R_FULL1 (rc_w1)*/ - CANx->RF1R = CAN_RF1R_FULL1; - break; - case CAN_IT_FOV1: - /* Clear CAN_RF1R_FOVR1 (rc_w1)*/ - CANx->RF1R = CAN_RF1R_FOVR1; - break; - case CAN_IT_WKU: - /* Clear CAN_MSR_WKUI (rc_w1)*/ - CANx->MSR = CAN_MSR_WKUI; - break; - case CAN_IT_SLK: - /* Clear CAN_MSR_SLAKI (rc_w1)*/ - CANx->MSR = CAN_MSR_SLAKI; - break; - case CAN_IT_EWG: - /* Clear CAN_MSR_ERRI (rc_w1) */ - CANx->MSR = CAN_MSR_ERRI; - /* Note : the corresponding Flag is cleared by hardware depending - of the CAN Bus status*/ - break; - case CAN_IT_EPV: - /* Clear CAN_MSR_ERRI (rc_w1) */ - CANx->MSR = CAN_MSR_ERRI; - /* Note : the corresponding Flag is cleared by hardware depending - of the CAN Bus status*/ - break; - case CAN_IT_BOF: - /* Clear CAN_MSR_ERRI (rc_w1) */ - CANx->MSR = CAN_MSR_ERRI; - /* Note : the corresponding Flag is cleared by hardware depending - of the CAN Bus status*/ - break; - case CAN_IT_LEC: - /* Clear LEC bits */ - CANx->ESR = RESET; - /* Clear CAN_MSR_ERRI (rc_w1) */ - CANx->MSR = CAN_MSR_ERRI; - break; - case CAN_IT_ERR: - /*Clear LEC bits */ - CANx->ESR = RESET; - /* Clear CAN_MSR_ERRI (rc_w1) */ - CANx->MSR = CAN_MSR_ERRI; - /* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending - of the CAN Bus status*/ - break; - default : - break; - } -} - -/** - * @brief Checks whether the CAN interrupt has occurred or not. - * @param CAN_Reg: specifies the CAN interrupt register to check. - * @param It_Bit: specifies the interrupt source bit to check. - * @retval The new state of the CAN Interrupt (SET or RESET). - */ -static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit) -{ - ITStatus pendingbitstatus = RESET; - - if ((CAN_Reg & It_Bit) != (uint32_t)RESET) - { - /* CAN_IT is set */ - pendingbitstatus = SET; - } - else - { - /* CAN_IT is reset */ - pendingbitstatus = RESET; - } - return pendingbitstatus; -} - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_can.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the CAN firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_can.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup CAN + * @brief CAN driver modules + * @{ + */ + +/** @defgroup CAN_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Private_Defines + * @{ + */ + +/* CAN Master Control Register bits */ + +#define MCR_DBF ((uint32_t)0x00010000) /* software master reset */ + +/* CAN Mailbox Transmit Request */ +#define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ + +/* CAN Filter Master Register bits */ +#define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */ + +/* Time out for INAK bit */ +#define INAK_TIMEOUT ((uint32_t)0x0000FFFF) +/* Time out for SLAK bit */ +#define SLAK_TIMEOUT ((uint32_t)0x0000FFFF) + + + +/* Flags in TSR register */ +#define CAN_FLAGS_TSR ((uint32_t)0x08000000) +/* Flags in RF1R register */ +#define CAN_FLAGS_RF1R ((uint32_t)0x04000000) +/* Flags in RF0R register */ +#define CAN_FLAGS_RF0R ((uint32_t)0x02000000) +/* Flags in MSR register */ +#define CAN_FLAGS_MSR ((uint32_t)0x01000000) +/* Flags in ESR register */ +#define CAN_FLAGS_ESR ((uint32_t)0x00F00000) + +/* Mailboxes definition */ +#define CAN_TXMAILBOX_0 ((uint8_t)0x00) +#define CAN_TXMAILBOX_1 ((uint8_t)0x01) +#define CAN_TXMAILBOX_2 ((uint8_t)0x02) + + + +#define CAN_MODE_MASK ((uint32_t) 0x00000003) +/** + * @} + */ + +/** @defgroup CAN_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup CAN_Private_FunctionPrototypes + * @{ + */ + +static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit); + +/** + * @} + */ + +/** @defgroup CAN_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the CAN peripheral registers to their default reset values. + * @param CANx: where x can be 1 or 2 to select the CAN peripheral. + * @retval None. + */ +void CAN_DeInit(CAN_TypeDef* CANx) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + if (CANx == CAN1) + { + /* Enable CAN1 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); + /* Release CAN1 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); + } + else + { + /* Enable CAN2 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE); + /* Release CAN2 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE); + } +} + +/** + * @brief Initializes the CAN peripheral according to the specified + * parameters in the CAN_InitStruct. + * @param CANx: where x can be 1 or 2 to to select the CAN + * peripheral. + * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that + * contains the configuration information for the + * CAN peripheral. + * @retval Constant indicates initialization succeed which will be + * CAN_InitStatus_Failed or CAN_InitStatus_Success. + */ +uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct) +{ + uint8_t InitStatus = CAN_InitStatus_Failed; + uint32_t wait_ack = 0x00000000; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM)); + assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP)); + assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode)); + assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW)); + assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1)); + assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2)); + assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler)); + + /* Exit from sleep mode */ + CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP); + + /* Request initialisation */ + CANx->MCR |= CAN_MCR_INRQ ; + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) + { + wait_ack++; + } + + /* Check acknowledge */ + if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) + { + InitStatus = CAN_InitStatus_Failed; + } + else + { + /* Set the time triggered communication mode */ + if (CAN_InitStruct->CAN_TTCM == ENABLE) + { + CANx->MCR |= CAN_MCR_TTCM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM; + } + + /* Set the automatic bus-off management */ + if (CAN_InitStruct->CAN_ABOM == ENABLE) + { + CANx->MCR |= CAN_MCR_ABOM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM; + } + + /* Set the automatic wake-up mode */ + if (CAN_InitStruct->CAN_AWUM == ENABLE) + { + CANx->MCR |= CAN_MCR_AWUM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM; + } + + /* Set the no automatic retransmission */ + if (CAN_InitStruct->CAN_NART == ENABLE) + { + CANx->MCR |= CAN_MCR_NART; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_NART; + } + + /* Set the receive FIFO locked mode */ + if (CAN_InitStruct->CAN_RFLM == ENABLE) + { + CANx->MCR |= CAN_MCR_RFLM; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM; + } + + /* Set the transmit FIFO priority */ + if (CAN_InitStruct->CAN_TXFP == ENABLE) + { + CANx->MCR |= CAN_MCR_TXFP; + } + else + { + CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP; + } + + /* Set the bit timing register */ + CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \ + ((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \ + ((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \ + ((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \ + ((uint32_t)CAN_InitStruct->CAN_Prescaler - 1); + + /* Request leave initialisation */ + CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ; + + /* Wait the acknowledge */ + wait_ack = 0; + + while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT)) + { + wait_ack++; + } + + /* ...and check acknowledged */ + if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) + { + InitStatus = CAN_InitStatus_Failed; + } + else + { + InitStatus = CAN_InitStatus_Success ; + } + } + + /* At this step, return the status of initialization */ + return InitStatus; +} + +/** + * @brief Initializes the CAN peripheral according to the specified + * parameters in the CAN_FilterInitStruct. + * @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef + * structure that contains the configuration + * information. + * @retval None. + */ +void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct) +{ + uint32_t filter_number_bit_pos = 0; + /* Check the parameters */ + assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber)); + assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode)); + assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale)); + assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment)); + assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation)); + + filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber; + + /* Initialisation mode for the filter */ + CAN1->FMR |= FMR_FINIT; + + /* Filter Deactivation */ + CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos; + + /* Filter Scale */ + if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit) + { + /* 16-bit scale for the filter */ + CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos; + + /* First 16-bit identifier and First 16-bit mask */ + /* Or First 16-bit identifier and Second 16-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); + + /* Second 16-bit identifier and Second 16-bit mask */ + /* Or Third 16-bit identifier and Fourth 16-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh); + } + + if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit) + { + /* 32-bit scale for the filter */ + CAN1->FS1R |= filter_number_bit_pos; + /* 32-bit identifier or First 32-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow); + /* 32-bit mask or Second 32-bit identifier */ + CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = + ((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | + (0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow); + } + + /* Filter Mode */ + if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask) + { + /*Id/Mask mode for the filter*/ + CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos; + } + else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ + { + /*Identifier list mode for the filter*/ + CAN1->FM1R |= (uint32_t)filter_number_bit_pos; + } + + /* Filter FIFO assignment */ + if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0) + { + /* FIFO 0 assignation for the filter */ + CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos; + } + + if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1) + { + /* FIFO 1 assignation for the filter */ + CAN1->FFA1R |= (uint32_t)filter_number_bit_pos; + } + + /* Filter activation */ + if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE) + { + CAN1->FA1R |= filter_number_bit_pos; + } + + /* Leave the initialisation mode for the filter */ + CAN1->FMR &= ~FMR_FINIT; +} + +/** + * @brief Fills each CAN_InitStruct member with its default value. + * @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure which + * will be initialized. + * @retval None. + */ +void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct) +{ + /* Reset CAN init structure parameters values */ + + /* Initialize the time triggered communication mode */ + CAN_InitStruct->CAN_TTCM = DISABLE; + + /* Initialize the automatic bus-off management */ + CAN_InitStruct->CAN_ABOM = DISABLE; + + /* Initialize the automatic wake-up mode */ + CAN_InitStruct->CAN_AWUM = DISABLE; + + /* Initialize the no automatic retransmission */ + CAN_InitStruct->CAN_NART = DISABLE; + + /* Initialize the receive FIFO locked mode */ + CAN_InitStruct->CAN_RFLM = DISABLE; + + /* Initialize the transmit FIFO priority */ + CAN_InitStruct->CAN_TXFP = DISABLE; + + /* Initialize the CAN_Mode member */ + CAN_InitStruct->CAN_Mode = CAN_Mode_Normal; + + /* Initialize the CAN_SJW member */ + CAN_InitStruct->CAN_SJW = CAN_SJW_1tq; + + /* Initialize the CAN_BS1 member */ + CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq; + + /* Initialize the CAN_BS2 member */ + CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq; + + /* Initialize the CAN_Prescaler member */ + CAN_InitStruct->CAN_Prescaler = 1; +} + +/** + * @brief Select the start bank filter for slave CAN. + * @note This function applies only to STM32 Connectivity line devices. + * @param CAN_BankNumber: Select the start slave bank filter from 1..27. + * @retval None. + */ +void CAN_SlaveStartBank(uint8_t CAN_BankNumber) +{ + /* Check the parameters */ + assert_param(IS_CAN_BANKNUMBER(CAN_BankNumber)); + + /* Enter Initialisation mode for the filter */ + CAN1->FMR |= FMR_FINIT; + + /* Select the start slave bank */ + CAN1->FMR &= (uint32_t)0xFFFFC0F1 ; + CAN1->FMR |= (uint32_t)(CAN_BankNumber)<<8; + + /* Leave Initialisation mode for the filter */ + CAN1->FMR &= ~FMR_FINIT; +} + +/** + * @brief Enables or disables the DBG Freeze for CAN. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param NewState: new state of the CAN peripheral. This parameter can + * be: ENABLE or DISABLE. + * @retval None. + */ +void CAN_DBGFreeze(CAN_TypeDef* CANx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable Debug Freeze */ + CANx->MCR |= MCR_DBF; + } + else + { + /* Disable Debug Freeze */ + CANx->MCR &= ~MCR_DBF; + } +} + + +/** + * @brief Enables or disabes the CAN Time TriggerOperation communication mode. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param NewState : Mode new state , can be one of @ref FunctionalState. + * @note when enabled, Time stamp (TIME[15:0]) value is sent in the last + * two data bytes of the 8-byte message: TIME[7:0] in data byte 6 + * and TIME[15:8] in data byte 7 + * @note DLC must be programmed as 8 in order Time Stamp (2 bytes) to be + * sent over the CAN bus. + * @retval None + */ +void CAN_TTComModeCmd(CAN_TypeDef* CANx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the TTCM mode */ + CANx->MCR |= CAN_MCR_TTCM; + + /* Set TGT bits */ + CANx->sTxMailBox[0].TDTR |= ((uint32_t)CAN_TDT0R_TGT); + CANx->sTxMailBox[1].TDTR |= ((uint32_t)CAN_TDT1R_TGT); + CANx->sTxMailBox[2].TDTR |= ((uint32_t)CAN_TDT2R_TGT); + } + else + { + /* Disable the TTCM mode */ + CANx->MCR &= (uint32_t)(~(uint32_t)CAN_MCR_TTCM); + + /* Reset TGT bits */ + CANx->sTxMailBox[0].TDTR &= ((uint32_t)~CAN_TDT0R_TGT); + CANx->sTxMailBox[1].TDTR &= ((uint32_t)~CAN_TDT1R_TGT); + CANx->sTxMailBox[2].TDTR &= ((uint32_t)~CAN_TDT2R_TGT); + } +} +/** + * @brief Initiates the transmission of a message. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param TxMessage: pointer to a structure which contains CAN Id, CAN + * DLC and CAN data. + * @retval The number of the mailbox that is used for transmission + * or CAN_TxStatus_NoMailBox if there is no empty mailbox. + */ +uint8_t CAN_Transmit(CAN_TypeDef* CANx, CanTxMsg* TxMessage) +{ + uint8_t transmit_mailbox = 0; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_IDTYPE(TxMessage->IDE)); + assert_param(IS_CAN_RTR(TxMessage->RTR)); + assert_param(IS_CAN_DLC(TxMessage->DLC)); + + /* Select one empty transmit mailbox */ + if ((CANx->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) + { + transmit_mailbox = 0; + } + else if ((CANx->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) + { + transmit_mailbox = 1; + } + else if ((CANx->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) + { + transmit_mailbox = 2; + } + else + { + transmit_mailbox = CAN_TxStatus_NoMailBox; + } + + if (transmit_mailbox != CAN_TxStatus_NoMailBox) + { + /* Set up the Id */ + CANx->sTxMailBox[transmit_mailbox].TIR &= TMIDxR_TXRQ; + if (TxMessage->IDE == CAN_Id_Standard) + { + assert_param(IS_CAN_STDID(TxMessage->StdId)); + CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->StdId << 21) | \ + TxMessage->RTR); + } + else + { + assert_param(IS_CAN_EXTID(TxMessage->ExtId)); + CANx->sTxMailBox[transmit_mailbox].TIR |= ((TxMessage->ExtId << 3) | \ + TxMessage->IDE | \ + TxMessage->RTR); + } + + /* Set up the DLC */ + TxMessage->DLC &= (uint8_t)0x0000000F; + CANx->sTxMailBox[transmit_mailbox].TDTR &= (uint32_t)0xFFFFFFF0; + CANx->sTxMailBox[transmit_mailbox].TDTR |= TxMessage->DLC; + + /* Set up the data field */ + CANx->sTxMailBox[transmit_mailbox].TDLR = (((uint32_t)TxMessage->Data[3] << 24) | + ((uint32_t)TxMessage->Data[2] << 16) | + ((uint32_t)TxMessage->Data[1] << 8) | + ((uint32_t)TxMessage->Data[0])); + CANx->sTxMailBox[transmit_mailbox].TDHR = (((uint32_t)TxMessage->Data[7] << 24) | + ((uint32_t)TxMessage->Data[6] << 16) | + ((uint32_t)TxMessage->Data[5] << 8) | + ((uint32_t)TxMessage->Data[4])); + /* Request transmission */ + CANx->sTxMailBox[transmit_mailbox].TIR |= TMIDxR_TXRQ; + } + return transmit_mailbox; +} + +/** + * @brief Checks the transmission of a message. + * @param CANx: where x can be 1 or 2 to to select the + * CAN peripheral. + * @param TransmitMailbox: the number of the mailbox that is used for + * transmission. + * @retval CAN_TxStatus_Ok if the CAN driver transmits the message, CAN_TxStatus_Failed + * in an other case. + */ +uint8_t CAN_TransmitStatus(CAN_TypeDef* CANx, uint8_t TransmitMailbox) +{ + uint32_t state = 0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox)); + + switch (TransmitMailbox) + { + case (CAN_TXMAILBOX_0): + state = CANx->TSR & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0); + break; + case (CAN_TXMAILBOX_1): + state = CANx->TSR & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1); + break; + case (CAN_TXMAILBOX_2): + state = CANx->TSR & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2); + break; + default: + state = CAN_TxStatus_Failed; + break; + } + switch (state) + { + /* transmit pending */ + case (0x0): state = CAN_TxStatus_Pending; + break; + /* transmit failed */ + case (CAN_TSR_RQCP0 | CAN_TSR_TME0): state = CAN_TxStatus_Failed; + break; + case (CAN_TSR_RQCP1 | CAN_TSR_TME1): state = CAN_TxStatus_Failed; + break; + case (CAN_TSR_RQCP2 | CAN_TSR_TME2): state = CAN_TxStatus_Failed; + break; + /* transmit succeeded */ + case (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0):state = CAN_TxStatus_Ok; + break; + case (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1):state = CAN_TxStatus_Ok; + break; + case (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2):state = CAN_TxStatus_Ok; + break; + default: state = CAN_TxStatus_Failed; + break; + } + return (uint8_t) state; +} + +/** + * @brief Cancels a transmit request. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param Mailbox: Mailbox number. + * @retval None. + */ +void CAN_CancelTransmit(CAN_TypeDef* CANx, uint8_t Mailbox) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox)); + /* abort transmission */ + switch (Mailbox) + { + case (CAN_TXMAILBOX_0): CANx->TSR |= CAN_TSR_ABRQ0; + break; + case (CAN_TXMAILBOX_1): CANx->TSR |= CAN_TSR_ABRQ1; + break; + case (CAN_TXMAILBOX_2): CANx->TSR |= CAN_TSR_ABRQ2; + break; + default: + break; + } +} + + +/** + * @brief Receives a message. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. + * @param RxMessage: pointer to a structure receive message which contains + * CAN Id, CAN DLC, CAN datas and FMI number. + * @retval None. + */ +void CAN_Receive(CAN_TypeDef* CANx, uint8_t FIFONumber, CanRxMsg* RxMessage) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONumber)); + /* Get the Id */ + RxMessage->IDE = (uint8_t)0x04 & CANx->sFIFOMailBox[FIFONumber].RIR; + if (RxMessage->IDE == CAN_Id_Standard) + { + RxMessage->StdId = (uint32_t)0x000007FF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 21); + } + else + { + RxMessage->ExtId = (uint32_t)0x1FFFFFFF & (CANx->sFIFOMailBox[FIFONumber].RIR >> 3); + } + + RxMessage->RTR = (uint8_t)0x02 & CANx->sFIFOMailBox[FIFONumber].RIR; + /* Get the DLC */ + RxMessage->DLC = (uint8_t)0x0F & CANx->sFIFOMailBox[FIFONumber].RDTR; + /* Get the FMI */ + RxMessage->FMI = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDTR >> 8); + /* Get the data field */ + RxMessage->Data[0] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDLR; + RxMessage->Data[1] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 8); + RxMessage->Data[2] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 16); + RxMessage->Data[3] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDLR >> 24); + RxMessage->Data[4] = (uint8_t)0xFF & CANx->sFIFOMailBox[FIFONumber].RDHR; + RxMessage->Data[5] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 8); + RxMessage->Data[6] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 16); + RxMessage->Data[7] = (uint8_t)0xFF & (CANx->sFIFOMailBox[FIFONumber].RDHR >> 24); + /* Release the FIFO */ + /* Release FIFO0 */ + if (FIFONumber == CAN_FIFO0) + { + CANx->RF0R |= CAN_RF0R_RFOM0; + } + /* Release FIFO1 */ + else /* FIFONumber == CAN_FIFO1 */ + { + CANx->RF1R |= CAN_RF1R_RFOM1; + } +} + +/** + * @brief Releases the specified FIFO. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1. + * @retval None. + */ +void CAN_FIFORelease(CAN_TypeDef* CANx, uint8_t FIFONumber) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONumber)); + /* Release FIFO0 */ + if (FIFONumber == CAN_FIFO0) + { + CANx->RF0R |= CAN_RF0R_RFOM0; + } + /* Release FIFO1 */ + else /* FIFONumber == CAN_FIFO1 */ + { + CANx->RF1R |= CAN_RF1R_RFOM1; + } +} + +/** + * @brief Returns the number of pending messages. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. + * @retval NbMessage : which is the number of pending message. + */ +uint8_t CAN_MessagePending(CAN_TypeDef* CANx, uint8_t FIFONumber) +{ + uint8_t message_pending=0; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_FIFO(FIFONumber)); + if (FIFONumber == CAN_FIFO0) + { + message_pending = (uint8_t)(CANx->RF0R&(uint32_t)0x03); + } + else if (FIFONumber == CAN_FIFO1) + { + message_pending = (uint8_t)(CANx->RF1R&(uint32_t)0x03); + } + else + { + message_pending = 0; + } + return message_pending; +} + + +/** + * @brief Select the CAN Operation mode. + * @param CAN_OperatingMode : CAN Operating Mode. This parameter can be one + * of @ref CAN_OperatingMode_TypeDef enumeration. + * @retval status of the requested mode which can be + * - CAN_ModeStatus_Failed CAN failed entering the specific mode + * - CAN_ModeStatus_Success CAN Succeed entering the specific mode + + */ +uint8_t CAN_OperatingModeRequest(CAN_TypeDef* CANx, uint8_t CAN_OperatingMode) +{ + uint8_t status = CAN_ModeStatus_Failed; + + /* Timeout for INAK or also for SLAK bits*/ + uint32_t timeout = INAK_TIMEOUT; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_OPERATING_MODE(CAN_OperatingMode)); + + if (CAN_OperatingMode == CAN_OperatingMode_Initialization) + { + /* Request initialisation */ + CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_SLEEP)) | CAN_MCR_INRQ); + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) && (timeout != 0)) + { + timeout--; + } + if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_INAK) + { + status = CAN_ModeStatus_Failed; + } + else + { + status = CAN_ModeStatus_Success; + } + } + else if (CAN_OperatingMode == CAN_OperatingMode_Normal) + { + /* Request leave initialisation and sleep mode and enter Normal mode */ + CANx->MCR &= (uint32_t)(~(CAN_MCR_SLEEP|CAN_MCR_INRQ)); + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MODE_MASK) != 0) && (timeout!=0)) + { + timeout--; + } + if ((CANx->MSR & CAN_MODE_MASK) != 0) + { + status = CAN_ModeStatus_Failed; + } + else + { + status = CAN_ModeStatus_Success; + } + } + else if (CAN_OperatingMode == CAN_OperatingMode_Sleep) + { + /* Request Sleep mode */ + CANx->MCR = (uint32_t)((CANx->MCR & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); + + /* Wait the acknowledge */ + while (((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) && (timeout!=0)) + { + timeout--; + } + if ((CANx->MSR & CAN_MODE_MASK) != CAN_MSR_SLAK) + { + status = CAN_ModeStatus_Failed; + } + else + { + status = CAN_ModeStatus_Success; + } + } + else + { + status = CAN_ModeStatus_Failed; + } + + return (uint8_t) status; +} + +/** + * @brief Enters the low power mode. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval status: CAN_Sleep_Ok if sleep entered, CAN_Sleep_Failed in an + * other case. + */ +uint8_t CAN_Sleep(CAN_TypeDef* CANx) +{ + uint8_t sleepstatus = CAN_Sleep_Failed; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Request Sleep mode */ + CANx->MCR = (((CANx->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); + + /* Sleep mode status */ + if ((CANx->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) == CAN_MSR_SLAK) + { + /* Sleep mode not entered */ + sleepstatus = CAN_Sleep_Ok; + } + /* return sleep mode status */ + return (uint8_t)sleepstatus; +} + +/** + * @brief Wakes the CAN up. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval status: CAN_WakeUp_Ok if sleep mode left, CAN_WakeUp_Failed in an + * other case. + */ +uint8_t CAN_WakeUp(CAN_TypeDef* CANx) +{ + uint32_t wait_slak = SLAK_TIMEOUT; + uint8_t wakeupstatus = CAN_WakeUp_Failed; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Wake up request */ + CANx->MCR &= ~(uint32_t)CAN_MCR_SLEEP; + + /* Sleep mode status */ + while(((CANx->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK)&&(wait_slak!=0x00)) + { + wait_slak--; + } + if((CANx->MSR & CAN_MSR_SLAK) != CAN_MSR_SLAK) + { + /* wake up done : Sleep mode exited */ + wakeupstatus = CAN_WakeUp_Ok; + } + /* return wakeup status */ + return (uint8_t)wakeupstatus; +} + + +/** + * @brief Returns the CANx's last error code (LEC). + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval CAN_ErrorCode: specifies the Error code : + * - CAN_ERRORCODE_NoErr No Error + * - CAN_ERRORCODE_StuffErr Stuff Error + * - CAN_ERRORCODE_FormErr Form Error + * - CAN_ERRORCODE_ACKErr Acknowledgment Error + * - CAN_ERRORCODE_BitRecessiveErr Bit Recessive Error + * - CAN_ERRORCODE_BitDominantErr Bit Dominant Error + * - CAN_ERRORCODE_CRCErr CRC Error + * - CAN_ERRORCODE_SoftwareSetErr Software Set Error + */ + +uint8_t CAN_GetLastErrorCode(CAN_TypeDef* CANx) +{ + uint8_t errorcode=0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Get the error code*/ + errorcode = (((uint8_t)CANx->ESR) & (uint8_t)CAN_ESR_LEC); + + /* Return the error code*/ + return errorcode; +} +/** + * @brief Returns the CANx Receive Error Counter (REC). + * @note In case of an error during reception, this counter is incremented + * by 1 or by 8 depending on the error condition as defined by the CAN + * standard. After every successful reception, the counter is + * decremented by 1 or reset to 120 if its value was higher than 128. + * When the counter value exceeds 127, the CAN controller enters the + * error passive state. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval CAN Receive Error Counter. + */ +uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef* CANx) +{ + uint8_t counter=0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Get the Receive Error Counter*/ + counter = (uint8_t)((CANx->ESR & CAN_ESR_REC)>> 24); + + /* Return the Receive Error Counter*/ + return counter; +} + + +/** + * @brief Returns the LSB of the 9-bit CANx Transmit Error Counter(TEC). + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @retval LSB of the 9-bit CAN Transmit Error Counter. + */ +uint8_t CAN_GetLSBTransmitErrorCounter(CAN_TypeDef* CANx) +{ + uint8_t counter=0; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + + /* Get the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ + counter = (uint8_t)((CANx->ESR & CAN_ESR_TEC)>> 16); + + /* Return the LSB of the 9-bit CANx Transmit Error Counter(TEC) */ + return counter; +} + + +/** + * @brief Enables or disables the specified CANx interrupts. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_IT: specifies the CAN interrupt sources to be enabled or disabled. + * This parameter can be: + * - CAN_IT_TME, + * - CAN_IT_FMP0, + * - CAN_IT_FF0, + * - CAN_IT_FOV0, + * - CAN_IT_FMP1, + * - CAN_IT_FF1, + * - CAN_IT_FOV1, + * - CAN_IT_EWG, + * - CAN_IT_EPV, + * - CAN_IT_LEC, + * - CAN_IT_ERR, + * - CAN_IT_WKU or + * - CAN_IT_SLK. + * @param NewState: new state of the CAN interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void CAN_ITConfig(CAN_TypeDef* CANx, uint32_t CAN_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_IT(CAN_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected CANx interrupt */ + CANx->IER |= CAN_IT; + } + else + { + /* Disable the selected CANx interrupt */ + CANx->IER &= ~CAN_IT; + } +} +/** + * @brief Checks whether the specified CAN flag is set or not. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_FLAG: specifies the flag to check. + * This parameter can be one of the following flags: + * - CAN_FLAG_EWG + * - CAN_FLAG_EPV + * - CAN_FLAG_BOF + * - CAN_FLAG_RQCP0 + * - CAN_FLAG_RQCP1 + * - CAN_FLAG_RQCP2 + * - CAN_FLAG_FMP1 + * - CAN_FLAG_FF1 + * - CAN_FLAG_FOV1 + * - CAN_FLAG_FMP0 + * - CAN_FLAG_FF0 + * - CAN_FLAG_FOV0 + * - CAN_FLAG_WKU + * - CAN_FLAG_SLAK + * - CAN_FLAG_LEC + * @retval The new state of CAN_FLAG (SET or RESET). + */ +FlagStatus CAN_GetFlagStatus(CAN_TypeDef* CANx, uint32_t CAN_FLAG) +{ + FlagStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_GET_FLAG(CAN_FLAG)); + + + if((CAN_FLAG & CAN_FLAGS_ESR) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->ESR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else if((CAN_FLAG & CAN_FLAGS_MSR) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->MSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else if((CAN_FLAG & CAN_FLAGS_TSR) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->TSR & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else if((CAN_FLAG & CAN_FLAGS_RF0R) != (uint32_t)RESET) + { + /* Check the status of the specified CAN flag */ + if ((CANx->RF0R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + else /* If(CAN_FLAG & CAN_FLAGS_RF1R != (uint32_t)RESET) */ + { + /* Check the status of the specified CAN flag */ + if ((uint32_t)(CANx->RF1R & (CAN_FLAG & 0x000FFFFF)) != (uint32_t)RESET) + { + /* CAN_FLAG is set */ + bitstatus = SET; + } + else + { + /* CAN_FLAG is reset */ + bitstatus = RESET; + } + } + /* Return the CAN_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the CAN's pending flags. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_FLAG: specifies the flag to clear. + * This parameter can be one of the following flags: + * - CAN_FLAG_RQCP0 + * - CAN_FLAG_RQCP1 + * - CAN_FLAG_RQCP2 + * - CAN_FLAG_FF1 + * - CAN_FLAG_FOV1 + * - CAN_FLAG_FF0 + * - CAN_FLAG_FOV0 + * - CAN_FLAG_WKU + * - CAN_FLAG_SLAK + * - CAN_FLAG_LEC + * @retval None. + */ +void CAN_ClearFlag(CAN_TypeDef* CANx, uint32_t CAN_FLAG) +{ + uint32_t flagtmp=0; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_CLEAR_FLAG(CAN_FLAG)); + + if (CAN_FLAG == CAN_FLAG_LEC) /* ESR register */ + { + /* Clear the selected CAN flags */ + CANx->ESR = (uint32_t)RESET; + } + else /* MSR or TSR or RF0R or RF1R */ + { + flagtmp = CAN_FLAG & 0x000FFFFF; + + if ((CAN_FLAG & CAN_FLAGS_RF0R)!=(uint32_t)RESET) + { + /* Receive Flags */ + CANx->RF0R = (uint32_t)(flagtmp); + } + else if ((CAN_FLAG & CAN_FLAGS_RF1R)!=(uint32_t)RESET) + { + /* Receive Flags */ + CANx->RF1R = (uint32_t)(flagtmp); + } + else if ((CAN_FLAG & CAN_FLAGS_TSR)!=(uint32_t)RESET) + { + /* Transmit Flags */ + CANx->TSR = (uint32_t)(flagtmp); + } + else /* If((CAN_FLAG & CAN_FLAGS_MSR)!=(uint32_t)RESET) */ + { + /* Operating mode Flags */ + CANx->MSR = (uint32_t)(flagtmp); + } + } +} + +/** + * @brief Checks whether the specified CANx interrupt has occurred or not. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_IT: specifies the CAN interrupt source to check. + * This parameter can be one of the following flags: + * - CAN_IT_TME + * - CAN_IT_FMP0 + * - CAN_IT_FF0 + * - CAN_IT_FOV0 + * - CAN_IT_FMP1 + * - CAN_IT_FF1 + * - CAN_IT_FOV1 + * - CAN_IT_WKU + * - CAN_IT_SLK + * - CAN_IT_EWG + * - CAN_IT_EPV + * - CAN_IT_BOF + * - CAN_IT_LEC + * - CAN_IT_ERR + * @retval The current state of CAN_IT (SET or RESET). + */ +ITStatus CAN_GetITStatus(CAN_TypeDef* CANx, uint32_t CAN_IT) +{ + ITStatus itstatus = RESET; + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_IT(CAN_IT)); + + /* check the enable interrupt bit */ + if((CANx->IER & CAN_IT) != RESET) + { + /* in case the Interrupt is enabled, .... */ + switch (CAN_IT) + { + case CAN_IT_TME: + /* Check CAN_TSR_RQCPx bits */ + itstatus = CheckITStatus(CANx->TSR, CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2); + break; + case CAN_IT_FMP0: + /* Check CAN_RF0R_FMP0 bit */ + itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FMP0); + break; + case CAN_IT_FF0: + /* Check CAN_RF0R_FULL0 bit */ + itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FULL0); + break; + case CAN_IT_FOV0: + /* Check CAN_RF0R_FOVR0 bit */ + itstatus = CheckITStatus(CANx->RF0R, CAN_RF0R_FOVR0); + break; + case CAN_IT_FMP1: + /* Check CAN_RF1R_FMP1 bit */ + itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FMP1); + break; + case CAN_IT_FF1: + /* Check CAN_RF1R_FULL1 bit */ + itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FULL1); + break; + case CAN_IT_FOV1: + /* Check CAN_RF1R_FOVR1 bit */ + itstatus = CheckITStatus(CANx->RF1R, CAN_RF1R_FOVR1); + break; + case CAN_IT_WKU: + /* Check CAN_MSR_WKUI bit */ + itstatus = CheckITStatus(CANx->MSR, CAN_MSR_WKUI); + break; + case CAN_IT_SLK: + /* Check CAN_MSR_SLAKI bit */ + itstatus = CheckITStatus(CANx->MSR, CAN_MSR_SLAKI); + break; + case CAN_IT_EWG: + /* Check CAN_ESR_EWGF bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EWGF); + break; + case CAN_IT_EPV: + /* Check CAN_ESR_EPVF bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_EPVF); + break; + case CAN_IT_BOF: + /* Check CAN_ESR_BOFF bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_BOFF); + break; + case CAN_IT_LEC: + /* Check CAN_ESR_LEC bit */ + itstatus = CheckITStatus(CANx->ESR, CAN_ESR_LEC); + break; + case CAN_IT_ERR: + /* Check CAN_MSR_ERRI bit */ + itstatus = CheckITStatus(CANx->MSR, CAN_MSR_ERRI); + break; + default : + /* in case of error, return RESET */ + itstatus = RESET; + break; + } + } + else + { + /* in case the Interrupt is not enabled, return RESET */ + itstatus = RESET; + } + + /* Return the CAN_IT status */ + return itstatus; +} + +/** + * @brief Clears the CANx's interrupt pending bits. + * @param CANx: where x can be 1 or 2 to to select the CAN peripheral. + * @param CAN_IT: specifies the interrupt pending bit to clear. + * - CAN_IT_TME + * - CAN_IT_FF0 + * - CAN_IT_FOV0 + * - CAN_IT_FF1 + * - CAN_IT_FOV1 + * - CAN_IT_WKU + * - CAN_IT_SLK + * - CAN_IT_EWG + * - CAN_IT_EPV + * - CAN_IT_BOF + * - CAN_IT_LEC + * - CAN_IT_ERR + * @retval None. + */ +void CAN_ClearITPendingBit(CAN_TypeDef* CANx, uint32_t CAN_IT) +{ + /* Check the parameters */ + assert_param(IS_CAN_ALL_PERIPH(CANx)); + assert_param(IS_CAN_CLEAR_IT(CAN_IT)); + + switch (CAN_IT) + { + case CAN_IT_TME: + /* Clear CAN_TSR_RQCPx (rc_w1)*/ + CANx->TSR = CAN_TSR_RQCP0|CAN_TSR_RQCP1|CAN_TSR_RQCP2; + break; + case CAN_IT_FF0: + /* Clear CAN_RF0R_FULL0 (rc_w1)*/ + CANx->RF0R = CAN_RF0R_FULL0; + break; + case CAN_IT_FOV0: + /* Clear CAN_RF0R_FOVR0 (rc_w1)*/ + CANx->RF0R = CAN_RF0R_FOVR0; + break; + case CAN_IT_FF1: + /* Clear CAN_RF1R_FULL1 (rc_w1)*/ + CANx->RF1R = CAN_RF1R_FULL1; + break; + case CAN_IT_FOV1: + /* Clear CAN_RF1R_FOVR1 (rc_w1)*/ + CANx->RF1R = CAN_RF1R_FOVR1; + break; + case CAN_IT_WKU: + /* Clear CAN_MSR_WKUI (rc_w1)*/ + CANx->MSR = CAN_MSR_WKUI; + break; + case CAN_IT_SLK: + /* Clear CAN_MSR_SLAKI (rc_w1)*/ + CANx->MSR = CAN_MSR_SLAKI; + break; + case CAN_IT_EWG: + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : the corresponding Flag is cleared by hardware depending + of the CAN Bus status*/ + break; + case CAN_IT_EPV: + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : the corresponding Flag is cleared by hardware depending + of the CAN Bus status*/ + break; + case CAN_IT_BOF: + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : the corresponding Flag is cleared by hardware depending + of the CAN Bus status*/ + break; + case CAN_IT_LEC: + /* Clear LEC bits */ + CANx->ESR = RESET; + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + break; + case CAN_IT_ERR: + /*Clear LEC bits */ + CANx->ESR = RESET; + /* Clear CAN_MSR_ERRI (rc_w1) */ + CANx->MSR = CAN_MSR_ERRI; + /* Note : BOFF, EPVF and EWGF Flags are cleared by hardware depending + of the CAN Bus status*/ + break; + default : + break; + } +} + +/** + * @brief Checks whether the CAN interrupt has occurred or not. + * @param CAN_Reg: specifies the CAN interrupt register to check. + * @param It_Bit: specifies the interrupt source bit to check. + * @retval The new state of the CAN Interrupt (SET or RESET). + */ +static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit) +{ + ITStatus pendingbitstatus = RESET; + + if ((CAN_Reg & It_Bit) != (uint32_t)RESET) + { + /* CAN_IT is set */ + pendingbitstatus = SET; + } + else + { + /* CAN_IT is reset */ + pendingbitstatus = RESET; + } + return pendingbitstatus; +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c index 4dc615f0..08b501a0 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_cec.c @@ -1,433 +1,433 @@ -/** - ****************************************************************************** - * @file stm32f10x_cec.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the CEC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_cec.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup CEC - * @brief CEC driver modules - * @{ - */ - -/** @defgroup CEC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Defines - * @{ - */ - -/* ------------ CEC registers bit address in the alias region ----------- */ -#define CEC_OFFSET (CEC_BASE - PERIPH_BASE) - -/* --- CFGR Register ---*/ - -/* Alias word address of PE bit */ -#define CFGR_OFFSET (CEC_OFFSET + 0x00) -#define PE_BitNumber 0x00 -#define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4)) - -/* Alias word address of IE bit */ -#define IE_BitNumber 0x01 -#define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of TSOM bit */ -#define CSR_OFFSET (CEC_OFFSET + 0x10) -#define TSOM_BitNumber 0x00 -#define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4)) - -/* Alias word address of TEOM bit */ -#define TEOM_BitNumber 0x01 -#define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4)) - -#define CFGR_CLEAR_Mask (uint8_t)(0xF3) /* CFGR register Mask */ -#define FLAG_Mask ((uint32_t)0x00FFFFFF) /* CEC FLAG mask */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Macros - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Variables - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - - -/** @defgroup CEC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the CEC peripheral registers to their default reset - * values. - * @param None - * @retval None - */ -void CEC_DeInit(void) -{ - /* Enable CEC reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE); - /* Release CEC from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE); -} - - -/** - * @brief Initializes the CEC peripheral according to the specified - * parameters in the CEC_InitStruct. - * @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that - * contains the configuration information for the specified - * CEC peripheral. - * @retval None - */ -void CEC_Init(CEC_InitTypeDef* CEC_InitStruct) -{ - uint16_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(CEC_InitStruct->CEC_BitTimingMode)); - assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(CEC_InitStruct->CEC_BitPeriodMode)); - - /*---------------------------- CEC CFGR Configuration -----------------*/ - /* Get the CEC CFGR value */ - tmpreg = CEC->CFGR; - - /* Clear BTEM and BPEM bits */ - tmpreg &= CFGR_CLEAR_Mask; - - /* Configure CEC: Bit Timing Error and Bit Period Error */ - tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode); - - /* Write to CEC CFGR register*/ - CEC->CFGR = tmpreg; - -} - -/** - * @brief Enables or disables the specified CEC peripheral. - * @param NewState: new state of the CEC peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void CEC_Cmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CFGR_PE_BB = (uint32_t)NewState; - - if(NewState == DISABLE) - { - /* Wait until the PE bit is cleared by hardware (Idle Line detected) */ - while((CEC->CFGR & CEC_CFGR_PE) != (uint32_t)RESET) - { - } - } -} - -/** - * @brief Enables or disables the CEC interrupt. - * @param NewState: new state of the CEC interrupt. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void CEC_ITConfig(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CFGR_IE_BB = (uint32_t)NewState; -} - -/** - * @brief Defines the Own Address of the CEC device. - * @param CEC_OwnAddress: The CEC own address - * @retval None - */ -void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress) -{ - /* Check the parameters */ - assert_param(IS_CEC_ADDRESS(CEC_OwnAddress)); - - /* Set the CEC own address */ - CEC->OAR = CEC_OwnAddress; -} - -/** - * @brief Sets the CEC prescaler value. - * @param CEC_Prescaler: CEC prescaler new value - * @retval None - */ -void CEC_SetPrescaler(uint16_t CEC_Prescaler) -{ - /* Check the parameters */ - assert_param(IS_CEC_PRESCALER(CEC_Prescaler)); - - /* Set the Prescaler value*/ - CEC->PRES = CEC_Prescaler; -} - -/** - * @brief Transmits single data through the CEC peripheral. - * @param Data: the data to transmit. - * @retval None - */ -void CEC_SendDataByte(uint8_t Data) -{ - /* Transmit Data */ - CEC->TXD = Data ; -} - - -/** - * @brief Returns the most recent received data by the CEC peripheral. - * @param None - * @retval The received data. - */ -uint8_t CEC_ReceiveDataByte(void) -{ - /* Receive Data */ - return (uint8_t)(CEC->RXD); -} - -/** - * @brief Starts a new message. - * @param None - * @retval None - */ -void CEC_StartOfMessage(void) -{ - /* Starts of new message */ - *(__IO uint32_t *) CSR_TSOM_BB = (uint32_t)0x1; -} - -/** - * @brief Transmits message with or without an EOM bit. - * @param NewState: new state of the CEC Tx End Of Message. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void CEC_EndOfMessageCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - /* The data byte will be transmitted with or without an EOM bit*/ - *(__IO uint32_t *) CSR_TEOM_BB = (uint32_t)NewState; -} - -/** - * @brief Gets the CEC flag status - * @param CEC_FLAG: specifies the CEC flag to check. - * This parameter can be one of the following values: - * @arg CEC_FLAG_BTE: Bit Timing Error - * @arg CEC_FLAG_BPE: Bit Period Error - * @arg CEC_FLAG_RBTFE: Rx Block Transfer Finished Error - * @arg CEC_FLAG_SBE: Start Bit Error - * @arg CEC_FLAG_ACKE: Block Acknowledge Error - * @arg CEC_FLAG_LINE: Line Error - * @arg CEC_FLAG_TBTFE: Tx Block Transfer Finished Error - * @arg CEC_FLAG_TEOM: Tx End Of Message - * @arg CEC_FLAG_TERR: Tx Error - * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished - * @arg CEC_FLAG_RSOM: Rx Start Of Message - * @arg CEC_FLAG_REOM: Rx End Of Message - * @arg CEC_FLAG_RERR: Rx Error - * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished - * @retval The new state of CEC_FLAG (SET or RESET) - */ -FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t cecreg = 0, cecbase = 0; - - /* Check the parameters */ - assert_param(IS_CEC_GET_FLAG(CEC_FLAG)); - - /* Get the CEC peripheral base address */ - cecbase = (uint32_t)(CEC_BASE); - - /* Read flag register index */ - cecreg = CEC_FLAG >> 28; - - /* Get bit[23:0] of the flag */ - CEC_FLAG &= FLAG_Mask; - - if(cecreg != 0) - { - /* Flag in CEC ESR Register */ - CEC_FLAG = (uint32_t)(CEC_FLAG >> 16); - - /* Get the CEC ESR register address */ - cecbase += 0xC; - } - else - { - /* Get the CEC CSR register address */ - cecbase += 0x10; - } - - if(((*(__IO uint32_t *)cecbase) & CEC_FLAG) != (uint32_t)RESET) - { - /* CEC_FLAG is set */ - bitstatus = SET; - } - else - { - /* CEC_FLAG is reset */ - bitstatus = RESET; - } - - /* Return the CEC_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the CEC's pending flags. - * @param CEC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg CEC_FLAG_TERR: Tx Error - * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished - * @arg CEC_FLAG_RSOM: Rx Start Of Message - * @arg CEC_FLAG_REOM: Rx End Of Message - * @arg CEC_FLAG_RERR: Rx Error - * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished - * @retval None - */ -void CEC_ClearFlag(uint32_t CEC_FLAG) -{ - uint32_t tmp = 0x0; - - /* Check the parameters */ - assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG)); - - tmp = CEC->CSR & 0x2; - - /* Clear the selected CEC flags */ - CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_FLAG) & 0xFFFFFFFC) | tmp); -} - -/** - * @brief Checks whether the specified CEC interrupt has occurred or not. - * @param CEC_IT: specifies the CEC interrupt source to check. - * This parameter can be one of the following values: - * @arg CEC_IT_TERR: Tx Error - * @arg CEC_IT_TBTF: Tx Block Transfer Finished - * @arg CEC_IT_RERR: Rx Error - * @arg CEC_IT_RBTF: Rx Block Transfer Finished - * @retval The new state of CEC_IT (SET or RESET). - */ -ITStatus CEC_GetITStatus(uint8_t CEC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_CEC_GET_IT(CEC_IT)); - - /* Get the CEC IT enable bit status */ - enablestatus = (CEC->CFGR & (uint8_t)CEC_CFGR_IE) ; - - /* Check the status of the specified CEC interrupt */ - if (((CEC->CSR & CEC_IT) != (uint32_t)RESET) && enablestatus) - { - /* CEC_IT is set */ - bitstatus = SET; - } - else - { - /* CEC_IT is reset */ - bitstatus = RESET; - } - /* Return the CEC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the CEC's interrupt pending bits. - * @param CEC_IT: specifies the CEC interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg CEC_IT_TERR: Tx Error - * @arg CEC_IT_TBTF: Tx Block Transfer Finished - * @arg CEC_IT_RERR: Rx Error - * @arg CEC_IT_RBTF: Rx Block Transfer Finished - * @retval None - */ -void CEC_ClearITPendingBit(uint16_t CEC_IT) -{ - uint32_t tmp = 0x0; - - /* Check the parameters */ - assert_param(IS_CEC_GET_IT(CEC_IT)); - - tmp = CEC->CSR & 0x2; - - /* Clear the selected CEC interrupt pending bits */ - CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_IT) & 0xFFFFFFFC) | tmp); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_cec.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the CEC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_cec.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup CEC + * @brief CEC driver modules + * @{ + */ + +/** @defgroup CEC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Defines + * @{ + */ + +/* ------------ CEC registers bit address in the alias region ----------- */ +#define CEC_OFFSET (CEC_BASE - PERIPH_BASE) + +/* --- CFGR Register ---*/ + +/* Alias word address of PE bit */ +#define CFGR_OFFSET (CEC_OFFSET + 0x00) +#define PE_BitNumber 0x00 +#define CFGR_PE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (PE_BitNumber * 4)) + +/* Alias word address of IE bit */ +#define IE_BitNumber 0x01 +#define CFGR_IE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (IE_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of TSOM bit */ +#define CSR_OFFSET (CEC_OFFSET + 0x10) +#define TSOM_BitNumber 0x00 +#define CSR_TSOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TSOM_BitNumber * 4)) + +/* Alias word address of TEOM bit */ +#define TEOM_BitNumber 0x01 +#define CSR_TEOM_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (TEOM_BitNumber * 4)) + +#define CFGR_CLEAR_Mask (uint8_t)(0xF3) /* CFGR register Mask */ +#define FLAG_Mask ((uint32_t)0x00FFFFFF) /* CEC FLAG mask */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Macros + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Variables + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + + +/** @defgroup CEC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the CEC peripheral registers to their default reset + * values. + * @param None + * @retval None + */ +void CEC_DeInit(void) +{ + /* Enable CEC reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, ENABLE); + /* Release CEC from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_CEC, DISABLE); +} + + +/** + * @brief Initializes the CEC peripheral according to the specified + * parameters in the CEC_InitStruct. + * @param CEC_InitStruct: pointer to an CEC_InitTypeDef structure that + * contains the configuration information for the specified + * CEC peripheral. + * @retval None + */ +void CEC_Init(CEC_InitTypeDef* CEC_InitStruct) +{ + uint16_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_CEC_BIT_TIMING_ERROR_MODE(CEC_InitStruct->CEC_BitTimingMode)); + assert_param(IS_CEC_BIT_PERIOD_ERROR_MODE(CEC_InitStruct->CEC_BitPeriodMode)); + + /*---------------------------- CEC CFGR Configuration -----------------*/ + /* Get the CEC CFGR value */ + tmpreg = CEC->CFGR; + + /* Clear BTEM and BPEM bits */ + tmpreg &= CFGR_CLEAR_Mask; + + /* Configure CEC: Bit Timing Error and Bit Period Error */ + tmpreg |= (uint16_t)(CEC_InitStruct->CEC_BitTimingMode | CEC_InitStruct->CEC_BitPeriodMode); + + /* Write to CEC CFGR register*/ + CEC->CFGR = tmpreg; + +} + +/** + * @brief Enables or disables the specified CEC peripheral. + * @param NewState: new state of the CEC peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void CEC_Cmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CFGR_PE_BB = (uint32_t)NewState; + + if(NewState == DISABLE) + { + /* Wait until the PE bit is cleared by hardware (Idle Line detected) */ + while((CEC->CFGR & CEC_CFGR_PE) != (uint32_t)RESET) + { + } + } +} + +/** + * @brief Enables or disables the CEC interrupt. + * @param NewState: new state of the CEC interrupt. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void CEC_ITConfig(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CFGR_IE_BB = (uint32_t)NewState; +} + +/** + * @brief Defines the Own Address of the CEC device. + * @param CEC_OwnAddress: The CEC own address + * @retval None + */ +void CEC_OwnAddressConfig(uint8_t CEC_OwnAddress) +{ + /* Check the parameters */ + assert_param(IS_CEC_ADDRESS(CEC_OwnAddress)); + + /* Set the CEC own address */ + CEC->OAR = CEC_OwnAddress; +} + +/** + * @brief Sets the CEC prescaler value. + * @param CEC_Prescaler: CEC prescaler new value + * @retval None + */ +void CEC_SetPrescaler(uint16_t CEC_Prescaler) +{ + /* Check the parameters */ + assert_param(IS_CEC_PRESCALER(CEC_Prescaler)); + + /* Set the Prescaler value*/ + CEC->PRES = CEC_Prescaler; +} + +/** + * @brief Transmits single data through the CEC peripheral. + * @param Data: the data to transmit. + * @retval None + */ +void CEC_SendDataByte(uint8_t Data) +{ + /* Transmit Data */ + CEC->TXD = Data ; +} + + +/** + * @brief Returns the most recent received data by the CEC peripheral. + * @param None + * @retval The received data. + */ +uint8_t CEC_ReceiveDataByte(void) +{ + /* Receive Data */ + return (uint8_t)(CEC->RXD); +} + +/** + * @brief Starts a new message. + * @param None + * @retval None + */ +void CEC_StartOfMessage(void) +{ + /* Starts of new message */ + *(__IO uint32_t *) CSR_TSOM_BB = (uint32_t)0x1; +} + +/** + * @brief Transmits message with or without an EOM bit. + * @param NewState: new state of the CEC Tx End Of Message. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void CEC_EndOfMessageCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + /* The data byte will be transmitted with or without an EOM bit*/ + *(__IO uint32_t *) CSR_TEOM_BB = (uint32_t)NewState; +} + +/** + * @brief Gets the CEC flag status + * @param CEC_FLAG: specifies the CEC flag to check. + * This parameter can be one of the following values: + * @arg CEC_FLAG_BTE: Bit Timing Error + * @arg CEC_FLAG_BPE: Bit Period Error + * @arg CEC_FLAG_RBTFE: Rx Block Transfer Finished Error + * @arg CEC_FLAG_SBE: Start Bit Error + * @arg CEC_FLAG_ACKE: Block Acknowledge Error + * @arg CEC_FLAG_LINE: Line Error + * @arg CEC_FLAG_TBTFE: Tx Block Transfer Finished Error + * @arg CEC_FLAG_TEOM: Tx End Of Message + * @arg CEC_FLAG_TERR: Tx Error + * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished + * @arg CEC_FLAG_RSOM: Rx Start Of Message + * @arg CEC_FLAG_REOM: Rx End Of Message + * @arg CEC_FLAG_RERR: Rx Error + * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished + * @retval The new state of CEC_FLAG (SET or RESET) + */ +FlagStatus CEC_GetFlagStatus(uint32_t CEC_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t cecreg = 0, cecbase = 0; + + /* Check the parameters */ + assert_param(IS_CEC_GET_FLAG(CEC_FLAG)); + + /* Get the CEC peripheral base address */ + cecbase = (uint32_t)(CEC_BASE); + + /* Read flag register index */ + cecreg = CEC_FLAG >> 28; + + /* Get bit[23:0] of the flag */ + CEC_FLAG &= FLAG_Mask; + + if(cecreg != 0) + { + /* Flag in CEC ESR Register */ + CEC_FLAG = (uint32_t)(CEC_FLAG >> 16); + + /* Get the CEC ESR register address */ + cecbase += 0xC; + } + else + { + /* Get the CEC CSR register address */ + cecbase += 0x10; + } + + if(((*(__IO uint32_t *)cecbase) & CEC_FLAG) != (uint32_t)RESET) + { + /* CEC_FLAG is set */ + bitstatus = SET; + } + else + { + /* CEC_FLAG is reset */ + bitstatus = RESET; + } + + /* Return the CEC_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the CEC's pending flags. + * @param CEC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg CEC_FLAG_TERR: Tx Error + * @arg CEC_FLAG_TBTRF: Tx Byte Transfer Request or Block Transfer Finished + * @arg CEC_FLAG_RSOM: Rx Start Of Message + * @arg CEC_FLAG_REOM: Rx End Of Message + * @arg CEC_FLAG_RERR: Rx Error + * @arg CEC_FLAG_RBTF: Rx Byte/Block Transfer Finished + * @retval None + */ +void CEC_ClearFlag(uint32_t CEC_FLAG) +{ + uint32_t tmp = 0x0; + + /* Check the parameters */ + assert_param(IS_CEC_CLEAR_FLAG(CEC_FLAG)); + + tmp = CEC->CSR & 0x2; + + /* Clear the selected CEC flags */ + CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_FLAG) & 0xFFFFFFFC) | tmp); +} + +/** + * @brief Checks whether the specified CEC interrupt has occurred or not. + * @param CEC_IT: specifies the CEC interrupt source to check. + * This parameter can be one of the following values: + * @arg CEC_IT_TERR: Tx Error + * @arg CEC_IT_TBTF: Tx Block Transfer Finished + * @arg CEC_IT_RERR: Rx Error + * @arg CEC_IT_RBTF: Rx Block Transfer Finished + * @retval The new state of CEC_IT (SET or RESET). + */ +ITStatus CEC_GetITStatus(uint8_t CEC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_CEC_GET_IT(CEC_IT)); + + /* Get the CEC IT enable bit status */ + enablestatus = (CEC->CFGR & (uint8_t)CEC_CFGR_IE) ; + + /* Check the status of the specified CEC interrupt */ + if (((CEC->CSR & CEC_IT) != (uint32_t)RESET) && enablestatus) + { + /* CEC_IT is set */ + bitstatus = SET; + } + else + { + /* CEC_IT is reset */ + bitstatus = RESET; + } + /* Return the CEC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the CEC's interrupt pending bits. + * @param CEC_IT: specifies the CEC interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg CEC_IT_TERR: Tx Error + * @arg CEC_IT_TBTF: Tx Block Transfer Finished + * @arg CEC_IT_RERR: Rx Error + * @arg CEC_IT_RBTF: Rx Block Transfer Finished + * @retval None + */ +void CEC_ClearITPendingBit(uint16_t CEC_IT) +{ + uint32_t tmp = 0x0; + + /* Check the parameters */ + assert_param(IS_CEC_GET_IT(CEC_IT)); + + tmp = CEC->CSR & 0x2; + + /* Clear the selected CEC interrupt pending bits */ + CEC->CSR &= (uint32_t)(((~(uint32_t)CEC_IT) & 0xFFFFFFFC) | tmp); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c index 65017281..ef0c047d 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_crc.c @@ -1,160 +1,160 @@ -/** - ****************************************************************************** - * @file stm32f10x_crc.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the CRC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_crc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup CRC - * @brief CRC driver modules - * @{ - */ - -/** @defgroup CRC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Defines - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Functions - * @{ - */ - -/** - * @brief Resets the CRC Data register (DR). - * @param None - * @retval None - */ -void CRC_ResetDR(void) -{ - /* Reset CRC generator */ - CRC->CR = CRC_CR_RESET; -} - -/** - * @brief Computes the 32-bit CRC of a given data word(32-bit). - * @param Data: data word(32-bit) to compute its CRC - * @retval 32-bit CRC - */ -uint32_t CRC_CalcCRC(uint32_t Data) -{ - CRC->DR = Data; - - return (CRC->DR); -} - -/** - * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). - * @param pBuffer: pointer to the buffer containing the data to be computed - * @param BufferLength: length of the buffer to be computed - * @retval 32-bit CRC - */ -uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) -{ - uint32_t index = 0; - - for(index = 0; index < BufferLength; index++) - { - CRC->DR = pBuffer[index]; - } - return (CRC->DR); -} - -/** - * @brief Returns the current CRC value. - * @param None - * @retval 32-bit CRC - */ -uint32_t CRC_GetCRC(void) -{ - return (CRC->DR); -} - -/** - * @brief Stores a 8-bit data in the Independent Data(ID) register. - * @param IDValue: 8-bit value to be stored in the ID register - * @retval None - */ -void CRC_SetIDRegister(uint8_t IDValue) -{ - CRC->IDR = IDValue; -} - -/** - * @brief Returns the 8-bit data stored in the Independent Data(ID) register - * @param None - * @retval 8-bit value of the ID register - */ -uint8_t CRC_GetIDRegister(void) -{ - return (CRC->IDR); -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_crc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the CRC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_crc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup CRC + * @brief CRC driver modules + * @{ + */ + +/** @defgroup CRC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Defines + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup CRC_Private_Functions + * @{ + */ + +/** + * @brief Resets the CRC Data register (DR). + * @param None + * @retval None + */ +void CRC_ResetDR(void) +{ + /* Reset CRC generator */ + CRC->CR = CRC_CR_RESET; +} + +/** + * @brief Computes the 32-bit CRC of a given data word(32-bit). + * @param Data: data word(32-bit) to compute its CRC + * @retval 32-bit CRC + */ +uint32_t CRC_CalcCRC(uint32_t Data) +{ + CRC->DR = Data; + + return (CRC->DR); +} + +/** + * @brief Computes the 32-bit CRC of a given buffer of data word(32-bit). + * @param pBuffer: pointer to the buffer containing the data to be computed + * @param BufferLength: length of the buffer to be computed + * @retval 32-bit CRC + */ +uint32_t CRC_CalcBlockCRC(uint32_t pBuffer[], uint32_t BufferLength) +{ + uint32_t index = 0; + + for(index = 0; index < BufferLength; index++) + { + CRC->DR = pBuffer[index]; + } + return (CRC->DR); +} + +/** + * @brief Returns the current CRC value. + * @param None + * @retval 32-bit CRC + */ +uint32_t CRC_GetCRC(void) +{ + return (CRC->DR); +} + +/** + * @brief Stores a 8-bit data in the Independent Data(ID) register. + * @param IDValue: 8-bit value to be stored in the ID register + * @retval None + */ +void CRC_SetIDRegister(uint8_t IDValue) +{ + CRC->IDR = IDValue; +} + +/** + * @brief Returns the 8-bit data stored in the Independent Data(ID) register + * @param None + * @retval 8-bit value of the ID register + */ +uint8_t CRC_GetIDRegister(void) +{ + return (CRC->IDR); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c index 1cfc71de..025b8e28 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dac.c @@ -1,571 +1,571 @@ -/** - ****************************************************************************** - * @file stm32f10x_dac.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the DAC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_dac.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup DAC - * @brief DAC driver modules - * @{ - */ - -/** @defgroup DAC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_Defines - * @{ - */ - -/* CR register Mask */ -#define CR_CLEAR_MASK ((uint32_t)0x00000FFE) - -/* DAC Dual Channels SWTRIG masks */ -#define DUAL_SWTRIG_SET ((uint32_t)0x00000003) -#define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC) - -/* DHR registers offsets */ -#define DHR12R1_OFFSET ((uint32_t)0x00000008) -#define DHR12R2_OFFSET ((uint32_t)0x00000014) -#define DHR12RD_OFFSET ((uint32_t)0x00000020) - -/* DOR register offset */ -#define DOR_OFFSET ((uint32_t)0x0000002C) -/** - * @} - */ - -/** @defgroup DAC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup DAC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the DAC peripheral registers to their default reset values. - * @param None - * @retval None - */ -void DAC_DeInit(void) -{ - /* Enable DAC reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); - /* Release DAC from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); -} - -/** - * @brief Initializes the DAC peripheral according to the specified - * parameters in the DAC_InitStruct. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that - * contains the configuration information for the specified DAC channel. - * @retval None - */ -void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0; - /* Check the DAC parameters */ - assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger)); - assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration)); - assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude)); - assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer)); -/*---------------------------- DAC CR Configuration --------------------------*/ - /* Get the DAC CR value */ - tmpreg1 = DAC->CR; - /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ - tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel); - /* Configure for the selected DAC channel: buffer output, trigger, wave generation, - mask/amplitude for wave generation */ - /* Set TSELx and TENx bits according to DAC_Trigger value */ - /* Set WAVEx bits according to DAC_WaveGeneration value */ - /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */ - /* Set BOFFx bit according to DAC_OutputBuffer value */ - tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration | - DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer); - /* Calculate CR register value depending on DAC_Channel */ - tmpreg1 |= tmpreg2 << DAC_Channel; - /* Write to DAC CR */ - DAC->CR = tmpreg1; -} - -/** - * @brief Fills each DAC_InitStruct member with its default value. - * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct) -{ -/*--------------- Reset DAC init structure parameters values -----------------*/ - /* Initialize the DAC_Trigger member */ - DAC_InitStruct->DAC_Trigger = DAC_Trigger_None; - /* Initialize the DAC_WaveGeneration member */ - DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None; - /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */ - DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0; - /* Initialize the DAC_OutputBuffer member */ - DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable; -} - -/** - * @brief Enables or disables the specified DAC channel. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param NewState: new state of the DAC channel. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected DAC channel */ - DAC->CR |= (DAC_CR_EN1 << DAC_Channel); - } - else - { - /* Disable the selected DAC channel */ - DAC->CR &= ~(DAC_CR_EN1 << DAC_Channel); - } -} -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -/** - * @brief Enables or disables the specified DAC interrupts. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled. - * This parameter can be the following values: - * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask - * @param NewState: new state of the specified DAC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_DAC_IT(DAC_IT)); - - if (NewState != DISABLE) - { - /* Enable the selected DAC interrupts */ - DAC->CR |= (DAC_IT << DAC_Channel); - } - else - { - /* Disable the selected DAC interrupts */ - DAC->CR &= (~(uint32_t)(DAC_IT << DAC_Channel)); - } -} -#endif - -/** - * @brief Enables or disables the specified DAC channel DMA request. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param NewState: new state of the selected DAC channel DMA request. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected DAC channel DMA request */ - DAC->CR |= (DAC_CR_DMAEN1 << DAC_Channel); - } - else - { - /* Disable the selected DAC channel DMA request */ - DAC->CR &= ~(DAC_CR_DMAEN1 << DAC_Channel); - } -} - -/** - * @brief Enables or disables the selected DAC channel software trigger. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param NewState: new state of the selected DAC channel software trigger. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable software trigger for the selected DAC channel */ - DAC->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4); - } - else - { - /* Disable software trigger for the selected DAC channel */ - DAC->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4)); - } -} - -/** - * @brief Enables or disables simultaneously the two DAC channels software - * triggers. - * @param NewState: new state of the DAC channels software triggers. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_DualSoftwareTriggerCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable software trigger for both DAC channels */ - DAC->SWTRIGR |= DUAL_SWTRIG_SET ; - } - else - { - /* Disable software trigger for both DAC channels */ - DAC->SWTRIGR &= DUAL_SWTRIG_RESET; - } -} - -/** - * @brief Enables or disables the selected DAC channel wave generation. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_Wave: Specifies the wave type to enable or disable. - * This parameter can be one of the following values: - * @arg DAC_Wave_Noise: noise wave generation - * @arg DAC_Wave_Triangle: triangle wave generation - * @param NewState: new state of the selected DAC channel wave generation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_WAVE(DAC_Wave)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected wave generation for the selected DAC channel */ - DAC->CR |= DAC_Wave << DAC_Channel; - } - else - { - /* Disable the selected wave generation for the selected DAC channel */ - DAC->CR &= ~(DAC_Wave << DAC_Channel); - } -} - -/** - * @brief Set the specified data holding register value for DAC channel1. - * @param DAC_Align: Specifies the data alignment for DAC channel1. - * This parameter can be one of the following values: - * @arg DAC_Align_8b_R: 8bit right data alignment selected - * @arg DAC_Align_12b_L: 12bit left data alignment selected - * @arg DAC_Align_12b_R: 12bit right data alignment selected - * @param Data : Data to be loaded in the selected data holding register. - * @retval None - */ -void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(DAC_Align)); - assert_param(IS_DAC_DATA(Data)); - - tmp = (uint32_t)DAC_BASE; - tmp += DHR12R1_OFFSET + DAC_Align; - - /* Set the DAC channel1 selected data holding register */ - *(__IO uint32_t *) tmp = Data; -} - -/** - * @brief Set the specified data holding register value for DAC channel2. - * @param DAC_Align: Specifies the data alignment for DAC channel2. - * This parameter can be one of the following values: - * @arg DAC_Align_8b_R: 8bit right data alignment selected - * @arg DAC_Align_12b_L: 12bit left data alignment selected - * @arg DAC_Align_12b_R: 12bit right data alignment selected - * @param Data : Data to be loaded in the selected data holding register. - * @retval None - */ -void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(DAC_Align)); - assert_param(IS_DAC_DATA(Data)); - - tmp = (uint32_t)DAC_BASE; - tmp += DHR12R2_OFFSET + DAC_Align; - - /* Set the DAC channel2 selected data holding register */ - *(__IO uint32_t *)tmp = Data; -} - -/** - * @brief Set the specified data holding register value for dual channel - * DAC. - * @param DAC_Align: Specifies the data alignment for dual channel DAC. - * This parameter can be one of the following values: - * @arg DAC_Align_8b_R: 8bit right data alignment selected - * @arg DAC_Align_12b_L: 12bit left data alignment selected - * @arg DAC_Align_12b_R: 12bit right data alignment selected - * @param Data2: Data for DAC Channel2 to be loaded in the selected data - * holding register. - * @param Data1: Data for DAC Channel1 to be loaded in the selected data - * holding register. - * @retval None - */ -void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1) -{ - uint32_t data = 0, tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(DAC_Align)); - assert_param(IS_DAC_DATA(Data1)); - assert_param(IS_DAC_DATA(Data2)); - - /* Calculate and set dual DAC data holding register value */ - if (DAC_Align == DAC_Align_8b_R) - { - data = ((uint32_t)Data2 << 8) | Data1; - } - else - { - data = ((uint32_t)Data2 << 16) | Data1; - } - - tmp = (uint32_t)DAC_BASE; - tmp += DHR12RD_OFFSET + DAC_Align; - - /* Set the dual DAC selected data holding register */ - *(__IO uint32_t *)tmp = data; -} - -/** - * @brief Returns the last data output value of the selected DAC channel. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @retval The selected DAC channel data output value. - */ -uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - - tmp = (uint32_t) DAC_BASE ; - tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2); - - /* Returns the DAC channel data output register value */ - return (uint16_t) (*(__IO uint32_t*) tmp); -} - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) -/** - * @brief Checks whether the specified DAC flag is set or not. - * @param DAC_Channel: thee selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_FLAG: specifies the flag to check. - * This parameter can be only of the following value: - * @arg DAC_FLAG_DMAUDR: DMA underrun flag - * @retval The new state of DAC_FLAG (SET or RESET). - */ -FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_FLAG(DAC_FLAG)); - - /* Check the status of the specified DAC flag */ - if ((DAC->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET) - { - /* DAC_FLAG is set */ - bitstatus = SET; - } - else - { - /* DAC_FLAG is reset */ - bitstatus = RESET; - } - /* Return the DAC_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the DAC channelx's pending flags. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_FLAG: specifies the flag to clear. - * This parameter can be of the following value: - * @arg DAC_FLAG_DMAUDR: DMA underrun flag - * @retval None - */ -void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_FLAG(DAC_FLAG)); - - /* Clear the selected DAC flags */ - DAC->SR = (DAC_FLAG << DAC_Channel); -} - -/** - * @brief Checks whether the specified DAC interrupt has occurred or not. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_IT: specifies the DAC interrupt source to check. - * This parameter can be the following values: - * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask - * @retval The new state of DAC_IT (SET or RESET). - */ -ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_IT(DAC_IT)); - - /* Get the DAC_IT enable bit status */ - enablestatus = (DAC->CR & (DAC_IT << DAC_Channel)) ; - - /* Check the status of the specified DAC interrupt */ - if (((DAC->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus) - { - /* DAC_IT is set */ - bitstatus = SET; - } - else - { - /* DAC_IT is reset */ - bitstatus = RESET; - } - /* Return the DAC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the DAC channelx's interrupt pending bits. - * @param DAC_Channel: the selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_Channel_1: DAC Channel1 selected - * @arg DAC_Channel_2: DAC Channel2 selected - * @param DAC_IT: specifies the DAC interrupt pending bit to clear. - * This parameter can be the following values: - * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask - * @retval None - */ -void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(DAC_Channel)); - assert_param(IS_DAC_IT(DAC_IT)); - - /* Clear the selected DAC interrupt pending bits */ - DAC->SR = (DAC_IT << DAC_Channel); -} -#endif - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_dac.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the DAC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_dac.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup DAC + * @brief DAC driver modules + * @{ + */ + +/** @defgroup DAC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_Defines + * @{ + */ + +/* CR register Mask */ +#define CR_CLEAR_MASK ((uint32_t)0x00000FFE) + +/* DAC Dual Channels SWTRIG masks */ +#define DUAL_SWTRIG_SET ((uint32_t)0x00000003) +#define DUAL_SWTRIG_RESET ((uint32_t)0xFFFFFFFC) + +/* DHR registers offsets */ +#define DHR12R1_OFFSET ((uint32_t)0x00000008) +#define DHR12R2_OFFSET ((uint32_t)0x00000014) +#define DHR12RD_OFFSET ((uint32_t)0x00000020) + +/* DOR register offset */ +#define DOR_OFFSET ((uint32_t)0x0000002C) +/** + * @} + */ + +/** @defgroup DAC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup DAC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the DAC peripheral registers to their default reset values. + * @param None + * @retval None + */ +void DAC_DeInit(void) +{ + /* Enable DAC reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE); + /* Release DAC from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE); +} + +/** + * @brief Initializes the DAC peripheral according to the specified + * parameters in the DAC_InitStruct. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that + * contains the configuration information for the specified DAC channel. + * @retval None + */ +void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct) +{ + uint32_t tmpreg1 = 0, tmpreg2 = 0; + /* Check the DAC parameters */ + assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger)); + assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration)); + assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude)); + assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer)); +/*---------------------------- DAC CR Configuration --------------------------*/ + /* Get the DAC CR value */ + tmpreg1 = DAC->CR; + /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */ + tmpreg1 &= ~(CR_CLEAR_MASK << DAC_Channel); + /* Configure for the selected DAC channel: buffer output, trigger, wave generation, + mask/amplitude for wave generation */ + /* Set TSELx and TENx bits according to DAC_Trigger value */ + /* Set WAVEx bits according to DAC_WaveGeneration value */ + /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */ + /* Set BOFFx bit according to DAC_OutputBuffer value */ + tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration | + DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer); + /* Calculate CR register value depending on DAC_Channel */ + tmpreg1 |= tmpreg2 << DAC_Channel; + /* Write to DAC CR */ + DAC->CR = tmpreg1; +} + +/** + * @brief Fills each DAC_InitStruct member with its default value. + * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct) +{ +/*--------------- Reset DAC init structure parameters values -----------------*/ + /* Initialize the DAC_Trigger member */ + DAC_InitStruct->DAC_Trigger = DAC_Trigger_None; + /* Initialize the DAC_WaveGeneration member */ + DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None; + /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */ + DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0; + /* Initialize the DAC_OutputBuffer member */ + DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable; +} + +/** + * @brief Enables or disables the specified DAC channel. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param NewState: new state of the DAC channel. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected DAC channel */ + DAC->CR |= (DAC_CR_EN1 << DAC_Channel); + } + else + { + /* Disable the selected DAC channel */ + DAC->CR &= ~(DAC_CR_EN1 << DAC_Channel); + } +} +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/** + * @brief Enables or disables the specified DAC interrupts. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_IT: specifies the DAC interrupt sources to be enabled or disabled. + * This parameter can be the following values: + * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask + * @param NewState: new state of the specified DAC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_ITConfig(uint32_t DAC_Channel, uint32_t DAC_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_DAC_IT(DAC_IT)); + + if (NewState != DISABLE) + { + /* Enable the selected DAC interrupts */ + DAC->CR |= (DAC_IT << DAC_Channel); + } + else + { + /* Disable the selected DAC interrupts */ + DAC->CR &= (~(uint32_t)(DAC_IT << DAC_Channel)); + } +} +#endif + +/** + * @brief Enables or disables the specified DAC channel DMA request. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param NewState: new state of the selected DAC channel DMA request. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected DAC channel DMA request */ + DAC->CR |= (DAC_CR_DMAEN1 << DAC_Channel); + } + else + { + /* Disable the selected DAC channel DMA request */ + DAC->CR &= ~(DAC_CR_DMAEN1 << DAC_Channel); + } +} + +/** + * @brief Enables or disables the selected DAC channel software trigger. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param NewState: new state of the selected DAC channel software trigger. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable software trigger for the selected DAC channel */ + DAC->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4); + } + else + { + /* Disable software trigger for the selected DAC channel */ + DAC->SWTRIGR &= ~((uint32_t)DAC_SWTRIGR_SWTRIG1 << (DAC_Channel >> 4)); + } +} + +/** + * @brief Enables or disables simultaneously the two DAC channels software + * triggers. + * @param NewState: new state of the DAC channels software triggers. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_DualSoftwareTriggerCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable software trigger for both DAC channels */ + DAC->SWTRIGR |= DUAL_SWTRIG_SET ; + } + else + { + /* Disable software trigger for both DAC channels */ + DAC->SWTRIGR &= DUAL_SWTRIG_RESET; + } +} + +/** + * @brief Enables or disables the selected DAC channel wave generation. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_Wave: Specifies the wave type to enable or disable. + * This parameter can be one of the following values: + * @arg DAC_Wave_Noise: noise wave generation + * @arg DAC_Wave_Triangle: triangle wave generation + * @param NewState: new state of the selected DAC channel wave generation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_WAVE(DAC_Wave)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected wave generation for the selected DAC channel */ + DAC->CR |= DAC_Wave << DAC_Channel; + } + else + { + /* Disable the selected wave generation for the selected DAC channel */ + DAC->CR &= ~(DAC_Wave << DAC_Channel); + } +} + +/** + * @brief Set the specified data holding register value for DAC channel1. + * @param DAC_Align: Specifies the data alignment for DAC channel1. + * This parameter can be one of the following values: + * @arg DAC_Align_8b_R: 8bit right data alignment selected + * @arg DAC_Align_12b_L: 12bit left data alignment selected + * @arg DAC_Align_12b_R: 12bit right data alignment selected + * @param Data : Data to be loaded in the selected data holding register. + * @retval None + */ +void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_ALIGN(DAC_Align)); + assert_param(IS_DAC_DATA(Data)); + + tmp = (uint32_t)DAC_BASE; + tmp += DHR12R1_OFFSET + DAC_Align; + + /* Set the DAC channel1 selected data holding register */ + *(__IO uint32_t *) tmp = Data; +} + +/** + * @brief Set the specified data holding register value for DAC channel2. + * @param DAC_Align: Specifies the data alignment for DAC channel2. + * This parameter can be one of the following values: + * @arg DAC_Align_8b_R: 8bit right data alignment selected + * @arg DAC_Align_12b_L: 12bit left data alignment selected + * @arg DAC_Align_12b_R: 12bit right data alignment selected + * @param Data : Data to be loaded in the selected data holding register. + * @retval None + */ +void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_ALIGN(DAC_Align)); + assert_param(IS_DAC_DATA(Data)); + + tmp = (uint32_t)DAC_BASE; + tmp += DHR12R2_OFFSET + DAC_Align; + + /* Set the DAC channel2 selected data holding register */ + *(__IO uint32_t *)tmp = Data; +} + +/** + * @brief Set the specified data holding register value for dual channel + * DAC. + * @param DAC_Align: Specifies the data alignment for dual channel DAC. + * This parameter can be one of the following values: + * @arg DAC_Align_8b_R: 8bit right data alignment selected + * @arg DAC_Align_12b_L: 12bit left data alignment selected + * @arg DAC_Align_12b_R: 12bit right data alignment selected + * @param Data2: Data for DAC Channel2 to be loaded in the selected data + * holding register. + * @param Data1: Data for DAC Channel1 to be loaded in the selected data + * holding register. + * @retval None + */ +void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1) +{ + uint32_t data = 0, tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_ALIGN(DAC_Align)); + assert_param(IS_DAC_DATA(Data1)); + assert_param(IS_DAC_DATA(Data2)); + + /* Calculate and set dual DAC data holding register value */ + if (DAC_Align == DAC_Align_8b_R) + { + data = ((uint32_t)Data2 << 8) | Data1; + } + else + { + data = ((uint32_t)Data2 << 16) | Data1; + } + + tmp = (uint32_t)DAC_BASE; + tmp += DHR12RD_OFFSET + DAC_Align; + + /* Set the dual DAC selected data holding register */ + *(__IO uint32_t *)tmp = data; +} + +/** + * @brief Returns the last data output value of the selected DAC channel. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @retval The selected DAC channel data output value. + */ +uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + + tmp = (uint32_t) DAC_BASE ; + tmp += DOR_OFFSET + ((uint32_t)DAC_Channel >> 2); + + /* Returns the DAC channel data output register value */ + return (uint16_t) (*(__IO uint32_t*) tmp); +} + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) +/** + * @brief Checks whether the specified DAC flag is set or not. + * @param DAC_Channel: thee selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_FLAG: specifies the flag to check. + * This parameter can be only of the following value: + * @arg DAC_FLAG_DMAUDR: DMA underrun flag + * @retval The new state of DAC_FLAG (SET or RESET). + */ +FlagStatus DAC_GetFlagStatus(uint32_t DAC_Channel, uint32_t DAC_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_FLAG(DAC_FLAG)); + + /* Check the status of the specified DAC flag */ + if ((DAC->SR & (DAC_FLAG << DAC_Channel)) != (uint8_t)RESET) + { + /* DAC_FLAG is set */ + bitstatus = SET; + } + else + { + /* DAC_FLAG is reset */ + bitstatus = RESET; + } + /* Return the DAC_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the DAC channelx's pending flags. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_FLAG: specifies the flag to clear. + * This parameter can be of the following value: + * @arg DAC_FLAG_DMAUDR: DMA underrun flag + * @retval None + */ +void DAC_ClearFlag(uint32_t DAC_Channel, uint32_t DAC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_FLAG(DAC_FLAG)); + + /* Clear the selected DAC flags */ + DAC->SR = (DAC_FLAG << DAC_Channel); +} + +/** + * @brief Checks whether the specified DAC interrupt has occurred or not. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_IT: specifies the DAC interrupt source to check. + * This parameter can be the following values: + * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask + * @retval The new state of DAC_IT (SET or RESET). + */ +ITStatus DAC_GetITStatus(uint32_t DAC_Channel, uint32_t DAC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_IT(DAC_IT)); + + /* Get the DAC_IT enable bit status */ + enablestatus = (DAC->CR & (DAC_IT << DAC_Channel)) ; + + /* Check the status of the specified DAC interrupt */ + if (((DAC->SR & (DAC_IT << DAC_Channel)) != (uint32_t)RESET) && enablestatus) + { + /* DAC_IT is set */ + bitstatus = SET; + } + else + { + /* DAC_IT is reset */ + bitstatus = RESET; + } + /* Return the DAC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the DAC channelx's interrupt pending bits. + * @param DAC_Channel: the selected DAC channel. + * This parameter can be one of the following values: + * @arg DAC_Channel_1: DAC Channel1 selected + * @arg DAC_Channel_2: DAC Channel2 selected + * @param DAC_IT: specifies the DAC interrupt pending bit to clear. + * This parameter can be the following values: + * @arg DAC_IT_DMAUDR: DMA underrun interrupt mask + * @retval None + */ +void DAC_ClearITPendingBit(uint32_t DAC_Channel, uint32_t DAC_IT) +{ + /* Check the parameters */ + assert_param(IS_DAC_CHANNEL(DAC_Channel)); + assert_param(IS_DAC_IT(DAC_IT)); + + /* Clear the selected DAC interrupt pending bits */ + DAC->SR = (DAC_IT << DAC_Channel); +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c index 96a8fde3..d34307b0 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dbgmcu.c @@ -1,162 +1,162 @@ -/** - ****************************************************************************** - * @file stm32f10x_dbgmcu.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the DBGMCU firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_dbgmcu.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup DBGMCU - * @brief DBGMCU driver modules - * @{ - */ - -/** @defgroup DBGMCU_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Defines - * @{ - */ - -#define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup DBGMCU_Private_Functions - * @{ - */ - -/** - * @brief Returns the device revision identifier. - * @param None - * @retval Device revision identifier - */ -uint32_t DBGMCU_GetREVID(void) -{ - return(DBGMCU->IDCODE >> 16); -} - -/** - * @brief Returns the device identifier. - * @param None - * @retval Device identifier - */ -uint32_t DBGMCU_GetDEVID(void) -{ - return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); -} - -/** - * @brief Configures the specified peripheral and low power mode behavior - * when the MCU under Debug mode. - * @param DBGMCU_Periph: specifies the peripheral and low power mode. - * This parameter can be any combination of the following values: - * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode - * @arg DBGMCU_STOP: Keep debugger connection during STOP mode - * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode - * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted - * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted - * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted - * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted - * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted - * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted - * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted - * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted - * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted - * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted - * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted - * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted - * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted - * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted - * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted - * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted - * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted - * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted - * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted - * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted - * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted - * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted - * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted - * @param NewState: new state of the specified peripheral in Debug mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - DBGMCU->CR |= DBGMCU_Periph; - } - else - { - DBGMCU->CR &= ~DBGMCU_Periph; - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_dbgmcu.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the DBGMCU firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_dbgmcu.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup DBGMCU + * @brief DBGMCU driver modules + * @{ + */ + +/** @defgroup DBGMCU_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Defines + * @{ + */ + +#define IDCODE_DEVID_MASK ((uint32_t)0x00000FFF) +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup DBGMCU_Private_Functions + * @{ + */ + +/** + * @brief Returns the device revision identifier. + * @param None + * @retval Device revision identifier + */ +uint32_t DBGMCU_GetREVID(void) +{ + return(DBGMCU->IDCODE >> 16); +} + +/** + * @brief Returns the device identifier. + * @param None + * @retval Device identifier + */ +uint32_t DBGMCU_GetDEVID(void) +{ + return(DBGMCU->IDCODE & IDCODE_DEVID_MASK); +} + +/** + * @brief Configures the specified peripheral and low power mode behavior + * when the MCU under Debug mode. + * @param DBGMCU_Periph: specifies the peripheral and low power mode. + * This parameter can be any combination of the following values: + * @arg DBGMCU_SLEEP: Keep debugger connection during SLEEP mode + * @arg DBGMCU_STOP: Keep debugger connection during STOP mode + * @arg DBGMCU_STANDBY: Keep debugger connection during STANDBY mode + * @arg DBGMCU_IWDG_STOP: Debug IWDG stopped when Core is halted + * @arg DBGMCU_WWDG_STOP: Debug WWDG stopped when Core is halted + * @arg DBGMCU_TIM1_STOP: TIM1 counter stopped when Core is halted + * @arg DBGMCU_TIM2_STOP: TIM2 counter stopped when Core is halted + * @arg DBGMCU_TIM3_STOP: TIM3 counter stopped when Core is halted + * @arg DBGMCU_TIM4_STOP: TIM4 counter stopped when Core is halted + * @arg DBGMCU_CAN1_STOP: Debug CAN2 stopped when Core is halted + * @arg DBGMCU_I2C1_SMBUS_TIMEOUT: I2C1 SMBUS timeout mode stopped when Core is halted + * @arg DBGMCU_I2C2_SMBUS_TIMEOUT: I2C2 SMBUS timeout mode stopped when Core is halted + * @arg DBGMCU_TIM5_STOP: TIM5 counter stopped when Core is halted + * @arg DBGMCU_TIM6_STOP: TIM6 counter stopped when Core is halted + * @arg DBGMCU_TIM7_STOP: TIM7 counter stopped when Core is halted + * @arg DBGMCU_TIM8_STOP: TIM8 counter stopped when Core is halted + * @arg DBGMCU_CAN2_STOP: Debug CAN2 stopped when Core is halted + * @arg DBGMCU_TIM15_STOP: TIM15 counter stopped when Core is halted + * @arg DBGMCU_TIM16_STOP: TIM16 counter stopped when Core is halted + * @arg DBGMCU_TIM17_STOP: TIM17 counter stopped when Core is halted + * @arg DBGMCU_TIM9_STOP: TIM9 counter stopped when Core is halted + * @arg DBGMCU_TIM10_STOP: TIM10 counter stopped when Core is halted + * @arg DBGMCU_TIM11_STOP: TIM11 counter stopped when Core is halted + * @arg DBGMCU_TIM12_STOP: TIM12 counter stopped when Core is halted + * @arg DBGMCU_TIM13_STOP: TIM13 counter stopped when Core is halted + * @arg DBGMCU_TIM14_STOP: TIM14 counter stopped when Core is halted + * @param NewState: new state of the specified peripheral in Debug mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DBGMCU_Config(uint32_t DBGMCU_Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DBGMCU_PERIPH(DBGMCU_Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + DBGMCU->CR |= DBGMCU_Periph; + } + else + { + DBGMCU->CR &= ~DBGMCU_Periph; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c index bf072df3..0c86f901 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_dma.c @@ -1,714 +1,714 @@ -/** - ****************************************************************************** - * @file stm32f10x_dma.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the DMA firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_dma.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup DMA - * @brief DMA driver modules - * @{ - */ - -/** @defgroup DMA_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup DMA_Private_Defines - * @{ - */ - - -/* DMA1 Channelx interrupt pending bit masks */ -#define DMA1_Channel1_IT_Mask ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1)) -#define DMA1_Channel2_IT_Mask ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2)) -#define DMA1_Channel3_IT_Mask ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3)) -#define DMA1_Channel4_IT_Mask ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4)) -#define DMA1_Channel5_IT_Mask ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5)) -#define DMA1_Channel6_IT_Mask ((uint32_t)(DMA_ISR_GIF6 | DMA_ISR_TCIF6 | DMA_ISR_HTIF6 | DMA_ISR_TEIF6)) -#define DMA1_Channel7_IT_Mask ((uint32_t)(DMA_ISR_GIF7 | DMA_ISR_TCIF7 | DMA_ISR_HTIF7 | DMA_ISR_TEIF7)) - -/* DMA2 Channelx interrupt pending bit masks */ -#define DMA2_Channel1_IT_Mask ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1)) -#define DMA2_Channel2_IT_Mask ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2)) -#define DMA2_Channel3_IT_Mask ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3)) -#define DMA2_Channel4_IT_Mask ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4)) -#define DMA2_Channel5_IT_Mask ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5)) - -/* DMA2 FLAG mask */ -#define FLAG_Mask ((uint32_t)0x10000000) - -/* DMA registers Masks */ -#define CCR_CLEAR_Mask ((uint32_t)0xFFFF800F) - -/** - * @} - */ - -/** @defgroup DMA_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup DMA_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the DMAy Channelx registers to their default reset - * values. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @retval None - */ -void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - - /* Disable the selected DMAy Channelx */ - DMAy_Channelx->CCR &= (uint16_t)(~DMA_CCR1_EN); - - /* Reset DMAy Channelx control register */ - DMAy_Channelx->CCR = 0; - - /* Reset DMAy Channelx remaining bytes register */ - DMAy_Channelx->CNDTR = 0; - - /* Reset DMAy Channelx peripheral address register */ - DMAy_Channelx->CPAR = 0; - - /* Reset DMAy Channelx memory address register */ - DMAy_Channelx->CMAR = 0; - - if (DMAy_Channelx == DMA1_Channel1) - { - /* Reset interrupt pending bits for DMA1 Channel1 */ - DMA1->IFCR |= DMA1_Channel1_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel2) - { - /* Reset interrupt pending bits for DMA1 Channel2 */ - DMA1->IFCR |= DMA1_Channel2_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel3) - { - /* Reset interrupt pending bits for DMA1 Channel3 */ - DMA1->IFCR |= DMA1_Channel3_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel4) - { - /* Reset interrupt pending bits for DMA1 Channel4 */ - DMA1->IFCR |= DMA1_Channel4_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel5) - { - /* Reset interrupt pending bits for DMA1 Channel5 */ - DMA1->IFCR |= DMA1_Channel5_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel6) - { - /* Reset interrupt pending bits for DMA1 Channel6 */ - DMA1->IFCR |= DMA1_Channel6_IT_Mask; - } - else if (DMAy_Channelx == DMA1_Channel7) - { - /* Reset interrupt pending bits for DMA1 Channel7 */ - DMA1->IFCR |= DMA1_Channel7_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel1) - { - /* Reset interrupt pending bits for DMA2 Channel1 */ - DMA2->IFCR |= DMA2_Channel1_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel2) - { - /* Reset interrupt pending bits for DMA2 Channel2 */ - DMA2->IFCR |= DMA2_Channel2_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel3) - { - /* Reset interrupt pending bits for DMA2 Channel3 */ - DMA2->IFCR |= DMA2_Channel3_IT_Mask; - } - else if (DMAy_Channelx == DMA2_Channel4) - { - /* Reset interrupt pending bits for DMA2 Channel4 */ - DMA2->IFCR |= DMA2_Channel4_IT_Mask; - } - else - { - if (DMAy_Channelx == DMA2_Channel5) - { - /* Reset interrupt pending bits for DMA2 Channel5 */ - DMA2->IFCR |= DMA2_Channel5_IT_Mask; - } - } -} - -/** - * @brief Initializes the DMAy Channelx according to the specified - * parameters in the DMA_InitStruct. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param DMA_InitStruct: pointer to a DMA_InitTypeDef structure that - * contains the configuration information for the specified DMA Channel. - * @retval None - */ -void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - assert_param(IS_DMA_DIR(DMA_InitStruct->DMA_DIR)); - assert_param(IS_DMA_BUFFER_SIZE(DMA_InitStruct->DMA_BufferSize)); - assert_param(IS_DMA_PERIPHERAL_INC_STATE(DMA_InitStruct->DMA_PeripheralInc)); - assert_param(IS_DMA_MEMORY_INC_STATE(DMA_InitStruct->DMA_MemoryInc)); - assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(DMA_InitStruct->DMA_PeripheralDataSize)); - assert_param(IS_DMA_MEMORY_DATA_SIZE(DMA_InitStruct->DMA_MemoryDataSize)); - assert_param(IS_DMA_MODE(DMA_InitStruct->DMA_Mode)); - assert_param(IS_DMA_PRIORITY(DMA_InitStruct->DMA_Priority)); - assert_param(IS_DMA_M2M_STATE(DMA_InitStruct->DMA_M2M)); - -/*--------------------------- DMAy Channelx CCR Configuration -----------------*/ - /* Get the DMAy_Channelx CCR value */ - tmpreg = DMAy_Channelx->CCR; - /* Clear MEM2MEM, PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ - tmpreg &= CCR_CLEAR_Mask; - /* Configure DMAy Channelx: data transfer, data size, priority level and mode */ - /* Set DIR bit according to DMA_DIR value */ - /* Set CIRC bit according to DMA_Mode value */ - /* Set PINC bit according to DMA_PeripheralInc value */ - /* Set MINC bit according to DMA_MemoryInc value */ - /* Set PSIZE bits according to DMA_PeripheralDataSize value */ - /* Set MSIZE bits according to DMA_MemoryDataSize value */ - /* Set PL bits according to DMA_Priority value */ - /* Set the MEM2MEM bit according to DMA_M2M value */ - tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode | - DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc | - DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize | - DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M; - - /* Write to DMAy Channelx CCR */ - DMAy_Channelx->CCR = tmpreg; - -/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ - /* Write to DMAy Channelx CNDTR */ - DMAy_Channelx->CNDTR = DMA_InitStruct->DMA_BufferSize; - -/*--------------------------- DMAy Channelx CPAR Configuration ----------------*/ - /* Write to DMAy Channelx CPAR */ - DMAy_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr; - -/*--------------------------- DMAy Channelx CMAR Configuration ----------------*/ - /* Write to DMAy Channelx CMAR */ - DMAy_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr; -} - -/** - * @brief Fills each DMA_InitStruct member with its default value. - * @param DMA_InitStruct : pointer to a DMA_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct) -{ -/*-------------- Reset DMA init structure parameters values ------------------*/ - /* Initialize the DMA_PeripheralBaseAddr member */ - DMA_InitStruct->DMA_PeripheralBaseAddr = 0; - /* Initialize the DMA_MemoryBaseAddr member */ - DMA_InitStruct->DMA_MemoryBaseAddr = 0; - /* Initialize the DMA_DIR member */ - DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC; - /* Initialize the DMA_BufferSize member */ - DMA_InitStruct->DMA_BufferSize = 0; - /* Initialize the DMA_PeripheralInc member */ - DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable; - /* Initialize the DMA_MemoryInc member */ - DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable; - /* Initialize the DMA_PeripheralDataSize member */ - DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; - /* Initialize the DMA_MemoryDataSize member */ - DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; - /* Initialize the DMA_Mode member */ - DMA_InitStruct->DMA_Mode = DMA_Mode_Normal; - /* Initialize the DMA_Priority member */ - DMA_InitStruct->DMA_Priority = DMA_Priority_Low; - /* Initialize the DMA_M2M member */ - DMA_InitStruct->DMA_M2M = DMA_M2M_Disable; -} - -/** - * @brief Enables or disables the specified DMAy Channelx. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param NewState: new state of the DMAy Channelx. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected DMAy Channelx */ - DMAy_Channelx->CCR |= DMA_CCR1_EN; - } - else - { - /* Disable the selected DMAy Channelx */ - DMAy_Channelx->CCR &= (uint16_t)(~DMA_CCR1_EN); - } -} - -/** - * @brief Enables or disables the specified DMAy Channelx interrupts. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param DMA_IT: specifies the DMA interrupts sources to be enabled - * or disabled. - * This parameter can be any combination of the following values: - * @arg DMA_IT_TC: Transfer complete interrupt mask - * @arg DMA_IT_HT: Half transfer interrupt mask - * @arg DMA_IT_TE: Transfer error interrupt mask - * @param NewState: new state of the specified DMA interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - assert_param(IS_DMA_CONFIG_IT(DMA_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected DMA interrupts */ - DMAy_Channelx->CCR |= DMA_IT; - } - else - { - /* Disable the selected DMA interrupts */ - DMAy_Channelx->CCR &= ~DMA_IT; - } -} - -/** - * @brief Sets the number of data units in the current DMAy Channelx transfer. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @param DataNumber: The number of data units in the current DMAy Channelx - * transfer. - * @note This function can only be used when the DMAy_Channelx is disabled. - * @retval None. - */ -void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - -/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ - /* Write to DMAy Channelx CNDTR */ - DMAy_Channelx->CNDTR = DataNumber; -} - -/** - * @brief Returns the number of remaining data units in the current - * DMAy Channelx transfer. - * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and - * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. - * @retval The number of remaining data units in the current DMAy Channelx - * transfer. - */ -uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx) -{ - /* Check the parameters */ - assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); - /* Return the number of remaining data units for DMAy Channelx */ - return ((uint16_t)(DMAy_Channelx->CNDTR)); -} - -/** - * @brief Checks whether the specified DMAy Channelx flag is set or not. - * @param DMAy_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. - * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. - * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. - * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. - * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. - * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. - * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. - * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. - * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. - * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. - * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. - * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. - * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. - * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. - * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. - * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. - * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. - * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. - * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. - * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. - * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. - * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. - * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. - * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. - * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. - * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. - * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. - * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. - * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. - * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. - * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. - * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. - * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. - * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. - * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. - * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. - * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. - * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. - * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. - * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. - * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. - * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. - * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. - * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. - * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. - * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. - * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. - * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. - * @retval The new state of DMAy_FLAG (SET or RESET). - */ -FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_DMA_GET_FLAG(DMAy_FLAG)); - - /* Calculate the used DMAy */ - if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) - { - /* Get DMA2 ISR register value */ - tmpreg = DMA2->ISR ; - } - else - { - /* Get DMA1 ISR register value */ - tmpreg = DMA1->ISR ; - } - - /* Check the status of the specified DMAy flag */ - if ((tmpreg & DMAy_FLAG) != (uint32_t)RESET) - { - /* DMAy_FLAG is set */ - bitstatus = SET; - } - else - { - /* DMAy_FLAG is reset */ - bitstatus = RESET; - } - - /* Return the DMAy_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the DMAy Channelx's pending flags. - * @param DMAy_FLAG: specifies the flag to clear. - * This parameter can be any combination (for the same DMA) of the following values: - * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. - * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. - * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. - * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. - * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. - * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. - * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. - * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. - * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. - * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. - * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. - * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. - * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. - * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. - * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. - * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. - * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. - * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. - * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. - * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. - * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. - * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. - * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. - * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. - * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. - * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. - * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. - * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. - * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. - * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. - * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. - * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. - * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. - * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. - * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. - * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. - * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. - * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. - * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. - * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. - * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. - * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. - * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. - * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. - * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. - * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. - * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. - * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. - * @retval None - */ -void DMA_ClearFlag(uint32_t DMAy_FLAG) -{ - /* Check the parameters */ - assert_param(IS_DMA_CLEAR_FLAG(DMAy_FLAG)); - - /* Calculate the used DMAy */ - if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) - { - /* Clear the selected DMAy flags */ - DMA2->IFCR = DMAy_FLAG; - } - else - { - /* Clear the selected DMAy flags */ - DMA1->IFCR = DMAy_FLAG; - } -} - -/** - * @brief Checks whether the specified DMAy Channelx interrupt has occurred or not. - * @param DMAy_IT: specifies the DMAy interrupt source to check. - * This parameter can be one of the following values: - * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. - * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. - * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. - * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. - * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. - * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. - * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. - * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. - * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. - * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. - * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. - * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. - * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. - * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. - * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. - * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. - * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. - * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. - * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. - * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. - * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. - * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. - * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. - * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. - * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. - * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. - * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. - * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. - * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. - * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. - * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. - * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. - * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. - * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. - * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. - * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. - * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. - * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. - * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. - * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. - * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. - * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. - * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. - * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. - * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. - * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. - * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. - * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. - * @retval The new state of DMAy_IT (SET or RESET). - */ -ITStatus DMA_GetITStatus(uint32_t DMAy_IT) -{ - ITStatus bitstatus = RESET; - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_DMA_GET_IT(DMAy_IT)); - - /* Calculate the used DMA */ - if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) - { - /* Get DMA2 ISR register value */ - tmpreg = DMA2->ISR; - } - else - { - /* Get DMA1 ISR register value */ - tmpreg = DMA1->ISR; - } - - /* Check the status of the specified DMAy interrupt */ - if ((tmpreg & DMAy_IT) != (uint32_t)RESET) - { - /* DMAy_IT is set */ - bitstatus = SET; - } - else - { - /* DMAy_IT is reset */ - bitstatus = RESET; - } - /* Return the DMA_IT status */ - return bitstatus; -} - -/** - * @brief Clears the DMAy Channelx's interrupt pending bits. - * @param DMAy_IT: specifies the DMAy interrupt pending bit to clear. - * This parameter can be any combination (for the same DMA) of the following values: - * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. - * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. - * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. - * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. - * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. - * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. - * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. - * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. - * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. - * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. - * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. - * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. - * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. - * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. - * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. - * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. - * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. - * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. - * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. - * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. - * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. - * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. - * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. - * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. - * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. - * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. - * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. - * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. - * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. - * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. - * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. - * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. - * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. - * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. - * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. - * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. - * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. - * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. - * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. - * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. - * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. - * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. - * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. - * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. - * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. - * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. - * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. - * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. - * @retval None - */ -void DMA_ClearITPendingBit(uint32_t DMAy_IT) -{ - /* Check the parameters */ - assert_param(IS_DMA_CLEAR_IT(DMAy_IT)); - - /* Calculate the used DMAy */ - if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) - { - /* Clear the selected DMAy interrupt pending bits */ - DMA2->IFCR = DMAy_IT; - } - else - { - /* Clear the selected DMAy interrupt pending bits */ - DMA1->IFCR = DMAy_IT; - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_dma.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the DMA firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_dma.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup DMA + * @brief DMA driver modules + * @{ + */ + +/** @defgroup DMA_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + +/** @defgroup DMA_Private_Defines + * @{ + */ + + +/* DMA1 Channelx interrupt pending bit masks */ +#define DMA1_Channel1_IT_Mask ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1)) +#define DMA1_Channel2_IT_Mask ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2)) +#define DMA1_Channel3_IT_Mask ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3)) +#define DMA1_Channel4_IT_Mask ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4)) +#define DMA1_Channel5_IT_Mask ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5)) +#define DMA1_Channel6_IT_Mask ((uint32_t)(DMA_ISR_GIF6 | DMA_ISR_TCIF6 | DMA_ISR_HTIF6 | DMA_ISR_TEIF6)) +#define DMA1_Channel7_IT_Mask ((uint32_t)(DMA_ISR_GIF7 | DMA_ISR_TCIF7 | DMA_ISR_HTIF7 | DMA_ISR_TEIF7)) + +/* DMA2 Channelx interrupt pending bit masks */ +#define DMA2_Channel1_IT_Mask ((uint32_t)(DMA_ISR_GIF1 | DMA_ISR_TCIF1 | DMA_ISR_HTIF1 | DMA_ISR_TEIF1)) +#define DMA2_Channel2_IT_Mask ((uint32_t)(DMA_ISR_GIF2 | DMA_ISR_TCIF2 | DMA_ISR_HTIF2 | DMA_ISR_TEIF2)) +#define DMA2_Channel3_IT_Mask ((uint32_t)(DMA_ISR_GIF3 | DMA_ISR_TCIF3 | DMA_ISR_HTIF3 | DMA_ISR_TEIF3)) +#define DMA2_Channel4_IT_Mask ((uint32_t)(DMA_ISR_GIF4 | DMA_ISR_TCIF4 | DMA_ISR_HTIF4 | DMA_ISR_TEIF4)) +#define DMA2_Channel5_IT_Mask ((uint32_t)(DMA_ISR_GIF5 | DMA_ISR_TCIF5 | DMA_ISR_HTIF5 | DMA_ISR_TEIF5)) + +/* DMA2 FLAG mask */ +#define FLAG_Mask ((uint32_t)0x10000000) + +/* DMA registers Masks */ +#define CCR_CLEAR_Mask ((uint32_t)0xFFFF800F) + +/** + * @} + */ + +/** @defgroup DMA_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup DMA_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the DMAy Channelx registers to their default reset + * values. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @retval None + */ +void DMA_DeInit(DMA_Channel_TypeDef* DMAy_Channelx) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + + /* Disable the selected DMAy Channelx */ + DMAy_Channelx->CCR &= (uint16_t)(~DMA_CCR1_EN); + + /* Reset DMAy Channelx control register */ + DMAy_Channelx->CCR = 0; + + /* Reset DMAy Channelx remaining bytes register */ + DMAy_Channelx->CNDTR = 0; + + /* Reset DMAy Channelx peripheral address register */ + DMAy_Channelx->CPAR = 0; + + /* Reset DMAy Channelx memory address register */ + DMAy_Channelx->CMAR = 0; + + if (DMAy_Channelx == DMA1_Channel1) + { + /* Reset interrupt pending bits for DMA1 Channel1 */ + DMA1->IFCR |= DMA1_Channel1_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel2) + { + /* Reset interrupt pending bits for DMA1 Channel2 */ + DMA1->IFCR |= DMA1_Channel2_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel3) + { + /* Reset interrupt pending bits for DMA1 Channel3 */ + DMA1->IFCR |= DMA1_Channel3_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel4) + { + /* Reset interrupt pending bits for DMA1 Channel4 */ + DMA1->IFCR |= DMA1_Channel4_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel5) + { + /* Reset interrupt pending bits for DMA1 Channel5 */ + DMA1->IFCR |= DMA1_Channel5_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel6) + { + /* Reset interrupt pending bits for DMA1 Channel6 */ + DMA1->IFCR |= DMA1_Channel6_IT_Mask; + } + else if (DMAy_Channelx == DMA1_Channel7) + { + /* Reset interrupt pending bits for DMA1 Channel7 */ + DMA1->IFCR |= DMA1_Channel7_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel1) + { + /* Reset interrupt pending bits for DMA2 Channel1 */ + DMA2->IFCR |= DMA2_Channel1_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel2) + { + /* Reset interrupt pending bits for DMA2 Channel2 */ + DMA2->IFCR |= DMA2_Channel2_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel3) + { + /* Reset interrupt pending bits for DMA2 Channel3 */ + DMA2->IFCR |= DMA2_Channel3_IT_Mask; + } + else if (DMAy_Channelx == DMA2_Channel4) + { + /* Reset interrupt pending bits for DMA2 Channel4 */ + DMA2->IFCR |= DMA2_Channel4_IT_Mask; + } + else + { + if (DMAy_Channelx == DMA2_Channel5) + { + /* Reset interrupt pending bits for DMA2 Channel5 */ + DMA2->IFCR |= DMA2_Channel5_IT_Mask; + } + } +} + +/** + * @brief Initializes the DMAy Channelx according to the specified + * parameters in the DMA_InitStruct. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param DMA_InitStruct: pointer to a DMA_InitTypeDef structure that + * contains the configuration information for the specified DMA Channel. + * @retval None + */ +void DMA_Init(DMA_Channel_TypeDef* DMAy_Channelx, DMA_InitTypeDef* DMA_InitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + assert_param(IS_DMA_DIR(DMA_InitStruct->DMA_DIR)); + assert_param(IS_DMA_BUFFER_SIZE(DMA_InitStruct->DMA_BufferSize)); + assert_param(IS_DMA_PERIPHERAL_INC_STATE(DMA_InitStruct->DMA_PeripheralInc)); + assert_param(IS_DMA_MEMORY_INC_STATE(DMA_InitStruct->DMA_MemoryInc)); + assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(DMA_InitStruct->DMA_PeripheralDataSize)); + assert_param(IS_DMA_MEMORY_DATA_SIZE(DMA_InitStruct->DMA_MemoryDataSize)); + assert_param(IS_DMA_MODE(DMA_InitStruct->DMA_Mode)); + assert_param(IS_DMA_PRIORITY(DMA_InitStruct->DMA_Priority)); + assert_param(IS_DMA_M2M_STATE(DMA_InitStruct->DMA_M2M)); + +/*--------------------------- DMAy Channelx CCR Configuration -----------------*/ + /* Get the DMAy_Channelx CCR value */ + tmpreg = DMAy_Channelx->CCR; + /* Clear MEM2MEM, PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */ + tmpreg &= CCR_CLEAR_Mask; + /* Configure DMAy Channelx: data transfer, data size, priority level and mode */ + /* Set DIR bit according to DMA_DIR value */ + /* Set CIRC bit according to DMA_Mode value */ + /* Set PINC bit according to DMA_PeripheralInc value */ + /* Set MINC bit according to DMA_MemoryInc value */ + /* Set PSIZE bits according to DMA_PeripheralDataSize value */ + /* Set MSIZE bits according to DMA_MemoryDataSize value */ + /* Set PL bits according to DMA_Priority value */ + /* Set the MEM2MEM bit according to DMA_M2M value */ + tmpreg |= DMA_InitStruct->DMA_DIR | DMA_InitStruct->DMA_Mode | + DMA_InitStruct->DMA_PeripheralInc | DMA_InitStruct->DMA_MemoryInc | + DMA_InitStruct->DMA_PeripheralDataSize | DMA_InitStruct->DMA_MemoryDataSize | + DMA_InitStruct->DMA_Priority | DMA_InitStruct->DMA_M2M; + + /* Write to DMAy Channelx CCR */ + DMAy_Channelx->CCR = tmpreg; + +/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ + /* Write to DMAy Channelx CNDTR */ + DMAy_Channelx->CNDTR = DMA_InitStruct->DMA_BufferSize; + +/*--------------------------- DMAy Channelx CPAR Configuration ----------------*/ + /* Write to DMAy Channelx CPAR */ + DMAy_Channelx->CPAR = DMA_InitStruct->DMA_PeripheralBaseAddr; + +/*--------------------------- DMAy Channelx CMAR Configuration ----------------*/ + /* Write to DMAy Channelx CMAR */ + DMAy_Channelx->CMAR = DMA_InitStruct->DMA_MemoryBaseAddr; +} + +/** + * @brief Fills each DMA_InitStruct member with its default value. + * @param DMA_InitStruct : pointer to a DMA_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct) +{ +/*-------------- Reset DMA init structure parameters values ------------------*/ + /* Initialize the DMA_PeripheralBaseAddr member */ + DMA_InitStruct->DMA_PeripheralBaseAddr = 0; + /* Initialize the DMA_MemoryBaseAddr member */ + DMA_InitStruct->DMA_MemoryBaseAddr = 0; + /* Initialize the DMA_DIR member */ + DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC; + /* Initialize the DMA_BufferSize member */ + DMA_InitStruct->DMA_BufferSize = 0; + /* Initialize the DMA_PeripheralInc member */ + DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable; + /* Initialize the DMA_MemoryInc member */ + DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable; + /* Initialize the DMA_PeripheralDataSize member */ + DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; + /* Initialize the DMA_MemoryDataSize member */ + DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + /* Initialize the DMA_Mode member */ + DMA_InitStruct->DMA_Mode = DMA_Mode_Normal; + /* Initialize the DMA_Priority member */ + DMA_InitStruct->DMA_Priority = DMA_Priority_Low; + /* Initialize the DMA_M2M member */ + DMA_InitStruct->DMA_M2M = DMA_M2M_Disable; +} + +/** + * @brief Enables or disables the specified DMAy Channelx. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param NewState: new state of the DMAy Channelx. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected DMAy Channelx */ + DMAy_Channelx->CCR |= DMA_CCR1_EN; + } + else + { + /* Disable the selected DMAy Channelx */ + DMAy_Channelx->CCR &= (uint16_t)(~DMA_CCR1_EN); + } +} + +/** + * @brief Enables or disables the specified DMAy Channelx interrupts. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param DMA_IT: specifies the DMA interrupts sources to be enabled + * or disabled. + * This parameter can be any combination of the following values: + * @arg DMA_IT_TC: Transfer complete interrupt mask + * @arg DMA_IT_HT: Half transfer interrupt mask + * @arg DMA_IT_TE: Transfer error interrupt mask + * @param NewState: new state of the specified DMA interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + assert_param(IS_DMA_CONFIG_IT(DMA_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected DMA interrupts */ + DMAy_Channelx->CCR |= DMA_IT; + } + else + { + /* Disable the selected DMA interrupts */ + DMAy_Channelx->CCR &= ~DMA_IT; + } +} + +/** + * @brief Sets the number of data units in the current DMAy Channelx transfer. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @param DataNumber: The number of data units in the current DMAy Channelx + * transfer. + * @note This function can only be used when the DMAy_Channelx is disabled. + * @retval None. + */ +void DMA_SetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx, uint16_t DataNumber) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + +/*--------------------------- DMAy Channelx CNDTR Configuration ---------------*/ + /* Write to DMAy Channelx CNDTR */ + DMAy_Channelx->CNDTR = DataNumber; +} + +/** + * @brief Returns the number of remaining data units in the current + * DMAy Channelx transfer. + * @param DMAy_Channelx: where y can be 1 or 2 to select the DMA and + * x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel. + * @retval The number of remaining data units in the current DMAy Channelx + * transfer. + */ +uint16_t DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx) +{ + /* Check the parameters */ + assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx)); + /* Return the number of remaining data units for DMAy Channelx */ + return ((uint16_t)(DMAy_Channelx->CNDTR)); +} + +/** + * @brief Checks whether the specified DMAy Channelx flag is set or not. + * @param DMAy_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. + * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. + * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. + * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. + * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. + * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. + * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. + * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. + * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. + * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. + * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. + * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. + * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. + * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. + * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. + * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. + * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. + * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. + * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. + * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. + * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. + * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. + * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. + * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. + * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. + * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. + * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. + * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. + * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. + * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. + * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. + * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. + * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. + * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. + * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. + * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. + * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. + * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. + * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. + * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. + * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. + * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. + * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. + * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. + * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. + * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. + * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. + * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. + * @retval The new state of DMAy_FLAG (SET or RESET). + */ +FlagStatus DMA_GetFlagStatus(uint32_t DMAy_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_DMA_GET_FLAG(DMAy_FLAG)); + + /* Calculate the used DMAy */ + if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) + { + /* Get DMA2 ISR register value */ + tmpreg = DMA2->ISR ; + } + else + { + /* Get DMA1 ISR register value */ + tmpreg = DMA1->ISR ; + } + + /* Check the status of the specified DMAy flag */ + if ((tmpreg & DMAy_FLAG) != (uint32_t)RESET) + { + /* DMAy_FLAG is set */ + bitstatus = SET; + } + else + { + /* DMAy_FLAG is reset */ + bitstatus = RESET; + } + + /* Return the DMAy_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the DMAy Channelx's pending flags. + * @param DMAy_FLAG: specifies the flag to clear. + * This parameter can be any combination (for the same DMA) of the following values: + * @arg DMA1_FLAG_GL1: DMA1 Channel1 global flag. + * @arg DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag. + * @arg DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag. + * @arg DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag. + * @arg DMA1_FLAG_GL2: DMA1 Channel2 global flag. + * @arg DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag. + * @arg DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag. + * @arg DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag. + * @arg DMA1_FLAG_GL3: DMA1 Channel3 global flag. + * @arg DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag. + * @arg DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag. + * @arg DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag. + * @arg DMA1_FLAG_GL4: DMA1 Channel4 global flag. + * @arg DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag. + * @arg DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag. + * @arg DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag. + * @arg DMA1_FLAG_GL5: DMA1 Channel5 global flag. + * @arg DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag. + * @arg DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag. + * @arg DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag. + * @arg DMA1_FLAG_GL6: DMA1 Channel6 global flag. + * @arg DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag. + * @arg DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag. + * @arg DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag. + * @arg DMA1_FLAG_GL7: DMA1 Channel7 global flag. + * @arg DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag. + * @arg DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag. + * @arg DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag. + * @arg DMA2_FLAG_GL1: DMA2 Channel1 global flag. + * @arg DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag. + * @arg DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag. + * @arg DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag. + * @arg DMA2_FLAG_GL2: DMA2 Channel2 global flag. + * @arg DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag. + * @arg DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag. + * @arg DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag. + * @arg DMA2_FLAG_GL3: DMA2 Channel3 global flag. + * @arg DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag. + * @arg DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag. + * @arg DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag. + * @arg DMA2_FLAG_GL4: DMA2 Channel4 global flag. + * @arg DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag. + * @arg DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag. + * @arg DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag. + * @arg DMA2_FLAG_GL5: DMA2 Channel5 global flag. + * @arg DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag. + * @arg DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag. + * @arg DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag. + * @retval None + */ +void DMA_ClearFlag(uint32_t DMAy_FLAG) +{ + /* Check the parameters */ + assert_param(IS_DMA_CLEAR_FLAG(DMAy_FLAG)); + + /* Calculate the used DMAy */ + if ((DMAy_FLAG & FLAG_Mask) != (uint32_t)RESET) + { + /* Clear the selected DMAy flags */ + DMA2->IFCR = DMAy_FLAG; + } + else + { + /* Clear the selected DMAy flags */ + DMA1->IFCR = DMAy_FLAG; + } +} + +/** + * @brief Checks whether the specified DMAy Channelx interrupt has occurred or not. + * @param DMAy_IT: specifies the DMAy interrupt source to check. + * This parameter can be one of the following values: + * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. + * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. + * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. + * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. + * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. + * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. + * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. + * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. + * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. + * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. + * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. + * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. + * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. + * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. + * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. + * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. + * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. + * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. + * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. + * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. + * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. + * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. + * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. + * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. + * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. + * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. + * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. + * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. + * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. + * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. + * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. + * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. + * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. + * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. + * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. + * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. + * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. + * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. + * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. + * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. + * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. + * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. + * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. + * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. + * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. + * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. + * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. + * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. + * @retval The new state of DMAy_IT (SET or RESET). + */ +ITStatus DMA_GetITStatus(uint32_t DMAy_IT) +{ + ITStatus bitstatus = RESET; + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_DMA_GET_IT(DMAy_IT)); + + /* Calculate the used DMA */ + if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) + { + /* Get DMA2 ISR register value */ + tmpreg = DMA2->ISR; + } + else + { + /* Get DMA1 ISR register value */ + tmpreg = DMA1->ISR; + } + + /* Check the status of the specified DMAy interrupt */ + if ((tmpreg & DMAy_IT) != (uint32_t)RESET) + { + /* DMAy_IT is set */ + bitstatus = SET; + } + else + { + /* DMAy_IT is reset */ + bitstatus = RESET; + } + /* Return the DMA_IT status */ + return bitstatus; +} + +/** + * @brief Clears the DMAy Channelx's interrupt pending bits. + * @param DMAy_IT: specifies the DMAy interrupt pending bit to clear. + * This parameter can be any combination (for the same DMA) of the following values: + * @arg DMA1_IT_GL1: DMA1 Channel1 global interrupt. + * @arg DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt. + * @arg DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt. + * @arg DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt. + * @arg DMA1_IT_GL2: DMA1 Channel2 global interrupt. + * @arg DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt. + * @arg DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt. + * @arg DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt. + * @arg DMA1_IT_GL3: DMA1 Channel3 global interrupt. + * @arg DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt. + * @arg DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt. + * @arg DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt. + * @arg DMA1_IT_GL4: DMA1 Channel4 global interrupt. + * @arg DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt. + * @arg DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt. + * @arg DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt. + * @arg DMA1_IT_GL5: DMA1 Channel5 global interrupt. + * @arg DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt. + * @arg DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt. + * @arg DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt. + * @arg DMA1_IT_GL6: DMA1 Channel6 global interrupt. + * @arg DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt. + * @arg DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt. + * @arg DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt. + * @arg DMA1_IT_GL7: DMA1 Channel7 global interrupt. + * @arg DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt. + * @arg DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt. + * @arg DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt. + * @arg DMA2_IT_GL1: DMA2 Channel1 global interrupt. + * @arg DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt. + * @arg DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt. + * @arg DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt. + * @arg DMA2_IT_GL2: DMA2 Channel2 global interrupt. + * @arg DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt. + * @arg DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt. + * @arg DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt. + * @arg DMA2_IT_GL3: DMA2 Channel3 global interrupt. + * @arg DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt. + * @arg DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt. + * @arg DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt. + * @arg DMA2_IT_GL4: DMA2 Channel4 global interrupt. + * @arg DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt. + * @arg DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt. + * @arg DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt. + * @arg DMA2_IT_GL5: DMA2 Channel5 global interrupt. + * @arg DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt. + * @arg DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt. + * @arg DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt. + * @retval None + */ +void DMA_ClearITPendingBit(uint32_t DMAy_IT) +{ + /* Check the parameters */ + assert_param(IS_DMA_CLEAR_IT(DMAy_IT)); + + /* Calculate the used DMAy */ + if ((DMAy_IT & FLAG_Mask) != (uint32_t)RESET) + { + /* Clear the selected DMAy interrupt pending bits */ + DMA2->IFCR = DMAy_IT; + } + else + { + /* Clear the selected DMAy interrupt pending bits */ + DMA1->IFCR = DMAy_IT; + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c index b6290d58..ab734627 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_exti.c @@ -1,269 +1,269 @@ -/** - ****************************************************************************** - * @file stm32f10x_exti.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the EXTI firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_exti.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup EXTI - * @brief EXTI driver modules - * @{ - */ - -/** @defgroup EXTI_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Defines - * @{ - */ - -#define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup EXTI_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the EXTI peripheral registers to their default reset values. - * @param None - * @retval None - */ -void EXTI_DeInit(void) -{ - EXTI->IMR = 0x00000000; - EXTI->EMR = 0x00000000; - EXTI->RTSR = 0x00000000; - EXTI->FTSR = 0x00000000; - EXTI->PR = 0x000FFFFF; -} - -/** - * @brief Initializes the EXTI peripheral according to the specified - * parameters in the EXTI_InitStruct. - * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure - * that contains the configuration information for the EXTI peripheral. - * @retval None - */ -void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); - assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); - assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); - assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); - - tmp = (uint32_t)EXTI_BASE; - - if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) - { - /* Clear EXTI line configuration */ - EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; - EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; - - tmp += EXTI_InitStruct->EXTI_Mode; - - *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; - - /* Clear Rising Falling edge configuration */ - EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; - EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; - - /* Select the trigger for the selected external interrupts */ - if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) - { - /* Rising Falling edge */ - EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; - EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; - } - else - { - tmp = (uint32_t)EXTI_BASE; - tmp += EXTI_InitStruct->EXTI_Trigger; - - *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; - } - } - else - { - tmp += EXTI_InitStruct->EXTI_Mode; - - /* Disable the selected external lines */ - *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; - } -} - -/** - * @brief Fills each EXTI_InitStruct member with its reset value. - * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) -{ - EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; - EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; - EXTI_InitStruct->EXTI_LineCmd = DISABLE; -} - -/** - * @brief Generates a Software interrupt. - * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). - * @retval None - */ -void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) -{ - /* Check the parameters */ - assert_param(IS_EXTI_LINE(EXTI_Line)); - - EXTI->SWIER |= EXTI_Line; -} - -/** - * @brief Checks whether the specified EXTI line flag is set or not. - * @param EXTI_Line: specifies the EXTI line flag to check. - * This parameter can be: - * @arg EXTI_Linex: External interrupt line x where x(0..19) - * @retval The new state of EXTI_Line (SET or RESET). - */ -FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_GET_EXTI_LINE(EXTI_Line)); - - if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the EXTI's line pending flags. - * @param EXTI_Line: specifies the EXTI lines flags to clear. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). - * @retval None - */ -void EXTI_ClearFlag(uint32_t EXTI_Line) -{ - /* Check the parameters */ - assert_param(IS_EXTI_LINE(EXTI_Line)); - - EXTI->PR = EXTI_Line; -} - -/** - * @brief Checks whether the specified EXTI line is asserted or not. - * @param EXTI_Line: specifies the EXTI line to check. - * This parameter can be: - * @arg EXTI_Linex: External interrupt line x where x(0..19) - * @retval The new state of EXTI_Line (SET or RESET). - */ -ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - /* Check the parameters */ - assert_param(IS_GET_EXTI_LINE(EXTI_Line)); - - enablestatus = EXTI->IMR & EXTI_Line; - if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the EXTI's line pending bits. - * @param EXTI_Line: specifies the EXTI lines to clear. - * This parameter can be any combination of EXTI_Linex where x can be (0..19). - * @retval None - */ -void EXTI_ClearITPendingBit(uint32_t EXTI_Line) -{ - /* Check the parameters */ - assert_param(IS_EXTI_LINE(EXTI_Line)); - - EXTI->PR = EXTI_Line; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_exti.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the EXTI firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_exti.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup EXTI + * @brief EXTI driver modules + * @{ + */ + +/** @defgroup EXTI_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Defines + * @{ + */ + +#define EXTI_LINENONE ((uint32_t)0x00000) /* No interrupt selected */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup EXTI_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the EXTI peripheral registers to their default reset values. + * @param None + * @retval None + */ +void EXTI_DeInit(void) +{ + EXTI->IMR = 0x00000000; + EXTI->EMR = 0x00000000; + EXTI->RTSR = 0x00000000; + EXTI->FTSR = 0x00000000; + EXTI->PR = 0x000FFFFF; +} + +/** + * @brief Initializes the EXTI peripheral according to the specified + * parameters in the EXTI_InitStruct. + * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure + * that contains the configuration information for the EXTI peripheral. + * @retval None + */ +void EXTI_Init(EXTI_InitTypeDef* EXTI_InitStruct) +{ + uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_EXTI_MODE(EXTI_InitStruct->EXTI_Mode)); + assert_param(IS_EXTI_TRIGGER(EXTI_InitStruct->EXTI_Trigger)); + assert_param(IS_EXTI_LINE(EXTI_InitStruct->EXTI_Line)); + assert_param(IS_FUNCTIONAL_STATE(EXTI_InitStruct->EXTI_LineCmd)); + + tmp = (uint32_t)EXTI_BASE; + + if (EXTI_InitStruct->EXTI_LineCmd != DISABLE) + { + /* Clear EXTI line configuration */ + EXTI->IMR &= ~EXTI_InitStruct->EXTI_Line; + EXTI->EMR &= ~EXTI_InitStruct->EXTI_Line; + + tmp += EXTI_InitStruct->EXTI_Mode; + + *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; + + /* Clear Rising Falling edge configuration */ + EXTI->RTSR &= ~EXTI_InitStruct->EXTI_Line; + EXTI->FTSR &= ~EXTI_InitStruct->EXTI_Line; + + /* Select the trigger for the selected external interrupts */ + if (EXTI_InitStruct->EXTI_Trigger == EXTI_Trigger_Rising_Falling) + { + /* Rising Falling edge */ + EXTI->RTSR |= EXTI_InitStruct->EXTI_Line; + EXTI->FTSR |= EXTI_InitStruct->EXTI_Line; + } + else + { + tmp = (uint32_t)EXTI_BASE; + tmp += EXTI_InitStruct->EXTI_Trigger; + + *(__IO uint32_t *) tmp |= EXTI_InitStruct->EXTI_Line; + } + } + else + { + tmp += EXTI_InitStruct->EXTI_Mode; + + /* Disable the selected external lines */ + *(__IO uint32_t *) tmp &= ~EXTI_InitStruct->EXTI_Line; + } +} + +/** + * @brief Fills each EXTI_InitStruct member with its reset value. + * @param EXTI_InitStruct: pointer to a EXTI_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void EXTI_StructInit(EXTI_InitTypeDef* EXTI_InitStruct) +{ + EXTI_InitStruct->EXTI_Line = EXTI_LINENONE; + EXTI_InitStruct->EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStruct->EXTI_Trigger = EXTI_Trigger_Falling; + EXTI_InitStruct->EXTI_LineCmd = DISABLE; +} + +/** + * @brief Generates a Software interrupt. + * @param EXTI_Line: specifies the EXTI lines to be enabled or disabled. + * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * @retval None + */ +void EXTI_GenerateSWInterrupt(uint32_t EXTI_Line) +{ + /* Check the parameters */ + assert_param(IS_EXTI_LINE(EXTI_Line)); + + EXTI->SWIER |= EXTI_Line; +} + +/** + * @brief Checks whether the specified EXTI line flag is set or not. + * @param EXTI_Line: specifies the EXTI line flag to check. + * This parameter can be: + * @arg EXTI_Linex: External interrupt line x where x(0..19) + * @retval The new state of EXTI_Line (SET or RESET). + */ +FlagStatus EXTI_GetFlagStatus(uint32_t EXTI_Line) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_GET_EXTI_LINE(EXTI_Line)); + + if ((EXTI->PR & EXTI_Line) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the EXTI's line pending flags. + * @param EXTI_Line: specifies the EXTI lines flags to clear. + * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * @retval None + */ +void EXTI_ClearFlag(uint32_t EXTI_Line) +{ + /* Check the parameters */ + assert_param(IS_EXTI_LINE(EXTI_Line)); + + EXTI->PR = EXTI_Line; +} + +/** + * @brief Checks whether the specified EXTI line is asserted or not. + * @param EXTI_Line: specifies the EXTI line to check. + * This parameter can be: + * @arg EXTI_Linex: External interrupt line x where x(0..19) + * @retval The new state of EXTI_Line (SET or RESET). + */ +ITStatus EXTI_GetITStatus(uint32_t EXTI_Line) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + /* Check the parameters */ + assert_param(IS_GET_EXTI_LINE(EXTI_Line)); + + enablestatus = EXTI->IMR & EXTI_Line; + if (((EXTI->PR & EXTI_Line) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the EXTI's line pending bits. + * @param EXTI_Line: specifies the EXTI lines to clear. + * This parameter can be any combination of EXTI_Linex where x can be (0..19). + * @retval None + */ +void EXTI_ClearITPendingBit(uint32_t EXTI_Line) +{ + /* Check the parameters */ + assert_param(IS_EXTI_LINE(EXTI_Line)); + + EXTI->PR = EXTI_Line; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c index cdff9e9b..f6c7bf17 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_flash.c @@ -1,1684 +1,1684 @@ -/** - ****************************************************************************** - * @file stm32f10x_flash.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the FLASH firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_flash.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup FLASH - * @brief FLASH driver modules - * @{ - */ - -/** @defgroup FLASH_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_Defines - * @{ - */ - -/* Flash Access Control Register bits */ -#define ACR_LATENCY_Mask ((uint32_t)0x00000038) -#define ACR_HLFCYA_Mask ((uint32_t)0xFFFFFFF7) -#define ACR_PRFTBE_Mask ((uint32_t)0xFFFFFFEF) - -/* Flash Access Control Register bits */ -#define ACR_PRFTBS_Mask ((uint32_t)0x00000020) - -/* Flash Control Register bits */ -#define CR_PG_Set ((uint32_t)0x00000001) -#define CR_PG_Reset ((uint32_t)0x00001FFE) -#define CR_PER_Set ((uint32_t)0x00000002) -#define CR_PER_Reset ((uint32_t)0x00001FFD) -#define CR_MER_Set ((uint32_t)0x00000004) -#define CR_MER_Reset ((uint32_t)0x00001FFB) -#define CR_OPTPG_Set ((uint32_t)0x00000010) -#define CR_OPTPG_Reset ((uint32_t)0x00001FEF) -#define CR_OPTER_Set ((uint32_t)0x00000020) -#define CR_OPTER_Reset ((uint32_t)0x00001FDF) -#define CR_STRT_Set ((uint32_t)0x00000040) -#define CR_LOCK_Set ((uint32_t)0x00000080) - -/* FLASH Mask */ -#define RDPRT_Mask ((uint32_t)0x00000002) -#define WRP0_Mask ((uint32_t)0x000000FF) -#define WRP1_Mask ((uint32_t)0x0000FF00) -#define WRP2_Mask ((uint32_t)0x00FF0000) -#define WRP3_Mask ((uint32_t)0xFF000000) -#define OB_USER_BFB2 ((uint16_t)0x0008) - -/* FLASH Keys */ -#define RDP_Key ((uint16_t)0x00A5) -#define FLASH_KEY1 ((uint32_t)0x45670123) -#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) - -/* FLASH BANK address */ -#define FLASH_BANK1_END_ADDRESS ((uint32_t)0x807FFFF) - -/* Delay definition */ -#define EraseTimeout ((uint32_t)0x000B0000) -#define ProgramTimeout ((uint32_t)0x00002000) -/** - * @} - */ - -/** @defgroup FLASH_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup FLASH_Private_Functions - * @{ - */ - -/** -@code - - This driver provides functions to configure and program the Flash memory of all STM32F10x devices, - including the latest STM32F10x_XL density devices. - - STM32F10x_XL devices feature up to 1 Mbyte with dual bank architecture for read-while-write (RWW) capability: - - bank1: fixed size of 512 Kbytes (256 pages of 2Kbytes each) - - bank2: up to 512 Kbytes (up to 256 pages of 2Kbytes each) - While other STM32F10x devices features only one bank with memory up to 512 Kbytes. - - In version V3.3.0, some functions were updated and new ones were added to support - STM32F10x_XL devices. Thus some functions manages all devices, while other are - dedicated for XL devices only. - - The table below presents the list of available functions depending on the used STM32F10x devices. - - *************************************************** - * Legacy functions used for all STM32F10x devices * - *************************************************** - +----------------------------------------------------------------------------------------------------------------------------------+ - | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | - | | devices | devices | | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_SetLatency | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_HalfCycleAccessCmd | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_PrefetchBufferCmd | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_Unlock | Yes | Yes | - For STM32F10X_XL devices: unlock Bank1 and Bank2. | - | | | | - For other devices: unlock Bank1 and it is equivalent | - | | | | to FLASH_UnlockBank1 function. | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_Lock | Yes | Yes | - For STM32F10X_XL devices: lock Bank1 and Bank2. | - | | | | - For other devices: lock Bank1 and it is equivalent | - | | | | to FLASH_LockBank1 function. | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ErasePage | Yes | Yes | - For STM32F10x_XL devices: erase a page in Bank1 and Bank2 | - | | | | - For other devices: erase a page in Bank1 | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_EraseAllPages | Yes | Yes | - For STM32F10x_XL devices: erase all pages in Bank1 and Bank2 | - | | | | - For other devices: erase all pages in Bank1 | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_EraseOptionBytes | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ProgramWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ProgramHalfWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ProgramOptionByteData | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_EnableWriteProtection | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ReadOutProtection | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_UserOptionByteConfig | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_GetUserOptionByte | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_GetWriteProtectionOptionByte | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_GetReadOutProtectionStatus | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_GetPrefetchBufferStatus | Yes | Yes | No change | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ITConfig | Yes | Yes | - For STM32F10x_XL devices: enable Bank1 and Bank2's interrupts| - | | | | - For other devices: enable Bank1's interrupts | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_GetFlagStatus | Yes | Yes | - For STM32F10x_XL devices: return Bank1 and Bank2's flag status| - | | | | - For other devices: return Bank1's flag status | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_ClearFlag | Yes | Yes | - For STM32F10x_XL devices: clear Bank1 and Bank2's flag | - | | | | - For other devices: clear Bank1's flag | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_GetStatus | Yes | Yes | - Return the status of Bank1 (for all devices) | - | | | | equivalent to FLASH_GetBank1Status function | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_WaitForLastOperation | Yes | Yes | - Wait for Bank1 last operation (for all devices) | - | | | | equivalent to: FLASH_WaitForLastBank1Operation function | - +----------------------------------------------------------------------------------------------------------------------------------+ - - ************************************************************************************************************************ - * New functions used for all STM32F10x devices to manage Bank1: * - * - These functions are mainly useful for STM32F10x_XL density devices, to have separate control for Bank1 and bank2 * - * - For other devices, these functions are optional (covered by functions listed above) * - ************************************************************************************************************************ - +----------------------------------------------------------------------------------------------------------------------------------+ - | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | - | | devices | devices | | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_UnlockBank1 | Yes | Yes | - Unlock Bank1 | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_LockBank1 | Yes | Yes | - Lock Bank1 | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_EraseAllBank1Pages | Yes | Yes | - Erase all pages in Bank1 | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_GetBank1Status | Yes | Yes | - Return the status of Bank1 | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_WaitForLastBank1Operation | Yes | Yes | - Wait for Bank1 last operation | - +----------------------------------------------------------------------------------------------------------------------------------+ - - ***************************************************************************** - * New Functions used only with STM32F10x_XL density devices to manage Bank2 * - ***************************************************************************** - +----------------------------------------------------------------------------------------------------------------------------------+ - | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | - | | devices | devices | | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_UnlockBank2 | Yes | No | - Unlock Bank2 | - |----------------------------------------------------------------------------------------------------------------------------------| - |FLASH_LockBank2 | Yes | No | - Lock Bank2 | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_EraseAllBank2Pages | Yes | No | - Erase all pages in Bank2 | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_GetBank2Status | Yes | No | - Return the status of Bank2 | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_WaitForLastBank2Operation | Yes | No | - Wait for Bank2 last operation | - |----------------------------------------------------------------------------------------------------------------------------------| - | FLASH_BootConfig | Yes | No | - Configure to boot from Bank1 or Bank2 | - +----------------------------------------------------------------------------------------------------------------------------------+ -@endcode -*/ - - -/** - * @brief Sets the code latency value. - * @note This function can be used for all STM32F10x devices. - * @param FLASH_Latency: specifies the FLASH Latency value. - * This parameter can be one of the following values: - * @arg FLASH_Latency_0: FLASH Zero Latency cycle - * @arg FLASH_Latency_1: FLASH One Latency cycle - * @arg FLASH_Latency_2: FLASH Two Latency cycles - * @retval None - */ -void FLASH_SetLatency(uint32_t FLASH_Latency) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_FLASH_LATENCY(FLASH_Latency)); - - /* Read the ACR register */ - tmpreg = FLASH->ACR; - - /* Sets the Latency value */ - tmpreg &= ACR_LATENCY_Mask; - tmpreg |= FLASH_Latency; - - /* Write the ACR register */ - FLASH->ACR = tmpreg; -} - -/** - * @brief Enables or disables the Half cycle flash access. - * @note This function can be used for all STM32F10x devices. - * @param FLASH_HalfCycleAccess: specifies the FLASH Half cycle Access mode. - * This parameter can be one of the following values: - * @arg FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable - * @arg FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable - * @retval None - */ -void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess) -{ - /* Check the parameters */ - assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess)); - - /* Enable or disable the Half cycle access */ - FLASH->ACR &= ACR_HLFCYA_Mask; - FLASH->ACR |= FLASH_HalfCycleAccess; -} - -/** - * @brief Enables or disables the Prefetch Buffer. - * @note This function can be used for all STM32F10x devices. - * @param FLASH_PrefetchBuffer: specifies the Prefetch buffer status. - * This parameter can be one of the following values: - * @arg FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable - * @arg FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable - * @retval None - */ -void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer) -{ - /* Check the parameters */ - assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer)); - - /* Enable or disable the Prefetch Buffer */ - FLASH->ACR &= ACR_PRFTBE_Mask; - FLASH->ACR |= FLASH_PrefetchBuffer; -} - -/** - * @brief Unlocks the FLASH Program Erase Controller. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices this function unlocks Bank1 and Bank2. - * - For all other devices it unlocks Bank1 and it is equivalent - * to FLASH_UnlockBank1 function.. - * @param None - * @retval None - */ -void FLASH_Unlock(void) -{ - /* Authorize the FPEC of Bank1 Access */ - FLASH->KEYR = FLASH_KEY1; - FLASH->KEYR = FLASH_KEY2; - -#ifdef STM32F10X_XL - /* Authorize the FPEC of Bank2 Access */ - FLASH->KEYR2 = FLASH_KEY1; - FLASH->KEYR2 = FLASH_KEY2; -#endif /* STM32F10X_XL */ -} -/** - * @brief Unlocks the FLASH Bank1 Program Erase Controller. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices this function unlocks Bank1. - * - For all other devices it unlocks Bank1 and it is - * equivalent to FLASH_Unlock function. - * @param None - * @retval None - */ -void FLASH_UnlockBank1(void) -{ - /* Authorize the FPEC of Bank1 Access */ - FLASH->KEYR = FLASH_KEY1; - FLASH->KEYR = FLASH_KEY2; -} - -#ifdef STM32F10X_XL -/** - * @brief Unlocks the FLASH Bank2 Program Erase Controller. - * @note This function can be used only for STM32F10X_XL density devices. - * @param None - * @retval None - */ -void FLASH_UnlockBank2(void) -{ - /* Authorize the FPEC of Bank2 Access */ - FLASH->KEYR2 = FLASH_KEY1; - FLASH->KEYR2 = FLASH_KEY2; - -} -#endif /* STM32F10X_XL */ - -/** - * @brief Locks the FLASH Program Erase Controller. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices this function Locks Bank1 and Bank2. - * - For all other devices it Locks Bank1 and it is equivalent - * to FLASH_LockBank1 function. - * @param None - * @retval None - */ -void FLASH_Lock(void) -{ - /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */ - FLASH->CR |= CR_LOCK_Set; - -#ifdef STM32F10X_XL - /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */ - FLASH->CR2 |= CR_LOCK_Set; -#endif /* STM32F10X_XL */ -} - -/** - * @brief Locks the FLASH Bank1 Program Erase Controller. - * @note this function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices this function Locks Bank1. - * - For all other devices it Locks Bank1 and it is equivalent - * to FLASH_Lock function. - * @param None - * @retval None - */ -void FLASH_LockBank1(void) -{ - /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */ - FLASH->CR |= CR_LOCK_Set; -} - -#ifdef STM32F10X_XL -/** - * @brief Locks the FLASH Bank2 Program Erase Controller. - * @note This function can be used only for STM32F10X_XL density devices. - * @param None - * @retval None - */ -void FLASH_LockBank2(void) -{ - /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */ - FLASH->CR2 |= CR_LOCK_Set; -} -#endif /* STM32F10X_XL */ - -/** - * @brief Erases a specified FLASH page. - * @note This function can be used for all STM32F10x devices. - * @param Page_Address: The page address to be erased. - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ErasePage(uint32_t Page_Address) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_FLASH_ADDRESS(Page_Address)); - -#ifdef STM32F10X_XL - if(Page_Address < FLASH_BANK1_END_ADDRESS) - { - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase the page */ - FLASH->CR|= CR_PER_Set; - FLASH->AR = Page_Address; - FLASH->CR|= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(EraseTimeout); - - /* Disable the PER Bit */ - FLASH->CR &= CR_PER_Reset; - } - } - else - { - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase the page */ - FLASH->CR2|= CR_PER_Set; - FLASH->AR2 = Page_Address; - FLASH->CR2|= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(EraseTimeout); - - /* Disable the PER Bit */ - FLASH->CR2 &= CR_PER_Reset; - } - } -#else - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase the page */ - FLASH->CR|= CR_PER_Set; - FLASH->AR = Page_Address; - FLASH->CR|= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - /* Disable the PER Bit */ - FLASH->CR &= CR_PER_Reset; - } -#endif /* STM32F10X_XL */ - - /* Return the Erase Status */ - return status; -} - -/** - * @brief Erases all FLASH pages. - * @note This function can be used for all STM32F10x devices. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EraseAllPages(void) -{ - FLASH_Status status = FLASH_COMPLETE; - -#ifdef STM32F10X_XL - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase all pages */ - FLASH->CR |= CR_MER_Set; - FLASH->CR |= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(EraseTimeout); - - /* Disable the MER Bit */ - FLASH->CR &= CR_MER_Reset; - } - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase all pages */ - FLASH->CR2 |= CR_MER_Set; - FLASH->CR2 |= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(EraseTimeout); - - /* Disable the MER Bit */ - FLASH->CR2 &= CR_MER_Reset; - } -#else - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase all pages */ - FLASH->CR |= CR_MER_Set; - FLASH->CR |= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - /* Disable the MER Bit */ - FLASH->CR &= CR_MER_Reset; - } -#endif /* STM32F10X_XL */ - - /* Return the Erase Status */ - return status; -} - -/** - * @brief Erases all Bank1 FLASH pages. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices this function erases all Bank1 pages. - * - For all other devices it erases all Bank1 pages and it is equivalent - * to FLASH_EraseAllPages function. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EraseAllBank1Pages(void) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase all pages */ - FLASH->CR |= CR_MER_Set; - FLASH->CR |= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(EraseTimeout); - - /* Disable the MER Bit */ - FLASH->CR &= CR_MER_Reset; - } - /* Return the Erase Status */ - return status; -} - -#ifdef STM32F10X_XL -/** - * @brief Erases all Bank2 FLASH pages. - * @note This function can be used only for STM32F10x_XL density devices. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EraseAllBank2Pages(void) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to erase all pages */ - FLASH->CR2 |= CR_MER_Set; - FLASH->CR2 |= CR_STRT_Set; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(EraseTimeout); - - /* Disable the MER Bit */ - FLASH->CR2 &= CR_MER_Reset; - } - /* Return the Erase Status */ - return status; -} -#endif /* STM32F10X_XL */ - -/** - * @brief Erases the FLASH option bytes. - * @note This functions erases all option bytes except the Read protection (RDP). - * @note This function can be used for all STM32F10x devices. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EraseOptionBytes(void) -{ - uint16_t rdptmp = RDP_Key; - - FLASH_Status status = FLASH_COMPLETE; - - /* Get the actual read protection Option Byte value */ - if(FLASH_GetReadOutProtectionStatus() != RESET) - { - rdptmp = 0x00; - } - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - - /* if the previous operation is completed, proceed to erase the option bytes */ - FLASH->CR |= CR_OPTER_Set; - FLASH->CR |= CR_STRT_Set; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the erase operation is completed, disable the OPTER Bit */ - FLASH->CR &= CR_OPTER_Reset; - - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - /* Restore the last read protection Option Byte value */ - OB->RDP = (uint16_t)rdptmp; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - else - { - if (status != FLASH_TIMEOUT) - { - /* Disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - } - /* Return the erase status */ - return status; -} - -/** - * @brief Programs a word at a specified address. - * @note This function can be used for all STM32F10x devices. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) -{ - FLASH_Status status = FLASH_COMPLETE; - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_FLASH_ADDRESS(Address)); - -#ifdef STM32F10X_XL - if(Address < FLASH_BANK1_END_ADDRESS - 2) - { - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(ProgramTimeout); - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new first - half word */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = (uint16_t)Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new second - half word */ - tmp = Address + 2; - - *(__IO uint16_t*) tmp = Data >> 16; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - else - { - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - } - } - else if(Address == (FLASH_BANK1_END_ADDRESS - 1)) - { - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new first - half word */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = (uint16_t)Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - else - { - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new second - half word */ - FLASH->CR2 |= CR_PG_Set; - tmp = Address + 2; - - *(__IO uint16_t*) tmp = Data >> 16; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR2 &= CR_PG_Reset; - } - else - { - /* Disable the PG Bit */ - FLASH->CR2 &= CR_PG_Reset; - } - } - else - { - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new first - half word */ - FLASH->CR2 |= CR_PG_Set; - - *(__IO uint16_t*)Address = (uint16_t)Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new second - half word */ - tmp = Address + 2; - - *(__IO uint16_t*) tmp = Data >> 16; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR2 &= CR_PG_Reset; - } - else - { - /* Disable the PG Bit */ - FLASH->CR2 &= CR_PG_Reset; - } - } - } -#else - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new first - half word */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = (uint16_t)Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new second - half word */ - tmp = Address + 2; - - *(__IO uint16_t*) tmp = Data >> 16; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - else - { - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - } -#endif /* STM32F10X_XL */ - - /* Return the Program Status */ - return status; -} - -/** - * @brief Programs a half word at a specified address. - * @note This function can be used for all STM32F10x devices. - * @param Address: specifies the address to be programmed. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_FLASH_ADDRESS(Address)); - -#ifdef STM32F10X_XL - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(Address < FLASH_BANK1_END_ADDRESS) - { - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new data */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank1Operation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } - } - else - { - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new data */ - FLASH->CR2 |= CR_PG_Set; - - *(__IO uint16_t*)Address = Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastBank2Operation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR2 &= CR_PG_Reset; - } - } -#else - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* if the previous operation is completed, proceed to program the new data */ - FLASH->CR |= CR_PG_Set; - - *(__IO uint16_t*)Address = Data; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - /* Disable the PG Bit */ - FLASH->CR &= CR_PG_Reset; - } -#endif /* STM32F10X_XL */ - - /* Return the Program Status */ - return status; -} - -/** - * @brief Programs a half word at a specified Option Byte Data address. - * @note This function can be used for all STM32F10x devices. - * @param Address: specifies the address to be programmed. - * This parameter can be 0x1FFFF804 or 0x1FFFF806. - * @param Data: specifies the data to be programmed. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_OB_DATA_ADDRESS(Address)); - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - /* Enables the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - *(__IO uint16_t*)Address = Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the Option Byte Data Program Status */ - return status; -} - -/** - * @brief Write protects the desired pages - * @note This function can be used for all STM32F10x devices. - * @param FLASH_Pages: specifies the address of the pages to be write protected. - * This parameter can be: - * @arg For @b STM32_Low-density_devices: value between FLASH_WRProt_Pages0to3 and FLASH_WRProt_Pages28to31 - * @arg For @b STM32_Medium-density_devices: value between FLASH_WRProt_Pages0to3 - * and FLASH_WRProt_Pages124to127 - * @arg For @b STM32_High-density_devices: value between FLASH_WRProt_Pages0to1 and - * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to255 - * @arg For @b STM32_Connectivity_line_devices: value between FLASH_WRProt_Pages0to1 and - * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to127 - * @arg For @b STM32_XL-density_devices: value between FLASH_WRProt_Pages0to1 and - * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to511 - * @arg FLASH_WRProt_AllPages - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages) -{ - uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF; - - FLASH_Status status = FLASH_COMPLETE; - - /* Check the parameters */ - assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages)); - - FLASH_Pages = (uint32_t)(~FLASH_Pages); - WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask); - WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8); - WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16); - WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* Authorizes the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - FLASH->CR |= CR_OPTPG_Set; - if(WRP0_Data != 0xFF) - { - OB->WRP0 = WRP0_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF)) - { - OB->WRP1 = WRP1_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF)) - { - OB->WRP2 = WRP2_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - - if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF)) - { - OB->WRP3 = WRP3_Data; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - } - - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the write protection operation Status */ - return status; -} - -/** - * @brief Enables or disables the read out protection. - * @note If the user has already programmed the other option bytes before calling - * this function, he must re-program them since this function erases all option bytes. - * @note This function can be used for all STM32F10x devices. - * @param Newstate: new state of the ReadOut Protection. - * This parameter can be: ENABLE or DISABLE. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState) -{ - FLASH_Status status = FLASH_COMPLETE; - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* Authorizes the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - FLASH->CR |= CR_OPTER_Set; - FLASH->CR |= CR_STRT_Set; - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - if(status == FLASH_COMPLETE) - { - /* if the erase operation is completed, disable the OPTER Bit */ - FLASH->CR &= CR_OPTER_Reset; - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - if(NewState != DISABLE) - { - OB->RDP = 0x00; - } - else - { - OB->RDP = RDP_Key; - } - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(EraseTimeout); - - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - else - { - if(status != FLASH_TIMEOUT) - { - /* Disable the OPTER Bit */ - FLASH->CR &= CR_OPTER_Reset; - } - } - } - /* Return the protection operation Status */ - return status; -} - -/** - * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. - * @note This function can be used for all STM32F10x devices. - * @param OB_IWDG: Selects the IWDG mode - * This parameter can be one of the following values: - * @arg OB_IWDG_SW: Software IWDG selected - * @arg OB_IWDG_HW: Hardware IWDG selected - * @param OB_STOP: Reset event when entering STOP mode. - * This parameter can be one of the following values: - * @arg OB_STOP_NoRST: No reset generated when entering in STOP - * @arg OB_STOP_RST: Reset generated when entering in STOP - * @param OB_STDBY: Reset event when entering Standby mode. - * This parameter can be one of the following values: - * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY - * @arg OB_STDBY_RST: Reset generated when entering in STANDBY - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) -{ - FLASH_Status status = FLASH_COMPLETE; - - /* Check the parameters */ - assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); - assert_param(IS_OB_STOP_SOURCE(OB_STOP)); - assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); - - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - - OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8))); - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the Option Byte program Status */ - return status; -} - -#ifdef STM32F10X_XL -/** - * @brief Configures to boot from Bank1 or Bank2. - * @note This function can be used only for STM32F10x_XL density devices. - * @param FLASH_BOOT: select the FLASH Bank to boot from. - * This parameter can be one of the following values: - * @arg FLASH_BOOT_Bank1: At startup, if boot pins are set in boot from user Flash - * position and this parameter is selected the device will boot from Bank1(Default). - * @arg FLASH_BOOT_Bank2: At startup, if boot pins are set in boot from user Flash - * position and this parameter is selected the device will boot from Bank2 or Bank1, - * depending on the activation of the bank. The active banks are checked in - * the following order: Bank2, followed by Bank1. - * The active bank is recognized by the value programmed at the base address - * of the respective bank (corresponding to the initial stack pointer value - * in the interrupt vector table). - * For more information, please refer to AN2606 from www.st.com. - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT) -{ - FLASH_Status status = FLASH_COMPLETE; - assert_param(IS_FLASH_BOOT(FLASH_BOOT)); - /* Authorize the small information block programming */ - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - - if(status == FLASH_COMPLETE) - { - /* Enable the Option Bytes Programming operation */ - FLASH->CR |= CR_OPTPG_Set; - - if(FLASH_BOOT == FLASH_BOOT_Bank1) - { - OB->USER |= OB_USER_BFB2; - } - else - { - OB->USER &= (uint16_t)(~(uint16_t)(OB_USER_BFB2)); - } - /* Wait for last operation to be completed */ - status = FLASH_WaitForLastOperation(ProgramTimeout); - if(status != FLASH_TIMEOUT) - { - /* if the program operation is completed, disable the OPTPG Bit */ - FLASH->CR &= CR_OPTPG_Reset; - } - } - /* Return the Option Byte program Status */ - return status; -} -#endif /* STM32F10X_XL */ - -/** - * @brief Returns the FLASH User Option Bytes values. - * @note This function can be used for all STM32F10x devices. - * @param None - * @retval The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1) - * and RST_STDBY(Bit2). - */ -uint32_t FLASH_GetUserOptionByte(void) -{ - /* Return the User Option Byte */ - return (uint32_t)(FLASH->OBR >> 2); -} - -/** - * @brief Returns the FLASH Write Protection Option Bytes Register value. - * @note This function can be used for all STM32F10x devices. - * @param None - * @retval The FLASH Write Protection Option Bytes Register value - */ -uint32_t FLASH_GetWriteProtectionOptionByte(void) -{ - /* Return the Flash write protection Register value */ - return (uint32_t)(FLASH->WRPR); -} - -/** - * @brief Checks whether the FLASH Read Out Protection Status is set or not. - * @note This function can be used for all STM32F10x devices. - * @param None - * @retval FLASH ReadOut Protection Status(SET or RESET) - */ -FlagStatus FLASH_GetReadOutProtectionStatus(void) -{ - FlagStatus readoutstatus = RESET; - if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET) - { - readoutstatus = SET; - } - else - { - readoutstatus = RESET; - } - return readoutstatus; -} - -/** - * @brief Checks whether the FLASH Prefetch Buffer status is set or not. - * @note This function can be used for all STM32F10x devices. - * @param None - * @retval FLASH Prefetch Buffer Status (SET or RESET). - */ -FlagStatus FLASH_GetPrefetchBufferStatus(void) -{ - FlagStatus bitstatus = RESET; - - if ((FLASH->ACR & ACR_PRFTBS_Mask) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */ - return bitstatus; -} - -/** - * @brief Enables or disables the specified FLASH interrupts. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices, enables or disables the specified FLASH interrupts - for Bank1 and Bank2. - * - For other devices it enables or disables the specified FLASH interrupts for Bank1. - * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg FLASH_IT_ERROR: FLASH Error Interrupt - * @arg FLASH_IT_EOP: FLASH end of operation Interrupt - * @param NewState: new state of the specified Flash interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState) -{ -#ifdef STM32F10X_XL - /* Check the parameters */ - assert_param(IS_FLASH_IT(FLASH_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if((FLASH_IT & 0x80000000) != 0x0) - { - if(NewState != DISABLE) - { - /* Enable the interrupt sources */ - FLASH->CR2 |= (FLASH_IT & 0x7FFFFFFF); - } - else - { - /* Disable the interrupt sources */ - FLASH->CR2 &= ~(uint32_t)(FLASH_IT & 0x7FFFFFFF); - } - } - else - { - if(NewState != DISABLE) - { - /* Enable the interrupt sources */ - FLASH->CR |= FLASH_IT; - } - else - { - /* Disable the interrupt sources */ - FLASH->CR &= ~(uint32_t)FLASH_IT; - } - } -#else - /* Check the parameters */ - assert_param(IS_FLASH_IT(FLASH_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if(NewState != DISABLE) - { - /* Enable the interrupt sources */ - FLASH->CR |= FLASH_IT; - } - else - { - /* Disable the interrupt sources */ - FLASH->CR &= ~(uint32_t)FLASH_IT; - } -#endif /* STM32F10X_XL */ -} - -/** - * @brief Checks whether the specified FLASH flag is set or not. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices, this function checks whether the specified - * Bank1 or Bank2 flag is set or not. - * - For other devices, it checks whether the specified Bank1 flag is - * set or not. - * @param FLASH_FLAG: specifies the FLASH flag to check. - * This parameter can be one of the following values: - * @arg FLASH_FLAG_BSY: FLASH Busy flag - * @arg FLASH_FLAG_PGERR: FLASH Program error flag - * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @arg FLASH_FLAG_OPTERR: FLASH Option Byte error flag - * @retval The new state of FLASH_FLAG (SET or RESET). - */ -FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) -{ - FlagStatus bitstatus = RESET; - -#ifdef STM32F10X_XL - /* Check the parameters */ - assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; - if(FLASH_FLAG == FLASH_FLAG_OPTERR) - { - if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - else - { - if((FLASH_FLAG & 0x80000000) != 0x0) - { - if((FLASH->SR2 & FLASH_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - else - { - if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - } -#else - /* Check the parameters */ - assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; - if(FLASH_FLAG == FLASH_FLAG_OPTERR) - { - if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } - else - { - if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - } -#endif /* STM32F10X_XL */ - - /* Return the new state of FLASH_FLAG (SET or RESET) */ - return bitstatus; -} - -/** - * @brief Clears the FLASH's pending flags. - * @note This function can be used for all STM32F10x devices. - * - For STM32F10X_XL devices, this function clears Bank1 or Bank2s pending flags - * - For other devices, it clears Bank1s pending flags. - * @param FLASH_FLAG: specifies the FLASH flags to clear. - * This parameter can be any combination of the following values: - * @arg FLASH_FLAG_PGERR: FLASH Program error flag - * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag - * @arg FLASH_FLAG_EOP: FLASH End of Operation flag - * @retval None - */ -void FLASH_ClearFlag(uint32_t FLASH_FLAG) -{ -#ifdef STM32F10X_XL - /* Check the parameters */ - assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; - - if((FLASH_FLAG & 0x80000000) != 0x0) - { - /* Clear the flags */ - FLASH->SR2 = FLASH_FLAG; - } - else - { - /* Clear the flags */ - FLASH->SR = FLASH_FLAG; - } - -#else - /* Check the parameters */ - assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; - - /* Clear the flags */ - FLASH->SR = FLASH_FLAG; -#endif /* STM32F10X_XL */ -} - -/** - * @brief Returns the FLASH Status. - * @note This function can be used for all STM32F10x devices, it is equivalent - * to FLASH_GetBank1Status function. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP or FLASH_COMPLETE - */ -FLASH_Status FLASH_GetStatus(void) -{ - FLASH_Status flashstatus = FLASH_COMPLETE; - - if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) - { - flashstatus = FLASH_BUSY; - } - else - { - if((FLASH->SR & FLASH_FLAG_PGERR) != 0) - { - flashstatus = FLASH_ERROR_PG; - } - else - { - if((FLASH->SR & FLASH_FLAG_WRPRTERR) != 0 ) - { - flashstatus = FLASH_ERROR_WRP; - } - else - { - flashstatus = FLASH_COMPLETE; - } - } - } - /* Return the Flash Status */ - return flashstatus; -} - -/** - * @brief Returns the FLASH Bank1 Status. - * @note This function can be used for all STM32F10x devices, it is equivalent - * to FLASH_GetStatus function. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP or FLASH_COMPLETE - */ -FLASH_Status FLASH_GetBank1Status(void) -{ - FLASH_Status flashstatus = FLASH_COMPLETE; - - if((FLASH->SR & FLASH_FLAG_BANK1_BSY) == FLASH_FLAG_BSY) - { - flashstatus = FLASH_BUSY; - } - else - { - if((FLASH->SR & FLASH_FLAG_BANK1_PGERR) != 0) - { - flashstatus = FLASH_ERROR_PG; - } - else - { - if((FLASH->SR & FLASH_FLAG_BANK1_WRPRTERR) != 0 ) - { - flashstatus = FLASH_ERROR_WRP; - } - else - { - flashstatus = FLASH_COMPLETE; - } - } - } - /* Return the Flash Status */ - return flashstatus; -} - -#ifdef STM32F10X_XL -/** - * @brief Returns the FLASH Bank2 Status. - * @note This function can be used for STM32F10x_XL density devices. - * @param None - * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, - * FLASH_ERROR_WRP or FLASH_COMPLETE - */ -FLASH_Status FLASH_GetBank2Status(void) -{ - FLASH_Status flashstatus = FLASH_COMPLETE; - - if((FLASH->SR2 & (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) - { - flashstatus = FLASH_BUSY; - } - else - { - if((FLASH->SR2 & (FLASH_FLAG_BANK2_PGERR & 0x7FFFFFFF)) != 0) - { - flashstatus = FLASH_ERROR_PG; - } - else - { - if((FLASH->SR2 & (FLASH_FLAG_BANK2_WRPRTERR & 0x7FFFFFFF)) != 0 ) - { - flashstatus = FLASH_ERROR_WRP; - } - else - { - flashstatus = FLASH_COMPLETE; - } - } - } - /* Return the Flash Status */ - return flashstatus; -} -#endif /* STM32F10X_XL */ -/** - * @brief Waits for a Flash operation to complete or a TIMEOUT to occur. - * @note This function can be used for all STM32F10x devices, - * it is equivalent to FLASH_WaitForLastBank1Operation. - * - For STM32F10X_XL devices this function waits for a Bank1 Flash operation - * to complete or a TIMEOUT to occur. - * - For all other devices it waits for a Flash operation to complete - * or a TIMEOUT to occur. - * @param Timeout: FLASH programming Timeout - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) -{ - FLASH_Status status = FLASH_COMPLETE; - - /* Check for the Flash Status */ - status = FLASH_GetBank1Status(); - /* Wait for a Flash operation to complete or a TIMEOUT to occur */ - while((status == FLASH_BUSY) && (Timeout != 0x00)) - { - status = FLASH_GetBank1Status(); - Timeout--; - } - if(Timeout == 0x00 ) - { - status = FLASH_TIMEOUT; - } - /* Return the operation status */ - return status; -} - -/** - * @brief Waits for a Flash operation on Bank1 to complete or a TIMEOUT to occur. - * @note This function can be used for all STM32F10x devices, - * it is equivalent to FLASH_WaitForLastOperation. - * @param Timeout: FLASH programming Timeout - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout) -{ - FLASH_Status status = FLASH_COMPLETE; - - /* Check for the Flash Status */ - status = FLASH_GetBank1Status(); - /* Wait for a Flash operation to complete or a TIMEOUT to occur */ - while((status == FLASH_FLAG_BANK1_BSY) && (Timeout != 0x00)) - { - status = FLASH_GetBank1Status(); - Timeout--; - } - if(Timeout == 0x00 ) - { - status = FLASH_TIMEOUT; - } - /* Return the operation status */ - return status; -} - -#ifdef STM32F10X_XL -/** - * @brief Waits for a Flash operation on Bank2 to complete or a TIMEOUT to occur. - * @note This function can be used only for STM32F10x_XL density devices. - * @param Timeout: FLASH programming Timeout - * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, - * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. - */ -FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout) -{ - FLASH_Status status = FLASH_COMPLETE; - - /* Check for the Flash Status */ - status = FLASH_GetBank2Status(); - /* Wait for a Flash operation to complete or a TIMEOUT to occur */ - while((status == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) && (Timeout != 0x00)) - { - status = FLASH_GetBank2Status(); - Timeout--; - } - if(Timeout == 0x00 ) - { - status = FLASH_TIMEOUT; - } - /* Return the operation status */ - return status; -} -#endif /* STM32F10X_XL */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_flash.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the FLASH firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_flash.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup FLASH + * @brief FLASH driver modules + * @{ + */ + +/** @defgroup FLASH_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_Defines + * @{ + */ + +/* Flash Access Control Register bits */ +#define ACR_LATENCY_Mask ((uint32_t)0x00000038) +#define ACR_HLFCYA_Mask ((uint32_t)0xFFFFFFF7) +#define ACR_PRFTBE_Mask ((uint32_t)0xFFFFFFEF) + +/* Flash Access Control Register bits */ +#define ACR_PRFTBS_Mask ((uint32_t)0x00000020) + +/* Flash Control Register bits */ +#define CR_PG_Set ((uint32_t)0x00000001) +#define CR_PG_Reset ((uint32_t)0x00001FFE) +#define CR_PER_Set ((uint32_t)0x00000002) +#define CR_PER_Reset ((uint32_t)0x00001FFD) +#define CR_MER_Set ((uint32_t)0x00000004) +#define CR_MER_Reset ((uint32_t)0x00001FFB) +#define CR_OPTPG_Set ((uint32_t)0x00000010) +#define CR_OPTPG_Reset ((uint32_t)0x00001FEF) +#define CR_OPTER_Set ((uint32_t)0x00000020) +#define CR_OPTER_Reset ((uint32_t)0x00001FDF) +#define CR_STRT_Set ((uint32_t)0x00000040) +#define CR_LOCK_Set ((uint32_t)0x00000080) + +/* FLASH Mask */ +#define RDPRT_Mask ((uint32_t)0x00000002) +#define WRP0_Mask ((uint32_t)0x000000FF) +#define WRP1_Mask ((uint32_t)0x0000FF00) +#define WRP2_Mask ((uint32_t)0x00FF0000) +#define WRP3_Mask ((uint32_t)0xFF000000) +#define OB_USER_BFB2 ((uint16_t)0x0008) + +/* FLASH Keys */ +#define RDP_Key ((uint16_t)0x00A5) +#define FLASH_KEY1 ((uint32_t)0x45670123) +#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) + +/* FLASH BANK address */ +#define FLASH_BANK1_END_ADDRESS ((uint32_t)0x807FFFF) + +/* Delay definition */ +#define EraseTimeout ((uint32_t)0x000B0000) +#define ProgramTimeout ((uint32_t)0x00002000) +/** + * @} + */ + +/** @defgroup FLASH_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup FLASH_Private_Functions + * @{ + */ + +/** +@code + + This driver provides functions to configure and program the Flash memory of all STM32F10x devices, + including the latest STM32F10x_XL density devices. + + STM32F10x_XL devices feature up to 1 Mbyte with dual bank architecture for read-while-write (RWW) capability: + - bank1: fixed size of 512 Kbytes (256 pages of 2Kbytes each) + - bank2: up to 512 Kbytes (up to 256 pages of 2Kbytes each) + While other STM32F10x devices features only one bank with memory up to 512 Kbytes. + + In version V3.3.0, some functions were updated and new ones were added to support + STM32F10x_XL devices. Thus some functions manages all devices, while other are + dedicated for XL devices only. + + The table below presents the list of available functions depending on the used STM32F10x devices. + + *************************************************** + * Legacy functions used for all STM32F10x devices * + *************************************************** + +----------------------------------------------------------------------------------------------------------------------------------+ + | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | + | | devices | devices | | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_SetLatency | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_HalfCycleAccessCmd | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_PrefetchBufferCmd | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_Unlock | Yes | Yes | - For STM32F10X_XL devices: unlock Bank1 and Bank2. | + | | | | - For other devices: unlock Bank1 and it is equivalent | + | | | | to FLASH_UnlockBank1 function. | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_Lock | Yes | Yes | - For STM32F10X_XL devices: lock Bank1 and Bank2. | + | | | | - For other devices: lock Bank1 and it is equivalent | + | | | | to FLASH_LockBank1 function. | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ErasePage | Yes | Yes | - For STM32F10x_XL devices: erase a page in Bank1 and Bank2 | + | | | | - For other devices: erase a page in Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_EraseAllPages | Yes | Yes | - For STM32F10x_XL devices: erase all pages in Bank1 and Bank2 | + | | | | - For other devices: erase all pages in Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_EraseOptionBytes | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ProgramWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ProgramHalfWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ProgramOptionByteData | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_EnableWriteProtection | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ReadOutProtection | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_UserOptionByteConfig | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetUserOptionByte | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetWriteProtectionOptionByte | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetReadOutProtectionStatus | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetPrefetchBufferStatus | Yes | Yes | No change | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ITConfig | Yes | Yes | - For STM32F10x_XL devices: enable Bank1 and Bank2's interrupts| + | | | | - For other devices: enable Bank1's interrupts | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetFlagStatus | Yes | Yes | - For STM32F10x_XL devices: return Bank1 and Bank2's flag status| + | | | | - For other devices: return Bank1's flag status | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_ClearFlag | Yes | Yes | - For STM32F10x_XL devices: clear Bank1 and Bank2's flag | + | | | | - For other devices: clear Bank1's flag | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_GetStatus | Yes | Yes | - Return the status of Bank1 (for all devices) | + | | | | equivalent to FLASH_GetBank1Status function | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_WaitForLastOperation | Yes | Yes | - Wait for Bank1 last operation (for all devices) | + | | | | equivalent to: FLASH_WaitForLastBank1Operation function | + +----------------------------------------------------------------------------------------------------------------------------------+ + + ************************************************************************************************************************ + * New functions used for all STM32F10x devices to manage Bank1: * + * - These functions are mainly useful for STM32F10x_XL density devices, to have separate control for Bank1 and bank2 * + * - For other devices, these functions are optional (covered by functions listed above) * + ************************************************************************************************************************ + +----------------------------------------------------------------------------------------------------------------------------------+ + | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | + | | devices | devices | | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_UnlockBank1 | Yes | Yes | - Unlock Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_LockBank1 | Yes | Yes | - Lock Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_EraseAllBank1Pages | Yes | Yes | - Erase all pages in Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_GetBank1Status | Yes | Yes | - Return the status of Bank1 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_WaitForLastBank1Operation | Yes | Yes | - Wait for Bank1 last operation | + +----------------------------------------------------------------------------------------------------------------------------------+ + + ***************************************************************************** + * New Functions used only with STM32F10x_XL density devices to manage Bank2 * + ***************************************************************************** + +----------------------------------------------------------------------------------------------------------------------------------+ + | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments | + | | devices | devices | | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_UnlockBank2 | Yes | No | - Unlock Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + |FLASH_LockBank2 | Yes | No | - Lock Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_EraseAllBank2Pages | Yes | No | - Erase all pages in Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_GetBank2Status | Yes | No | - Return the status of Bank2 | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_WaitForLastBank2Operation | Yes | No | - Wait for Bank2 last operation | + |----------------------------------------------------------------------------------------------------------------------------------| + | FLASH_BootConfig | Yes | No | - Configure to boot from Bank1 or Bank2 | + +----------------------------------------------------------------------------------------------------------------------------------+ +@endcode +*/ + + +/** + * @brief Sets the code latency value. + * @note This function can be used for all STM32F10x devices. + * @param FLASH_Latency: specifies the FLASH Latency value. + * This parameter can be one of the following values: + * @arg FLASH_Latency_0: FLASH Zero Latency cycle + * @arg FLASH_Latency_1: FLASH One Latency cycle + * @arg FLASH_Latency_2: FLASH Two Latency cycles + * @retval None + */ +void FLASH_SetLatency(uint32_t FLASH_Latency) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_FLASH_LATENCY(FLASH_Latency)); + + /* Read the ACR register */ + tmpreg = FLASH->ACR; + + /* Sets the Latency value */ + tmpreg &= ACR_LATENCY_Mask; + tmpreg |= FLASH_Latency; + + /* Write the ACR register */ + FLASH->ACR = tmpreg; +} + +/** + * @brief Enables or disables the Half cycle flash access. + * @note This function can be used for all STM32F10x devices. + * @param FLASH_HalfCycleAccess: specifies the FLASH Half cycle Access mode. + * This parameter can be one of the following values: + * @arg FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable + * @arg FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable + * @retval None + */ +void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess) +{ + /* Check the parameters */ + assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess)); + + /* Enable or disable the Half cycle access */ + FLASH->ACR &= ACR_HLFCYA_Mask; + FLASH->ACR |= FLASH_HalfCycleAccess; +} + +/** + * @brief Enables or disables the Prefetch Buffer. + * @note This function can be used for all STM32F10x devices. + * @param FLASH_PrefetchBuffer: specifies the Prefetch buffer status. + * This parameter can be one of the following values: + * @arg FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable + * @arg FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable + * @retval None + */ +void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer) +{ + /* Check the parameters */ + assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer)); + + /* Enable or disable the Prefetch Buffer */ + FLASH->ACR &= ACR_PRFTBE_Mask; + FLASH->ACR |= FLASH_PrefetchBuffer; +} + +/** + * @brief Unlocks the FLASH Program Erase Controller. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function unlocks Bank1 and Bank2. + * - For all other devices it unlocks Bank1 and it is equivalent + * to FLASH_UnlockBank1 function.. + * @param None + * @retval None + */ +void FLASH_Unlock(void) +{ + /* Authorize the FPEC of Bank1 Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; + +#ifdef STM32F10X_XL + /* Authorize the FPEC of Bank2 Access */ + FLASH->KEYR2 = FLASH_KEY1; + FLASH->KEYR2 = FLASH_KEY2; +#endif /* STM32F10X_XL */ +} +/** + * @brief Unlocks the FLASH Bank1 Program Erase Controller. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function unlocks Bank1. + * - For all other devices it unlocks Bank1 and it is + * equivalent to FLASH_Unlock function. + * @param None + * @retval None + */ +void FLASH_UnlockBank1(void) +{ + /* Authorize the FPEC of Bank1 Access */ + FLASH->KEYR = FLASH_KEY1; + FLASH->KEYR = FLASH_KEY2; +} + +#ifdef STM32F10X_XL +/** + * @brief Unlocks the FLASH Bank2 Program Erase Controller. + * @note This function can be used only for STM32F10X_XL density devices. + * @param None + * @retval None + */ +void FLASH_UnlockBank2(void) +{ + /* Authorize the FPEC of Bank2 Access */ + FLASH->KEYR2 = FLASH_KEY1; + FLASH->KEYR2 = FLASH_KEY2; + +} +#endif /* STM32F10X_XL */ + +/** + * @brief Locks the FLASH Program Erase Controller. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function Locks Bank1 and Bank2. + * - For all other devices it Locks Bank1 and it is equivalent + * to FLASH_LockBank1 function. + * @param None + * @retval None + */ +void FLASH_Lock(void) +{ + /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */ + FLASH->CR |= CR_LOCK_Set; + +#ifdef STM32F10X_XL + /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */ + FLASH->CR2 |= CR_LOCK_Set; +#endif /* STM32F10X_XL */ +} + +/** + * @brief Locks the FLASH Bank1 Program Erase Controller. + * @note this function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function Locks Bank1. + * - For all other devices it Locks Bank1 and it is equivalent + * to FLASH_Lock function. + * @param None + * @retval None + */ +void FLASH_LockBank1(void) +{ + /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */ + FLASH->CR |= CR_LOCK_Set; +} + +#ifdef STM32F10X_XL +/** + * @brief Locks the FLASH Bank2 Program Erase Controller. + * @note This function can be used only for STM32F10X_XL density devices. + * @param None + * @retval None + */ +void FLASH_LockBank2(void) +{ + /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */ + FLASH->CR2 |= CR_LOCK_Set; +} +#endif /* STM32F10X_XL */ + +/** + * @brief Erases a specified FLASH page. + * @note This function can be used for all STM32F10x devices. + * @param Page_Address: The page address to be erased. + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ErasePage(uint32_t Page_Address) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_FLASH_ADDRESS(Page_Address)); + +#ifdef STM32F10X_XL + if(Page_Address < FLASH_BANK1_END_ADDRESS) + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase the page */ + FLASH->CR|= CR_PER_Set; + FLASH->AR = Page_Address; + FLASH->CR|= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + /* Disable the PER Bit */ + FLASH->CR &= CR_PER_Reset; + } + } + else + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase the page */ + FLASH->CR2|= CR_PER_Set; + FLASH->AR2 = Page_Address; + FLASH->CR2|= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + /* Disable the PER Bit */ + FLASH->CR2 &= CR_PER_Reset; + } + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase the page */ + FLASH->CR|= CR_PER_Set; + FLASH->AR = Page_Address; + FLASH->CR|= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + /* Disable the PER Bit */ + FLASH->CR &= CR_PER_Reset; + } +#endif /* STM32F10X_XL */ + + /* Return the Erase Status */ + return status; +} + +/** + * @brief Erases all FLASH pages. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseAllPages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + +#ifdef STM32F10X_XL + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR |= CR_MER_Set; + FLASH->CR |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR &= CR_MER_Reset; + } + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR2 |= CR_MER_Set; + FLASH->CR2 |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR2 &= CR_MER_Reset; + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR |= CR_MER_Set; + FLASH->CR |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR &= CR_MER_Reset; + } +#endif /* STM32F10X_XL */ + + /* Return the Erase Status */ + return status; +} + +/** + * @brief Erases all Bank1 FLASH pages. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices this function erases all Bank1 pages. + * - For all other devices it erases all Bank1 pages and it is equivalent + * to FLASH_EraseAllPages function. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseAllBank1Pages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR |= CR_MER_Set; + FLASH->CR |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR &= CR_MER_Reset; + } + /* Return the Erase Status */ + return status; +} + +#ifdef STM32F10X_XL +/** + * @brief Erases all Bank2 FLASH pages. + * @note This function can be used only for STM32F10x_XL density devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseAllBank2Pages(void) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to erase all pages */ + FLASH->CR2 |= CR_MER_Set; + FLASH->CR2 |= CR_STRT_Set; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(EraseTimeout); + + /* Disable the MER Bit */ + FLASH->CR2 &= CR_MER_Reset; + } + /* Return the Erase Status */ + return status; +} +#endif /* STM32F10X_XL */ + +/** + * @brief Erases the FLASH option bytes. + * @note This functions erases all option bytes except the Read protection (RDP). + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EraseOptionBytes(void) +{ + uint16_t rdptmp = RDP_Key; + + FLASH_Status status = FLASH_COMPLETE; + + /* Get the actual read protection Option Byte value */ + if(FLASH_GetReadOutProtectionStatus() != RESET) + { + rdptmp = 0x00; + } + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + + /* if the previous operation is completed, proceed to erase the option bytes */ + FLASH->CR |= CR_OPTER_Set; + FLASH->CR |= CR_STRT_Set; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the erase operation is completed, disable the OPTER Bit */ + FLASH->CR &= CR_OPTER_Reset; + + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + /* Restore the last read protection Option Byte value */ + OB->RDP = (uint16_t)rdptmp; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + else + { + if (status != FLASH_TIMEOUT) + { + /* Disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + } + /* Return the erase status */ + return status; +} + +/** + * @brief Programs a word at a specified address. + * @note This function can be used for all STM32F10x devices. + * @param Address: specifies the address to be programmed. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_FLASH_ADDRESS(Address)); + +#ifdef STM32F10X_XL + if(Address < FLASH_BANK1_END_ADDRESS - 2) + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + } + } + else if(Address == (FLASH_BANK1_END_ADDRESS - 1)) + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + FLASH->CR2 |= CR_PG_Set; + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + } + else + { + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR2 |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + } + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new first + half word */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = (uint16_t)Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new second + half word */ + tmp = Address + 2; + + *(__IO uint16_t*) tmp = Data >> 16; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + else + { + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + } +#endif /* STM32F10X_XL */ + + /* Return the Program Status */ + return status; +} + +/** + * @brief Programs a half word at a specified address. + * @note This function can be used for all STM32F10x devices. + * @param Address: specifies the address to be programmed. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_FLASH_ADDRESS(Address)); + +#ifdef STM32F10X_XL + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(Address < FLASH_BANK1_END_ADDRESS) + { + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new data */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank1Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } + } + else + { + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new data */ + FLASH->CR2 |= CR_PG_Set; + + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastBank2Operation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR2 &= CR_PG_Reset; + } + } +#else + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* if the previous operation is completed, proceed to program the new data */ + FLASH->CR |= CR_PG_Set; + + *(__IO uint16_t*)Address = Data; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + /* Disable the PG Bit */ + FLASH->CR &= CR_PG_Reset; + } +#endif /* STM32F10X_XL */ + + /* Return the Program Status */ + return status; +} + +/** + * @brief Programs a half word at a specified Option Byte Data address. + * @note This function can be used for all STM32F10x devices. + * @param Address: specifies the address to be programmed. + * This parameter can be 0x1FFFF804 or 0x1FFFF806. + * @param Data: specifies the data to be programmed. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_OB_DATA_ADDRESS(Address)); + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + /* Enables the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + *(__IO uint16_t*)Address = Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the Option Byte Data Program Status */ + return status; +} + +/** + * @brief Write protects the desired pages + * @note This function can be used for all STM32F10x devices. + * @param FLASH_Pages: specifies the address of the pages to be write protected. + * This parameter can be: + * @arg For @b STM32_Low-density_devices: value between FLASH_WRProt_Pages0to3 and FLASH_WRProt_Pages28to31 + * @arg For @b STM32_Medium-density_devices: value between FLASH_WRProt_Pages0to3 + * and FLASH_WRProt_Pages124to127 + * @arg For @b STM32_High-density_devices: value between FLASH_WRProt_Pages0to1 and + * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to255 + * @arg For @b STM32_Connectivity_line_devices: value between FLASH_WRProt_Pages0to1 and + * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to127 + * @arg For @b STM32_XL-density_devices: value between FLASH_WRProt_Pages0to1 and + * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to511 + * @arg FLASH_WRProt_AllPages + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages) +{ + uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF; + + FLASH_Status status = FLASH_COMPLETE; + + /* Check the parameters */ + assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages)); + + FLASH_Pages = (uint32_t)(~FLASH_Pages); + WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask); + WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8); + WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16); + WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24); + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Authorizes the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + FLASH->CR |= CR_OPTPG_Set; + if(WRP0_Data != 0xFF) + { + OB->WRP0 = WRP0_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF)) + { + OB->WRP1 = WRP1_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF)) + { + OB->WRP2 = WRP2_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + + if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF)) + { + OB->WRP3 = WRP3_Data; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + } + + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the write protection operation Status */ + return status; +} + +/** + * @brief Enables or disables the read out protection. + * @note If the user has already programmed the other option bytes before calling + * this function, he must re-program them since this function erases all option bytes. + * @note This function can be used for all STM32F10x devices. + * @param Newstate: new state of the ReadOut Protection. + * This parameter can be: ENABLE or DISABLE. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState) +{ + FLASH_Status status = FLASH_COMPLETE; + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* Authorizes the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + FLASH->CR |= CR_OPTER_Set; + FLASH->CR |= CR_STRT_Set; + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + if(status == FLASH_COMPLETE) + { + /* if the erase operation is completed, disable the OPTER Bit */ + FLASH->CR &= CR_OPTER_Reset; + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + if(NewState != DISABLE) + { + OB->RDP = 0x00; + } + else + { + OB->RDP = RDP_Key; + } + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(EraseTimeout); + + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + else + { + if(status != FLASH_TIMEOUT) + { + /* Disable the OPTER Bit */ + FLASH->CR &= CR_OPTER_Reset; + } + } + } + /* Return the protection operation Status */ + return status; +} + +/** + * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. + * @note This function can be used for all STM32F10x devices. + * @param OB_IWDG: Selects the IWDG mode + * This parameter can be one of the following values: + * @arg OB_IWDG_SW: Software IWDG selected + * @arg OB_IWDG_HW: Hardware IWDG selected + * @param OB_STOP: Reset event when entering STOP mode. + * This parameter can be one of the following values: + * @arg OB_STOP_NoRST: No reset generated when entering in STOP + * @arg OB_STOP_RST: Reset generated when entering in STOP + * @param OB_STDBY: Reset event when entering Standby mode. + * This parameter can be one of the following values: + * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY + * @arg OB_STDBY_RST: Reset generated when entering in STANDBY + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check the parameters */ + assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); + assert_param(IS_OB_STOP_SOURCE(OB_STOP)); + assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); + + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + + OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8))); + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the Option Byte program Status */ + return status; +} + +#ifdef STM32F10X_XL +/** + * @brief Configures to boot from Bank1 or Bank2. + * @note This function can be used only for STM32F10x_XL density devices. + * @param FLASH_BOOT: select the FLASH Bank to boot from. + * This parameter can be one of the following values: + * @arg FLASH_BOOT_Bank1: At startup, if boot pins are set in boot from user Flash + * position and this parameter is selected the device will boot from Bank1(Default). + * @arg FLASH_BOOT_Bank2: At startup, if boot pins are set in boot from user Flash + * position and this parameter is selected the device will boot from Bank2 or Bank1, + * depending on the activation of the bank. The active banks are checked in + * the following order: Bank2, followed by Bank1. + * The active bank is recognized by the value programmed at the base address + * of the respective bank (corresponding to the initial stack pointer value + * in the interrupt vector table). + * For more information, please refer to AN2606 from www.st.com. + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT) +{ + FLASH_Status status = FLASH_COMPLETE; + assert_param(IS_FLASH_BOOT(FLASH_BOOT)); + /* Authorize the small information block programming */ + FLASH->OPTKEYR = FLASH_KEY1; + FLASH->OPTKEYR = FLASH_KEY2; + + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + + if(status == FLASH_COMPLETE) + { + /* Enable the Option Bytes Programming operation */ + FLASH->CR |= CR_OPTPG_Set; + + if(FLASH_BOOT == FLASH_BOOT_Bank1) + { + OB->USER |= OB_USER_BFB2; + } + else + { + OB->USER &= (uint16_t)(~(uint16_t)(OB_USER_BFB2)); + } + /* Wait for last operation to be completed */ + status = FLASH_WaitForLastOperation(ProgramTimeout); + if(status != FLASH_TIMEOUT) + { + /* if the program operation is completed, disable the OPTPG Bit */ + FLASH->CR &= CR_OPTPG_Reset; + } + } + /* Return the Option Byte program Status */ + return status; +} +#endif /* STM32F10X_XL */ + +/** + * @brief Returns the FLASH User Option Bytes values. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1) + * and RST_STDBY(Bit2). + */ +uint32_t FLASH_GetUserOptionByte(void) +{ + /* Return the User Option Byte */ + return (uint32_t)(FLASH->OBR >> 2); +} + +/** + * @brief Returns the FLASH Write Protection Option Bytes Register value. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval The FLASH Write Protection Option Bytes Register value + */ +uint32_t FLASH_GetWriteProtectionOptionByte(void) +{ + /* Return the Flash write protection Register value */ + return (uint32_t)(FLASH->WRPR); +} + +/** + * @brief Checks whether the FLASH Read Out Protection Status is set or not. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH ReadOut Protection Status(SET or RESET) + */ +FlagStatus FLASH_GetReadOutProtectionStatus(void) +{ + FlagStatus readoutstatus = RESET; + if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET) + { + readoutstatus = SET; + } + else + { + readoutstatus = RESET; + } + return readoutstatus; +} + +/** + * @brief Checks whether the FLASH Prefetch Buffer status is set or not. + * @note This function can be used for all STM32F10x devices. + * @param None + * @retval FLASH Prefetch Buffer Status (SET or RESET). + */ +FlagStatus FLASH_GetPrefetchBufferStatus(void) +{ + FlagStatus bitstatus = RESET; + + if ((FLASH->ACR & ACR_PRFTBS_Mask) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */ + return bitstatus; +} + +/** + * @brief Enables or disables the specified FLASH interrupts. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices, enables or disables the specified FLASH interrupts + for Bank1 and Bank2. + * - For other devices it enables or disables the specified FLASH interrupts for Bank1. + * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg FLASH_IT_ERROR: FLASH Error Interrupt + * @arg FLASH_IT_EOP: FLASH end of operation Interrupt + * @param NewState: new state of the specified Flash interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState) +{ +#ifdef STM32F10X_XL + /* Check the parameters */ + assert_param(IS_FLASH_IT(FLASH_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if((FLASH_IT & 0x80000000) != 0x0) + { + if(NewState != DISABLE) + { + /* Enable the interrupt sources */ + FLASH->CR2 |= (FLASH_IT & 0x7FFFFFFF); + } + else + { + /* Disable the interrupt sources */ + FLASH->CR2 &= ~(uint32_t)(FLASH_IT & 0x7FFFFFFF); + } + } + else + { + if(NewState != DISABLE) + { + /* Enable the interrupt sources */ + FLASH->CR |= FLASH_IT; + } + else + { + /* Disable the interrupt sources */ + FLASH->CR &= ~(uint32_t)FLASH_IT; + } + } +#else + /* Check the parameters */ + assert_param(IS_FLASH_IT(FLASH_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if(NewState != DISABLE) + { + /* Enable the interrupt sources */ + FLASH->CR |= FLASH_IT; + } + else + { + /* Disable the interrupt sources */ + FLASH->CR &= ~(uint32_t)FLASH_IT; + } +#endif /* STM32F10X_XL */ +} + +/** + * @brief Checks whether the specified FLASH flag is set or not. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices, this function checks whether the specified + * Bank1 or Bank2 flag is set or not. + * - For other devices, it checks whether the specified Bank1 flag is + * set or not. + * @param FLASH_FLAG: specifies the FLASH flag to check. + * This parameter can be one of the following values: + * @arg FLASH_FLAG_BSY: FLASH Busy flag + * @arg FLASH_FLAG_PGERR: FLASH Program error flag + * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag + * @arg FLASH_FLAG_EOP: FLASH End of Operation flag + * @arg FLASH_FLAG_OPTERR: FLASH Option Byte error flag + * @retval The new state of FLASH_FLAG (SET or RESET). + */ +FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) +{ + FlagStatus bitstatus = RESET; + +#ifdef STM32F10X_XL + /* Check the parameters */ + assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; + if(FLASH_FLAG == FLASH_FLAG_OPTERR) + { + if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH_FLAG & 0x80000000) != 0x0) + { + if((FLASH->SR2 & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + } +#else + /* Check the parameters */ + assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ; + if(FLASH_FLAG == FLASH_FLAG_OPTERR) + { + if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } + else + { + if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + } +#endif /* STM32F10X_XL */ + + /* Return the new state of FLASH_FLAG (SET or RESET) */ + return bitstatus; +} + +/** + * @brief Clears the FLASH's pending flags. + * @note This function can be used for all STM32F10x devices. + * - For STM32F10X_XL devices, this function clears Bank1 or Bank2s pending flags + * - For other devices, it clears Bank1s pending flags. + * @param FLASH_FLAG: specifies the FLASH flags to clear. + * This parameter can be any combination of the following values: + * @arg FLASH_FLAG_PGERR: FLASH Program error flag + * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag + * @arg FLASH_FLAG_EOP: FLASH End of Operation flag + * @retval None + */ +void FLASH_ClearFlag(uint32_t FLASH_FLAG) +{ +#ifdef STM32F10X_XL + /* Check the parameters */ + assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; + + if((FLASH_FLAG & 0x80000000) != 0x0) + { + /* Clear the flags */ + FLASH->SR2 = FLASH_FLAG; + } + else + { + /* Clear the flags */ + FLASH->SR = FLASH_FLAG; + } + +#else + /* Check the parameters */ + assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ; + + /* Clear the flags */ + FLASH->SR = FLASH_FLAG; +#endif /* STM32F10X_XL */ +} + +/** + * @brief Returns the FLASH Status. + * @note This function can be used for all STM32F10x devices, it is equivalent + * to FLASH_GetBank1Status function. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetStatus(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->SR & FLASH_FLAG_PGERR) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->SR & FLASH_FLAG_WRPRTERR) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + /* Return the Flash Status */ + return flashstatus; +} + +/** + * @brief Returns the FLASH Bank1 Status. + * @note This function can be used for all STM32F10x devices, it is equivalent + * to FLASH_GetStatus function. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetBank1Status(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->SR & FLASH_FLAG_BANK1_BSY) == FLASH_FLAG_BSY) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->SR & FLASH_FLAG_BANK1_PGERR) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->SR & FLASH_FLAG_BANK1_WRPRTERR) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + /* Return the Flash Status */ + return flashstatus; +} + +#ifdef STM32F10X_XL +/** + * @brief Returns the FLASH Bank2 Status. + * @note This function can be used for STM32F10x_XL density devices. + * @param None + * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG, + * FLASH_ERROR_WRP or FLASH_COMPLETE + */ +FLASH_Status FLASH_GetBank2Status(void) +{ + FLASH_Status flashstatus = FLASH_COMPLETE; + + if((FLASH->SR2 & (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) + { + flashstatus = FLASH_BUSY; + } + else + { + if((FLASH->SR2 & (FLASH_FLAG_BANK2_PGERR & 0x7FFFFFFF)) != 0) + { + flashstatus = FLASH_ERROR_PG; + } + else + { + if((FLASH->SR2 & (FLASH_FLAG_BANK2_WRPRTERR & 0x7FFFFFFF)) != 0 ) + { + flashstatus = FLASH_ERROR_WRP; + } + else + { + flashstatus = FLASH_COMPLETE; + } + } + } + /* Return the Flash Status */ + return flashstatus; +} +#endif /* STM32F10X_XL */ +/** + * @brief Waits for a Flash operation to complete or a TIMEOUT to occur. + * @note This function can be used for all STM32F10x devices, + * it is equivalent to FLASH_WaitForLastBank1Operation. + * - For STM32F10X_XL devices this function waits for a Bank1 Flash operation + * to complete or a TIMEOUT to occur. + * - For all other devices it waits for a Flash operation to complete + * or a TIMEOUT to occur. + * @param Timeout: FLASH programming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check for the Flash Status */ + status = FLASH_GetBank1Status(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while((status == FLASH_BUSY) && (Timeout != 0x00)) + { + status = FLASH_GetBank1Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + /* Return the operation status */ + return status; +} + +/** + * @brief Waits for a Flash operation on Bank1 to complete or a TIMEOUT to occur. + * @note This function can be used for all STM32F10x devices, + * it is equivalent to FLASH_WaitForLastOperation. + * @param Timeout: FLASH programming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check for the Flash Status */ + status = FLASH_GetBank1Status(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while((status == FLASH_FLAG_BANK1_BSY) && (Timeout != 0x00)) + { + status = FLASH_GetBank1Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + /* Return the operation status */ + return status; +} + +#ifdef STM32F10X_XL +/** + * @brief Waits for a Flash operation on Bank2 to complete or a TIMEOUT to occur. + * @note This function can be used only for STM32F10x_XL density devices. + * @param Timeout: FLASH programming Timeout + * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG, + * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT. + */ +FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout) +{ + FLASH_Status status = FLASH_COMPLETE; + + /* Check for the Flash Status */ + status = FLASH_GetBank2Status(); + /* Wait for a Flash operation to complete or a TIMEOUT to occur */ + while((status == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) && (Timeout != 0x00)) + { + status = FLASH_GetBank2Status(); + Timeout--; + } + if(Timeout == 0x00 ) + { + status = FLASH_TIMEOUT; + } + /* Return the operation status */ + return status; +} +#endif /* STM32F10X_XL */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c index 51669ee3..c75137ca 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_fsmc.c @@ -1,866 +1,866 @@ -/** - ****************************************************************************** - * @file stm32f10x_fsmc.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the FSMC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_fsmc.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup FSMC - * @brief FSMC driver modules - * @{ - */ - -/** @defgroup FSMC_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup FSMC_Private_Defines - * @{ - */ - -/* --------------------- FSMC registers bit mask ---------------------------- */ - -/* FSMC BCRx Mask */ -#define BCR_MBKEN_Set ((uint32_t)0x00000001) -#define BCR_MBKEN_Reset ((uint32_t)0x000FFFFE) -#define BCR_FACCEN_Set ((uint32_t)0x00000040) - -/* FSMC PCRx Mask */ -#define PCR_PBKEN_Set ((uint32_t)0x00000004) -#define PCR_PBKEN_Reset ((uint32_t)0x000FFFFB) -#define PCR_ECCEN_Set ((uint32_t)0x00000040) -#define PCR_ECCEN_Reset ((uint32_t)0x000FFFBF) -#define PCR_MemoryType_NAND ((uint32_t)0x00000008) -/** - * @} - */ - -/** @defgroup FSMC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup FSMC_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the FSMC NOR/SRAM Banks registers to their default - * reset values. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 - * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 - * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 - * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 - * @retval None - */ -void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank) -{ - /* Check the parameter */ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); - - /* FSMC_Bank1_NORSRAM1 */ - if(FSMC_Bank == FSMC_Bank1_NORSRAM1) - { - FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB; - } - /* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */ - else - { - FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2; - } - FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF; - FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF; -} - -/** - * @brief Deinitializes the FSMC NAND Banks registers to their default reset values. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @retval None - */ -void FSMC_NANDDeInit(uint32_t FSMC_Bank) -{ - /* Check the parameter */ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - /* Set the FSMC_Bank2 registers to their reset values */ - FSMC_Bank2->PCR2 = 0x00000018; - FSMC_Bank2->SR2 = 0x00000040; - FSMC_Bank2->PMEM2 = 0xFCFCFCFC; - FSMC_Bank2->PATT2 = 0xFCFCFCFC; - } - /* FSMC_Bank3_NAND */ - else - { - /* Set the FSMC_Bank3 registers to their reset values */ - FSMC_Bank3->PCR3 = 0x00000018; - FSMC_Bank3->SR3 = 0x00000040; - FSMC_Bank3->PMEM3 = 0xFCFCFCFC; - FSMC_Bank3->PATT3 = 0xFCFCFCFC; - } -} - -/** - * @brief Deinitializes the FSMC PCCARD Bank registers to their default reset values. - * @param None - * @retval None - */ -void FSMC_PCCARDDeInit(void) -{ - /* Set the FSMC_Bank4 registers to their reset values */ - FSMC_Bank4->PCR4 = 0x00000018; - FSMC_Bank4->SR4 = 0x00000000; - FSMC_Bank4->PMEM4 = 0xFCFCFCFC; - FSMC_Bank4->PATT4 = 0xFCFCFCFC; - FSMC_Bank4->PIO4 = 0xFCFCFCFC; -} - -/** - * @brief Initializes the FSMC NOR/SRAM Banks according to the specified - * parameters in the FSMC_NORSRAMInitStruct. - * @param FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef - * structure that contains the configuration information for - * the FSMC NOR/SRAM specified Banks. - * @retval None - */ -void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) -{ - /* Check the parameters */ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank)); - assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux)); - assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType)); - assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth)); - assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode)); - assert_param(IS_FSMC_ASYNWAIT(FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait)); - assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity)); - assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode)); - assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive)); - assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation)); - assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal)); - assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode)); - assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst)); - assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime)); - assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime)); - assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime)); - assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration)); - assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision)); - assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency)); - assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode)); - - /* Bank1 NOR/SRAM control register configuration */ - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux | - FSMC_NORSRAMInitStruct->FSMC_MemoryType | - FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth | - FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode | - FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait | - FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity | - FSMC_NORSRAMInitStruct->FSMC_WrapMode | - FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive | - FSMC_NORSRAMInitStruct->FSMC_WriteOperation | - FSMC_NORSRAMInitStruct->FSMC_WaitSignal | - FSMC_NORSRAMInitStruct->FSMC_ExtendedMode | - FSMC_NORSRAMInitStruct->FSMC_WriteBurst; - - if(FSMC_NORSRAMInitStruct->FSMC_MemoryType == FSMC_MemoryType_NOR) - { - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] |= (uint32_t)BCR_FACCEN_Set; - } - - /* Bank1 NOR/SRAM timing register configuration */ - FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank+1] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime << 4) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime << 8) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration << 16) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision << 20) | - (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency << 24) | - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode; - - - /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ - if(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode == FSMC_ExtendedMode_Enable) - { - assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime)); - assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime)); - assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime)); - assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision)); - assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency)); - assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode)); - FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = - (uint32_t)FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime << 4 )| - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime << 8) | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision << 20) | - (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency << 24) | - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode; - } - else - { - FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = 0x0FFFFFFF; - } -} - -/** - * @brief Initializes the FSMC NAND Banks according to the specified - * parameters in the FSMC_NANDInitStruct. - * @param FSMC_NANDInitStruct : pointer to a FSMC_NANDInitTypeDef - * structure that contains the configuration information for the FSMC - * NAND specified Banks. - * @retval None - */ -void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) -{ - uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000; - - /* Check the parameters */ - assert_param( IS_FSMC_NAND_BANK(FSMC_NANDInitStruct->FSMC_Bank)); - assert_param( IS_FSMC_WAIT_FEATURE(FSMC_NANDInitStruct->FSMC_Waitfeature)); - assert_param( IS_FSMC_MEMORY_WIDTH(FSMC_NANDInitStruct->FSMC_MemoryDataWidth)); - assert_param( IS_FSMC_ECC_STATE(FSMC_NANDInitStruct->FSMC_ECC)); - assert_param( IS_FSMC_ECCPAGE_SIZE(FSMC_NANDInitStruct->FSMC_ECCPageSize)); - assert_param( IS_FSMC_TCLR_TIME(FSMC_NANDInitStruct->FSMC_TCLRSetupTime)); - assert_param( IS_FSMC_TAR_TIME(FSMC_NANDInitStruct->FSMC_TARSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); - - /* Set the tmppcr value according to FSMC_NANDInitStruct parameters */ - tmppcr = (uint32_t)FSMC_NANDInitStruct->FSMC_Waitfeature | - PCR_MemoryType_NAND | - FSMC_NANDInitStruct->FSMC_MemoryDataWidth | - FSMC_NANDInitStruct->FSMC_ECC | - FSMC_NANDInitStruct->FSMC_ECCPageSize | - (FSMC_NANDInitStruct->FSMC_TCLRSetupTime << 9 )| - (FSMC_NANDInitStruct->FSMC_TARSetupTime << 13); - - /* Set tmppmem value according to FSMC_CommonSpaceTimingStructure parameters */ - tmppmem = (uint32_t)FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set tmppatt value according to FSMC_AttributeSpaceTimingStructure parameters */ - tmppatt = (uint32_t)FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - if(FSMC_NANDInitStruct->FSMC_Bank == FSMC_Bank2_NAND) - { - /* FSMC_Bank2_NAND registers configuration */ - FSMC_Bank2->PCR2 = tmppcr; - FSMC_Bank2->PMEM2 = tmppmem; - FSMC_Bank2->PATT2 = tmppatt; - } - else - { - /* FSMC_Bank3_NAND registers configuration */ - FSMC_Bank3->PCR3 = tmppcr; - FSMC_Bank3->PMEM3 = tmppmem; - FSMC_Bank3->PATT3 = tmppatt; - } -} - -/** - * @brief Initializes the FSMC PCCARD Bank according to the specified - * parameters in the FSMC_PCCARDInitStruct. - * @param FSMC_PCCARDInitStruct : pointer to a FSMC_PCCARDInitTypeDef - * structure that contains the configuration information for the FSMC - * PCCARD Bank. - * @retval None - */ -void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) -{ - /* Check the parameters */ - assert_param(IS_FSMC_WAIT_FEATURE(FSMC_PCCARDInitStruct->FSMC_Waitfeature)); - assert_param(IS_FSMC_TCLR_TIME(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime)); - assert_param(IS_FSMC_TAR_TIME(FSMC_PCCARDInitStruct->FSMC_TARSetupTime)); - - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); - - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); - assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime)); - assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime)); - assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime)); - assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime)); - - /* Set the PCR4 register value according to FSMC_PCCARDInitStruct parameters */ - FSMC_Bank4->PCR4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_Waitfeature | - FSMC_MemoryDataWidth_16b | - (FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime << 9) | - (FSMC_PCCARDInitStruct->FSMC_TARSetupTime << 13); - - /* Set PMEM4 register value according to FSMC_CommonSpaceTimingStructure parameters */ - FSMC_Bank4->PMEM4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set PATT4 register value according to FSMC_AttributeSpaceTimingStructure parameters */ - FSMC_Bank4->PATT4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); - - /* Set PIO4 register value according to FSMC_IOSpaceTimingStructure parameters */ - FSMC_Bank4->PIO4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime | - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime << 8) | - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime << 16)| - (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime << 24); -} - -/** - * @brief Fills each FSMC_NORSRAMInitStruct member with its default value. - * @param FSMC_NORSRAMInitStruct: pointer to a FSMC_NORSRAMInitTypeDef - * structure which will be initialized. - * @retval None - */ -void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) -{ - /* Reset NOR/SRAM Init structure parameters values */ - FSMC_NORSRAMInitStruct->FSMC_Bank = FSMC_Bank1_NORSRAM1; - FSMC_NORSRAMInitStruct->FSMC_DataAddressMux = FSMC_DataAddressMux_Enable; - FSMC_NORSRAMInitStruct->FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStruct->FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStruct->FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStruct->FSMC_WaitSignal = FSMC_WaitSignal_Enable; - FSMC_NORSRAMInitStruct->FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStruct->FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime = 0xFF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency = 0xF; - FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime = 0xFF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF; - FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; -} - -/** - * @brief Fills each FSMC_NANDInitStruct member with its default value. - * @param FSMC_NANDInitStruct: pointer to a FSMC_NANDInitTypeDef - * structure which will be initialized. - * @retval None - */ -void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) -{ - /* Reset NAND Init structure parameters values */ - FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND; - FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; - FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; - FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable; - FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes; - FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0; - FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; -} - -/** - * @brief Fills each FSMC_PCCARDInitStruct member with its default value. - * @param FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef - * structure which will be initialized. - * @retval None - */ -void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) -{ - /* Reset PCCARD Init structure parameters values */ - FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; - FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0; - FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; - FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; -} - -/** - * @brief Enables or disables the specified NOR/SRAM Memory Bank. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 - * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 - * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 - * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 - * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */ - FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_Set; - } - else - { - /* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */ - FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_Reset; - } -} - -/** - * @brief Enables or disables the specified NAND Memory Bank. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NAND Bank by setting the PBKEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 |= PCR_PBKEN_Set; - } - else - { - FSMC_Bank3->PCR3 |= PCR_PBKEN_Set; - } - } - else - { - /* Disable the selected NAND Bank by clearing the PBKEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 &= PCR_PBKEN_Reset; - } - else - { - FSMC_Bank3->PCR3 &= PCR_PBKEN_Reset; - } - } -} - -/** - * @brief Enables or disables the PCCARD Memory Bank. - * @param NewState: new state of the PCCARD Memory Bank. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_PCCARDCmd(FunctionalState NewState) -{ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the PCCARD Bank by setting the PBKEN bit in the PCR4 register */ - FSMC_Bank4->PCR4 |= PCR_PBKEN_Set; - } - else - { - /* Disable the PCCARD Bank by clearing the PBKEN bit in the PCR4 register */ - FSMC_Bank4->PCR4 &= PCR_PBKEN_Reset; - } -} - -/** - * @brief Enables or disables the FSMC NAND ECC feature. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @param NewState: new state of the FSMC NAND ECC feature. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState) -{ - assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected NAND Bank ECC function by setting the ECCEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 |= PCR_ECCEN_Set; - } - else - { - FSMC_Bank3->PCR3 |= PCR_ECCEN_Set; - } - } - else - { - /* Disable the selected NAND Bank ECC function by clearing the ECCEN bit in the PCRx register */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->PCR2 &= PCR_ECCEN_Reset; - } - else - { - FSMC_Bank3->PCR3 &= PCR_ECCEN_Reset; - } - } -} - -/** - * @brief Returns the error correction code register value. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @retval The Error Correction Code (ECC) value. - */ -uint32_t FSMC_GetECC(uint32_t FSMC_Bank) -{ - uint32_t eccval = 0x00000000; - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - /* Get the ECCR2 register value */ - eccval = FSMC_Bank2->ECCR2; - } - else - { - /* Get the ECCR3 register value */ - eccval = FSMC_Bank3->ECCR3; - } - /* Return the error correction code value */ - return(eccval); -} - -/** - * @brief Enables or disables the specified FSMC interrupts. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the FSMC interrupt sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @param NewState: new state of the specified FSMC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState) -{ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_IT(FSMC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected FSMC_Bank2 interrupts */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 |= FSMC_IT; - } - /* Enable the selected FSMC_Bank3 interrupts */ - else if (FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 |= FSMC_IT; - } - /* Enable the selected FSMC_Bank4 interrupts */ - else - { - FSMC_Bank4->SR4 |= FSMC_IT; - } - } - else - { - /* Disable the selected FSMC_Bank2 interrupts */ - if(FSMC_Bank == FSMC_Bank2_NAND) - { - - FSMC_Bank2->SR2 &= (uint32_t)~FSMC_IT; - } - /* Disable the selected FSMC_Bank3 interrupts */ - else if (FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= (uint32_t)~FSMC_IT; - } - /* Disable the selected FSMC_Bank4 interrupts */ - else - { - FSMC_Bank4->SR4 &= (uint32_t)~FSMC_IT; - } - } -} - -/** - * @brief Checks whether the specified FSMC flag is set or not. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. - * @arg FSMC_FLAG_Level: Level detection Flag. - * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. - * @arg FSMC_FLAG_FEMPT: Fifo empty Flag. - * @retval The new state of FSMC_FLAG (SET or RESET). - */ -FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) -{ - FlagStatus bitstatus = RESET; - uint32_t tmpsr = 0x00000000; - - /* Check the parameters */ - assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); - assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - tmpsr = FSMC_Bank2->SR2; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - tmpsr = FSMC_Bank3->SR3; - } - /* FSMC_Bank4_PCCARD*/ - else - { - tmpsr = FSMC_Bank4->SR4; - } - - /* Get the flag status */ - if ((tmpsr & FSMC_FLAG) != (uint16_t)RESET ) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the FSMC's pending flags. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. - * @arg FSMC_FLAG_Level: Level detection Flag. - * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. - * @retval None - */ -void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); - assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ; - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 &= ~FSMC_FLAG; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= ~FSMC_FLAG; - } - /* FSMC_Bank4_PCCARD*/ - else - { - FSMC_Bank4->SR4 &= ~FSMC_FLAG; - } -} - -/** - * @brief Checks whether the specified FSMC interrupt has occurred or not. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the FSMC interrupt source to check. - * This parameter can be one of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @retval The new state of FSMC_IT (SET or RESET). - */ -ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT) -{ - ITStatus bitstatus = RESET; - uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0; - - /* Check the parameters */ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_GET_IT(FSMC_IT)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - tmpsr = FSMC_Bank2->SR2; - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - tmpsr = FSMC_Bank3->SR3; - } - /* FSMC_Bank4_PCCARD*/ - else - { - tmpsr = FSMC_Bank4->SR4; - } - - itstatus = tmpsr & FSMC_IT; - - itenable = tmpsr & (FSMC_IT >> 3); - if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the FSMC's interrupt pending bits. - * @param FSMC_Bank: specifies the FSMC Bank to be used - * This parameter can be one of the following values: - * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND - * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND - * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD - * @param FSMC_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. - * @arg FSMC_IT_Level: Level edge detection interrupt. - * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. - * @retval None - */ -void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT) -{ - /* Check the parameters */ - assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); - assert_param(IS_FSMC_IT(FSMC_IT)); - - if(FSMC_Bank == FSMC_Bank2_NAND) - { - FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3); - } - else if(FSMC_Bank == FSMC_Bank3_NAND) - { - FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3); - } - /* FSMC_Bank4_PCCARD*/ - else - { - FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3); - } -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_fsmc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the FSMC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_fsmc.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup FSMC + * @brief FSMC driver modules + * @{ + */ + +/** @defgroup FSMC_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + +/** @defgroup FSMC_Private_Defines + * @{ + */ + +/* --------------------- FSMC registers bit mask ---------------------------- */ + +/* FSMC BCRx Mask */ +#define BCR_MBKEN_Set ((uint32_t)0x00000001) +#define BCR_MBKEN_Reset ((uint32_t)0x000FFFFE) +#define BCR_FACCEN_Set ((uint32_t)0x00000040) + +/* FSMC PCRx Mask */ +#define PCR_PBKEN_Set ((uint32_t)0x00000004) +#define PCR_PBKEN_Reset ((uint32_t)0x000FFFFB) +#define PCR_ECCEN_Set ((uint32_t)0x00000040) +#define PCR_ECCEN_Reset ((uint32_t)0x000FFFBF) +#define PCR_MemoryType_NAND ((uint32_t)0x00000008) +/** + * @} + */ + +/** @defgroup FSMC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup FSMC_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the FSMC NOR/SRAM Banks registers to their default + * reset values. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 + * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 + * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 + * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 + * @retval None + */ +void FSMC_NORSRAMDeInit(uint32_t FSMC_Bank) +{ + /* Check the parameter */ + assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); + + /* FSMC_Bank1_NORSRAM1 */ + if(FSMC_Bank == FSMC_Bank1_NORSRAM1) + { + FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030DB; + } + /* FSMC_Bank1_NORSRAM2, FSMC_Bank1_NORSRAM3 or FSMC_Bank1_NORSRAM4 */ + else + { + FSMC_Bank1->BTCR[FSMC_Bank] = 0x000030D2; + } + FSMC_Bank1->BTCR[FSMC_Bank + 1] = 0x0FFFFFFF; + FSMC_Bank1E->BWTR[FSMC_Bank] = 0x0FFFFFFF; +} + +/** + * @brief Deinitializes the FSMC NAND Banks registers to their default reset values. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @retval None + */ +void FSMC_NANDDeInit(uint32_t FSMC_Bank) +{ + /* Check the parameter */ + assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + /* Set the FSMC_Bank2 registers to their reset values */ + FSMC_Bank2->PCR2 = 0x00000018; + FSMC_Bank2->SR2 = 0x00000040; + FSMC_Bank2->PMEM2 = 0xFCFCFCFC; + FSMC_Bank2->PATT2 = 0xFCFCFCFC; + } + /* FSMC_Bank3_NAND */ + else + { + /* Set the FSMC_Bank3 registers to their reset values */ + FSMC_Bank3->PCR3 = 0x00000018; + FSMC_Bank3->SR3 = 0x00000040; + FSMC_Bank3->PMEM3 = 0xFCFCFCFC; + FSMC_Bank3->PATT3 = 0xFCFCFCFC; + } +} + +/** + * @brief Deinitializes the FSMC PCCARD Bank registers to their default reset values. + * @param None + * @retval None + */ +void FSMC_PCCARDDeInit(void) +{ + /* Set the FSMC_Bank4 registers to their reset values */ + FSMC_Bank4->PCR4 = 0x00000018; + FSMC_Bank4->SR4 = 0x00000000; + FSMC_Bank4->PMEM4 = 0xFCFCFCFC; + FSMC_Bank4->PATT4 = 0xFCFCFCFC; + FSMC_Bank4->PIO4 = 0xFCFCFCFC; +} + +/** + * @brief Initializes the FSMC NOR/SRAM Banks according to the specified + * parameters in the FSMC_NORSRAMInitStruct. + * @param FSMC_NORSRAMInitStruct : pointer to a FSMC_NORSRAMInitTypeDef + * structure that contains the configuration information for + * the FSMC NOR/SRAM specified Banks. + * @retval None + */ +void FSMC_NORSRAMInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) +{ + /* Check the parameters */ + assert_param(IS_FSMC_NORSRAM_BANK(FSMC_NORSRAMInitStruct->FSMC_Bank)); + assert_param(IS_FSMC_MUX(FSMC_NORSRAMInitStruct->FSMC_DataAddressMux)); + assert_param(IS_FSMC_MEMORY(FSMC_NORSRAMInitStruct->FSMC_MemoryType)); + assert_param(IS_FSMC_MEMORY_WIDTH(FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth)); + assert_param(IS_FSMC_BURSTMODE(FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode)); + assert_param(IS_FSMC_ASYNWAIT(FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait)); + assert_param(IS_FSMC_WAIT_POLARITY(FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity)); + assert_param(IS_FSMC_WRAP_MODE(FSMC_NORSRAMInitStruct->FSMC_WrapMode)); + assert_param(IS_FSMC_WAIT_SIGNAL_ACTIVE(FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive)); + assert_param(IS_FSMC_WRITE_OPERATION(FSMC_NORSRAMInitStruct->FSMC_WriteOperation)); + assert_param(IS_FSMC_WAITE_SIGNAL(FSMC_NORSRAMInitStruct->FSMC_WaitSignal)); + assert_param(IS_FSMC_EXTENDED_MODE(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode)); + assert_param(IS_FSMC_WRITE_BURST(FSMC_NORSRAMInitStruct->FSMC_WriteBurst)); + assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime)); + assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime)); + assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime)); + assert_param(IS_FSMC_TURNAROUND_TIME(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration)); + assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision)); + assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency)); + assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode)); + + /* Bank1 NOR/SRAM control register configuration */ + FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] = + (uint32_t)FSMC_NORSRAMInitStruct->FSMC_DataAddressMux | + FSMC_NORSRAMInitStruct->FSMC_MemoryType | + FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth | + FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode | + FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait | + FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity | + FSMC_NORSRAMInitStruct->FSMC_WrapMode | + FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive | + FSMC_NORSRAMInitStruct->FSMC_WriteOperation | + FSMC_NORSRAMInitStruct->FSMC_WaitSignal | + FSMC_NORSRAMInitStruct->FSMC_ExtendedMode | + FSMC_NORSRAMInitStruct->FSMC_WriteBurst; + + if(FSMC_NORSRAMInitStruct->FSMC_MemoryType == FSMC_MemoryType_NOR) + { + FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank] |= (uint32_t)BCR_FACCEN_Set; + } + + /* Bank1 NOR/SRAM timing register configuration */ + FSMC_Bank1->BTCR[FSMC_NORSRAMInitStruct->FSMC_Bank+1] = + (uint32_t)FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime << 4) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime << 8) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration << 16) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision << 20) | + (FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency << 24) | + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode; + + + /* Bank1 NOR/SRAM timing register for write configuration, if extended mode is used */ + if(FSMC_NORSRAMInitStruct->FSMC_ExtendedMode == FSMC_ExtendedMode_Enable) + { + assert_param(IS_FSMC_ADDRESS_SETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime)); + assert_param(IS_FSMC_ADDRESS_HOLD_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime)); + assert_param(IS_FSMC_DATASETUP_TIME(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime)); + assert_param(IS_FSMC_CLK_DIV(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision)); + assert_param(IS_FSMC_DATA_LATENCY(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency)); + assert_param(IS_FSMC_ACCESS_MODE(FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode)); + FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = + (uint32_t)FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime | + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime << 4 )| + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime << 8) | + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision << 20) | + (FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency << 24) | + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode; + } + else + { + FSMC_Bank1E->BWTR[FSMC_NORSRAMInitStruct->FSMC_Bank] = 0x0FFFFFFF; + } +} + +/** + * @brief Initializes the FSMC NAND Banks according to the specified + * parameters in the FSMC_NANDInitStruct. + * @param FSMC_NANDInitStruct : pointer to a FSMC_NANDInitTypeDef + * structure that contains the configuration information for the FSMC + * NAND specified Banks. + * @retval None + */ +void FSMC_NANDInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) +{ + uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000; + + /* Check the parameters */ + assert_param( IS_FSMC_NAND_BANK(FSMC_NANDInitStruct->FSMC_Bank)); + assert_param( IS_FSMC_WAIT_FEATURE(FSMC_NANDInitStruct->FSMC_Waitfeature)); + assert_param( IS_FSMC_MEMORY_WIDTH(FSMC_NANDInitStruct->FSMC_MemoryDataWidth)); + assert_param( IS_FSMC_ECC_STATE(FSMC_NANDInitStruct->FSMC_ECC)); + assert_param( IS_FSMC_ECCPAGE_SIZE(FSMC_NANDInitStruct->FSMC_ECCPageSize)); + assert_param( IS_FSMC_TCLR_TIME(FSMC_NANDInitStruct->FSMC_TCLRSetupTime)); + assert_param( IS_FSMC_TAR_TIME(FSMC_NANDInitStruct->FSMC_TARSetupTime)); + assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); + assert_param(IS_FSMC_SETUP_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); + + /* Set the tmppcr value according to FSMC_NANDInitStruct parameters */ + tmppcr = (uint32_t)FSMC_NANDInitStruct->FSMC_Waitfeature | + PCR_MemoryType_NAND | + FSMC_NANDInitStruct->FSMC_MemoryDataWidth | + FSMC_NANDInitStruct->FSMC_ECC | + FSMC_NANDInitStruct->FSMC_ECCPageSize | + (FSMC_NANDInitStruct->FSMC_TCLRSetupTime << 9 )| + (FSMC_NANDInitStruct->FSMC_TARSetupTime << 13); + + /* Set tmppmem value according to FSMC_CommonSpaceTimingStructure parameters */ + tmppmem = (uint32_t)FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | + (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + /* Set tmppatt value according to FSMC_AttributeSpaceTimingStructure parameters */ + tmppatt = (uint32_t)FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | + (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + if(FSMC_NANDInitStruct->FSMC_Bank == FSMC_Bank2_NAND) + { + /* FSMC_Bank2_NAND registers configuration */ + FSMC_Bank2->PCR2 = tmppcr; + FSMC_Bank2->PMEM2 = tmppmem; + FSMC_Bank2->PATT2 = tmppatt; + } + else + { + /* FSMC_Bank3_NAND registers configuration */ + FSMC_Bank3->PCR3 = tmppcr; + FSMC_Bank3->PMEM3 = tmppmem; + FSMC_Bank3->PATT3 = tmppatt; + } +} + +/** + * @brief Initializes the FSMC PCCARD Bank according to the specified + * parameters in the FSMC_PCCARDInitStruct. + * @param FSMC_PCCARDInitStruct : pointer to a FSMC_PCCARDInitTypeDef + * structure that contains the configuration information for the FSMC + * PCCARD Bank. + * @retval None + */ +void FSMC_PCCARDInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) +{ + /* Check the parameters */ + assert_param(IS_FSMC_WAIT_FEATURE(FSMC_PCCARDInitStruct->FSMC_Waitfeature)); + assert_param(IS_FSMC_TCLR_TIME(FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime)); + assert_param(IS_FSMC_TAR_TIME(FSMC_PCCARDInitStruct->FSMC_TARSetupTime)); + + assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime)); + + assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime)); + assert_param(IS_FSMC_SETUP_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime)); + assert_param(IS_FSMC_WAIT_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime)); + assert_param(IS_FSMC_HOLD_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime)); + assert_param(IS_FSMC_HIZ_TIME(FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime)); + + /* Set the PCR4 register value according to FSMC_PCCARDInitStruct parameters */ + FSMC_Bank4->PCR4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_Waitfeature | + FSMC_MemoryDataWidth_16b | + (FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime << 9) | + (FSMC_PCCARDInitStruct->FSMC_TARSetupTime << 13); + + /* Set PMEM4 register value according to FSMC_CommonSpaceTimingStructure parameters */ + FSMC_Bank4->PMEM4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime | + (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + /* Set PATT4 register value according to FSMC_AttributeSpaceTimingStructure parameters */ + FSMC_Bank4->PATT4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime | + (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime << 24); + + /* Set PIO4 register value according to FSMC_IOSpaceTimingStructure parameters */ + FSMC_Bank4->PIO4 = (uint32_t)FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime | + (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime << 8) | + (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime << 16)| + (FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime << 24); +} + +/** + * @brief Fills each FSMC_NORSRAMInitStruct member with its default value. + * @param FSMC_NORSRAMInitStruct: pointer to a FSMC_NORSRAMInitTypeDef + * structure which will be initialized. + * @retval None + */ +void FSMC_NORSRAMStructInit(FSMC_NORSRAMInitTypeDef* FSMC_NORSRAMInitStruct) +{ + /* Reset NOR/SRAM Init structure parameters values */ + FSMC_NORSRAMInitStruct->FSMC_Bank = FSMC_Bank1_NORSRAM1; + FSMC_NORSRAMInitStruct->FSMC_DataAddressMux = FSMC_DataAddressMux_Enable; + FSMC_NORSRAMInitStruct->FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; + FSMC_NORSRAMInitStruct->FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStruct->FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStruct->FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStruct->FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStruct->FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStruct->FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStruct->FSMC_WaitSignal = FSMC_WaitSignal_Enable; + FSMC_NORSRAMInitStruct->FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStruct->FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressSetupTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AddressHoldTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataSetupTime = 0xFF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_CLKDivision = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_DataLatency = 0xF; + FSMC_NORSRAMInitStruct->FSMC_ReadWriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressSetupTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AddressHoldTime = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataSetupTime = 0xFF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF; + FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A; +} + +/** + * @brief Fills each FSMC_NANDInitStruct member with its default value. + * @param FSMC_NANDInitStruct: pointer to a FSMC_NANDInitTypeDef + * structure which will be initialized. + * @retval None + */ +void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct) +{ + /* Reset NAND Init structure parameters values */ + FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND; + FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; + FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b; + FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable; + FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes; + FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0; + FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; +} + +/** + * @brief Fills each FSMC_PCCARDInitStruct member with its default value. + * @param FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef + * structure which will be initialized. + * @retval None + */ +void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct) +{ + /* Reset PCCARD Init structure parameters values */ + FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable; + FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0; + FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC; + FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC; +} + +/** + * @brief Enables or disables the specified NOR/SRAM Memory Bank. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1 + * @arg FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2 + * @arg FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3 + * @arg FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4 + * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_NORSRAMCmd(uint32_t FSMC_Bank, FunctionalState NewState) +{ + assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */ + FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_Set; + } + else + { + /* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */ + FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_Reset; + } +} + +/** + * @brief Enables or disables the specified NAND Memory Bank. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @param NewState: new state of the FSMC_Bank. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_NANDCmd(uint32_t FSMC_Bank, FunctionalState NewState) +{ + assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected NAND Bank by setting the PBKEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 |= PCR_PBKEN_Set; + } + else + { + FSMC_Bank3->PCR3 |= PCR_PBKEN_Set; + } + } + else + { + /* Disable the selected NAND Bank by clearing the PBKEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 &= PCR_PBKEN_Reset; + } + else + { + FSMC_Bank3->PCR3 &= PCR_PBKEN_Reset; + } + } +} + +/** + * @brief Enables or disables the PCCARD Memory Bank. + * @param NewState: new state of the PCCARD Memory Bank. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_PCCARDCmd(FunctionalState NewState) +{ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the PCCARD Bank by setting the PBKEN bit in the PCR4 register */ + FSMC_Bank4->PCR4 |= PCR_PBKEN_Set; + } + else + { + /* Disable the PCCARD Bank by clearing the PBKEN bit in the PCR4 register */ + FSMC_Bank4->PCR4 &= PCR_PBKEN_Reset; + } +} + +/** + * @brief Enables or disables the FSMC NAND ECC feature. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @param NewState: new state of the FSMC NAND ECC feature. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_NANDECCCmd(uint32_t FSMC_Bank, FunctionalState NewState) +{ + assert_param(IS_FSMC_NAND_BANK(FSMC_Bank)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected NAND Bank ECC function by setting the ECCEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 |= PCR_ECCEN_Set; + } + else + { + FSMC_Bank3->PCR3 |= PCR_ECCEN_Set; + } + } + else + { + /* Disable the selected NAND Bank ECC function by clearing the ECCEN bit in the PCRx register */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->PCR2 &= PCR_ECCEN_Reset; + } + else + { + FSMC_Bank3->PCR3 &= PCR_ECCEN_Reset; + } + } +} + +/** + * @brief Returns the error correction code register value. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @retval The Error Correction Code (ECC) value. + */ +uint32_t FSMC_GetECC(uint32_t FSMC_Bank) +{ + uint32_t eccval = 0x00000000; + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + /* Get the ECCR2 register value */ + eccval = FSMC_Bank2->ECCR2; + } + else + { + /* Get the ECCR3 register value */ + eccval = FSMC_Bank3->ECCR3; + } + /* Return the error correction code value */ + return(eccval); +} + +/** + * @brief Enables or disables the specified FSMC interrupts. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_IT: specifies the FSMC interrupt sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. + * @arg FSMC_IT_Level: Level edge detection interrupt. + * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. + * @param NewState: new state of the specified FSMC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void FSMC_ITConfig(uint32_t FSMC_Bank, uint32_t FSMC_IT, FunctionalState NewState) +{ + assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); + assert_param(IS_FSMC_IT(FSMC_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected FSMC_Bank2 interrupts */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->SR2 |= FSMC_IT; + } + /* Enable the selected FSMC_Bank3 interrupts */ + else if (FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 |= FSMC_IT; + } + /* Enable the selected FSMC_Bank4 interrupts */ + else + { + FSMC_Bank4->SR4 |= FSMC_IT; + } + } + else + { + /* Disable the selected FSMC_Bank2 interrupts */ + if(FSMC_Bank == FSMC_Bank2_NAND) + { + + FSMC_Bank2->SR2 &= (uint32_t)~FSMC_IT; + } + /* Disable the selected FSMC_Bank3 interrupts */ + else if (FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 &= (uint32_t)~FSMC_IT; + } + /* Disable the selected FSMC_Bank4 interrupts */ + else + { + FSMC_Bank4->SR4 &= (uint32_t)~FSMC_IT; + } + } +} + +/** + * @brief Checks whether the specified FSMC flag is set or not. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. + * @arg FSMC_FLAG_Level: Level detection Flag. + * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. + * @arg FSMC_FLAG_FEMPT: Fifo empty Flag. + * @retval The new state of FSMC_FLAG (SET or RESET). + */ +FlagStatus FSMC_GetFlagStatus(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) +{ + FlagStatus bitstatus = RESET; + uint32_t tmpsr = 0x00000000; + + /* Check the parameters */ + assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); + assert_param(IS_FSMC_GET_FLAG(FSMC_FLAG)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + tmpsr = FSMC_Bank2->SR2; + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + tmpsr = FSMC_Bank3->SR3; + } + /* FSMC_Bank4_PCCARD*/ + else + { + tmpsr = FSMC_Bank4->SR4; + } + + /* Get the flag status */ + if ((tmpsr & FSMC_FLAG) != (uint16_t)RESET ) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the flag status */ + return bitstatus; +} + +/** + * @brief Clears the FSMC's pending flags. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg FSMC_FLAG_RisingEdge: Rising egde detection Flag. + * @arg FSMC_FLAG_Level: Level detection Flag. + * @arg FSMC_FLAG_FallingEdge: Falling egde detection Flag. + * @retval None + */ +void FSMC_ClearFlag(uint32_t FSMC_Bank, uint32_t FSMC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_FSMC_GETFLAG_BANK(FSMC_Bank)); + assert_param(IS_FSMC_CLEAR_FLAG(FSMC_FLAG)) ; + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->SR2 &= ~FSMC_FLAG; + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 &= ~FSMC_FLAG; + } + /* FSMC_Bank4_PCCARD*/ + else + { + FSMC_Bank4->SR4 &= ~FSMC_FLAG; + } +} + +/** + * @brief Checks whether the specified FSMC interrupt has occurred or not. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_IT: specifies the FSMC interrupt source to check. + * This parameter can be one of the following values: + * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. + * @arg FSMC_IT_Level: Level edge detection interrupt. + * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. + * @retval The new state of FSMC_IT (SET or RESET). + */ +ITStatus FSMC_GetITStatus(uint32_t FSMC_Bank, uint32_t FSMC_IT) +{ + ITStatus bitstatus = RESET; + uint32_t tmpsr = 0x0, itstatus = 0x0, itenable = 0x0; + + /* Check the parameters */ + assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); + assert_param(IS_FSMC_GET_IT(FSMC_IT)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + tmpsr = FSMC_Bank2->SR2; + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + tmpsr = FSMC_Bank3->SR3; + } + /* FSMC_Bank4_PCCARD*/ + else + { + tmpsr = FSMC_Bank4->SR4; + } + + itstatus = tmpsr & FSMC_IT; + + itenable = tmpsr & (FSMC_IT >> 3); + if ((itstatus != (uint32_t)RESET) && (itenable != (uint32_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the FSMC's interrupt pending bits. + * @param FSMC_Bank: specifies the FSMC Bank to be used + * This parameter can be one of the following values: + * @arg FSMC_Bank2_NAND: FSMC Bank2 NAND + * @arg FSMC_Bank3_NAND: FSMC Bank3 NAND + * @arg FSMC_Bank4_PCCARD: FSMC Bank4 PCCARD + * @param FSMC_IT: specifies the interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg FSMC_IT_RisingEdge: Rising edge detection interrupt. + * @arg FSMC_IT_Level: Level edge detection interrupt. + * @arg FSMC_IT_FallingEdge: Falling edge detection interrupt. + * @retval None + */ +void FSMC_ClearITPendingBit(uint32_t FSMC_Bank, uint32_t FSMC_IT) +{ + /* Check the parameters */ + assert_param(IS_FSMC_IT_BANK(FSMC_Bank)); + assert_param(IS_FSMC_IT(FSMC_IT)); + + if(FSMC_Bank == FSMC_Bank2_NAND) + { + FSMC_Bank2->SR2 &= ~(FSMC_IT >> 3); + } + else if(FSMC_Bank == FSMC_Bank3_NAND) + { + FSMC_Bank3->SR3 &= ~(FSMC_IT >> 3); + } + /* FSMC_Bank4_PCCARD*/ + else + { + FSMC_Bank4->SR4 &= ~(FSMC_IT >> 3); + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c index 457ff112..93dbcd7c 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_gpio.c @@ -1,650 +1,650 @@ -/** - ****************************************************************************** - * @file stm32f10x_gpio.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the GPIO firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_gpio.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup GPIO - * @brief GPIO driver modules - * @{ - */ - -/** @defgroup GPIO_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_Defines - * @{ - */ - -/* ------------ RCC registers bit address in the alias region ----------------*/ -#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE) - -/* --- EVENTCR Register -----*/ - -/* Alias word address of EVOE bit */ -#define EVCR_OFFSET (AFIO_OFFSET + 0x00) -#define EVOE_BitNumber ((uint8_t)0x07) -#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4)) - - -/* --- MAPR Register ---*/ -/* Alias word address of MII_RMII_SEL bit */ -#define MAPR_OFFSET (AFIO_OFFSET + 0x04) -#define MII_RMII_SEL_BitNumber ((u8)0x17) -#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) - - -#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) -#define LSB_MASK ((uint16_t)0xFFFF) -#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) -#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) -#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) -#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) -/** - * @} - */ - -/** @defgroup GPIO_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup GPIO_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the GPIOx peripheral registers to their default reset values. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @retval None - */ -void GPIO_DeInit(GPIO_TypeDef* GPIOx) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - if (GPIOx == GPIOA) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); - } - else if (GPIOx == GPIOB) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); - } - else if (GPIOx == GPIOC) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); - } - else if (GPIOx == GPIOD) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); - } - else if (GPIOx == GPIOE) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); - } - else if (GPIOx == GPIOF) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); - } - else - { - if (GPIOx == GPIOG) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); - } - } -} - -/** - * @brief Deinitializes the Alternate Functions (remap, event control - * and EXTI configuration) registers to their default reset values. - * @param None - * @retval None - */ -void GPIO_AFIODeInit(void) -{ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); -} - -/** - * @brief Initializes the GPIOx peripheral according to the specified - * parameters in the GPIO_InitStruct. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that - * contains the configuration information for the specified GPIO peripheral. - * @retval None - */ -void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) -{ - uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; - uint32_t tmpreg = 0x00, pinmask = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); - assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); - -/*---------------------------- GPIO Mode Configuration -----------------------*/ - currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); - if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) - { - /* Check the parameters */ - assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); - /* Output mode */ - currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; - } -/*---------------------------- GPIO CRL Configuration ------------------------*/ - /* Configure the eight low port pins */ - if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) - { - tmpreg = GPIOx->CRL; - for (pinpos = 0x00; pinpos < 0x08; pinpos++) - { - pos = ((uint32_t)0x01) << pinpos; - /* Get the port pins position */ - currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; - if (currentpin == pos) - { - pos = pinpos << 2; - /* Clear the corresponding low control register bits */ - pinmask = ((uint32_t)0x0F) << pos; - tmpreg &= ~pinmask; - /* Write the mode configuration in the corresponding bits */ - tmpreg |= (currentmode << pos); - /* Reset the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) - { - GPIOx->BRR = (((uint32_t)0x01) << pinpos); - } - else - { - /* Set the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) - { - GPIOx->BSRR = (((uint32_t)0x01) << pinpos); - } - } - } - } - GPIOx->CRL = tmpreg; - } -/*---------------------------- GPIO CRH Configuration ------------------------*/ - /* Configure the eight high port pins */ - if (GPIO_InitStruct->GPIO_Pin > 0x00FF) - { - tmpreg = GPIOx->CRH; - for (pinpos = 0x00; pinpos < 0x08; pinpos++) - { - pos = (((uint32_t)0x01) << (pinpos + 0x08)); - /* Get the port pins position */ - currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); - if (currentpin == pos) - { - pos = pinpos << 2; - /* Clear the corresponding high control register bits */ - pinmask = ((uint32_t)0x0F) << pos; - tmpreg &= ~pinmask; - /* Write the mode configuration in the corresponding bits */ - tmpreg |= (currentmode << pos); - /* Reset the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) - { - GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08)); - } - /* Set the corresponding ODR bit */ - if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) - { - GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08)); - } - } - } - GPIOx->CRH = tmpreg; - } -} - -/** - * @brief Fills each GPIO_InitStruct member with its default value. - * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will - * be initialized. - * @retval None - */ -void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) -{ - /* Reset GPIO init structure parameters values */ - GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; - GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; - GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; -} - -/** - * @brief Reads the specified input port pin. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to read. - * This parameter can be GPIO_Pin_x where x can be (0..15). - * @retval The input port pin value. - */ -uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - uint8_t bitstatus = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) - { - bitstatus = (uint8_t)Bit_SET; - } - else - { - bitstatus = (uint8_t)Bit_RESET; - } - return bitstatus; -} - -/** - * @brief Reads the specified GPIO input data port. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @retval GPIO input data port value. - */ -uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - return ((uint16_t)GPIOx->IDR); -} - -/** - * @brief Reads the specified output data port bit. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to read. - * This parameter can be GPIO_Pin_x where x can be (0..15). - * @retval The output port pin value. - */ -uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - uint8_t bitstatus = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); - - if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) - { - bitstatus = (uint8_t)Bit_SET; - } - else - { - bitstatus = (uint8_t)Bit_RESET; - } - return bitstatus; -} - -/** - * @brief Reads the specified GPIO output data port. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @retval GPIO output data port value. - */ -uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - return ((uint16_t)GPIOx->ODR); -} - -/** - * @brief Sets the selected data port bits. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bits to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - GPIOx->BSRR = GPIO_Pin; -} - -/** - * @brief Clears the selected data port bits. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bits to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - GPIOx->BRR = GPIO_Pin; -} - -/** - * @brief Sets or clears the selected data port bit. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be one of GPIO_Pin_x where x can be (0..15). - * @param BitVal: specifies the value to be written to the selected bit. - * This parameter can be one of the BitAction enum values: - * @arg Bit_RESET: to clear the port pin - * @arg Bit_SET: to set the port pin - * @retval None - */ -void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); - assert_param(IS_GPIO_BIT_ACTION(BitVal)); - - if (BitVal != Bit_RESET) - { - GPIOx->BSRR = GPIO_Pin; - } - else - { - GPIOx->BRR = GPIO_Pin; - } -} - -/** - * @brief Writes data to the specified GPIO data port. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param PortVal: specifies the value to be written to the port output data register. - * @retval None - */ -void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) -{ - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - - GPIOx->ODR = PortVal; -} - -/** - * @brief Locks GPIO Pins configuration registers. - * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. - * @param GPIO_Pin: specifies the port bit to be written. - * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). - * @retval None - */ -void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) -{ - uint32_t tmp = 0x00010000; - - /* Check the parameters */ - assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); - assert_param(IS_GPIO_PIN(GPIO_Pin)); - - tmp |= GPIO_Pin; - /* Set LCKK bit */ - GPIOx->LCKR = tmp; - /* Reset LCKK bit */ - GPIOx->LCKR = GPIO_Pin; - /* Set LCKK bit */ - GPIOx->LCKR = tmp; - /* Read LCKK bit*/ - tmp = GPIOx->LCKR; - /* Read LCKK bit*/ - tmp = GPIOx->LCKR; -} - -/** - * @brief Selects the GPIO pin used as Event output. - * @param GPIO_PortSource: selects the GPIO port to be used as source - * for Event output. - * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). - * @param GPIO_PinSource: specifies the pin for the Event output. - * This parameter can be GPIO_PinSourcex where x can be (0..15). - * @retval None - */ -void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) -{ - uint32_t tmpreg = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource)); - assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); - - tmpreg = AFIO->EVCR; - /* Clear the PORT[6:4] and PIN[3:0] bits */ - tmpreg &= EVCR_PORTPINCONFIG_MASK; - tmpreg |= (uint32_t)GPIO_PortSource << 0x04; - tmpreg |= GPIO_PinSource; - AFIO->EVCR = tmpreg; -} - -/** - * @brief Enables or disables the Event Output. - * @param NewState: new state of the Event output. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void GPIO_EventOutputCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState; -} - -/** - * @brief Changes the mapping of the specified pin. - * @param GPIO_Remap: selects the pin to remap. - * This parameter can be one of the following values: - * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping - * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping - * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping - * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping - * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping - * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping - * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping - * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping - * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping - * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping - * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping - * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping - * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping - * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping - * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping - * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping - * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping - * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration - * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping - * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping - * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping - * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping - * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices) - * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices) - * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST - * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled - * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP) - * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) - * When the SPI3/I2S3 is remapped using this function, the SWJ is configured - * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST. - * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected - * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices) - * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to - * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output. - * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) - * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices) - * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices) - * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices) - * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices) - * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices) - * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices) - * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices) - * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices) - * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) - * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) - * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) - * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) - * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices) - * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, - * only for High density Value line devices) - * @param NewState: new state of the port pin remapping. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) -{ - uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00; - - /* Check the parameters */ - assert_param(IS_GPIO_REMAP(GPIO_Remap)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if((GPIO_Remap & 0x80000000) == 0x80000000) - { - tmpreg = AFIO->MAPR2; - } - else - { - tmpreg = AFIO->MAPR; - } - - tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; - tmp = GPIO_Remap & LSB_MASK; - - if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) - { - tmpreg &= DBGAFR_SWJCFG_MASK; - AFIO->MAPR &= DBGAFR_SWJCFG_MASK; - } - else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) - { - tmp1 = ((uint32_t)0x03) << tmpmask; - tmpreg &= ~tmp1; - tmpreg |= ~DBGAFR_SWJCFG_MASK; - } - else - { - tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); - tmpreg |= ~DBGAFR_SWJCFG_MASK; - } - - if (NewState != DISABLE) - { - tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); - } - - if((GPIO_Remap & 0x80000000) == 0x80000000) - { - AFIO->MAPR2 = tmpreg; - } - else - { - AFIO->MAPR = tmpreg; - } -} - -/** - * @brief Selects the GPIO pin used as EXTI Line. - * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. - * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). - * @param GPIO_PinSource: specifies the EXTI line to be configured. - * This parameter can be GPIO_PinSourcex where x can be (0..15). - * @retval None - */ -void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) -{ - uint32_t tmp = 0x00; - /* Check the parameters */ - assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource)); - assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); - - tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); - AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; - AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); -} - -/** - * @brief Selects the Ethernet media interface. - * @note This function applies only to STM32 Connectivity line devices. - * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode. - * This parameter can be one of the following values: - * @arg GPIO_ETH_MediaInterface_MII: MII mode - * @arg GPIO_ETH_MediaInterface_RMII: RMII mode - * @retval None - */ -void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) -{ - assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); - - /* Configure MII_RMII selection bit */ - *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_gpio.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the GPIO firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_gpio.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup GPIO + * @brief GPIO driver modules + * @{ + */ + +/** @defgroup GPIO_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_Defines + * @{ + */ + +/* ------------ RCC registers bit address in the alias region ----------------*/ +#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE) + +/* --- EVENTCR Register -----*/ + +/* Alias word address of EVOE bit */ +#define EVCR_OFFSET (AFIO_OFFSET + 0x00) +#define EVOE_BitNumber ((uint8_t)0x07) +#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4)) + + +/* --- MAPR Register ---*/ +/* Alias word address of MII_RMII_SEL bit */ +#define MAPR_OFFSET (AFIO_OFFSET + 0x04) +#define MII_RMII_SEL_BitNumber ((u8)0x17) +#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4)) + + +#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) +#define LSB_MASK ((uint16_t)0xFFFF) +#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) +#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) +#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) +#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) +/** + * @} + */ + +/** @defgroup GPIO_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup GPIO_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the GPIOx peripheral registers to their default reset values. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @retval None + */ +void GPIO_DeInit(GPIO_TypeDef* GPIOx) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + if (GPIOx == GPIOA) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); + } + else if (GPIOx == GPIOB) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); + } + else if (GPIOx == GPIOC) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); + } + else if (GPIOx == GPIOD) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); + } + else if (GPIOx == GPIOE) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); + } + else if (GPIOx == GPIOF) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); + } + else + { + if (GPIOx == GPIOG) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); + } + } +} + +/** + * @brief Deinitializes the Alternate Functions (remap, event control + * and EXTI configuration) registers to their default reset values. + * @param None + * @retval None + */ +void GPIO_AFIODeInit(void) +{ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); +} + +/** + * @brief Initializes the GPIOx peripheral according to the specified + * parameters in the GPIO_InitStruct. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that + * contains the configuration information for the specified GPIO peripheral. + * @retval None + */ +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) +{ + uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; + uint32_t tmpreg = 0x00, pinmask = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); + assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); + +/*---------------------------- GPIO Mode Configuration -----------------------*/ + currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); + if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) + { + /* Check the parameters */ + assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); + /* Output mode */ + currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; + } +/*---------------------------- GPIO CRL Configuration ------------------------*/ + /* Configure the eight low port pins */ + if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) + { + tmpreg = GPIOx->CRL; + for (pinpos = 0x00; pinpos < 0x08; pinpos++) + { + pos = ((uint32_t)0x01) << pinpos; + /* Get the port pins position */ + currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; + if (currentpin == pos) + { + pos = pinpos << 2; + /* Clear the corresponding low control register bits */ + pinmask = ((uint32_t)0x0F) << pos; + tmpreg &= ~pinmask; + /* Write the mode configuration in the corresponding bits */ + tmpreg |= (currentmode << pos); + /* Reset the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) + { + GPIOx->BRR = (((uint32_t)0x01) << pinpos); + } + else + { + /* Set the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) + { + GPIOx->BSRR = (((uint32_t)0x01) << pinpos); + } + } + } + } + GPIOx->CRL = tmpreg; + } +/*---------------------------- GPIO CRH Configuration ------------------------*/ + /* Configure the eight high port pins */ + if (GPIO_InitStruct->GPIO_Pin > 0x00FF) + { + tmpreg = GPIOx->CRH; + for (pinpos = 0x00; pinpos < 0x08; pinpos++) + { + pos = (((uint32_t)0x01) << (pinpos + 0x08)); + /* Get the port pins position */ + currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); + if (currentpin == pos) + { + pos = pinpos << 2; + /* Clear the corresponding high control register bits */ + pinmask = ((uint32_t)0x0F) << pos; + tmpreg &= ~pinmask; + /* Write the mode configuration in the corresponding bits */ + tmpreg |= (currentmode << pos); + /* Reset the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) + { + GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08)); + } + /* Set the corresponding ODR bit */ + if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) + { + GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08)); + } + } + } + GPIOx->CRH = tmpreg; + } +} + +/** + * @brief Fills each GPIO_InitStruct member with its default value. + * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will + * be initialized. + * @retval None + */ +void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) +{ + /* Reset GPIO init structure parameters values */ + GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; + GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; +} + +/** + * @brief Reads the specified input port pin. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to read. + * This parameter can be GPIO_Pin_x where x can be (0..15). + * @retval The input port pin value. + */ +uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint8_t bitstatus = 0x00; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); + + if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) + { + bitstatus = (uint8_t)Bit_SET; + } + else + { + bitstatus = (uint8_t)Bit_RESET; + } + return bitstatus; +} + +/** + * @brief Reads the specified GPIO input data port. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @retval GPIO input data port value. + */ +uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + return ((uint16_t)GPIOx->IDR); +} + +/** + * @brief Reads the specified output data port bit. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to read. + * This parameter can be GPIO_Pin_x where x can be (0..15). + * @retval The output port pin value. + */ +uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint8_t bitstatus = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); + + if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) + { + bitstatus = (uint8_t)Bit_SET; + } + else + { + bitstatus = (uint8_t)Bit_RESET; + } + return bitstatus; +} + +/** + * @brief Reads the specified GPIO output data port. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @retval GPIO output data port value. + */ +uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + return ((uint16_t)GPIOx->ODR); +} + +/** + * @brief Sets the selected data port bits. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bits to be written. + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * @retval None + */ +void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + GPIOx->BSRR = GPIO_Pin; +} + +/** + * @brief Clears the selected data port bits. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bits to be written. + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * @retval None + */ +void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + GPIOx->BRR = GPIO_Pin; +} + +/** + * @brief Sets or clears the selected data port bit. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to be written. + * This parameter can be one of GPIO_Pin_x where x can be (0..15). + * @param BitVal: specifies the value to be written to the selected bit. + * This parameter can be one of the BitAction enum values: + * @arg Bit_RESET: to clear the port pin + * @arg Bit_SET: to set the port pin + * @retval None + */ +void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); + assert_param(IS_GPIO_BIT_ACTION(BitVal)); + + if (BitVal != Bit_RESET) + { + GPIOx->BSRR = GPIO_Pin; + } + else + { + GPIOx->BRR = GPIO_Pin; + } +} + +/** + * @brief Writes data to the specified GPIO data port. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param PortVal: specifies the value to be written to the port output data register. + * @retval None + */ +void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) +{ + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + + GPIOx->ODR = PortVal; +} + +/** + * @brief Locks GPIO Pins configuration registers. + * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. + * @param GPIO_Pin: specifies the port bit to be written. + * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + * @retval None + */ +void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) +{ + uint32_t tmp = 0x00010000; + + /* Check the parameters */ + assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); + assert_param(IS_GPIO_PIN(GPIO_Pin)); + + tmp |= GPIO_Pin; + /* Set LCKK bit */ + GPIOx->LCKR = tmp; + /* Reset LCKK bit */ + GPIOx->LCKR = GPIO_Pin; + /* Set LCKK bit */ + GPIOx->LCKR = tmp; + /* Read LCKK bit*/ + tmp = GPIOx->LCKR; + /* Read LCKK bit*/ + tmp = GPIOx->LCKR; +} + +/** + * @brief Selects the GPIO pin used as Event output. + * @param GPIO_PortSource: selects the GPIO port to be used as source + * for Event output. + * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). + * @param GPIO_PinSource: specifies the pin for the Event output. + * This parameter can be GPIO_PinSourcex where x can be (0..15). + * @retval None + */ +void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) +{ + uint32_t tmpreg = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource)); + assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); + + tmpreg = AFIO->EVCR; + /* Clear the PORT[6:4] and PIN[3:0] bits */ + tmpreg &= EVCR_PORTPINCONFIG_MASK; + tmpreg |= (uint32_t)GPIO_PortSource << 0x04; + tmpreg |= GPIO_PinSource; + AFIO->EVCR = tmpreg; +} + +/** + * @brief Enables or disables the Event Output. + * @param NewState: new state of the Event output. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void GPIO_EventOutputCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState; +} + +/** + * @brief Changes the mapping of the specified pin. + * @param GPIO_Remap: selects the pin to remap. + * This parameter can be one of the following values: + * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping + * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping + * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping + * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping + * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping + * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping + * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping + * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping + * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping + * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping + * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping + * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping + * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping + * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping + * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping + * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping + * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping + * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration + * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping + * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping + * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping + * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping + * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices) + * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices) + * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST + * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled + * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP) + * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) + * When the SPI3/I2S3 is remapped using this function, the SWJ is configured + * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST. + * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected + * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices) + * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to + * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output. + * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) + * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices) + * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices) + * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices) + * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices) + * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices) + * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) + * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) + * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) + * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) + * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices) + * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, + * only for High density Value line devices) + * @param NewState: new state of the port pin remapping. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) +{ + uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00; + + /* Check the parameters */ + assert_param(IS_GPIO_REMAP(GPIO_Remap)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if((GPIO_Remap & 0x80000000) == 0x80000000) + { + tmpreg = AFIO->MAPR2; + } + else + { + tmpreg = AFIO->MAPR; + } + + tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; + tmp = GPIO_Remap & LSB_MASK; + + if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) + { + tmpreg &= DBGAFR_SWJCFG_MASK; + AFIO->MAPR &= DBGAFR_SWJCFG_MASK; + } + else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) + { + tmp1 = ((uint32_t)0x03) << tmpmask; + tmpreg &= ~tmp1; + tmpreg |= ~DBGAFR_SWJCFG_MASK; + } + else + { + tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); + tmpreg |= ~DBGAFR_SWJCFG_MASK; + } + + if (NewState != DISABLE) + { + tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); + } + + if((GPIO_Remap & 0x80000000) == 0x80000000) + { + AFIO->MAPR2 = tmpreg; + } + else + { + AFIO->MAPR = tmpreg; + } +} + +/** + * @brief Selects the GPIO pin used as EXTI Line. + * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. + * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). + * @param GPIO_PinSource: specifies the EXTI line to be configured. + * This parameter can be GPIO_PinSourcex where x can be (0..15). + * @retval None + */ +void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) +{ + uint32_t tmp = 0x00; + /* Check the parameters */ + assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource)); + assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); + + tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); + AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; + AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); +} + +/** + * @brief Selects the Ethernet media interface. + * @note This function applies only to STM32 Connectivity line devices. + * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode. + * This parameter can be one of the following values: + * @arg GPIO_ETH_MediaInterface_MII: MII mode + * @arg GPIO_ETH_MediaInterface_RMII: RMII mode + * @retval None + */ +void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) +{ + assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface)); + + /* Configure MII_RMII selection bit */ + *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c index 4ea321c1..88967268 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_i2c.c @@ -1,1331 +1,1331 @@ -/** - ****************************************************************************** - * @file stm32f10x_i2c.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the I2C firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_i2c.h" -#include "stm32f10x_rcc.h" - - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup I2C - * @brief I2C driver modules - * @{ - */ - -/** @defgroup I2C_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_Defines - * @{ - */ - -/* I2C SPE mask */ -#define CR1_PE_Set ((uint16_t)0x0001) -#define CR1_PE_Reset ((uint16_t)0xFFFE) - -/* I2C START mask */ -#define CR1_START_Set ((uint16_t)0x0100) -#define CR1_START_Reset ((uint16_t)0xFEFF) - -/* I2C STOP mask */ -#define CR1_STOP_Set ((uint16_t)0x0200) -#define CR1_STOP_Reset ((uint16_t)0xFDFF) - -/* I2C ACK mask */ -#define CR1_ACK_Set ((uint16_t)0x0400) -#define CR1_ACK_Reset ((uint16_t)0xFBFF) - -/* I2C ENGC mask */ -#define CR1_ENGC_Set ((uint16_t)0x0040) -#define CR1_ENGC_Reset ((uint16_t)0xFFBF) - -/* I2C SWRST mask */ -#define CR1_SWRST_Set ((uint16_t)0x8000) -#define CR1_SWRST_Reset ((uint16_t)0x7FFF) - -/* I2C PEC mask */ -#define CR1_PEC_Set ((uint16_t)0x1000) -#define CR1_PEC_Reset ((uint16_t)0xEFFF) - -/* I2C ENPEC mask */ -#define CR1_ENPEC_Set ((uint16_t)0x0020) -#define CR1_ENPEC_Reset ((uint16_t)0xFFDF) - -/* I2C ENARP mask */ -#define CR1_ENARP_Set ((uint16_t)0x0010) -#define CR1_ENARP_Reset ((uint16_t)0xFFEF) - -/* I2C NOSTRETCH mask */ -#define CR1_NOSTRETCH_Set ((uint16_t)0x0080) -#define CR1_NOSTRETCH_Reset ((uint16_t)0xFF7F) - -/* I2C registers Masks */ -#define CR1_CLEAR_Mask ((uint16_t)0xFBF5) - -/* I2C DMAEN mask */ -#define CR2_DMAEN_Set ((uint16_t)0x0800) -#define CR2_DMAEN_Reset ((uint16_t)0xF7FF) - -/* I2C LAST mask */ -#define CR2_LAST_Set ((uint16_t)0x1000) -#define CR2_LAST_Reset ((uint16_t)0xEFFF) - -/* I2C FREQ mask */ -#define CR2_FREQ_Reset ((uint16_t)0xFFC0) - -/* I2C ADD0 mask */ -#define OAR1_ADD0_Set ((uint16_t)0x0001) -#define OAR1_ADD0_Reset ((uint16_t)0xFFFE) - -/* I2C ENDUAL mask */ -#define OAR2_ENDUAL_Set ((uint16_t)0x0001) -#define OAR2_ENDUAL_Reset ((uint16_t)0xFFFE) - -/* I2C ADD2 mask */ -#define OAR2_ADD2_Reset ((uint16_t)0xFF01) - -/* I2C F/S mask */ -#define CCR_FS_Set ((uint16_t)0x8000) - -/* I2C CCR mask */ -#define CCR_CCR_Set ((uint16_t)0x0FFF) - -/* I2C FLAG mask */ -#define FLAG_Mask ((uint32_t)0x00FFFFFF) - -/* I2C Interrupt Enable mask */ -#define ITEN_Mask ((uint32_t)0x07000000) - -/** - * @} - */ - -/** @defgroup I2C_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup I2C_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the I2Cx peripheral registers to their default reset values. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval None - */ -void I2C_DeInit(I2C_TypeDef* I2Cx) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - - if (I2Cx == I2C1) - { - /* Enable I2C1 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); - /* Release I2C1 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); - } - else - { - /* Enable I2C2 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); - /* Release I2C2 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); - } -} - -/** - * @brief Initializes the I2Cx peripheral according to the specified - * parameters in the I2C_InitStruct. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that - * contains the configuration information for the specified I2C peripheral. - * @retval None - */ -void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) -{ - uint16_t tmpreg = 0, freqrange = 0; - uint16_t result = 0x04; - uint32_t pclk1 = 8000000; - RCC_ClocksTypeDef rcc_clocks; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed)); - assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode)); - assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle)); - assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1)); - assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack)); - assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress)); - -/*---------------------------- I2Cx CR2 Configuration ------------------------*/ - /* Get the I2Cx CR2 value */ - tmpreg = I2Cx->CR2; - /* Clear frequency FREQ[5:0] bits */ - tmpreg &= CR2_FREQ_Reset; - /* Get pclk1 frequency value */ - RCC_GetClocksFreq(&rcc_clocks); - pclk1 = rcc_clocks.PCLK1_Frequency; - /* Set frequency bits depending on pclk1 value */ - freqrange = (uint16_t)(pclk1 / 1000000); - tmpreg |= freqrange; - /* Write to I2Cx CR2 */ - I2Cx->CR2 = tmpreg; - -/*---------------------------- I2Cx CCR Configuration ------------------------*/ - /* Disable the selected I2C peripheral to configure TRISE */ - I2Cx->CR1 &= CR1_PE_Reset; - /* Reset tmpreg value */ - /* Clear F/S, DUTY and CCR[11:0] bits */ - tmpreg = 0; - - /* Configure speed in standard mode */ - if (I2C_InitStruct->I2C_ClockSpeed <= 100000) - { - /* Standard mode speed calculate */ - result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1)); - /* Test if CCR value is under 0x4*/ - if (result < 0x04) - { - /* Set minimum allowed value */ - result = 0x04; - } - /* Set speed value for standard mode */ - tmpreg |= result; - /* Set Maximum Rise Time for standard mode */ - I2Cx->TRISE = freqrange + 1; - } - /* Configure speed in fast mode */ - else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/ - { - if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2) - { - /* Fast mode speed calculate: Tlow/Thigh = 2 */ - result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3)); - } - else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/ - { - /* Fast mode speed calculate: Tlow/Thigh = 16/9 */ - result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25)); - /* Set DUTY bit */ - result |= I2C_DutyCycle_16_9; - } - - /* Test if CCR value is under 0x1*/ - if ((result & CCR_CCR_Set) == 0) - { - /* Set minimum allowed value */ - result |= (uint16_t)0x0001; - } - /* Set speed value and set F/S bit for fast mode */ - tmpreg |= (uint16_t)(result | CCR_FS_Set); - /* Set Maximum Rise Time for fast mode */ - I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1); - } - - /* Write to I2Cx CCR */ - I2Cx->CCR = tmpreg; - /* Enable the selected I2C peripheral */ - I2Cx->CR1 |= CR1_PE_Set; - -/*---------------------------- I2Cx CR1 Configuration ------------------------*/ - /* Get the I2Cx CR1 value */ - tmpreg = I2Cx->CR1; - /* Clear ACK, SMBTYPE and SMBUS bits */ - tmpreg &= CR1_CLEAR_Mask; - /* Configure I2Cx: mode and acknowledgement */ - /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */ - /* Set ACK bit according to I2C_Ack value */ - tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack); - /* Write to I2Cx CR1 */ - I2Cx->CR1 = tmpreg; - -/*---------------------------- I2Cx OAR1 Configuration -----------------------*/ - /* Set I2Cx Own Address1 and acknowledged address */ - I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1); -} - -/** - * @brief Fills each I2C_InitStruct member with its default value. - * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized. - * @retval None - */ -void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct) -{ -/*---------------- Reset I2C init structure parameters values ----------------*/ - /* initialize the I2C_ClockSpeed member */ - I2C_InitStruct->I2C_ClockSpeed = 5000; - /* Initialize the I2C_Mode member */ - I2C_InitStruct->I2C_Mode = I2C_Mode_I2C; - /* Initialize the I2C_DutyCycle member */ - I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2; - /* Initialize the I2C_OwnAddress1 member */ - I2C_InitStruct->I2C_OwnAddress1 = 0; - /* Initialize the I2C_Ack member */ - I2C_InitStruct->I2C_Ack = I2C_Ack_Disable; - /* Initialize the I2C_AcknowledgedAddress member */ - I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; -} - -/** - * @brief Enables or disables the specified I2C peripheral. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C peripheral */ - I2Cx->CR1 |= CR1_PE_Set; - } - else - { - /* Disable the selected I2C peripheral */ - I2Cx->CR1 &= CR1_PE_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C DMA requests. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C DMA transfer. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C DMA requests */ - I2Cx->CR2 |= CR2_DMAEN_Set; - } - else - { - /* Disable the selected I2C DMA requests */ - I2Cx->CR2 &= CR2_DMAEN_Reset; - } -} - -/** - * @brief Specifies if the next DMA transfer will be the last one. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C DMA last transfer. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Next DMA transfer is the last transfer */ - I2Cx->CR2 |= CR2_LAST_Set; - } - else - { - /* Next DMA transfer is not the last transfer */ - I2Cx->CR2 &= CR2_LAST_Reset; - } -} - -/** - * @brief Generates I2Cx communication START condition. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C START condition generation. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Generate a START condition */ - I2Cx->CR1 |= CR1_START_Set; - } - else - { - /* Disable the START condition generation */ - I2Cx->CR1 &= CR1_START_Reset; - } -} - -/** - * @brief Generates I2Cx communication STOP condition. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C STOP condition generation. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Generate a STOP condition */ - I2Cx->CR1 |= CR1_STOP_Set; - } - else - { - /* Disable the STOP condition generation */ - I2Cx->CR1 &= CR1_STOP_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C acknowledge feature. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C Acknowledgement. - * This parameter can be: ENABLE or DISABLE. - * @retval None. - */ -void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the acknowledgement */ - I2Cx->CR1 |= CR1_ACK_Set; - } - else - { - /* Disable the acknowledgement */ - I2Cx->CR1 &= CR1_ACK_Reset; - } -} - -/** - * @brief Configures the specified I2C own address2. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param Address: specifies the 7bit I2C own address2. - * @retval None. - */ -void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) -{ - uint16_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - - /* Get the old register value */ - tmpreg = I2Cx->OAR2; - - /* Reset I2Cx Own address2 bit [7:1] */ - tmpreg &= OAR2_ADD2_Reset; - - /* Set I2Cx Own address2 */ - tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE); - - /* Store the new register value */ - I2Cx->OAR2 = tmpreg; -} - -/** - * @brief Enables or disables the specified I2C dual addressing mode. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C dual addressing mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable dual addressing mode */ - I2Cx->OAR2 |= OAR2_ENDUAL_Set; - } - else - { - /* Disable dual addressing mode */ - I2Cx->OAR2 &= OAR2_ENDUAL_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C general call feature. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C General call. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable generall call */ - I2Cx->CR1 |= CR1_ENGC_Set; - } - else - { - /* Disable generall call */ - I2Cx->CR1 &= CR1_ENGC_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C interrupts. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg I2C_IT_BUF: Buffer interrupt mask - * @arg I2C_IT_EVT: Event interrupt mask - * @arg I2C_IT_ERR: Error interrupt mask - * @param NewState: new state of the specified I2C interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_I2C_CONFIG_IT(I2C_IT)); - - if (NewState != DISABLE) - { - /* Enable the selected I2C interrupts */ - I2Cx->CR2 |= I2C_IT; - } - else - { - /* Disable the selected I2C interrupts */ - I2Cx->CR2 &= (uint16_t)~I2C_IT; - } -} - -/** - * @brief Sends a data byte through the I2Cx peripheral. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param Data: Byte to be transmitted.. - * @retval None - */ -void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Write in the DR register the data to be sent */ - I2Cx->DR = Data; -} - -/** - * @brief Returns the most recent received data by the I2Cx peripheral. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval The value of the received data. - */ -uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Return the data in the DR register */ - return (uint8_t)I2Cx->DR; -} - -/** - * @brief Transmits the address byte to select the slave device. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param Address: specifies the slave address which will be transmitted - * @param I2C_Direction: specifies whether the I2C device will be a - * Transmitter or a Receiver. This parameter can be one of the following values - * @arg I2C_Direction_Transmitter: Transmitter mode - * @arg I2C_Direction_Receiver: Receiver mode - * @retval None. - */ -void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_DIRECTION(I2C_Direction)); - /* Test on the direction to set/reset the read/write bit */ - if (I2C_Direction != I2C_Direction_Transmitter) - { - /* Set the address bit0 for read */ - Address |= OAR1_ADD0_Set; - } - else - { - /* Reset the address bit0 for write */ - Address &= OAR1_ADD0_Reset; - } - /* Send the address */ - I2Cx->DR = Address; -} - -/** - * @brief Reads the specified I2C register and returns its value. - * @param I2C_Register: specifies the register to read. - * This parameter can be one of the following values: - * @arg I2C_Register_CR1: CR1 register. - * @arg I2C_Register_CR2: CR2 register. - * @arg I2C_Register_OAR1: OAR1 register. - * @arg I2C_Register_OAR2: OAR2 register. - * @arg I2C_Register_DR: DR register. - * @arg I2C_Register_SR1: SR1 register. - * @arg I2C_Register_SR2: SR2 register. - * @arg I2C_Register_CCR: CCR register. - * @arg I2C_Register_TRISE: TRISE register. - * @retval The value of the read register. - */ -uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_REGISTER(I2C_Register)); - - tmp = (uint32_t) I2Cx; - tmp += I2C_Register; - - /* Return the selected register value */ - return (*(__IO uint16_t *) tmp); -} - -/** - * @brief Enables or disables the specified I2C software reset. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C software reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Peripheral under reset */ - I2Cx->CR1 |= CR1_SWRST_Set; - } - else - { - /* Peripheral not under reset */ - I2Cx->CR1 &= CR1_SWRST_Reset; - } -} - -/** - * @brief Selects the specified I2C NACK position in master receiver mode. - * This function is useful in I2C Master Receiver mode when the number - * of data to be received is equal to 2. In this case, this function - * should be called (with parameter I2C_NACKPosition_Next) before data - * reception starts,as described in the 2-byte reception procedure - * recommended in Reference Manual in Section: Master receiver. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_NACKPosition: specifies the NACK position. - * This parameter can be one of the following values: - * @arg I2C_NACKPosition_Next: indicates that the next byte will be the last - * received byte. - * @arg I2C_NACKPosition_Current: indicates that current byte is the last - * received byte. - * - * @note This function configures the same bit (POS) as I2C_PECPositionConfig() - * but is intended to be used in I2C mode while I2C_PECPositionConfig() - * is intended to used in SMBUS mode. - * - * @retval None - */ -void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_NACK_POSITION(I2C_NACKPosition)); - - /* Check the input parameter */ - if (I2C_NACKPosition == I2C_NACKPosition_Next) - { - /* Next byte in shift register is the last received byte */ - I2Cx->CR1 |= I2C_NACKPosition_Next; - } - else - { - /* Current byte in shift register is the last received byte */ - I2Cx->CR1 &= I2C_NACKPosition_Current; - } -} - -/** - * @brief Drives the SMBusAlert pin high or low for the specified I2C. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_SMBusAlert: specifies SMBAlert pin level. - * This parameter can be one of the following values: - * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low - * @arg I2C_SMBusAlert_High: SMBAlert pin driven high - * @retval None - */ -void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert)); - if (I2C_SMBusAlert == I2C_SMBusAlert_Low) - { - /* Drive the SMBusAlert pin Low */ - I2Cx->CR1 |= I2C_SMBusAlert_Low; - } - else - { - /* Drive the SMBusAlert pin High */ - I2Cx->CR1 &= I2C_SMBusAlert_High; - } -} - -/** - * @brief Enables or disables the specified I2C PEC transfer. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2C PEC transmission. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C PEC transmission */ - I2Cx->CR1 |= CR1_PEC_Set; - } - else - { - /* Disable the selected I2C PEC transmission */ - I2Cx->CR1 &= CR1_PEC_Reset; - } -} - -/** - * @brief Selects the specified I2C PEC position. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_PECPosition: specifies the PEC position. - * This parameter can be one of the following values: - * @arg I2C_PECPosition_Next: indicates that the next byte is PEC - * @arg I2C_PECPosition_Current: indicates that current byte is PEC - * - * @note This function configures the same bit (POS) as I2C_NACKPositionConfig() - * but is intended to be used in SMBUS mode while I2C_NACKPositionConfig() - * is intended to used in I2C mode. - * - * @retval None - */ -void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition)); - if (I2C_PECPosition == I2C_PECPosition_Next) - { - /* Next byte in shift register is PEC */ - I2Cx->CR1 |= I2C_PECPosition_Next; - } - else - { - /* Current byte in shift register is PEC */ - I2Cx->CR1 &= I2C_PECPosition_Current; - } -} - -/** - * @brief Enables or disables the PEC value calculation of the transferred bytes. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx PEC value calculation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C PEC calculation */ - I2Cx->CR1 |= CR1_ENPEC_Set; - } - else - { - /* Disable the selected I2C PEC calculation */ - I2Cx->CR1 &= CR1_ENPEC_Reset; - } -} - -/** - * @brief Returns the PEC value for the specified I2C. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @retval The PEC value. - */ -uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - /* Return the selected I2C PEC value */ - return ((I2Cx->SR2) >> 8); -} - -/** - * @brief Enables or disables the specified I2C ARP. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx ARP. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected I2C ARP */ - I2Cx->CR1 |= CR1_ENARP_Set; - } - else - { - /* Disable the selected I2C ARP */ - I2Cx->CR1 &= CR1_ENARP_Reset; - } -} - -/** - * @brief Enables or disables the specified I2C Clock stretching. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param NewState: new state of the I2Cx Clock stretching. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState == DISABLE) - { - /* Enable the selected I2C Clock stretching */ - I2Cx->CR1 |= CR1_NOSTRETCH_Set; - } - else - { - /* Disable the selected I2C Clock stretching */ - I2Cx->CR1 &= CR1_NOSTRETCH_Reset; - } -} - -/** - * @brief Selects the specified I2C fast mode duty cycle. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_DutyCycle: specifies the fast mode duty cycle. - * This parameter can be one of the following values: - * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2 - * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9 - * @retval None - */ -void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle) -{ - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle)); - if (I2C_DutyCycle != I2C_DutyCycle_16_9) - { - /* I2C fast mode Tlow/Thigh=2 */ - I2Cx->CCR &= I2C_DutyCycle_2; - } - else - { - /* I2C fast mode Tlow/Thigh=16/9 */ - I2Cx->CCR |= I2C_DutyCycle_16_9; - } -} - - - -/** - * @brief - **************************************************************************************** - * - * I2C State Monitoring Functions - * - **************************************************************************************** - * This I2C driver provides three different ways for I2C state monitoring - * depending on the application requirements and constraints: - * - * - * 1) Basic state monitoring: - * Using I2C_CheckEvent() function: - * It compares the status registers (SR1 and SR2) content to a given event - * (can be the combination of one or more flags). - * It returns SUCCESS if the current status includes the given flags - * and returns ERROR if one or more flags are missing in the current status. - * - When to use: - * - This function is suitable for most applications as well as for startup - * activity since the events are fully described in the product reference manual - * (RM0008). - * - It is also suitable for users who need to define their own events. - * - Limitations: - * - If an error occurs (ie. error flags are set besides to the monitored flags), - * the I2C_CheckEvent() function may return SUCCESS despite the communication - * hold or corrupted real state. - * In this case, it is advised to use error interrupts to monitor the error - * events and handle them in the interrupt IRQ handler. - * - * @note - * For error management, it is advised to use the following functions: - * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). - * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. - * Where x is the peripheral instance (I2C1, I2C2 ...) - * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() - * in order to determine which error occured. - * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() - * and/or I2C_GenerateStop() in order to clear the error flag and source, - * and return to correct communication status. - * - * - * 2) Advanced state monitoring: - * Using the function I2C_GetLastEvent() which returns the image of both status - * registers in a single word (uint32_t) (Status Register 2 value is shifted left - * by 16 bits and concatenated to Status Register 1). - * - When to use: - * - This function is suitable for the same applications above but it allows to - * overcome the mentioned limitation of I2C_GetFlagStatus() function. - * The returned value could be compared to events already defined in the - * library (stm32f10x_i2c.h) or to custom values defined by user. - * - This function is suitable when multiple flags are monitored at the same time. - * - At the opposite of I2C_CheckEvent() function, this function allows user to - * choose when an event is accepted (when all events flags are set and no - * other flags are set or just when the needed flags are set like - * I2C_CheckEvent() function). - * - Limitations: - * - User may need to define his own events. - * - Same remark concerning the error management is applicable for this - * function if user decides to check only regular communication flags (and - * ignores error flags). - * - * - * 3) Flag-based state monitoring: - * Using the function I2C_GetFlagStatus() which simply returns the status of - * one single flag (ie. I2C_FLAG_RXNE ...). - * - When to use: - * - This function could be used for specific applications or in debug phase. - * - It is suitable when only one flag checking is needed (most I2C events - * are monitored through multiple flags). - * - Limitations: - * - When calling this function, the Status register is accessed. Some flags are - * cleared when the status register is accessed. So checking the status - * of one Flag, may clear other ones. - * - Function may need to be called twice or more in order to monitor one - * single event. - * - * For detailed description of Events, please refer to section I2C_Events in - * stm32f10x_i2c.h file. - * - */ - -/** - * - * 1) Basic state monitoring - ******************************************************************************* - */ - -/** - * @brief Checks whether the last I2Cx Event is equal to the one passed - * as parameter. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_EVENT: specifies the event to be checked. - * This parameter can be one of the following values: - * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1 - * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2 - * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2 - * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2 - * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3 - * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3 - * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3 - * @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2 - * @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4 - * @arg I2C_EVENT_MASTER_MODE_SELECT : EV5 - * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6 - * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6 - * @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7 - * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8 - * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2 - * @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9 - * - * @note: For detailed description of Events, please refer to section - * I2C_Events in stm32f10x_i2c.h file. - * - * @retval An ErrorStatus enumeration value: - * - SUCCESS: Last event is equal to the I2C_EVENT - * - ERROR: Last event is different from the I2C_EVENT - */ -ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) -{ - uint32_t lastevent = 0; - uint32_t flag1 = 0, flag2 = 0; - ErrorStatus status = ERROR; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_EVENT(I2C_EVENT)); - - /* Read the I2Cx status register */ - flag1 = I2Cx->SR1; - flag2 = I2Cx->SR2; - flag2 = flag2 << 16; - - /* Get the last event value from I2C status register */ - lastevent = (flag1 | flag2) & FLAG_Mask; - - /* Check whether the last event contains the I2C_EVENT */ - if ((lastevent & I2C_EVENT) == I2C_EVENT) - { - /* SUCCESS: last event is equal to I2C_EVENT */ - status = SUCCESS; - } - else - { - /* ERROR: last event is different from I2C_EVENT */ - status = ERROR; - } - /* Return status */ - return status; -} - -/** - * - * 2) Advanced state monitoring - ******************************************************************************* - */ - -/** - * @brief Returns the last I2Cx Event. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * - * @note: For detailed description of Events, please refer to section - * I2C_Events in stm32f10x_i2c.h file. - * - * @retval The last event - */ -uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) -{ - uint32_t lastevent = 0; - uint32_t flag1 = 0, flag2 = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - - /* Read the I2Cx status register */ - flag1 = I2Cx->SR1; - flag2 = I2Cx->SR2; - flag2 = flag2 << 16; - - /* Get the last event value from I2C status register */ - lastevent = (flag1 | flag2) & FLAG_Mask; - - /* Return status */ - return lastevent; -} - -/** - * - * 3) Flag-based state monitoring - ******************************************************************************* - */ - -/** - * @brief Checks whether the specified I2C flag is set or not. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg I2C_FLAG_DUALF: Dual flag (Slave mode) - * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode) - * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode) - * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode) - * @arg I2C_FLAG_TRA: Transmitter/Receiver flag - * @arg I2C_FLAG_BUSY: Bus busy flag - * @arg I2C_FLAG_MSL: Master/Slave flag - * @arg I2C_FLAG_SMBALERT: SMBus Alert flag - * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag - * @arg I2C_FLAG_PECERR: PEC error in reception flag - * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) - * @arg I2C_FLAG_AF: Acknowledge failure flag - * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) - * @arg I2C_FLAG_BERR: Bus error flag - * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter) - * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag - * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode) - * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode) - * @arg I2C_FLAG_BTF: Byte transfer finished flag - * @arg I2C_FLAG_ADDR: Address sent flag (Master mode) "ADSL" - * Address matched flag (Slave mode)"ENDA" - * @arg I2C_FLAG_SB: Start bit flag (Master mode) - * @retval The new state of I2C_FLAG (SET or RESET). - */ -FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) -{ - FlagStatus bitstatus = RESET; - __IO uint32_t i2creg = 0, i2cxbase = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); - - /* Get the I2Cx peripheral base address */ - i2cxbase = (uint32_t)I2Cx; - - /* Read flag register index */ - i2creg = I2C_FLAG >> 28; - - /* Get bit[23:0] of the flag */ - I2C_FLAG &= FLAG_Mask; - - if(i2creg != 0) - { - /* Get the I2Cx SR1 register address */ - i2cxbase += 0x14; - } - else - { - /* Flag in I2Cx SR2 Register */ - I2C_FLAG = (uint32_t)(I2C_FLAG >> 16); - /* Get the I2Cx SR2 register address */ - i2cxbase += 0x18; - } - - if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET) - { - /* I2C_FLAG is set */ - bitstatus = SET; - } - else - { - /* I2C_FLAG is reset */ - bitstatus = RESET; - } - - /* Return the I2C_FLAG status */ - return bitstatus; -} - - - -/** - * @brief Clears the I2Cx's pending flags. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg I2C_FLAG_SMBALERT: SMBus Alert flag - * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag - * @arg I2C_FLAG_PECERR: PEC error in reception flag - * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) - * @arg I2C_FLAG_AF: Acknowledge failure flag - * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) - * @arg I2C_FLAG_BERR: Bus error flag - * - * @note - * - STOPF (STOP detection) is cleared by software sequence: a read operation - * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation - * to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). - * - ADD10 (10-bit header sent) is cleared by software sequence: a read - * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the - * second byte of the address in DR register. - * - BTF (Byte Transfer Finished) is cleared by software sequence: a read - * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a - * read/write to I2C_DR register (I2C_SendData()). - * - ADDR (Address sent) is cleared by software sequence: a read operation to - * I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to - * I2C_SR2 register ((void)(I2Cx->SR2)). - * - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1 - * register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR - * register (I2C_SendData()). - * @retval None - */ -void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) -{ - uint32_t flagpos = 0; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); - /* Get the I2C flag position */ - flagpos = I2C_FLAG & FLAG_Mask; - /* Clear the selected I2C flag */ - I2Cx->SR1 = (uint16_t)~flagpos; -} - -/** - * @brief Checks whether the specified I2C interrupt has occurred or not. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_IT: specifies the interrupt source to check. - * This parameter can be one of the following values: - * @arg I2C_IT_SMBALERT: SMBus Alert flag - * @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag - * @arg I2C_IT_PECERR: PEC error in reception flag - * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode) - * @arg I2C_IT_AF: Acknowledge failure flag - * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode) - * @arg I2C_IT_BERR: Bus error flag - * @arg I2C_IT_TXE: Data register empty flag (Transmitter) - * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag - * @arg I2C_IT_STOPF: Stop detection flag (Slave mode) - * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode) - * @arg I2C_IT_BTF: Byte transfer finished flag - * @arg I2C_IT_ADDR: Address sent flag (Master mode) "ADSL" - * Address matched flag (Slave mode)"ENDAD" - * @arg I2C_IT_SB: Start bit flag (Master mode) - * @retval The new state of I2C_IT (SET or RESET). - */ -ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) -{ - ITStatus bitstatus = RESET; - uint32_t enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_GET_IT(I2C_IT)); - - /* Check if the interrupt source is enabled or not */ - enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CR2)) ; - - /* Get bit[23:0] of the flag */ - I2C_IT &= FLAG_Mask; - - /* Check the status of the specified I2C flag */ - if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus) - { - /* I2C_IT is set */ - bitstatus = SET; - } - else - { - /* I2C_IT is reset */ - bitstatus = RESET; - } - /* Return the I2C_IT status */ - return bitstatus; -} - -/** - * @brief Clears the I2Cxs interrupt pending bits. - * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. - * @param I2C_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg I2C_IT_SMBALERT: SMBus Alert interrupt - * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt - * @arg I2C_IT_PECERR: PEC error in reception interrupt - * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode) - * @arg I2C_IT_AF: Acknowledge failure interrupt - * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode) - * @arg I2C_IT_BERR: Bus error interrupt - * - * @note - * - STOPF (STOP detection) is cleared by software sequence: a read operation - * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to - * I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). - * - ADD10 (10-bit header sent) is cleared by software sequence: a read - * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second - * byte of the address in I2C_DR register. - * - BTF (Byte Transfer Finished) is cleared by software sequence: a read - * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a - * read/write to I2C_DR register (I2C_SendData()). - * - ADDR (Address sent) is cleared by software sequence: a read operation to - * I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to - * I2C_SR2 register ((void)(I2Cx->SR2)). - * - SB (Start Bit) is cleared by software sequence: a read operation to - * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to - * I2C_DR register (I2C_SendData()). - * @retval None - */ -void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) -{ - uint32_t flagpos = 0; - /* Check the parameters */ - assert_param(IS_I2C_ALL_PERIPH(I2Cx)); - assert_param(IS_I2C_CLEAR_IT(I2C_IT)); - /* Get the I2C flag position */ - flagpos = I2C_IT & FLAG_Mask; - /* Clear the selected I2C flag */ - I2Cx->SR1 = (uint16_t)~flagpos; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_i2c.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the I2C firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_i2c.h" +#include "stm32f10x_rcc.h" + + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup I2C + * @brief I2C driver modules + * @{ + */ + +/** @defgroup I2C_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_Defines + * @{ + */ + +/* I2C SPE mask */ +#define CR1_PE_Set ((uint16_t)0x0001) +#define CR1_PE_Reset ((uint16_t)0xFFFE) + +/* I2C START mask */ +#define CR1_START_Set ((uint16_t)0x0100) +#define CR1_START_Reset ((uint16_t)0xFEFF) + +/* I2C STOP mask */ +#define CR1_STOP_Set ((uint16_t)0x0200) +#define CR1_STOP_Reset ((uint16_t)0xFDFF) + +/* I2C ACK mask */ +#define CR1_ACK_Set ((uint16_t)0x0400) +#define CR1_ACK_Reset ((uint16_t)0xFBFF) + +/* I2C ENGC mask */ +#define CR1_ENGC_Set ((uint16_t)0x0040) +#define CR1_ENGC_Reset ((uint16_t)0xFFBF) + +/* I2C SWRST mask */ +#define CR1_SWRST_Set ((uint16_t)0x8000) +#define CR1_SWRST_Reset ((uint16_t)0x7FFF) + +/* I2C PEC mask */ +#define CR1_PEC_Set ((uint16_t)0x1000) +#define CR1_PEC_Reset ((uint16_t)0xEFFF) + +/* I2C ENPEC mask */ +#define CR1_ENPEC_Set ((uint16_t)0x0020) +#define CR1_ENPEC_Reset ((uint16_t)0xFFDF) + +/* I2C ENARP mask */ +#define CR1_ENARP_Set ((uint16_t)0x0010) +#define CR1_ENARP_Reset ((uint16_t)0xFFEF) + +/* I2C NOSTRETCH mask */ +#define CR1_NOSTRETCH_Set ((uint16_t)0x0080) +#define CR1_NOSTRETCH_Reset ((uint16_t)0xFF7F) + +/* I2C registers Masks */ +#define CR1_CLEAR_Mask ((uint16_t)0xFBF5) + +/* I2C DMAEN mask */ +#define CR2_DMAEN_Set ((uint16_t)0x0800) +#define CR2_DMAEN_Reset ((uint16_t)0xF7FF) + +/* I2C LAST mask */ +#define CR2_LAST_Set ((uint16_t)0x1000) +#define CR2_LAST_Reset ((uint16_t)0xEFFF) + +/* I2C FREQ mask */ +#define CR2_FREQ_Reset ((uint16_t)0xFFC0) + +/* I2C ADD0 mask */ +#define OAR1_ADD0_Set ((uint16_t)0x0001) +#define OAR1_ADD0_Reset ((uint16_t)0xFFFE) + +/* I2C ENDUAL mask */ +#define OAR2_ENDUAL_Set ((uint16_t)0x0001) +#define OAR2_ENDUAL_Reset ((uint16_t)0xFFFE) + +/* I2C ADD2 mask */ +#define OAR2_ADD2_Reset ((uint16_t)0xFF01) + +/* I2C F/S mask */ +#define CCR_FS_Set ((uint16_t)0x8000) + +/* I2C CCR mask */ +#define CCR_CCR_Set ((uint16_t)0x0FFF) + +/* I2C FLAG mask */ +#define FLAG_Mask ((uint32_t)0x00FFFFFF) + +/* I2C Interrupt Enable mask */ +#define ITEN_Mask ((uint32_t)0x07000000) + +/** + * @} + */ + +/** @defgroup I2C_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup I2C_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the I2Cx peripheral registers to their default reset values. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @retval None + */ +void I2C_DeInit(I2C_TypeDef* I2Cx) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + + if (I2Cx == I2C1) + { + /* Enable I2C1 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE); + /* Release I2C1 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE); + } + else + { + /* Enable I2C2 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE); + /* Release I2C2 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE); + } +} + +/** + * @brief Initializes the I2Cx peripheral according to the specified + * parameters in the I2C_InitStruct. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that + * contains the configuration information for the specified I2C peripheral. + * @retval None + */ +void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct) +{ + uint16_t tmpreg = 0, freqrange = 0; + uint16_t result = 0x04; + uint32_t pclk1 = 8000000; + RCC_ClocksTypeDef rcc_clocks; + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed)); + assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode)); + assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle)); + assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1)); + assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack)); + assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress)); + +/*---------------------------- I2Cx CR2 Configuration ------------------------*/ + /* Get the I2Cx CR2 value */ + tmpreg = I2Cx->CR2; + /* Clear frequency FREQ[5:0] bits */ + tmpreg &= CR2_FREQ_Reset; + /* Get pclk1 frequency value */ + RCC_GetClocksFreq(&rcc_clocks); + pclk1 = rcc_clocks.PCLK1_Frequency; + /* Set frequency bits depending on pclk1 value */ + freqrange = (uint16_t)(pclk1 / 1000000); + tmpreg |= freqrange; + /* Write to I2Cx CR2 */ + I2Cx->CR2 = tmpreg; + +/*---------------------------- I2Cx CCR Configuration ------------------------*/ + /* Disable the selected I2C peripheral to configure TRISE */ + I2Cx->CR1 &= CR1_PE_Reset; + /* Reset tmpreg value */ + /* Clear F/S, DUTY and CCR[11:0] bits */ + tmpreg = 0; + + /* Configure speed in standard mode */ + if (I2C_InitStruct->I2C_ClockSpeed <= 100000) + { + /* Standard mode speed calculate */ + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1)); + /* Test if CCR value is under 0x4*/ + if (result < 0x04) + { + /* Set minimum allowed value */ + result = 0x04; + } + /* Set speed value for standard mode */ + tmpreg |= result; + /* Set Maximum Rise Time for standard mode */ + I2Cx->TRISE = freqrange + 1; + } + /* Configure speed in fast mode */ + else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/ + { + if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2) + { + /* Fast mode speed calculate: Tlow/Thigh = 2 */ + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3)); + } + else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/ + { + /* Fast mode speed calculate: Tlow/Thigh = 16/9 */ + result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25)); + /* Set DUTY bit */ + result |= I2C_DutyCycle_16_9; + } + + /* Test if CCR value is under 0x1*/ + if ((result & CCR_CCR_Set) == 0) + { + /* Set minimum allowed value */ + result |= (uint16_t)0x0001; + } + /* Set speed value and set F/S bit for fast mode */ + tmpreg |= (uint16_t)(result | CCR_FS_Set); + /* Set Maximum Rise Time for fast mode */ + I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1); + } + + /* Write to I2Cx CCR */ + I2Cx->CCR = tmpreg; + /* Enable the selected I2C peripheral */ + I2Cx->CR1 |= CR1_PE_Set; + +/*---------------------------- I2Cx CR1 Configuration ------------------------*/ + /* Get the I2Cx CR1 value */ + tmpreg = I2Cx->CR1; + /* Clear ACK, SMBTYPE and SMBUS bits */ + tmpreg &= CR1_CLEAR_Mask; + /* Configure I2Cx: mode and acknowledgement */ + /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */ + /* Set ACK bit according to I2C_Ack value */ + tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack); + /* Write to I2Cx CR1 */ + I2Cx->CR1 = tmpreg; + +/*---------------------------- I2Cx OAR1 Configuration -----------------------*/ + /* Set I2Cx Own Address1 and acknowledged address */ + I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1); +} + +/** + * @brief Fills each I2C_InitStruct member with its default value. + * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized. + * @retval None + */ +void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct) +{ +/*---------------- Reset I2C init structure parameters values ----------------*/ + /* initialize the I2C_ClockSpeed member */ + I2C_InitStruct->I2C_ClockSpeed = 5000; + /* Initialize the I2C_Mode member */ + I2C_InitStruct->I2C_Mode = I2C_Mode_I2C; + /* Initialize the I2C_DutyCycle member */ + I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2; + /* Initialize the I2C_OwnAddress1 member */ + I2C_InitStruct->I2C_OwnAddress1 = 0; + /* Initialize the I2C_Ack member */ + I2C_InitStruct->I2C_Ack = I2C_Ack_Disable; + /* Initialize the I2C_AcknowledgedAddress member */ + I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; +} + +/** + * @brief Enables or disables the specified I2C peripheral. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C peripheral */ + I2Cx->CR1 |= CR1_PE_Set; + } + else + { + /* Disable the selected I2C peripheral */ + I2Cx->CR1 &= CR1_PE_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C DMA requests. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C DMA transfer. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C DMA requests */ + I2Cx->CR2 |= CR2_DMAEN_Set; + } + else + { + /* Disable the selected I2C DMA requests */ + I2Cx->CR2 &= CR2_DMAEN_Reset; + } +} + +/** + * @brief Specifies if the next DMA transfer will be the last one. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C DMA last transfer. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Next DMA transfer is the last transfer */ + I2Cx->CR2 |= CR2_LAST_Set; + } + else + { + /* Next DMA transfer is not the last transfer */ + I2Cx->CR2 &= CR2_LAST_Reset; + } +} + +/** + * @brief Generates I2Cx communication START condition. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C START condition generation. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Generate a START condition */ + I2Cx->CR1 |= CR1_START_Set; + } + else + { + /* Disable the START condition generation */ + I2Cx->CR1 &= CR1_START_Reset; + } +} + +/** + * @brief Generates I2Cx communication STOP condition. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C STOP condition generation. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Generate a STOP condition */ + I2Cx->CR1 |= CR1_STOP_Set; + } + else + { + /* Disable the STOP condition generation */ + I2Cx->CR1 &= CR1_STOP_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C acknowledge feature. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C Acknowledgement. + * This parameter can be: ENABLE or DISABLE. + * @retval None. + */ +void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the acknowledgement */ + I2Cx->CR1 |= CR1_ACK_Set; + } + else + { + /* Disable the acknowledgement */ + I2Cx->CR1 &= CR1_ACK_Reset; + } +} + +/** + * @brief Configures the specified I2C own address2. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param Address: specifies the 7bit I2C own address2. + * @retval None. + */ +void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address) +{ + uint16_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + + /* Get the old register value */ + tmpreg = I2Cx->OAR2; + + /* Reset I2Cx Own address2 bit [7:1] */ + tmpreg &= OAR2_ADD2_Reset; + + /* Set I2Cx Own address2 */ + tmpreg |= (uint16_t)((uint16_t)Address & (uint16_t)0x00FE); + + /* Store the new register value */ + I2Cx->OAR2 = tmpreg; +} + +/** + * @brief Enables or disables the specified I2C dual addressing mode. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C dual addressing mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable dual addressing mode */ + I2Cx->OAR2 |= OAR2_ENDUAL_Set; + } + else + { + /* Disable dual addressing mode */ + I2Cx->OAR2 &= OAR2_ENDUAL_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C general call feature. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C General call. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable generall call */ + I2Cx->CR1 |= CR1_ENGC_Set; + } + else + { + /* Disable generall call */ + I2Cx->CR1 &= CR1_ENGC_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C interrupts. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg I2C_IT_BUF: Buffer interrupt mask + * @arg I2C_IT_EVT: Event interrupt mask + * @arg I2C_IT_ERR: Error interrupt mask + * @param NewState: new state of the specified I2C interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_I2C_CONFIG_IT(I2C_IT)); + + if (NewState != DISABLE) + { + /* Enable the selected I2C interrupts */ + I2Cx->CR2 |= I2C_IT; + } + else + { + /* Disable the selected I2C interrupts */ + I2Cx->CR2 &= (uint16_t)~I2C_IT; + } +} + +/** + * @brief Sends a data byte through the I2Cx peripheral. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param Data: Byte to be transmitted.. + * @retval None + */ +void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + /* Write in the DR register the data to be sent */ + I2Cx->DR = Data; +} + +/** + * @brief Returns the most recent received data by the I2Cx peripheral. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @retval The value of the received data. + */ +uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + /* Return the data in the DR register */ + return (uint8_t)I2Cx->DR; +} + +/** + * @brief Transmits the address byte to select the slave device. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param Address: specifies the slave address which will be transmitted + * @param I2C_Direction: specifies whether the I2C device will be a + * Transmitter or a Receiver. This parameter can be one of the following values + * @arg I2C_Direction_Transmitter: Transmitter mode + * @arg I2C_Direction_Receiver: Receiver mode + * @retval None. + */ +void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_DIRECTION(I2C_Direction)); + /* Test on the direction to set/reset the read/write bit */ + if (I2C_Direction != I2C_Direction_Transmitter) + { + /* Set the address bit0 for read */ + Address |= OAR1_ADD0_Set; + } + else + { + /* Reset the address bit0 for write */ + Address &= OAR1_ADD0_Reset; + } + /* Send the address */ + I2Cx->DR = Address; +} + +/** + * @brief Reads the specified I2C register and returns its value. + * @param I2C_Register: specifies the register to read. + * This parameter can be one of the following values: + * @arg I2C_Register_CR1: CR1 register. + * @arg I2C_Register_CR2: CR2 register. + * @arg I2C_Register_OAR1: OAR1 register. + * @arg I2C_Register_OAR2: OAR2 register. + * @arg I2C_Register_DR: DR register. + * @arg I2C_Register_SR1: SR1 register. + * @arg I2C_Register_SR2: SR2 register. + * @arg I2C_Register_CCR: CCR register. + * @arg I2C_Register_TRISE: TRISE register. + * @retval The value of the read register. + */ +uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_REGISTER(I2C_Register)); + + tmp = (uint32_t) I2Cx; + tmp += I2C_Register; + + /* Return the selected register value */ + return (*(__IO uint16_t *) tmp); +} + +/** + * @brief Enables or disables the specified I2C software reset. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C software reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Peripheral under reset */ + I2Cx->CR1 |= CR1_SWRST_Set; + } + else + { + /* Peripheral not under reset */ + I2Cx->CR1 &= CR1_SWRST_Reset; + } +} + +/** + * @brief Selects the specified I2C NACK position in master receiver mode. + * This function is useful in I2C Master Receiver mode when the number + * of data to be received is equal to 2. In this case, this function + * should be called (with parameter I2C_NACKPosition_Next) before data + * reception starts,as described in the 2-byte reception procedure + * recommended in Reference Manual in Section: Master receiver. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_NACKPosition: specifies the NACK position. + * This parameter can be one of the following values: + * @arg I2C_NACKPosition_Next: indicates that the next byte will be the last + * received byte. + * @arg I2C_NACKPosition_Current: indicates that current byte is the last + * received byte. + * + * @note This function configures the same bit (POS) as I2C_PECPositionConfig() + * but is intended to be used in I2C mode while I2C_PECPositionConfig() + * is intended to used in SMBUS mode. + * + * @retval None + */ +void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_NACK_POSITION(I2C_NACKPosition)); + + /* Check the input parameter */ + if (I2C_NACKPosition == I2C_NACKPosition_Next) + { + /* Next byte in shift register is the last received byte */ + I2Cx->CR1 |= I2C_NACKPosition_Next; + } + else + { + /* Current byte in shift register is the last received byte */ + I2Cx->CR1 &= I2C_NACKPosition_Current; + } +} + +/** + * @brief Drives the SMBusAlert pin high or low for the specified I2C. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_SMBusAlert: specifies SMBAlert pin level. + * This parameter can be one of the following values: + * @arg I2C_SMBusAlert_Low: SMBAlert pin driven low + * @arg I2C_SMBusAlert_High: SMBAlert pin driven high + * @retval None + */ +void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert)); + if (I2C_SMBusAlert == I2C_SMBusAlert_Low) + { + /* Drive the SMBusAlert pin Low */ + I2Cx->CR1 |= I2C_SMBusAlert_Low; + } + else + { + /* Drive the SMBusAlert pin High */ + I2Cx->CR1 &= I2C_SMBusAlert_High; + } +} + +/** + * @brief Enables or disables the specified I2C PEC transfer. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2C PEC transmission. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C PEC transmission */ + I2Cx->CR1 |= CR1_PEC_Set; + } + else + { + /* Disable the selected I2C PEC transmission */ + I2Cx->CR1 &= CR1_PEC_Reset; + } +} + +/** + * @brief Selects the specified I2C PEC position. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_PECPosition: specifies the PEC position. + * This parameter can be one of the following values: + * @arg I2C_PECPosition_Next: indicates that the next byte is PEC + * @arg I2C_PECPosition_Current: indicates that current byte is PEC + * + * @note This function configures the same bit (POS) as I2C_NACKPositionConfig() + * but is intended to be used in SMBUS mode while I2C_NACKPositionConfig() + * is intended to used in I2C mode. + * + * @retval None + */ +void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_PEC_POSITION(I2C_PECPosition)); + if (I2C_PECPosition == I2C_PECPosition_Next) + { + /* Next byte in shift register is PEC */ + I2Cx->CR1 |= I2C_PECPosition_Next; + } + else + { + /* Current byte in shift register is PEC */ + I2Cx->CR1 &= I2C_PECPosition_Current; + } +} + +/** + * @brief Enables or disables the PEC value calculation of the transferred bytes. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx PEC value calculation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C PEC calculation */ + I2Cx->CR1 |= CR1_ENPEC_Set; + } + else + { + /* Disable the selected I2C PEC calculation */ + I2Cx->CR1 &= CR1_ENPEC_Reset; + } +} + +/** + * @brief Returns the PEC value for the specified I2C. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @retval The PEC value. + */ +uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + /* Return the selected I2C PEC value */ + return ((I2Cx->SR2) >> 8); +} + +/** + * @brief Enables or disables the specified I2C ARP. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx ARP. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected I2C ARP */ + I2Cx->CR1 |= CR1_ENARP_Set; + } + else + { + /* Disable the selected I2C ARP */ + I2Cx->CR1 &= CR1_ENARP_Reset; + } +} + +/** + * @brief Enables or disables the specified I2C Clock stretching. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param NewState: new state of the I2Cx Clock stretching. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState == DISABLE) + { + /* Enable the selected I2C Clock stretching */ + I2Cx->CR1 |= CR1_NOSTRETCH_Set; + } + else + { + /* Disable the selected I2C Clock stretching */ + I2Cx->CR1 &= CR1_NOSTRETCH_Reset; + } +} + +/** + * @brief Selects the specified I2C fast mode duty cycle. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_DutyCycle: specifies the fast mode duty cycle. + * This parameter can be one of the following values: + * @arg I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2 + * @arg I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9 + * @retval None + */ +void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle) +{ + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_DUTY_CYCLE(I2C_DutyCycle)); + if (I2C_DutyCycle != I2C_DutyCycle_16_9) + { + /* I2C fast mode Tlow/Thigh=2 */ + I2Cx->CCR &= I2C_DutyCycle_2; + } + else + { + /* I2C fast mode Tlow/Thigh=16/9 */ + I2Cx->CCR |= I2C_DutyCycle_16_9; + } +} + + + +/** + * @brief + **************************************************************************************** + * + * I2C State Monitoring Functions + * + **************************************************************************************** + * This I2C driver provides three different ways for I2C state monitoring + * depending on the application requirements and constraints: + * + * + * 1) Basic state monitoring: + * Using I2C_CheckEvent() function: + * It compares the status registers (SR1 and SR2) content to a given event + * (can be the combination of one or more flags). + * It returns SUCCESS if the current status includes the given flags + * and returns ERROR if one or more flags are missing in the current status. + * - When to use: + * - This function is suitable for most applications as well as for startup + * activity since the events are fully described in the product reference manual + * (RM0008). + * - It is also suitable for users who need to define their own events. + * - Limitations: + * - If an error occurs (ie. error flags are set besides to the monitored flags), + * the I2C_CheckEvent() function may return SUCCESS despite the communication + * hold or corrupted real state. + * In this case, it is advised to use error interrupts to monitor the error + * events and handle them in the interrupt IRQ handler. + * + * @note + * For error management, it is advised to use the following functions: + * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). + * - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs. + * Where x is the peripheral instance (I2C1, I2C2 ...) + * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into I2Cx_ER_IRQHandler() + * in order to determine which error occured. + * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() + * and/or I2C_GenerateStop() in order to clear the error flag and source, + * and return to correct communication status. + * + * + * 2) Advanced state monitoring: + * Using the function I2C_GetLastEvent() which returns the image of both status + * registers in a single word (uint32_t) (Status Register 2 value is shifted left + * by 16 bits and concatenated to Status Register 1). + * - When to use: + * - This function is suitable for the same applications above but it allows to + * overcome the mentioned limitation of I2C_GetFlagStatus() function. + * The returned value could be compared to events already defined in the + * library (stm32f10x_i2c.h) or to custom values defined by user. + * - This function is suitable when multiple flags are monitored at the same time. + * - At the opposite of I2C_CheckEvent() function, this function allows user to + * choose when an event is accepted (when all events flags are set and no + * other flags are set or just when the needed flags are set like + * I2C_CheckEvent() function). + * - Limitations: + * - User may need to define his own events. + * - Same remark concerning the error management is applicable for this + * function if user decides to check only regular communication flags (and + * ignores error flags). + * + * + * 3) Flag-based state monitoring: + * Using the function I2C_GetFlagStatus() which simply returns the status of + * one single flag (ie. I2C_FLAG_RXNE ...). + * - When to use: + * - This function could be used for specific applications or in debug phase. + * - It is suitable when only one flag checking is needed (most I2C events + * are monitored through multiple flags). + * - Limitations: + * - When calling this function, the Status register is accessed. Some flags are + * cleared when the status register is accessed. So checking the status + * of one Flag, may clear other ones. + * - Function may need to be called twice or more in order to monitor one + * single event. + * + * For detailed description of Events, please refer to section I2C_Events in + * stm32f10x_i2c.h file. + * + */ + +/** + * + * 1) Basic state monitoring + ******************************************************************************* + */ + +/** + * @brief Checks whether the last I2Cx Event is equal to the one passed + * as parameter. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_EVENT: specifies the event to be checked. + * This parameter can be one of the following values: + * @arg I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED : EV1 + * @arg I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2 + * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF) : EV2 + * @arg (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL) : EV2 + * @arg I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3 + * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF) : EV3 + * @arg (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL) : EV3 + * @arg I2C_EVENT_SLAVE_ACK_FAILURE : EV3_2 + * @arg I2C_EVENT_SLAVE_STOP_DETECTED : EV4 + * @arg I2C_EVENT_MASTER_MODE_SELECT : EV5 + * @arg I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED : EV6 + * @arg I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED : EV6 + * @arg I2C_EVENT_MASTER_BYTE_RECEIVED : EV7 + * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTING : EV8 + * @arg I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8_2 + * @arg I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9 + * + * @note: For detailed description of Events, please refer to section + * I2C_Events in stm32f10x_i2c.h file. + * + * @retval An ErrorStatus enumeration value: + * - SUCCESS: Last event is equal to the I2C_EVENT + * - ERROR: Last event is different from the I2C_EVENT + */ +ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT) +{ + uint32_t lastevent = 0; + uint32_t flag1 = 0, flag2 = 0; + ErrorStatus status = ERROR; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_EVENT(I2C_EVENT)); + + /* Read the I2Cx status register */ + flag1 = I2Cx->SR1; + flag2 = I2Cx->SR2; + flag2 = flag2 << 16; + + /* Get the last event value from I2C status register */ + lastevent = (flag1 | flag2) & FLAG_Mask; + + /* Check whether the last event contains the I2C_EVENT */ + if ((lastevent & I2C_EVENT) == I2C_EVENT) + { + /* SUCCESS: last event is equal to I2C_EVENT */ + status = SUCCESS; + } + else + { + /* ERROR: last event is different from I2C_EVENT */ + status = ERROR; + } + /* Return status */ + return status; +} + +/** + * + * 2) Advanced state monitoring + ******************************************************************************* + */ + +/** + * @brief Returns the last I2Cx Event. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * + * @note: For detailed description of Events, please refer to section + * I2C_Events in stm32f10x_i2c.h file. + * + * @retval The last event + */ +uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx) +{ + uint32_t lastevent = 0; + uint32_t flag1 = 0, flag2 = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + + /* Read the I2Cx status register */ + flag1 = I2Cx->SR1; + flag2 = I2Cx->SR2; + flag2 = flag2 << 16; + + /* Get the last event value from I2C status register */ + lastevent = (flag1 | flag2) & FLAG_Mask; + + /* Return status */ + return lastevent; +} + +/** + * + * 3) Flag-based state monitoring + ******************************************************************************* + */ + +/** + * @brief Checks whether the specified I2C flag is set or not. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg I2C_FLAG_DUALF: Dual flag (Slave mode) + * @arg I2C_FLAG_SMBHOST: SMBus host header (Slave mode) + * @arg I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode) + * @arg I2C_FLAG_GENCALL: General call header flag (Slave mode) + * @arg I2C_FLAG_TRA: Transmitter/Receiver flag + * @arg I2C_FLAG_BUSY: Bus busy flag + * @arg I2C_FLAG_MSL: Master/Slave flag + * @arg I2C_FLAG_SMBALERT: SMBus Alert flag + * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag + * @arg I2C_FLAG_PECERR: PEC error in reception flag + * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) + * @arg I2C_FLAG_AF: Acknowledge failure flag + * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) + * @arg I2C_FLAG_BERR: Bus error flag + * @arg I2C_FLAG_TXE: Data register empty flag (Transmitter) + * @arg I2C_FLAG_RXNE: Data register not empty (Receiver) flag + * @arg I2C_FLAG_STOPF: Stop detection flag (Slave mode) + * @arg I2C_FLAG_ADD10: 10-bit header sent flag (Master mode) + * @arg I2C_FLAG_BTF: Byte transfer finished flag + * @arg I2C_FLAG_ADDR: Address sent flag (Master mode) "ADSL" + * Address matched flag (Slave mode)"ENDA" + * @arg I2C_FLAG_SB: Start bit flag (Master mode) + * @retval The new state of I2C_FLAG (SET or RESET). + */ +FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) +{ + FlagStatus bitstatus = RESET; + __IO uint32_t i2creg = 0, i2cxbase = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_GET_FLAG(I2C_FLAG)); + + /* Get the I2Cx peripheral base address */ + i2cxbase = (uint32_t)I2Cx; + + /* Read flag register index */ + i2creg = I2C_FLAG >> 28; + + /* Get bit[23:0] of the flag */ + I2C_FLAG &= FLAG_Mask; + + if(i2creg != 0) + { + /* Get the I2Cx SR1 register address */ + i2cxbase += 0x14; + } + else + { + /* Flag in I2Cx SR2 Register */ + I2C_FLAG = (uint32_t)(I2C_FLAG >> 16); + /* Get the I2Cx SR2 register address */ + i2cxbase += 0x18; + } + + if(((*(__IO uint32_t *)i2cxbase) & I2C_FLAG) != (uint32_t)RESET) + { + /* I2C_FLAG is set */ + bitstatus = SET; + } + else + { + /* I2C_FLAG is reset */ + bitstatus = RESET; + } + + /* Return the I2C_FLAG status */ + return bitstatus; +} + + + +/** + * @brief Clears the I2Cx's pending flags. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg I2C_FLAG_SMBALERT: SMBus Alert flag + * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag + * @arg I2C_FLAG_PECERR: PEC error in reception flag + * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode) + * @arg I2C_FLAG_AF: Acknowledge failure flag + * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode) + * @arg I2C_FLAG_BERR: Bus error flag + * + * @note + * - STOPF (STOP detection) is cleared by software sequence: a read operation + * to I2C_SR1 register (I2C_GetFlagStatus()) followed by a write operation + * to I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). + * - ADD10 (10-bit header sent) is cleared by software sequence: a read + * operation to I2C_SR1 (I2C_GetFlagStatus()) followed by writing the + * second byte of the address in DR register. + * - BTF (Byte Transfer Finished) is cleared by software sequence: a read + * operation to I2C_SR1 register (I2C_GetFlagStatus()) followed by a + * read/write to I2C_DR register (I2C_SendData()). + * - ADDR (Address sent) is cleared by software sequence: a read operation to + * I2C_SR1 register (I2C_GetFlagStatus()) followed by a read operation to + * I2C_SR2 register ((void)(I2Cx->SR2)). + * - SB (Start Bit) is cleared software sequence: a read operation to I2C_SR1 + * register (I2C_GetFlagStatus()) followed by a write operation to I2C_DR + * register (I2C_SendData()). + * @retval None + */ +void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG) +{ + uint32_t flagpos = 0; + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG)); + /* Get the I2C flag position */ + flagpos = I2C_FLAG & FLAG_Mask; + /* Clear the selected I2C flag */ + I2Cx->SR1 = (uint16_t)~flagpos; +} + +/** + * @brief Checks whether the specified I2C interrupt has occurred or not. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_IT: specifies the interrupt source to check. + * This parameter can be one of the following values: + * @arg I2C_IT_SMBALERT: SMBus Alert flag + * @arg I2C_IT_TIMEOUT: Timeout or Tlow error flag + * @arg I2C_IT_PECERR: PEC error in reception flag + * @arg I2C_IT_OVR: Overrun/Underrun flag (Slave mode) + * @arg I2C_IT_AF: Acknowledge failure flag + * @arg I2C_IT_ARLO: Arbitration lost flag (Master mode) + * @arg I2C_IT_BERR: Bus error flag + * @arg I2C_IT_TXE: Data register empty flag (Transmitter) + * @arg I2C_IT_RXNE: Data register not empty (Receiver) flag + * @arg I2C_IT_STOPF: Stop detection flag (Slave mode) + * @arg I2C_IT_ADD10: 10-bit header sent flag (Master mode) + * @arg I2C_IT_BTF: Byte transfer finished flag + * @arg I2C_IT_ADDR: Address sent flag (Master mode) "ADSL" + * Address matched flag (Slave mode)"ENDAD" + * @arg I2C_IT_SB: Start bit flag (Master mode) + * @retval The new state of I2C_IT (SET or RESET). + */ +ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT) +{ + ITStatus bitstatus = RESET; + uint32_t enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_GET_IT(I2C_IT)); + + /* Check if the interrupt source is enabled or not */ + enablestatus = (uint32_t)(((I2C_IT & ITEN_Mask) >> 16) & (I2Cx->CR2)) ; + + /* Get bit[23:0] of the flag */ + I2C_IT &= FLAG_Mask; + + /* Check the status of the specified I2C flag */ + if (((I2Cx->SR1 & I2C_IT) != (uint32_t)RESET) && enablestatus) + { + /* I2C_IT is set */ + bitstatus = SET; + } + else + { + /* I2C_IT is reset */ + bitstatus = RESET; + } + /* Return the I2C_IT status */ + return bitstatus; +} + +/** + * @brief Clears the I2Cxs interrupt pending bits. + * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral. + * @param I2C_IT: specifies the interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg I2C_IT_SMBALERT: SMBus Alert interrupt + * @arg I2C_IT_TIMEOUT: Timeout or Tlow error interrupt + * @arg I2C_IT_PECERR: PEC error in reception interrupt + * @arg I2C_IT_OVR: Overrun/Underrun interrupt (Slave mode) + * @arg I2C_IT_AF: Acknowledge failure interrupt + * @arg I2C_IT_ARLO: Arbitration lost interrupt (Master mode) + * @arg I2C_IT_BERR: Bus error interrupt + * + * @note + * - STOPF (STOP detection) is cleared by software sequence: a read operation + * to I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to + * I2C_CR1 register (I2C_Cmd() to re-enable the I2C peripheral). + * - ADD10 (10-bit header sent) is cleared by software sequence: a read + * operation to I2C_SR1 (I2C_GetITStatus()) followed by writing the second + * byte of the address in I2C_DR register. + * - BTF (Byte Transfer Finished) is cleared by software sequence: a read + * operation to I2C_SR1 register (I2C_GetITStatus()) followed by a + * read/write to I2C_DR register (I2C_SendData()). + * - ADDR (Address sent) is cleared by software sequence: a read operation to + * I2C_SR1 register (I2C_GetITStatus()) followed by a read operation to + * I2C_SR2 register ((void)(I2Cx->SR2)). + * - SB (Start Bit) is cleared by software sequence: a read operation to + * I2C_SR1 register (I2C_GetITStatus()) followed by a write operation to + * I2C_DR register (I2C_SendData()). + * @retval None + */ +void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT) +{ + uint32_t flagpos = 0; + /* Check the parameters */ + assert_param(IS_I2C_ALL_PERIPH(I2Cx)); + assert_param(IS_I2C_CLEAR_IT(I2C_IT)); + /* Get the I2C flag position */ + flagpos = I2C_IT & FLAG_Mask; + /* Clear the selected I2C flag */ + I2Cx->SR1 = (uint16_t)~flagpos; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c index c7cbf7ec..9d3b0e85 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_iwdg.c @@ -1,190 +1,190 @@ -/** - ****************************************************************************** - * @file stm32f10x_iwdg.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the IWDG firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_iwdg.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup IWDG - * @brief IWDG driver modules - * @{ - */ - -/** @defgroup IWDG_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_Defines - * @{ - */ - -/* ---------------------- IWDG registers bit mask ----------------------------*/ - -/* KR register bit mask */ -#define KR_KEY_Reload ((uint16_t)0xAAAA) -#define KR_KEY_Enable ((uint16_t)0xCCCC) - -/** - * @} - */ - -/** @defgroup IWDG_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup IWDG_Private_Functions - * @{ - */ - -/** - * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. - * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. - * This parameter can be one of the following values: - * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers - * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers - * @retval None - */ -void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) -{ - /* Check the parameters */ - assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); - IWDG->KR = IWDG_WriteAccess; -} - -/** - * @brief Sets IWDG Prescaler value. - * @param IWDG_Prescaler: specifies the IWDG Prescaler value. - * This parameter can be one of the following values: - * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 - * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 - * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 - * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 - * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 - * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 - * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 - * @retval None - */ -void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) -{ - /* Check the parameters */ - assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); - IWDG->PR = IWDG_Prescaler; -} - -/** - * @brief Sets IWDG Reload value. - * @param Reload: specifies the IWDG Reload value. - * This parameter must be a number between 0 and 0x0FFF. - * @retval None - */ -void IWDG_SetReload(uint16_t Reload) -{ - /* Check the parameters */ - assert_param(IS_IWDG_RELOAD(Reload)); - IWDG->RLR = Reload; -} - -/** - * @brief Reloads IWDG counter with value defined in the reload register - * (write access to IWDG_PR and IWDG_RLR registers disabled). - * @param None - * @retval None - */ -void IWDG_ReloadCounter(void) -{ - IWDG->KR = KR_KEY_Reload; -} - -/** - * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). - * @param None - * @retval None - */ -void IWDG_Enable(void) -{ - IWDG->KR = KR_KEY_Enable; -} - -/** - * @brief Checks whether the specified IWDG flag is set or not. - * @param IWDG_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg IWDG_FLAG_PVU: Prescaler Value Update on going - * @arg IWDG_FLAG_RVU: Reload Value Update on going - * @retval The new state of IWDG_FLAG (SET or RESET). - */ -FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_IWDG_FLAG(IWDG_FLAG)); - if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_iwdg.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the IWDG firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_iwdg.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup IWDG + * @brief IWDG driver modules + * @{ + */ + +/** @defgroup IWDG_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_Defines + * @{ + */ + +/* ---------------------- IWDG registers bit mask ----------------------------*/ + +/* KR register bit mask */ +#define KR_KEY_Reload ((uint16_t)0xAAAA) +#define KR_KEY_Enable ((uint16_t)0xCCCC) + +/** + * @} + */ + +/** @defgroup IWDG_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup IWDG_Private_Functions + * @{ + */ + +/** + * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers. + * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers. + * This parameter can be one of the following values: + * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers + * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers + * @retval None + */ +void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess) +{ + /* Check the parameters */ + assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); + IWDG->KR = IWDG_WriteAccess; +} + +/** + * @brief Sets IWDG Prescaler value. + * @param IWDG_Prescaler: specifies the IWDG Prescaler value. + * This parameter can be one of the following values: + * @arg IWDG_Prescaler_4: IWDG prescaler set to 4 + * @arg IWDG_Prescaler_8: IWDG prescaler set to 8 + * @arg IWDG_Prescaler_16: IWDG prescaler set to 16 + * @arg IWDG_Prescaler_32: IWDG prescaler set to 32 + * @arg IWDG_Prescaler_64: IWDG prescaler set to 64 + * @arg IWDG_Prescaler_128: IWDG prescaler set to 128 + * @arg IWDG_Prescaler_256: IWDG prescaler set to 256 + * @retval None + */ +void IWDG_SetPrescaler(uint8_t IWDG_Prescaler) +{ + /* Check the parameters */ + assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); + IWDG->PR = IWDG_Prescaler; +} + +/** + * @brief Sets IWDG Reload value. + * @param Reload: specifies the IWDG Reload value. + * This parameter must be a number between 0 and 0x0FFF. + * @retval None + */ +void IWDG_SetReload(uint16_t Reload) +{ + /* Check the parameters */ + assert_param(IS_IWDG_RELOAD(Reload)); + IWDG->RLR = Reload; +} + +/** + * @brief Reloads IWDG counter with value defined in the reload register + * (write access to IWDG_PR and IWDG_RLR registers disabled). + * @param None + * @retval None + */ +void IWDG_ReloadCounter(void) +{ + IWDG->KR = KR_KEY_Reload; +} + +/** + * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled). + * @param None + * @retval None + */ +void IWDG_Enable(void) +{ + IWDG->KR = KR_KEY_Enable; +} + +/** + * @brief Checks whether the specified IWDG flag is set or not. + * @param IWDG_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg IWDG_FLAG_PVU: Prescaler Value Update on going + * @arg IWDG_FLAG_RVU: Reload Value Update on going + * @retval The new state of IWDG_FLAG (SET or RESET). + */ +FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_IWDG_FLAG(IWDG_FLAG)); + if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the flag status */ + return bitstatus; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c index a5a5c572..147bf0f8 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_pwr.c @@ -1,307 +1,307 @@ -/** - ****************************************************************************** - * @file stm32f10x_pwr.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the PWR firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_pwr.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup PWR - * @brief PWR driver modules - * @{ - */ - -/** @defgroup PWR_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_Defines - * @{ - */ - -/* --------- PWR registers bit address in the alias region ---------- */ -#define PWR_OFFSET (PWR_BASE - PERIPH_BASE) - -/* --- CR Register ---*/ - -/* Alias word address of DBP bit */ -#define CR_OFFSET (PWR_OFFSET + 0x00) -#define DBP_BitNumber 0x08 -#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) - -/* Alias word address of PVDE bit */ -#define PVDE_BitNumber 0x04 -#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of EWUP bit */ -#define CSR_OFFSET (PWR_OFFSET + 0x04) -#define EWUP_BitNumber 0x08 -#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4)) - -/* ------------------ PWR registers bit mask ------------------------ */ - -/* CR register bit mask */ -#define CR_DS_MASK ((uint32_t)0xFFFFFFFC) -#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F) - - -/** - * @} - */ - -/** @defgroup PWR_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup PWR_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the PWR peripheral registers to their default reset values. - * @param None - * @retval None - */ -void PWR_DeInit(void) -{ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); -} - -/** - * @brief Enables or disables access to the RTC and backup registers. - * @param NewState: new state of the access to the RTC and backup registers. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void PWR_BackupAccessCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the Power Voltage Detector(PVD). - * @param NewState: new state of the PVD. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void PWR_PVDCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; -} - -/** - * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). - * @param PWR_PVDLevel: specifies the PVD detection level - * This parameter can be one of the following values: - * @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V - * @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V - * @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V - * @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V - * @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V - * @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V - * @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V - * @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V - * @retval None - */ -void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); - tmpreg = PWR->CR; - /* Clear PLS[7:5] bits */ - tmpreg &= CR_PLS_MASK; - /* Set PLS[7:5] bits according to PWR_PVDLevel value */ - tmpreg |= PWR_PVDLevel; - /* Store the new value */ - PWR->CR = tmpreg; -} - -/** - * @brief Enables or disables the WakeUp Pin functionality. - * @param NewState: new state of the WakeUp Pin functionality. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void PWR_WakeUpPinCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState; -} - -/** - * @brief Enters STOP mode. - * @param PWR_Regulator: specifies the regulator state in STOP mode. - * This parameter can be one of the following values: - * @arg PWR_Regulator_ON: STOP mode with regulator ON - * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode - * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. - * This parameter can be one of the following values: - * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction - * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction - * @retval None - */ -void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_PWR_REGULATOR(PWR_Regulator)); - assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); - - /* Select the regulator state in STOP mode ---------------------------------*/ - tmpreg = PWR->CR; - /* Clear PDDS and LPDS bits */ - tmpreg &= CR_DS_MASK; - /* Set LPDS bit according to PWR_Regulator value */ - tmpreg |= PWR_Regulator; - /* Store the new value */ - PWR->CR = tmpreg; - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SCB->SCR |= SCB_SCR_SLEEPDEEP; - - /* Select STOP mode entry --------------------------------------------------*/ - if(PWR_STOPEntry == PWR_STOPEntry_WFI) - { - /* Request Wait For Interrupt */ - __WFI(); - } - else - { - /* Request Wait For Event */ - __WFE(); - } - - /* Reset SLEEPDEEP bit of Cortex System Control Register */ - SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); -} - -/** - * @brief Enters STANDBY mode. - * @param None - * @retval None - */ -void PWR_EnterSTANDBYMode(void) -{ - /* Clear Wake-up flag */ - PWR->CR |= PWR_CR_CWUF; - /* Select STANDBY mode */ - PWR->CR |= PWR_CR_PDDS; - /* Set SLEEPDEEP bit of Cortex System Control Register */ - SCB->SCR |= SCB_SCR_SLEEPDEEP; -/* This option is used to ensure that store operations are completed */ -#if defined ( __CC_ARM ) - __force_stores(); -#endif - /* Request Wait For Interrupt */ - __WFI(); -} - -/** - * @brief Checks whether the specified PWR flag is set or not. - * @param PWR_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg PWR_FLAG_WU: Wake Up flag - * @arg PWR_FLAG_SB: StandBy flag - * @arg PWR_FLAG_PVDO: PVD Output - * @retval The new state of PWR_FLAG (SET or RESET). - */ -FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); - - if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the PWR's pending flags. - * @param PWR_FLAG: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg PWR_FLAG_WU: Wake Up flag - * @arg PWR_FLAG_SB: StandBy flag - * @retval None - */ -void PWR_ClearFlag(uint32_t PWR_FLAG) -{ - /* Check the parameters */ - assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); - - PWR->CR |= PWR_FLAG << 2; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_pwr.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the PWR firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup PWR + * @brief PWR driver modules + * @{ + */ + +/** @defgroup PWR_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_Defines + * @{ + */ + +/* --------- PWR registers bit address in the alias region ---------- */ +#define PWR_OFFSET (PWR_BASE - PERIPH_BASE) + +/* --- CR Register ---*/ + +/* Alias word address of DBP bit */ +#define CR_OFFSET (PWR_OFFSET + 0x00) +#define DBP_BitNumber 0x08 +#define CR_DBP_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4)) + +/* Alias word address of PVDE bit */ +#define PVDE_BitNumber 0x04 +#define CR_PVDE_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of EWUP bit */ +#define CSR_OFFSET (PWR_OFFSET + 0x04) +#define EWUP_BitNumber 0x08 +#define CSR_EWUP_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (EWUP_BitNumber * 4)) + +/* ------------------ PWR registers bit mask ------------------------ */ + +/* CR register bit mask */ +#define CR_DS_MASK ((uint32_t)0xFFFFFFFC) +#define CR_PLS_MASK ((uint32_t)0xFFFFFF1F) + + +/** + * @} + */ + +/** @defgroup PWR_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup PWR_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the PWR peripheral registers to their default reset values. + * @param None + * @retval None + */ +void PWR_DeInit(void) +{ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); +} + +/** + * @brief Enables or disables access to the RTC and backup registers. + * @param NewState: new state of the access to the RTC and backup registers. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void PWR_BackupAccessCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the Power Voltage Detector(PVD). + * @param NewState: new state of the PVD. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void PWR_PVDCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState; +} + +/** + * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + * @param PWR_PVDLevel: specifies the PVD detection level + * This parameter can be one of the following values: + * @arg PWR_PVDLevel_2V2: PVD detection level set to 2.2V + * @arg PWR_PVDLevel_2V3: PVD detection level set to 2.3V + * @arg PWR_PVDLevel_2V4: PVD detection level set to 2.4V + * @arg PWR_PVDLevel_2V5: PVD detection level set to 2.5V + * @arg PWR_PVDLevel_2V6: PVD detection level set to 2.6V + * @arg PWR_PVDLevel_2V7: PVD detection level set to 2.7V + * @arg PWR_PVDLevel_2V8: PVD detection level set to 2.8V + * @arg PWR_PVDLevel_2V9: PVD detection level set to 2.9V + * @retval None + */ +void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel)); + tmpreg = PWR->CR; + /* Clear PLS[7:5] bits */ + tmpreg &= CR_PLS_MASK; + /* Set PLS[7:5] bits according to PWR_PVDLevel value */ + tmpreg |= PWR_PVDLevel; + /* Store the new value */ + PWR->CR = tmpreg; +} + +/** + * @brief Enables or disables the WakeUp Pin functionality. + * @param NewState: new state of the WakeUp Pin functionality. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void PWR_WakeUpPinCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CSR_EWUP_BB = (uint32_t)NewState; +} + +/** + * @brief Enters STOP mode. + * @param PWR_Regulator: specifies the regulator state in STOP mode. + * This parameter can be one of the following values: + * @arg PWR_Regulator_ON: STOP mode with regulator ON + * @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode + * @param PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. + * This parameter can be one of the following values: + * @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction + * @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction + * @retval None + */ +void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_PWR_REGULATOR(PWR_Regulator)); + assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry)); + + /* Select the regulator state in STOP mode ---------------------------------*/ + tmpreg = PWR->CR; + /* Clear PDDS and LPDS bits */ + tmpreg &= CR_DS_MASK; + /* Set LPDS bit according to PWR_Regulator value */ + tmpreg |= PWR_Regulator; + /* Store the new value */ + PWR->CR = tmpreg; + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SCB->SCR |= SCB_SCR_SLEEPDEEP; + + /* Select STOP mode entry --------------------------------------------------*/ + if(PWR_STOPEntry == PWR_STOPEntry_WFI) + { + /* Request Wait For Interrupt */ + __WFI(); + } + else + { + /* Request Wait For Event */ + __WFE(); + } + + /* Reset SLEEPDEEP bit of Cortex System Control Register */ + SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); +} + +/** + * @brief Enters STANDBY mode. + * @param None + * @retval None + */ +void PWR_EnterSTANDBYMode(void) +{ + /* Clear Wake-up flag */ + PWR->CR |= PWR_CR_CWUF; + /* Select STANDBY mode */ + PWR->CR |= PWR_CR_PDDS; + /* Set SLEEPDEEP bit of Cortex System Control Register */ + SCB->SCR |= SCB_SCR_SLEEPDEEP; +/* This option is used to ensure that store operations are completed */ +#if defined ( __CC_ARM ) + __force_stores(); +#endif + /* Request Wait For Interrupt */ + __WFI(); +} + +/** + * @brief Checks whether the specified PWR flag is set or not. + * @param PWR_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg PWR_FLAG_WU: Wake Up flag + * @arg PWR_FLAG_SB: StandBy flag + * @arg PWR_FLAG_PVDO: PVD Output + * @retval The new state of PWR_FLAG (SET or RESET). + */ +FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_PWR_GET_FLAG(PWR_FLAG)); + + if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + /* Return the flag status */ + return bitstatus; +} + +/** + * @brief Clears the PWR's pending flags. + * @param PWR_FLAG: specifies the flag to clear. + * This parameter can be one of the following values: + * @arg PWR_FLAG_WU: Wake Up flag + * @arg PWR_FLAG_SB: StandBy flag + * @retval None + */ +void PWR_ClearFlag(uint32_t PWR_FLAG) +{ + /* Check the parameters */ + assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG)); + + PWR->CR |= PWR_FLAG << 2; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c index a29034bd..4b2ec1f1 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rcc.c @@ -1,1470 +1,1470 @@ -/** - ****************************************************************************** - * @file stm32f10x_rcc.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the RCC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup RCC - * @brief RCC driver modules - * @{ - */ - -/** @defgroup RCC_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Defines - * @{ - */ - -/* ------------ RCC registers bit address in the alias region ----------- */ -#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) - -/* --- CR Register ---*/ - -/* Alias word address of HSION bit */ -#define CR_OFFSET (RCC_OFFSET + 0x00) -#define HSION_BitNumber 0x00 -#define CR_HSION_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BitNumber * 4)) - -/* Alias word address of PLLON bit */ -#define PLLON_BitNumber 0x18 -#define CR_PLLON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BitNumber * 4)) - -#ifdef STM32F10X_CL - /* Alias word address of PLL2ON bit */ - #define PLL2ON_BitNumber 0x1A - #define CR_PLL2ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL2ON_BitNumber * 4)) - - /* Alias word address of PLL3ON bit */ - #define PLL3ON_BitNumber 0x1C - #define CR_PLL3ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL3ON_BitNumber * 4)) -#endif /* STM32F10X_CL */ - -/* Alias word address of CSSON bit */ -#define CSSON_BitNumber 0x13 -#define CR_CSSON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BitNumber * 4)) - -/* --- CFGR Register ---*/ - -/* Alias word address of USBPRE bit */ -#define CFGR_OFFSET (RCC_OFFSET + 0x04) - -#ifndef STM32F10X_CL - #define USBPRE_BitNumber 0x16 - #define CFGR_USBPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BitNumber * 4)) -#else - #define OTGFSPRE_BitNumber 0x16 - #define CFGR_OTGFSPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (OTGFSPRE_BitNumber * 4)) -#endif /* STM32F10X_CL */ - -/* --- BDCR Register ---*/ - -/* Alias word address of RTCEN bit */ -#define BDCR_OFFSET (RCC_OFFSET + 0x20) -#define RTCEN_BitNumber 0x0F -#define BDCR_RTCEN_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BitNumber * 4)) - -/* Alias word address of BDRST bit */ -#define BDRST_BitNumber 0x10 -#define BDCR_BDRST_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BitNumber * 4)) - -/* --- CSR Register ---*/ - -/* Alias word address of LSION bit */ -#define CSR_OFFSET (RCC_OFFSET + 0x24) -#define LSION_BitNumber 0x00 -#define CSR_LSION_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BitNumber * 4)) - -#ifdef STM32F10X_CL -/* --- CFGR2 Register ---*/ - - /* Alias word address of I2S2SRC bit */ - #define CFGR2_OFFSET (RCC_OFFSET + 0x2C) - #define I2S2SRC_BitNumber 0x11 - #define CFGR2_I2S2SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S2SRC_BitNumber * 4)) - - /* Alias word address of I2S3SRC bit */ - #define I2S3SRC_BitNumber 0x12 - #define CFGR2_I2S3SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S3SRC_BitNumber * 4)) -#endif /* STM32F10X_CL */ - -/* ---------------------- RCC registers bit mask ------------------------ */ - -/* CR register bit mask */ -#define CR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF) -#define CR_HSEBYP_Set ((uint32_t)0x00040000) -#define CR_HSEON_Reset ((uint32_t)0xFFFEFFFF) -#define CR_HSEON_Set ((uint32_t)0x00010000) -#define CR_HSITRIM_Mask ((uint32_t)0xFFFFFF07) - -/* CFGR register bit mask */ -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) - #define CFGR_PLL_Mask ((uint32_t)0xFFC2FFFF) -#else - #define CFGR_PLL_Mask ((uint32_t)0xFFC0FFFF) -#endif /* STM32F10X_CL */ - -#define CFGR_PLLMull_Mask ((uint32_t)0x003C0000) -#define CFGR_PLLSRC_Mask ((uint32_t)0x00010000) -#define CFGR_PLLXTPRE_Mask ((uint32_t)0x00020000) -#define CFGR_SWS_Mask ((uint32_t)0x0000000C) -#define CFGR_SW_Mask ((uint32_t)0xFFFFFFFC) -#define CFGR_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F) -#define CFGR_HPRE_Set_Mask ((uint32_t)0x000000F0) -#define CFGR_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF) -#define CFGR_PPRE1_Set_Mask ((uint32_t)0x00000700) -#define CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF) -#define CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800) -#define CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF) -#define CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000) - -/* CSR register bit mask */ -#define CSR_RMVF_Set ((uint32_t)0x01000000) - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) -/* CFGR2 register bit mask */ - #define CFGR2_PREDIV1SRC ((uint32_t)0x00010000) - #define CFGR2_PREDIV1 ((uint32_t)0x0000000F) -#endif -#ifdef STM32F10X_CL - #define CFGR2_PREDIV2 ((uint32_t)0x000000F0) - #define CFGR2_PLL2MUL ((uint32_t)0x00000F00) - #define CFGR2_PLL3MUL ((uint32_t)0x0000F000) -#endif /* STM32F10X_CL */ - -/* RCC Flag Mask */ -#define FLAG_Mask ((uint8_t)0x1F) - -/* CIR register byte 2 (Bits[15:8]) base address */ -#define CIR_BYTE2_ADDRESS ((uint32_t)0x40021009) - -/* CIR register byte 3 (Bits[23:16]) base address */ -#define CIR_BYTE3_ADDRESS ((uint32_t)0x4002100A) - -/* CFGR register byte 4 (Bits[31:24]) base address */ -#define CFGR_BYTE4_ADDRESS ((uint32_t)0x40021007) - -/* BDCR register base address */ -#define BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET) - -/** - * @} - */ - -/** @defgroup RCC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Variables - * @{ - */ - -static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; -static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8}; - -/** - * @} - */ - -/** @defgroup RCC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup RCC_Private_Functions - * @{ - */ - -/** - * @brief Resets the RCC clock configuration to the default reset state. - * @param None - * @retval None - */ -void RCC_DeInit(void) -{ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ -#ifndef STM32F10X_CL - RCC->CFGR &= (uint32_t)0xF8FF0000; -#else - RCC->CFGR &= (uint32_t)0xF0FF0000; -#endif /* STM32F10X_CL */ - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ - RCC->CFGR &= (uint32_t)0xFF80FFFF; - -#ifdef STM32F10X_CL - /* Reset PLL2ON and PLL3ON bits */ - RCC->CR &= (uint32_t)0xEBFFFFFF; - - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x00FF0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; - - /* Reset CFGR2 register */ - RCC->CFGR2 = 0x00000000; -#else - /* Disable all interrupts and clear pending bits */ - RCC->CIR = 0x009F0000; -#endif /* STM32F10X_CL */ - -} - -/** - * @brief Configures the External High Speed oscillator (HSE). - * @note HSE can not be stopped if it is used directly or through the PLL as system clock. - * @param RCC_HSE: specifies the new state of the HSE. - * This parameter can be one of the following values: - * @arg RCC_HSE_OFF: HSE oscillator OFF - * @arg RCC_HSE_ON: HSE oscillator ON - * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock - * @retval None - */ -void RCC_HSEConfig(uint32_t RCC_HSE) -{ - /* Check the parameters */ - assert_param(IS_RCC_HSE(RCC_HSE)); - /* Reset HSEON and HSEBYP bits before configuring the HSE ------------------*/ - /* Reset HSEON bit */ - RCC->CR &= CR_HSEON_Reset; - /* Reset HSEBYP bit */ - RCC->CR &= CR_HSEBYP_Reset; - /* Configure HSE (RCC_HSE_OFF is already covered by the code section above) */ - switch(RCC_HSE) - { - case RCC_HSE_ON: - /* Set HSEON bit */ - RCC->CR |= CR_HSEON_Set; - break; - - case RCC_HSE_Bypass: - /* Set HSEBYP and HSEON bits */ - RCC->CR |= CR_HSEBYP_Set | CR_HSEON_Set; - break; - - default: - break; - } -} - -/** - * @brief Waits for HSE start-up. - * @param None - * @retval An ErrorStatus enumuration value: - * - SUCCESS: HSE oscillator is stable and ready to use - * - ERROR: HSE oscillator not yet ready - */ -ErrorStatus RCC_WaitForHSEStartUp(void) -{ - __IO uint32_t StartUpCounter = 0; - ErrorStatus status = ERROR; - FlagStatus HSEStatus = RESET; - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY); - StartUpCounter++; - } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET)); - - if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET) - { - status = SUCCESS; - } - else - { - status = ERROR; - } - return (status); -} - -/** - * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value. - * @param HSICalibrationValue: specifies the calibration trimming value. - * This parameter must be a number between 0 and 0x1F. - * @retval None - */ -void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_CALIBRATION_VALUE(HSICalibrationValue)); - tmpreg = RCC->CR; - /* Clear HSITRIM[4:0] bits */ - tmpreg &= CR_HSITRIM_Mask; - /* Set the HSITRIM[4:0] bits according to HSICalibrationValue value */ - tmpreg |= (uint32_t)HSICalibrationValue << 3; - /* Store the new value */ - RCC->CR = tmpreg; -} - -/** - * @brief Enables or disables the Internal High Speed oscillator (HSI). - * @note HSI can not be stopped if it is used directly or through the PLL as system clock. - * @param NewState: new state of the HSI. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_HSICmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_HSION_BB = (uint32_t)NewState; -} - -/** - * @brief Configures the PLL clock source and multiplication factor. - * @note This function must be used only when the PLL is disabled. - * @param RCC_PLLSource: specifies the PLL entry clock source. - * For @b STM32_Connectivity_line_devices or @b STM32_Value_line_devices, - * this parameter can be one of the following values: - * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry - * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry - * @arg RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL clock entry - * @arg RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 selected as PLL clock entry - * @param RCC_PLLMul: specifies the PLL multiplication factor. - * For @b STM32_Connectivity_line_devices, this parameter can be RCC_PLLMul_x where x:{[4,9], 6_5} - * For @b other_STM32_devices, this parameter can be RCC_PLLMul_x where x:[2,16] - * @retval None - */ -void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource)); - assert_param(IS_RCC_PLL_MUL(RCC_PLLMul)); - - tmpreg = RCC->CFGR; - /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ - tmpreg &= CFGR_PLL_Mask; - /* Set the PLL configuration bits */ - tmpreg |= RCC_PLLSource | RCC_PLLMul; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Enables or disables the PLL. - * @note The PLL can not be disabled if it is used as system clock. - * @param NewState: new state of the PLL. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_PLLCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CR_PLLON_BB = (uint32_t)NewState; -} - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) -/** - * @brief Configures the PREDIV1 division factor. - * @note - * - This function must be used only when the PLL is disabled. - * - This function applies only to STM32 Connectivity line and Value line - * devices. - * @param RCC_PREDIV1_Source: specifies the PREDIV1 clock source. - * This parameter can be one of the following values: - * @arg RCC_PREDIV1_Source_HSE: HSE selected as PREDIV1 clock - * @arg RCC_PREDIV1_Source_PLL2: PLL2 selected as PREDIV1 clock - * @note - * For @b STM32_Value_line_devices this parameter is always RCC_PREDIV1_Source_HSE - * @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor. - * This parameter can be RCC_PREDIV1_Divx where x:[1,16] - * @retval None - */ -void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PREDIV1_SOURCE(RCC_PREDIV1_Source)); - assert_param(IS_RCC_PREDIV1(RCC_PREDIV1_Div)); - - tmpreg = RCC->CFGR2; - /* Clear PREDIV1[3:0] and PREDIV1SRC bits */ - tmpreg &= ~(CFGR2_PREDIV1 | CFGR2_PREDIV1SRC); - /* Set the PREDIV1 clock source and division factor */ - tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} -#endif - -#ifdef STM32F10X_CL -/** - * @brief Configures the PREDIV2 division factor. - * @note - * - This function must be used only when both PLL2 and PLL3 are disabled. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_PREDIV2_Div: specifies the PREDIV2 clock division factor. - * This parameter can be RCC_PREDIV2_Divx where x:[1,16] - * @retval None - */ -void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PREDIV2(RCC_PREDIV2_Div)); - - tmpreg = RCC->CFGR2; - /* Clear PREDIV2[3:0] bits */ - tmpreg &= ~CFGR2_PREDIV2; - /* Set the PREDIV2 division factor */ - tmpreg |= RCC_PREDIV2_Div; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} - -/** - * @brief Configures the PLL2 multiplication factor. - * @note - * - This function must be used only when the PLL2 is disabled. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_PLL2Mul: specifies the PLL2 multiplication factor. - * This parameter can be RCC_PLL2Mul_x where x:{[8,14], 16, 20} - * @retval None - */ -void RCC_PLL2Config(uint32_t RCC_PLL2Mul) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PLL2_MUL(RCC_PLL2Mul)); - - tmpreg = RCC->CFGR2; - /* Clear PLL2Mul[3:0] bits */ - tmpreg &= ~CFGR2_PLL2MUL; - /* Set the PLL2 configuration bits */ - tmpreg |= RCC_PLL2Mul; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} - - -/** - * @brief Enables or disables the PLL2. - * @note - * - The PLL2 can not be disabled if it is used indirectly as system clock - * (i.e. it is used as PLL clock entry that is used as System clock). - * - This function applies only to STM32 Connectivity line devices. - * @param NewState: new state of the PLL2. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_PLL2Cmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CR_PLL2ON_BB = (uint32_t)NewState; -} - - -/** - * @brief Configures the PLL3 multiplication factor. - * @note - * - This function must be used only when the PLL3 is disabled. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_PLL3Mul: specifies the PLL3 multiplication factor. - * This parameter can be RCC_PLL3Mul_x where x:{[8,14], 16, 20} - * @retval None - */ -void RCC_PLL3Config(uint32_t RCC_PLL3Mul) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_RCC_PLL3_MUL(RCC_PLL3Mul)); - - tmpreg = RCC->CFGR2; - /* Clear PLL3Mul[3:0] bits */ - tmpreg &= ~CFGR2_PLL3MUL; - /* Set the PLL3 configuration bits */ - tmpreg |= RCC_PLL3Mul; - /* Store the new value */ - RCC->CFGR2 = tmpreg; -} - - -/** - * @brief Enables or disables the PLL3. - * @note This function applies only to STM32 Connectivity line devices. - * @param NewState: new state of the PLL3. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_PLL3Cmd(FunctionalState NewState) -{ - /* Check the parameters */ - - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_PLL3ON_BB = (uint32_t)NewState; -} -#endif /* STM32F10X_CL */ - -/** - * @brief Configures the system clock (SYSCLK). - * @param RCC_SYSCLKSource: specifies the clock source used as system clock. - * This parameter can be one of the following values: - * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock - * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock - * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock - * @retval None - */ -void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_SYSCLK_SOURCE(RCC_SYSCLKSource)); - tmpreg = RCC->CFGR; - /* Clear SW[1:0] bits */ - tmpreg &= CFGR_SW_Mask; - /* Set SW[1:0] bits according to RCC_SYSCLKSource value */ - tmpreg |= RCC_SYSCLKSource; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Returns the clock source used as system clock. - * @param None - * @retval The clock source used as system clock. The returned value can - * be one of the following: - * - 0x00: HSI used as system clock - * - 0x04: HSE used as system clock - * - 0x08: PLL used as system clock - */ -uint8_t RCC_GetSYSCLKSource(void) -{ - return ((uint8_t)(RCC->CFGR & CFGR_SWS_Mask)); -} - -/** - * @brief Configures the AHB clock (HCLK). - * @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from - * the system clock (SYSCLK). - * This parameter can be one of the following values: - * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK - * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2 - * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4 - * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8 - * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16 - * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64 - * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128 - * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256 - * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512 - * @retval None - */ -void RCC_HCLKConfig(uint32_t RCC_SYSCLK) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_HCLK(RCC_SYSCLK)); - tmpreg = RCC->CFGR; - /* Clear HPRE[3:0] bits */ - tmpreg &= CFGR_HPRE_Reset_Mask; - /* Set HPRE[3:0] bits according to RCC_SYSCLK value */ - tmpreg |= RCC_SYSCLK; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Configures the Low Speed APB clock (PCLK1). - * @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from - * the AHB clock (HCLK). - * This parameter can be one of the following values: - * @arg RCC_HCLK_Div1: APB1 clock = HCLK - * @arg RCC_HCLK_Div2: APB1 clock = HCLK/2 - * @arg RCC_HCLK_Div4: APB1 clock = HCLK/4 - * @arg RCC_HCLK_Div8: APB1 clock = HCLK/8 - * @arg RCC_HCLK_Div16: APB1 clock = HCLK/16 - * @retval None - */ -void RCC_PCLK1Config(uint32_t RCC_HCLK) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_PCLK(RCC_HCLK)); - tmpreg = RCC->CFGR; - /* Clear PPRE1[2:0] bits */ - tmpreg &= CFGR_PPRE1_Reset_Mask; - /* Set PPRE1[2:0] bits according to RCC_HCLK value */ - tmpreg |= RCC_HCLK; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Configures the High Speed APB clock (PCLK2). - * @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from - * the AHB clock (HCLK). - * This parameter can be one of the following values: - * @arg RCC_HCLK_Div1: APB2 clock = HCLK - * @arg RCC_HCLK_Div2: APB2 clock = HCLK/2 - * @arg RCC_HCLK_Div4: APB2 clock = HCLK/4 - * @arg RCC_HCLK_Div8: APB2 clock = HCLK/8 - * @arg RCC_HCLK_Div16: APB2 clock = HCLK/16 - * @retval None - */ -void RCC_PCLK2Config(uint32_t RCC_HCLK) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_PCLK(RCC_HCLK)); - tmpreg = RCC->CFGR; - /* Clear PPRE2[2:0] bits */ - tmpreg &= CFGR_PPRE2_Reset_Mask; - /* Set PPRE2[2:0] bits according to RCC_HCLK value */ - tmpreg |= RCC_HCLK << 3; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -/** - * @brief Enables or disables the specified RCC interrupts. - * @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled. - * - * For @b STM32_Connectivity_line_devices, this parameter can be any combination - * of the following values - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt - * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt - * - * For @b other_STM32_devices, this parameter can be any combination of the - * following values - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * - * @param NewState: new state of the specified RCC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_IT(RCC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Perform Byte access to RCC_CIR bits to enable the selected interrupts */ - *(__IO uint8_t *) CIR_BYTE2_ADDRESS |= RCC_IT; - } - else - { - /* Perform Byte access to RCC_CIR bits to disable the selected interrupts */ - *(__IO uint8_t *) CIR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT; - } -} - -#ifndef STM32F10X_CL -/** - * @brief Configures the USB clock (USBCLK). - * @param RCC_USBCLKSource: specifies the USB clock source. This clock is - * derived from the PLL output. - * This parameter can be one of the following values: - * @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB - * clock source - * @arg RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source - * @retval None - */ -void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_USBCLK_SOURCE(RCC_USBCLKSource)); - - *(__IO uint32_t *) CFGR_USBPRE_BB = RCC_USBCLKSource; -} -#else -/** - * @brief Configures the USB OTG FS clock (OTGFSCLK). - * This function applies only to STM32 Connectivity line devices. - * @param RCC_OTGFSCLKSource: specifies the USB OTG FS clock source. - * This clock is derived from the PLL output. - * This parameter can be one of the following values: - * @arg RCC_OTGFSCLKSource_PLLVCO_Div3: PLL VCO clock divided by 2 selected as USB OTG FS clock source - * @arg RCC_OTGFSCLKSource_PLLVCO_Div2: PLL VCO clock divided by 2 selected as USB OTG FS clock source - * @retval None - */ -void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_OTGFSCLK_SOURCE(RCC_OTGFSCLKSource)); - - *(__IO uint32_t *) CFGR_OTGFSPRE_BB = RCC_OTGFSCLKSource; -} -#endif /* STM32F10X_CL */ - -/** - * @brief Configures the ADC clock (ADCCLK). - * @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from - * the APB2 clock (PCLK2). - * This parameter can be one of the following values: - * @arg RCC_PCLK2_Div2: ADC clock = PCLK2/2 - * @arg RCC_PCLK2_Div4: ADC clock = PCLK2/4 - * @arg RCC_PCLK2_Div6: ADC clock = PCLK2/6 - * @arg RCC_PCLK2_Div8: ADC clock = PCLK2/8 - * @retval None - */ -void RCC_ADCCLKConfig(uint32_t RCC_PCLK2) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_RCC_ADCCLK(RCC_PCLK2)); - tmpreg = RCC->CFGR; - /* Clear ADCPRE[1:0] bits */ - tmpreg &= CFGR_ADCPRE_Reset_Mask; - /* Set ADCPRE[1:0] bits according to RCC_PCLK2 value */ - tmpreg |= RCC_PCLK2; - /* Store the new value */ - RCC->CFGR = tmpreg; -} - -#ifdef STM32F10X_CL -/** - * @brief Configures the I2S2 clock source(I2S2CLK). - * @note - * - This function must be called before enabling I2S2 APB clock. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_I2S2CLKSource: specifies the I2S2 clock source. - * This parameter can be one of the following values: - * @arg RCC_I2S2CLKSource_SYSCLK: system clock selected as I2S2 clock entry - * @arg RCC_I2S2CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S2 clock entry - * @retval None - */ -void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_I2S2CLK_SOURCE(RCC_I2S2CLKSource)); - - *(__IO uint32_t *) CFGR2_I2S2SRC_BB = RCC_I2S2CLKSource; -} - -/** - * @brief Configures the I2S3 clock source(I2S2CLK). - * @note - * - This function must be called before enabling I2S3 APB clock. - * - This function applies only to STM32 Connectivity line devices. - * @param RCC_I2S3CLKSource: specifies the I2S3 clock source. - * This parameter can be one of the following values: - * @arg RCC_I2S3CLKSource_SYSCLK: system clock selected as I2S3 clock entry - * @arg RCC_I2S3CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S3 clock entry - * @retval None - */ -void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_I2S3CLK_SOURCE(RCC_I2S3CLKSource)); - - *(__IO uint32_t *) CFGR2_I2S3SRC_BB = RCC_I2S3CLKSource; -} -#endif /* STM32F10X_CL */ - -/** - * @brief Configures the External Low Speed oscillator (LSE). - * @param RCC_LSE: specifies the new state of the LSE. - * This parameter can be one of the following values: - * @arg RCC_LSE_OFF: LSE oscillator OFF - * @arg RCC_LSE_ON: LSE oscillator ON - * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock - * @retval None - */ -void RCC_LSEConfig(uint8_t RCC_LSE) -{ - /* Check the parameters */ - assert_param(IS_RCC_LSE(RCC_LSE)); - /* Reset LSEON and LSEBYP bits before configuring the LSE ------------------*/ - /* Reset LSEON bit */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; - /* Reset LSEBYP bit */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; - /* Configure LSE (RCC_LSE_OFF is already covered by the code section above) */ - switch(RCC_LSE) - { - case RCC_LSE_ON: - /* Set LSEON bit */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_ON; - break; - - case RCC_LSE_Bypass: - /* Set LSEBYP and LSEON bits */ - *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_Bypass | RCC_LSE_ON; - break; - - default: - break; - } -} - -/** - * @brief Enables or disables the Internal Low Speed oscillator (LSI). - * @note LSI can not be disabled if the IWDG is running. - * @param NewState: new state of the LSI. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_LSICmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CSR_LSION_BB = (uint32_t)NewState; -} - -/** - * @brief Configures the RTC clock (RTCCLK). - * @note Once the RTC clock is selected it can't be changed unless the Backup domain is reset. - * @param RCC_RTCCLKSource: specifies the RTC clock source. - * This parameter can be one of the following values: - * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock - * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock - * @arg RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128 selected as RTC clock - * @retval None - */ -void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource) -{ - /* Check the parameters */ - assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource)); - /* Select the RTC clock source */ - RCC->BDCR |= RCC_RTCCLKSource; -} - -/** - * @brief Enables or disables the RTC clock. - * @note This function must be used only after the RTC clock was selected using the RCC_RTCCLKConfig function. - * @param NewState: new state of the RTC clock. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_RTCCLKCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) BDCR_RTCEN_BB = (uint32_t)NewState; -} - -/** - * @brief Returns the frequencies of different on chip clocks. - * @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold - * the clocks frequencies. - * @note The result of this function could be not correct when using - * fractional value for HSE crystal. - * @retval None - */ -void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0; - -#ifdef STM32F10X_CL - uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; -#endif /* STM32F10X_CL */ - -#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - uint32_t prediv1factor = 0; -#endif - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & CFGR_SWS_Mask; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; - break; - case 0x04: /* HSE used as system clock */ - RCC_Clocks->SYSCLK_Frequency = HSE_VALUE; - break; - case 0x08: /* PLL used as system clock */ - - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & CFGR_PLLMull_Mask; - pllsource = RCC->CFGR & CFGR_PLLSRC_Mask; - -#ifndef STM32F10X_CL - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; - } - else - { - #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) - prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull; - #else - /* HSE selected as PLL clock entry */ - if ((RCC->CFGR & CFGR_PLLXTPRE_Mask) != (uint32_t)RESET) - {/* HSE oscillator clock divided by 2 */ - RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE >> 1) * pllmull; - } - else - { - RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * pllmull; - } - #endif - } -#else - pllmull = pllmull >> 18; - - if (pllmull != 0x0D) - { - pllmull += 2; - } - else - { /* PLL multiplication factor = PLL input clock * 6.5 */ - pllmull = 13 / 2; - } - - if (pllsource == 0x00) - {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; - } - else - {/* PREDIV1 selected as PLL clock entry */ - - /* Get PREDIV1 clock source and division factor */ - prediv1source = RCC->CFGR2 & CFGR2_PREDIV1SRC; - prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; - - if (prediv1source == 0) - { /* HSE oscillator clock selected as PREDIV1 clock entry */ - RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull; - } - else - {/* PLL2 clock selected as PREDIV1 clock entry */ - - /* Get PREDIV2 division factor and PLL2 multiplication factor */ - prediv2factor = ((RCC->CFGR2 & CFGR2_PREDIV2) >> 4) + 1; - pll2mull = ((RCC->CFGR2 & CFGR2_PLL2MUL) >> 8 ) + 2; - RCC_Clocks->SYSCLK_Frequency = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; - } - } -#endif /* STM32F10X_CL */ - break; - - default: - RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; - break; - } - - /* Compute HCLK, PCLK1, PCLK2 and ADCCLK clocks frequencies ----------------*/ - /* Get HCLK prescaler */ - tmp = RCC->CFGR & CFGR_HPRE_Set_Mask; - tmp = tmp >> 4; - presc = APBAHBPrescTable[tmp]; - /* HCLK clock frequency */ - RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc; - /* Get PCLK1 prescaler */ - tmp = RCC->CFGR & CFGR_PPRE1_Set_Mask; - tmp = tmp >> 8; - presc = APBAHBPrescTable[tmp]; - /* PCLK1 clock frequency */ - RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc; - /* Get PCLK2 prescaler */ - tmp = RCC->CFGR & CFGR_PPRE2_Set_Mask; - tmp = tmp >> 11; - presc = APBAHBPrescTable[tmp]; - /* PCLK2 clock frequency */ - RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc; - /* Get ADCCLK prescaler */ - tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask; - tmp = tmp >> 14; - presc = ADCPrescTable[tmp]; - /* ADCCLK clock frequency */ - RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc; -} - -/** - * @brief Enables or disables the AHB peripheral clock. - * @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock. - * - * For @b STM32_Connectivity_line_devices, this parameter can be any combination - * of the following values: - * @arg RCC_AHBPeriph_DMA1 - * @arg RCC_AHBPeriph_DMA2 - * @arg RCC_AHBPeriph_SRAM - * @arg RCC_AHBPeriph_FLITF - * @arg RCC_AHBPeriph_CRC - * @arg RCC_AHBPeriph_OTG_FS - * @arg RCC_AHBPeriph_ETH_MAC - * @arg RCC_AHBPeriph_ETH_MAC_Tx - * @arg RCC_AHBPeriph_ETH_MAC_Rx - * - * For @b other_STM32_devices, this parameter can be any combination of the - * following values: - * @arg RCC_AHBPeriph_DMA1 - * @arg RCC_AHBPeriph_DMA2 - * @arg RCC_AHBPeriph_SRAM - * @arg RCC_AHBPeriph_FLITF - * @arg RCC_AHBPeriph_CRC - * @arg RCC_AHBPeriph_FSMC - * @arg RCC_AHBPeriph_SDIO - * - * @note SRAM and FLITF clock can be disabled only during sleep mode. - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_AHB_PERIPH(RCC_AHBPeriph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - RCC->AHBENR |= RCC_AHBPeriph; - } - else - { - RCC->AHBENR &= ~RCC_AHBPeriph; - } -} - -/** - * @brief Enables or disables the High Speed APB (APB2) peripheral clock. - * @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, - * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, - * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, - * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, - * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, - * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17, - * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11 - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB2ENR |= RCC_APB2Periph; - } - else - { - RCC->APB2ENR &= ~RCC_APB2Periph; - } -} - -/** - * @brief Enables or disables the Low Speed APB (APB1) peripheral clock. - * @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock. - * This parameter can be any combination of the following values: - * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, - * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, - * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, - * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, - * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, - * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, - * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC, - * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14 - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB1ENR |= RCC_APB1Periph; - } - else - { - RCC->APB1ENR &= ~RCC_APB1Periph; - } -} - -#ifdef STM32F10X_CL -/** - * @brief Forces or releases AHB peripheral reset. - * @note This function applies only to STM32 Connectivity line devices. - * @param RCC_AHBPeriph: specifies the AHB peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_AHBPeriph_OTG_FS - * @arg RCC_AHBPeriph_ETH_MAC - * @param NewState: new state of the specified peripheral reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_AHB_PERIPH_RESET(RCC_AHBPeriph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - RCC->AHBRSTR |= RCC_AHBPeriph; - } - else - { - RCC->AHBRSTR &= ~RCC_AHBPeriph; - } -} -#endif /* STM32F10X_CL */ - -/** - * @brief Forces or releases High Speed APB (APB2) peripheral reset. - * @param RCC_APB2Periph: specifies the APB2 peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, - * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, - * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, - * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, - * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, - * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17, - * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11 - * @param NewState: new state of the specified peripheral reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB2RSTR |= RCC_APB2Periph; - } - else - { - RCC->APB2RSTR &= ~RCC_APB2Periph; - } -} - -/** - * @brief Forces or releases Low Speed APB (APB1) peripheral reset. - * @param RCC_APB1Periph: specifies the APB1 peripheral to reset. - * This parameter can be any combination of the following values: - * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, - * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, - * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, - * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, - * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, - * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, - * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC, - * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14 - * @param NewState: new state of the specified peripheral clock. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - RCC->APB1RSTR |= RCC_APB1Periph; - } - else - { - RCC->APB1RSTR &= ~RCC_APB1Periph; - } -} - -/** - * @brief Forces or releases the Backup domain reset. - * @param NewState: new state of the Backup domain reset. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_BackupResetCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) BDCR_BDRST_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the Clock Security System. - * @param NewState: new state of the Clock Security System.. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RCC_ClockSecuritySystemCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)NewState; -} - -/** - * @brief Selects the clock source to output on MCO pin. - * @param RCC_MCO: specifies the clock source to output. - * - * For @b STM32_Connectivity_line_devices, this parameter can be one of the - * following values: - * @arg RCC_MCO_NoClock: No clock selected - * @arg RCC_MCO_SYSCLK: System clock selected - * @arg RCC_MCO_HSI: HSI oscillator clock selected - * @arg RCC_MCO_HSE: HSE oscillator clock selected - * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected - * @arg RCC_MCO_PLL2CLK: PLL2 clock selected - * @arg RCC_MCO_PLL3CLK_Div2: PLL3 clock divided by 2 selected - * @arg RCC_MCO_XT1: External 3-25 MHz oscillator clock selected - * @arg RCC_MCO_PLL3CLK: PLL3 clock selected - * - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_MCO_NoClock: No clock selected - * @arg RCC_MCO_SYSCLK: System clock selected - * @arg RCC_MCO_HSI: HSI oscillator clock selected - * @arg RCC_MCO_HSE: HSE oscillator clock selected - * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected - * - * @retval None - */ -void RCC_MCOConfig(uint8_t RCC_MCO) -{ - /* Check the parameters */ - assert_param(IS_RCC_MCO(RCC_MCO)); - - /* Perform Byte access to MCO bits to select the MCO source */ - *(__IO uint8_t *) CFGR_BYTE4_ADDRESS = RCC_MCO; -} - -/** - * @brief Checks whether the specified RCC flag is set or not. - * @param RCC_FLAG: specifies the flag to check. - * - * For @b STM32_Connectivity_line_devices, this parameter can be one of the - * following values: - * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready - * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready - * @arg RCC_FLAG_PLLRDY: PLL clock ready - * @arg RCC_FLAG_PLL2RDY: PLL2 clock ready - * @arg RCC_FLAG_PLL3RDY: PLL3 clock ready - * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready - * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready - * @arg RCC_FLAG_PINRST: Pin reset - * @arg RCC_FLAG_PORRST: POR/PDR reset - * @arg RCC_FLAG_SFTRST: Software reset - * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset - * @arg RCC_FLAG_WWDGRST: Window Watchdog reset - * @arg RCC_FLAG_LPWRRST: Low Power reset - * - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready - * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready - * @arg RCC_FLAG_PLLRDY: PLL clock ready - * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready - * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready - * @arg RCC_FLAG_PINRST: Pin reset - * @arg RCC_FLAG_PORRST: POR/PDR reset - * @arg RCC_FLAG_SFTRST: Software reset - * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset - * @arg RCC_FLAG_WWDGRST: Window Watchdog reset - * @arg RCC_FLAG_LPWRRST: Low Power reset - * - * @retval The new state of RCC_FLAG (SET or RESET). - */ -FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG) -{ - uint32_t tmp = 0; - uint32_t statusreg = 0; - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_RCC_FLAG(RCC_FLAG)); - - /* Get the RCC register index */ - tmp = RCC_FLAG >> 5; - if (tmp == 1) /* The flag to check is in CR register */ - { - statusreg = RCC->CR; - } - else if (tmp == 2) /* The flag to check is in BDCR register */ - { - statusreg = RCC->BDCR; - } - else /* The flag to check is in CSR register */ - { - statusreg = RCC->CSR; - } - - /* Get the flag position */ - tmp = RCC_FLAG & FLAG_Mask; - if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - /* Return the flag status */ - return bitstatus; -} - -/** - * @brief Clears the RCC reset flags. - * @note The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, - * RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST - * @param None - * @retval None - */ -void RCC_ClearFlag(void) -{ - /* Set RMVF bit to clear the reset flags */ - RCC->CSR |= CSR_RMVF_Set; -} - -/** - * @brief Checks whether the specified RCC interrupt has occurred or not. - * @param RCC_IT: specifies the RCC interrupt source to check. - * - * For @b STM32_Connectivity_line_devices, this parameter can be one of the - * following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt - * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt - * @arg RCC_IT_CSS: Clock Security System interrupt - * - * For @b other_STM32_devices, this parameter can be one of the following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_CSS: Clock Security System interrupt - * - * @retval The new state of RCC_IT (SET or RESET). - */ -ITStatus RCC_GetITStatus(uint8_t RCC_IT) -{ - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_RCC_GET_IT(RCC_IT)); - - /* Check the status of the specified RCC interrupt */ - if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - /* Return the RCC_IT status */ - return bitstatus; -} - -/** - * @brief Clears the RCC's interrupt pending bits. - * @param RCC_IT: specifies the interrupt pending bit to clear. - * - * For @b STM32_Connectivity_line_devices, this parameter can be any combination - * of the following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt - * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt - * @arg RCC_IT_CSS: Clock Security System interrupt - * - * For @b other_STM32_devices, this parameter can be any combination of the - * following values: - * @arg RCC_IT_LSIRDY: LSI ready interrupt - * @arg RCC_IT_LSERDY: LSE ready interrupt - * @arg RCC_IT_HSIRDY: HSI ready interrupt - * @arg RCC_IT_HSERDY: HSE ready interrupt - * @arg RCC_IT_PLLRDY: PLL ready interrupt - * - * @arg RCC_IT_CSS: Clock Security System interrupt - * @retval None - */ -void RCC_ClearITPendingBit(uint8_t RCC_IT) -{ - /* Check the parameters */ - assert_param(IS_RCC_CLEAR_IT(RCC_IT)); - - /* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt - pending bits */ - *(__IO uint8_t *) CIR_BYTE3_ADDRESS = RCC_IT; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_rcc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the RCC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup RCC + * @brief RCC driver modules + * @{ + */ + +/** @defgroup RCC_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Private_Defines + * @{ + */ + +/* ------------ RCC registers bit address in the alias region ----------- */ +#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) + +/* --- CR Register ---*/ + +/* Alias word address of HSION bit */ +#define CR_OFFSET (RCC_OFFSET + 0x00) +#define HSION_BitNumber 0x00 +#define CR_HSION_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BitNumber * 4)) + +/* Alias word address of PLLON bit */ +#define PLLON_BitNumber 0x18 +#define CR_PLLON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BitNumber * 4)) + +#ifdef STM32F10X_CL + /* Alias word address of PLL2ON bit */ + #define PLL2ON_BitNumber 0x1A + #define CR_PLL2ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL2ON_BitNumber * 4)) + + /* Alias word address of PLL3ON bit */ + #define PLL3ON_BitNumber 0x1C + #define CR_PLL3ON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLL3ON_BitNumber * 4)) +#endif /* STM32F10X_CL */ + +/* Alias word address of CSSON bit */ +#define CSSON_BitNumber 0x13 +#define CR_CSSON_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BitNumber * 4)) + +/* --- CFGR Register ---*/ + +/* Alias word address of USBPRE bit */ +#define CFGR_OFFSET (RCC_OFFSET + 0x04) + +#ifndef STM32F10X_CL + #define USBPRE_BitNumber 0x16 + #define CFGR_USBPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BitNumber * 4)) +#else + #define OTGFSPRE_BitNumber 0x16 + #define CFGR_OTGFSPRE_BB (PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (OTGFSPRE_BitNumber * 4)) +#endif /* STM32F10X_CL */ + +/* --- BDCR Register ---*/ + +/* Alias word address of RTCEN bit */ +#define BDCR_OFFSET (RCC_OFFSET + 0x20) +#define RTCEN_BitNumber 0x0F +#define BDCR_RTCEN_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BitNumber * 4)) + +/* Alias word address of BDRST bit */ +#define BDRST_BitNumber 0x10 +#define BDCR_BDRST_BB (PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BitNumber * 4)) + +/* --- CSR Register ---*/ + +/* Alias word address of LSION bit */ +#define CSR_OFFSET (RCC_OFFSET + 0x24) +#define LSION_BitNumber 0x00 +#define CSR_LSION_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BitNumber * 4)) + +#ifdef STM32F10X_CL +/* --- CFGR2 Register ---*/ + + /* Alias word address of I2S2SRC bit */ + #define CFGR2_OFFSET (RCC_OFFSET + 0x2C) + #define I2S2SRC_BitNumber 0x11 + #define CFGR2_I2S2SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S2SRC_BitNumber * 4)) + + /* Alias word address of I2S3SRC bit */ + #define I2S3SRC_BitNumber 0x12 + #define CFGR2_I2S3SRC_BB (PERIPH_BB_BASE + (CFGR2_OFFSET * 32) + (I2S3SRC_BitNumber * 4)) +#endif /* STM32F10X_CL */ + +/* ---------------------- RCC registers bit mask ------------------------ */ + +/* CR register bit mask */ +#define CR_HSEBYP_Reset ((uint32_t)0xFFFBFFFF) +#define CR_HSEBYP_Set ((uint32_t)0x00040000) +#define CR_HSEON_Reset ((uint32_t)0xFFFEFFFF) +#define CR_HSEON_Set ((uint32_t)0x00010000) +#define CR_HSITRIM_Mask ((uint32_t)0xFFFFFF07) + +/* CFGR register bit mask */ +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) + #define CFGR_PLL_Mask ((uint32_t)0xFFC2FFFF) +#else + #define CFGR_PLL_Mask ((uint32_t)0xFFC0FFFF) +#endif /* STM32F10X_CL */ + +#define CFGR_PLLMull_Mask ((uint32_t)0x003C0000) +#define CFGR_PLLSRC_Mask ((uint32_t)0x00010000) +#define CFGR_PLLXTPRE_Mask ((uint32_t)0x00020000) +#define CFGR_SWS_Mask ((uint32_t)0x0000000C) +#define CFGR_SW_Mask ((uint32_t)0xFFFFFFFC) +#define CFGR_HPRE_Reset_Mask ((uint32_t)0xFFFFFF0F) +#define CFGR_HPRE_Set_Mask ((uint32_t)0x000000F0) +#define CFGR_PPRE1_Reset_Mask ((uint32_t)0xFFFFF8FF) +#define CFGR_PPRE1_Set_Mask ((uint32_t)0x00000700) +#define CFGR_PPRE2_Reset_Mask ((uint32_t)0xFFFFC7FF) +#define CFGR_PPRE2_Set_Mask ((uint32_t)0x00003800) +#define CFGR_ADCPRE_Reset_Mask ((uint32_t)0xFFFF3FFF) +#define CFGR_ADCPRE_Set_Mask ((uint32_t)0x0000C000) + +/* CSR register bit mask */ +#define CSR_RMVF_Set ((uint32_t)0x01000000) + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) +/* CFGR2 register bit mask */ + #define CFGR2_PREDIV1SRC ((uint32_t)0x00010000) + #define CFGR2_PREDIV1 ((uint32_t)0x0000000F) +#endif +#ifdef STM32F10X_CL + #define CFGR2_PREDIV2 ((uint32_t)0x000000F0) + #define CFGR2_PLL2MUL ((uint32_t)0x00000F00) + #define CFGR2_PLL3MUL ((uint32_t)0x0000F000) +#endif /* STM32F10X_CL */ + +/* RCC Flag Mask */ +#define FLAG_Mask ((uint8_t)0x1F) + +/* CIR register byte 2 (Bits[15:8]) base address */ +#define CIR_BYTE2_ADDRESS ((uint32_t)0x40021009) + +/* CIR register byte 3 (Bits[23:16]) base address */ +#define CIR_BYTE3_ADDRESS ((uint32_t)0x4002100A) + +/* CFGR register byte 4 (Bits[31:24]) base address */ +#define CFGR_BYTE4_ADDRESS ((uint32_t)0x40021007) + +/* BDCR register base address */ +#define BDCR_ADDRESS (PERIPH_BASE + BDCR_OFFSET) + +/** + * @} + */ + +/** @defgroup RCC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Private_Variables + * @{ + */ + +static __I uint8_t APBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; +static __I uint8_t ADCPrescTable[4] = {2, 4, 6, 8}; + +/** + * @} + */ + +/** @defgroup RCC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup RCC_Private_Functions + * @{ + */ + +/** + * @brief Resets the RCC clock configuration to the default reset state. + * @param None + * @retval None + */ +void RCC_DeInit(void) +{ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +} + +/** + * @brief Configures the External High Speed oscillator (HSE). + * @note HSE can not be stopped if it is used directly or through the PLL as system clock. + * @param RCC_HSE: specifies the new state of the HSE. + * This parameter can be one of the following values: + * @arg RCC_HSE_OFF: HSE oscillator OFF + * @arg RCC_HSE_ON: HSE oscillator ON + * @arg RCC_HSE_Bypass: HSE oscillator bypassed with external clock + * @retval None + */ +void RCC_HSEConfig(uint32_t RCC_HSE) +{ + /* Check the parameters */ + assert_param(IS_RCC_HSE(RCC_HSE)); + /* Reset HSEON and HSEBYP bits before configuring the HSE ------------------*/ + /* Reset HSEON bit */ + RCC->CR &= CR_HSEON_Reset; + /* Reset HSEBYP bit */ + RCC->CR &= CR_HSEBYP_Reset; + /* Configure HSE (RCC_HSE_OFF is already covered by the code section above) */ + switch(RCC_HSE) + { + case RCC_HSE_ON: + /* Set HSEON bit */ + RCC->CR |= CR_HSEON_Set; + break; + + case RCC_HSE_Bypass: + /* Set HSEBYP and HSEON bits */ + RCC->CR |= CR_HSEBYP_Set | CR_HSEON_Set; + break; + + default: + break; + } +} + +/** + * @brief Waits for HSE start-up. + * @param None + * @retval An ErrorStatus enumuration value: + * - SUCCESS: HSE oscillator is stable and ready to use + * - ERROR: HSE oscillator not yet ready + */ +ErrorStatus RCC_WaitForHSEStartUp(void) +{ + __IO uint32_t StartUpCounter = 0; + ErrorStatus status = ERROR; + FlagStatus HSEStatus = RESET; + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC_GetFlagStatus(RCC_FLAG_HSERDY); + StartUpCounter++; + } while((StartUpCounter != HSE_STARTUP_TIMEOUT) && (HSEStatus == RESET)); + + if (RCC_GetFlagStatus(RCC_FLAG_HSERDY) != RESET) + { + status = SUCCESS; + } + else + { + status = ERROR; + } + return (status); +} + +/** + * @brief Adjusts the Internal High Speed oscillator (HSI) calibration value. + * @param HSICalibrationValue: specifies the calibration trimming value. + * This parameter must be a number between 0 and 0x1F. + * @retval None + */ +void RCC_AdjustHSICalibrationValue(uint8_t HSICalibrationValue) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_CALIBRATION_VALUE(HSICalibrationValue)); + tmpreg = RCC->CR; + /* Clear HSITRIM[4:0] bits */ + tmpreg &= CR_HSITRIM_Mask; + /* Set the HSITRIM[4:0] bits according to HSICalibrationValue value */ + tmpreg |= (uint32_t)HSICalibrationValue << 3; + /* Store the new value */ + RCC->CR = tmpreg; +} + +/** + * @brief Enables or disables the Internal High Speed oscillator (HSI). + * @note HSI can not be stopped if it is used directly or through the PLL as system clock. + * @param NewState: new state of the HSI. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_HSICmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_HSION_BB = (uint32_t)NewState; +} + +/** + * @brief Configures the PLL clock source and multiplication factor. + * @note This function must be used only when the PLL is disabled. + * @param RCC_PLLSource: specifies the PLL entry clock source. + * For @b STM32_Connectivity_line_devices or @b STM32_Value_line_devices, + * this parameter can be one of the following values: + * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry + * @arg RCC_PLLSource_PREDIV1: PREDIV1 clock selected as PLL clock entry + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_PLLSource_HSI_Div2: HSI oscillator clock divided by 2 selected as PLL clock entry + * @arg RCC_PLLSource_HSE_Div1: HSE oscillator clock selected as PLL clock entry + * @arg RCC_PLLSource_HSE_Div2: HSE oscillator clock divided by 2 selected as PLL clock entry + * @param RCC_PLLMul: specifies the PLL multiplication factor. + * For @b STM32_Connectivity_line_devices, this parameter can be RCC_PLLMul_x where x:{[4,9], 6_5} + * For @b other_STM32_devices, this parameter can be RCC_PLLMul_x where x:[2,16] + * @retval None + */ +void RCC_PLLConfig(uint32_t RCC_PLLSource, uint32_t RCC_PLLMul) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PLL_SOURCE(RCC_PLLSource)); + assert_param(IS_RCC_PLL_MUL(RCC_PLLMul)); + + tmpreg = RCC->CFGR; + /* Clear PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ + tmpreg &= CFGR_PLL_Mask; + /* Set the PLL configuration bits */ + tmpreg |= RCC_PLLSource | RCC_PLLMul; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Enables or disables the PLL. + * @note The PLL can not be disabled if it is used as system clock. + * @param NewState: new state of the PLL. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_PLLCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CR_PLLON_BB = (uint32_t)NewState; +} + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) || defined (STM32F10X_CL) +/** + * @brief Configures the PREDIV1 division factor. + * @note + * - This function must be used only when the PLL is disabled. + * - This function applies only to STM32 Connectivity line and Value line + * devices. + * @param RCC_PREDIV1_Source: specifies the PREDIV1 clock source. + * This parameter can be one of the following values: + * @arg RCC_PREDIV1_Source_HSE: HSE selected as PREDIV1 clock + * @arg RCC_PREDIV1_Source_PLL2: PLL2 selected as PREDIV1 clock + * @note + * For @b STM32_Value_line_devices this parameter is always RCC_PREDIV1_Source_HSE + * @param RCC_PREDIV1_Div: specifies the PREDIV1 clock division factor. + * This parameter can be RCC_PREDIV1_Divx where x:[1,16] + * @retval None + */ +void RCC_PREDIV1Config(uint32_t RCC_PREDIV1_Source, uint32_t RCC_PREDIV1_Div) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PREDIV1_SOURCE(RCC_PREDIV1_Source)); + assert_param(IS_RCC_PREDIV1(RCC_PREDIV1_Div)); + + tmpreg = RCC->CFGR2; + /* Clear PREDIV1[3:0] and PREDIV1SRC bits */ + tmpreg &= ~(CFGR2_PREDIV1 | CFGR2_PREDIV1SRC); + /* Set the PREDIV1 clock source and division factor */ + tmpreg |= RCC_PREDIV1_Source | RCC_PREDIV1_Div ; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} +#endif + +#ifdef STM32F10X_CL +/** + * @brief Configures the PREDIV2 division factor. + * @note + * - This function must be used only when both PLL2 and PLL3 are disabled. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_PREDIV2_Div: specifies the PREDIV2 clock division factor. + * This parameter can be RCC_PREDIV2_Divx where x:[1,16] + * @retval None + */ +void RCC_PREDIV2Config(uint32_t RCC_PREDIV2_Div) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PREDIV2(RCC_PREDIV2_Div)); + + tmpreg = RCC->CFGR2; + /* Clear PREDIV2[3:0] bits */ + tmpreg &= ~CFGR2_PREDIV2; + /* Set the PREDIV2 division factor */ + tmpreg |= RCC_PREDIV2_Div; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} + +/** + * @brief Configures the PLL2 multiplication factor. + * @note + * - This function must be used only when the PLL2 is disabled. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_PLL2Mul: specifies the PLL2 multiplication factor. + * This parameter can be RCC_PLL2Mul_x where x:{[8,14], 16, 20} + * @retval None + */ +void RCC_PLL2Config(uint32_t RCC_PLL2Mul) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PLL2_MUL(RCC_PLL2Mul)); + + tmpreg = RCC->CFGR2; + /* Clear PLL2Mul[3:0] bits */ + tmpreg &= ~CFGR2_PLL2MUL; + /* Set the PLL2 configuration bits */ + tmpreg |= RCC_PLL2Mul; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} + + +/** + * @brief Enables or disables the PLL2. + * @note + * - The PLL2 can not be disabled if it is used indirectly as system clock + * (i.e. it is used as PLL clock entry that is used as System clock). + * - This function applies only to STM32 Connectivity line devices. + * @param NewState: new state of the PLL2. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_PLL2Cmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CR_PLL2ON_BB = (uint32_t)NewState; +} + + +/** + * @brief Configures the PLL3 multiplication factor. + * @note + * - This function must be used only when the PLL3 is disabled. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_PLL3Mul: specifies the PLL3 multiplication factor. + * This parameter can be RCC_PLL3Mul_x where x:{[8,14], 16, 20} + * @retval None + */ +void RCC_PLL3Config(uint32_t RCC_PLL3Mul) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_RCC_PLL3_MUL(RCC_PLL3Mul)); + + tmpreg = RCC->CFGR2; + /* Clear PLL3Mul[3:0] bits */ + tmpreg &= ~CFGR2_PLL3MUL; + /* Set the PLL3 configuration bits */ + tmpreg |= RCC_PLL3Mul; + /* Store the new value */ + RCC->CFGR2 = tmpreg; +} + + +/** + * @brief Enables or disables the PLL3. + * @note This function applies only to STM32 Connectivity line devices. + * @param NewState: new state of the PLL3. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_PLL3Cmd(FunctionalState NewState) +{ + /* Check the parameters */ + + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_PLL3ON_BB = (uint32_t)NewState; +} +#endif /* STM32F10X_CL */ + +/** + * @brief Configures the system clock (SYSCLK). + * @param RCC_SYSCLKSource: specifies the clock source used as system clock. + * This parameter can be one of the following values: + * @arg RCC_SYSCLKSource_HSI: HSI selected as system clock + * @arg RCC_SYSCLKSource_HSE: HSE selected as system clock + * @arg RCC_SYSCLKSource_PLLCLK: PLL selected as system clock + * @retval None + */ +void RCC_SYSCLKConfig(uint32_t RCC_SYSCLKSource) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_SYSCLK_SOURCE(RCC_SYSCLKSource)); + tmpreg = RCC->CFGR; + /* Clear SW[1:0] bits */ + tmpreg &= CFGR_SW_Mask; + /* Set SW[1:0] bits according to RCC_SYSCLKSource value */ + tmpreg |= RCC_SYSCLKSource; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Returns the clock source used as system clock. + * @param None + * @retval The clock source used as system clock. The returned value can + * be one of the following: + * - 0x00: HSI used as system clock + * - 0x04: HSE used as system clock + * - 0x08: PLL used as system clock + */ +uint8_t RCC_GetSYSCLKSource(void) +{ + return ((uint8_t)(RCC->CFGR & CFGR_SWS_Mask)); +} + +/** + * @brief Configures the AHB clock (HCLK). + * @param RCC_SYSCLK: defines the AHB clock divider. This clock is derived from + * the system clock (SYSCLK). + * This parameter can be one of the following values: + * @arg RCC_SYSCLK_Div1: AHB clock = SYSCLK + * @arg RCC_SYSCLK_Div2: AHB clock = SYSCLK/2 + * @arg RCC_SYSCLK_Div4: AHB clock = SYSCLK/4 + * @arg RCC_SYSCLK_Div8: AHB clock = SYSCLK/8 + * @arg RCC_SYSCLK_Div16: AHB clock = SYSCLK/16 + * @arg RCC_SYSCLK_Div64: AHB clock = SYSCLK/64 + * @arg RCC_SYSCLK_Div128: AHB clock = SYSCLK/128 + * @arg RCC_SYSCLK_Div256: AHB clock = SYSCLK/256 + * @arg RCC_SYSCLK_Div512: AHB clock = SYSCLK/512 + * @retval None + */ +void RCC_HCLKConfig(uint32_t RCC_SYSCLK) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_HCLK(RCC_SYSCLK)); + tmpreg = RCC->CFGR; + /* Clear HPRE[3:0] bits */ + tmpreg &= CFGR_HPRE_Reset_Mask; + /* Set HPRE[3:0] bits according to RCC_SYSCLK value */ + tmpreg |= RCC_SYSCLK; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Configures the Low Speed APB clock (PCLK1). + * @param RCC_HCLK: defines the APB1 clock divider. This clock is derived from + * the AHB clock (HCLK). + * This parameter can be one of the following values: + * @arg RCC_HCLK_Div1: APB1 clock = HCLK + * @arg RCC_HCLK_Div2: APB1 clock = HCLK/2 + * @arg RCC_HCLK_Div4: APB1 clock = HCLK/4 + * @arg RCC_HCLK_Div8: APB1 clock = HCLK/8 + * @arg RCC_HCLK_Div16: APB1 clock = HCLK/16 + * @retval None + */ +void RCC_PCLK1Config(uint32_t RCC_HCLK) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_PCLK(RCC_HCLK)); + tmpreg = RCC->CFGR; + /* Clear PPRE1[2:0] bits */ + tmpreg &= CFGR_PPRE1_Reset_Mask; + /* Set PPRE1[2:0] bits according to RCC_HCLK value */ + tmpreg |= RCC_HCLK; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Configures the High Speed APB clock (PCLK2). + * @param RCC_HCLK: defines the APB2 clock divider. This clock is derived from + * the AHB clock (HCLK). + * This parameter can be one of the following values: + * @arg RCC_HCLK_Div1: APB2 clock = HCLK + * @arg RCC_HCLK_Div2: APB2 clock = HCLK/2 + * @arg RCC_HCLK_Div4: APB2 clock = HCLK/4 + * @arg RCC_HCLK_Div8: APB2 clock = HCLK/8 + * @arg RCC_HCLK_Div16: APB2 clock = HCLK/16 + * @retval None + */ +void RCC_PCLK2Config(uint32_t RCC_HCLK) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_PCLK(RCC_HCLK)); + tmpreg = RCC->CFGR; + /* Clear PPRE2[2:0] bits */ + tmpreg &= CFGR_PPRE2_Reset_Mask; + /* Set PPRE2[2:0] bits according to RCC_HCLK value */ + tmpreg |= RCC_HCLK << 3; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +/** + * @brief Enables or disables the specified RCC interrupts. + * @param RCC_IT: specifies the RCC interrupt sources to be enabled or disabled. + * + * For @b STM32_Connectivity_line_devices, this parameter can be any combination + * of the following values + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt + * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt + * + * For @b other_STM32_devices, this parameter can be any combination of the + * following values + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * + * @param NewState: new state of the specified RCC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_ITConfig(uint8_t RCC_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_IT(RCC_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Perform Byte access to RCC_CIR bits to enable the selected interrupts */ + *(__IO uint8_t *) CIR_BYTE2_ADDRESS |= RCC_IT; + } + else + { + /* Perform Byte access to RCC_CIR bits to disable the selected interrupts */ + *(__IO uint8_t *) CIR_BYTE2_ADDRESS &= (uint8_t)~RCC_IT; + } +} + +#ifndef STM32F10X_CL +/** + * @brief Configures the USB clock (USBCLK). + * @param RCC_USBCLKSource: specifies the USB clock source. This clock is + * derived from the PLL output. + * This parameter can be one of the following values: + * @arg RCC_USBCLKSource_PLLCLK_1Div5: PLL clock divided by 1,5 selected as USB + * clock source + * @arg RCC_USBCLKSource_PLLCLK_Div1: PLL clock selected as USB clock source + * @retval None + */ +void RCC_USBCLKConfig(uint32_t RCC_USBCLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_USBCLK_SOURCE(RCC_USBCLKSource)); + + *(__IO uint32_t *) CFGR_USBPRE_BB = RCC_USBCLKSource; +} +#else +/** + * @brief Configures the USB OTG FS clock (OTGFSCLK). + * This function applies only to STM32 Connectivity line devices. + * @param RCC_OTGFSCLKSource: specifies the USB OTG FS clock source. + * This clock is derived from the PLL output. + * This parameter can be one of the following values: + * @arg RCC_OTGFSCLKSource_PLLVCO_Div3: PLL VCO clock divided by 2 selected as USB OTG FS clock source + * @arg RCC_OTGFSCLKSource_PLLVCO_Div2: PLL VCO clock divided by 2 selected as USB OTG FS clock source + * @retval None + */ +void RCC_OTGFSCLKConfig(uint32_t RCC_OTGFSCLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_OTGFSCLK_SOURCE(RCC_OTGFSCLKSource)); + + *(__IO uint32_t *) CFGR_OTGFSPRE_BB = RCC_OTGFSCLKSource; +} +#endif /* STM32F10X_CL */ + +/** + * @brief Configures the ADC clock (ADCCLK). + * @param RCC_PCLK2: defines the ADC clock divider. This clock is derived from + * the APB2 clock (PCLK2). + * This parameter can be one of the following values: + * @arg RCC_PCLK2_Div2: ADC clock = PCLK2/2 + * @arg RCC_PCLK2_Div4: ADC clock = PCLK2/4 + * @arg RCC_PCLK2_Div6: ADC clock = PCLK2/6 + * @arg RCC_PCLK2_Div8: ADC clock = PCLK2/8 + * @retval None + */ +void RCC_ADCCLKConfig(uint32_t RCC_PCLK2) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_RCC_ADCCLK(RCC_PCLK2)); + tmpreg = RCC->CFGR; + /* Clear ADCPRE[1:0] bits */ + tmpreg &= CFGR_ADCPRE_Reset_Mask; + /* Set ADCPRE[1:0] bits according to RCC_PCLK2 value */ + tmpreg |= RCC_PCLK2; + /* Store the new value */ + RCC->CFGR = tmpreg; +} + +#ifdef STM32F10X_CL +/** + * @brief Configures the I2S2 clock source(I2S2CLK). + * @note + * - This function must be called before enabling I2S2 APB clock. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_I2S2CLKSource: specifies the I2S2 clock source. + * This parameter can be one of the following values: + * @arg RCC_I2S2CLKSource_SYSCLK: system clock selected as I2S2 clock entry + * @arg RCC_I2S2CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S2 clock entry + * @retval None + */ +void RCC_I2S2CLKConfig(uint32_t RCC_I2S2CLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_I2S2CLK_SOURCE(RCC_I2S2CLKSource)); + + *(__IO uint32_t *) CFGR2_I2S2SRC_BB = RCC_I2S2CLKSource; +} + +/** + * @brief Configures the I2S3 clock source(I2S2CLK). + * @note + * - This function must be called before enabling I2S3 APB clock. + * - This function applies only to STM32 Connectivity line devices. + * @param RCC_I2S3CLKSource: specifies the I2S3 clock source. + * This parameter can be one of the following values: + * @arg RCC_I2S3CLKSource_SYSCLK: system clock selected as I2S3 clock entry + * @arg RCC_I2S3CLKSource_PLL3_VCO: PLL3 VCO clock selected as I2S3 clock entry + * @retval None + */ +void RCC_I2S3CLKConfig(uint32_t RCC_I2S3CLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_I2S3CLK_SOURCE(RCC_I2S3CLKSource)); + + *(__IO uint32_t *) CFGR2_I2S3SRC_BB = RCC_I2S3CLKSource; +} +#endif /* STM32F10X_CL */ + +/** + * @brief Configures the External Low Speed oscillator (LSE). + * @param RCC_LSE: specifies the new state of the LSE. + * This parameter can be one of the following values: + * @arg RCC_LSE_OFF: LSE oscillator OFF + * @arg RCC_LSE_ON: LSE oscillator ON + * @arg RCC_LSE_Bypass: LSE oscillator bypassed with external clock + * @retval None + */ +void RCC_LSEConfig(uint8_t RCC_LSE) +{ + /* Check the parameters */ + assert_param(IS_RCC_LSE(RCC_LSE)); + /* Reset LSEON and LSEBYP bits before configuring the LSE ------------------*/ + /* Reset LSEON bit */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; + /* Reset LSEBYP bit */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_OFF; + /* Configure LSE (RCC_LSE_OFF is already covered by the code section above) */ + switch(RCC_LSE) + { + case RCC_LSE_ON: + /* Set LSEON bit */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_ON; + break; + + case RCC_LSE_Bypass: + /* Set LSEBYP and LSEON bits */ + *(__IO uint8_t *) BDCR_ADDRESS = RCC_LSE_Bypass | RCC_LSE_ON; + break; + + default: + break; + } +} + +/** + * @brief Enables or disables the Internal Low Speed oscillator (LSI). + * @note LSI can not be disabled if the IWDG is running. + * @param NewState: new state of the LSI. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_LSICmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CSR_LSION_BB = (uint32_t)NewState; +} + +/** + * @brief Configures the RTC clock (RTCCLK). + * @note Once the RTC clock is selected it can't be changed unless the Backup domain is reset. + * @param RCC_RTCCLKSource: specifies the RTC clock source. + * This parameter can be one of the following values: + * @arg RCC_RTCCLKSource_LSE: LSE selected as RTC clock + * @arg RCC_RTCCLKSource_LSI: LSI selected as RTC clock + * @arg RCC_RTCCLKSource_HSE_Div128: HSE clock divided by 128 selected as RTC clock + * @retval None + */ +void RCC_RTCCLKConfig(uint32_t RCC_RTCCLKSource) +{ + /* Check the parameters */ + assert_param(IS_RCC_RTCCLK_SOURCE(RCC_RTCCLKSource)); + /* Select the RTC clock source */ + RCC->BDCR |= RCC_RTCCLKSource; +} + +/** + * @brief Enables or disables the RTC clock. + * @note This function must be used only after the RTC clock was selected using the RCC_RTCCLKConfig function. + * @param NewState: new state of the RTC clock. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_RTCCLKCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) BDCR_RTCEN_BB = (uint32_t)NewState; +} + +/** + * @brief Returns the frequencies of different on chip clocks. + * @param RCC_Clocks: pointer to a RCC_ClocksTypeDef structure which will hold + * the clocks frequencies. + * @note The result of this function could be not correct when using + * fractional value for HSE crystal. + * @retval None + */ +void RCC_GetClocksFreq(RCC_ClocksTypeDef* RCC_Clocks) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, presc = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & CFGR_SWS_Mask; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + RCC_Clocks->SYSCLK_Frequency = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & CFGR_PLLMull_Mask; + pllsource = RCC->CFGR & CFGR_PLLSRC_Mask; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & CFGR_PLLXTPRE_Mask) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE >> 1) * pllmull; + } + else + { + RCC_Clocks->SYSCLK_Frequency = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + {/* HSI oscillator clock divided by 2 selected as PLL clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { /* HSE oscillator clock selected as PREDIV1 clock entry */ + RCC_Clocks->SYSCLK_Frequency = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & CFGR2_PLL2MUL) >> 8 ) + 2; + RCC_Clocks->SYSCLK_Frequency = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + RCC_Clocks->SYSCLK_Frequency = HSI_VALUE; + break; + } + + /* Compute HCLK, PCLK1, PCLK2 and ADCCLK clocks frequencies ----------------*/ + /* Get HCLK prescaler */ + tmp = RCC->CFGR & CFGR_HPRE_Set_Mask; + tmp = tmp >> 4; + presc = APBAHBPrescTable[tmp]; + /* HCLK clock frequency */ + RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> presc; + /* Get PCLK1 prescaler */ + tmp = RCC->CFGR & CFGR_PPRE1_Set_Mask; + tmp = tmp >> 8; + presc = APBAHBPrescTable[tmp]; + /* PCLK1 clock frequency */ + RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> presc; + /* Get PCLK2 prescaler */ + tmp = RCC->CFGR & CFGR_PPRE2_Set_Mask; + tmp = tmp >> 11; + presc = APBAHBPrescTable[tmp]; + /* PCLK2 clock frequency */ + RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> presc; + /* Get ADCCLK prescaler */ + tmp = RCC->CFGR & CFGR_ADCPRE_Set_Mask; + tmp = tmp >> 14; + presc = ADCPrescTable[tmp]; + /* ADCCLK clock frequency */ + RCC_Clocks->ADCCLK_Frequency = RCC_Clocks->PCLK2_Frequency / presc; +} + +/** + * @brief Enables or disables the AHB peripheral clock. + * @param RCC_AHBPeriph: specifies the AHB peripheral to gates its clock. + * + * For @b STM32_Connectivity_line_devices, this parameter can be any combination + * of the following values: + * @arg RCC_AHBPeriph_DMA1 + * @arg RCC_AHBPeriph_DMA2 + * @arg RCC_AHBPeriph_SRAM + * @arg RCC_AHBPeriph_FLITF + * @arg RCC_AHBPeriph_CRC + * @arg RCC_AHBPeriph_OTG_FS + * @arg RCC_AHBPeriph_ETH_MAC + * @arg RCC_AHBPeriph_ETH_MAC_Tx + * @arg RCC_AHBPeriph_ETH_MAC_Rx + * + * For @b other_STM32_devices, this parameter can be any combination of the + * following values: + * @arg RCC_AHBPeriph_DMA1 + * @arg RCC_AHBPeriph_DMA2 + * @arg RCC_AHBPeriph_SRAM + * @arg RCC_AHBPeriph_FLITF + * @arg RCC_AHBPeriph_CRC + * @arg RCC_AHBPeriph_FSMC + * @arg RCC_AHBPeriph_SDIO + * + * @note SRAM and FLITF clock can be disabled only during sleep mode. + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_AHBPeriphClockCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_AHB_PERIPH(RCC_AHBPeriph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + RCC->AHBENR |= RCC_AHBPeriph; + } + else + { + RCC->AHBENR &= ~RCC_AHBPeriph; + } +} + +/** + * @brief Enables or disables the High Speed APB (APB2) peripheral clock. + * @param RCC_APB2Periph: specifies the APB2 peripheral to gates its clock. + * This parameter can be any combination of the following values: + * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, + * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, + * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, + * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, + * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, + * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17, + * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11 + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB2ENR |= RCC_APB2Periph; + } + else + { + RCC->APB2ENR &= ~RCC_APB2Periph; + } +} + +/** + * @brief Enables or disables the Low Speed APB (APB1) peripheral clock. + * @param RCC_APB1Periph: specifies the APB1 peripheral to gates its clock. + * This parameter can be any combination of the following values: + * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, + * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, + * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, + * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, + * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, + * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, + * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC, + * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14 + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB1ENR |= RCC_APB1Periph; + } + else + { + RCC->APB1ENR &= ~RCC_APB1Periph; + } +} + +#ifdef STM32F10X_CL +/** + * @brief Forces or releases AHB peripheral reset. + * @note This function applies only to STM32 Connectivity line devices. + * @param RCC_AHBPeriph: specifies the AHB peripheral to reset. + * This parameter can be any combination of the following values: + * @arg RCC_AHBPeriph_OTG_FS + * @arg RCC_AHBPeriph_ETH_MAC + * @param NewState: new state of the specified peripheral reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_AHBPeriphResetCmd(uint32_t RCC_AHBPeriph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_AHB_PERIPH_RESET(RCC_AHBPeriph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + RCC->AHBRSTR |= RCC_AHBPeriph; + } + else + { + RCC->AHBRSTR &= ~RCC_AHBPeriph; + } +} +#endif /* STM32F10X_CL */ + +/** + * @brief Forces or releases High Speed APB (APB2) peripheral reset. + * @param RCC_APB2Periph: specifies the APB2 peripheral to reset. + * This parameter can be any combination of the following values: + * @arg RCC_APB2Periph_AFIO, RCC_APB2Periph_GPIOA, RCC_APB2Periph_GPIOB, + * RCC_APB2Periph_GPIOC, RCC_APB2Periph_GPIOD, RCC_APB2Periph_GPIOE, + * RCC_APB2Periph_GPIOF, RCC_APB2Periph_GPIOG, RCC_APB2Periph_ADC1, + * RCC_APB2Periph_ADC2, RCC_APB2Periph_TIM1, RCC_APB2Periph_SPI1, + * RCC_APB2Periph_TIM8, RCC_APB2Periph_USART1, RCC_APB2Periph_ADC3, + * RCC_APB2Periph_TIM15, RCC_APB2Periph_TIM16, RCC_APB2Periph_TIM17, + * RCC_APB2Periph_TIM9, RCC_APB2Periph_TIM10, RCC_APB2Periph_TIM11 + * @param NewState: new state of the specified peripheral reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB2_PERIPH(RCC_APB2Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB2RSTR |= RCC_APB2Periph; + } + else + { + RCC->APB2RSTR &= ~RCC_APB2Periph; + } +} + +/** + * @brief Forces or releases Low Speed APB (APB1) peripheral reset. + * @param RCC_APB1Periph: specifies the APB1 peripheral to reset. + * This parameter can be any combination of the following values: + * @arg RCC_APB1Periph_TIM2, RCC_APB1Periph_TIM3, RCC_APB1Periph_TIM4, + * RCC_APB1Periph_TIM5, RCC_APB1Periph_TIM6, RCC_APB1Periph_TIM7, + * RCC_APB1Periph_WWDG, RCC_APB1Periph_SPI2, RCC_APB1Periph_SPI3, + * RCC_APB1Periph_USART2, RCC_APB1Periph_USART3, RCC_APB1Periph_USART4, + * RCC_APB1Periph_USART5, RCC_APB1Periph_I2C1, RCC_APB1Periph_I2C2, + * RCC_APB1Periph_USB, RCC_APB1Periph_CAN1, RCC_APB1Periph_BKP, + * RCC_APB1Periph_PWR, RCC_APB1Periph_DAC, RCC_APB1Periph_CEC, + * RCC_APB1Periph_TIM12, RCC_APB1Periph_TIM13, RCC_APB1Periph_TIM14 + * @param NewState: new state of the specified peripheral clock. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + RCC->APB1RSTR |= RCC_APB1Periph; + } + else + { + RCC->APB1RSTR &= ~RCC_APB1Periph; + } +} + +/** + * @brief Forces or releases the Backup domain reset. + * @param NewState: new state of the Backup domain reset. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_BackupResetCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) BDCR_BDRST_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the Clock Security System. + * @param NewState: new state of the Clock Security System.. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RCC_ClockSecuritySystemCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + *(__IO uint32_t *) CR_CSSON_BB = (uint32_t)NewState; +} + +/** + * @brief Selects the clock source to output on MCO pin. + * @param RCC_MCO: specifies the clock source to output. + * + * For @b STM32_Connectivity_line_devices, this parameter can be one of the + * following values: + * @arg RCC_MCO_NoClock: No clock selected + * @arg RCC_MCO_SYSCLK: System clock selected + * @arg RCC_MCO_HSI: HSI oscillator clock selected + * @arg RCC_MCO_HSE: HSE oscillator clock selected + * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected + * @arg RCC_MCO_PLL2CLK: PLL2 clock selected + * @arg RCC_MCO_PLL3CLK_Div2: PLL3 clock divided by 2 selected + * @arg RCC_MCO_XT1: External 3-25 MHz oscillator clock selected + * @arg RCC_MCO_PLL3CLK: PLL3 clock selected + * + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_MCO_NoClock: No clock selected + * @arg RCC_MCO_SYSCLK: System clock selected + * @arg RCC_MCO_HSI: HSI oscillator clock selected + * @arg RCC_MCO_HSE: HSE oscillator clock selected + * @arg RCC_MCO_PLLCLK_Div2: PLL clock divided by 2 selected + * + * @retval None + */ +void RCC_MCOConfig(uint8_t RCC_MCO) +{ + /* Check the parameters */ + assert_param(IS_RCC_MCO(RCC_MCO)); + + /* Perform Byte access to MCO bits to select the MCO source */ + *(__IO uint8_t *) CFGR_BYTE4_ADDRESS = RCC_MCO; +} + +/** + * @brief Checks whether the specified RCC flag is set or not. + * @param RCC_FLAG: specifies the flag to check. + * + * For @b STM32_Connectivity_line_devices, this parameter can be one of the + * following values: + * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready + * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready + * @arg RCC_FLAG_PLLRDY: PLL clock ready + * @arg RCC_FLAG_PLL2RDY: PLL2 clock ready + * @arg RCC_FLAG_PLL3RDY: PLL3 clock ready + * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready + * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready + * @arg RCC_FLAG_PINRST: Pin reset + * @arg RCC_FLAG_PORRST: POR/PDR reset + * @arg RCC_FLAG_SFTRST: Software reset + * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset + * @arg RCC_FLAG_WWDGRST: Window Watchdog reset + * @arg RCC_FLAG_LPWRRST: Low Power reset + * + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_FLAG_HSIRDY: HSI oscillator clock ready + * @arg RCC_FLAG_HSERDY: HSE oscillator clock ready + * @arg RCC_FLAG_PLLRDY: PLL clock ready + * @arg RCC_FLAG_LSERDY: LSE oscillator clock ready + * @arg RCC_FLAG_LSIRDY: LSI oscillator clock ready + * @arg RCC_FLAG_PINRST: Pin reset + * @arg RCC_FLAG_PORRST: POR/PDR reset + * @arg RCC_FLAG_SFTRST: Software reset + * @arg RCC_FLAG_IWDGRST: Independent Watchdog reset + * @arg RCC_FLAG_WWDGRST: Window Watchdog reset + * @arg RCC_FLAG_LPWRRST: Low Power reset + * + * @retval The new state of RCC_FLAG (SET or RESET). + */ +FlagStatus RCC_GetFlagStatus(uint8_t RCC_FLAG) +{ + uint32_t tmp = 0; + uint32_t statusreg = 0; + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_RCC_FLAG(RCC_FLAG)); + + /* Get the RCC register index */ + tmp = RCC_FLAG >> 5; + if (tmp == 1) /* The flag to check is in CR register */ + { + statusreg = RCC->CR; + } + else if (tmp == 2) /* The flag to check is in BDCR register */ + { + statusreg = RCC->BDCR; + } + else /* The flag to check is in CSR register */ + { + statusreg = RCC->CSR; + } + + /* Get the flag position */ + tmp = RCC_FLAG & FLAG_Mask; + if ((statusreg & ((uint32_t)1 << tmp)) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + /* Return the flag status */ + return bitstatus; +} + +/** + * @brief Clears the RCC reset flags. + * @note The reset flags are: RCC_FLAG_PINRST, RCC_FLAG_PORRST, RCC_FLAG_SFTRST, + * RCC_FLAG_IWDGRST, RCC_FLAG_WWDGRST, RCC_FLAG_LPWRRST + * @param None + * @retval None + */ +void RCC_ClearFlag(void) +{ + /* Set RMVF bit to clear the reset flags */ + RCC->CSR |= CSR_RMVF_Set; +} + +/** + * @brief Checks whether the specified RCC interrupt has occurred or not. + * @param RCC_IT: specifies the RCC interrupt source to check. + * + * For @b STM32_Connectivity_line_devices, this parameter can be one of the + * following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt + * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt + * @arg RCC_IT_CSS: Clock Security System interrupt + * + * For @b other_STM32_devices, this parameter can be one of the following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_CSS: Clock Security System interrupt + * + * @retval The new state of RCC_IT (SET or RESET). + */ +ITStatus RCC_GetITStatus(uint8_t RCC_IT) +{ + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_RCC_GET_IT(RCC_IT)); + + /* Check the status of the specified RCC interrupt */ + if ((RCC->CIR & RCC_IT) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + /* Return the RCC_IT status */ + return bitstatus; +} + +/** + * @brief Clears the RCC's interrupt pending bits. + * @param RCC_IT: specifies the interrupt pending bit to clear. + * + * For @b STM32_Connectivity_line_devices, this parameter can be any combination + * of the following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * @arg RCC_IT_PLL2RDY: PLL2 ready interrupt + * @arg RCC_IT_PLL3RDY: PLL3 ready interrupt + * @arg RCC_IT_CSS: Clock Security System interrupt + * + * For @b other_STM32_devices, this parameter can be any combination of the + * following values: + * @arg RCC_IT_LSIRDY: LSI ready interrupt + * @arg RCC_IT_LSERDY: LSE ready interrupt + * @arg RCC_IT_HSIRDY: HSI ready interrupt + * @arg RCC_IT_HSERDY: HSE ready interrupt + * @arg RCC_IT_PLLRDY: PLL ready interrupt + * + * @arg RCC_IT_CSS: Clock Security System interrupt + * @retval None + */ +void RCC_ClearITPendingBit(uint8_t RCC_IT) +{ + /* Check the parameters */ + assert_param(IS_RCC_CLEAR_IT(RCC_IT)); + + /* Perform Byte access to RCC_CIR[23:16] bits to clear the selected interrupt + pending bits */ + *(__IO uint8_t *) CIR_BYTE3_ADDRESS = RCC_IT; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c index f05aef57..f798d2bd 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_rtc.c @@ -1,339 +1,339 @@ -/** - ****************************************************************************** - * @file stm32f10x_rtc.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the RTC firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_rtc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup RTC - * @brief RTC driver modules - * @{ - */ - -/** @defgroup RTC_Private_TypesDefinitions - * @{ - */ -/** - * @} - */ - -/** @defgroup RTC_Private_Defines - * @{ - */ -#define RTC_LSB_MASK ((uint32_t)0x0000FFFF) /*!< RTC LSB Mask */ -#define PRLH_MSB_MASK ((uint32_t)0x000F0000) /*!< RTC Prescaler MSB Mask */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup RTC_Private_Functions - * @{ - */ - -/** - * @brief Enables or disables the specified RTC interrupts. - * @param RTC_IT: specifies the RTC interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg RTC_IT_OW: Overflow interrupt - * @arg RTC_IT_ALR: Alarm interrupt - * @arg RTC_IT_SEC: Second interrupt - * @param NewState: new state of the specified RTC interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_RTC_IT(RTC_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - RTC->CRH |= RTC_IT; - } - else - { - RTC->CRH &= (uint16_t)~RTC_IT; - } -} - -/** - * @brief Enters the RTC configuration mode. - * @param None - * @retval None - */ -void RTC_EnterConfigMode(void) -{ - /* Set the CNF flag to enter in the Configuration Mode */ - RTC->CRL |= RTC_CRL_CNF; -} - -/** - * @brief Exits from the RTC configuration mode. - * @param None - * @retval None - */ -void RTC_ExitConfigMode(void) -{ - /* Reset the CNF flag to exit from the Configuration Mode */ - RTC->CRL &= (uint16_t)~((uint16_t)RTC_CRL_CNF); -} - -/** - * @brief Gets the RTC counter value. - * @param None - * @retval RTC counter value. - */ -uint32_t RTC_GetCounter(void) -{ - uint16_t tmp = 0; - tmp = RTC->CNTL; - return (((uint32_t)RTC->CNTH << 16 ) | tmp) ; -} - -/** - * @brief Sets the RTC counter value. - * @param CounterValue: RTC counter new value. - * @retval None - */ -void RTC_SetCounter(uint32_t CounterValue) -{ - RTC_EnterConfigMode(); - /* Set RTC COUNTER MSB word */ - RTC->CNTH = CounterValue >> 16; - /* Set RTC COUNTER LSB word */ - RTC->CNTL = (CounterValue & RTC_LSB_MASK); - RTC_ExitConfigMode(); -} - -/** - * @brief Sets the RTC prescaler value. - * @param PrescalerValue: RTC prescaler new value. - * @retval None - */ -void RTC_SetPrescaler(uint32_t PrescalerValue) -{ - /* Check the parameters */ - assert_param(IS_RTC_PRESCALER(PrescalerValue)); - - RTC_EnterConfigMode(); - /* Set RTC PRESCALER MSB word */ - RTC->PRLH = (PrescalerValue & PRLH_MSB_MASK) >> 16; - /* Set RTC PRESCALER LSB word */ - RTC->PRLL = (PrescalerValue & RTC_LSB_MASK); - RTC_ExitConfigMode(); -} - -/** - * @brief Sets the RTC alarm value. - * @param AlarmValue: RTC alarm new value. - * @retval None - */ -void RTC_SetAlarm(uint32_t AlarmValue) -{ - RTC_EnterConfigMode(); - /* Set the ALARM MSB word */ - RTC->ALRH = AlarmValue >> 16; - /* Set the ALARM LSB word */ - RTC->ALRL = (AlarmValue & RTC_LSB_MASK); - RTC_ExitConfigMode(); -} - -/** - * @brief Gets the RTC divider value. - * @param None - * @retval RTC Divider value. - */ -uint32_t RTC_GetDivider(void) -{ - uint32_t tmp = 0x00; - tmp = ((uint32_t)RTC->DIVH & (uint32_t)0x000F) << 16; - tmp |= RTC->DIVL; - return tmp; -} - -/** - * @brief Waits until last write operation on RTC registers has finished. - * @note This function must be called before any write to RTC registers. - * @param None - * @retval None - */ -void RTC_WaitForLastTask(void) -{ - /* Loop until RTOFF flag is set */ - while ((RTC->CRL & RTC_FLAG_RTOFF) == (uint16_t)RESET) - { - } -} - -/** - * @brief Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL) - * are synchronized with RTC APB clock. - * @note This function must be called before any read operation after an APB reset - * or an APB clock stop. - * @param None - * @retval None - */ -void RTC_WaitForSynchro(void) -{ - /* Clear RSF flag */ - RTC->CRL &= (uint16_t)~RTC_FLAG_RSF; - /* Loop until RSF flag is set */ - while ((RTC->CRL & RTC_FLAG_RSF) == (uint16_t)RESET) - { - } -} - -/** - * @brief Checks whether the specified RTC flag is set or not. - * @param RTC_FLAG: specifies the flag to check. - * This parameter can be one the following values: - * @arg RTC_FLAG_RTOFF: RTC Operation OFF flag - * @arg RTC_FLAG_RSF: Registers Synchronized flag - * @arg RTC_FLAG_OW: Overflow flag - * @arg RTC_FLAG_ALR: Alarm flag - * @arg RTC_FLAG_SEC: Second flag - * @retval The new state of RTC_FLAG (SET or RESET). - */ -FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG) -{ - FlagStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_RTC_GET_FLAG(RTC_FLAG)); - - if ((RTC->CRL & RTC_FLAG) != (uint16_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the RTC's pending flags. - * @param RTC_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg RTC_FLAG_RSF: Registers Synchronized flag. This flag is cleared only after - * an APB reset or an APB Clock stop. - * @arg RTC_FLAG_OW: Overflow flag - * @arg RTC_FLAG_ALR: Alarm flag - * @arg RTC_FLAG_SEC: Second flag - * @retval None - */ -void RTC_ClearFlag(uint16_t RTC_FLAG) -{ - /* Check the parameters */ - assert_param(IS_RTC_CLEAR_FLAG(RTC_FLAG)); - - /* Clear the corresponding RTC flag */ - RTC->CRL &= (uint16_t)~RTC_FLAG; -} - -/** - * @brief Checks whether the specified RTC interrupt has occurred or not. - * @param RTC_IT: specifies the RTC interrupts sources to check. - * This parameter can be one of the following values: - * @arg RTC_IT_OW: Overflow interrupt - * @arg RTC_IT_ALR: Alarm interrupt - * @arg RTC_IT_SEC: Second interrupt - * @retval The new state of the RTC_IT (SET or RESET). - */ -ITStatus RTC_GetITStatus(uint16_t RTC_IT) -{ - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_RTC_GET_IT(RTC_IT)); - - bitstatus = (ITStatus)(RTC->CRL & RTC_IT); - if (((RTC->CRH & RTC_IT) != (uint16_t)RESET) && (bitstatus != (uint16_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the RTC's interrupt pending bits. - * @param RTC_IT: specifies the interrupt pending bit to clear. - * This parameter can be any combination of the following values: - * @arg RTC_IT_OW: Overflow interrupt - * @arg RTC_IT_ALR: Alarm interrupt - * @arg RTC_IT_SEC: Second interrupt - * @retval None - */ -void RTC_ClearITPendingBit(uint16_t RTC_IT) -{ - /* Check the parameters */ - assert_param(IS_RTC_IT(RTC_IT)); - - /* Clear the corresponding RTC pending bit */ - RTC->CRL &= (uint16_t)~RTC_IT; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_rtc.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the RTC firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_rtc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup RTC + * @brief RTC driver modules + * @{ + */ + +/** @defgroup RTC_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + +/** @defgroup RTC_Private_Defines + * @{ + */ +#define RTC_LSB_MASK ((uint32_t)0x0000FFFF) /*!< RTC LSB Mask */ +#define PRLH_MSB_MASK ((uint32_t)0x000F0000) /*!< RTC Prescaler MSB Mask */ + +/** + * @} + */ + +/** @defgroup RTC_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup RTC_Private_Functions + * @{ + */ + +/** + * @brief Enables or disables the specified RTC interrupts. + * @param RTC_IT: specifies the RTC interrupts sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg RTC_IT_OW: Overflow interrupt + * @arg RTC_IT_ALR: Alarm interrupt + * @arg RTC_IT_SEC: Second interrupt + * @param NewState: new state of the specified RTC interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void RTC_ITConfig(uint16_t RTC_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_RTC_IT(RTC_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + RTC->CRH |= RTC_IT; + } + else + { + RTC->CRH &= (uint16_t)~RTC_IT; + } +} + +/** + * @brief Enters the RTC configuration mode. + * @param None + * @retval None + */ +void RTC_EnterConfigMode(void) +{ + /* Set the CNF flag to enter in the Configuration Mode */ + RTC->CRL |= RTC_CRL_CNF; +} + +/** + * @brief Exits from the RTC configuration mode. + * @param None + * @retval None + */ +void RTC_ExitConfigMode(void) +{ + /* Reset the CNF flag to exit from the Configuration Mode */ + RTC->CRL &= (uint16_t)~((uint16_t)RTC_CRL_CNF); +} + +/** + * @brief Gets the RTC counter value. + * @param None + * @retval RTC counter value. + */ +uint32_t RTC_GetCounter(void) +{ + uint16_t tmp = 0; + tmp = RTC->CNTL; + return (((uint32_t)RTC->CNTH << 16 ) | tmp) ; +} + +/** + * @brief Sets the RTC counter value. + * @param CounterValue: RTC counter new value. + * @retval None + */ +void RTC_SetCounter(uint32_t CounterValue) +{ + RTC_EnterConfigMode(); + /* Set RTC COUNTER MSB word */ + RTC->CNTH = CounterValue >> 16; + /* Set RTC COUNTER LSB word */ + RTC->CNTL = (CounterValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/** + * @brief Sets the RTC prescaler value. + * @param PrescalerValue: RTC prescaler new value. + * @retval None + */ +void RTC_SetPrescaler(uint32_t PrescalerValue) +{ + /* Check the parameters */ + assert_param(IS_RTC_PRESCALER(PrescalerValue)); + + RTC_EnterConfigMode(); + /* Set RTC PRESCALER MSB word */ + RTC->PRLH = (PrescalerValue & PRLH_MSB_MASK) >> 16; + /* Set RTC PRESCALER LSB word */ + RTC->PRLL = (PrescalerValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/** + * @brief Sets the RTC alarm value. + * @param AlarmValue: RTC alarm new value. + * @retval None + */ +void RTC_SetAlarm(uint32_t AlarmValue) +{ + RTC_EnterConfigMode(); + /* Set the ALARM MSB word */ + RTC->ALRH = AlarmValue >> 16; + /* Set the ALARM LSB word */ + RTC->ALRL = (AlarmValue & RTC_LSB_MASK); + RTC_ExitConfigMode(); +} + +/** + * @brief Gets the RTC divider value. + * @param None + * @retval RTC Divider value. + */ +uint32_t RTC_GetDivider(void) +{ + uint32_t tmp = 0x00; + tmp = ((uint32_t)RTC->DIVH & (uint32_t)0x000F) << 16; + tmp |= RTC->DIVL; + return tmp; +} + +/** + * @brief Waits until last write operation on RTC registers has finished. + * @note This function must be called before any write to RTC registers. + * @param None + * @retval None + */ +void RTC_WaitForLastTask(void) +{ + /* Loop until RTOFF flag is set */ + while ((RTC->CRL & RTC_FLAG_RTOFF) == (uint16_t)RESET) + { + } +} + +/** + * @brief Waits until the RTC registers (RTC_CNT, RTC_ALR and RTC_PRL) + * are synchronized with RTC APB clock. + * @note This function must be called before any read operation after an APB reset + * or an APB clock stop. + * @param None + * @retval None + */ +void RTC_WaitForSynchro(void) +{ + /* Clear RSF flag */ + RTC->CRL &= (uint16_t)~RTC_FLAG_RSF; + /* Loop until RSF flag is set */ + while ((RTC->CRL & RTC_FLAG_RSF) == (uint16_t)RESET) + { + } +} + +/** + * @brief Checks whether the specified RTC flag is set or not. + * @param RTC_FLAG: specifies the flag to check. + * This parameter can be one the following values: + * @arg RTC_FLAG_RTOFF: RTC Operation OFF flag + * @arg RTC_FLAG_RSF: Registers Synchronized flag + * @arg RTC_FLAG_OW: Overflow flag + * @arg RTC_FLAG_ALR: Alarm flag + * @arg RTC_FLAG_SEC: Second flag + * @retval The new state of RTC_FLAG (SET or RESET). + */ +FlagStatus RTC_GetFlagStatus(uint16_t RTC_FLAG) +{ + FlagStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_RTC_GET_FLAG(RTC_FLAG)); + + if ((RTC->CRL & RTC_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the RTC's pending flags. + * @param RTC_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg RTC_FLAG_RSF: Registers Synchronized flag. This flag is cleared only after + * an APB reset or an APB Clock stop. + * @arg RTC_FLAG_OW: Overflow flag + * @arg RTC_FLAG_ALR: Alarm flag + * @arg RTC_FLAG_SEC: Second flag + * @retval None + */ +void RTC_ClearFlag(uint16_t RTC_FLAG) +{ + /* Check the parameters */ + assert_param(IS_RTC_CLEAR_FLAG(RTC_FLAG)); + + /* Clear the corresponding RTC flag */ + RTC->CRL &= (uint16_t)~RTC_FLAG; +} + +/** + * @brief Checks whether the specified RTC interrupt has occurred or not. + * @param RTC_IT: specifies the RTC interrupts sources to check. + * This parameter can be one of the following values: + * @arg RTC_IT_OW: Overflow interrupt + * @arg RTC_IT_ALR: Alarm interrupt + * @arg RTC_IT_SEC: Second interrupt + * @retval The new state of the RTC_IT (SET or RESET). + */ +ITStatus RTC_GetITStatus(uint16_t RTC_IT) +{ + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_RTC_GET_IT(RTC_IT)); + + bitstatus = (ITStatus)(RTC->CRL & RTC_IT); + if (((RTC->CRH & RTC_IT) != (uint16_t)RESET) && (bitstatus != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the RTC's interrupt pending bits. + * @param RTC_IT: specifies the interrupt pending bit to clear. + * This parameter can be any combination of the following values: + * @arg RTC_IT_OW: Overflow interrupt + * @arg RTC_IT_ALR: Alarm interrupt + * @arg RTC_IT_SEC: Second interrupt + * @retval None + */ +void RTC_ClearITPendingBit(uint16_t RTC_IT) +{ + /* Check the parameters */ + assert_param(IS_RTC_IT(RTC_IT)); + + /* Clear the corresponding RTC pending bit */ + RTC->CRL &= (uint16_t)~RTC_IT; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c index bc1719d7..d1870cef 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_sdio.c @@ -1,799 +1,799 @@ -/** - ****************************************************************************** - * @file stm32f10x_sdio.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the SDIO firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_sdio.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup SDIO - * @brief SDIO driver modules - * @{ - */ - -/** @defgroup SDIO_Private_TypesDefinitions - * @{ - */ - -/* ------------ SDIO registers bit address in the alias region ----------- */ -#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) - -/* --- CLKCR Register ---*/ - -/* Alias word address of CLKEN bit */ -#define CLKCR_OFFSET (SDIO_OFFSET + 0x04) -#define CLKEN_BitNumber 0x08 -#define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) - -/* --- CMD Register ---*/ - -/* Alias word address of SDIOSUSPEND bit */ -#define CMD_OFFSET (SDIO_OFFSET + 0x0C) -#define SDIOSUSPEND_BitNumber 0x0B -#define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) - -/* Alias word address of ENCMDCOMPL bit */ -#define ENCMDCOMPL_BitNumber 0x0C -#define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) - -/* Alias word address of NIEN bit */ -#define NIEN_BitNumber 0x0D -#define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) - -/* Alias word address of ATACMD bit */ -#define ATACMD_BitNumber 0x0E -#define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) - -/* --- DCTRL Register ---*/ - -/* Alias word address of DMAEN bit */ -#define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) -#define DMAEN_BitNumber 0x03 -#define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) - -/* Alias word address of RWSTART bit */ -#define RWSTART_BitNumber 0x08 -#define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) - -/* Alias word address of RWSTOP bit */ -#define RWSTOP_BitNumber 0x09 -#define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) - -/* Alias word address of RWMOD bit */ -#define RWMOD_BitNumber 0x0A -#define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) - -/* Alias word address of SDIOEN bit */ -#define SDIOEN_BitNumber 0x0B -#define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) - -/* ---------------------- SDIO registers bit mask ------------------------ */ - -/* --- CLKCR Register ---*/ - -/* CLKCR register clear mask */ -#define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) - -/* --- PWRCTRL Register ---*/ - -/* SDIO PWRCTRL Mask */ -#define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) - -/* --- DCTRL Register ---*/ - -/* SDIO DCTRL Clear Mask */ -#define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) - -/* --- CMD Register ---*/ - -/* CMD Register clear mask */ -#define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) - -/* SDIO RESP Registers Address */ -#define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) - -/** - * @} - */ - -/** @defgroup SDIO_Private_Defines - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup SDIO_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the SDIO peripheral registers to their default reset values. - * @param None - * @retval None - */ -void SDIO_DeInit(void) -{ - SDIO->POWER = 0x00000000; - SDIO->CLKCR = 0x00000000; - SDIO->ARG = 0x00000000; - SDIO->CMD = 0x00000000; - SDIO->DTIMER = 0x00000000; - SDIO->DLEN = 0x00000000; - SDIO->DCTRL = 0x00000000; - SDIO->ICR = 0x00C007FF; - SDIO->MASK = 0x00000000; -} - -/** - * @brief Initializes the SDIO peripheral according to the specified - * parameters in the SDIO_InitStruct. - * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure - * that contains the configuration information for the SDIO peripheral. - * @retval None - */ -void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); - assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); - assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); - assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); - assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); - -/*---------------------------- SDIO CLKCR Configuration ------------------------*/ - /* Get the SDIO CLKCR value */ - tmpreg = SDIO->CLKCR; - - /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ - tmpreg &= CLKCR_CLEAR_MASK; - - /* Set CLKDIV bits according to SDIO_ClockDiv value */ - /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ - /* Set BYPASS bit according to SDIO_ClockBypass value */ - /* Set WIDBUS bits according to SDIO_BusWide value */ - /* Set NEGEDGE bits according to SDIO_ClockEdge value */ - /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ - tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | - SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | - SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); - - /* Write to SDIO CLKCR */ - SDIO->CLKCR = tmpreg; -} - -/** - * @brief Fills each SDIO_InitStruct member with its default value. - * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which - * will be initialized. - * @retval None - */ -void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) -{ - /* SDIO_InitStruct members default value */ - SDIO_InitStruct->SDIO_ClockDiv = 0x00; - SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; - SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; - SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; - SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; - SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; -} - -/** - * @brief Enables or disables the SDIO Clock. - * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_ClockCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; -} - -/** - * @brief Sets the power status of the controller. - * @param SDIO_PowerState: new state of the Power state. - * This parameter can be one of the following values: - * @arg SDIO_PowerState_OFF - * @arg SDIO_PowerState_ON - * @retval None - */ -void SDIO_SetPowerState(uint32_t SDIO_PowerState) -{ - /* Check the parameters */ - assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); - - SDIO->POWER &= PWR_PWRCTRL_MASK; - SDIO->POWER |= SDIO_PowerState; -} - -/** - * @brief Gets the power status of the controller. - * @param None - * @retval Power status of the controller. The returned value can - * be one of the following: - * - 0x00: Power OFF - * - 0x02: Power UP - * - 0x03: Power ON - */ -uint32_t SDIO_GetPowerState(void) -{ - return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); -} - -/** - * @brief Enables or disables the SDIO interrupts. - * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. - * This parameter can be one or a combination of the following values: - * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt - * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide - * bus mode interrupt - * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt - * @arg SDIO_IT_TXACT: Data transmit in progress interrupt - * @arg SDIO_IT_RXACT: Data receive in progress interrupt - * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt - * @param NewState: new state of the specified SDIO interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SDIO_IT(SDIO_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the SDIO interrupts */ - SDIO->MASK |= SDIO_IT; - } - else - { - /* Disable the SDIO interrupts */ - SDIO->MASK &= ~SDIO_IT; - } -} - -/** - * @brief Enables or disables the SDIO DMA request. - * @param NewState: new state of the selected SDIO DMA request. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_DMACmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; -} - -/** - * @brief Initializes the SDIO Command according to the specified - * parameters in the SDIO_CmdInitStruct and send the command. - * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef - * structure that contains the configuration information for the SDIO command. - * @retval None - */ -void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); - assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); - assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); - assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); - -/*---------------------------- SDIO ARG Configuration ------------------------*/ - /* Set the SDIO Argument value */ - SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; - -/*---------------------------- SDIO CMD Configuration ------------------------*/ - /* Get the SDIO CMD value */ - tmpreg = SDIO->CMD; - /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ - tmpreg &= CMD_CLEAR_MASK; - /* Set CMDINDEX bits according to SDIO_CmdIndex value */ - /* Set WAITRESP bits according to SDIO_Response value */ - /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ - /* Set CPSMEN bits according to SDIO_CPSM value */ - tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response - | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; - - /* Write to SDIO CMD */ - SDIO->CMD = tmpreg; -} - -/** - * @brief Fills each SDIO_CmdInitStruct member with its default value. - * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef - * structure which will be initialized. - * @retval None - */ -void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) -{ - /* SDIO_CmdInitStruct members default value */ - SDIO_CmdInitStruct->SDIO_Argument = 0x00; - SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; - SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; - SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; - SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; -} - -/** - * @brief Returns command index of last command for which response received. - * @param None - * @retval Returns the command index of the last command response received. - */ -uint8_t SDIO_GetCommandResponse(void) -{ - return (uint8_t)(SDIO->RESPCMD); -} - -/** - * @brief Returns response received from the card for the last command. - * @param SDIO_RESP: Specifies the SDIO response register. - * This parameter can be one of the following values: - * @arg SDIO_RESP1: Response Register 1 - * @arg SDIO_RESP2: Response Register 2 - * @arg SDIO_RESP3: Response Register 3 - * @arg SDIO_RESP4: Response Register 4 - * @retval The Corresponding response register value. - */ -uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_RESP(SDIO_RESP)); - - tmp = SDIO_RESP_ADDR + SDIO_RESP; - - return (*(__IO uint32_t *) tmp); -} - -/** - * @brief Initializes the SDIO data path according to the specified - * parameters in the SDIO_DataInitStruct. - * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that - * contains the configuration information for the SDIO command. - * @retval None - */ -void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); - assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); - assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); - assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); - assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); - -/*---------------------------- SDIO DTIMER Configuration ---------------------*/ - /* Set the SDIO Data TimeOut value */ - SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; - -/*---------------------------- SDIO DLEN Configuration -----------------------*/ - /* Set the SDIO DataLength value */ - SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; - -/*---------------------------- SDIO DCTRL Configuration ----------------------*/ - /* Get the SDIO DCTRL value */ - tmpreg = SDIO->DCTRL; - /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ - tmpreg &= DCTRL_CLEAR_MASK; - /* Set DEN bit according to SDIO_DPSM value */ - /* Set DTMODE bit according to SDIO_TransferMode value */ - /* Set DTDIR bit according to SDIO_TransferDir value */ - /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ - tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir - | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; - - /* Write to SDIO DCTRL */ - SDIO->DCTRL = tmpreg; -} - -/** - * @brief Fills each SDIO_DataInitStruct member with its default value. - * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which - * will be initialized. - * @retval None - */ -void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) -{ - /* SDIO_DataInitStruct members default value */ - SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; - SDIO_DataInitStruct->SDIO_DataLength = 0x00; - SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; - SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; - SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; - SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; -} - -/** - * @brief Returns number of remaining data bytes to be transferred. - * @param None - * @retval Number of remaining data bytes to be transferred - */ -uint32_t SDIO_GetDataCounter(void) -{ - return SDIO->DCOUNT; -} - -/** - * @brief Read one data word from Rx FIFO. - * @param None - * @retval Data received - */ -uint32_t SDIO_ReadData(void) -{ - return SDIO->FIFO; -} - -/** - * @brief Write one data word to Tx FIFO. - * @param Data: 32-bit data word to write. - * @retval None - */ -void SDIO_WriteData(uint32_t Data) -{ - SDIO->FIFO = Data; -} - -/** - * @brief Returns the number of words left to be written to or read from FIFO. - * @param None - * @retval Remaining number of words. - */ -uint32_t SDIO_GetFIFOCount(void) -{ - return SDIO->FIFOCNT; -} - -/** - * @brief Starts the SD I/O Read Wait operation. - * @param NewState: new state of the Start SDIO Read Wait operation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_StartSDIOReadWait(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; -} - -/** - * @brief Stops the SD I/O Read Wait operation. - * @param NewState: new state of the Stop SDIO Read Wait operation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_StopSDIOReadWait(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; -} - -/** - * @brief Sets one of the two options of inserting read wait interval. - * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. - * This parameter can be: - * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK - * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2 - * @retval None - */ -void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) -{ - /* Check the parameters */ - assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); - - *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; -} - -/** - * @brief Enables or disables the SD I/O Mode Operation. - * @param NewState: new state of SDIO specific operation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_SetSDIOOperation(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the SD I/O Mode suspend command sending. - * @param NewState: new state of the SD I/O Mode suspend command. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the command completion signal. - * @param NewState: new state of command completion signal. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_CommandCompletionCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; -} - -/** - * @brief Enables or disables the CE-ATA interrupt. - * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_CEATAITCmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); -} - -/** - * @brief Sends CE-ATA command (CMD61). - * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SDIO_SendCEATACmd(FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; -} - -/** - * @brief Checks whether the specified SDIO flag is set or not. - * @param SDIO_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDIO_FLAG_CTIMEOUT: Command response timeout - * @arg SDIO_FLAG_DTIMEOUT: Data timeout - * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) - * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) - * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide - * bus mode. - * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDIO_FLAG_CMDACT: Command transfer in progress - * @arg SDIO_FLAG_TXACT: Data transmit in progress - * @arg SDIO_FLAG_RXACT: Data receive in progress - * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty - * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full - * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full - * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full - * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty - * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty - * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO - * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO - * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received - * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 - * @retval The new state of SDIO_FLAG (SET or RESET). - */ -FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) -{ - FlagStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_SDIO_FLAG(SDIO_FLAG)); - - if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the SDIO's pending flags. - * @param SDIO_FLAG: specifies the flag to clear. - * This parameter can be one or a combination of the following values: - * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDIO_FLAG_CTIMEOUT: Command response timeout - * @arg SDIO_FLAG_DTIMEOUT: Data timeout - * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) - * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) - * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide - * bus mode - * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received - * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 - * @retval None - */ -void SDIO_ClearFlag(uint32_t SDIO_FLAG) -{ - /* Check the parameters */ - assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); - - SDIO->ICR = SDIO_FLAG; -} - -/** - * @brief Checks whether the specified SDIO interrupt has occurred or not. - * @param SDIO_IT: specifies the SDIO interrupt source to check. - * This parameter can be one of the following values: - * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt - * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide - * bus mode interrupt - * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt - * @arg SDIO_IT_TXACT: Data transmit in progress interrupt - * @arg SDIO_IT_RXACT: Data receive in progress interrupt - * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt - * @retval The new state of SDIO_IT (SET or RESET). - */ -ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) -{ - ITStatus bitstatus = RESET; - - /* Check the parameters */ - assert_param(IS_SDIO_GET_IT(SDIO_IT)); - if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the SDIO's interrupt pending bits. - * @param SDIO_IT: specifies the interrupt pending bit to clear. - * This parameter can be one or a combination of the following values: - * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt - * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide - * bus mode interrupt - * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt - * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 - * @retval None - */ -void SDIO_ClearITPendingBit(uint32_t SDIO_IT) -{ - /* Check the parameters */ - assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); - - SDIO->ICR = SDIO_IT; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_sdio.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the SDIO firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_sdio.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup SDIO + * @brief SDIO driver modules + * @{ + */ + +/** @defgroup SDIO_Private_TypesDefinitions + * @{ + */ + +/* ------------ SDIO registers bit address in the alias region ----------- */ +#define SDIO_OFFSET (SDIO_BASE - PERIPH_BASE) + +/* --- CLKCR Register ---*/ + +/* Alias word address of CLKEN bit */ +#define CLKCR_OFFSET (SDIO_OFFSET + 0x04) +#define CLKEN_BitNumber 0x08 +#define CLKCR_CLKEN_BB (PERIPH_BB_BASE + (CLKCR_OFFSET * 32) + (CLKEN_BitNumber * 4)) + +/* --- CMD Register ---*/ + +/* Alias word address of SDIOSUSPEND bit */ +#define CMD_OFFSET (SDIO_OFFSET + 0x0C) +#define SDIOSUSPEND_BitNumber 0x0B +#define CMD_SDIOSUSPEND_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (SDIOSUSPEND_BitNumber * 4)) + +/* Alias word address of ENCMDCOMPL bit */ +#define ENCMDCOMPL_BitNumber 0x0C +#define CMD_ENCMDCOMPL_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ENCMDCOMPL_BitNumber * 4)) + +/* Alias word address of NIEN bit */ +#define NIEN_BitNumber 0x0D +#define CMD_NIEN_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (NIEN_BitNumber * 4)) + +/* Alias word address of ATACMD bit */ +#define ATACMD_BitNumber 0x0E +#define CMD_ATACMD_BB (PERIPH_BB_BASE + (CMD_OFFSET * 32) + (ATACMD_BitNumber * 4)) + +/* --- DCTRL Register ---*/ + +/* Alias word address of DMAEN bit */ +#define DCTRL_OFFSET (SDIO_OFFSET + 0x2C) +#define DMAEN_BitNumber 0x03 +#define DCTRL_DMAEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (DMAEN_BitNumber * 4)) + +/* Alias word address of RWSTART bit */ +#define RWSTART_BitNumber 0x08 +#define DCTRL_RWSTART_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTART_BitNumber * 4)) + +/* Alias word address of RWSTOP bit */ +#define RWSTOP_BitNumber 0x09 +#define DCTRL_RWSTOP_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWSTOP_BitNumber * 4)) + +/* Alias word address of RWMOD bit */ +#define RWMOD_BitNumber 0x0A +#define DCTRL_RWMOD_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (RWMOD_BitNumber * 4)) + +/* Alias word address of SDIOEN bit */ +#define SDIOEN_BitNumber 0x0B +#define DCTRL_SDIOEN_BB (PERIPH_BB_BASE + (DCTRL_OFFSET * 32) + (SDIOEN_BitNumber * 4)) + +/* ---------------------- SDIO registers bit mask ------------------------ */ + +/* --- CLKCR Register ---*/ + +/* CLKCR register clear mask */ +#define CLKCR_CLEAR_MASK ((uint32_t)0xFFFF8100) + +/* --- PWRCTRL Register ---*/ + +/* SDIO PWRCTRL Mask */ +#define PWR_PWRCTRL_MASK ((uint32_t)0xFFFFFFFC) + +/* --- DCTRL Register ---*/ + +/* SDIO DCTRL Clear Mask */ +#define DCTRL_CLEAR_MASK ((uint32_t)0xFFFFFF08) + +/* --- CMD Register ---*/ + +/* CMD Register clear mask */ +#define CMD_CLEAR_MASK ((uint32_t)0xFFFFF800) + +/* SDIO RESP Registers Address */ +#define SDIO_RESP_ADDR ((uint32_t)(SDIO_BASE + 0x14)) + +/** + * @} + */ + +/** @defgroup SDIO_Private_Defines + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup SDIO_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the SDIO peripheral registers to their default reset values. + * @param None + * @retval None + */ +void SDIO_DeInit(void) +{ + SDIO->POWER = 0x00000000; + SDIO->CLKCR = 0x00000000; + SDIO->ARG = 0x00000000; + SDIO->CMD = 0x00000000; + SDIO->DTIMER = 0x00000000; + SDIO->DLEN = 0x00000000; + SDIO->DCTRL = 0x00000000; + SDIO->ICR = 0x00C007FF; + SDIO->MASK = 0x00000000; +} + +/** + * @brief Initializes the SDIO peripheral according to the specified + * parameters in the SDIO_InitStruct. + * @param SDIO_InitStruct : pointer to a SDIO_InitTypeDef structure + * that contains the configuration information for the SDIO peripheral. + * @retval None + */ +void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_CLOCK_EDGE(SDIO_InitStruct->SDIO_ClockEdge)); + assert_param(IS_SDIO_CLOCK_BYPASS(SDIO_InitStruct->SDIO_ClockBypass)); + assert_param(IS_SDIO_CLOCK_POWER_SAVE(SDIO_InitStruct->SDIO_ClockPowerSave)); + assert_param(IS_SDIO_BUS_WIDE(SDIO_InitStruct->SDIO_BusWide)); + assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(SDIO_InitStruct->SDIO_HardwareFlowControl)); + +/*---------------------------- SDIO CLKCR Configuration ------------------------*/ + /* Get the SDIO CLKCR value */ + tmpreg = SDIO->CLKCR; + + /* Clear CLKDIV, PWRSAV, BYPASS, WIDBUS, NEGEDGE, HWFC_EN bits */ + tmpreg &= CLKCR_CLEAR_MASK; + + /* Set CLKDIV bits according to SDIO_ClockDiv value */ + /* Set PWRSAV bit according to SDIO_ClockPowerSave value */ + /* Set BYPASS bit according to SDIO_ClockBypass value */ + /* Set WIDBUS bits according to SDIO_BusWide value */ + /* Set NEGEDGE bits according to SDIO_ClockEdge value */ + /* Set HWFC_EN bits according to SDIO_HardwareFlowControl value */ + tmpreg |= (SDIO_InitStruct->SDIO_ClockDiv | SDIO_InitStruct->SDIO_ClockPowerSave | + SDIO_InitStruct->SDIO_ClockBypass | SDIO_InitStruct->SDIO_BusWide | + SDIO_InitStruct->SDIO_ClockEdge | SDIO_InitStruct->SDIO_HardwareFlowControl); + + /* Write to SDIO CLKCR */ + SDIO->CLKCR = tmpreg; +} + +/** + * @brief Fills each SDIO_InitStruct member with its default value. + * @param SDIO_InitStruct: pointer to an SDIO_InitTypeDef structure which + * will be initialized. + * @retval None + */ +void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct) +{ + /* SDIO_InitStruct members default value */ + SDIO_InitStruct->SDIO_ClockDiv = 0x00; + SDIO_InitStruct->SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStruct->SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStruct->SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStruct->SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStruct->SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; +} + +/** + * @brief Enables or disables the SDIO Clock. + * @param NewState: new state of the SDIO Clock. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_ClockCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CLKCR_CLKEN_BB = (uint32_t)NewState; +} + +/** + * @brief Sets the power status of the controller. + * @param SDIO_PowerState: new state of the Power state. + * This parameter can be one of the following values: + * @arg SDIO_PowerState_OFF + * @arg SDIO_PowerState_ON + * @retval None + */ +void SDIO_SetPowerState(uint32_t SDIO_PowerState) +{ + /* Check the parameters */ + assert_param(IS_SDIO_POWER_STATE(SDIO_PowerState)); + + SDIO->POWER &= PWR_PWRCTRL_MASK; + SDIO->POWER |= SDIO_PowerState; +} + +/** + * @brief Gets the power status of the controller. + * @param None + * @retval Power status of the controller. The returned value can + * be one of the following: + * - 0x00: Power OFF + * - 0x02: Power UP + * - 0x03: Power ON + */ +uint32_t SDIO_GetPowerState(void) +{ + return (SDIO->POWER & (~PWR_PWRCTRL_MASK)); +} + +/** + * @brief Enables or disables the SDIO interrupts. + * @param SDIO_IT: specifies the SDIO interrupt sources to be enabled or disabled. + * This parameter can be one or a combination of the following values: + * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt + * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt + * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt + * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt + * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt + * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt + * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt + * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt + * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt + * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide + * bus mode interrupt + * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt + * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt + * @arg SDIO_IT_TXACT: Data transmit in progress interrupt + * @arg SDIO_IT_RXACT: Data receive in progress interrupt + * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt + * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt + * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt + * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt + * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt + * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt + * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt + * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt + * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt + * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt + * @param NewState: new state of the specified SDIO interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SDIO_IT(SDIO_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the SDIO interrupts */ + SDIO->MASK |= SDIO_IT; + } + else + { + /* Disable the SDIO interrupts */ + SDIO->MASK &= ~SDIO_IT; + } +} + +/** + * @brief Enables or disables the SDIO DMA request. + * @param NewState: new state of the selected SDIO DMA request. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_DMACmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_DMAEN_BB = (uint32_t)NewState; +} + +/** + * @brief Initializes the SDIO Command according to the specified + * parameters in the SDIO_CmdInitStruct and send the command. + * @param SDIO_CmdInitStruct : pointer to a SDIO_CmdInitTypeDef + * structure that contains the configuration information for the SDIO command. + * @retval None + */ +void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->SDIO_CmdIndex)); + assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->SDIO_Response)); + assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->SDIO_Wait)); + assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->SDIO_CPSM)); + +/*---------------------------- SDIO ARG Configuration ------------------------*/ + /* Set the SDIO Argument value */ + SDIO->ARG = SDIO_CmdInitStruct->SDIO_Argument; + +/*---------------------------- SDIO CMD Configuration ------------------------*/ + /* Get the SDIO CMD value */ + tmpreg = SDIO->CMD; + /* Clear CMDINDEX, WAITRESP, WAITINT, WAITPEND, CPSMEN bits */ + tmpreg &= CMD_CLEAR_MASK; + /* Set CMDINDEX bits according to SDIO_CmdIndex value */ + /* Set WAITRESP bits according to SDIO_Response value */ + /* Set WAITINT and WAITPEND bits according to SDIO_Wait value */ + /* Set CPSMEN bits according to SDIO_CPSM value */ + tmpreg |= (uint32_t)SDIO_CmdInitStruct->SDIO_CmdIndex | SDIO_CmdInitStruct->SDIO_Response + | SDIO_CmdInitStruct->SDIO_Wait | SDIO_CmdInitStruct->SDIO_CPSM; + + /* Write to SDIO CMD */ + SDIO->CMD = tmpreg; +} + +/** + * @brief Fills each SDIO_CmdInitStruct member with its default value. + * @param SDIO_CmdInitStruct: pointer to an SDIO_CmdInitTypeDef + * structure which will be initialized. + * @retval None + */ +void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct) +{ + /* SDIO_CmdInitStruct members default value */ + SDIO_CmdInitStruct->SDIO_Argument = 0x00; + SDIO_CmdInitStruct->SDIO_CmdIndex = 0x00; + SDIO_CmdInitStruct->SDIO_Response = SDIO_Response_No; + SDIO_CmdInitStruct->SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStruct->SDIO_CPSM = SDIO_CPSM_Disable; +} + +/** + * @brief Returns command index of last command for which response received. + * @param None + * @retval Returns the command index of the last command response received. + */ +uint8_t SDIO_GetCommandResponse(void) +{ + return (uint8_t)(SDIO->RESPCMD); +} + +/** + * @brief Returns response received from the card for the last command. + * @param SDIO_RESP: Specifies the SDIO response register. + * This parameter can be one of the following values: + * @arg SDIO_RESP1: Response Register 1 + * @arg SDIO_RESP2: Response Register 2 + * @arg SDIO_RESP3: Response Register 3 + * @arg SDIO_RESP4: Response Register 4 + * @retval The Corresponding response register value. + */ +uint32_t SDIO_GetResponse(uint32_t SDIO_RESP) +{ + __IO uint32_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_RESP(SDIO_RESP)); + + tmp = SDIO_RESP_ADDR + SDIO_RESP; + + return (*(__IO uint32_t *) tmp); +} + +/** + * @brief Initializes the SDIO data path according to the specified + * parameters in the SDIO_DataInitStruct. + * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure that + * contains the configuration information for the SDIO command. + * @retval None + */ +void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct) +{ + uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->SDIO_DataLength)); + assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->SDIO_DataBlockSize)); + assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->SDIO_TransferDir)); + assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->SDIO_TransferMode)); + assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->SDIO_DPSM)); + +/*---------------------------- SDIO DTIMER Configuration ---------------------*/ + /* Set the SDIO Data TimeOut value */ + SDIO->DTIMER = SDIO_DataInitStruct->SDIO_DataTimeOut; + +/*---------------------------- SDIO DLEN Configuration -----------------------*/ + /* Set the SDIO DataLength value */ + SDIO->DLEN = SDIO_DataInitStruct->SDIO_DataLength; + +/*---------------------------- SDIO DCTRL Configuration ----------------------*/ + /* Get the SDIO DCTRL value */ + tmpreg = SDIO->DCTRL; + /* Clear DEN, DTMODE, DTDIR and DBCKSIZE bits */ + tmpreg &= DCTRL_CLEAR_MASK; + /* Set DEN bit according to SDIO_DPSM value */ + /* Set DTMODE bit according to SDIO_TransferMode value */ + /* Set DTDIR bit according to SDIO_TransferDir value */ + /* Set DBCKSIZE bits according to SDIO_DataBlockSize value */ + tmpreg |= (uint32_t)SDIO_DataInitStruct->SDIO_DataBlockSize | SDIO_DataInitStruct->SDIO_TransferDir + | SDIO_DataInitStruct->SDIO_TransferMode | SDIO_DataInitStruct->SDIO_DPSM; + + /* Write to SDIO DCTRL */ + SDIO->DCTRL = tmpreg; +} + +/** + * @brief Fills each SDIO_DataInitStruct member with its default value. + * @param SDIO_DataInitStruct: pointer to an SDIO_DataInitTypeDef structure which + * will be initialized. + * @retval None + */ +void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct) +{ + /* SDIO_DataInitStruct members default value */ + SDIO_DataInitStruct->SDIO_DataTimeOut = 0xFFFFFFFF; + SDIO_DataInitStruct->SDIO_DataLength = 0x00; + SDIO_DataInitStruct->SDIO_DataBlockSize = SDIO_DataBlockSize_1b; + SDIO_DataInitStruct->SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStruct->SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStruct->SDIO_DPSM = SDIO_DPSM_Disable; +} + +/** + * @brief Returns number of remaining data bytes to be transferred. + * @param None + * @retval Number of remaining data bytes to be transferred + */ +uint32_t SDIO_GetDataCounter(void) +{ + return SDIO->DCOUNT; +} + +/** + * @brief Read one data word from Rx FIFO. + * @param None + * @retval Data received + */ +uint32_t SDIO_ReadData(void) +{ + return SDIO->FIFO; +} + +/** + * @brief Write one data word to Tx FIFO. + * @param Data: 32-bit data word to write. + * @retval None + */ +void SDIO_WriteData(uint32_t Data) +{ + SDIO->FIFO = Data; +} + +/** + * @brief Returns the number of words left to be written to or read from FIFO. + * @param None + * @retval Remaining number of words. + */ +uint32_t SDIO_GetFIFOCount(void) +{ + return SDIO->FIFOCNT; +} + +/** + * @brief Starts the SD I/O Read Wait operation. + * @param NewState: new state of the Start SDIO Read Wait operation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_StartSDIOReadWait(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_RWSTART_BB = (uint32_t) NewState; +} + +/** + * @brief Stops the SD I/O Read Wait operation. + * @param NewState: new state of the Stop SDIO Read Wait operation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_StopSDIOReadWait(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_RWSTOP_BB = (uint32_t) NewState; +} + +/** + * @brief Sets one of the two options of inserting read wait interval. + * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode. + * This parameter can be: + * @arg SDIO_ReadWaitMode_CLK: Read Wait control by stopping SDIOCLK + * @arg SDIO_ReadWaitMode_DATA2: Read Wait control using SDIO_DATA2 + * @retval None + */ +void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode) +{ + /* Check the parameters */ + assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode)); + + *(__IO uint32_t *) DCTRL_RWMOD_BB = SDIO_ReadWaitMode; +} + +/** + * @brief Enables or disables the SD I/O Mode Operation. + * @param NewState: new state of SDIO specific operation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_SetSDIOOperation(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) DCTRL_SDIOEN_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the SD I/O Mode suspend command sending. + * @param NewState: new state of the SD I/O Mode suspend command. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_SendSDIOSuspendCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_SDIOSUSPEND_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the command completion signal. + * @param NewState: new state of command completion signal. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_CommandCompletionCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_ENCMDCOMPL_BB = (uint32_t)NewState; +} + +/** + * @brief Enables or disables the CE-ATA interrupt. + * @param NewState: new state of CE-ATA interrupt. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_CEATAITCmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_NIEN_BB = (uint32_t)((~((uint32_t)NewState)) & ((uint32_t)0x1)); +} + +/** + * @brief Sends CE-ATA command (CMD61). + * @param NewState: new state of CE-ATA command. This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SDIO_SendCEATACmd(FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + *(__IO uint32_t *) CMD_ATACMD_BB = (uint32_t)NewState; +} + +/** + * @brief Checks whether the specified SDIO flag is set or not. + * @param SDIO_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) + * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) + * @arg SDIO_FLAG_CTIMEOUT: Command response timeout + * @arg SDIO_FLAG_DTIMEOUT: Data timeout + * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error + * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error + * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) + * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) + * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) + * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide + * bus mode. + * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) + * @arg SDIO_FLAG_CMDACT: Command transfer in progress + * @arg SDIO_FLAG_TXACT: Data transmit in progress + * @arg SDIO_FLAG_RXACT: Data receive in progress + * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty + * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full + * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full + * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full + * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty + * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty + * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO + * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO + * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received + * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 + * @retval The new state of SDIO_FLAG (SET or RESET). + */ +FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG) +{ + FlagStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_SDIO_FLAG(SDIO_FLAG)); + + if ((SDIO->STA & SDIO_FLAG) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the SDIO's pending flags. + * @param SDIO_FLAG: specifies the flag to clear. + * This parameter can be one or a combination of the following values: + * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) + * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) + * @arg SDIO_FLAG_CTIMEOUT: Command response timeout + * @arg SDIO_FLAG_DTIMEOUT: Data timeout + * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error + * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error + * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) + * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) + * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) + * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide + * bus mode + * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) + * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received + * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 + * @retval None + */ +void SDIO_ClearFlag(uint32_t SDIO_FLAG) +{ + /* Check the parameters */ + assert_param(IS_SDIO_CLEAR_FLAG(SDIO_FLAG)); + + SDIO->ICR = SDIO_FLAG; +} + +/** + * @brief Checks whether the specified SDIO interrupt has occurred or not. + * @param SDIO_IT: specifies the SDIO interrupt source to check. + * This parameter can be one of the following values: + * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt + * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt + * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt + * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt + * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt + * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt + * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt + * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt + * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt + * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide + * bus mode interrupt + * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt + * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt + * @arg SDIO_IT_TXACT: Data transmit in progress interrupt + * @arg SDIO_IT_RXACT: Data receive in progress interrupt + * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt + * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt + * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt + * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt + * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt + * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt + * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt + * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt + * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt + * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt + * @retval The new state of SDIO_IT (SET or RESET). + */ +ITStatus SDIO_GetITStatus(uint32_t SDIO_IT) +{ + ITStatus bitstatus = RESET; + + /* Check the parameters */ + assert_param(IS_SDIO_GET_IT(SDIO_IT)); + if ((SDIO->STA & SDIO_IT) != (uint32_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the SDIO's interrupt pending bits. + * @param SDIO_IT: specifies the interrupt pending bit to clear. + * This parameter can be one or a combination of the following values: + * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt + * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt + * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt + * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt + * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt + * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt + * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt + * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt + * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt + * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide + * bus mode interrupt + * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt + * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 + * @retval None + */ +void SDIO_ClearITPendingBit(uint32_t SDIO_IT) +{ + /* Check the parameters */ + assert_param(IS_SDIO_CLEAR_IT(SDIO_IT)); + + SDIO->ICR = SDIO_IT; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c index 4ec65b2d..51a9cce7 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_spi.c @@ -1,908 +1,908 @@ -/** - ****************************************************************************** - * @file stm32f10x_spi.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the SPI firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_spi.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup SPI - * @brief SPI driver modules - * @{ - */ - -/** @defgroup SPI_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - - -/** @defgroup SPI_Private_Defines - * @{ - */ - -/* SPI SPE mask */ -#define CR1_SPE_Set ((uint16_t)0x0040) -#define CR1_SPE_Reset ((uint16_t)0xFFBF) - -/* I2S I2SE mask */ -#define I2SCFGR_I2SE_Set ((uint16_t)0x0400) -#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF) - -/* SPI CRCNext mask */ -#define CR1_CRCNext_Set ((uint16_t)0x1000) - -/* SPI CRCEN mask */ -#define CR1_CRCEN_Set ((uint16_t)0x2000) -#define CR1_CRCEN_Reset ((uint16_t)0xDFFF) - -/* SPI SSOE mask */ -#define CR2_SSOE_Set ((uint16_t)0x0004) -#define CR2_SSOE_Reset ((uint16_t)0xFFFB) - -/* SPI registers Masks */ -#define CR1_CLEAR_Mask ((uint16_t)0x3040) -#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) - -/* SPI or I2S mode selection masks */ -#define SPI_Mode_Select ((uint16_t)0xF7FF) -#define I2S_Mode_Select ((uint16_t)0x0800) - -/* I2S clock source selection masks */ -#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000)) -#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000)) -#define I2S_MUL_MASK ((uint32_t)(0x0000F000)) -#define I2S_DIV_MASK ((uint32_t)(0x000000F0)) - -/** - * @} - */ - -/** @defgroup SPI_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup SPI_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the SPIx peripheral registers to their default - * reset values (Affects also the I2Ss). - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @retval None - */ -void SPI_I2S_DeInit(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - if (SPIx == SPI1) - { - /* Enable SPI1 reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); - /* Release SPI1 from reset state */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); - } - else if (SPIx == SPI2) - { - /* Enable SPI2 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); - /* Release SPI2 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); - } - else - { - if (SPIx == SPI3) - { - /* Enable SPI3 reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); - /* Release SPI3 from reset state */ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); - } - } -} - -/** - * @brief Initializes the SPIx peripheral according to the specified - * parameters in the SPI_InitStruct. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that - * contains the configuration information for the specified SPI peripheral. - * @retval None - */ -void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) -{ - uint16_t tmpreg = 0; - - /* check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Check the SPI parameters */ - assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction)); - assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode)); - assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize)); - assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL)); - assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA)); - assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS)); - assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler)); - assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit)); - assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial)); - -/*---------------------------- SPIx CR1 Configuration ------------------------*/ - /* Get the SPIx CR1 value */ - tmpreg = SPIx->CR1; - /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */ - tmpreg &= CR1_CLEAR_Mask; - /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler - master/salve mode, CPOL and CPHA */ - /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */ - /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */ - /* Set LSBFirst bit according to SPI_FirstBit value */ - /* Set BR bits according to SPI_BaudRatePrescaler value */ - /* Set CPOL bit according to SPI_CPOL value */ - /* Set CPHA bit according to SPI_CPHA value */ - tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | - SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | - SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | - SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); - /* Write to SPIx CR1 */ - SPIx->CR1 = tmpreg; - - /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ - SPIx->I2SCFGR &= SPI_Mode_Select; - -/*---------------------------- SPIx CRCPOLY Configuration --------------------*/ - /* Write to SPIx CRCPOLY */ - SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial; -} - -/** - * @brief Initializes the SPIx peripheral according to the specified - * parameters in the I2S_InitStruct. - * @param SPIx: where x can be 2 or 3 to select the SPI peripheral - * (configured in I2S mode). - * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that - * contains the configuration information for the specified SPI peripheral - * configured in I2S mode. - * @note - * The function calculates the optimal prescaler needed to obtain the most - * accurate audio frequency (depending on the I2S clock source, the PLL values - * and the product configuration). But in case the prescaler value is greater - * than 511, the default value (0x02) will be configured instead. * - * @retval None - */ -void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) -{ - uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; - uint32_t tmp = 0; - RCC_ClocksTypeDef RCC_Clocks; - uint32_t sourceclock = 0; - - /* Check the I2S parameters */ - assert_param(IS_SPI_23_PERIPH(SPIx)); - assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode)); - assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard)); - assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat)); - assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput)); - assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq)); - assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL)); - -/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ - /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ - SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; - SPIx->I2SPR = 0x0002; - - /* Get the I2SCFGR register value */ - tmpreg = SPIx->I2SCFGR; - - /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ - if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) - { - i2sodd = (uint16_t)0; - i2sdiv = (uint16_t)2; - } - /* If the requested audio frequency is not the default, compute the prescaler */ - else - { - /* Check the frame length (For the Prescaler computing) */ - if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) - { - /* Packet length is 16 bits */ - packetlength = 1; - } - else - { - /* Packet length is 32 bits */ - packetlength = 2; - } - - /* Get the I2S clock source mask depending on the peripheral number */ - if(((uint32_t)SPIx) == SPI2_BASE) - { - /* The mask is relative to I2S2 */ - tmp = I2S2_CLOCK_SRC; - } - else - { - /* The mask is relative to I2S3 */ - tmp = I2S3_CLOCK_SRC; - } - - /* Check the I2S clock source configuration depending on the Device: - Only Connectivity line devices have the PLL3 VCO clock */ -#ifdef STM32F10X_CL - if((RCC->CFGR2 & tmp) != 0) - { - /* Get the configuration bits of RCC PLL3 multiplier */ - tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12); - - /* Get the value of the PLL3 multiplier */ - if((tmp > 5) && (tmp < 15)) - { - /* Multiplier is between 8 and 14 (value 15 is forbidden) */ - tmp += 2; - } - else - { - if (tmp == 15) - { - /* Multiplier is 20 */ - tmp = 20; - } - } - /* Get the PREDIV2 value */ - sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1); - - /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */ - sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2); - } - else - { - /* I2S Clock source is System clock: Get System Clock frequency */ - RCC_GetClocksFreq(&RCC_Clocks); - - /* Get the source clock value: based on System Clock value */ - sourceclock = RCC_Clocks.SYSCLK_Frequency; - } -#else /* STM32F10X_HD */ - /* I2S Clock source is System clock: Get System Clock frequency */ - RCC_GetClocksFreq(&RCC_Clocks); - - /* Get the source clock value: based on System Clock value */ - sourceclock = RCC_Clocks.SYSCLK_Frequency; -#endif /* STM32F10X_CL */ - - /* Compute the Real divider depending on the MCLK output state with a floating point */ - if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) - { - /* MCLK output is enabled */ - tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); - } - else - { - /* MCLK output is disabled */ - tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); - } - - /* Remove the floating point */ - tmp = tmp / 10; - - /* Check the parity of the divider */ - i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); - - /* Compute the i2sdiv prescaler */ - i2sdiv = (uint16_t)((tmp - i2sodd) / 2); - - /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ - i2sodd = (uint16_t) (i2sodd << 8); - } - - /* Test if the divider is 1 or 0 or greater than 0xFF */ - if ((i2sdiv < 2) || (i2sdiv > 0xFF)) - { - /* Set the default values */ - i2sdiv = 2; - i2sodd = 0; - } - - /* Write to SPIx I2SPR register the computed value */ - SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); - - /* Configure the I2S with the SPI_InitStruct values */ - tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \ - (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ - (uint16_t)I2S_InitStruct->I2S_CPOL)))); - - /* Write to SPIx I2SCFGR */ - SPIx->I2SCFGR = tmpreg; -} - -/** - * @brief Fills each SPI_InitStruct member with its default value. - * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized. - * @retval None - */ -void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) -{ -/*--------------- Reset SPI init structure parameters values -----------------*/ - /* Initialize the SPI_Direction member */ - SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; - /* initialize the SPI_Mode member */ - SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; - /* initialize the SPI_DataSize member */ - SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; - /* Initialize the SPI_CPOL member */ - SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; - /* Initialize the SPI_CPHA member */ - SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; - /* Initialize the SPI_NSS member */ - SPI_InitStruct->SPI_NSS = SPI_NSS_Hard; - /* Initialize the SPI_BaudRatePrescaler member */ - SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; - /* Initialize the SPI_FirstBit member */ - SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; - /* Initialize the SPI_CRCPolynomial member */ - SPI_InitStruct->SPI_CRCPolynomial = 7; -} - -/** - * @brief Fills each I2S_InitStruct member with its default value. - * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized. - * @retval None - */ -void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) -{ -/*--------------- Reset I2S init structure parameters values -----------------*/ - /* Initialize the I2S_Mode member */ - I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; - - /* Initialize the I2S_Standard member */ - I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; - - /* Initialize the I2S_DataFormat member */ - I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; - - /* Initialize the I2S_MCLKOutput member */ - I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; - - /* Initialize the I2S_AudioFreq member */ - I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; - - /* Initialize the I2S_CPOL member */ - I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; -} - -/** - * @brief Enables or disables the specified SPI peripheral. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI peripheral */ - SPIx->CR1 |= CR1_SPE_Set; - } - else - { - /* Disable the selected SPI peripheral */ - SPIx->CR1 &= CR1_SPE_Reset; - } -} - -/** - * @brief Enables or disables the specified SPI peripheral (in I2S mode). - * @param SPIx: where x can be 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_23_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI peripheral (in I2S mode) */ - SPIx->I2SCFGR |= I2SCFGR_I2SE_Set; - } - else - { - /* Disable the selected SPI peripheral (in I2S mode) */ - SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset; - } -} - -/** - * @brief Enables or disables the specified SPI/I2S interrupts. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled. - * This parameter can be one of the following values: - * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask - * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask - * @arg SPI_I2S_IT_ERR: Error interrupt mask - * @param NewState: new state of the specified SPI/I2S interrupt. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) -{ - uint16_t itpos = 0, itmask = 0 ; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT)); - - /* Get the SPI/I2S IT index */ - itpos = SPI_I2S_IT >> 4; - - /* Set the IT mask */ - itmask = (uint16_t)1 << (uint16_t)itpos; - - if (NewState != DISABLE) - { - /* Enable the selected SPI/I2S interrupt */ - SPIx->CR2 |= itmask; - } - else - { - /* Disable the selected SPI/I2S interrupt */ - SPIx->CR2 &= (uint16_t)~itmask; - } -} - -/** - * @brief Enables or disables the SPIx/I2Sx DMA interface. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request - * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request - * @param NewState: new state of the selected SPI/I2S DMA transfer request. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq)); - if (NewState != DISABLE) - { - /* Enable the selected SPI/I2S DMA requests */ - SPIx->CR2 |= SPI_I2S_DMAReq; - } - else - { - /* Disable the selected SPI/I2S DMA requests */ - SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq; - } -} - -/** - * @brief Transmits a Data through the SPIx/I2Sx peripheral. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param Data : Data to be transmitted. - * @retval None - */ -void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Write in the DR register the data to be sent */ - SPIx->DR = Data; -} - -/** - * @brief Returns the most recent received data by the SPIx/I2Sx peripheral. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @retval The value of the received data. - */ -uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Return the data in the DR register */ - return SPIx->DR; -} - -/** - * @brief Configures internally by software the NSS pin for the selected SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. - * This parameter can be one of the following values: - * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally - * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally - * @retval None - */ -void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft)); - if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) - { - /* Set NSS pin internally by software */ - SPIx->CR1 |= SPI_NSSInternalSoft_Set; - } - else - { - /* Reset NSS pin internally by software */ - SPIx->CR1 &= SPI_NSSInternalSoft_Reset; - } -} - -/** - * @brief Enables or disables the SS output for the selected SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx SS output. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI SS output */ - SPIx->CR2 |= CR2_SSOE_Set; - } - else - { - /* Disable the selected SPI SS output */ - SPIx->CR2 &= CR2_SSOE_Reset; - } -} - -/** - * @brief Configures the data size for the selected SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_DataSize: specifies the SPI data size. - * This parameter can be one of the following values: - * @arg SPI_DataSize_16b: Set data frame format to 16bit - * @arg SPI_DataSize_8b: Set data frame format to 8bit - * @retval None - */ -void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_DATASIZE(SPI_DataSize)); - /* Clear DFF bit */ - SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b; - /* Set new DFF bit value */ - SPIx->CR1 |= SPI_DataSize; -} - -/** - * @brief Transmit the SPIx CRC value. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @retval None - */ -void SPI_TransmitCRC(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Enable the selected SPI CRC transmission */ - SPIx->CR1 |= CR1_CRCNext_Set; -} - -/** - * @brief Enables or disables the CRC value calculation of the transferred bytes. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param NewState: new state of the SPIx CRC value calculation. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the selected SPI CRC calculation */ - SPIx->CR1 |= CR1_CRCEN_Set; - } - else - { - /* Disable the selected SPI CRC calculation */ - SPIx->CR1 &= CR1_CRCEN_Reset; - } -} - -/** - * @brief Returns the transmit or the receive CRC register value for the specified SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_CRC: specifies the CRC register to be read. - * This parameter can be one of the following values: - * @arg SPI_CRC_Tx: Selects Tx CRC register - * @arg SPI_CRC_Rx: Selects Rx CRC register - * @retval The selected CRC register value.. - */ -uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) -{ - uint16_t crcreg = 0; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_CRC(SPI_CRC)); - if (SPI_CRC != SPI_CRC_Rx) - { - /* Get the Tx CRC register */ - crcreg = SPIx->TXCRCR; - } - else - { - /* Get the Rx CRC register */ - crcreg = SPIx->RXCRCR; - } - /* Return the selected CRC register */ - return crcreg; -} - -/** - * @brief Returns the CRC Polynomial register value for the specified SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @retval The CRC Polynomial register value. - */ -uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - - /* Return the CRC polynomial register */ - return SPIx->CRCPR; -} - -/** - * @brief Selects the data transfer direction in bi-directional mode for the specified SPI. - * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. - * @param SPI_Direction: specifies the data transfer direction in bi-directional mode. - * This parameter can be one of the following values: - * @arg SPI_Direction_Tx: Selects Tx transmission direction - * @arg SPI_Direction_Rx: Selects Rx receive direction - * @retval None - */ -void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_DIRECTION(SPI_Direction)); - if (SPI_Direction == SPI_Direction_Tx) - { - /* Set the Tx only mode */ - SPIx->CR1 |= SPI_Direction_Tx; - } - else - { - /* Set the Rx only mode */ - SPIx->CR1 &= SPI_Direction_Rx; - } -} - -/** - * @brief Checks whether the specified SPI/I2S flag is set or not. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check. - * This parameter can be one of the following values: - * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. - * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. - * @arg SPI_I2S_FLAG_BSY: Busy flag. - * @arg SPI_I2S_FLAG_OVR: Overrun flag. - * @arg SPI_FLAG_MODF: Mode Fault flag. - * @arg SPI_FLAG_CRCERR: CRC Error flag. - * @arg I2S_FLAG_UDR: Underrun Error flag. - * @arg I2S_FLAG_CHSIDE: Channel Side flag. - * @retval The new state of SPI_I2S_FLAG (SET or RESET). - */ -FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG)); - /* Check the status of the specified SPI/I2S flag */ - if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET) - { - /* SPI_I2S_FLAG is set */ - bitstatus = SET; - } - else - { - /* SPI_I2S_FLAG is reset */ - bitstatus = RESET; - } - /* Return the SPI_I2S_FLAG status */ - return bitstatus; -} - -/** - * @brief Clears the SPIx CRC Error (CRCERR) flag. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * @param SPI_I2S_FLAG: specifies the SPI flag to clear. - * This function clears only CRCERR flag. - * @note - * - OVR (OverRun error) flag is cleared by software sequence: a read - * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read - * operation to SPI_SR register (SPI_I2S_GetFlagStatus()). - * - UDR (UnderRun error) flag is cleared by a read operation to - * SPI_SR register (SPI_I2S_GetFlagStatus()). - * - MODF (Mode Fault) flag is cleared by software sequence: a read/write - * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a - * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). - * @retval None - */ -void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) -{ - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG)); - - /* Clear the selected SPI CRC Error (CRCERR) flag */ - SPIx->SR = (uint16_t)~SPI_I2S_FLAG; -} - -/** - * @brief Checks whether the specified SPI/I2S interrupt has occurred or not. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * - 2 or 3 in I2S mode - * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check. - * This parameter can be one of the following values: - * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. - * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. - * @arg SPI_I2S_IT_OVR: Overrun interrupt. - * @arg SPI_IT_MODF: Mode Fault interrupt. - * @arg SPI_IT_CRCERR: CRC Error interrupt. - * @arg I2S_IT_UDR: Underrun Error interrupt. - * @retval The new state of SPI_I2S_IT (SET or RESET). - */ -ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) -{ - ITStatus bitstatus = RESET; - uint16_t itpos = 0, itmask = 0, enablestatus = 0; - - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT)); - - /* Get the SPI/I2S IT index */ - itpos = 0x01 << (SPI_I2S_IT & 0x0F); - - /* Get the SPI/I2S IT mask */ - itmask = SPI_I2S_IT >> 4; - - /* Set the IT mask */ - itmask = 0x01 << itmask; - - /* Get the SPI_I2S_IT enable bit status */ - enablestatus = (SPIx->CR2 & itmask) ; - - /* Check the status of the specified SPI/I2S interrupt */ - if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus) - { - /* SPI_I2S_IT is set */ - bitstatus = SET; - } - else - { - /* SPI_I2S_IT is reset */ - bitstatus = RESET; - } - /* Return the SPI_I2S_IT status */ - return bitstatus; -} - -/** - * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit. - * @param SPIx: where x can be - * - 1, 2 or 3 in SPI mode - * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. - * This function clears only CRCERR interrupt pending bit. - * @note - * - OVR (OverRun Error) interrupt pending bit is cleared by software - * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData()) - * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()). - * - UDR (UnderRun Error) interrupt pending bit is cleared by a read - * operation to SPI_SR register (SPI_I2S_GetITStatus()). - * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence: - * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus()) - * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable - * the SPI). - * @retval None - */ -void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) -{ - uint16_t itpos = 0; - /* Check the parameters */ - assert_param(IS_SPI_ALL_PERIPH(SPIx)); - assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT)); - - /* Get the SPI IT index */ - itpos = 0x01 << (SPI_I2S_IT & 0x0F); - - /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */ - SPIx->SR = (uint16_t)~itpos; -} -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_spi.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the SPI firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_spi.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup SPI + * @brief SPI driver modules + * @{ + */ + +/** @defgroup SPI_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + + +/** @defgroup SPI_Private_Defines + * @{ + */ + +/* SPI SPE mask */ +#define CR1_SPE_Set ((uint16_t)0x0040) +#define CR1_SPE_Reset ((uint16_t)0xFFBF) + +/* I2S I2SE mask */ +#define I2SCFGR_I2SE_Set ((uint16_t)0x0400) +#define I2SCFGR_I2SE_Reset ((uint16_t)0xFBFF) + +/* SPI CRCNext mask */ +#define CR1_CRCNext_Set ((uint16_t)0x1000) + +/* SPI CRCEN mask */ +#define CR1_CRCEN_Set ((uint16_t)0x2000) +#define CR1_CRCEN_Reset ((uint16_t)0xDFFF) + +/* SPI SSOE mask */ +#define CR2_SSOE_Set ((uint16_t)0x0004) +#define CR2_SSOE_Reset ((uint16_t)0xFFFB) + +/* SPI registers Masks */ +#define CR1_CLEAR_Mask ((uint16_t)0x3040) +#define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040) + +/* SPI or I2S mode selection masks */ +#define SPI_Mode_Select ((uint16_t)0xF7FF) +#define I2S_Mode_Select ((uint16_t)0x0800) + +/* I2S clock source selection masks */ +#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000)) +#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000)) +#define I2S_MUL_MASK ((uint32_t)(0x0000F000)) +#define I2S_DIV_MASK ((uint32_t)(0x000000F0)) + +/** + * @} + */ + +/** @defgroup SPI_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup SPI_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the SPIx peripheral registers to their default + * reset values (Affects also the I2Ss). + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @retval None + */ +void SPI_I2S_DeInit(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + if (SPIx == SPI1) + { + /* Enable SPI1 reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE); + /* Release SPI1 from reset state */ + RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE); + } + else if (SPIx == SPI2) + { + /* Enable SPI2 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE); + /* Release SPI2 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE); + } + else + { + if (SPIx == SPI3) + { + /* Enable SPI3 reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE); + /* Release SPI3 from reset state */ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE); + } + } +} + +/** + * @brief Initializes the SPIx peripheral according to the specified + * parameters in the SPI_InitStruct. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that + * contains the configuration information for the specified SPI peripheral. + * @retval None + */ +void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct) +{ + uint16_t tmpreg = 0; + + /* check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Check the SPI parameters */ + assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction)); + assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode)); + assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize)); + assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL)); + assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA)); + assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS)); + assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler)); + assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit)); + assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial)); + +/*---------------------------- SPIx CR1 Configuration ------------------------*/ + /* Get the SPIx CR1 value */ + tmpreg = SPIx->CR1; + /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */ + tmpreg &= CR1_CLEAR_Mask; + /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler + master/salve mode, CPOL and CPHA */ + /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */ + /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */ + /* Set LSBFirst bit according to SPI_FirstBit value */ + /* Set BR bits according to SPI_BaudRatePrescaler value */ + /* Set CPOL bit according to SPI_CPOL value */ + /* Set CPHA bit according to SPI_CPHA value */ + tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode | + SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL | + SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS | + SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit); + /* Write to SPIx CR1 */ + SPIx->CR1 = tmpreg; + + /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */ + SPIx->I2SCFGR &= SPI_Mode_Select; + +/*---------------------------- SPIx CRCPOLY Configuration --------------------*/ + /* Write to SPIx CRCPOLY */ + SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial; +} + +/** + * @brief Initializes the SPIx peripheral according to the specified + * parameters in the I2S_InitStruct. + * @param SPIx: where x can be 2 or 3 to select the SPI peripheral + * (configured in I2S mode). + * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that + * contains the configuration information for the specified SPI peripheral + * configured in I2S mode. + * @note + * The function calculates the optimal prescaler needed to obtain the most + * accurate audio frequency (depending on the I2S clock source, the PLL values + * and the product configuration). But in case the prescaler value is greater + * than 511, the default value (0x02) will be configured instead. * + * @retval None + */ +void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct) +{ + uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1; + uint32_t tmp = 0; + RCC_ClocksTypeDef RCC_Clocks; + uint32_t sourceclock = 0; + + /* Check the I2S parameters */ + assert_param(IS_SPI_23_PERIPH(SPIx)); + assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode)); + assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard)); + assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat)); + assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput)); + assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq)); + assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL)); + +/*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/ + /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */ + SPIx->I2SCFGR &= I2SCFGR_CLEAR_Mask; + SPIx->I2SPR = 0x0002; + + /* Get the I2SCFGR register value */ + tmpreg = SPIx->I2SCFGR; + + /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/ + if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default) + { + i2sodd = (uint16_t)0; + i2sdiv = (uint16_t)2; + } + /* If the requested audio frequency is not the default, compute the prescaler */ + else + { + /* Check the frame length (For the Prescaler computing) */ + if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b) + { + /* Packet length is 16 bits */ + packetlength = 1; + } + else + { + /* Packet length is 32 bits */ + packetlength = 2; + } + + /* Get the I2S clock source mask depending on the peripheral number */ + if(((uint32_t)SPIx) == SPI2_BASE) + { + /* The mask is relative to I2S2 */ + tmp = I2S2_CLOCK_SRC; + } + else + { + /* The mask is relative to I2S3 */ + tmp = I2S3_CLOCK_SRC; + } + + /* Check the I2S clock source configuration depending on the Device: + Only Connectivity line devices have the PLL3 VCO clock */ +#ifdef STM32F10X_CL + if((RCC->CFGR2 & tmp) != 0) + { + /* Get the configuration bits of RCC PLL3 multiplier */ + tmp = (uint32_t)((RCC->CFGR2 & I2S_MUL_MASK) >> 12); + + /* Get the value of the PLL3 multiplier */ + if((tmp > 5) && (tmp < 15)) + { + /* Multiplier is between 8 and 14 (value 15 is forbidden) */ + tmp += 2; + } + else + { + if (tmp == 15) + { + /* Multiplier is 20 */ + tmp = 20; + } + } + /* Get the PREDIV2 value */ + sourceclock = (uint32_t)(((RCC->CFGR2 & I2S_DIV_MASK) >> 4) + 1); + + /* Calculate the Source Clock frequency based on PLL3 and PREDIV2 values */ + sourceclock = (uint32_t) ((HSE_Value / sourceclock) * tmp * 2); + } + else + { + /* I2S Clock source is System clock: Get System Clock frequency */ + RCC_GetClocksFreq(&RCC_Clocks); + + /* Get the source clock value: based on System Clock value */ + sourceclock = RCC_Clocks.SYSCLK_Frequency; + } +#else /* STM32F10X_HD */ + /* I2S Clock source is System clock: Get System Clock frequency */ + RCC_GetClocksFreq(&RCC_Clocks); + + /* Get the source clock value: based on System Clock value */ + sourceclock = RCC_Clocks.SYSCLK_Frequency; +#endif /* STM32F10X_CL */ + + /* Compute the Real divider depending on the MCLK output state with a floating point */ + if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable) + { + /* MCLK output is enabled */ + tmp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5); + } + else + { + /* MCLK output is disabled */ + tmp = (uint16_t)(((((sourceclock / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5); + } + + /* Remove the floating point */ + tmp = tmp / 10; + + /* Check the parity of the divider */ + i2sodd = (uint16_t)(tmp & (uint16_t)0x0001); + + /* Compute the i2sdiv prescaler */ + i2sdiv = (uint16_t)((tmp - i2sodd) / 2); + + /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */ + i2sodd = (uint16_t) (i2sodd << 8); + } + + /* Test if the divider is 1 or 0 or greater than 0xFF */ + if ((i2sdiv < 2) || (i2sdiv > 0xFF)) + { + /* Set the default values */ + i2sdiv = 2; + i2sodd = 0; + } + + /* Write to SPIx I2SPR register the computed value */ + SPIx->I2SPR = (uint16_t)(i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput)); + + /* Configure the I2S with the SPI_InitStruct values */ + tmpreg |= (uint16_t)(I2S_Mode_Select | (uint16_t)(I2S_InitStruct->I2S_Mode | \ + (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \ + (uint16_t)I2S_InitStruct->I2S_CPOL)))); + + /* Write to SPIx I2SCFGR */ + SPIx->I2SCFGR = tmpreg; +} + +/** + * @brief Fills each SPI_InitStruct member with its default value. + * @param SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized. + * @retval None + */ +void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct) +{ +/*--------------- Reset SPI init structure parameters values -----------------*/ + /* Initialize the SPI_Direction member */ + SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex; + /* initialize the SPI_Mode member */ + SPI_InitStruct->SPI_Mode = SPI_Mode_Slave; + /* initialize the SPI_DataSize member */ + SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b; + /* Initialize the SPI_CPOL member */ + SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low; + /* Initialize the SPI_CPHA member */ + SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge; + /* Initialize the SPI_NSS member */ + SPI_InitStruct->SPI_NSS = SPI_NSS_Hard; + /* Initialize the SPI_BaudRatePrescaler member */ + SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; + /* Initialize the SPI_FirstBit member */ + SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB; + /* Initialize the SPI_CRCPolynomial member */ + SPI_InitStruct->SPI_CRCPolynomial = 7; +} + +/** + * @brief Fills each I2S_InitStruct member with its default value. + * @param I2S_InitStruct : pointer to a I2S_InitTypeDef structure which will be initialized. + * @retval None + */ +void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct) +{ +/*--------------- Reset I2S init structure parameters values -----------------*/ + /* Initialize the I2S_Mode member */ + I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx; + + /* Initialize the I2S_Standard member */ + I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips; + + /* Initialize the I2S_DataFormat member */ + I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b; + + /* Initialize the I2S_MCLKOutput member */ + I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable; + + /* Initialize the I2S_AudioFreq member */ + I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default; + + /* Initialize the I2S_CPOL member */ + I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low; +} + +/** + * @brief Enables or disables the specified SPI peripheral. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI peripheral */ + SPIx->CR1 |= CR1_SPE_Set; + } + else + { + /* Disable the selected SPI peripheral */ + SPIx->CR1 &= CR1_SPE_Reset; + } +} + +/** + * @brief Enables or disables the specified SPI peripheral (in I2S mode). + * @param SPIx: where x can be 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_23_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI peripheral (in I2S mode) */ + SPIx->I2SCFGR |= I2SCFGR_I2SE_Set; + } + else + { + /* Disable the selected SPI peripheral (in I2S mode) */ + SPIx->I2SCFGR &= I2SCFGR_I2SE_Reset; + } +} + +/** + * @brief Enables or disables the specified SPI/I2S interrupts. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to be enabled or disabled. + * This parameter can be one of the following values: + * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask + * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask + * @arg SPI_I2S_IT_ERR: Error interrupt mask + * @param NewState: new state of the specified SPI/I2S interrupt. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState) +{ + uint16_t itpos = 0, itmask = 0 ; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT)); + + /* Get the SPI/I2S IT index */ + itpos = SPI_I2S_IT >> 4; + + /* Set the IT mask */ + itmask = (uint16_t)1 << (uint16_t)itpos; + + if (NewState != DISABLE) + { + /* Enable the selected SPI/I2S interrupt */ + SPIx->CR2 |= itmask; + } + else + { + /* Disable the selected SPI/I2S interrupt */ + SPIx->CR2 &= (uint16_t)~itmask; + } +} + +/** + * @brief Enables or disables the SPIx/I2Sx DMA interface. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_DMAReq: specifies the SPI/I2S DMA transfer request to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request + * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request + * @param NewState: new state of the selected SPI/I2S DMA transfer request. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq)); + if (NewState != DISABLE) + { + /* Enable the selected SPI/I2S DMA requests */ + SPIx->CR2 |= SPI_I2S_DMAReq; + } + else + { + /* Disable the selected SPI/I2S DMA requests */ + SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq; + } +} + +/** + * @brief Transmits a Data through the SPIx/I2Sx peripheral. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param Data : Data to be transmitted. + * @retval None + */ +void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Write in the DR register the data to be sent */ + SPIx->DR = Data; +} + +/** + * @brief Returns the most recent received data by the SPIx/I2Sx peripheral. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @retval The value of the received data. + */ +uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Return the data in the DR register */ + return SPIx->DR; +} + +/** + * @brief Configures internally by software the NSS pin for the selected SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state. + * This parameter can be one of the following values: + * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally + * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally + * @retval None + */ +void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft)); + if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset) + { + /* Set NSS pin internally by software */ + SPIx->CR1 |= SPI_NSSInternalSoft_Set; + } + else + { + /* Reset NSS pin internally by software */ + SPIx->CR1 &= SPI_NSSInternalSoft_Reset; + } +} + +/** + * @brief Enables or disables the SS output for the selected SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx SS output. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI SS output */ + SPIx->CR2 |= CR2_SSOE_Set; + } + else + { + /* Disable the selected SPI SS output */ + SPIx->CR2 &= CR2_SSOE_Reset; + } +} + +/** + * @brief Configures the data size for the selected SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_DataSize: specifies the SPI data size. + * This parameter can be one of the following values: + * @arg SPI_DataSize_16b: Set data frame format to 16bit + * @arg SPI_DataSize_8b: Set data frame format to 8bit + * @retval None + */ +void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_DATASIZE(SPI_DataSize)); + /* Clear DFF bit */ + SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b; + /* Set new DFF bit value */ + SPIx->CR1 |= SPI_DataSize; +} + +/** + * @brief Transmit the SPIx CRC value. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @retval None + */ +void SPI_TransmitCRC(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Enable the selected SPI CRC transmission */ + SPIx->CR1 |= CR1_CRCNext_Set; +} + +/** + * @brief Enables or disables the CRC value calculation of the transferred bytes. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param NewState: new state of the SPIx CRC value calculation. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the selected SPI CRC calculation */ + SPIx->CR1 |= CR1_CRCEN_Set; + } + else + { + /* Disable the selected SPI CRC calculation */ + SPIx->CR1 &= CR1_CRCEN_Reset; + } +} + +/** + * @brief Returns the transmit or the receive CRC register value for the specified SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_CRC: specifies the CRC register to be read. + * This parameter can be one of the following values: + * @arg SPI_CRC_Tx: Selects Tx CRC register + * @arg SPI_CRC_Rx: Selects Rx CRC register + * @retval The selected CRC register value.. + */ +uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC) +{ + uint16_t crcreg = 0; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_CRC(SPI_CRC)); + if (SPI_CRC != SPI_CRC_Rx) + { + /* Get the Tx CRC register */ + crcreg = SPIx->TXCRCR; + } + else + { + /* Get the Rx CRC register */ + crcreg = SPIx->RXCRCR; + } + /* Return the selected CRC register */ + return crcreg; +} + +/** + * @brief Returns the CRC Polynomial register value for the specified SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @retval The CRC Polynomial register value. + */ +uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + + /* Return the CRC polynomial register */ + return SPIx->CRCPR; +} + +/** + * @brief Selects the data transfer direction in bi-directional mode for the specified SPI. + * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral. + * @param SPI_Direction: specifies the data transfer direction in bi-directional mode. + * This parameter can be one of the following values: + * @arg SPI_Direction_Tx: Selects Tx transmission direction + * @arg SPI_Direction_Rx: Selects Rx receive direction + * @retval None + */ +void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_DIRECTION(SPI_Direction)); + if (SPI_Direction == SPI_Direction_Tx) + { + /* Set the Tx only mode */ + SPIx->CR1 |= SPI_Direction_Tx; + } + else + { + /* Set the Rx only mode */ + SPIx->CR1 &= SPI_Direction_Rx; + } +} + +/** + * @brief Checks whether the specified SPI/I2S flag is set or not. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_FLAG: specifies the SPI/I2S flag to check. + * This parameter can be one of the following values: + * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag. + * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag. + * @arg SPI_I2S_FLAG_BSY: Busy flag. + * @arg SPI_I2S_FLAG_OVR: Overrun flag. + * @arg SPI_FLAG_MODF: Mode Fault flag. + * @arg SPI_FLAG_CRCERR: CRC Error flag. + * @arg I2S_FLAG_UDR: Underrun Error flag. + * @arg I2S_FLAG_CHSIDE: Channel Side flag. + * @retval The new state of SPI_I2S_FLAG (SET or RESET). + */ +FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG)); + /* Check the status of the specified SPI/I2S flag */ + if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET) + { + /* SPI_I2S_FLAG is set */ + bitstatus = SET; + } + else + { + /* SPI_I2S_FLAG is reset */ + bitstatus = RESET; + } + /* Return the SPI_I2S_FLAG status */ + return bitstatus; +} + +/** + * @brief Clears the SPIx CRC Error (CRCERR) flag. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * @param SPI_I2S_FLAG: specifies the SPI flag to clear. + * This function clears only CRCERR flag. + * @note + * - OVR (OverRun error) flag is cleared by software sequence: a read + * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read + * operation to SPI_SR register (SPI_I2S_GetFlagStatus()). + * - UDR (UnderRun error) flag is cleared by a read operation to + * SPI_SR register (SPI_I2S_GetFlagStatus()). + * - MODF (Mode Fault) flag is cleared by software sequence: a read/write + * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a + * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI). + * @retval None + */ +void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG) +{ + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG)); + + /* Clear the selected SPI CRC Error (CRCERR) flag */ + SPIx->SR = (uint16_t)~SPI_I2S_FLAG; +} + +/** + * @brief Checks whether the specified SPI/I2S interrupt has occurred or not. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * - 2 or 3 in I2S mode + * @param SPI_I2S_IT: specifies the SPI/I2S interrupt source to check. + * This parameter can be one of the following values: + * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt. + * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt. + * @arg SPI_I2S_IT_OVR: Overrun interrupt. + * @arg SPI_IT_MODF: Mode Fault interrupt. + * @arg SPI_IT_CRCERR: CRC Error interrupt. + * @arg I2S_IT_UDR: Underrun Error interrupt. + * @retval The new state of SPI_I2S_IT (SET or RESET). + */ +ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) +{ + ITStatus bitstatus = RESET; + uint16_t itpos = 0, itmask = 0, enablestatus = 0; + + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT)); + + /* Get the SPI/I2S IT index */ + itpos = 0x01 << (SPI_I2S_IT & 0x0F); + + /* Get the SPI/I2S IT mask */ + itmask = SPI_I2S_IT >> 4; + + /* Set the IT mask */ + itmask = 0x01 << itmask; + + /* Get the SPI_I2S_IT enable bit status */ + enablestatus = (SPIx->CR2 & itmask) ; + + /* Check the status of the specified SPI/I2S interrupt */ + if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus) + { + /* SPI_I2S_IT is set */ + bitstatus = SET; + } + else + { + /* SPI_I2S_IT is reset */ + bitstatus = RESET; + } + /* Return the SPI_I2S_IT status */ + return bitstatus; +} + +/** + * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit. + * @param SPIx: where x can be + * - 1, 2 or 3 in SPI mode + * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear. + * This function clears only CRCERR interrupt pending bit. + * @note + * - OVR (OverRun Error) interrupt pending bit is cleared by software + * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData()) + * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()). + * - UDR (UnderRun Error) interrupt pending bit is cleared by a read + * operation to SPI_SR register (SPI_I2S_GetITStatus()). + * - MODF (Mode Fault) interrupt pending bit is cleared by software sequence: + * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus()) + * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable + * the SPI). + * @retval None + */ +void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT) +{ + uint16_t itpos = 0; + /* Check the parameters */ + assert_param(IS_SPI_ALL_PERIPH(SPIx)); + assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT)); + + /* Get the SPI IT index */ + itpos = 0x01 << (SPI_I2S_IT & 0x0F); + + /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */ + SPIx->SR = (uint16_t)~itpos; +} +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c index bfb4dd1d..81c8484e 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_tim.c @@ -1,2890 +1,2890 @@ -/** - ****************************************************************************** - * @file stm32f10x_tim.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the TIM firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_tim.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup TIM - * @brief TIM driver modules - * @{ - */ - -/** @defgroup TIM_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Defines - * @{ - */ - -/* ---------------------- TIM registers bit mask ------------------------ */ -#define SMCR_ETR_Mask ((uint16_t)0x00FF) -#define CCMR_Offset ((uint16_t)0x0018) -#define CCER_CCE_Set ((uint16_t)0x0001) -#define CCER_CCNE_Set ((uint16_t)0x0004) - -/** - * @} - */ - -/** @defgroup TIM_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_FunctionPrototypes - * @{ - */ - -static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter); -/** - * @} - */ - -/** @defgroup TIM_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup TIM_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the TIMx peripheral registers to their default reset values. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @retval None - */ -void TIM_DeInit(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - - if (TIMx == TIM1) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); - } - else if (TIMx == TIM2) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); - } - else if (TIMx == TIM3) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); - } - else if (TIMx == TIM4) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); - } - else if (TIMx == TIM5) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); - } - else if (TIMx == TIM6) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); - } - else if (TIMx == TIM7) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE); - } - else if (TIMx == TIM8) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE); - } - else if (TIMx == TIM9) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE); - } - else if (TIMx == TIM10) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE); - } - else if (TIMx == TIM11) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE); - } - else if (TIMx == TIM12) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, DISABLE); - } - else if (TIMx == TIM13) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, DISABLE); - } - else if (TIMx == TIM14) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE); - } - else if (TIMx == TIM15) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE); - } - else if (TIMx == TIM16) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE); - } - else - { - if (TIMx == TIM17) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE); - } - } -} - -/** - * @brief Initializes the TIMx Time Base Unit peripheral according to - * the specified parameters in the TIM_TimeBaseInitStruct. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef - * structure that contains the configuration information for the - * specified TIM peripheral. - * @retval None - */ -void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) -{ - uint16_t tmpcr1 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode)); - assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision)); - - tmpcr1 = TIMx->CR1; - - if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM2) || (TIMx == TIM3)|| - (TIMx == TIM4) || (TIMx == TIM5)) - { - /* Select the Counter Mode */ - tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); - tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode; - } - - if((TIMx != TIM6) && (TIMx != TIM7)) - { - /* Set the clock division */ - tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD)); - tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; - } - - TIMx->CR1 = tmpcr1; - - /* Set the Autoreload value */ - TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; - - /* Set the Prescaler value */ - TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; - - if ((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| (TIMx == TIM16) || (TIMx == TIM17)) - { - /* Set the Repetition Counter value */ - TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; - } - - /* Generate an update event to reload the Prescaler and the Repetition counter - values immediately */ - TIMx->EGR = TIM_PSCReloadMode_Immediate; -} - -/** - * @brief Initializes the TIMx Channel1 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E); - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M)); - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S)); - - /* Select the Output Compare Mode */ - tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P)); - /* Set the Output Compare Polarity */ - tmpccer |= TIM_OCInitStruct->TIM_OCPolarity; - - /* Set the Output State */ - tmpccer |= TIM_OCInitStruct->TIM_OutputState; - - if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| - (TIMx == TIM16)|| (TIMx == TIM17)) - { - assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NP)); - /* Set the Output N Polarity */ - tmpccer |= TIM_OCInitStruct->TIM_OCNPolarity; - - /* Reset the Output N State */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NE)); - /* Set the Output N State */ - tmpccer |= TIM_OCInitStruct->TIM_OutputNState; - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1)); - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N)); - - /* Set the Output Idle state */ - tmpcr2 |= TIM_OCInitStruct->TIM_OCIdleState; - /* Set the Output N Idle state */ - tmpcr2 |= TIM_OCInitStruct->TIM_OCNIdleState; - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIMx Channel2 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select - * the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E)); - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M)); - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)); - - /* Select the Output Compare Mode */ - tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P)); - /* Set the Output Compare Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4); - - /* Set the Output State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4); - - if((TIMx == TIM1) || (TIMx == TIM8)) - { - assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP)); - /* Set the Output N Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4); - - /* Reset the Output N State */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE)); - /* Set the Output N State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2)); - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N)); - - /* Set the Output Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2); - /* Set the Output N Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIMx Channel3 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E)); - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M)); - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC3S)); - /* Select the Output Compare Mode */ - tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P)); - /* Set the Output Compare Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8); - - /* Set the Output State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8); - - if((TIMx == TIM1) || (TIMx == TIM8)) - { - assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NP)); - /* Set the Output N Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8); - /* Reset the Output N State */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NE)); - - /* Set the Output N State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8); - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3)); - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3N)); - /* Set the Output Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4); - /* Set the Output N Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIMx Channel4 according to the specified - * parameters in the TIM_OCInitStruct. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); - assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); - /* Disable the Channel 2: Reset the CC4E Bit */ - TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E)); - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M)); - tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC4S)); - - /* Select the Output Compare Mode */ - tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P)); - /* Set the Output Compare Polarity */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12); - - /* Set the Output State */ - tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12); - - if((TIMx == TIM1) || (TIMx == TIM8)) - { - assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); - /* Reset the Output Compare IDLE State */ - tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS4)); - /* Set the Output Idle state */ - tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Initializes the TIM peripheral according to the specified - * parameters in the TIM_ICInitStruct. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel)); - assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler)); - assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter)); - - if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || - (TIMx == TIM4) ||(TIMx == TIM5)) - { - assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity)); - } - else - { - assert_param(IS_TIM_IC_POLARITY_LITE(TIM_ICInitStruct->TIM_ICPolarity)); - } - if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) - { - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - /* TI1 Configuration */ - TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2) - { - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - /* TI2 Configuration */ - TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3) - { - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - /* TI3 Configuration */ - TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else - { - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - /* TI4 Configuration */ - TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, - TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } -} - -/** - * @brief Configures the TIM peripheral according to the specified - * parameters in the TIM_ICInitStruct to measure an external PWM signal. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure - * that contains the configuration information for the specified TIM peripheral. - * @retval None - */ -void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) -{ - uint16_t icoppositepolarity = TIM_ICPolarity_Rising; - uint16_t icoppositeselection = TIM_ICSelection_DirectTI; - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - /* Select the Opposite Input Polarity */ - if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising) - { - icoppositepolarity = TIM_ICPolarity_Falling; - } - else - { - icoppositepolarity = TIM_ICPolarity_Rising; - } - /* Select the Opposite Input */ - if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI) - { - icoppositeselection = TIM_ICSelection_IndirectTI; - } - else - { - icoppositeselection = TIM_ICSelection_DirectTI; - } - if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) - { - /* TI1 Configuration */ - TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - /* TI2 Configuration */ - TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } - else - { - /* TI2 Configuration */ - TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, - TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - /* TI1 Configuration */ - TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); - /* Set the Input Capture Prescaler value */ - TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); - } -} - -/** - * @brief Configures the: Break feature, dead time, Lock level, the OSSI, - * the OSSR State and the AOE(automatic output enable). - * @param TIMx: where x can be 1 or 8 to select the TIM - * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that - * contains the BDTR Register configuration information for the TIM peripheral. - * @retval None - */ -void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST2_PERIPH(TIMx)); - assert_param(IS_TIM_OSSR_STATE(TIM_BDTRInitStruct->TIM_OSSRState)); - assert_param(IS_TIM_OSSI_STATE(TIM_BDTRInitStruct->TIM_OSSIState)); - assert_param(IS_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->TIM_LOCKLevel)); - assert_param(IS_TIM_BREAK_STATE(TIM_BDTRInitStruct->TIM_Break)); - assert_param(IS_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->TIM_BreakPolarity)); - assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->TIM_AutomaticOutput)); - /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State, - the OSSI State, the dead time value and the Automatic Output Enable Bit */ - TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState | TIM_BDTRInitStruct->TIM_OSSIState | - TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime | - TIM_BDTRInitStruct->TIM_Break | TIM_BDTRInitStruct->TIM_BreakPolarity | - TIM_BDTRInitStruct->TIM_AutomaticOutput; -} - -/** - * @brief Fills each TIM_TimeBaseInitStruct member with its default value. - * @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef - * structure which will be initialized. - * @retval None - */ -void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) -{ - /* Set the default configuration */ - TIM_TimeBaseInitStruct->TIM_Period = 0xFFFF; - TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000; - TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1; - TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up; - TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000; -} - -/** - * @brief Fills each TIM_OCInitStruct member with its default value. - * @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will - * be initialized. - * @retval None - */ -void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct) -{ - /* Set the default configuration */ - TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing; - TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable; - TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable; - TIM_OCInitStruct->TIM_Pulse = 0x0000; - TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High; - TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High; - TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset; - TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset; -} - -/** - * @brief Fills each TIM_ICInitStruct member with its default value. - * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure which will - * be initialized. - * @retval None - */ -void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct) -{ - /* Set the default configuration */ - TIM_ICInitStruct->TIM_Channel = TIM_Channel_1; - TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising; - TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI; - TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1; - TIM_ICInitStruct->TIM_ICFilter = 0x00; -} - -/** - * @brief Fills each TIM_BDTRInitStruct member with its default value. - * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which - * will be initialized. - * @retval None - */ -void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) -{ - /* Set the default configuration */ - TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable; - TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable; - TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF; - TIM_BDTRInitStruct->TIM_DeadTime = 0x00; - TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable; - TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low; - TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable; -} - -/** - * @brief Enables or disables the specified TIM peripheral. - * @param TIMx: where x can be 1 to 17 to select the TIMx peripheral. - * @param NewState: new state of the TIMx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the TIM Counter */ - TIMx->CR1 |= TIM_CR1_CEN; - } - else - { - /* Disable the TIM Counter */ - TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN)); - } -} - -/** - * @brief Enables or disables the TIM peripheral Main Outputs. - * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIMx peripheral. - * @param NewState: new state of the TIM peripheral Main Outputs. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST2_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the TIM Main Output */ - TIMx->BDTR |= TIM_BDTR_MOE; - } - else - { - /* Disable the TIM Main Output */ - TIMx->BDTR &= (uint16_t)(~((uint16_t)TIM_BDTR_MOE)); - } -} - -/** - * @brief Enables or disables the specified TIM interrupts. - * @param TIMx: where x can be 1 to 17 to select the TIMx peripheral. - * @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled. - * This parameter can be any combination of the following values: - * @arg TIM_IT_Update: TIM update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 and TIM7 can only generate an update interrupt. - * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, - * TIM_IT_CC2 or TIM_IT_Trigger. - * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. - * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. - * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. - * @param NewState: new state of the TIM interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_IT(TIM_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the Interrupt sources */ - TIMx->DIER |= TIM_IT; - } - else - { - /* Disable the Interrupt sources */ - TIMx->DIER &= (uint16_t)~TIM_IT; - } -} - -/** - * @brief Configures the TIMx event to be generate by software. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_EventSource: specifies the event source. - * This parameter can be one or more of the following values: - * @arg TIM_EventSource_Update: Timer update Event source - * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source - * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source - * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source - * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source - * @arg TIM_EventSource_COM: Timer COM event source - * @arg TIM_EventSource_Trigger: Timer Trigger Event source - * @arg TIM_EventSource_Break: Timer Break event source - * @note - * - TIM6 and TIM7 can only generate an update event. - * - TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1 and TIM8. - * @retval None - */ -void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource)); - - /* Set the event sources */ - TIMx->EGR = TIM_EventSource; -} - -/** - * @brief Configures the TIMx's DMA interface. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 15, 16 or 17 to select - * the TIM peripheral. - * @param TIM_DMABase: DMA Base address. - * This parameter can be one of the following values: - * @arg TIM_DMABase_CR, TIM_DMABase_CR2, TIM_DMABase_SMCR, - * TIM_DMABase_DIER, TIM1_DMABase_SR, TIM_DMABase_EGR, - * TIM_DMABase_CCMR1, TIM_DMABase_CCMR2, TIM_DMABase_CCER, - * TIM_DMABase_CNT, TIM_DMABase_PSC, TIM_DMABase_ARR, - * TIM_DMABase_RCR, TIM_DMABase_CCR1, TIM_DMABase_CCR2, - * TIM_DMABase_CCR3, TIM_DMABase_CCR4, TIM_DMABase_BDTR, - * TIM_DMABase_DCR. - * @param TIM_DMABurstLength: DMA Burst length. - * This parameter can be one value between: - * TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval None - */ -void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST4_PERIPH(TIMx)); - assert_param(IS_TIM_DMA_BASE(TIM_DMABase)); - assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength)); - /* Set the DMA Base and the DMA Burst Length */ - TIMx->DCR = TIM_DMABase | TIM_DMABurstLength; -} - -/** - * @brief Enables or disables the TIMx's DMA Requests. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 6, 7, 8, 15, 16 or 17 - * to select the TIM peripheral. - * @param TIM_DMASource: specifies the DMA Request sources. - * This parameter can be any combination of the following values: - * @arg TIM_DMA_Update: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_Trigger: TIM Trigger DMA source - * @param NewState: new state of the DMA Request sources. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST9_PERIPH(TIMx)); - assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the DMA sources */ - TIMx->DIER |= TIM_DMASource; - } - else - { - /* Disable the DMA sources */ - TIMx->DIER &= (uint16_t)~TIM_DMASource; - } -} - -/** - * @brief Configures the TIMx internal Clock - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 - * to select the TIM peripheral. - * @retval None - */ -void TIM_InternalClockConfig(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - /* Disable slave mode to clock the prescaler directly with the internal clock */ - TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); -} - -/** - * @brief Configures the TIMx Internal Trigger as External Clock - * @param TIMx: where x can be 1, 2, 3, 4, 5, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_ITRSource: Trigger source. - * This parameter can be one of the following values: - * @param TIM_TS_ITR0: Internal Trigger 0 - * @param TIM_TS_ITR1: Internal Trigger 1 - * @param TIM_TS_ITR2: Internal Trigger 2 - * @param TIM_TS_ITR3: Internal Trigger 3 - * @retval None - */ -void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource)); - /* Select the Internal Trigger */ - TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource); - /* Select the External clock mode1 */ - TIMx->SMCR |= TIM_SlaveMode_External1; -} - -/** - * @brief Configures the TIMx Trigger as External Clock - * @param TIMx: where x can be 1, 2, 3, 4, 5, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_TIxExternalCLKSource: Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector - * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1 - * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2 - * @param TIM_ICPolarity: specifies the TIx Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param ICFilter : specifies the filter value. - * This parameter must be a value between 0x0 and 0xF. - * @retval None - */ -void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, - uint16_t TIM_ICPolarity, uint16_t ICFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_TIXCLK_SOURCE(TIM_TIxExternalCLKSource)); - assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity)); - assert_param(IS_TIM_IC_FILTER(ICFilter)); - /* Configure the Timer Input Clock Source */ - if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2) - { - TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); - } - else - { - TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); - } - /* Select the Trigger source */ - TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource); - /* Select the External clock mode1 */ - TIMx->SMCR |= TIM_SlaveMode_External1; -} - -/** - * @brief Configures the External clock Mode1 - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter) -{ - uint16_t tmpsmcr = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); - assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); - assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); - /* Configure the ETR Clock source */ - TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the SMS Bits */ - tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); - /* Select the External clock mode1 */ - tmpsmcr |= TIM_SlaveMode_External1; - /* Select the Trigger selection : ETRF */ - tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS)); - tmpsmcr |= TIM_TS_ETRF; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Configures the External clock Mode2 - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, - uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); - assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); - assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); - /* Configure the ETR Clock source */ - TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); - /* Enable the External clock mode2 */ - TIMx->SMCR |= TIM_SMCR_ECE; -} - -/** - * @brief Configures the TIMx External Trigger (ETR). - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, - uint16_t ExtTRGFilter) -{ - uint16_t tmpsmcr = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); - assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); - assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); - tmpsmcr = TIMx->SMCR; - /* Reset the ETR Bits */ - tmpsmcr &= SMCR_ETR_Mask; - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint16_t)(TIM_ExtTRGPrescaler | (uint16_t)(TIM_ExtTRGPolarity | (uint16_t)(ExtTRGFilter << (uint16_t)8))); - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Configures the TIMx Prescaler. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param Prescaler: specifies the Prescaler Register value - * @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode - * This parameter can be one of the following values: - * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. - * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediately. - * @retval None - */ -void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode)); - /* Set the Prescaler value */ - TIMx->PSC = Prescaler; - /* Set or reset the UG Bit */ - TIMx->EGR = TIM_PSCReloadMode; -} - -/** - * @brief Specifies the TIMx Counter Mode to be used. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_CounterMode: specifies the Counter Mode to be used - * This parameter can be one of the following values: - * @arg TIM_CounterMode_Up: TIM Up Counting Mode - * @arg TIM_CounterMode_Down: TIM Down Counting Mode - * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1 - * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2 - * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3 - * @retval None - */ -void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode) -{ - uint16_t tmpcr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode)); - tmpcr1 = TIMx->CR1; - /* Reset the CMS and DIR Bits */ - tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); - /* Set the Counter Mode */ - tmpcr1 |= TIM_CounterMode; - /* Write to TIMx CR1 register */ - TIMx->CR1 = tmpcr1; -} - -/** - * @brief Selects the Input Trigger source - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_InputTriggerSource: The Input Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 - * @arg TIM_TS_TI1F_ED: TI1 Edge Detector - * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) -{ - uint16_t tmpsmcr = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource)); - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the TS Bits */ - tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS)); - /* Set the Input Trigger source */ - tmpsmcr |= TIM_InputTriggerSource; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Configures the TIMx Encoder Interface. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_EncoderMode: specifies the TIMx Encoder Mode. - * This parameter can be one of the following values: - * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level. - * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level. - * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending - * on the level of the other input. - * @param TIM_IC1Polarity: specifies the IC1 Polarity - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Falling: IC Falling edge. - * @arg TIM_ICPolarity_Rising: IC Rising edge. - * @param TIM_IC2Polarity: specifies the IC2 Polarity - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Falling: IC Falling edge. - * @arg TIM_ICPolarity_Rising: IC Rising edge. - * @retval None - */ -void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, - uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity) -{ - uint16_t tmpsmcr = 0; - uint16_t tmpccmr1 = 0; - uint16_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST5_PERIPH(TIMx)); - assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode)); - assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity)); - assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity)); - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = TIMx->CCMR1; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - - /* Set the encoder Mode */ - tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); - tmpsmcr |= TIM_EncoderMode; - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S))); - tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0; - - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2P))); - tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4)); - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmr1; - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Forces the TIMx output 1 waveform to active or inactive level. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC1REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF. - * @retval None - */ -void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1M Bits */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M); - /* Configure The Forced output Mode */ - tmpccmr1 |= TIM_ForcedAction; - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Forces the TIMx output 2 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC2REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF. - * @retval None - */ -void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2M Bits */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M); - /* Configure The Forced output Mode */ - tmpccmr1 |= (uint16_t)(TIM_ForcedAction << 8); - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Forces the TIMx output 3 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC3REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF. - * @retval None - */ -void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC1M Bits */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M); - /* Configure The Forced output Mode */ - tmpccmr2 |= TIM_ForcedAction; - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Forces the TIMx output 4 waveform to active or inactive level. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. - * This parameter can be one of the following values: - * @arg TIM_ForcedAction_Active: Force active level on OC4REF - * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF. - * @retval None - */ -void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC2M Bits */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M); - /* Configure The Forced output Mode */ - tmpccmr2 |= (uint16_t)(TIM_ForcedAction << 8); - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Enables or disables TIMx peripheral Preload register on ARR. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param NewState: new state of the TIMx peripheral Preload register - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the ARR Preload Bit */ - TIMx->CR1 |= TIM_CR1_ARPE; - } - else - { - /* Reset the ARR Preload Bit */ - TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE); - } -} - -/** - * @brief Selects the TIM peripheral Commutation event. - * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIMx peripheral - * @param NewState: new state of the Commutation event. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST2_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the COM Bit */ - TIMx->CR2 |= TIM_CR2_CCUS; - } - else - { - /* Reset the COM Bit */ - TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCUS); - } -} - -/** - * @brief Selects the TIMx peripheral Capture Compare DMA source. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 15, 16 or 17 to select - * the TIM peripheral. - * @param NewState: new state of the Capture Compare DMA source - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST4_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the CCDS Bit */ - TIMx->CR2 |= TIM_CR2_CCDS; - } - else - { - /* Reset the CCDS Bit */ - TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS); - } -} - -/** - * @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8 or 15 - * to select the TIMx peripheral - * @param NewState: new state of the Capture Compare Preload Control bit - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST5_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the CCPC Bit */ - TIMx->CR2 |= TIM_CR2_CCPC; - } - else - { - /* Reset the CCPC Bit */ - TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCPC); - } -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR1. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1PE Bit */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE); - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr1 |= TIM_OCPreload; - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR2. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select - * the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2PE Bit */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE); - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8); - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR3. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC3PE Bit */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE); - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr2 |= TIM_OCPreload; - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Enables or disables the TIMx peripheral Preload register on CCR4. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPreload: new state of the TIMx peripheral Preload register - * This parameter can be one of the following values: - * @arg TIM_OCPreload_Enable - * @arg TIM_OCPreload_Disable - * @retval None - */ -void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC4PE Bit */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE); - /* Enable or Disable the Output Compare Preload feature */ - tmpccmr2 |= (uint16_t)(TIM_OCPreload << 8); - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Configures the TIMx Output Compare 1 Fast feature. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC1FE Bit */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE); - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr1 |= TIM_OCFast; - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Configures the TIMx Output Compare 2 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select - * the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2FE Bit */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE); - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr1 |= (uint16_t)(TIM_OCFast << 8); - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Configures the TIMx Output Compare 3 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR2 register value */ - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC3FE Bit */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE); - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr2 |= TIM_OCFast; - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Configures the TIMx Output Compare 4 Fast feature. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCFast_Enable: TIM output compare fast enable - * @arg TIM_OCFast_Disable: TIM output compare fast disable - * @retval None - */ -void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); - /* Get the TIMx CCMR2 register value */ - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC4FE Bit */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE); - /* Enable or Disable the Output Compare Fast Bit */ - tmpccmr2 |= (uint16_t)(TIM_OCFast << 8); - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Clears or safeguards the OCREF1 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - - tmpccmr1 = TIMx->CCMR1; - - /* Reset the OC1CE Bit */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE); - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr1 |= TIM_OCClear; - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Clears or safeguards the OCREF2 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr1 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr1 = TIMx->CCMR1; - /* Reset the OC2CE Bit */ - tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE); - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr1 |= (uint16_t)(TIM_OCClear << 8); - /* Write to TIMx CCMR1 register */ - TIMx->CCMR1 = tmpccmr1; -} - -/** - * @brief Clears or safeguards the OCREF3 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC3CE Bit */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE); - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr2 |= TIM_OCClear; - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Clears or safeguards the OCREF4 signal on an external event - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. - * This parameter can be one of the following values: - * @arg TIM_OCClear_Enable: TIM Output clear enable - * @arg TIM_OCClear_Disable: TIM Output clear disable - * @retval None - */ -void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) -{ - uint16_t tmpccmr2 = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); - tmpccmr2 = TIMx->CCMR2; - /* Reset the OC4CE Bit */ - tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE); - /* Enable or Disable the Output Compare Clear Bit */ - tmpccmr2 |= (uint16_t)(TIM_OCClear << 8); - /* Write to TIMx CCMR2 register */ - TIMx->CCMR2 = tmpccmr2; -} - -/** - * @brief Configures the TIMx channel 1 polarity. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC1 Polarity - * This parameter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC1P Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P); - tmpccer |= TIM_OCPolarity; - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx Channel 1N polarity. - * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIM peripheral. - * @param TIM_OCNPolarity: specifies the OC1N Polarity - * This parameter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST2_PERIPH(TIMx)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); - - tmpccer = TIMx->CCER; - /* Set or Reset the CC1NP Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1NP); - tmpccer |= TIM_OCNPolarity; - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx channel 2 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC2 Polarity - * This parameter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC2P Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P); - tmpccer |= (uint16_t)(TIM_OCPolarity << 4); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx Channel 2N polarity. - * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. - * @param TIM_OCNPolarity: specifies the OC2N Polarity - * This parameter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST1_PERIPH(TIMx)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); - - tmpccer = TIMx->CCER; - /* Set or Reset the CC2NP Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2NP); - tmpccer |= (uint16_t)(TIM_OCNPolarity << 4); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx channel 3 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC3 Polarity - * This parameter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC3P Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P); - tmpccer |= (uint16_t)(TIM_OCPolarity << 8); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx Channel 3N polarity. - * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. - * @param TIM_OCNPolarity: specifies the OC3N Polarity - * This parameter can be one of the following values: - * @arg TIM_OCNPolarity_High: Output Compare active high - * @arg TIM_OCNPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) -{ - uint16_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST1_PERIPH(TIMx)); - assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); - - tmpccer = TIMx->CCER; - /* Set or Reset the CC3NP Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3NP); - tmpccer |= (uint16_t)(TIM_OCNPolarity << 8); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Configures the TIMx channel 4 polarity. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_OCPolarity: specifies the OC4 Polarity - * This parameter can be one of the following values: - * @arg TIM_OCPolarity_High: Output Compare active high - * @arg TIM_OCPolarity_Low: Output Compare active low - * @retval None - */ -void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) -{ - uint16_t tmpccer = 0; - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); - tmpccer = TIMx->CCER; - /* Set or Reset the CC4P Bit */ - tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P); - tmpccer |= (uint16_t)(TIM_OCPolarity << 12); - /* Write to TIMx CCER register */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel x. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @param TIM_CCx: specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable. - * @retval None - */ -void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) -{ - uint16_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_CHANNEL(TIM_Channel)); - assert_param(IS_TIM_CCX(TIM_CCx)); - - tmp = CCER_CCE_Set << TIM_Channel; - - /* Reset the CCxE Bit */ - TIMx->CCER &= (uint16_t)~ tmp; - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint16_t)(TIM_CCx << TIM_Channel); -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel xN. - * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIM peripheral. - * @param TIM_Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable. - * @retval None - */ -void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) -{ - uint16_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST2_PERIPH(TIMx)); - assert_param(IS_TIM_COMPLEMENTARY_CHANNEL(TIM_Channel)); - assert_param(IS_TIM_CCXN(TIM_CCxN)); - - tmp = CCER_CCNE_Set << TIM_Channel; - - /* Reset the CCxNE Bit */ - TIMx->CCER &= (uint16_t) ~tmp; - - /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint16_t)(TIM_CCxN << TIM_Channel); -} - -/** - * @brief Selects the TIM Output Compare Mode. - * @note This function disables the selected channel before changing the Output - * Compare Mode. - * User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @param TIM_OCMode: specifies the TIM Output Compare Mode. - * This parameter can be one of the following values: - * @arg TIM_OCMode_Timing - * @arg TIM_OCMode_Active - * @arg TIM_OCMode_Toggle - * @arg TIM_OCMode_PWM1 - * @arg TIM_OCMode_PWM2 - * @arg TIM_ForcedAction_Active - * @arg TIM_ForcedAction_InActive - * @retval None - */ -void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode) -{ - uint32_t tmp = 0; - uint16_t tmp1 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_CHANNEL(TIM_Channel)); - assert_param(IS_TIM_OCM(TIM_OCMode)); - - tmp = (uint32_t) TIMx; - tmp += CCMR_Offset; - - tmp1 = CCER_CCE_Set << (uint16_t)TIM_Channel; - - /* Disable the Channel: Reset the CCxE Bit */ - TIMx->CCER &= (uint16_t) ~tmp1; - - if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3)) - { - tmp += (TIM_Channel>>1); - - /* Reset the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M); - - /* Configure the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp |= TIM_OCMode; - } - else - { - tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1; - - /* Reset the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M); - - /* Configure the OCxM bits in the CCMRx register */ - *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8); - } -} - -/** - * @brief Enables or Disables the TIMx Update event. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param NewState: new state of the TIMx UDIS bit - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the Update Disable Bit */ - TIMx->CR1 |= TIM_CR1_UDIS; - } - else - { - /* Reset the Update Disable Bit */ - TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS); - } -} - -/** - * @brief Configures the TIMx Update Request Interrupt source. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_UpdateSource: specifies the Update source. - * This parameter can be one of the following values: - * @arg TIM_UpdateSource_Regular: Source of update is the counter overflow/underflow - or the setting of UG bit, or an update generation - through the slave mode controller. - * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. - * @retval None - */ -void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource)); - if (TIM_UpdateSource != TIM_UpdateSource_Global) - { - /* Set the URS Bit */ - TIMx->CR1 |= TIM_CR1_URS; - } - else - { - /* Reset the URS Bit */ - TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS); - } -} - -/** - * @brief Enables or disables the TIMx's Hall sensor interface. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param NewState: new state of the TIMx Hall sensor interface. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Set the TI1S Bit */ - TIMx->CR2 |= TIM_CR2_TI1S; - } - else - { - /* Reset the TI1S Bit */ - TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S); - } -} - -/** - * @brief Selects the TIMx's One Pulse Mode. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_OPMode: specifies the OPM Mode to be used. - * This parameter can be one of the following values: - * @arg TIM_OPMode_Single - * @arg TIM_OPMode_Repetitive - * @retval None - */ -void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_OPM_MODE(TIM_OPMode)); - /* Reset the OPM Bit */ - TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM); - /* Configure the OPM Mode */ - TIMx->CR1 |= TIM_OPMode; -} - -/** - * @brief Selects the TIMx Trigger Output Mode. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_TRGOSource: specifies the Trigger Output source. - * This paramter can be one of the following values: - * - * - For all TIMx - * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO). - * - * - For all TIMx except TIM6 and TIM7 - * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag - * is to be set, as soon as a capture or compare match occurs (TRGO). - * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). - * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). - * - * @retval None - */ -void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST7_PERIPH(TIMx)); - assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource)); - /* Reset the MMS Bits */ - TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS); - /* Select the TRGO source */ - TIMx->CR2 |= TIM_TRGOSource; -} - -/** - * @brief Selects the TIMx Slave Mode. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_SlaveMode: specifies the Timer Slave Mode. - * This parameter can be one of the following values: - * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes - * the counter and triggers an update of the registers. - * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high. - * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI. - * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter. - * @retval None - */ -void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode)); - /* Reset the SMS Bits */ - TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS); - /* Select the Slave Mode */ - TIMx->SMCR |= TIM_SlaveMode; -} - -/** - * @brief Sets or Resets the TIMx Master/Slave Mode. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode. - * This parameter can be one of the following values: - * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer - * and its slaves (through TRGO). - * @arg TIM_MasterSlaveMode_Disable: No action - * @retval None - */ -void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode)); - /* Reset the MSM Bit */ - TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM); - - /* Set or Reset the MSM Bit */ - TIMx->SMCR |= TIM_MasterSlaveMode; -} - -/** - * @brief Sets the TIMx Counter Register value - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param Counter: specifies the Counter register new value. - * @retval None - */ -void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Set the Counter Register value */ - TIMx->CNT = Counter; -} - -/** - * @brief Sets the TIMx Autoreload Register value - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param Autoreload: specifies the Autoreload register new value. - * @retval None - */ -void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Set the Autoreload Register value */ - TIMx->ARR = Autoreload; -} - -/** - * @brief Sets the TIMx Capture Compare1 Register value - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param Compare1: specifies the Capture Compare1 register new value. - * @retval None - */ -void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - /* Set the Capture Compare1 Register value */ - TIMx->CCR1 = Compare1; -} - -/** - * @brief Sets the TIMx Capture Compare2 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param Compare2: specifies the Capture Compare2 register new value. - * @retval None - */ -void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - /* Set the Capture Compare2 Register value */ - TIMx->CCR2 = Compare2; -} - -/** - * @brief Sets the TIMx Capture Compare3 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param Compare3: specifies the Capture Compare3 register new value. - * @retval None - */ -void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - /* Set the Capture Compare3 Register value */ - TIMx->CCR3 = Compare3; -} - -/** - * @brief Sets the TIMx Capture Compare4 Register value - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param Compare4: specifies the Capture Compare4 register new value. - * @retval None - */ -void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - /* Set the Capture Compare4 Register value */ - TIMx->CCR4 = Compare4; -} - -/** - * @brief Sets the TIMx Input Capture 1 prescaler. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture1 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC1PSC Bits */ - TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC); - /* Set the IC1PSC value */ - TIMx->CCMR1 |= TIM_ICPSC; -} - -/** - * @brief Sets the TIMx Input Capture 2 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture2 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC2PSC Bits */ - TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC); - /* Set the IC2PSC value */ - TIMx->CCMR1 |= (uint16_t)(TIM_ICPSC << 8); -} - -/** - * @brief Sets the TIMx Input Capture 3 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture3 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC3PSC Bits */ - TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC); - /* Set the IC3PSC value */ - TIMx->CCMR2 |= TIM_ICPSC; -} - -/** - * @brief Sets the TIMx Input Capture 4 prescaler. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPSC: specifies the Input Capture4 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); - /* Reset the IC4PSC Bits */ - TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC); - /* Set the IC4PSC value */ - TIMx->CCMR2 |= (uint16_t)(TIM_ICPSC << 8); -} - -/** - * @brief Sets the TIMx Clock Division value. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select - * the TIM peripheral. - * @param TIM_CKD: specifies the clock division value. - * This parameter can be one of the following value: - * @arg TIM_CKD_DIV1: TDTS = Tck_tim - * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim - * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim - * @retval None - */ -void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - assert_param(IS_TIM_CKD_DIV(TIM_CKD)); - /* Reset the CKD Bits */ - TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD); - /* Set the CKD value */ - TIMx->CR1 |= TIM_CKD; -} - -/** - * @brief Gets the TIMx Input Capture 1 value. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @retval Capture Compare 1 Register value. - */ -uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST8_PERIPH(TIMx)); - /* Get the Capture 1 Register value */ - return TIMx->CCR1; -} - -/** - * @brief Gets the TIMx Input Capture 2 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @retval Capture Compare 2 Register value. - */ -uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST6_PERIPH(TIMx)); - /* Get the Capture 2 Register value */ - return TIMx->CCR2; -} - -/** - * @brief Gets the TIMx Input Capture 3 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval Capture Compare 3 Register value. - */ -uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - /* Get the Capture 3 Register value */ - return TIMx->CCR3; -} - -/** - * @brief Gets the TIMx Input Capture 4 value. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @retval Capture Compare 4 Register value. - */ -uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_LIST3_PERIPH(TIMx)); - /* Get the Capture 4 Register value */ - return TIMx->CCR4; -} - -/** - * @brief Gets the TIMx Counter value. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @retval Counter Register value. - */ -uint16_t TIM_GetCounter(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Get the Counter Register value */ - return TIMx->CNT; -} - -/** - * @brief Gets the TIMx Prescaler value. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @retval Prescaler Register value. - */ -uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - /* Get the Prescaler Register value */ - return TIMx->PSC; -} - -/** - * @brief Checks whether the specified TIM flag is set or not. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg TIM_FLAG_Update: TIM update Flag - * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag - * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag - * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag - * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag - * @arg TIM_FLAG_COM: TIM Commutation Flag - * @arg TIM_FLAG_Trigger: TIM Trigger Flag - * @arg TIM_FLAG_Break: TIM Break Flag - * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag - * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag - * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag - * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag - * @note - * - TIM6 and TIM7 can have only one update flag. - * - TIM9, TIM12 and TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, - * TIM_FLAG_CC2 or TIM_FLAG_Trigger. - * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. - * - TIM_FLAG_Break is used only with TIM1, TIM8 and TIM15. - * - TIM_FLAG_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. - * @retval The new state of TIM_FLAG (SET or RESET). - */ -FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) -{ - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_GET_FLAG(TIM_FLAG)); - - if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the TIMx's pending flags. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_FLAG: specifies the flag bit to clear. - * This parameter can be any combination of the following values: - * @arg TIM_FLAG_Update: TIM update Flag - * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag - * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag - * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag - * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag - * @arg TIM_FLAG_COM: TIM Commutation Flag - * @arg TIM_FLAG_Trigger: TIM Trigger Flag - * @arg TIM_FLAG_Break: TIM Break Flag - * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag - * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag - * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag - * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag - * @note - * - TIM6 and TIM7 can have only one update flag. - * - TIM9, TIM12 and TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, - * TIM_FLAG_CC2 or TIM_FLAG_Trigger. - * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. - * - TIM_FLAG_Break is used only with TIM1, TIM8 and TIM15. - * - TIM_FLAG_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. - * @retval None - */ -void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG)); - - /* Clear the flags */ - TIMx->SR = (uint16_t)~TIM_FLAG; -} - -/** - * @brief Checks whether the TIM interrupt has occurred or not. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_IT: specifies the TIM interrupt source to check. - * This parameter can be one of the following values: - * @arg TIM_IT_Update: TIM update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 and TIM7 can generate only an update interrupt. - * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, - * TIM_IT_CC2 or TIM_IT_Trigger. - * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. - * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. - * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. - * @retval The new state of the TIM_IT(SET or RESET). - */ -ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) -{ - ITStatus bitstatus = RESET; - uint16_t itstatus = 0x0, itenable = 0x0; - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_GET_IT(TIM_IT)); - - itstatus = TIMx->SR & TIM_IT; - - itenable = TIMx->DIER & TIM_IT; - if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the TIMx's interrupt pending bits. - * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. - * @param TIM_IT: specifies the pending bit to clear. - * This parameter can be any combination of the following values: - * @arg TIM_IT_Update: TIM1 update Interrupt source - * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source - * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source - * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source - * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source - * @arg TIM_IT_COM: TIM Commutation Interrupt source - * @arg TIM_IT_Trigger: TIM Trigger Interrupt source - * @arg TIM_IT_Break: TIM Break Interrupt source - * @note - * - TIM6 and TIM7 can generate only an update interrupt. - * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, - * TIM_IT_CC2 or TIM_IT_Trigger. - * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. - * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. - * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. - * @retval None - */ -void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) -{ - /* Check the parameters */ - assert_param(IS_TIM_ALL_PERIPH(TIMx)); - assert_param(IS_TIM_IT(TIM_IT)); - /* Clear the IT pending Bit */ - TIMx->SR = (uint16_t)~TIM_IT; -} - -/** - * @brief Configure the TI1 as Input. - * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. - * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. - * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr1 = 0, tmpccer = 0; - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - /* Select the Input and set the filter */ - tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F))); - tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); - - if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || - (TIMx == TIM4) ||(TIMx == TIM5)) - { - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P)); - tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); - } - else - { - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); - tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); - } - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI2 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. - * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. - * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0; - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E); - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - tmp = (uint16_t)(TIM_ICPolarity << 4); - /* Select the Input and set the filter */ - tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F))); - tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12); - tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8); - - if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || - (TIMx == TIM4) ||(TIMx == TIM5)) - { - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P)); - tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC2E); - } - else - { - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P | TIM_CCER_CC2NP)); - tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC2E); - } - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI3 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. - * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. - * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E); - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - tmp = (uint16_t)(TIM_ICPolarity << 8); - /* Select the Input and set the filter */ - tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F))); - tmpccmr2 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); - - if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || - (TIMx == TIM4) ||(TIMx == TIM5)) - { - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P)); - tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC3E); - } - else - { - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC3NP)); - tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC3E); - } - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI4 as Input. - * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. - * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. - * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, - uint16_t TIM_ICFilter) -{ - uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E); - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - tmp = (uint16_t)(TIM_ICPolarity << 12); - /* Select the Input and set the filter */ - tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F))); - tmpccmr2 |= (uint16_t)(TIM_ICSelection << 8); - tmpccmr2 |= (uint16_t)(TIM_ICFilter << 12); - - if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || - (TIMx == TIM4) ||(TIMx == TIM5)) - { - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P)); - tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC4E); - } - else - { - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC4NP)); - tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC4E); - } - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_tim.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the TIM firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_tim.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup TIM + * @brief TIM driver modules + * @{ + */ + +/** @defgroup TIM_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Defines + * @{ + */ + +/* ---------------------- TIM registers bit mask ------------------------ */ +#define SMCR_ETR_Mask ((uint16_t)0x00FF) +#define CCMR_Offset ((uint16_t)0x0018) +#define CCER_CCE_Set ((uint16_t)0x0001) +#define CCER_CCNE_Set ((uint16_t)0x0004) + +/** + * @} + */ + +/** @defgroup TIM_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_FunctionPrototypes + * @{ + */ + +static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter); +/** + * @} + */ + +/** @defgroup TIM_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup TIM_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the TIMx peripheral registers to their default reset values. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @retval None + */ +void TIM_DeInit(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + + if (TIMx == TIM1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); + } + else if (TIMx == TIM2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); + } + else if (TIMx == TIM3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); + } + else if (TIMx == TIM4) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); + } + else if (TIMx == TIM5) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); + } + else if (TIMx == TIM6) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); + } + else if (TIMx == TIM7) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE); + } + else if (TIMx == TIM8) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE); + } + else if (TIMx == TIM9) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE); + } + else if (TIMx == TIM10) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE); + } + else if (TIMx == TIM11) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE); + } + else if (TIMx == TIM12) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, DISABLE); + } + else if (TIMx == TIM13) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, DISABLE); + } + else if (TIMx == TIM14) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE); + } + else if (TIMx == TIM15) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE); + } + else if (TIMx == TIM16) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE); + } + else + { + if (TIMx == TIM17) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE); + } + } +} + +/** + * @brief Initializes the TIMx Time Base Unit peripheral according to + * the specified parameters in the TIM_TimeBaseInitStruct. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef + * structure that contains the configuration information for the + * specified TIM peripheral. + * @retval None + */ +void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) +{ + uint16_t tmpcr1 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode)); + assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision)); + + tmpcr1 = TIMx->CR1; + + if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM2) || (TIMx == TIM3)|| + (TIMx == TIM4) || (TIMx == TIM5)) + { + /* Select the Counter Mode */ + tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); + tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode; + } + + if((TIMx != TIM6) && (TIMx != TIM7)) + { + /* Set the clock division */ + tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD)); + tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; + } + + TIMx->CR1 = tmpcr1; + + /* Set the Autoreload value */ + TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; + + /* Set the Prescaler value */ + TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; + + if ((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| (TIMx == TIM16) || (TIMx == TIM17)) + { + /* Set the Repetition Counter value */ + TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; + } + + /* Generate an update event to reload the Prescaler and the Repetition counter + values immediately */ + TIMx->EGR = TIM_PSCReloadMode_Immediate; +} + +/** + * @brief Initializes the TIMx Channel1 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 1: Reset the CC1E Bit */ + TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E); + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR1; + + /* Reset the Output Compare Mode Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S)); + + /* Select the Output Compare Mode */ + tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P)); + /* Set the Output Compare Polarity */ + tmpccer |= TIM_OCInitStruct->TIM_OCPolarity; + + /* Set the Output State */ + tmpccer |= TIM_OCInitStruct->TIM_OutputState; + + if((TIMx == TIM1) || (TIMx == TIM8)|| (TIMx == TIM15)|| + (TIMx == TIM16)|| (TIMx == TIM17)) + { + assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); + assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + + /* Reset the Output N Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NP)); + /* Set the Output N Polarity */ + tmpccer |= TIM_OCInitStruct->TIM_OCNPolarity; + + /* Reset the Output N State */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NE)); + /* Set the Output N State */ + tmpccer |= TIM_OCInitStruct->TIM_OutputNState; + + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N)); + + /* Set the Output Idle state */ + tmpcr2 |= TIM_OCInitStruct->TIM_OCIdleState; + /* Set the Output N Idle state */ + tmpcr2 |= TIM_OCInitStruct->TIM_OCNIdleState; + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIMx Channel2 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select + * the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E)); + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR1 register value */ + tmpccmrx = TIMx->CCMR1; + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)); + + /* Select the Output Compare Mode */ + tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P)); + /* Set the Output Compare Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4); + + /* Set the Output State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4); + + if((TIMx == TIM1) || (TIMx == TIM8)) + { + assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); + assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + + /* Reset the Output N Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP)); + /* Set the Output N Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4); + + /* Reset the Output N State */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE)); + /* Set the Output N State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4); + + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N)); + + /* Set the Output Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2); + /* Set the Output N Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2); + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIMx Channel3 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E)); + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR2 register value */ + tmpccmrx = TIMx->CCMR2; + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC3S)); + /* Select the Output Compare Mode */ + tmpccmrx |= TIM_OCInitStruct->TIM_OCMode; + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P)); + /* Set the Output Compare Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8); + + /* Set the Output State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8); + + if((TIMx == TIM1) || (TIMx == TIM8)) + { + assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity)); + assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState)); + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + + /* Reset the Output N Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NP)); + /* Set the Output N Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8); + /* Reset the Output N State */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NE)); + + /* Set the Output N State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8); + /* Reset the Output Compare and Output Compare N IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3)); + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3N)); + /* Set the Output Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4); + /* Set the Output N Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4); + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIMx Channel4 according to the specified + * parameters in the TIM_OCInitStruct. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode)); + assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity)); + /* Disable the Channel 2: Reset the CC4E Bit */ + TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E)); + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + /* Get the TIMx CR2 register value */ + tmpcr2 = TIMx->CR2; + + /* Get the TIMx CCMR2 register value */ + tmpccmrx = TIMx->CCMR2; + + /* Reset the Output Compare mode and Capture/Compare selection Bits */ + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M)); + tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC4S)); + + /* Select the Output Compare Mode */ + tmpccmrx |= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8); + + /* Reset the Output Polarity level */ + tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P)); + /* Set the Output Compare Polarity */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12); + + /* Set the Output State */ + tmpccer |= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12); + + if((TIMx == TIM1) || (TIMx == TIM8)) + { + assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState)); + /* Reset the Output Compare IDLE State */ + tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS4)); + /* Set the Output Idle state */ + tmpcr2 |= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6); + } + /* Write to TIMx CR2 */ + TIMx->CR2 = tmpcr2; + + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmrx; + + /* Set the Capture Compare Register value */ + TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse; + + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Initializes the TIM peripheral according to the specified + * parameters in the TIM_ICInitStruct. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + /* Check the parameters */ + assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel)); + assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler)); + assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter)); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity)); + } + else + { + assert_param(IS_TIM_IC_POLARITY_LITE(TIM_ICInitStruct->TIM_ICPolarity)); + } + if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) + { + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + /* TI1 Configuration */ + TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2) + { + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* TI2 Configuration */ + TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3) + { + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* TI3 Configuration */ + TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else + { + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* TI4 Configuration */ + TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, + TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } +} + +/** + * @brief Configures the TIM peripheral according to the specified + * parameters in the TIM_ICInitStruct to measure an external PWM signal. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure + * that contains the configuration information for the specified TIM peripheral. + * @retval None + */ +void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + uint16_t icoppositepolarity = TIM_ICPolarity_Rising; + uint16_t icoppositeselection = TIM_ICSelection_DirectTI; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Select the Opposite Input Polarity */ + if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising) + { + icoppositepolarity = TIM_ICPolarity_Falling; + } + else + { + icoppositepolarity = TIM_ICPolarity_Rising; + } + /* Select the Opposite Input */ + if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI) + { + icoppositeselection = TIM_ICSelection_IndirectTI; + } + else + { + icoppositeselection = TIM_ICSelection_DirectTI; + } + if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1) + { + /* TI1 Configuration */ + TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + /* TI2 Configuration */ + TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } + else + { + /* TI2 Configuration */ + TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection, + TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + /* TI1 Configuration */ + TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter); + /* Set the Input Capture Prescaler value */ + TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler); + } +} + +/** + * @brief Configures the: Break feature, dead time, Lock level, the OSSI, + * the OSSR State and the AOE(automatic output enable). + * @param TIMx: where x can be 1 or 8 to select the TIM + * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that + * contains the BDTR Register configuration information for the TIM peripheral. + * @retval None + */ +void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_TIM_OSSR_STATE(TIM_BDTRInitStruct->TIM_OSSRState)); + assert_param(IS_TIM_OSSI_STATE(TIM_BDTRInitStruct->TIM_OSSIState)); + assert_param(IS_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->TIM_LOCKLevel)); + assert_param(IS_TIM_BREAK_STATE(TIM_BDTRInitStruct->TIM_Break)); + assert_param(IS_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->TIM_BreakPolarity)); + assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->TIM_AutomaticOutput)); + /* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State, + the OSSI State, the dead time value and the Automatic Output Enable Bit */ + TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState | TIM_BDTRInitStruct->TIM_OSSIState | + TIM_BDTRInitStruct->TIM_LOCKLevel | TIM_BDTRInitStruct->TIM_DeadTime | + TIM_BDTRInitStruct->TIM_Break | TIM_BDTRInitStruct->TIM_BreakPolarity | + TIM_BDTRInitStruct->TIM_AutomaticOutput; +} + +/** + * @brief Fills each TIM_TimeBaseInitStruct member with its default value. + * @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef + * structure which will be initialized. + * @retval None + */ +void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct) +{ + /* Set the default configuration */ + TIM_TimeBaseInitStruct->TIM_Period = 0xFFFF; + TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000; + TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up; + TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000; +} + +/** + * @brief Fills each TIM_OCInitStruct member with its default value. + * @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will + * be initialized. + * @retval None + */ +void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct) +{ + /* Set the default configuration */ + TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing; + TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable; + TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable; + TIM_OCInitStruct->TIM_Pulse = 0x0000; + TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High; + TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High; + TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset; + TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset; +} + +/** + * @brief Fills each TIM_ICInitStruct member with its default value. + * @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure which will + * be initialized. + * @retval None + */ +void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct) +{ + /* Set the default configuration */ + TIM_ICInitStruct->TIM_Channel = TIM_Channel_1; + TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising; + TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI; + TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1; + TIM_ICInitStruct->TIM_ICFilter = 0x00; +} + +/** + * @brief Fills each TIM_BDTRInitStruct member with its default value. + * @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which + * will be initialized. + * @retval None + */ +void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct) +{ + /* Set the default configuration */ + TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable; + TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable; + TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF; + TIM_BDTRInitStruct->TIM_DeadTime = 0x00; + TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable; + TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low; + TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable; +} + +/** + * @brief Enables or disables the specified TIM peripheral. + * @param TIMx: where x can be 1 to 17 to select the TIMx peripheral. + * @param NewState: new state of the TIMx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the TIM Counter */ + TIMx->CR1 |= TIM_CR1_CEN; + } + else + { + /* Disable the TIM Counter */ + TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN)); + } +} + +/** + * @brief Enables or disables the TIM peripheral Main Outputs. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIMx peripheral. + * @param NewState: new state of the TIM peripheral Main Outputs. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the TIM Main Output */ + TIMx->BDTR |= TIM_BDTR_MOE; + } + else + { + /* Disable the TIM Main Output */ + TIMx->BDTR &= (uint16_t)(~((uint16_t)TIM_BDTR_MOE)); + } +} + +/** + * @brief Enables or disables the specified TIM interrupts. + * @param TIMx: where x can be 1 to 17 to select the TIMx peripheral. + * @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled. + * This parameter can be any combination of the following values: + * @arg TIM_IT_Update: TIM update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * @note + * - TIM6 and TIM7 can only generate an update interrupt. + * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, + * TIM_IT_CC2 or TIM_IT_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @param NewState: new state of the TIM interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_IT(TIM_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the Interrupt sources */ + TIMx->DIER |= TIM_IT; + } + else + { + /* Disable the Interrupt sources */ + TIMx->DIER &= (uint16_t)~TIM_IT; + } +} + +/** + * @brief Configures the TIMx event to be generate by software. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_EventSource: specifies the event source. + * This parameter can be one or more of the following values: + * @arg TIM_EventSource_Update: Timer update Event source + * @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source + * @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source + * @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source + * @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source + * @arg TIM_EventSource_COM: Timer COM event source + * @arg TIM_EventSource_Trigger: Timer Trigger Event source + * @arg TIM_EventSource_Break: Timer Break event source + * @note + * - TIM6 and TIM7 can only generate an update event. + * - TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1 and TIM8. + * @retval None + */ +void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource)); + + /* Set the event sources */ + TIMx->EGR = TIM_EventSource; +} + +/** + * @brief Configures the TIMx's DMA interface. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 15, 16 or 17 to select + * the TIM peripheral. + * @param TIM_DMABase: DMA Base address. + * This parameter can be one of the following values: + * @arg TIM_DMABase_CR, TIM_DMABase_CR2, TIM_DMABase_SMCR, + * TIM_DMABase_DIER, TIM1_DMABase_SR, TIM_DMABase_EGR, + * TIM_DMABase_CCMR1, TIM_DMABase_CCMR2, TIM_DMABase_CCER, + * TIM_DMABase_CNT, TIM_DMABase_PSC, TIM_DMABase_ARR, + * TIM_DMABase_RCR, TIM_DMABase_CCR1, TIM_DMABase_CCR2, + * TIM_DMABase_CCR3, TIM_DMABase_CCR4, TIM_DMABase_BDTR, + * TIM_DMABase_DCR. + * @param TIM_DMABurstLength: DMA Burst length. + * This parameter can be one value between: + * TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. + * @retval None + */ +void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST4_PERIPH(TIMx)); + assert_param(IS_TIM_DMA_BASE(TIM_DMABase)); + assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength)); + /* Set the DMA Base and the DMA Burst Length */ + TIMx->DCR = TIM_DMABase | TIM_DMABurstLength; +} + +/** + * @brief Enables or disables the TIMx's DMA Requests. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 6, 7, 8, 15, 16 or 17 + * to select the TIM peripheral. + * @param TIM_DMASource: specifies the DMA Request sources. + * This parameter can be any combination of the following values: + * @arg TIM_DMA_Update: TIM update Interrupt source + * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source + * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source + * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source + * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source + * @arg TIM_DMA_COM: TIM Commutation DMA source + * @arg TIM_DMA_Trigger: TIM Trigger DMA source + * @param NewState: new state of the DMA Request sources. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST9_PERIPH(TIMx)); + assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the DMA sources */ + TIMx->DIER |= TIM_DMASource; + } + else + { + /* Disable the DMA sources */ + TIMx->DIER &= (uint16_t)~TIM_DMASource; + } +} + +/** + * @brief Configures the TIMx internal Clock + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 + * to select the TIM peripheral. + * @retval None + */ +void TIM_InternalClockConfig(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Disable slave mode to clock the prescaler directly with the internal clock */ + TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); +} + +/** + * @brief Configures the TIMx Internal Trigger as External Clock + * @param TIMx: where x can be 1, 2, 3, 4, 5, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ITRSource: Trigger source. + * This parameter can be one of the following values: + * @param TIM_TS_ITR0: Internal Trigger 0 + * @param TIM_TS_ITR1: Internal Trigger 1 + * @param TIM_TS_ITR2: Internal Trigger 2 + * @param TIM_TS_ITR3: Internal Trigger 3 + * @retval None + */ +void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource)); + /* Select the Internal Trigger */ + TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource); + /* Select the External clock mode1 */ + TIMx->SMCR |= TIM_SlaveMode_External1; +} + +/** + * @brief Configures the TIMx Trigger as External Clock + * @param TIMx: where x can be 1, 2, 3, 4, 5, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_TIxExternalCLKSource: Trigger source. + * This parameter can be one of the following values: + * @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector + * @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1 + * @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2 + * @param TIM_ICPolarity: specifies the TIx Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param ICFilter : specifies the filter value. + * This parameter must be a value between 0x0 and 0xF. + * @retval None + */ +void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource, + uint16_t TIM_ICPolarity, uint16_t ICFilter) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_TIXCLK_SOURCE(TIM_TIxExternalCLKSource)); + assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity)); + assert_param(IS_TIM_IC_FILTER(ICFilter)); + /* Configure the Timer Input Clock Source */ + if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2) + { + TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); + } + else + { + TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter); + } + /* Select the Trigger source */ + TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource); + /* Select the External clock mode1 */ + TIMx->SMCR |= TIM_SlaveMode_External1; +} + +/** + * @brief Configures the External clock Mode1 + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * @param TIM_ExtTRGPolarity: The external Trigger Polarity. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * @param ExtTRGFilter: External Trigger Filter. + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter) +{ + uint16_t tmpsmcr = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); + assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); + assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); + /* Configure the ETR Clock source */ + TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); + + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + /* Reset the SMS Bits */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); + /* Select the External clock mode1 */ + tmpsmcr |= TIM_SlaveMode_External1; + /* Select the Trigger selection : ETRF */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS)); + tmpsmcr |= TIM_TS_ETRF; + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; +} + +/** + * @brief Configures the External clock Mode2 + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * @param TIM_ExtTRGPolarity: The external Trigger Polarity. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * @param ExtTRGFilter: External Trigger Filter. + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, + uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); + assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); + assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); + /* Configure the ETR Clock source */ + TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter); + /* Enable the External clock mode2 */ + TIMx->SMCR |= TIM_SMCR_ECE; +} + +/** + * @brief Configures the TIMx External Trigger (ETR). + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF. + * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. + * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. + * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. + * @param TIM_ExtTRGPolarity: The external Trigger Polarity. + * This parameter can be one of the following values: + * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. + * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. + * @param ExtTRGFilter: External Trigger Filter. + * This parameter must be a value between 0x00 and 0x0F + * @retval None + */ +void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity, + uint16_t ExtTRGFilter) +{ + uint16_t tmpsmcr = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler)); + assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity)); + assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter)); + tmpsmcr = TIMx->SMCR; + /* Reset the ETR Bits */ + tmpsmcr &= SMCR_ETR_Mask; + /* Set the Prescaler, the Filter value and the Polarity */ + tmpsmcr |= (uint16_t)(TIM_ExtTRGPrescaler | (uint16_t)(TIM_ExtTRGPolarity | (uint16_t)(ExtTRGFilter << (uint16_t)8))); + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; +} + +/** + * @brief Configures the TIMx Prescaler. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param Prescaler: specifies the Prescaler Register value + * @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode + * This parameter can be one of the following values: + * @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event. + * @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediately. + * @retval None + */ +void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode)); + /* Set the Prescaler value */ + TIMx->PSC = Prescaler; + /* Set or reset the UG Bit */ + TIMx->EGR = TIM_PSCReloadMode; +} + +/** + * @brief Specifies the TIMx Counter Mode to be used. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_CounterMode: specifies the Counter Mode to be used + * This parameter can be one of the following values: + * @arg TIM_CounterMode_Up: TIM Up Counting Mode + * @arg TIM_CounterMode_Down: TIM Down Counting Mode + * @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1 + * @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2 + * @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3 + * @retval None + */ +void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode) +{ + uint16_t tmpcr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode)); + tmpcr1 = TIMx->CR1; + /* Reset the CMS and DIR Bits */ + tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR | TIM_CR1_CMS))); + /* Set the Counter Mode */ + tmpcr1 |= TIM_CounterMode; + /* Write to TIMx CR1 register */ + TIMx->CR1 = tmpcr1; +} + +/** + * @brief Selects the Input Trigger source + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_InputTriggerSource: The Input Trigger source. + * This parameter can be one of the following values: + * @arg TIM_TS_ITR0: Internal Trigger 0 + * @arg TIM_TS_ITR1: Internal Trigger 1 + * @arg TIM_TS_ITR2: Internal Trigger 2 + * @arg TIM_TS_ITR3: Internal Trigger 3 + * @arg TIM_TS_TI1F_ED: TI1 Edge Detector + * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 + * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 + * @arg TIM_TS_ETRF: External Trigger input + * @retval None + */ +void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource) +{ + uint16_t tmpsmcr = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource)); + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + /* Reset the TS Bits */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS)); + /* Set the Input Trigger source */ + tmpsmcr |= TIM_InputTriggerSource; + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; +} + +/** + * @brief Configures the TIMx Encoder Interface. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_EncoderMode: specifies the TIMx Encoder Mode. + * This parameter can be one of the following values: + * @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level. + * @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level. + * @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending + * on the level of the other input. + * @param TIM_IC1Polarity: specifies the IC1 Polarity + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Falling: IC Falling edge. + * @arg TIM_ICPolarity_Rising: IC Rising edge. + * @param TIM_IC2Polarity: specifies the IC2 Polarity + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Falling: IC Falling edge. + * @arg TIM_ICPolarity_Rising: IC Rising edge. + * @retval None + */ +void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode, + uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity) +{ + uint16_t tmpsmcr = 0; + uint16_t tmpccmr1 = 0; + uint16_t tmpccer = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST5_PERIPH(TIMx)); + assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode)); + assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity)); + assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity)); + + /* Get the TIMx SMCR register value */ + tmpsmcr = TIMx->SMCR; + + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = TIMx->CCMR1; + + /* Get the TIMx CCER register value */ + tmpccer = TIMx->CCER; + + /* Set the encoder Mode */ + tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS)); + tmpsmcr |= TIM_EncoderMode; + + /* Select the Capture Compare 1 and the Capture Compare 2 as input */ + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S))); + tmpccmr1 |= TIM_CCMR1_CC1S_0 | TIM_CCMR1_CC2S_0; + + /* Set the TI1 and the TI2 Polarities */ + tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2P))); + tmpccer |= (uint16_t)(TIM_IC1Polarity | (uint16_t)(TIM_IC2Polarity << (uint16_t)4)); + + /* Write to TIMx SMCR */ + TIMx->SMCR = tmpsmcr; + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmr1; + /* Write to TIMx CCER */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Forces the TIMx output 1 waveform to active or inactive level. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC1REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF. + * @retval None + */ +void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC1M Bits */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M); + /* Configure The Forced output Mode */ + tmpccmr1 |= TIM_ForcedAction; + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Forces the TIMx output 2 waveform to active or inactive level. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC2REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF. + * @retval None + */ +void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2M Bits */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M); + /* Configure The Forced output Mode */ + tmpccmr1 |= (uint16_t)(TIM_ForcedAction << 8); + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Forces the TIMx output 3 waveform to active or inactive level. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC3REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF. + * @retval None + */ +void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC1M Bits */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M); + /* Configure The Forced output Mode */ + tmpccmr2 |= TIM_ForcedAction; + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Forces the TIMx output 4 waveform to active or inactive level. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform. + * This parameter can be one of the following values: + * @arg TIM_ForcedAction_Active: Force active level on OC4REF + * @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF. + * @retval None + */ +void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC2M Bits */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M); + /* Configure The Forced output Mode */ + tmpccmr2 |= (uint16_t)(TIM_ForcedAction << 8); + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Enables or disables TIMx peripheral Preload register on ARR. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param NewState: new state of the TIMx peripheral Preload register + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the ARR Preload Bit */ + TIMx->CR1 |= TIM_CR1_ARPE; + } + else + { + /* Reset the ARR Preload Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE); + } +} + +/** + * @brief Selects the TIM peripheral Commutation event. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIMx peripheral + * @param NewState: new state of the Commutation event. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the COM Bit */ + TIMx->CR2 |= TIM_CR2_CCUS; + } + else + { + /* Reset the COM Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCUS); + } +} + +/** + * @brief Selects the TIMx peripheral Capture Compare DMA source. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 15, 16 or 17 to select + * the TIM peripheral. + * @param NewState: new state of the Capture Compare DMA source + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST4_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the CCDS Bit */ + TIMx->CR2 |= TIM_CR2_CCDS; + } + else + { + /* Reset the CCDS Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS); + } +} + +/** + * @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8 or 15 + * to select the TIMx peripheral + * @param NewState: new state of the Capture Compare Preload Control bit + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST5_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the CCPC Bit */ + TIMx->CR2 |= TIM_CR2_CCPC; + } + else + { + /* Reset the CCPC Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCPC); + } +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR1. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC1PE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr1 |= TIM_OCPreload; + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR2. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select + * the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2PE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr1 |= (uint16_t)(TIM_OCPreload << 8); + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR3. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC3PE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr2 |= TIM_OCPreload; + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Enables or disables the TIMx peripheral Preload register on CCR4. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPreload: new state of the TIMx peripheral Preload register + * This parameter can be one of the following values: + * @arg TIM_OCPreload_Enable + * @arg TIM_OCPreload_Disable + * @retval None + */ +void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC4PE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE); + /* Enable or Disable the Output Compare Preload feature */ + tmpccmr2 |= (uint16_t)(TIM_OCPreload << 8); + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Configures the TIMx Output Compare 1 Fast feature. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC1FE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr1 |= TIM_OCFast; + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Configures the TIMx Output Compare 2 Fast feature. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select + * the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR1 register value */ + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2FE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr1 |= (uint16_t)(TIM_OCFast << 8); + /* Write to TIMx CCMR1 */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Configures the TIMx Output Compare 3 Fast feature. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR2 register value */ + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC3FE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr2 |= TIM_OCFast; + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Configures the TIMx Output Compare 4 Fast feature. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCFast: new state of the Output Compare Fast Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCFast_Enable: TIM output compare fast enable + * @arg TIM_OCFast_Disable: TIM output compare fast disable + * @retval None + */ +void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast)); + /* Get the TIMx CCMR2 register value */ + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC4FE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE); + /* Enable or Disable the Output Compare Fast Bit */ + tmpccmr2 |= (uint16_t)(TIM_OCFast << 8); + /* Write to TIMx CCMR2 */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Clears or safeguards the OCREF1 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + + tmpccmr1 = TIMx->CCMR1; + + /* Reset the OC1CE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr1 |= TIM_OCClear; + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Clears or safeguards the OCREF2 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr1 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + tmpccmr1 = TIMx->CCMR1; + /* Reset the OC2CE Bit */ + tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr1 |= (uint16_t)(TIM_OCClear << 8); + /* Write to TIMx CCMR1 register */ + TIMx->CCMR1 = tmpccmr1; +} + +/** + * @brief Clears or safeguards the OCREF3 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC3CE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr2 |= TIM_OCClear; + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Clears or safeguards the OCREF4 signal on an external event + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCClear: new state of the Output Compare Clear Enable Bit. + * This parameter can be one of the following values: + * @arg TIM_OCClear_Enable: TIM Output clear enable + * @arg TIM_OCClear_Disable: TIM Output clear disable + * @retval None + */ +void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear) +{ + uint16_t tmpccmr2 = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear)); + tmpccmr2 = TIMx->CCMR2; + /* Reset the OC4CE Bit */ + tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE); + /* Enable or Disable the Output Compare Clear Bit */ + tmpccmr2 |= (uint16_t)(TIM_OCClear << 8); + /* Write to TIMx CCMR2 register */ + TIMx->CCMR2 = tmpccmr2; +} + +/** + * @brief Configures the TIMx channel 1 polarity. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC1 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC1P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P); + tmpccer |= TIM_OCPolarity; + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx Channel 1N polarity. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIM peripheral. + * @param TIM_OCNPolarity: specifies the OC1N Polarity + * This parameter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); + + tmpccer = TIMx->CCER; + /* Set or Reset the CC1NP Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1NP); + tmpccer |= TIM_OCNPolarity; + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx channel 2 polarity. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC2 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC2P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 4); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx Channel 2N polarity. + * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. + * @param TIM_OCNPolarity: specifies the OC2N Polarity + * This parameter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST1_PERIPH(TIMx)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); + + tmpccer = TIMx->CCER; + /* Set or Reset the CC2NP Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2NP); + tmpccer |= (uint16_t)(TIM_OCNPolarity << 4); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx channel 3 polarity. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC3 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC3P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 8); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx Channel 3N polarity. + * @param TIMx: where x can be 1 or 8 to select the TIM peripheral. + * @param TIM_OCNPolarity: specifies the OC3N Polarity + * This parameter can be one of the following values: + * @arg TIM_OCNPolarity_High: Output Compare active high + * @arg TIM_OCNPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity) +{ + uint16_t tmpccer = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST1_PERIPH(TIMx)); + assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity)); + + tmpccer = TIMx->CCER; + /* Set or Reset the CC3NP Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3NP); + tmpccer |= (uint16_t)(TIM_OCNPolarity << 8); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Configures the TIMx channel 4 polarity. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_OCPolarity: specifies the OC4 Polarity + * This parameter can be one of the following values: + * @arg TIM_OCPolarity_High: Output Compare active high + * @arg TIM_OCPolarity_Low: Output Compare active low + * @retval None + */ +void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity) +{ + uint16_t tmpccer = 0; + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity)); + tmpccer = TIMx->CCER; + /* Set or Reset the CC4P Bit */ + tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P); + tmpccer |= (uint16_t)(TIM_OCPolarity << 12); + /* Write to TIMx CCER register */ + TIMx->CCER = tmpccer; +} + +/** + * @brief Enables or disables the TIM Capture Compare Channel x. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_Channel: specifies the TIM Channel + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @arg TIM_Channel_4: TIM Channel 4 + * @param TIM_CCx: specifies the TIM Channel CCxE bit new state. + * This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable. + * @retval None + */ +void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx) +{ + uint16_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_CHANNEL(TIM_Channel)); + assert_param(IS_TIM_CCX(TIM_CCx)); + + tmp = CCER_CCE_Set << TIM_Channel; + + /* Reset the CCxE Bit */ + TIMx->CCER &= (uint16_t)~ tmp; + + /* Set or reset the CCxE Bit */ + TIMx->CCER |= (uint16_t)(TIM_CCx << TIM_Channel); +} + +/** + * @brief Enables or disables the TIM Capture Compare Channel xN. + * @param TIMx: where x can be 1, 8, 15, 16 or 17 to select the TIM peripheral. + * @param TIM_Channel: specifies the TIM Channel + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state. + * This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable. + * @retval None + */ +void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN) +{ + uint16_t tmp = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST2_PERIPH(TIMx)); + assert_param(IS_TIM_COMPLEMENTARY_CHANNEL(TIM_Channel)); + assert_param(IS_TIM_CCXN(TIM_CCxN)); + + tmp = CCER_CCNE_Set << TIM_Channel; + + /* Reset the CCxNE Bit */ + TIMx->CCER &= (uint16_t) ~tmp; + + /* Set or reset the CCxNE Bit */ + TIMx->CCER |= (uint16_t)(TIM_CCxN << TIM_Channel); +} + +/** + * @brief Selects the TIM Output Compare Mode. + * @note This function disables the selected channel before changing the Output + * Compare Mode. + * User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_Channel: specifies the TIM Channel + * This parameter can be one of the following values: + * @arg TIM_Channel_1: TIM Channel 1 + * @arg TIM_Channel_2: TIM Channel 2 + * @arg TIM_Channel_3: TIM Channel 3 + * @arg TIM_Channel_4: TIM Channel 4 + * @param TIM_OCMode: specifies the TIM Output Compare Mode. + * This parameter can be one of the following values: + * @arg TIM_OCMode_Timing + * @arg TIM_OCMode_Active + * @arg TIM_OCMode_Toggle + * @arg TIM_OCMode_PWM1 + * @arg TIM_OCMode_PWM2 + * @arg TIM_ForcedAction_Active + * @arg TIM_ForcedAction_InActive + * @retval None + */ +void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode) +{ + uint32_t tmp = 0; + uint16_t tmp1 = 0; + + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_CHANNEL(TIM_Channel)); + assert_param(IS_TIM_OCM(TIM_OCMode)); + + tmp = (uint32_t) TIMx; + tmp += CCMR_Offset; + + tmp1 = CCER_CCE_Set << (uint16_t)TIM_Channel; + + /* Disable the Channel: Reset the CCxE Bit */ + TIMx->CCER &= (uint16_t) ~tmp1; + + if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3)) + { + tmp += (TIM_Channel>>1); + + /* Reset the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M); + + /* Configure the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp |= TIM_OCMode; + } + else + { + tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1; + + /* Reset the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M); + + /* Configure the OCxM bits in the CCMRx register */ + *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8); + } +} + +/** + * @brief Enables or Disables the TIMx Update event. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param NewState: new state of the TIMx UDIS bit + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the Update Disable Bit */ + TIMx->CR1 |= TIM_CR1_UDIS; + } + else + { + /* Reset the Update Disable Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS); + } +} + +/** + * @brief Configures the TIMx Update Request Interrupt source. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_UpdateSource: specifies the Update source. + * This parameter can be one of the following values: + * @arg TIM_UpdateSource_Regular: Source of update is the counter overflow/underflow + or the setting of UG bit, or an update generation + through the slave mode controller. + * @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow. + * @retval None + */ +void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource)); + if (TIM_UpdateSource != TIM_UpdateSource_Global) + { + /* Set the URS Bit */ + TIMx->CR1 |= TIM_CR1_URS; + } + else + { + /* Reset the URS Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS); + } +} + +/** + * @brief Enables or disables the TIMx's Hall sensor interface. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param NewState: new state of the TIMx Hall sensor interface. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Set the TI1S Bit */ + TIMx->CR2 |= TIM_CR2_TI1S; + } + else + { + /* Reset the TI1S Bit */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S); + } +} + +/** + * @brief Selects the TIMx's One Pulse Mode. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_OPMode: specifies the OPM Mode to be used. + * This parameter can be one of the following values: + * @arg TIM_OPMode_Single + * @arg TIM_OPMode_Repetitive + * @retval None + */ +void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_OPM_MODE(TIM_OPMode)); + /* Reset the OPM Bit */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM); + /* Configure the OPM Mode */ + TIMx->CR1 |= TIM_OPMode; +} + +/** + * @brief Selects the TIMx Trigger Output Mode. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 6, 7, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_TRGOSource: specifies the Trigger Output source. + * This paramter can be one of the following values: + * + * - For all TIMx + * @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO). + * + * - For all TIMx except TIM6 and TIM7 + * @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag + * is to be set, as soon as a capture or compare match occurs (TRGO). + * @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO). + * @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO). + * + * @retval None + */ +void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST7_PERIPH(TIMx)); + assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource)); + /* Reset the MMS Bits */ + TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS); + /* Select the TRGO source */ + TIMx->CR2 |= TIM_TRGOSource; +} + +/** + * @brief Selects the TIMx Slave Mode. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_SlaveMode: specifies the Timer Slave Mode. + * This parameter can be one of the following values: + * @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes + * the counter and triggers an update of the registers. + * @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high. + * @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI. + * @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter. + * @retval None + */ +void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode)); + /* Reset the SMS Bits */ + TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS); + /* Select the Slave Mode */ + TIMx->SMCR |= TIM_SlaveMode; +} + +/** + * @brief Sets or Resets the TIMx Master/Slave Mode. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode. + * This parameter can be one of the following values: + * @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer + * and its slaves (through TRGO). + * @arg TIM_MasterSlaveMode_Disable: No action + * @retval None + */ +void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode)); + /* Reset the MSM Bit */ + TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM); + + /* Set or Reset the MSM Bit */ + TIMx->SMCR |= TIM_MasterSlaveMode; +} + +/** + * @brief Sets the TIMx Counter Register value + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param Counter: specifies the Counter register new value. + * @retval None + */ +void TIM_SetCounter(TIM_TypeDef* TIMx, uint16_t Counter) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Set the Counter Register value */ + TIMx->CNT = Counter; +} + +/** + * @brief Sets the TIMx Autoreload Register value + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param Autoreload: specifies the Autoreload register new value. + * @retval None + */ +void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint16_t Autoreload) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Set the Autoreload Register value */ + TIMx->ARR = Autoreload; +} + +/** + * @brief Sets the TIMx Capture Compare1 Register value + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param Compare1: specifies the Capture Compare1 register new value. + * @retval None + */ +void TIM_SetCompare1(TIM_TypeDef* TIMx, uint16_t Compare1) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + /* Set the Capture Compare1 Register value */ + TIMx->CCR1 = Compare1; +} + +/** + * @brief Sets the TIMx Capture Compare2 Register value + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param Compare2: specifies the Capture Compare2 register new value. + * @retval None + */ +void TIM_SetCompare2(TIM_TypeDef* TIMx, uint16_t Compare2) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Set the Capture Compare2 Register value */ + TIMx->CCR2 = Compare2; +} + +/** + * @brief Sets the TIMx Capture Compare3 Register value + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param Compare3: specifies the Capture Compare3 register new value. + * @retval None + */ +void TIM_SetCompare3(TIM_TypeDef* TIMx, uint16_t Compare3) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Set the Capture Compare3 Register value */ + TIMx->CCR3 = Compare3; +} + +/** + * @brief Sets the TIMx Capture Compare4 Register value + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param Compare4: specifies the Capture Compare4 register new value. + * @retval None + */ +void TIM_SetCompare4(TIM_TypeDef* TIMx, uint16_t Compare4) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Set the Capture Compare4 Register value */ + TIMx->CCR4 = Compare4; +} + +/** + * @brief Sets the TIMx Input Capture 1 prescaler. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture1 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC1PSC Bits */ + TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC); + /* Set the IC1PSC value */ + TIMx->CCMR1 |= TIM_ICPSC; +} + +/** + * @brief Sets the TIMx Input Capture 2 prescaler. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture2 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC2PSC Bits */ + TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC); + /* Set the IC2PSC value */ + TIMx->CCMR1 |= (uint16_t)(TIM_ICPSC << 8); +} + +/** + * @brief Sets the TIMx Input Capture 3 prescaler. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture3 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC3PSC Bits */ + TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC); + /* Set the IC3PSC value */ + TIMx->CCMR2 |= TIM_ICPSC; +} + +/** + * @brief Sets the TIMx Input Capture 4 prescaler. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPSC: specifies the Input Capture4 prescaler new value. + * This parameter can be one of the following values: + * @arg TIM_ICPSC_DIV1: no prescaler + * @arg TIM_ICPSC_DIV2: capture is done once every 2 events + * @arg TIM_ICPSC_DIV4: capture is done once every 4 events + * @arg TIM_ICPSC_DIV8: capture is done once every 8 events + * @retval None + */ +void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC)); + /* Reset the IC4PSC Bits */ + TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC); + /* Set the IC4PSC value */ + TIMx->CCMR2 |= (uint16_t)(TIM_ICPSC << 8); +} + +/** + * @brief Sets the TIMx Clock Division value. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select + * the TIM peripheral. + * @param TIM_CKD: specifies the clock division value. + * This parameter can be one of the following value: + * @arg TIM_CKD_DIV1: TDTS = Tck_tim + * @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim + * @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim + * @retval None + */ +void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + assert_param(IS_TIM_CKD_DIV(TIM_CKD)); + /* Reset the CKD Bits */ + TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD); + /* Set the CKD value */ + TIMx->CR1 |= TIM_CKD; +} + +/** + * @brief Gets the TIMx Input Capture 1 value. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @retval Capture Compare 1 Register value. + */ +uint16_t TIM_GetCapture1(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST8_PERIPH(TIMx)); + /* Get the Capture 1 Register value */ + return TIMx->CCR1; +} + +/** + * @brief Gets the TIMx Input Capture 2 value. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @retval Capture Compare 2 Register value. + */ +uint16_t TIM_GetCapture2(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST6_PERIPH(TIMx)); + /* Get the Capture 2 Register value */ + return TIMx->CCR2; +} + +/** + * @brief Gets the TIMx Input Capture 3 value. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @retval Capture Compare 3 Register value. + */ +uint16_t TIM_GetCapture3(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Get the Capture 3 Register value */ + return TIMx->CCR3; +} + +/** + * @brief Gets the TIMx Input Capture 4 value. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @retval Capture Compare 4 Register value. + */ +uint16_t TIM_GetCapture4(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_LIST3_PERIPH(TIMx)); + /* Get the Capture 4 Register value */ + return TIMx->CCR4; +} + +/** + * @brief Gets the TIMx Counter value. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @retval Counter Register value. + */ +uint16_t TIM_GetCounter(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Get the Counter Register value */ + return TIMx->CNT; +} + +/** + * @brief Gets the TIMx Prescaler value. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @retval Prescaler Register value. + */ +uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + /* Get the Prescaler Register value */ + return TIMx->PSC; +} + +/** + * @brief Checks whether the specified TIM flag is set or not. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg TIM_FLAG_Update: TIM update Flag + * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag + * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag + * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag + * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag + * @arg TIM_FLAG_COM: TIM Commutation Flag + * @arg TIM_FLAG_Trigger: TIM Trigger Flag + * @arg TIM_FLAG_Break: TIM Break Flag + * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag + * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag + * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag + * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag + * @note + * - TIM6 and TIM7 can have only one update flag. + * - TIM9, TIM12 and TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, + * TIM_FLAG_CC2 or TIM_FLAG_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. + * - TIM_FLAG_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_FLAG_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval The new state of TIM_FLAG (SET or RESET). + */ +FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) +{ + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_GET_FLAG(TIM_FLAG)); + + if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the TIMx's pending flags. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_FLAG: specifies the flag bit to clear. + * This parameter can be any combination of the following values: + * @arg TIM_FLAG_Update: TIM update Flag + * @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag + * @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag + * @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag + * @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag + * @arg TIM_FLAG_COM: TIM Commutation Flag + * @arg TIM_FLAG_Trigger: TIM Trigger Flag + * @arg TIM_FLAG_Break: TIM Break Flag + * @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag + * @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag + * @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag + * @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag + * @note + * - TIM6 and TIM7 can have only one update flag. + * - TIM9, TIM12 and TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, + * TIM_FLAG_CC2 or TIM_FLAG_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1. + * - TIM_FLAG_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_FLAG_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval None + */ +void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG)); + + /* Clear the flags */ + TIMx->SR = (uint16_t)~TIM_FLAG; +} + +/** + * @brief Checks whether the TIM interrupt has occurred or not. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_IT: specifies the TIM interrupt source to check. + * This parameter can be one of the following values: + * @arg TIM_IT_Update: TIM update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * @note + * - TIM6 and TIM7 can generate only an update interrupt. + * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, + * TIM_IT_CC2 or TIM_IT_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval The new state of the TIM_IT(SET or RESET). + */ +ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT) +{ + ITStatus bitstatus = RESET; + uint16_t itstatus = 0x0, itenable = 0x0; + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_GET_IT(TIM_IT)); + + itstatus = TIMx->SR & TIM_IT; + + itenable = TIMx->DIER & TIM_IT; + if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the TIMx's interrupt pending bits. + * @param TIMx: where x can be 1 to 17 to select the TIM peripheral. + * @param TIM_IT: specifies the pending bit to clear. + * This parameter can be any combination of the following values: + * @arg TIM_IT_Update: TIM1 update Interrupt source + * @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source + * @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source + * @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source + * @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source + * @arg TIM_IT_COM: TIM Commutation Interrupt source + * @arg TIM_IT_Trigger: TIM Trigger Interrupt source + * @arg TIM_IT_Break: TIM Break Interrupt source + * @note + * - TIM6 and TIM7 can generate only an update interrupt. + * - TIM9, TIM12 and TIM15 can have only TIM_IT_Update, TIM_IT_CC1, + * TIM_IT_CC2 or TIM_IT_Trigger. + * - TIM10, TIM11, TIM13, TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1. + * - TIM_IT_Break is used only with TIM1, TIM8 and TIM15. + * - TIM_IT_COM is used only with TIM1, TIM8, TIM15, TIM16 and TIM17. + * @retval None + */ +void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT) +{ + /* Check the parameters */ + assert_param(IS_TIM_ALL_PERIPH(TIMx)); + assert_param(IS_TIM_IT(TIM_IT)); + /* Clear the IT pending Bit */ + TIMx->SR = (uint16_t)~TIM_IT; +} + +/** + * @brief Configure the TI1 as Input. + * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. + * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. + * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr1 = 0, tmpccer = 0; + /* Disable the Channel 1: Reset the CC1E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E); + tmpccmr1 = TIMx->CCMR1; + tmpccer = TIMx->CCER; + /* Select the Input and set the filter */ + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F))); + tmpccmr1 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); + } + else + { + /* Select the Polarity and set the CC1E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P | TIM_CCER_CC1NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC1E); + } + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1; + TIMx->CCER = tmpccer; +} + +/** + * @brief Configure the TI2 as Input. + * @param TIMx: where x can be 1, 2, 3, 4, 5, 8, 9, 12 or 15 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. + * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. + * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0; + /* Disable the Channel 2: Reset the CC2E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E); + tmpccmr1 = TIMx->CCMR1; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 4); + /* Select the Input and set the filter */ + tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F))); + tmpccmr1 |= (uint16_t)(TIM_ICFilter << 12); + tmpccmr1 |= (uint16_t)(TIM_ICSelection << 8); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC2E); + } + else + { + /* Select the Polarity and set the CC2E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P | TIM_CCER_CC2NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC2E); + } + + /* Write to TIMx CCMR1 and CCER registers */ + TIMx->CCMR1 = tmpccmr1 ; + TIMx->CCER = tmpccer; +} + +/** + * @brief Configure the TI3 as Input. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. + * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. + * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; + /* Disable the Channel 3: Reset the CC3E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E); + tmpccmr2 = TIMx->CCMR2; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 8); + /* Select the Input and set the filter */ + tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F))); + tmpccmr2 |= (uint16_t)(TIM_ICSelection | (uint16_t)(TIM_ICFilter << (uint16_t)4)); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC3E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC3E); + } + else + { + /* Select the Polarity and set the CC3E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC3NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC3E); + } + + /* Write to TIMx CCMR2 and CCER registers */ + TIMx->CCMR2 = tmpccmr2; + TIMx->CCER = tmpccer; +} + +/** + * @brief Configure the TI4 as Input. + * @param TIMx: where x can be 1, 2, 3, 4, 5 or 8 to select the TIM peripheral. + * @param TIM_ICPolarity : The Input Polarity. + * This parameter can be one of the following values: + * @arg TIM_ICPolarity_Rising + * @arg TIM_ICPolarity_Falling + * @param TIM_ICSelection: specifies the input to be used. + * This parameter can be one of the following values: + * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. + * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. + * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. + * @param TIM_ICFilter: Specifies the Input Capture Filter. + * This parameter must be a value between 0x00 and 0x0F. + * @retval None + */ +static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, + uint16_t TIM_ICFilter) +{ + uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0; + + /* Disable the Channel 4: Reset the CC4E Bit */ + TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E); + tmpccmr2 = TIMx->CCMR2; + tmpccer = TIMx->CCER; + tmp = (uint16_t)(TIM_ICPolarity << 12); + /* Select the Input and set the filter */ + tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F))); + tmpccmr2 |= (uint16_t)(TIM_ICSelection << 8); + tmpccmr2 |= (uint16_t)(TIM_ICFilter << 12); + + if((TIMx == TIM1) || (TIMx == TIM8) || (TIMx == TIM2) || (TIMx == TIM3) || + (TIMx == TIM4) ||(TIMx == TIM5)) + { + /* Select the Polarity and set the CC4E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P)); + tmpccer |= (uint16_t)(tmp | (uint16_t)TIM_CCER_CC4E); + } + else + { + /* Select the Polarity and set the CC4E Bit */ + tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P | TIM_CCER_CC4NP)); + tmpccer |= (uint16_t)(TIM_ICPolarity | (uint16_t)TIM_CCER_CC4E); + } + /* Write to TIMx CCMR2 and CCER registers */ + TIMx->CCMR2 = tmpccmr2; + TIMx->CCER = tmpccer; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c index e794eae6..a3f16f15 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_usart.c @@ -1,1058 +1,1058 @@ -/** - ****************************************************************************** - * @file stm32f10x_usart.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the USART firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_usart.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup USART - * @brief USART driver modules - * @{ - */ - -/** @defgroup USART_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Defines - * @{ - */ - -#define CR1_UE_Set ((uint16_t)0x2000) /*!< USART Enable Mask */ -#define CR1_UE_Reset ((uint16_t)0xDFFF) /*!< USART Disable Mask */ - -#define CR1_WAKE_Mask ((uint16_t)0xF7FF) /*!< USART WakeUp Method Mask */ - -#define CR1_RWU_Set ((uint16_t)0x0002) /*!< USART mute mode Enable Mask */ -#define CR1_RWU_Reset ((uint16_t)0xFFFD) /*!< USART mute mode Enable Mask */ -#define CR1_SBK_Set ((uint16_t)0x0001) /*!< USART Break Character send Mask */ -#define CR1_CLEAR_Mask ((uint16_t)0xE9F3) /*!< USART CR1 Mask */ -#define CR2_Address_Mask ((uint16_t)0xFFF0) /*!< USART address Mask */ - -#define CR2_LINEN_Set ((uint16_t)0x4000) /*!< USART LIN Enable Mask */ -#define CR2_LINEN_Reset ((uint16_t)0xBFFF) /*!< USART LIN Disable Mask */ - -#define CR2_LBDL_Mask ((uint16_t)0xFFDF) /*!< USART LIN Break detection Mask */ -#define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /*!< USART CR2 STOP Bits Mask */ -#define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /*!< USART CR2 Clock Mask */ - -#define CR3_SCEN_Set ((uint16_t)0x0020) /*!< USART SC Enable Mask */ -#define CR3_SCEN_Reset ((uint16_t)0xFFDF) /*!< USART SC Disable Mask */ - -#define CR3_NACK_Set ((uint16_t)0x0010) /*!< USART SC NACK Enable Mask */ -#define CR3_NACK_Reset ((uint16_t)0xFFEF) /*!< USART SC NACK Disable Mask */ - -#define CR3_HDSEL_Set ((uint16_t)0x0008) /*!< USART Half-Duplex Enable Mask */ -#define CR3_HDSEL_Reset ((uint16_t)0xFFF7) /*!< USART Half-Duplex Disable Mask */ - -#define CR3_IRLP_Mask ((uint16_t)0xFFFB) /*!< USART IrDA LowPower mode Mask */ -#define CR3_CLEAR_Mask ((uint16_t)0xFCFF) /*!< USART CR3 Mask */ - -#define CR3_IREN_Set ((uint16_t)0x0002) /*!< USART IrDA Enable Mask */ -#define CR3_IREN_Reset ((uint16_t)0xFFFD) /*!< USART IrDA Disable Mask */ -#define GTPR_LSB_Mask ((uint16_t)0x00FF) /*!< Guard Time Register LSB Mask */ -#define GTPR_MSB_Mask ((uint16_t)0xFF00) /*!< Guard Time Register MSB Mask */ -#define IT_Mask ((uint16_t)0x001F) /*!< USART Interrupt Mask */ - -/* USART OverSampling-8 Mask */ -#define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */ -#define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */ - -/* USART One Bit Sampling Mask */ -#define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */ -#define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */ - -/** - * @} - */ - -/** @defgroup USART_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the USARTx peripheral registers to their default reset values. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @retval None - */ -void USART_DeInit(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - if (USARTx == USART1) - { - RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE); - } - else if (USARTx == USART2) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); - } - else if (USARTx == USART3) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); - } - else if (USARTx == UART4) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); - } - else - { - if (USARTx == UART5) - { - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); - } - } -} - -/** - * @brief Initializes the USARTx peripheral according to the specified - * parameters in the USART_InitStruct . - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_InitStruct: pointer to a USART_InitTypeDef structure - * that contains the configuration information for the specified USART - * peripheral. - * @retval None - */ -void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) -{ - uint32_t tmpreg = 0x00, apbclock = 0x00; - uint32_t integerdivider = 0x00; - uint32_t fractionaldivider = 0x00; - uint32_t usartxbase = 0; - RCC_ClocksTypeDef RCC_ClocksStatus; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate)); - assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength)); - assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits)); - assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity)); - assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode)); - assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl)); - /* The hardware flow control is available only for USART1, USART2 and USART3 */ - if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - usartxbase = (uint32_t)USARTx; - -/*---------------------------- USART CR2 Configuration -----------------------*/ - tmpreg = USARTx->CR2; - /* Clear STOP[13:12] bits */ - tmpreg &= CR2_STOP_CLEAR_Mask; - /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/ - /* Set STOP[13:12] bits according to USART_StopBits value */ - tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits; - - /* Write to USART CR2 */ - USARTx->CR2 = (uint16_t)tmpreg; - -/*---------------------------- USART CR1 Configuration -----------------------*/ - tmpreg = USARTx->CR1; - /* Clear M, PCE, PS, TE and RE bits */ - tmpreg &= CR1_CLEAR_Mask; - /* Configure the USART Word Length, Parity and mode ----------------------- */ - /* Set the M bits according to USART_WordLength value */ - /* Set PCE and PS bits according to USART_Parity value */ - /* Set TE and RE bits according to USART_Mode value */ - tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity | - USART_InitStruct->USART_Mode; - /* Write to USART CR1 */ - USARTx->CR1 = (uint16_t)tmpreg; - -/*---------------------------- USART CR3 Configuration -----------------------*/ - tmpreg = USARTx->CR3; - /* Clear CTSE and RTSE bits */ - tmpreg &= CR3_CLEAR_Mask; - /* Configure the USART HFC -------------------------------------------------*/ - /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */ - tmpreg |= USART_InitStruct->USART_HardwareFlowControl; - /* Write to USART CR3 */ - USARTx->CR3 = (uint16_t)tmpreg; - -/*---------------------------- USART BRR Configuration -----------------------*/ - /* Configure the USART Baud Rate -------------------------------------------*/ - RCC_GetClocksFreq(&RCC_ClocksStatus); - if (usartxbase == USART1_BASE) - { - apbclock = RCC_ClocksStatus.PCLK2_Frequency; - } - else - { - apbclock = RCC_ClocksStatus.PCLK1_Frequency; - } - - /* Determine the integer part */ - if ((USARTx->CR1 & CR1_OVER8_Set) != 0) - { - /* Integer part computing in case Oversampling mode is 8 Samples */ - integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate))); - } - else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ - { - /* Integer part computing in case Oversampling mode is 16 Samples */ - integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate))); - } - tmpreg = (integerdivider / 100) << 4; - - /* Determine the fractional part */ - fractionaldivider = integerdivider - (100 * (tmpreg >> 4)); - - /* Implement the fractional part in the register */ - if ((USARTx->CR1 & CR1_OVER8_Set) != 0) - { - tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07); - } - else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ - { - tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F); - } - - /* Write to USART BRR */ - USARTx->BRR = (uint16_t)tmpreg; -} - -/** - * @brief Fills each USART_InitStruct member with its default value. - * @param USART_InitStruct: pointer to a USART_InitTypeDef structure - * which will be initialized. - * @retval None - */ -void USART_StructInit(USART_InitTypeDef* USART_InitStruct) -{ - /* USART_InitStruct members default value */ - USART_InitStruct->USART_BaudRate = 9600; - USART_InitStruct->USART_WordLength = USART_WordLength_8b; - USART_InitStruct->USART_StopBits = USART_StopBits_1; - USART_InitStruct->USART_Parity = USART_Parity_No ; - USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None; -} - -/** - * @brief Initializes the USARTx peripheral Clock according to the - * specified parameters in the USART_ClockInitStruct . - * @param USARTx: where x can be 1, 2, 3 to select the USART peripheral. - * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef - * structure that contains the configuration information for the specified - * USART peripheral. - * @note The Smart Card and Synchronous modes are not available for UART4 and UART5. - * @retval None - */ -void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct) -{ - uint32_t tmpreg = 0x00; - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock)); - assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL)); - assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA)); - assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit)); - -/*---------------------------- USART CR2 Configuration -----------------------*/ - tmpreg = USARTx->CR2; - /* Clear CLKEN, CPOL, CPHA and LBCL bits */ - tmpreg &= CR2_CLOCK_CLEAR_Mask; - /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/ - /* Set CLKEN bit according to USART_Clock value */ - /* Set CPOL bit according to USART_CPOL value */ - /* Set CPHA bit according to USART_CPHA value */ - /* Set LBCL bit according to USART_LastBit value */ - tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | - USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit; - /* Write to USART CR2 */ - USARTx->CR2 = (uint16_t)tmpreg; -} - -/** - * @brief Fills each USART_ClockInitStruct member with its default value. - * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef - * structure which will be initialized. - * @retval None - */ -void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) -{ - /* USART_ClockInitStruct members default value */ - USART_ClockInitStruct->USART_Clock = USART_Clock_Disable; - USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low; - USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge; - USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable; -} - -/** - * @brief Enables or disables the specified USART peripheral. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USARTx peripheral. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the selected USART by setting the UE bit in the CR1 register */ - USARTx->CR1 |= CR1_UE_Set; - } - else - { - /* Disable the selected USART by clearing the UE bit in the CR1 register */ - USARTx->CR1 &= CR1_UE_Reset; - } -} - -/** - * @brief Enables or disables the specified USART interrupts. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IT: specifies the USART interrupt sources to be enabled or disabled. - * This parameter can be one of the following values: - * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg USART_IT_LBD: LIN Break detection interrupt - * @arg USART_IT_TXE: Transmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @param NewState: new state of the specified USARTx interrupts. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState) -{ - uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00; - uint32_t usartxbase = 0x00; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_CONFIG_IT(USART_IT)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - /* The CTS interrupt is not available for UART4 and UART5 */ - if (USART_IT == USART_IT_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - usartxbase = (uint32_t)USARTx; - - /* Get the USART register index */ - usartreg = (((uint8_t)USART_IT) >> 0x05); - - /* Get the interrupt position */ - itpos = USART_IT & IT_Mask; - itmask = (((uint32_t)0x01) << itpos); - - if (usartreg == 0x01) /* The IT is in CR1 register */ - { - usartxbase += 0x0C; - } - else if (usartreg == 0x02) /* The IT is in CR2 register */ - { - usartxbase += 0x10; - } - else /* The IT is in CR3 register */ - { - usartxbase += 0x14; - } - if (NewState != DISABLE) - { - *(__IO uint32_t*)usartxbase |= itmask; - } - else - { - *(__IO uint32_t*)usartxbase &= ~itmask; - } -} - -/** - * @brief Enables or disables the USARTs DMA interface. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_DMAReq: specifies the DMA request. - * This parameter can be any combination of the following values: - * @arg USART_DMAReq_Tx: USART DMA transmit request - * @arg USART_DMAReq_Rx: USART DMA receive request - * @param NewState: new state of the DMA Request sources. - * This parameter can be: ENABLE or DISABLE. - * @note The DMA mode is not available for UART5 except in the STM32 - * High density value line devices(STM32F10X_HD_VL). - * @retval None - */ -void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_DMAREQ(USART_DMAReq)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the DMA transfer for selected requests by setting the DMAT and/or - DMAR bits in the USART CR3 register */ - USARTx->CR3 |= USART_DMAReq; - } - else - { - /* Disable the DMA transfer for selected requests by clearing the DMAT and/or - DMAR bits in the USART CR3 register */ - USARTx->CR3 &= (uint16_t)~USART_DMAReq; - } -} - -/** - * @brief Sets the address of the USART node. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_Address: Indicates the address of the USART node. - * @retval None - */ -void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_ADDRESS(USART_Address)); - - /* Clear the USART address */ - USARTx->CR2 &= CR2_Address_Mask; - /* Set the USART address node */ - USARTx->CR2 |= USART_Address; -} - -/** - * @brief Selects the USART WakeUp method. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_WakeUp: specifies the USART wakeup method. - * This parameter can be one of the following values: - * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection - * @arg USART_WakeUp_AddressMark: WakeUp by an address mark - * @retval None - */ -void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_WAKEUP(USART_WakeUp)); - - USARTx->CR1 &= CR1_WAKE_Mask; - USARTx->CR1 |= USART_WakeUp; -} - -/** - * @brief Determines if the USART is in mute mode or not. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART mute mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the USART mute mode by setting the RWU bit in the CR1 register */ - USARTx->CR1 |= CR1_RWU_Set; - } - else - { - /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */ - USARTx->CR1 &= CR1_RWU_Reset; - } -} - -/** - * @brief Sets the USART LIN Break detection length. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_LINBreakDetectLength: specifies the LIN break detection length. - * This parameter can be one of the following values: - * @arg USART_LINBreakDetectLength_10b: 10-bit break detection - * @arg USART_LINBreakDetectLength_11b: 11-bit break detection - * @retval None - */ -void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength)); - - USARTx->CR2 &= CR2_LBDL_Mask; - USARTx->CR2 |= USART_LINBreakDetectLength; -} - -/** - * @brief Enables or disables the USARTs LIN mode. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART LIN mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ - USARTx->CR2 |= CR2_LINEN_Set; - } - else - { - /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */ - USARTx->CR2 &= CR2_LINEN_Reset; - } -} - -/** - * @brief Transmits single data through the USARTx peripheral. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param Data: the data to transmit. - * @retval None - */ -void USART_SendData(USART_TypeDef* USARTx, uint16_t Data) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_DATA(Data)); - - /* Transmit Data */ - USARTx->DR = (Data & (uint16_t)0x01FF); -} - -/** - * @brief Returns the most recent received data by the USARTx peripheral. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @retval The received data. - */ -uint16_t USART_ReceiveData(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - /* Receive Data */ - return (uint16_t)(USARTx->DR & (uint16_t)0x01FF); -} - -/** - * @brief Transmits break characters. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @retval None - */ -void USART_SendBreak(USART_TypeDef* USARTx) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - /* Send break characters */ - USARTx->CR1 |= CR1_SBK_Set; -} - -/** - * @brief Sets the specified USART guard time. - * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. - * @param USART_GuardTime: specifies the guard time. - * @note The guard time bits are not available for UART4 and UART5. - * @retval None - */ -void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime) -{ - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - - /* Clear the USART Guard time */ - USARTx->GTPR &= GTPR_LSB_Mask; - /* Set the USART guard time */ - USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08); -} - -/** - * @brief Sets the system clock prescaler. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_Prescaler: specifies the prescaler clock. - * @note The function is used for IrDA mode with UART4 and UART5. - * @retval None - */ -void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - - /* Clear the USART prescaler */ - USARTx->GTPR &= GTPR_MSB_Mask; - /* Set the USART prescaler */ - USARTx->GTPR |= USART_Prescaler; -} - -/** - * @brief Enables or disables the USARTs Smart Card mode. - * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. - * @param NewState: new state of the Smart Card mode. - * This parameter can be: ENABLE or DISABLE. - * @note The Smart Card mode is not available for UART4 and UART5. - * @retval None - */ -void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the SC mode by setting the SCEN bit in the CR3 register */ - USARTx->CR3 |= CR3_SCEN_Set; - } - else - { - /* Disable the SC mode by clearing the SCEN bit in the CR3 register */ - USARTx->CR3 &= CR3_SCEN_Reset; - } -} - -/** - * @brief Enables or disables NACK transmission. - * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. - * @param NewState: new state of the NACK transmission. - * This parameter can be: ENABLE or DISABLE. - * @note The Smart Card mode is not available for UART4 and UART5. - * @retval None - */ -void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_123_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - if (NewState != DISABLE) - { - /* Enable the NACK transmission by setting the NACK bit in the CR3 register */ - USARTx->CR3 |= CR3_NACK_Set; - } - else - { - /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */ - USARTx->CR3 &= CR3_NACK_Reset; - } -} - -/** - * @brief Enables or disables the USARTs Half Duplex communication. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART Communication. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ - USARTx->CR3 |= CR3_HDSEL_Set; - } - else - { - /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */ - USARTx->CR3 &= CR3_HDSEL_Reset; - } -} - - -/** - * @brief Enables or disables the USART's 8x oversampling mode. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART one bit sampling method. - * This parameter can be: ENABLE or DISABLE. - * @note - * This function has to be called before calling USART_Init() - * function in order to have correct baudrate Divider value. - * @retval None - */ -void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */ - USARTx->CR1 |= CR1_OVER8_Set; - } - else - { - /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */ - USARTx->CR1 &= CR1_OVER8_Reset; - } -} - -/** - * @brief Enables or disables the USART's one bit sampling method. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the USART one bit sampling method. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */ - USARTx->CR3 |= CR3_ONEBITE_Set; - } - else - { - /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */ - USARTx->CR3 &= CR3_ONEBITE_Reset; - } -} - -/** - * @brief Configures the USART's IrDA interface. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IrDAMode: specifies the IrDA mode. - * This parameter can be one of the following values: - * @arg USART_IrDAMode_LowPower - * @arg USART_IrDAMode_Normal - * @retval None - */ -void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_IRDA_MODE(USART_IrDAMode)); - - USARTx->CR3 &= CR3_IRLP_Mask; - USARTx->CR3 |= USART_IrDAMode; -} - -/** - * @brief Enables or disables the USART's IrDA interface. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param NewState: new state of the IrDA mode. - * This parameter can be: ENABLE or DISABLE. - * @retval None - */ -void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_FUNCTIONAL_STATE(NewState)); - - if (NewState != DISABLE) - { - /* Enable the IrDA mode by setting the IREN bit in the CR3 register */ - USARTx->CR3 |= CR3_IREN_Set; - } - else - { - /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */ - USARTx->CR3 &= CR3_IREN_Reset; - } -} - -/** - * @brief Checks whether the specified USART flag is set or not. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_FLAG: specifies the flag to check. - * This parameter can be one of the following values: - * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) - * @arg USART_FLAG_LBD: LIN Break detection flag - * @arg USART_FLAG_TXE: Transmit data register empty flag - * @arg USART_FLAG_TC: Transmission Complete flag - * @arg USART_FLAG_RXNE: Receive data register not empty flag - * @arg USART_FLAG_IDLE: Idle Line detection flag - * @arg USART_FLAG_ORE: OverRun Error flag - * @arg USART_FLAG_NE: Noise Error flag - * @arg USART_FLAG_FE: Framing Error flag - * @arg USART_FLAG_PE: Parity Error flag - * @retval The new state of USART_FLAG (SET or RESET). - */ -FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG) -{ - FlagStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_FLAG(USART_FLAG)); - /* The CTS flag is not available for UART4 and UART5 */ - if (USART_FLAG == USART_FLAG_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - return bitstatus; -} - -/** - * @brief Clears the USARTx's pending flags. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_FLAG: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). - * @arg USART_FLAG_LBD: LIN Break detection flag. - * @arg USART_FLAG_TC: Transmission Complete flag. - * @arg USART_FLAG_RXNE: Receive data register not empty flag. - * - * @note - * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun - * error) and IDLE (Idle line detected) flags are cleared by software - * sequence: a read operation to USART_SR register (USART_GetFlagStatus()) - * followed by a read operation to USART_DR register (USART_ReceiveData()). - * - RXNE flag can be also cleared by a read to the USART_DR register - * (USART_ReceiveData()). - * - TC flag can be also cleared by software sequence: a read operation to - * USART_SR register (USART_GetFlagStatus()) followed by a write operation - * to USART_DR register (USART_SendData()). - * - TXE flag is cleared only by a write to the USART_DR register - * (USART_SendData()). - * @retval None - */ -void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG) -{ - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_CLEAR_FLAG(USART_FLAG)); - /* The CTS flag is not available for UART4 and UART5 */ - if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - USARTx->SR = (uint16_t)~USART_FLAG; -} - -/** - * @brief Checks whether the specified USART interrupt has occurred or not. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IT: specifies the USART interrupt source to check. - * This parameter can be one of the following values: - * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg USART_IT_LBD: LIN Break detection interrupt - * @arg USART_IT_TXE: Tansmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_ORE: OverRun Error interrupt - * @arg USART_IT_NE: Noise Error interrupt - * @arg USART_IT_FE: Framing Error interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @retval The new state of USART_IT (SET or RESET). - */ -ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT) -{ - uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00; - ITStatus bitstatus = RESET; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_GET_IT(USART_IT)); - /* The CTS interrupt is not available for UART4 and UART5 */ - if (USART_IT == USART_IT_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - /* Get the USART register index */ - usartreg = (((uint8_t)USART_IT) >> 0x05); - /* Get the interrupt position */ - itmask = USART_IT & IT_Mask; - itmask = (uint32_t)0x01 << itmask; - - if (usartreg == 0x01) /* The IT is in CR1 register */ - { - itmask &= USARTx->CR1; - } - else if (usartreg == 0x02) /* The IT is in CR2 register */ - { - itmask &= USARTx->CR2; - } - else /* The IT is in CR3 register */ - { - itmask &= USARTx->CR3; - } - - bitpos = USART_IT >> 0x08; - bitpos = (uint32_t)0x01 << bitpos; - bitpos &= USARTx->SR; - if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET)) - { - bitstatus = SET; - } - else - { - bitstatus = RESET; - } - - return bitstatus; -} - -/** - * @brief Clears the USARTx's interrupt pending bits. - * @param USARTx: Select the USART or the UART peripheral. - * This parameter can be one of the following values: - * USART1, USART2, USART3, UART4 or UART5. - * @param USART_IT: specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) - * @arg USART_IT_LBD: LIN Break detection interrupt - * @arg USART_IT_TC: Transmission complete interrupt. - * @arg USART_IT_RXNE: Receive Data register not empty interrupt. - * - * @note - * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun - * error) and IDLE (Idle line detected) pending bits are cleared by - * software sequence: a read operation to USART_SR register - * (USART_GetITStatus()) followed by a read operation to USART_DR register - * (USART_ReceiveData()). - * - RXNE pending bit can be also cleared by a read to the USART_DR register - * (USART_ReceiveData()). - * - TC pending bit can be also cleared by software sequence: a read - * operation to USART_SR register (USART_GetITStatus()) followed by a write - * operation to USART_DR register (USART_SendData()). - * - TXE pending bit is cleared only by a write to the USART_DR register - * (USART_SendData()). - * @retval None - */ -void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT) -{ - uint16_t bitpos = 0x00, itmask = 0x00; - /* Check the parameters */ - assert_param(IS_USART_ALL_PERIPH(USARTx)); - assert_param(IS_USART_CLEAR_IT(USART_IT)); - /* The CTS interrupt is not available for UART4 and UART5 */ - if (USART_IT == USART_IT_CTS) - { - assert_param(IS_USART_123_PERIPH(USARTx)); - } - - bitpos = USART_IT >> 0x08; - itmask = ((uint16_t)0x01 << (uint16_t)bitpos); - USARTx->SR = (uint16_t)~itmask; -} -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_usart.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the USART firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_usart.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup USART + * @brief USART driver modules + * @{ + */ + +/** @defgroup USART_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_Defines + * @{ + */ + +#define CR1_UE_Set ((uint16_t)0x2000) /*!< USART Enable Mask */ +#define CR1_UE_Reset ((uint16_t)0xDFFF) /*!< USART Disable Mask */ + +#define CR1_WAKE_Mask ((uint16_t)0xF7FF) /*!< USART WakeUp Method Mask */ + +#define CR1_RWU_Set ((uint16_t)0x0002) /*!< USART mute mode Enable Mask */ +#define CR1_RWU_Reset ((uint16_t)0xFFFD) /*!< USART mute mode Enable Mask */ +#define CR1_SBK_Set ((uint16_t)0x0001) /*!< USART Break Character send Mask */ +#define CR1_CLEAR_Mask ((uint16_t)0xE9F3) /*!< USART CR1 Mask */ +#define CR2_Address_Mask ((uint16_t)0xFFF0) /*!< USART address Mask */ + +#define CR2_LINEN_Set ((uint16_t)0x4000) /*!< USART LIN Enable Mask */ +#define CR2_LINEN_Reset ((uint16_t)0xBFFF) /*!< USART LIN Disable Mask */ + +#define CR2_LBDL_Mask ((uint16_t)0xFFDF) /*!< USART LIN Break detection Mask */ +#define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /*!< USART CR2 STOP Bits Mask */ +#define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /*!< USART CR2 Clock Mask */ + +#define CR3_SCEN_Set ((uint16_t)0x0020) /*!< USART SC Enable Mask */ +#define CR3_SCEN_Reset ((uint16_t)0xFFDF) /*!< USART SC Disable Mask */ + +#define CR3_NACK_Set ((uint16_t)0x0010) /*!< USART SC NACK Enable Mask */ +#define CR3_NACK_Reset ((uint16_t)0xFFEF) /*!< USART SC NACK Disable Mask */ + +#define CR3_HDSEL_Set ((uint16_t)0x0008) /*!< USART Half-Duplex Enable Mask */ +#define CR3_HDSEL_Reset ((uint16_t)0xFFF7) /*!< USART Half-Duplex Disable Mask */ + +#define CR3_IRLP_Mask ((uint16_t)0xFFFB) /*!< USART IrDA LowPower mode Mask */ +#define CR3_CLEAR_Mask ((uint16_t)0xFCFF) /*!< USART CR3 Mask */ + +#define CR3_IREN_Set ((uint16_t)0x0002) /*!< USART IrDA Enable Mask */ +#define CR3_IREN_Reset ((uint16_t)0xFFFD) /*!< USART IrDA Disable Mask */ +#define GTPR_LSB_Mask ((uint16_t)0x00FF) /*!< Guard Time Register LSB Mask */ +#define GTPR_MSB_Mask ((uint16_t)0xFF00) /*!< Guard Time Register MSB Mask */ +#define IT_Mask ((uint16_t)0x001F) /*!< USART Interrupt Mask */ + +/* USART OverSampling-8 Mask */ +#define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */ +#define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */ + +/* USART One Bit Sampling Mask */ +#define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */ +#define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */ + +/** + * @} + */ + +/** @defgroup USART_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup USART_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the USARTx peripheral registers to their default reset values. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @retval None + */ +void USART_DeInit(USART_TypeDef* USARTx) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + if (USARTx == USART1) + { + RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE); + RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE); + } + else if (USARTx == USART2) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE); + } + else if (USARTx == USART3) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE); + } + else if (USARTx == UART4) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE); + } + else + { + if (USARTx == UART5) + { + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE); + } + } +} + +/** + * @brief Initializes the USARTx peripheral according to the specified + * parameters in the USART_InitStruct . + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * that contains the configuration information for the specified USART + * peripheral. + * @retval None + */ +void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct) +{ + uint32_t tmpreg = 0x00, apbclock = 0x00; + uint32_t integerdivider = 0x00; + uint32_t fractionaldivider = 0x00; + uint32_t usartxbase = 0; + RCC_ClocksTypeDef RCC_ClocksStatus; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate)); + assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength)); + assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits)); + assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity)); + assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode)); + assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl)); + /* The hardware flow control is available only for USART1, USART2 and USART3 */ + if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + usartxbase = (uint32_t)USARTx; + +/*---------------------------- USART CR2 Configuration -----------------------*/ + tmpreg = USARTx->CR2; + /* Clear STOP[13:12] bits */ + tmpreg &= CR2_STOP_CLEAR_Mask; + /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/ + /* Set STOP[13:12] bits according to USART_StopBits value */ + tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits; + + /* Write to USART CR2 */ + USARTx->CR2 = (uint16_t)tmpreg; + +/*---------------------------- USART CR1 Configuration -----------------------*/ + tmpreg = USARTx->CR1; + /* Clear M, PCE, PS, TE and RE bits */ + tmpreg &= CR1_CLEAR_Mask; + /* Configure the USART Word Length, Parity and mode ----------------------- */ + /* Set the M bits according to USART_WordLength value */ + /* Set PCE and PS bits according to USART_Parity value */ + /* Set TE and RE bits according to USART_Mode value */ + tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity | + USART_InitStruct->USART_Mode; + /* Write to USART CR1 */ + USARTx->CR1 = (uint16_t)tmpreg; + +/*---------------------------- USART CR3 Configuration -----------------------*/ + tmpreg = USARTx->CR3; + /* Clear CTSE and RTSE bits */ + tmpreg &= CR3_CLEAR_Mask; + /* Configure the USART HFC -------------------------------------------------*/ + /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */ + tmpreg |= USART_InitStruct->USART_HardwareFlowControl; + /* Write to USART CR3 */ + USARTx->CR3 = (uint16_t)tmpreg; + +/*---------------------------- USART BRR Configuration -----------------------*/ + /* Configure the USART Baud Rate -------------------------------------------*/ + RCC_GetClocksFreq(&RCC_ClocksStatus); + if (usartxbase == USART1_BASE) + { + apbclock = RCC_ClocksStatus.PCLK2_Frequency; + } + else + { + apbclock = RCC_ClocksStatus.PCLK1_Frequency; + } + + /* Determine the integer part */ + if ((USARTx->CR1 & CR1_OVER8_Set) != 0) + { + /* Integer part computing in case Oversampling mode is 8 Samples */ + integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate))); + } + else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ + { + /* Integer part computing in case Oversampling mode is 16 Samples */ + integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate))); + } + tmpreg = (integerdivider / 100) << 4; + + /* Determine the fractional part */ + fractionaldivider = integerdivider - (100 * (tmpreg >> 4)); + + /* Implement the fractional part in the register */ + if ((USARTx->CR1 & CR1_OVER8_Set) != 0) + { + tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07); + } + else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */ + { + tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F); + } + + /* Write to USART BRR */ + USARTx->BRR = (uint16_t)tmpreg; +} + +/** + * @brief Fills each USART_InitStruct member with its default value. + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure + * which will be initialized. + * @retval None + */ +void USART_StructInit(USART_InitTypeDef* USART_InitStruct) +{ + /* USART_InitStruct members default value */ + USART_InitStruct->USART_BaudRate = 9600; + USART_InitStruct->USART_WordLength = USART_WordLength_8b; + USART_InitStruct->USART_StopBits = USART_StopBits_1; + USART_InitStruct->USART_Parity = USART_Parity_No ; + USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None; +} + +/** + * @brief Initializes the USARTx peripheral Clock according to the + * specified parameters in the USART_ClockInitStruct . + * @param USARTx: where x can be 1, 2, 3 to select the USART peripheral. + * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef + * structure that contains the configuration information for the specified + * USART peripheral. + * @note The Smart Card and Synchronous modes are not available for UART4 and UART5. + * @retval None + */ +void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct) +{ + uint32_t tmpreg = 0x00; + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock)); + assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL)); + assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA)); + assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit)); + +/*---------------------------- USART CR2 Configuration -----------------------*/ + tmpreg = USARTx->CR2; + /* Clear CLKEN, CPOL, CPHA and LBCL bits */ + tmpreg &= CR2_CLOCK_CLEAR_Mask; + /* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/ + /* Set CLKEN bit according to USART_Clock value */ + /* Set CPOL bit according to USART_CPOL value */ + /* Set CPHA bit according to USART_CPHA value */ + /* Set LBCL bit according to USART_LastBit value */ + tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL | + USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit; + /* Write to USART CR2 */ + USARTx->CR2 = (uint16_t)tmpreg; +} + +/** + * @brief Fills each USART_ClockInitStruct member with its default value. + * @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef + * structure which will be initialized. + * @retval None + */ +void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct) +{ + /* USART_ClockInitStruct members default value */ + USART_ClockInitStruct->USART_Clock = USART_Clock_Disable; + USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low; + USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge; + USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable; +} + +/** + * @brief Enables or disables the specified USART peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USARTx peripheral. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the selected USART by setting the UE bit in the CR1 register */ + USARTx->CR1 |= CR1_UE_Set; + } + else + { + /* Disable the selected USART by clearing the UE bit in the CR1 register */ + USARTx->CR1 &= CR1_UE_Reset; + } +} + +/** + * @brief Enables or disables the specified USART interrupts. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IT: specifies the USART interrupt sources to be enabled or disabled. + * This parameter can be one of the following values: + * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) + * @arg USART_IT_LBD: LIN Break detection interrupt + * @arg USART_IT_TXE: Transmit Data Register empty interrupt + * @arg USART_IT_TC: Transmission complete interrupt + * @arg USART_IT_RXNE: Receive Data register not empty interrupt + * @arg USART_IT_IDLE: Idle line detection interrupt + * @arg USART_IT_PE: Parity Error interrupt + * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) + * @param NewState: new state of the specified USARTx interrupts. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState) +{ + uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00; + uint32_t usartxbase = 0x00; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_CONFIG_IT(USART_IT)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + /* The CTS interrupt is not available for UART4 and UART5 */ + if (USART_IT == USART_IT_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + usartxbase = (uint32_t)USARTx; + + /* Get the USART register index */ + usartreg = (((uint8_t)USART_IT) >> 0x05); + + /* Get the interrupt position */ + itpos = USART_IT & IT_Mask; + itmask = (((uint32_t)0x01) << itpos); + + if (usartreg == 0x01) /* The IT is in CR1 register */ + { + usartxbase += 0x0C; + } + else if (usartreg == 0x02) /* The IT is in CR2 register */ + { + usartxbase += 0x10; + } + else /* The IT is in CR3 register */ + { + usartxbase += 0x14; + } + if (NewState != DISABLE) + { + *(__IO uint32_t*)usartxbase |= itmask; + } + else + { + *(__IO uint32_t*)usartxbase &= ~itmask; + } +} + +/** + * @brief Enables or disables the USARTs DMA interface. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_DMAReq: specifies the DMA request. + * This parameter can be any combination of the following values: + * @arg USART_DMAReq_Tx: USART DMA transmit request + * @arg USART_DMAReq_Rx: USART DMA receive request + * @param NewState: new state of the DMA Request sources. + * This parameter can be: ENABLE or DISABLE. + * @note The DMA mode is not available for UART5 except in the STM32 + * High density value line devices(STM32F10X_HD_VL). + * @retval None + */ +void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_DMAREQ(USART_DMAReq)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the DMA transfer for selected requests by setting the DMAT and/or + DMAR bits in the USART CR3 register */ + USARTx->CR3 |= USART_DMAReq; + } + else + { + /* Disable the DMA transfer for selected requests by clearing the DMAT and/or + DMAR bits in the USART CR3 register */ + USARTx->CR3 &= (uint16_t)~USART_DMAReq; + } +} + +/** + * @brief Sets the address of the USART node. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_Address: Indicates the address of the USART node. + * @retval None + */ +void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_ADDRESS(USART_Address)); + + /* Clear the USART address */ + USARTx->CR2 &= CR2_Address_Mask; + /* Set the USART address node */ + USARTx->CR2 |= USART_Address; +} + +/** + * @brief Selects the USART WakeUp method. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_WakeUp: specifies the USART wakeup method. + * This parameter can be one of the following values: + * @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection + * @arg USART_WakeUp_AddressMark: WakeUp by an address mark + * @retval None + */ +void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_WAKEUP(USART_WakeUp)); + + USARTx->CR1 &= CR1_WAKE_Mask; + USARTx->CR1 |= USART_WakeUp; +} + +/** + * @brief Determines if the USART is in mute mode or not. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART mute mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the USART mute mode by setting the RWU bit in the CR1 register */ + USARTx->CR1 |= CR1_RWU_Set; + } + else + { + /* Disable the USART mute mode by clearing the RWU bit in the CR1 register */ + USARTx->CR1 &= CR1_RWU_Reset; + } +} + +/** + * @brief Sets the USART LIN Break detection length. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_LINBreakDetectLength: specifies the LIN break detection length. + * This parameter can be one of the following values: + * @arg USART_LINBreakDetectLength_10b: 10-bit break detection + * @arg USART_LINBreakDetectLength_11b: 11-bit break detection + * @retval None + */ +void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength)); + + USARTx->CR2 &= CR2_LBDL_Mask; + USARTx->CR2 |= USART_LINBreakDetectLength; +} + +/** + * @brief Enables or disables the USARTs LIN mode. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART LIN mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the LIN mode by setting the LINEN bit in the CR2 register */ + USARTx->CR2 |= CR2_LINEN_Set; + } + else + { + /* Disable the LIN mode by clearing the LINEN bit in the CR2 register */ + USARTx->CR2 &= CR2_LINEN_Reset; + } +} + +/** + * @brief Transmits single data through the USARTx peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param Data: the data to transmit. + * @retval None + */ +void USART_SendData(USART_TypeDef* USARTx, uint16_t Data) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_DATA(Data)); + + /* Transmit Data */ + USARTx->DR = (Data & (uint16_t)0x01FF); +} + +/** + * @brief Returns the most recent received data by the USARTx peripheral. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @retval The received data. + */ +uint16_t USART_ReceiveData(USART_TypeDef* USARTx) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + /* Receive Data */ + return (uint16_t)(USARTx->DR & (uint16_t)0x01FF); +} + +/** + * @brief Transmits break characters. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @retval None + */ +void USART_SendBreak(USART_TypeDef* USARTx) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + /* Send break characters */ + USARTx->CR1 |= CR1_SBK_Set; +} + +/** + * @brief Sets the specified USART guard time. + * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. + * @param USART_GuardTime: specifies the guard time. + * @note The guard time bits are not available for UART4 and UART5. + * @retval None + */ +void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime) +{ + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + + /* Clear the USART Guard time */ + USARTx->GTPR &= GTPR_LSB_Mask; + /* Set the USART guard time */ + USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08); +} + +/** + * @brief Sets the system clock prescaler. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_Prescaler: specifies the prescaler clock. + * @note The function is used for IrDA mode with UART4 and UART5. + * @retval None + */ +void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + + /* Clear the USART prescaler */ + USARTx->GTPR &= GTPR_MSB_Mask; + /* Set the USART prescaler */ + USARTx->GTPR |= USART_Prescaler; +} + +/** + * @brief Enables or disables the USARTs Smart Card mode. + * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. + * @param NewState: new state of the Smart Card mode. + * This parameter can be: ENABLE or DISABLE. + * @note The Smart Card mode is not available for UART4 and UART5. + * @retval None + */ +void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the SC mode by setting the SCEN bit in the CR3 register */ + USARTx->CR3 |= CR3_SCEN_Set; + } + else + { + /* Disable the SC mode by clearing the SCEN bit in the CR3 register */ + USARTx->CR3 &= CR3_SCEN_Reset; + } +} + +/** + * @brief Enables or disables NACK transmission. + * @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral. + * @param NewState: new state of the NACK transmission. + * This parameter can be: ENABLE or DISABLE. + * @note The Smart Card mode is not available for UART4 and UART5. + * @retval None + */ +void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_123_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + if (NewState != DISABLE) + { + /* Enable the NACK transmission by setting the NACK bit in the CR3 register */ + USARTx->CR3 |= CR3_NACK_Set; + } + else + { + /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */ + USARTx->CR3 &= CR3_NACK_Reset; + } +} + +/** + * @brief Enables or disables the USARTs Half Duplex communication. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART Communication. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */ + USARTx->CR3 |= CR3_HDSEL_Set; + } + else + { + /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */ + USARTx->CR3 &= CR3_HDSEL_Reset; + } +} + + +/** + * @brief Enables or disables the USART's 8x oversampling mode. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART one bit sampling method. + * This parameter can be: ENABLE or DISABLE. + * @note + * This function has to be called before calling USART_Init() + * function in order to have correct baudrate Divider value. + * @retval None + */ +void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */ + USARTx->CR1 |= CR1_OVER8_Set; + } + else + { + /* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */ + USARTx->CR1 &= CR1_OVER8_Reset; + } +} + +/** + * @brief Enables or disables the USART's one bit sampling method. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the USART one bit sampling method. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the one bit method by setting the ONEBITE bit in the CR3 register */ + USARTx->CR3 |= CR3_ONEBITE_Set; + } + else + { + /* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */ + USARTx->CR3 &= CR3_ONEBITE_Reset; + } +} + +/** + * @brief Configures the USART's IrDA interface. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IrDAMode: specifies the IrDA mode. + * This parameter can be one of the following values: + * @arg USART_IrDAMode_LowPower + * @arg USART_IrDAMode_Normal + * @retval None + */ +void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_IRDA_MODE(USART_IrDAMode)); + + USARTx->CR3 &= CR3_IRLP_Mask; + USARTx->CR3 |= USART_IrDAMode; +} + +/** + * @brief Enables or disables the USART's IrDA interface. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param NewState: new state of the IrDA mode. + * This parameter can be: ENABLE or DISABLE. + * @retval None + */ +void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_FUNCTIONAL_STATE(NewState)); + + if (NewState != DISABLE) + { + /* Enable the IrDA mode by setting the IREN bit in the CR3 register */ + USARTx->CR3 |= CR3_IREN_Set; + } + else + { + /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */ + USARTx->CR3 &= CR3_IREN_Reset; + } +} + +/** + * @brief Checks whether the specified USART flag is set or not. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_FLAG: specifies the flag to check. + * This parameter can be one of the following values: + * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) + * @arg USART_FLAG_LBD: LIN Break detection flag + * @arg USART_FLAG_TXE: Transmit data register empty flag + * @arg USART_FLAG_TC: Transmission Complete flag + * @arg USART_FLAG_RXNE: Receive data register not empty flag + * @arg USART_FLAG_IDLE: Idle Line detection flag + * @arg USART_FLAG_ORE: OverRun Error flag + * @arg USART_FLAG_NE: Noise Error flag + * @arg USART_FLAG_FE: Framing Error flag + * @arg USART_FLAG_PE: Parity Error flag + * @retval The new state of USART_FLAG (SET or RESET). + */ +FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG) +{ + FlagStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_FLAG(USART_FLAG)); + /* The CTS flag is not available for UART4 and UART5 */ + if (USART_FLAG == USART_FLAG_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + return bitstatus; +} + +/** + * @brief Clears the USARTx's pending flags. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_FLAG: specifies the flag to clear. + * This parameter can be any combination of the following values: + * @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). + * @arg USART_FLAG_LBD: LIN Break detection flag. + * @arg USART_FLAG_TC: Transmission Complete flag. + * @arg USART_FLAG_RXNE: Receive data register not empty flag. + * + * @note + * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun + * error) and IDLE (Idle line detected) flags are cleared by software + * sequence: a read operation to USART_SR register (USART_GetFlagStatus()) + * followed by a read operation to USART_DR register (USART_ReceiveData()). + * - RXNE flag can be also cleared by a read to the USART_DR register + * (USART_ReceiveData()). + * - TC flag can be also cleared by software sequence: a read operation to + * USART_SR register (USART_GetFlagStatus()) followed by a write operation + * to USART_DR register (USART_SendData()). + * - TXE flag is cleared only by a write to the USART_DR register + * (USART_SendData()). + * @retval None + */ +void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG) +{ + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_CLEAR_FLAG(USART_FLAG)); + /* The CTS flag is not available for UART4 and UART5 */ + if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + USARTx->SR = (uint16_t)~USART_FLAG; +} + +/** + * @brief Checks whether the specified USART interrupt has occurred or not. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IT: specifies the USART interrupt source to check. + * This parameter can be one of the following values: + * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) + * @arg USART_IT_LBD: LIN Break detection interrupt + * @arg USART_IT_TXE: Tansmit Data Register empty interrupt + * @arg USART_IT_TC: Transmission complete interrupt + * @arg USART_IT_RXNE: Receive Data register not empty interrupt + * @arg USART_IT_IDLE: Idle line detection interrupt + * @arg USART_IT_ORE: OverRun Error interrupt + * @arg USART_IT_NE: Noise Error interrupt + * @arg USART_IT_FE: Framing Error interrupt + * @arg USART_IT_PE: Parity Error interrupt + * @retval The new state of USART_IT (SET or RESET). + */ +ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT) +{ + uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00; + ITStatus bitstatus = RESET; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_GET_IT(USART_IT)); + /* The CTS interrupt is not available for UART4 and UART5 */ + if (USART_IT == USART_IT_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + /* Get the USART register index */ + usartreg = (((uint8_t)USART_IT) >> 0x05); + /* Get the interrupt position */ + itmask = USART_IT & IT_Mask; + itmask = (uint32_t)0x01 << itmask; + + if (usartreg == 0x01) /* The IT is in CR1 register */ + { + itmask &= USARTx->CR1; + } + else if (usartreg == 0x02) /* The IT is in CR2 register */ + { + itmask &= USARTx->CR2; + } + else /* The IT is in CR3 register */ + { + itmask &= USARTx->CR3; + } + + bitpos = USART_IT >> 0x08; + bitpos = (uint32_t)0x01 << bitpos; + bitpos &= USARTx->SR; + if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET)) + { + bitstatus = SET; + } + else + { + bitstatus = RESET; + } + + return bitstatus; +} + +/** + * @brief Clears the USARTx's interrupt pending bits. + * @param USARTx: Select the USART or the UART peripheral. + * This parameter can be one of the following values: + * USART1, USART2, USART3, UART4 or UART5. + * @param USART_IT: specifies the interrupt pending bit to clear. + * This parameter can be one of the following values: + * @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) + * @arg USART_IT_LBD: LIN Break detection interrupt + * @arg USART_IT_TC: Transmission complete interrupt. + * @arg USART_IT_RXNE: Receive Data register not empty interrupt. + * + * @note + * - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun + * error) and IDLE (Idle line detected) pending bits are cleared by + * software sequence: a read operation to USART_SR register + * (USART_GetITStatus()) followed by a read operation to USART_DR register + * (USART_ReceiveData()). + * - RXNE pending bit can be also cleared by a read to the USART_DR register + * (USART_ReceiveData()). + * - TC pending bit can be also cleared by software sequence: a read + * operation to USART_SR register (USART_GetITStatus()) followed by a write + * operation to USART_DR register (USART_SendData()). + * - TXE pending bit is cleared only by a write to the USART_DR register + * (USART_SendData()). + * @retval None + */ +void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT) +{ + uint16_t bitpos = 0x00, itmask = 0x00; + /* Check the parameters */ + assert_param(IS_USART_ALL_PERIPH(USARTx)); + assert_param(IS_USART_CLEAR_IT(USART_IT)); + /* The CTS interrupt is not available for UART4 and UART5 */ + if (USART_IT == USART_IT_CTS) + { + assert_param(IS_USART_123_PERIPH(USARTx)); + } + + bitpos = USART_IT >> 0x08; + itmask = ((uint16_t)0x01 << (uint16_t)bitpos); + USARTx->SR = (uint16_t)~itmask; +} +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c index 4a901e4e..77a7ce51 100644 --- a/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c +++ b/firmware/stm32-esp/libraries/fwlib/src/stm32f10x_wwdg.c @@ -1,224 +1,224 @@ -/** - ****************************************************************************** - * @file stm32f10x_wwdg.c - * @author MCD Application Team - * @version V3.5.0 - * @date 11-March-2011 - * @brief This file provides all the WWDG firmware functions. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_wwdg.h" -#include "stm32f10x_rcc.h" - -/** @addtogroup STM32F10x_StdPeriph_Driver - * @{ - */ - -/** @defgroup WWDG - * @brief WWDG driver modules - * @{ - */ - -/** @defgroup WWDG_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_Defines - * @{ - */ - -/* ----------- WWDG registers bit address in the alias region ----------- */ -#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) - -/* Alias word address of EWI bit */ -#define CFR_OFFSET (WWDG_OFFSET + 0x04) -#define EWI_BitNumber 0x09 -#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) - -/* --------------------- WWDG registers bit mask ------------------------ */ - -/* CR register bit mask */ -#define CR_WDGA_Set ((uint32_t)0x00000080) - -/* CFR register bit mask */ -#define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) -#define CFR_W_Mask ((uint32_t)0xFFFFFF80) -#define BIT_Mask ((uint8_t)0x7F) - -/** - * @} - */ - -/** @defgroup WWDG_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_Variables - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @defgroup WWDG_Private_Functions - * @{ - */ - -/** - * @brief Deinitializes the WWDG peripheral registers to their default reset values. - * @param None - * @retval None - */ -void WWDG_DeInit(void) -{ - RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); - RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); -} - -/** - * @brief Sets the WWDG Prescaler. - * @param WWDG_Prescaler: specifies the WWDG Prescaler. - * This parameter can be one of the following values: - * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 - * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 - * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 - * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 - * @retval None - */ -void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) -{ - uint32_t tmpreg = 0; - /* Check the parameters */ - assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); - /* Clear WDGTB[1:0] bits */ - tmpreg = WWDG->CFR & CFR_WDGTB_Mask; - /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ - tmpreg |= WWDG_Prescaler; - /* Store the new value */ - WWDG->CFR = tmpreg; -} - -/** - * @brief Sets the WWDG window value. - * @param WindowValue: specifies the window value to be compared to the downcounter. - * This parameter value must be lower than 0x80. - * @retval None - */ -void WWDG_SetWindowValue(uint8_t WindowValue) -{ - __IO uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); - /* Clear W[6:0] bits */ - - tmpreg = WWDG->CFR & CFR_W_Mask; - - /* Set W[6:0] bits according to WindowValue value */ - tmpreg |= WindowValue & (uint32_t) BIT_Mask; - - /* Store the new value */ - WWDG->CFR = tmpreg; -} - -/** - * @brief Enables the WWDG Early Wakeup interrupt(EWI). - * @param None - * @retval None - */ -void WWDG_EnableIT(void) -{ - *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; -} - -/** - * @brief Sets the WWDG counter value. - * @param Counter: specifies the watchdog counter value. - * This parameter must be a number between 0x40 and 0x7F. - * @retval None - */ -void WWDG_SetCounter(uint8_t Counter) -{ - /* Check the parameters */ - assert_param(IS_WWDG_COUNTER(Counter)); - /* Write to T[6:0] bits to configure the counter value, no need to do - a read-modify-write; writing a 0 to WDGA bit does nothing */ - WWDG->CR = Counter & BIT_Mask; -} - -/** - * @brief Enables WWDG and load the counter value. - * @param Counter: specifies the watchdog counter value. - * This parameter must be a number between 0x40 and 0x7F. - * @retval None - */ -void WWDG_Enable(uint8_t Counter) -{ - /* Check the parameters */ - assert_param(IS_WWDG_COUNTER(Counter)); - WWDG->CR = CR_WDGA_Set | Counter; -} - -/** - * @brief Checks whether the Early Wakeup interrupt flag is set or not. - * @param None - * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) - */ -FlagStatus WWDG_GetFlagStatus(void) -{ - return (FlagStatus)(WWDG->SR); -} - -/** - * @brief Clears Early Wakeup interrupt flag. - * @param None - * @retval None - */ -void WWDG_ClearFlag(void) -{ - WWDG->SR = (uint32_t)RESET; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm32f10x_wwdg.c + * @author MCD Application Team + * @version V3.5.0 + * @date 11-March-2011 + * @brief This file provides all the WWDG firmware functions. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_wwdg.h" +#include "stm32f10x_rcc.h" + +/** @addtogroup STM32F10x_StdPeriph_Driver + * @{ + */ + +/** @defgroup WWDG + * @brief WWDG driver modules + * @{ + */ + +/** @defgroup WWDG_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_Defines + * @{ + */ + +/* ----------- WWDG registers bit address in the alias region ----------- */ +#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE) + +/* Alias word address of EWI bit */ +#define CFR_OFFSET (WWDG_OFFSET + 0x04) +#define EWI_BitNumber 0x09 +#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) + +/* --------------------- WWDG registers bit mask ------------------------ */ + +/* CR register bit mask */ +#define CR_WDGA_Set ((uint32_t)0x00000080) + +/* CFR register bit mask */ +#define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) +#define CFR_W_Mask ((uint32_t)0xFFFFFF80) +#define BIT_Mask ((uint8_t)0x7F) + +/** + * @} + */ + +/** @defgroup WWDG_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_Variables + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @defgroup WWDG_Private_Functions + * @{ + */ + +/** + * @brief Deinitializes the WWDG peripheral registers to their default reset values. + * @param None + * @retval None + */ +void WWDG_DeInit(void) +{ + RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); + RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); +} + +/** + * @brief Sets the WWDG Prescaler. + * @param WWDG_Prescaler: specifies the WWDG Prescaler. + * This parameter can be one of the following values: + * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1 + * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2 + * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4 + * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8 + * @retval None + */ +void WWDG_SetPrescaler(uint32_t WWDG_Prescaler) +{ + uint32_t tmpreg = 0; + /* Check the parameters */ + assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); + /* Clear WDGTB[1:0] bits */ + tmpreg = WWDG->CFR & CFR_WDGTB_Mask; + /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */ + tmpreg |= WWDG_Prescaler; + /* Store the new value */ + WWDG->CFR = tmpreg; +} + +/** + * @brief Sets the WWDG window value. + * @param WindowValue: specifies the window value to be compared to the downcounter. + * This parameter value must be lower than 0x80. + * @retval None + */ +void WWDG_SetWindowValue(uint8_t WindowValue) +{ + __IO uint32_t tmpreg = 0; + + /* Check the parameters */ + assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); + /* Clear W[6:0] bits */ + + tmpreg = WWDG->CFR & CFR_W_Mask; + + /* Set W[6:0] bits according to WindowValue value */ + tmpreg |= WindowValue & (uint32_t) BIT_Mask; + + /* Store the new value */ + WWDG->CFR = tmpreg; +} + +/** + * @brief Enables the WWDG Early Wakeup interrupt(EWI). + * @param None + * @retval None + */ +void WWDG_EnableIT(void) +{ + *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; +} + +/** + * @brief Sets the WWDG counter value. + * @param Counter: specifies the watchdog counter value. + * This parameter must be a number between 0x40 and 0x7F. + * @retval None + */ +void WWDG_SetCounter(uint8_t Counter) +{ + /* Check the parameters */ + assert_param(IS_WWDG_COUNTER(Counter)); + /* Write to T[6:0] bits to configure the counter value, no need to do + a read-modify-write; writing a 0 to WDGA bit does nothing */ + WWDG->CR = Counter & BIT_Mask; +} + +/** + * @brief Enables WWDG and load the counter value. + * @param Counter: specifies the watchdog counter value. + * This parameter must be a number between 0x40 and 0x7F. + * @retval None + */ +void WWDG_Enable(uint8_t Counter) +{ + /* Check the parameters */ + assert_param(IS_WWDG_COUNTER(Counter)); + WWDG->CR = CR_WDGA_Set | Counter; +} + +/** + * @brief Checks whether the Early Wakeup interrupt flag is set or not. + * @param None + * @retval The new state of the Early Wakeup interrupt flag (SET or RESET) + */ +FlagStatus WWDG_GetFlagStatus(void) +{ + return (FlagStatus)(WWDG->SR); +} + +/** + * @brief Clears Early Wakeup interrupt flag. + * @param None + * @retval None + */ +void WWDG_ClearFlag(void) +{ + WWDG->SR = (uint32_t)RESET; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/output/pro.hex b/firmware/stm32-esp/output/pro.hex index 20645f9e..d50342c6 100644 --- a/firmware/stm32-esp/output/pro.hex +++ b/firmware/stm32-esp/output/pro.hex @@ -1,1709 +1,1569 @@ -:020000040800F2 -:10000000A00C002045010008B5220008B91C00081A -:10001000B32200082D100008B53C000800000000C5 -:100020000000000000000000000000007D26000825 -:100030002F1000080000000067250008F1370008B5 -:100040005F0100085F0100085F0100085F01000810 -:100050005F0100085F0100085F0100085F01000800 -:100060005F0100085F0100085F0100085F010008F0 -:100070005F0100085F0100085F0100085F010008E0 -:100080005F0100085F0100085F0100085F010008D0 -:100090005F0100085F0100085F0100085F010008C0 -:1000A0005F0100085F0100085F0100085F010008B0 -:1000B0005F010008453800085F0100085F01000883 -:1000C0005F0100085F0100085F0100085F01000890 -:1000D0005F0100080D3A0008753A0008DD3A000893 -:1000E0000D1B00085F0100085F0100085F010008A8 -:1000F0005F0100085F0100085F0100085F01000860 -:100100005F0100085F0100085F0100085F0100084F -:100110005F0100085F0100085F0100085F0100083F -:100120005F0100085F0100085F0100085F0100082F -:10013000DFF80CD000F0C4FB00480047B1480008CD -:10014000A00C00200648804706480047FEE7FEE76F -:10015000FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE777 -:10016000F537000831010008A0F14101192900D834 -:100170002030704740EA01039B0703D009E008C91B -:10018000121F08C0042AFAD203E011F8013B00F85C -:10019000013B521EF9D27047D2B201E000F8012BA8 -:1001A000491EFBD270470022F6E710B513460A46F7 -:1001B00004461946FFF7F0FF204610BD30B505464E -:1001C0002A460B4612F8010B13F8014B08B1A04266 -:1001D000F8D01CB1002802D06D1CF1E7284630BDD4 -:1001E000421C10F8011B0029FBD1801A704730B562 -:1001F00005460020034600E05B1C934205D2EC5C00 -:10020000C85C201A01D1002CF6D130BD2DE9FE4F7B -:10021000804681EA0300C00F0C46009021F00041A7 -:1002200023F00045B8EB0200A94105D24046214623 -:1002300090461C460B46024623F00040104347D030 -:10024000270DC7F30A00C3F30A510290401A019028 -:1002500040286BDAC3F3130040F4801B00989246E9 -:1002600020B10023D2EB030A63EB0B0B0198594634 -:10027000C0F14002504600F0D6F906460D46504601 -:100280005946019A00F0EEF910EB08006141002494 -:1002900087EA115284EAE7731A4340D0009A62B3A6 -:1002A000019A012A4FEA075215DC001B61EB02019B -:1002B0004FF0004202EA0752CDE90042001C41F52E -:1002C000801132462B4600F025FA03B0BDE8F08FCE -:1002D00040462146F9E7001B61EB0201001C41F595 -:1002E000801300185B412018A2F5001747EB0301AB -:1002F00040EAD570B6196D4111E06D084FEA360637 -:1003000045EAC0754FEA0752001B61EB0201001C71 -:1003100041F5801149084FEA300000195141324639 -:100320002B4603B0BDE8F04F00F0E5B9009801227C -:1003300040000023D0EB020263EBE07300982146FB -:100340004FEAE074B8EB000061EB0401E9E783F0E9 -:1003500000435BE781F0004158E72DE9FE4F81EA59 -:10036000030404F0004421F0004100944FF0000B1E -:1003700023F0004350EA01045ED052EA03045BD04C -:10038000C3F30A54C1F30A552C44A4F2F334019484 -:10039000A0FB0254C1F3130141F48011C3F3130312 -:1003A00043F4801301FB024400FB034E840A970AC6 -:1003B00044EA815447EA8357A4FB076802958D0AF3 -:1003C00005FB07854FEA932C04FB0C542705029D7F -:1003D0004FEA065847EA1637B5EB08056EEB070CEF -:1003E000870E920E47EA811742EA8312A7FB0201A9 -:1003F000B6EB0B0164EB00042B0D43EA0C335E18E3 -:1004000044EB1C50DA465146E7FB0201C5F31304E6 -:100410004FEA0B3343EA14534FEA0432019C43EA98 -:100420000603A4F10C040294009CCDE900B400F092 -:1004300071F903B0BDE8F08F00200146F9E770B50F -:1004400021F0004303430CD0C1F30A550024D5EB3F -:10045000040564EB0403D617AD1AB34102DB002098 -:10046000014670BD201841EB025170BD9623002259 -:10047000114600F012B90EB5C10F80EAE0700844D1 -:10048000CA07002140F233438DE80E000A460B46AE -:1004900000F040F903B000BD70B5C1F30A5201F09D -:1004A00000450024C1F3130140F2FF3341F48011F1 -:1004B0009A4201DA002070BD40F233439A42A2F220 -:1004C000334203DC524200F0BDF800E090402C4380 -:1004D000F1D0404270BDC1F30A5210B5C1F313010F -:1004E00040F2FF3341F480119A4201DA002010BD3E -:1004F00040F233439A42A2F2334203DC524200F00C -:10050000A1F810BD904010BD00F0004230F0004056 -:100510000AD0C10D01F56071C0F3160042EA015125 -:10052000C208400711437047002001467047000091 -:1005300030B5041E71F1000404DB4FF0004440426A -:1005400064EB0101141E73F1000405DB1C464FF03F -:100550000043524263EB0403994208BF904230BD0E -:1005600001F0004330B421F0004150EA010206D00E -:100570000A0DA2F56072C1F31301002A02DC30BC3F -:1005800000207047440F44EAC104C100E01830BCA9 -:1005900000EBC25000F078B830B50B4601460020A1 -:1005A0002022012409E021FA02F59D4205D303FA35 -:1005B00002F5491B04FA02F52844151EA2F10102B6 -:1005C000F1DC30BD2DE9F05F0546002092469B46E8 -:1005D00088460646814640241BE028464146474659 -:1005E000224600F02FF853465A46C01A914110D3C4 -:1005F00011461846224600F016F82D1A67EB01083E -:100600004F4622460120002100F00DF817EB0009AB -:100610004E41201EA4F10104DFDC484631462A4643 -:100620004346BDE8F09F202A04DB203A00FA02F19D -:10063000002070479140C2F1200320FA03F31943D0 -:1006400090407047202A04DB203A21FA02F0002172 -:10065000704721FA02F3D040C2F1200291400843D2 -:1006600019467047202A06DBCB17203A41FA02F0E0 -:1006700043EAE07306E041FA02F3D040C2F12002FF -:1006800091400843194670470029A8BF7047401C95 -:10069000490008BF20F00100704710B4B0FA80FC98 -:1006A00000FA0CF050EA010404BF10BC704749B1D5 -:1006B000CCF1200421FA04F411FA0CF118BF012145 -:1006C00021430843A3EB0C01CB1D4FEA00614FEA25 -:1006D000102042BF002010BC704700EBC3501044F4 -:1006E0000029A4BF10BC7047401C490008BF20F07F -:1006F000010010BC704710B5141E73F1000408DA35 -:10070000401C41F1000192185B411A4301D120F0D5 -:10071000010010BD2DE9F04D92469B4611B1B1FA92 -:1007200081F202E0B0FA80F220329046FFF77BFFC0 -:1007300004460F4640EA0A0041EA0B0153465A4676 -:10074000084313D0114653EA010019D0C8F1400202 -:100750005046FFF777FF05460E465046594642463B -:10076000FFF761FF084305D0012004E02046394629 -:10077000BDE8F08D0020054346EAE0762C43374380 -:100780000A986305E40AA0EB08000022FD0A44EA87 -:1007900047540A3002D500200146E9E70105101947 -:1007A0006941DDE9084500196941BDE8F04DA2E75E -:1007B0002DE9F04D81EA030404F0004B21F00045DF -:1007C00014464FF0000A23F0004150EA050220D001 -:1007D00054EA01021DD0C5F30A570246C5F31303BC -:1007E000C1F31300C1F30A5640F4801543F480139B -:1007F000A7EB0608101BD64608F2FD3873EB050080 -:1008000002D308F1010801E092185B41B8F1000F32 -:1008100003DA00200146BDE8F08D00204FF480117E -:10082000064684460EE0171B73EB050705D3121B23 -:1008300063EB050306434CEA010C49084FEA30001C -:1008400092185B4150EA0107EDD152EA030012D041 -:1008500082EA040083EA0501084305D0101BAB417E -:1008600006D20122002306E000224FF0004302E0FE -:100870006FF0010253101AEB06004CEB085110EB1D -:100880000A0041EB0B01BDE8F04DFFF734BFC1F3A7 -:100890000A52C1F3130140F2FF3341F480119A422E -:1008A00002DA00200146704740F233439A42A2F236 -:1008B000334202DC5242FFF7C5BEFFF7B4BE000070 -:1008C000064C074D06E0E06840F0010394E807009D -:1008D00098471034AC42F6D3FFF72EFCA869000805 -:1008E000C86900082DE9F04D00231A461B1A8A41F9 -:1008F00003DB00200146BDE8F08DC1F30A52C1F3CD -:10090000130141F480154FF0000BD10702D10018FC -:100910006D41521E0027044640F2FF11384601EB9C -:10092000620A3E468046024600204FF48011FFF7DF -:1009300089FEC2197141BB1846EB0100B4EB030CF0 -:1009400075EB000C04D3E41A65EB000517460E4660 -:10095000241908F101006D4180463428E3DDF919BE -:1009600046EB0600091BA84103D24FF0FF321346A5 -:1009700001E0002213461BEB070046EB0A51BDE8DD -:10098000F04DFFF7B8BE002904D0816841F00101A5 -:1009900081607047816821F001018160704700002B -:1009A00010B5154988420AD144150121204601F0AD -:1009B00001FE2046BDE81040002101F0FBBD0F49BB -:1009C00088420AD104150121204601F0F3FD20469A -:1009D000BDE81040002101F0EDBD094988420AD16F -:1009E0000121CC03204601F0E5FD2046BDE8104082 -:1009F000002101F0DFBD10BD0024014000280140AE -:100A0000003C0140014600208968490700D50120CB -:100A10007047C06C80B270470246002012680A42DC -:100A200000D001207047014600208968090700D5E1 -:100A30000120704770B500240025194E01220723BC -:100A40001146304600F054F80121304600F08FF88E -:100A500002213046FFF7E0FF0028F9D03046FFF7CB -:100A6000D8FF0544022000F0E3FA641CE4B2052C30 -:100A7000E4D30520B5FBF0F0FFF7F8FCFFF744FDE9 -:100A80004FF06632074BFFF768FC6FF00B02FFF781 -:100A9000D6FC0122FFF7D3FCBDE87040FFF760BD34 -:100AA0000024014066660A4010B542680E4B1A40A9 -:100AB0000C790B6842EA04221343436082680B4BB3 -:100AC0001A40D1E9024323434C7942EA44021343DA -:100AD0008360C26A22F47002097C491EC9B242EAEC -:100AE0000151C16210BD0000FFFEF0FFFDF7F1FFF4 -:100AF00070B5072609290AD9C568A1F10A0404EBD3 -:100B00004404A640B543A3401D43C56007E0056902 -:100B100001EB4104A640B543A3401D4305611F23DB -:100B2000072A09D2446B521E02EB820293409C4377 -:100B300091400C43446370BD0D2A09D2046BD21F4F -:100B400002EB820293409C4391400C43046370BDCE -:100B5000C46A0D3A02EB820293409C4391400C43DD -:100B6000C46270BD816841F008018160704700294E -:100B700004D0816841F4A00181607047816821F44C -:100B8000A00181607047816841F004018160704775 -:100B900030B587B001214FF4017001F0FDFC4FF436 -:100BA000004001F0E1FC0220ADF8040000248DF8C3 -:100BB000074001A9184801F021F8184D2846FFF711 -:100BC000EFFE02948DF80C408DF80D404FF460213B -:100BD0000491059401218DF8181002A92846FFF709 -:100BE00063FF01212846FFF7CEFE2846FFF7BAFF34 -:100BF0002846FFF718FF0028FAD12846FFF7C3FF61 -:100C00002846FFF7FFFE0028FAD101212846FFF70A -:100C1000AEFF07B030BD00000008014000240140D5 -:100C200010B56FF0040002F0D5FD094809490068CD -:100C3000B0FBF1F00849C0B2087000EB4002C2EB13 -:100C4000C0104FF6FF7202EAC000488010BD0000DD -:100C50000000002000127A00280000202DE9FF414A -:100C60000121182001F098FC0121084601F094FCB4 -:100C700043F20200ADF80C0010208DF80F000320A5 -:100C80008DF80E00244C03A9204600F0B7FF022186 -:100C9000204601F00DF86114204601F009F8A11476 -:100CA000204601F005F84FF4C040ADF80C00482094 -:100CB0008DF80F00194F03A9384600F09FFF4FF43D -:100CC000C06001F02BFB28248DF8004000258DF832 -:100CD00001508DF8025001268DF80360684601F03E -:100CE000EBFAF003ADF80C008DF80F4003A938467D -:100CF00000F084FF0F21022000F06CFF01948DF8BA -:100D0000085008208DF809008DF80A6001A800F04D -:100D100027FFBDE8FF810000000C014000100140EA -:100D2000012080F3138805480168054A01F4E06159 -:100D300011430160BFF34F8FFEE700000CED00E0B0 -:100D40000400FA057FB50121022001F017FC0920FB -:100D5000ADF8080041F61F40ADF804000024ADF8DE -:100D60000A40ADF806400E4D01A9284602F000FEEB -:100D700001224121284602F0F0FD1D218DF80010CE -:100D80008DF8014003218DF8021001218DF8031028 -:100D9000684601F091FA0121284602F0C6FD7FBDA8 -:100DA00000040040F0B587B006460121480401F078 -:100DB000E5FB0121042001F0EFFB0424ADF818400D -:100DC00003258DF81A5018218DF81B101E4F06A907 -:100DD000384600F013FF0821ADF818108DF81B40BD -:100DE00006A9384600F00AFF4FF4A06001F096FA19 -:100DF00026218DF804108DF8055002208DF806008C -:100E000001208DF8070001A801F056FA0296002093 -:100E1000ADF80C00ADF80E00ADF81000ADF8140000 -:100E20000C20ADF81200094C02A9204602F0DCFEAD -:100E3000012240F22551204602F0BBFE012120464E -:100E400002F084FE07B0F0BD0008014000440040FD -:100E500070B586B005460121880401F08FFB0121A1 -:100E6000082001F099FB4FF48060ADF814000324D2 -:100E70008DF8164018218DF817101F4E05A9304621 -:100E800000F0BCFEF114ADF8141004218DF8171019 -:100E900005A9304600F0B2FE4FF4A06001F03EFA22 -:100EA00027208DF800008DF801408DF802400120C8 -:100EB0008DF80300684601F0FFF901950020ADF8B8 -:100EC0000800ADF80A00ADF80C00ADF810000C20D9 -:100ED000ADF80E00094C01A9204602F085FE012262 -:100EE00040F22551204602F064FE0121204602F026 -:100EF0002DFE06B070BD0000000C0140004800400F -:100F00002DE9F04105460F4600240C4E0BE0402130 -:100F1000304602F027FE0028F9D0295D304602F065 -:100F2000C5FE641CA4B2BC42F1D34021304602F09D -:100F300019FE0028F9D0BDE8F0810000004800400B -:100F400070B54FF400512C4800F0ABFE2B4C00253F -:100F5000A8B1A572A089B0F5967F4BD3A07864287C -:100F600001D2401CA070FFF765FD606024498842F3 -:100F70003EDD2449884205DD6420607239E00120AD -:100F8000A072E7E72049884202DD5A20607230E013 -:100F90001E49884202DB502060722AE01C498842C8 -:100FA00002DB4620607224E01A49884202DD3C20C0 -:100FB00060721EE01849884202DD3220607218E03B -:100FC0001649884202DD2820607212E014498842E6 -:100FD00002DB1E2060720CE01249884202DB142002 -:100FE000607206E01049884203DB0A20607200E06C -:100FF0006572A58170BD0000001001403402002020 -:10100000B81E6540B81E85405C8F82407B147E40D0 -:101010009A9979408FC275405C8F7240D7A3704017 -:1010200052B86E40A4706D409A996940FEE77047CF -:101030000B49498848434FF0E021486100238B6108 -:10104000086940F0010008610869C20701D0C003C7 -:10105000FAD5086920F0010008618B617047000033 -:10106000280000200B49097848434FF0E0214861EF -:1010700000238B61086940F0010008610869C2071C -:1010800001D0C003FAD5086920F0010008618B6126 -:1010900070470000280000202DE9F0412B4C01276B -:1010A000FD03207D2A4E4FF00208002816D1294664 -:1010B000304600F0F6FD80B1C820FFF7B9FF2946A1 -:1010C000304600F0EEFD48B12946304600F0E9FD1B -:1010D0000028F9D184F8158000E06775207D01288B -:1010E00014D12946304600F0DCFD78B1C820FFF766 -:1010F0009FFF2946304600F0D4FD38B129463046DE -:1011000000F0CFFD0028F9D184F81580207D022859 -:1011100017D12946304600F0C4FD002811D0C82060 -:10112000FFF786FF2946304600F0BBFD002808D0B7 -:101130002946304600F0B5FD0028F9D1A07A10B15B -:101140006775BDE8F08103206075FAE7340200207E -:10115000001001402DE9F0412B4C207D627D904232 -:101160004FD001273E03294D022A10D1314628468F -:1011700000F09EFD01F0DEFA227D62B13146284684 -:1011800000F098FDA77501F0B5F902202075607D8B -:10119000012803D01EE001F05BFCF3E702212846A2 -:1011A00000F086FD3146284600F082FD227D12B116 -:1011B000022A03D00DE001F04BFC0AE0002001F010 -:1011C000C3FE01F045FC002020723146284600F0A5 -:1011D00071FD2775607D032813D14FF47A70FFF7F6 -:1011E00027FF0221284600F063FD3146284600F023 -:1011F0005FFD4FF40051284600F05AFD0320207592 -:10120000FEE7BDE8F081000034020020000C014040 -:101210000FB4F0B5B3B0C82101A8FEF7C4FF002495 -:1012200039AA01A8389902F05BFD0020009001A8BE -:10123000FEF7D6FF86B20D4F01AD0BE040213846D8 -:1012400002F090FC0028F9D0295D384602F02EFD0E -:10125000641CA4B2B442F1D34021384602F082FCAF -:101260000028F9D033B0F0BC5DF814FB0044004016 -:1012700070B590B005460E463C2101A8FEF793FFDD -:101280004FF4E130FFF78EFD4FF47A742046FFF7FC -:10129000CFFE2046FFF7CCFE09E000F085FAC82219 -:1012A00039A13AA000F0ACFB2046FFF7C1FEC822EE -:1012B00035A13AA000F0A4FB0028EED1C82232A14B -:1012C00037A000F09DFB0028F8D1C8222EA136A03F -:1012D00000F096FB0028F8D10A20FFF7A9FEC822EB -:1012E00029A137A000F08CFB0028F8D1C82226A144 -:1012F00036A000F085FB0028F8D12046FFF798FEC5 -:101300002046FFF795FE2046FFF792FE2046FFF7A6 -:101310008FFE3C2101A8FEF746FF33462A462DA149 -:1013200001A802F0C9FC224617A101A800F068FB41 -:101330000028F8D1C82214A12CA000F061FB0028DD -:10134000F8D14FF4FA7422460FA12BA000F058FBFD -:101350000028F8D14FF4967422460BA133A000F078 -:101360004FFB0028F8D1C82207A134A000F048FBA9 -:101370000028F8D13449088064213448FEF713FF6F -:1013800010B0002070BD00004F4B000041542B43B3 -:1013900049504D4F44453D3000000000415400008D -:1013A000415445300000000041542B554152543DFA -:1013B0003131353230302C382C312C302C3000008B -:1013C00041542B43574D4F44453D320041542B521D -:1013D0005354000041542B43575341503D22257331 -:1013E000222C222573222C312C34000041542B4313 -:1013F00049504D55583D300041542B4349505354AA -:101400004152543D22554450222C223235352E3241 -:1014100035352E3235352E323535222C36303135B4 -:10142000362C34323235342C3000000041542B43FA -:1014300049504D4F44453D310000000041542B437D -:10144000495053454E440000360000206C010020F6 -:1014500001460020054A1288130406D5044BC2F346 -:101460000E0298541846FEF7A9BE704736000020B9 -:101470006C0100202DE9F041324D288800045ED532 -:10148000314C0026207802283DD1304A10787B2844 -:1014900039D1A6802E4BA088115C19547D2902D029 -:1014A000401CA080F7E72A4803F07EF9206100285D -:1014B0003FD028A1274603F059F901468069C96940 -:1014C000FFF709F8B860A0F56A41FC3914D123A1EF -:1014D000386903F04BF9026922A1234802F0ECFBC2 -:1014E00022A1386903F042F902691F481DA1143096 -:1014F00002F0E2FB03203870386903F013F964212D -:101500001348FEF750FE20780A2818D12A78627016 -:101510000F480E496430FEF72DFE64210B48FEF79C -:1015200042FE2E80BDE8F041094813A16430FEF769 -:1015300045BE64210548FEF736FE11480680BDE829 -:10154000F0810000360000203C0000206C010020EB -:1015500030050020706F72740000000073736964BE -:1015600000000000257300006002002070617373AA -:10157000776F726400000000434C4F5345440000F5 -:1015800038000020F0B589B0484D022428780128A1 -:101590001BD0474E00244FF4FA62718A02281AD0F9 -:1015A000042703281ED0042821D005282BD00A2880 -:1015B00009D1914262D33F48E96800F044FD3D48BB -:1015C00000F052FA748209B0F0BD3BA13DA0FFF7D4 -:1015D0004FFE2C70F7E79142F5D33FA000F044FA9C -:1015E0007482F0E745A000F03FFA2F70EBE700F0BF -:1015F00093F94D49A1F1140000F00EF90028F8D13B -:1016000005202870DFE72948143007723C21018348 -:1016100045491431C160963101644131C164847619 -:101620004FF4C87631462348FEF7BDFDEE601F4AF1 -:10163000314614321F4800F02FFC3C4804801D48FE -:1016400000F012FA3A4A1B48E96800F0F9FB022858 -:1016500005D1184A07A908A8EB6800F02EFB35A0B1 -:1016600000F0E2FD39A000F0DFFD3EA000F0DCFD5F -:1016700009B043A0BDE8F04000F0D6BD40F2DC5018 -:101680008142A0D3202101A8FEF78DFD01208DF815 -:1016900004408DF805408DF806403A468DF8070065 -:1016A00001A93EA000F0A1FD74828CE73C0000205F -:1016B00034020020A003002061736471776539381B -:1016C000363700005869616F59695F494F545F416F -:1016D0006972426F780000007B22636F6465223A72 -:1016E0002230222C226D7367223A22737461727445 -:1016F00020636F6E6E656374227D00007B22636FD2 -:101700006465223A2231222C226D7367223A2267C5 -:10171000657457696669496E666F3A737563636588 -:101720007373227D00000000740200203600002048 -:10173000CD1A00087374617475732F7365742F3735 -:10174000434446413130343941444100737461743B -:1017500075732F6765742F374344464131303439F0 -:101760004144410073657474696E672F7365742F0B -:101770003743444641313034394144410000000090 -:1017800073657474696E672F6765742F37434446B9 -:1017900041313034394144410000000064657669CC -:1017A00063655F696E666F0010B5184C4021204676 -:1017B00002F0D8F90028F9D02B21204602F076FA61 -:1017C0000F20FFF735FC4021204602F0CBF900281E -:1017D000F9D02B21204602F069FA0F20FFF728FCF0 -:1017E0004021204602F0BEF90028F9D02B212046E6 -:1017F00002F05CFA4FF4FA70FFF71AFCBDE81040F3 -:10180000142203A103A000F0FBB800000044004034 -:101810004F4B00004154000030B58FB004460D46D8 -:101820003C216846FEF7BFFC3C216846FEF7BBFC46 -:101830002B46224618A1684602F03EFA64221BA1FC -:10184000684600F0DDF810B101200FB030BDC822AD -:1018500019A11AA000F0D4F80028F8D1C82216A1C6 -:1018600019A000F0CDF80028F8D1C82212A121A0BB -:1018700000F0C6F80028F8D114220FA121A000F032 -:10188000BFF80028F8D12249088064212148FEF7DA -:101890008AFC0020D9E7000041542B43574A4150AD -:1018A0003D222573222C22257322000057494649E8 -:1018B00020474F54204950004F4B000041542B43C8 -:1018C00049504D55583D300041542B4349505354D5 -:1018D0004152543D22554450222C223139322E316E -:1018E00036382E312E36222C383038362C383038D7 -:1018F000362C300041542B4349504D4F44453D3127 -:101900000000000041542B43495053454E44000011 -:10191000360000206C01002070B54FF4E130FFF775 -:1019200041FA4FF47A742046FFF782FB2046FFF716 -:101930007FFB4FF4487509E0FFF736FFC8221DA171 -:101940001DA000F05DF82846FFF772FBC82219A120 -:101950001DA000F055F80028EED1C82215A11BA04B -:1019600000F04EF80028F8D1C82212A119A000F00A -:1019700047F80028F8D10A20FFF75AFBC8220DA12A -:101980001AA000F03DF80028F8D1C82209A11AA039 -:1019900000F036F80028F8D12046FFF749FB204632 -:1019A000FFF746FB2046FFF743FB2046FFF740FBCF -:1019B000012070BD4F4B000041542B4349504D4F07 -:1019C00044453D3000000000415400004154453082 -:1019D0000000000041542B554152543D3131353205 -:1019E00030302C382C312C302C30000041542B431B -:1019F000574D4F44453D310041542B525354000044 -:101A00002DE9F04180460F461446134D00262E80E6 -:101A100064211248FEF7C7FB414611A0FFF7F8FB0F -:101A2000C7B18CB916E00A20FFF702FB2888000432 -:101A30000AD53846FFF70CFD18B12E800020BDE80E -:101A4000F0812E800120FAE7641E2404240CEAD1E0 -:101A50000120F4E70120F2E7360000206C010020AD -:101A600025730D0A000000000FB4F0B5B3B0C82113 -:101A700001A8FEF798FB002439AA01A8389902F0C2 -:101A80002FF90020009001A8FEF7AAFB86B20E4FA6 -:101A900001AD0BE04021384602F064F80028F9D08F -:101AA000295D384602F002F9641CA4B2B442F1D3B5 -:101AB0004021384602F056F80028F9D033B0002013 -:101AC000F0BC5DF814FB00000044004070B5064611 -:101AD0000D460B4C0FE00C4C0A4861882A46014425 -:101AE0003046FEF747FB608828446080284670BD7A -:101AF0000A20FFF79DFA23881B04F9D5EBE70000C5 -:101B0000360000206C0100203C00002010B54FF48E -:101B10000044204600F014F8002808D0204600F0C9 -:101B200009F80348007D002801D1FFF7F9F810BD3E -:101B3000340200200149086070470000140401408D -:101B400001460020054A12680A40044B14331B6802 -:101B50000B4202D0002A00D001207047000401404F -:101B600030B51B4A83790168002B2AD013688B4358 -:101B70001360111D0B680468A3430B6001791144C5 -:101B80000B68046823430B60114C08342168036818 -:101B900099432160231D19680568A943196041799B -:101BA000102905D011440A68006802430A6030BD5C -:101BB00021680268114321601968006801431960B7 -:101BC00030BD0079104402688A43026030BD0000D5 -:101BD0000004014010B58A07120F0F23934021F033 -:101BE0000304054921448C689C438C608B689040B9 -:101BF00003438B6010BD0000000001402DE9F0415F -:101C00000022CC7804F00F03E40601D58C7823433E -:101C10000C784FF00F0714F0FF0F4FF0010C1CD0A1 -:101C200005680CFA02F40E882640A64211D19600EF -:101C300007FA06F825EA080503FA06F848EA050552 -:101C4000CE78282E02D0482E02D002E0446100E077 -:101C50000461521C082AE4D305600A88FF2A1ED9B1 -:101C60004568002202F108060CFA06F40E882640A8 -:101C7000A64210D1960007FA06F825EA080503FAED -:101C800006F848EA0505CE78282E00D14461CE78C2 -:101C9000482E00D10461521C082AE3D34560BDE8F8 -:101CA000F0810246002092680A4200D0012070476D -:101CB0004161704701617047FEE77FB505460E46FA -:101CC0000020039002920024009002A803F046FE38 -:101CD0008DF80C000398C0F3031002281AD101A953 -:101CE000029800F079F8029904464218029201988D -:101CF0001044801A02280DDB02A803F02FFE8DF895 -:101D00000000009800F00100287002A803F026FEF1 -:101D10003070012404B0204670BD2DE9FE4F82468C -:101D20000C980E4614461F464FF00009CDF8089057 -:101D30000190C84601A803F011FE8DF80800029832 -:101D4000C0F30310092827D16946019800F044F830 -:101D5000019980460844019000994518281A0228E4 -:101D60001ADB01A803F000FEAAF80000C4F80090F6 -:101D70000DE02068B04202DD4FF0FF380CE001A812 -:101D800003F0ECFD2268511C216047F82200019805 -:101D9000A842EED34FF001084046BDE8FE8FF8B5EB -:101DA00007460E4601240025002030606D1C042DDE -:101DB0000FDC01216846B84701280AD19DF80020B0 -:101DC000306802F07F0101FB04003060E40110067E -:101DD000ECD42846F8BD0000024A10600248FFF724 -:101DE000DEBF0000BC0000200147000810B504461B -:101DF0000020CA1701EB526323F07F02891ACAB28E -:101E0000D911002901DD42F08002034600F10100F2 -:101E1000E254EEDC10BD0000401C802801DA401CBA -:101E20007047B0F5804F01DA801C70470349884243 -:101E300001DAC01C7047001D70470000FFFF1F0043 -:101E40002DE9FC4104460F4615464FF0FF360020B1 -:101E50000190009001212046A847012818D1694629 -:101E60002846FFF79CFF601C0099FFF7BFFF401C4E -:101E700000990A18BA420BDC21B12044A847009906 -:101E8000884205D120788DF804000198C0F303162C -:101E90003046BDE8FC8100002DE9FE4305460F46B3 -:101EA00014460295002601960096204600F092F80E -:101EB0008046FFF7B1FFB84202DDB01EBDE8FE83E9 -:101EC0008DF80460019820F0F000103001909DF82A -:101ED000041002A803F095FD41460298FFF786FF23 -:101EE000029908440290207A042813D035A102A850 -:101EF00003F073FD032102A803F083FD8DF8006059 -:101F0000A17E009861F341000090E17E59B140F05C -:101F100004000AE02DA102A803F05FFD042102A83D -:101F200003F06FFDEAE720F004000090410708D5B8 -:101F300094F83D1061F3C40094F83C1061F345102F -:101F40000090206C08B9A06C18B1009840F0800097 -:101F50000090E06C08B9606D18B1009840F0400046 -:101F600000909DF8001002A803F04BFD218B02A801 -:101F700003F04DFDD4E9042302A8E16803F056FD07 -:101F8000E07E58B1D4E90A2302A8616A03F04EFD4D -:101F9000D4E90D2302A8216B03F048FD009E300612 -:101FA00005D5D4E9112302A8216C03F03FFD70068A -:101FB00004D54C3402A80ECC03F038FD0298401B27 -:101FC0007CE700004D514973647000004D5154543A -:101FD0000000000070B504460025207A032802D0D6 -:101FE000042802D002E00C2500E00A25D4E90412FE -:101FF000E06800F053F90544AD1CE07E68B1D4E917 -:102000000A12606A00F04AF9D4E90D120646206B04 -:1020100000F044F9304405442D1D206C08B9A16C32 -:1020200029B1D4E9111200F039F90544AD1CE06C76 -:1020300008B9616D29B1D4E9141200F02FF90544F3 -:10204000AD1C284670BD0C2200F0B2B82DE9FE4F41 -:102050000546DDE90C9A129E0F4690461C460295F5 -:10206000002001900EA900960EC9204600F032F81B -:102070008346FFF7D1FEB84203DD6FF00100BDE8F3 -:10208000FE8F302068F3C30064F3420069F3000060 -:1020900001909DF8041002A803F0B3FC5946029881 -:1020A000FFF7A4FE0299084402900EA902A80EC9E7 -:1020B00003F0BCFC002C03DD514602A803F0A7FC92 -:1020C000324611990298FEF755F802983044029072 -:1020D000401BD4E77FB50546089C01A807C800F05F -:1020E000DDF82044801C002D00DD801C04B070BD94 -:1020F0002DE9FF4F83B00646DDE91189109F8A461E -:10210000934602960025019500244146384600F08A -:1021100039F80090FFF780FE504503DDA01E07B0A0 -:10212000BDE8F08F8DF80450019820F0F000803069 -:102130006BF3C30020F00600801C01909DF8041092 -:1021400002A803F05EFC00990298FFF74FFE029987 -:102150000844029002A8069903F059FC0DE004EB34 -:10216000440008EB800502A80ECD03F05FFC19F8CF -:10217000241002A803F045FC641CBC42EFDB02986B -:10218000801BCCE72DE9F04106460F4602250024CE -:1021900009E004EB440007EB800307CB00F07EF876 -:1021A0000544ED1C641CB442F3DB2846BDE8F08115 -:1021B0001CB50446002001900094022901DA801E1B -:1021C0001CBD8DF80400019862F3071001909DF882 -:1021D0000410684603F015FC00210098FFF706FE86 -:1021E000009901440091081B1CBDF0B5EFB00446F6 -:1021F0000F4615464FF4C87631460BA8FDF7D3FFBE -:1022000000230894CDE905750898CDE902030493ED -:1022100000930BA81A4631460193FFF717FF0BA84E -:10222000FFF722FC6FB0F0BD70B5BCB00646C82108 -:102230000AA8FDF7B8FFC82500240994079408945C -:10224000069606A90123CDE9003109A802900022D3 -:1022500029460AA8FFF74CFF0E4804800AA8FFF79A -:1022600003FC0D4A29460AA8FFF7EAFD092802D017 -:1022700000203CB070BD0AA8CDE9000503AB04AA5C -:10228000012105A8FFF749FD039808B10020F0E7F8 -:102290000120EEE736000020CD1A000817B40098A0 -:1022A000002803D000981EBCFDF79ABF01981EBC01 -:1022B0007047FEE77047000070B50F23C278012613 -:1022C0000178002A1ED0144A126802F4E062C2F5B6 -:1022D000E062120AC2F10404D3404578A540827836 -:1022E0001A402A43120101F1E02181F8002400780C -:1022F00000F01F018E404009800000F1E020C0F88E -:10230000006170BD01F01F0086404809800000F1A7 -:10231000E020C0F8806170BD0CED00E00249084388 -:1023200002490860704700000000FA050CED00E06B -:1023300010B50021002400220378422B10D14378ED -:102340004D2B0DD1435C1A4492B2491CC9B21E29CF -:10235000F8D3C17F807F01EB0020904200D1FF24A1 -:10236000204610BD2DE9F0475E4C5F4D4FF0000652 -:102370002088000419D55D48FFF7DAFFFF280FD148 -:102380005A484179027901EB0221A984C179827905 -:1023900001EB0221E984417A007A01EB00202885D3 -:1023A000268064215148FDF7FEFE288AB0F5FA6FB9 -:1023B00003D3E22000F0AEF82E82E98BA88C6427CC -:1023C000DFF82C810A266FF0130A4FF482798142DC -:1023D00028D0B8F800100AEB9104B0FBF7F0C2B2B5 -:1023E00004F1080080B21032494600F00FFFA88CBB -:1023F000B0FBF6F0B0FBF6F106FB110204F11000A1 -:1024000080B21032494600F001FFA88CB0FBF6F113 -:1024100006FB11021834A0B21032494600F0F6FE55 -:10242000A88CE883298CE88C81422AD0B8F8001067 -:102430000AEB51044FF0500AB0FBF7F0C2B204F1BE -:10244000080080B21032514600F0E0FEE88CB0FB8C -:10245000F6F0B0FBF6F106FB110204F1100080B2B9 -:102460001032514600F0D2FEE88CB0FBF6F106FBCC -:1024700011021834A0B21032514600F0C7FEE88CA9 -:102480002884288D698C88422AD0B8F800108908E1 -:1024900001EB4104103CB0FBF7F0C2B204F10800BC -:1024A00080B21032494600F0B1FE288DB0FBF6F044 -:1024B000B0FBF6F106FB110204F1100080B21032FD -:1024C000494600F0A3FE288DB0FBF6F106FB110291 -:1024D0001834A0B21032494600F098FE288D688466 -:1024E000BDE8F0873800002034020020D001002031 -:1024F0009406002010B54FF41650FEF7A9FC0221F7 -:102500000348FFF7D7FBBDE810401420FEF790BD4D -:10251000000C014030B585B0054600241421684602 -:10252000FDF741FE002142228DF800204D228DF85A -:1025300001208DF8025000208DF803008DF8040072 -:102540006846425C224494B2491CC9B20529F8D3BA -:10255000200A8DF805008DF8064007216846FEF731 -:10256000CFFC05B030BD7047034A516821F44041AB -:10257000014351607047000000100240054A0029E5 -:1025800003D0D1690143D1617047D1698143D161E1 -:102590007047000000100240054A002903D09169ED -:1025A00001439161704791698143916170470000D7 -:1025B00000100240054A002903D0D1680143D160D0 -:1025C0007047D1688143D16070470000001002401D -:1025D00010B5264A516801F00C01254B002927D07F -:1025E000042927D0082927D00360516801F0F001A1 -:1025F0000909204B5C5C0168E1404160546804F4C7 -:10260000E064240A1C5D21FA04F48460546804F434 -:102610006054E40A1B5DD940C160526802F4404234 -:10262000920B144B1B1F9A5CB1FBF2F1016110BDC0 -:102630000360DAE70360D8E7516801F4701153686A -:1026400003F48033022404EB914133B153689B03BC -:1026500007D5094B59430160C7E7074B5943016050 -:10266000C3E7034B59430160BFE70000001002407D -:1026700000127A001800002000093D00704700F0A9 -:1026800001B800000CB500220192009227480168B1 -:1026900041F4803101604FF4A063016801F400311E -:1026A00000910199491C0191009911B90199994230 -:1026B000F3D10168890302D50121009100E0009265 -:1026C0000099012930D11A490A6842F010020A60C3 -:1026D0000A6822F003020A600A6842F002020A60F5 -:1026E0004168416041684160416841F480614160F6 -:1026F000416821F47C114160416841F4E811416076 -:10270000016841F08071016001688901FCD5416870 -:1027100021F003014160416841F0020141604168DC -:10272000C1F381010229FAD10CBD00000010024062 -:10273000002002402DE9F0412D4C2088400861889E -:102740000325B1FBF5F10A3189B22A4E47F6FF7233 -:1027500032805A23642200F0B1FC2088800800EB0C -:10276000400061880627B1FBF7F2B1FBF5F102EBFF -:10277000410189B24FF6E07232802D23322200F0FF -:102780009DFC208880086188B1FBF7F2B1FBF5F170 -:1027900002EB410189B248F21F4232802D233222DE -:1027A00000F08CFC20886FF0170101EB500080B224 -:1027B000282100F004FF20886FF0130505EB50007E -:1027C00080B2B42100F020FF208805EB900080B299 -:1027D000E625294600F0CEFE2088800800EB400068 -:1027E000103880B22946BDE8F04100F0A5BE0000D7 -:1027F00094060020AA0000202DE9F041914FF889AD -:10280000B0F5FA7F7BD3B878022878D30024384615 -:10281000B97A007D012903D110B14FF4FC6403E0C3 -:10282000022801D14FF6FF74787A397A002688425F -:102830007ED0DFF8148250282ED3A8F800400C2454 -:102840002346CD222146CA2000F0DEFB641CE4B200 -:10285000132CF5D30C242346D2222146CF2000F09E -:10286000D3FB641CE4B2132CF5D30C242346D722EB -:102870002146D42000F0C8FB641CE4B2132CF5D32D -:102880000C242346DC222146D92000F0BDFB641C29 -:10289000E4B2132CF5D3CAE03C2831D3A8F8006089 -:1028A0000C252B46CD222946CA2000F0ADFB6D1C1D -:1028B000EDB2132DF5D3A8F800400C242346D22204 -:1028C0002146CF2000F0A0FB641CE4B2132CF5D30A -:1028D0000C242346D7222146D42000F095FB641C0B -:1028E000E4B2132CF5D30C242346DC222146D92054 -:1028F00000F08AFB641CE4B2132CF5D397E09EE051 -:10290000282832D3A8F800600C252B46CD22294672 -:10291000CA2000F079FB6D1CEDB2132DF5D30C2508 -:102920002B46D2222946CF2000F06EFB6D1C00E022 -:1029300084E0EDB2132DF3D3A8F800400C24234615 -:10294000D7222146D42000F05FFB641CE4B2132C94 -:10295000F5D30C242346DC222146D92000F054FB79 -:10296000641CE4B2132CF5D361E0142830D3A8F82A -:1029700000600C252B46CD222946CA2000F044FBDE -:102980006D1CEDB2132DF5D30C252B46D222294612 -:10299000CF2000F039FB6D1CEDB2132DF5D30C25C3 -:1029A0002B46D7222946D42000F02EFB6D1CEDB219 -:1029B000132DF5D3A8F800400C242346DC22214631 -:1029C000D92000F021FB641CE4B2132CF5D32EE0D7 -:1029D00068B3A8F800600C242346CD222146CA2003 -:1029E00000F012FB641CE4B2132CF5D30C24234634 -:1029F000D2222146CF2000F007FB641CE4B2132C46 -:102A0000F5D30C242346D7222146D42000F0FCFA2B -:102A1000641CE4B2132CF5D30C242346DC2221469B -:102A2000D92000F0F1FA641CE4B2132CF5D34FF472 -:102A300080510648FFF73EF9787A3872FE81BDE88A -:102A4000F081000034020020AA000020000C0140A8 -:102A500010B518494FF6FF7008800923DE22194689 -:102A6000C82000F0D1FA1523DE221946C82000F054 -:102A7000CBFAC82215230921104600F0C5FADE2240 -:102A800015230921104600F0BFFA0D23C82219466C -:102A9000C52000F0B9FAC52211230D21104600F01F -:102AA000B3FA1123C822BDE810401946C52000F032 -:102AB000ABBA0000AA00002070B5404D288BB0F5DD -:102AC000FA6F7AD30024A87D3D49002647F6FF72AD -:102AD000012808D0022814D0032821D004282ED0A1 -:102AE00005283BD068E00A802346202221460020AA -:102AF00000F08AFA641CE4B20D2CF5D30220A8750C -:102B00005AE00A800F24234618222146002000F0B4 -:102B10007BFA641CE4B21C2CF5D30320A8754BE0AF -:102B20000A801E24234610222146002000F06CFA61 -:102B3000641CE4B22B2CF5D30420A8753CE00A8079 -:102B40002D24234608222146002000F05DFA641C53 -:102B5000E4B23A2CF5D30520A8752DE00E8023466B -:102B600020222146002000F04FFA641CE4B20D2C14 -:102B7000F5D30F24234618222146002000F044FA02 -:102B8000641CE4B21C2CF5D31E24234610222146DB -:102B9000002000F039FA641CE4B22B2CF5D32D246C -:102BA000234608222146002000F02EFA641CE4B2DD -:102BB0003A2CF5D30120A8752E8370BD3402002075 -:102BC000AA00002010B5112000F044FD1420FEF7EB -:102BD0002FFAD02000F03EFD072000F05DFD4220DE -:102BE00000F05AFD1D2000F057FDD12000F032FD0D -:102BF000002000F051FD1A2000F04EFD092000F0E9 -:102C00004BFDD22000F026FD012000F045FD2220E2 -:102C100000F042FDC02000F01DFD102000F03CFD42 -:102C20003B2000F039FD002000F036FD022000F0CE -:102C300033FD112000F030FDC52000F00BFD032016 -:102C400000F02AFDC82000F005FD002000F024FD62 -:102C5000252000F021FD212000F01EFD052000F0C0 -:102C60001BFD002000F018FD0A2000F015FD652076 -:102C700000F012FD252000F00FFD772000F00CFD84 -:102C8000502000F009FD0F2000F006FD002000F0AC -:102C900003FDF82000F0DEFC012000F0FDFCFE202A -:102CA00000F0D8FC002000F0F7FC022000F0F4FC5B -:102CB000202000F0CFFC362000F0CCFC082000F0F3 -:102CC000EBFC3A2000F0C6FC552000F0E5FC2B2080 -:102CD00000F0C0FC002000F0DFFC002000F0DCFC75 -:102CE000012000F0D9FC3F2000F0D6FC2A2000F0A3 -:102CF000B1FC002000F0D0FC002000F0CDFC012051 -:102D000000F0CAFCDF2000F0C7FC7820FEF790F945 -:102D1000BDE81040292000F09DBC10B5CF2000F088 -:102D200099FC002000F0B8FCC12000F0B5FC302078 -:102D300000F0B2FCED2000F08DFC642000F0ACFC53 -:102D4000032000F0A9FC122000F0A6FC812000F076 -:102D5000A3FCE82000F07EFC852000F09DFC102004 -:102D600000F09AFC7A2000F097FCCB2000F072FC77 -:102D7000392000F091FC2C2000F08EFC002000F0A7 -:102D80008BFC342000F088FC022000F085FCF7204A -:102D900000F060FC202000F07FFCEA2000F05AFCEC -:102DA000002000F079FC002000F076FCC02000F04C -:102DB00051FC1B2000F070FCC12000F04BFC0120F6 -:102DC00000F06AFCC52000F045FC302000F064FCF7 -:102DD000302000F061FCC72000F03CFCB72000F080 -:102DE0005BFC362000F036FC482000F055FC3A2011 -:102DF00000F030FC552000F04FFCB12000F02AFC20 -:102E0000002000F049FC1A2000F046FCB62000F03B -:102E100021FC0A2000F040FCA22000F03DFCF22042 -:102E200000F018FC002000F037FC262000F012FC17 -:102E3000012000F031FCE02000F00CFC0F2000F03D -:102E40002BFC2A2000F028FC282000F025FC08207C -:102E500000F022FC0E2000F01FFC082000F01CFCFB -:102E6000542000F019FCA92000F016FC432000F0CB -:102E700013FC0A2000F010FC0F2000F00DFC0020D5 -:102E800000F00AFC002000F007FC002000F004FC29 -:102E9000002000F001FCE12000F0DCFB002000F04D -:102EA000FBFB152000F0F8FB172000F0F5FB0720D6 -:102EB00000F0F2FB112000F0EFFB062000F0ECFB2D -:102EC0002B2000F0E9FB562000F0E6FB3C2000F050 -:102ED000E3FB052000F0E0FB102000F0DDFB0F20FD -:102EE00000F0DAFB3F2000F0D7FB3F2000F0D4FBDE -:102EF0000F2000F0D1FB2B2000F0ACFB002000F0F5 -:102F0000CBFB002000F0C8FB012000F0C5FB3F20F8 -:102F100000F0C2FB2A2000F09DFB002000F0BCFB6B -:102F2000002000F0B9FB002000F0B6FBEF2000F01D -:102F3000B3FB112000F08EFB7820FEF779F8BDE896 -:102F40001040292000F086BB70B5064600240948D1 -:102F5000018845884D430021084600F077FA00F0CB -:102F6000BDFB03E0304600F097FB641CAC42F9D394 -:102F700070BD0000940600202DE9F003214A2C27A3 -:102F80002A252B2691884FF0F00C49F241384FF456 -:102F9000A07446F6040300280CD0994227D00120E3 -:102FA00090711480A2F802C0414516D1D7711572F4 -:102FB00056721CE000209071A2F800C05480414578 -:102FC00001D0994213D1D7711572567299420ED120 -:102FD00014804FF4F070508009E02220A1F50943DD -:102FE000893B09D0D0712120107220205072BDE899 -:102FF000F003002000F07CB9D0714F2010724E20F9 -:103000005072F4E7940600202DE9FE4F4FF0000BBC -:1030100000250026171AA3EB010881468A46681E80 -:10302000002F03DD4FF00101019107E003D14FF0C4 -:103030000001019102E00190C7F10007B8F1000F13 -:1030400003DD4FF00100009007E003D14FF00000D6 -:10305000009002E00090C8F10008474501DD3C46C1 -:1030600000E04446601C029015E01FFA8AF11FFA46 -:1030700089F000F015F83D444644A54202DD2D1BC1 -:1030800001988144A64202DD361B009882440BF170 -:10309000010B1FFA8BFB02988345E6DDBDE8FE8F2E -:1030A00010B500F0D3F900F019FB03484088BDE8E3 -:1030B000104000F0F1BA0000A80000202DE9FC5FEC -:1030C00080468B4617469A4229D302FB02FA5B439D -:1030D0000093ABEB070085B20BEB070001901BE000 -:1030E000A8EB070084B208EB0709A5EB0B060FE07D -:1030F000A4EB0800404306FB0600504506D80099A3 -:10310000884203D929462046FFF7CAFF641CA4B2AF -:10311000A145EDD86D1CADB20198A842E0D8BDE83C -:10312000FC9F0000F8B501211C20FFF735FA4FF491 -:103130007070ADF8000010208DF8030003208DF8AA -:10314000020069462F48FEF759FD2E484FF40071E2 -:103150001030016040210160802101608115016013 -:1031600000F0FAFA3220FDF763FF3220FDF760FF2E -:10317000254C46F6040649F24135A088FF2806D3BF -:10318000A0F57F41FF3902D0B0F5134F29D1D320EC -:1031900000F060FA00F08CF800F08AF800F088F88F -:1031A0000002A08000F084F8A188C0B20843A0808B -:1031B000A84210D0BF2000F04DFA00F079F800F0DE -:1031C00077F800F075F80002A08000F071F8A1888F -:1031D000C0B20843A080A088A84202D0B04200D06C -:1031E000A580A088A84202D1FFF797FD03E0B04276 -:1031F00001D1FFF7E7FC0020FFF7BEFE0020FFF73C -:10320000A3FEF8BD000C0140940600202DE9F84F04 -:1032100007460C464FF00008A1462248DFF888A078 -:1032200000EB0210DFF884B00090009810F80860FE -:103230000025300604D54FF6FF70AAF8020002E020 -:103240000020AAF8020021463846FFF729FF700641 -:10325000060E641CA4B2BBF80000B84205D84FF6B5 -:10326000FF70AAF80200BDE8F88FA4EB090010284F -:103270000BD06D1CEDB2082DDBD308F1010808F06E -:10328000FF08B8F1100FD0D3EDE74C467F1CBFB25A -:10329000BBF80000B842F0D84FF6FF70AAF8020061 -:1032A000E1E70000E65E0008A80000209406002088 -:1032B0002DE9F04100F028FA0C4C4FF480702060AA -:1032C000802020604026201D0660451505600120F5 -:1032D000FDF7C8FE00F008FA07460120FDF7C2FE20 -:1032E000266025603846BDE8F0810000100C0140E2 -:1032F00070B50024544D46F604022946AB798988FE -:10330000012B18D1914216D0082814D2DFE800F022 -:103310000406080A0C0E101206200CE007200AE032 -:10332000042008E0052006E0012004E0002002E07F -:10333000032000E00220A1F51343413B01D091425C -:1033400059D1082812D2DFE800F0110406080A0C4F -:103350000E1080240AE0402408E0C02406E0202467 -:1033600004E0602402E0A02400E0E024362044F0E1 -:103370000804914201D144F0020400F06BF92046A8 -:1033800000F08AF9A00606D528886988884208D204 -:103390002980688005E028886988884201D92980C9 -:1033A0006880287A00F056F9002000F075F90020B6 -:1033B00000F072F92888401EC0F30F2000F06CF96D -:1033C0002878401EC0B200F067F9687A00F042F930 -:1033D000002000F061F9002000F05EF96888401ECE -:1033E000C0F30F2000F058F9A878BDE87040401EE7 -:1033F000C0B200F051B9082812D2DFE800F004068C -:1034000008110A0C0E1030240AE0102408E02024D1 -:1034100006E0382404E0282402E0182400E0082410 -:10342000A1F50940893809D0032044F4805400F004 -:1034300011F92046BDE8704000F02EB9112046F287 -:1034400040010C43F3E700009406002070B50446E9 -:103450000E461A4D2846AA88007AA2F51341413932 -:1034600007D0A2F5D041043903D0A979012913D09E -:1034700016E000F0EFF8200A00F00EF9E0B200F0DC -:103480000BF9687A00F0E6F8300A00F005F9F0B2BE -:10349000BDE8704000F000B92988091B491E8CB2B4 -:1034A00000F0D8F8204600F0F7F8287A00F0D2F8BB -:1034B0003046BDE8704000F0EFB8000094060020F0 -:1034C0002DE9F84F82460C460027A046184902EB2A -:1034D000C20001EB8000DFF85C9000900098C65DB0 -:1034E00000254FF6FF7B300602D5A9F802B002E0B6 -:1034F0000020A9F8020021465046FFF7D1FD7006D2 -:10350000060E641CA4B2A4EB0800182809D06D1C98 -:10351000EDB2082DE7D37F1CFFB2242FDED3BDE828 -:10352000F88F44460AF1010A1FFA8AFAF3E700000D -:10353000D6640008A800002070B504460D4630226D -:1035400029462046FFF762FE04F1080080B22D22D2 -:103550002946FFF75BFE04F1100080B211222946D4 -:10356000FFF754FE1834A0B22946BDE8704010227F -:10357000FFF74CBE70B504460D4630222946204662 -:10358000FFF744FE04F1080080B22D222946FFF720 -:103590003DFE04F1100080B211222946FFF736FEED -:1035A00004F1180080B20E222946FFF72FFE2034C6 -:1035B000A0B22946BDE870401022FFF727BE70B5C3 -:1035C00004460D46002229462046FFF779FF04F104 -:1035D0000C0080B201222946FFF772FF04F11800A7 -:1035E00080B202222946FFF76BFF04F1240080B26B -:1035F00003222946FFF764FF3034A0B22946BDE814 -:1036000070400422FFF75CBF70B504460D4655229A -:1036100029462046FFF7FAFD04F1080080B2472250 -:103620002946FFF7F3FD04F1100080B20F2229466E -:10363000FFF7ECFD04F1180080B24D222946FFF798 -:10364000E5FD2034A0B22946BDE870401322FFF703 -:10365000DDBD00002DE9F041064600F07DF80D4C7F -:103660004FF4807020604020251F2860C70027602D -:103670000120FDF7F7FC304600F096F80120FDF739 -:10368000F1FC802626600120FDF7ECFC2E602F6007 -:10369000BDE8F081140C01402DE9F041064600F030 -:1036A0005BF80D4C4FF48070206040202060C50016 -:1036B000271D3D600120FDF7D5FC304600F074F871 -:1036C0000120FDF7CFFC80263E600120FDF7CAFCFB -:1036D00026602560BDE8F081100C01400148C079EA -:1036E000FFF7B8BF9406002005488068C1B20548BE -:1036F00000684FF47F4202EAC000084480B270477D -:103700000010014008080140F8B5104C207801284D -:103710001AD0FF20ADF8000004268DF803600325C1 -:103720008DF8025069460A48FEF768FA4FF4FF50D8 -:10373000ADF800008DF803608DF802506946054829 -:10374000FEF75CFA01202070F8BD0000A800002000 -:103750000010014000080140F8B5104C2078022804 -:103760001AD0FF20ADF8000010268DF80360032565 -:103770008DF8025069460A48FEF740FA4FF4FF50B0 -:10378000ADF800008DF803608DF8025069460548D9 -:10379000FEF734FA02202070F8BD0000A8000020D7 -:1037A0000010014000080140C1B2084A1161C9433C -:1037B000C9B25161010A4901054A11606FEA10203E -:1037C0000006C00C111D0860704700000010014089 -:1037D000100801404FF0E021042804D0086920F0CF -:1037E000040008617047086940F0040008617047F0 -:1037F0007047000010B50F48016841F001010160F9 -:1038000041680D4A1140416001680C4A1140016055 -:10381000016821F480210160416821F4FE014160CA -:103820004FF41F018160FEF72AFF05494FF0006049 -:10383000086010BD001002400000FFF8FFFFF6FE18 -:1038400008ED00E010B5324C0121204600F079F877 -:1038500000285CD00121204600F064F82D4C2E4B4E -:1038600000212088A8B1020413D41A78C82A01D8EC -:10387000521C1A701A78142A0DD35A88824205D124 -:1038800040F4004020805980197004E0588019707D -:1038900001E019705980214C2088A8B1020413D48A -:1038A0005A78642A01D8521C5A705A78142A0DD3B7 -:1038B0009A88824205D140F4004020809980597056 -:1038C00004E09880597001E05970998014494FF6CE -:1038D000E852088A904201D2401C0882C88990426E -:1038E00001D2401CC8818889904201D2401C888145 -:1038F000088B904201D2401C0883888B904201D2F1 -:10390000401C8883488A904201D2401C488210BDE6 -:1039100000040040360000202C0000203800002069 -:1039200034020020C94301827047002904D0018875 -:1039300041F0010101807047018821F001010180FF -:10394000704702460020138A0B4092890A40002BE0 -:1039500002D0002A00D001207047002A03D08289BB -:103960000A438281704782898A43828170470000BE -:1039700030B502881B4C1C4DA0420DD0A8420BD084 -:10398000B0F1804F08D0194B984205D0184B98429F -:1039900002D0184B984203D122F070034A881A4390 -:1039A000154B984206D0154B984203D022F4407331 -:1039B000CA881A4302808A8882850A880285A042C2 -:1039C0000AD0A84208D00E4A904205D00D4A904233 -:1039D00002D00D4A904201D1097A018601218182EB -:1039E00030BD0000002C01400034014000040040C4 -:1039F00000080040000C004000100040001400408F -:103A000000400140004401400048014070B5164CA0 -:103A100040F225552946204600F0ABF888B12046F3 -:103A200000F040F9C3B211480288110409D41049CA -:103A30008B54521C92B202805A2A02D342F40041A3 -:103A400001800821204600F08DF8012806D120468B -:103A500000F028F90821204600F074F82946204695 -:103A6000BDE8704000F06EB8003801403200002020 -:103A7000CC00002070B5164D40F225563146284640 -:103A800000F077F888B1284600F00CF9C4B211496B -:103A90000B88180409D4581C82B20F480A80C454F9 -:103AA0005A2A02D342F4004008800821284600F038 -:103AB00059F8012806D1284600F0F4F808212846D4 -:103AC00000F040F831462846BDE8704000F03AB8B2 -:103AD00000440040360000206C01002070B5164CF8 -:103AE00040F225552946204600F043F888B120468B -:103AF00000F0D8F8C3B211480288110409D4104963 -:103B00008B54521C92B202803B2A02D342F40041F1 -:103B100001800821204600F025F8012806D1204622 -:103B200000F0C0F80821204600F00CF82946204695 -:103B3000BDE8704000F006B80048004034000020A6 -:103B4000300100208A05C94301807047002904D054 -:103B5000818941F4005181817047818921F40051AC -:103B6000818170470246002012880A4200D001205D -:103B7000704770B5002440F66A12C1F3421301F099 -:103B80001F05012606FA05F2012B0CD0022B0DD0E1 -:103B9000838A1340090A8E40008830400BB100B17F -:103BA0000124204670BD83891340F3E7038A134044 -:103BB000F0E710B540F66A13C1F3421301F01F0499 -:103BC0000121A140012B07D0022B07D014303AB1BC -:103BD00002680A43026010BD0C30F8E71030F6E7C7 -:103BE00002688A43026010BD30B585B004460D46B8 -:103BF000208A4CF6FF710840E98801432182A089A0 -:103C00004EF6F3110840A9882A8911436A890243B4 -:103C10001143A181A08A4FF6FF410840A9890143C1 -:103C2000A1826846FEF7D4FC1D48844201D1039866 -:103C300000E00298A189090408D500EBC00101EB5E -:103C4000001029684900B0FBF1F007E000EBC0016B -:103C500001EB001029688900B0FBF1F06422B0FB91 -:103C6000F2F109010B096FF018056B4300EB8300BB -:103C7000A3891D044FF0320307D503EBC000B0FB4E -:103C8000F2F000F00700084306E003EB0010B0FB81 -:103C9000F2F000F00F000843208105B030BD0000B5 -:103CA000003801408088C0F308007047C1F3080164 -:103CB00081807047FEE700000FB4084B10B504A9DF -:103CC00002AA039800F080F9044602A9002000F03F -:103CD00012FD204610BC5DF814FB0000F7460008FA -:103CE00037B514460846064B6A46214600F06CF983 -:103CF00004466946002000F0FEFC20463EBD000060 -:103D0000F7460008490050EAC12018BF04204A0DB8 -:103D100018BF40F0010040F2FF72B2EB515F08BFE4 -:103D200040F00200012808BF052070472DE9F0414E -:103D30004F1E00EBC7010446D1E9000115461E469F -:103D400037F006020DD02A463346FCF706FB7F1EED -:103D500004EBC703D3E90023FCF758FA37F0060257 -:103D6000F1D1022F25D0042F13D0062F18BFBDE8A4 -:103D7000F0812A463346FCF7F0FAD4E90A23FCF72F -:103D800045FA2A463346FCF7E8FAD4E90823FCF75B -:103D90003DFA2A463346FCF7E0FAD4E90623FCF75D -:103DA00035FA2A463346FCF7D8FAD4E90423FCF75F -:103DB0002DFA2A463346FCF7D0FAD4E90223FCF761 -:103DC00025FA2A463346FCF7C8FAD4E90023BDE8B1 -:103DD000F041FCF71BBA00000022134610460149CF -:103DE000FCF7E6BC0000F03FFCF710BA00221346D7 -:103DF00010461146FCF7DCBC40F2013200204FF0C7 -:103E0000E041FCF71CBB0000024A00201107FCF750 -:103E100016BB000001FDFFFF02E008C8121F08C129 -:103E2000002AFAD170477047002001E001C1121F3B -:103E3000002AFBD17047000001490860704700006C -:103E4000C80000202DE9FF5F82B00021DDE90430C9 -:103E5000020DDDF840B0034318D044F61050A2F232 -:103E6000FF3242431514119801281FD0A5EB0B0017 -:103E7000401C5FEA000A4FF000064E4FDFF8389111 -:103E8000B046504615D5CAF1000413E0119801243C -:103E90004AA3012801D16FEA0B010298119AC0E9E7 -:103EA0000031C0E9024206B0BDE8F09FCBF100004E -:103EB000DFE704460021404A491842EB0450CDE9AF -:103EC000001012E0E00707D032463B464046494624 -:103ED000FCF743FA8046894632463B46104619466F -:103EE000FCF73BFA06460F466410002CEAD1DDE9E8 -:103EF0000401DDE90023BAF1000F06DAFCF72DFA20 -:103F000042464B46FCF729FA05E0FCF751FC4246D5 -:103F10004B46FCF74DFC04460E460022284BFCF7AE -:103F200007FB03D84FF0FF30014607E00022254B86 -:103F300020463146FCF76AF9FCF7A9FC102409E099 -:103F4000002C0ADB0A220023FCF73CFB039B3032E7 -:103F50001A55641E50EA0102F2D1641C039AC4F19E -:103F600011031444119A012A03D0012208430DD1F0 -:103F70000AE0084304D000204FF0110B119072E7C3 -:103F8000A3EB0B056D1E0DE05B4504DD4FF0000259 -:103F900005F1010504E003DA4FF00002A5F1010587 -:103FA000002AECD002981199C0E90231C0E900451D -:103FB00079E70000000014400000F03F30000000EE -:103FC0000000F0430000E03F2DE9FF4F95B09B4615 -:103FD0008946064600250FE2252877D1002427468A -:103FE000F84A0121059400E0044316F8013F203B04 -:103FF00001FA03F01042F7D130782A2811D06FF07F -:104000002F033078A0F13002092A16D8059A44F01F -:10401000020402EB820203EB42021044761C05907C -:10402000EFE759F8042B0592002A03DA504244F4D2 -:104030000054059044F00204761C30782E2816D1E6 -:1040400016F8010F44F004042A280DD06FF02F0257 -:104050003078A0F13003092B09D807EB870302EB76 -:104060004303C718761CF3E759F8047B761C3078B5 -:104070006C280FD006DC4C2817D068280DD06A2891 -:1040800014D104E0742810D07A280FD10DE044F444 -:1040900000140AE044F4801401E044F440147278FF -:1040A000824202D104F58014761C761C3078662892 -:1040B0000BD013DC582877D009DC002875D04528B0 -:1040C000F6D04628F4D047281AD19DE118E063289D -:1040D00035D0642879D0652812D195E1702873D045 -:1040E00008DC6728F1D069286FD06E280DD06F28C2 -:1040F00006D1B5E073282CD0752875D0782874D0F7 -:104100005A46179990476D1C75E1C4F30250022876 -:1041100009D003280DD0D9F8001004280DD00D6067 -:1041200009F1040967E1D9F80010EA17C1E9005262 -:10413000F6E7D9F800100D80F2E70D70F0E719F8F6 -:10414000041B8DF8001000208DF80100EA460120C4 -:1041500003E059F804AB4FF0FF3061074FF0000166 -:1041600002D40DE008F101018846B9420FDA80451A -:10417000F8DB1AF808100029F4D108E008F1010171 -:1041800088468142FADB1AF808100029F6D1059812 -:104190005B46A0EB080721463846179A00F094FAD0 -:1041A000284400EB080507E04DE029E10DE01AF88E -:1041B000010B5A4617999047B8F10108F7D25B46B0 -:1041C00021463846179A13E142E00A220092C4F3CE -:1041D00002524FF0000A022A08D059F804CB032AF1 -:1041E0004FEAEC710AD00DE029E02AE009F107015D -:1041F00021F00702F2E802C1914609E00FFA8CFCB7 -:104200004FEAEC71042A03D14FFA8CFC4FEAEC71AF -:10421000002907DA0A460021DCF1000C61EB0201FB -:104220002D2202E0220504D52B228DF80420012244 -:1042300003E0E20701D02022F7E7904659E00A2187 -:1042400002E010220DE010214FF0000A00910BE077 -:1042500010224FF0000A44F004040827009203E003 -:1042600008224FF0000A0092C4F30252022A05D03D -:1042700059F804CB0021032A08D009E009F107010D -:1042800021F00702F2E802C1914605E01FFA8CFC1A -:10429000042A01D10CF0FF0C4FF00008220728D5AA -:1042A000702806D0009B83F0100353EA0A0305D060 -:1042B0000EE040228DF80420012208E05CEA0102B1 -:1042C00006D030228DF804208DF805000222904699 -:1042D000009B83F0080353EA0A030AD15CEA010257 -:1042E00001D1620705D530228DF804204FF0010876 -:1042F0007F1E582804D034A003900EA802900DE031 -:1043000036A0F9E753466046009AFCF75BF984460D -:104310000398825C0298401E029002705CEA0100E1 -:10432000F0D1029806A9081A00F1200A600702D508 -:1043300024F4803400E00127574502DDA7EB0A0092 -:1043400000E0002000EB0A01009005984144401A6B -:104350000590E00306D45B462146179A059800F0C5 -:10436000B3F90544002706E001A85A46C05D179935 -:1043700090476D1C7F1C4745F6DBE0030CD55B4680 -:104380002146179A059800F09FF9054404E0302073 -:104390005A46179990476D1C0099481E00900029B5 -:1043A000F5DC08E0029802995A460078491C02910F -:1043B000179990476D1CBAF10001AAF1010AF1DCCE -:1043C00065E10000092801003031323334353637D9 -:1043D0003839616263646566000000003031323351 -:1043E00034353637383941424344454600000000F1 -:1043F00000F058F90544761C307800287FF4ECADC5 -:1044000019B02846BDE8F08F620700D4062709F1ED -:10441000070222F0070CFCE80223E14603F0004803 -:104420005FEA080C02D00FF2702C0DE05FEA045C2A -:1044300002D50FF2682C07E05FEAC47C02D00FF2CD -:10444000602C01E0AFF2700C4FF0FF3823F0004316 -:10445000CDF850C065280CD006DC452809D0462888 -:104460001DD047283DD13DE0662818D067287ED171 -:1044700038E00021112F01DB112000E0781CCDE98C -:10448000000106A90EA8FFF7DDFCDDE90F010E9A79 -:1044900003910021009207F1010A04914DE04FF0D1 -:1044A00000400097CDE9011006A90EA8FFF7CAFC4D -:1044B000DDE90F0203920E9B11990022DDF80CA09A -:1044C0000093049211B9791C00EB010AB7EB0A00C2 -:1044D00004D4C0F1FF3007F1010A0490AAEB0700F1 -:1044E000019044E0012F00DA01270021112F01DDA6 -:1044F000112000E03846CDE9000106A90EA8FFF71B -:10450000A1FCDDE90F010E9A0391002104910092B4 -:10451000BA4621070CD40399514500DA8A46BAF10C -:10452000010F05DD009AAAF10101515C302908D084 -:10453000B84202DA10F1040F06DA0121CDE90110C8 -:1045400015E0AAF10101E9E7002805DC049901441E -:104550000491AAEB000102E0411C514500DD8A46AE -:104560000499401A401C01904FF00040029020072F -:1045700004D40198504501DBCDF8048000208DF86B -:104580004F0002980DF14F07B0F1004F25D02B20BE -:104590000E9002984FF0020800280CDA4042029078 -:1045A0002D200E9007E00A210298FBF7F5FF30312D -:1045B000029007F8011DB8F10001A8F10108F2DC32 -:1045C00002980028EFD1791E0E980870307800F01C -:1045D000200040F0450007F8020D12A8C01B00F1B2 -:1045E00007081498007800B1012000EB0A01019837 -:1045F00001EBE07105984144401A401E0590E0032C -:1046000006D45B462146179A059800F05DF80544EC -:104610001498007818B15A46179990476D1CE0031A -:1046200024D55B462146179A059800F04DF80544BD -:104630001CE00498002807DBDDE90301884203DD64 -:104640000098405C179901E0179930205A4690472E -:10465000049805F10105401C04900198401E01904A -:1046600004D12E205A46179990476D1CBAF10001CB -:10467000AAF1010ADDDC05E017F8010B5A4617998B -:1046800090476D1CB8F10001A8F10108F4DC5B460D -:104690002146179A0598ABE62D0000002B0000007C -:1046A000200000002DE9F041044600251E46174673 -:1046B000880404D405E039462020B0476D1C641EF0 -:1046C000F9D52846BDE8F0812DE9F04104460025E2 -:1046D0001E469046C80301D5302700E020278804F5 -:1046E00004D505E041463846B0476D1C641EF9D537 -:1046F0002846BDE8F0810A68531C0B6010707047B3 -:1047000070B5054608460022054C05E0236813F8FD -:10471000016B2E702360521C8242F7DB70BD0000DB -:10472000BC00002070B504460F4E19E02568A08932 -:10473000C00503D4A06808B1FFF7F4FFA089C00545 -:1047400003D4206908B171688847A089800503D423 -:10475000206A08B1716888477168204688472C46EE -:10476000002CE3D170BD0000B000002070B50D46F4 -:10477000846800E024682CB12946206A00F04AF8D9 -:104780000028F7D1204670BD10B5064928200968D9 -:10479000884704461CB128212046FBF704FD20462B -:1047A00010BD0000B000002000221146AFF30080D1 -:1047B0002DE9F04104460D469046FFF7E5FF064619 -:1047C000134F0020B860C6B1204601F0D6F801466C -:1047D000304600F079FB04468CB1B8F1000F13D0DD -:1047E000204601F0CAF80446207868B13046FFF749 -:1047F00099FFBC600020BDE8F0810020FBE7304657 -:10480000FFF790FF0020F6E705B12C603046F2E795 -:10481000B000002070B504460D46002C01D02DB12B -:104820000AE00DB1012070BD002070BD012070BDF7 -:10483000207898B1641C6D1C2078FBF795FC064627 -:104840002878FBF791FC8642F2D02078FBF78CFCAD -:1048500004462878FBF788FC201A70BD002070BD44 -:1048600010B5002821D0114B0022001F196803E069 -:10487000814203D80A4649680029F9D152B1136828 -:10488000841A9C4204D1006818441060104602E06B -:10489000506000E0186039B102680B1A934203D1EE -:1048A0000B681A4402604968416010BDC0000020D6 -:1048B000FCF7B6F9FCF746FAFCF7D0F9C820FCF78C -:1048C000B7FBFCF765F94FF4FA70FCF7B1FBFEF7A4 -:1048D00029FC0F4C40F6B8302082E081A081208373 -:1048E000C820E08320846084FCF74CFEFCF7C2FD06 -:1048F000FCF726FBFCF7D0FBFCF72CFC207D022804 -:1049000003D1FEF7D9F8FDF72DFDFDF775FFEBE7B5 -:1049100034020020F0B50B30154D20F007010024C3 -:10492000144A0FE003688B420BD38B4205D95E1A01 -:1049300043184768C3E9006700E04368136002C09A -:1049400004E0021D10680028ECD12046002802D1A6 -:10495000286808B10020F0BD064A07481060074AE1 -:10496000121A22F00702C0E9002401202860D7E7CC -:10497000C4000020C0000020A4060020A0080020E1 -:104980002DE9F04107460878234E5B2803D0B1603B -:104990000020BDE8F0810520F860481C00F0EDFF24 -:1049A000044620785D2811D0FFF7EEFE0546B8607A -:1049B00070B1204600F0E1FF0146284600F084FA7D -:1049C00000F0DBFF0446200004D016E0601CE0E7A6 -:1049D0000020DEE70020DCE7FFF7D6FEB0B128605C -:1049E00045600546601C00F0C8FF0146284600F0FF -:1049F0006BFA00F0C2FF044654B120782C28EBD0AB -:104A000020785D2806D0B4600020C2E70020C0E70F -:104A10000020BEE7601CBCE7B00000200178A1F1D7 -:104A20003002092A01D811460AE0A1F14102052A03 -:104A300001D8373904E0A1F16102052A0AD85739B3 -:104A40000A01401C0178A1F13003092B04D8303A47 -:104A500011440EE000207047A1F14103052B02D85C -:104A6000373A114405E0A1F16103052B0BD8573A01 -:104A700011440A01401C0178A1F13003092B04D82C -:104A8000303A11440EE000207047A1F14103052B9C -:104A900002D8373A114405E0A1F16103052B0AD889 -:104AA000573A114409014078A0F13002092A04D88C -:104AB00030390844704700207047A0F14102052AB0 -:104AC00002D8373908447047A0F16102052A02D89C -:104AD0005739084470470020704700002DE9F34F14 -:104AE00085B08A460024254659490020CDE90201B7 -:104AF000002637468346012001909AF800002D28B1 -:104B000005D154490020CDE902010AF1010A9AF8C1 -:104B10000000302801D10AF1010A9AF8000031386A -:104B2000082817D89AF800003038FBF7A4FC804614 -:104B300089460022484B20462946FBF70EFC424698 -:104B40004B46FBF763FB04460D461AF8010F30385D -:104B50000928E7D99AF800002E2827D19AF80100F1 -:104B6000302823D3392821D80AF1010A9AF8000005 -:104B70003038FBF780FC804689460022364B2046C1 -:104B80002946FBF7EAFB42464B46FBF73FFB044650 -:104B90000D4600222E4B30463946FBF7D8FB064621 -:104BA0000F461AF8010F30380928DFD99AF80000AB -:104BB000652801D045281DD11AF8010F2B2802D0F5 -:104BC0002D2803D010E00AF1010A0DE04FF0FF306C -:104BD00001900AF1010A07E00BEB8B0100EB410B9E -:104BE0000AF1010AABF1300B9AF80000A0F1300194 -:104BF0000929F1D901980BFB00F0FBF73CFC324688 -:104C00003B46FBF703FB02460B460020124900F02F -:104C1000B9F906460F46DDE9020122462B46FBF7AD -:104C20009CFB32463B46FBF798FB04460D46059835 -:104C3000C0E9064520462946FBF72EFC0599486148 -:104C400005980321C16007B05046BDE8F08F000011 -:104C50000000F03F0000F0BF000024402DE9F041CB -:104C600007460878384E7B2803D0B1600020BDE8A5 -:104C7000F0810620F860481C00F07FFE0546287889 -:104C80007D2818D0FFF780FD0446B860A8B12846FB -:104C900000F073FE0146204600F058F800F06DFE6B -:104CA00068B1216921620027276101783A2908D07B -:104CB000B0600020DBE7681CD9E70020D7E70020C0 -:104CC000D5E7401C00F059FE0146204600F0FCF8F4 -:104CD00000F053FE0546280028D1C8E7FFF754FD31 -:104CE000A8B1206044600446681C00F046FE0146FE -:104CF000204600F02BF800F040FE50B121692162FF -:104D0000276101783A2906D0B0600020AFE7002083 -:104D1000ADE70020ABE7401C00F02FFE0146204627 -:104D200000F0D2F800F029FE054645B128782C287D -:104D3000D4D028787D2804D0B560002097E70020E3 -:104D400095E7681C93E70000B00000202DE9F047CC -:104D500080460D466C1C00202A785949222A06D02C -:104D60008D60BDE8F087641C5C2A00D1641C227849 -:104D7000222A02D00AB1401CF5D10968401C88479C -:104D80000746380004D0681C3C464FF480691AE09E -:104D90000020E6E75C2903D004F8011B401C12E068 -:104DA000461C3078722825D006DC622816D066288A -:104DB00018D06E2804D119E074281FD0752821D08E -:104DC00004F8010B701C0178222901D00029E1D1DF -:104DD00000212170017822296AD06AE0082004F8B5 -:104DE000010BEFE70C2004F8010BEBE70A2004F8B5 -:104DF000010BE7E70D2004F8010BE3E7092004F8B5 -:104E0000010BDFE7701CFFF709FE0546361DA5F50F -:104E10005C404845D6D3002DD4D0A5F55840484530 -:104E200013D270785C28CDD1B0787528CAD1F01C27 -:104E3000FFF7F4FDB61DA0F55C414945C2D2C5F3AC -:104E4000090161F39F2000F580350421802D01D2F6 -:104E5000012108E0B5F5006F01D2022103E0B5F5AC -:104E6000803F00D20321601801291AD0022911D0F5 -:104E7000032908D0042919D105F0BF0242F08002AD -:104E800000F8012DAD0905F0BF0242F0800200F8E4 -:104E9000012DAD0905F0BF0242F0800200F8012D9E -:104EA000AD09084A525C2A4300F8012D441889E7ED -:104EB000401CC8F810700421C8F80C1051E700001D -:104EC000B00000200E69000870B505460C46002CA5 -:104ED00020D0042224A12046FBF789F9E0B1052265 -:104EE00023A12046FBF783F9D0B1042222A120465A -:104EF000FBF77DF9C0B1207822281AD02D2803D0E5 -:104F0000A0F1300109291AD821462846BDE8704091 -:104F1000FFF7E4BD002070BD0220E860201D70BDD9 -:104F20000020E860601D70BD0120E8606861201D00 -:104F300070BD21462846BDE87040FFF707BF5B28DB -:104F400005D07B2809D00E488460002070BD214622 -:104F50002846BDE87040FFF713BD21462846BDE84E -:104F60007040FFF77BBE00006E756C6C00000000A7 -:104F700066616C7365000000747275650000000066 -:104F8000B00000202DE9F04D1D460C4698B01746A4 -:104F900021F0004123F00043002814BF4FF0010C22 -:104FA0004FF0000C0CEB440CFE4A0CEB02064FEAEF -:104FB000620C66452BD33E0018BF012606EB450662 -:104FC0001644F94A964222D3F84A53EA070C02D013 -:104FD000944205D148B918B000201146BDE8F08DC3 -:104FE000002808BF4FF0000C01D04FF0010C0CEB73 -:104FF000440212F5001F0AD8002F14BF4FF0010C15 -:105000004FF0000C0CEB450212F5001F07D918B049 -:105010003A462B462146BDE8F04DFEF7E5BE00229C -:10502000DFF88CA3002CB8BF534526DADFF884C321 -:105030006345A8BF022220DADFF870C39C451CDC60 -:10504000DFF874C30CEB235CBCF1140F08DDCCF16A -:10505000340627FA06FC0CFA06F6BE420DD108E02B -:105060005FB9CCF1140623FA06FC0CFA06F69E4250 -:1050700003D10CF00102C2F1020251EA000C19D175 -:10508000002D17DA002C18BF022A01D0012A07D000 -:105090000220FEF7D1FE18B0BDE8F04DFEF79CBE31 -:1050A0000220FEF7C9FEFEF797FE18B081F000411E -:1050B000BDE8F08DB7F1000C6CD1534525D104F15A -:1050C000804212F5801201BF00280020B74918B0B5 -:1050D00008BFBDE8F08DB548884207DC002DA1BFB0 -:1050E0006046294618B0BDE8F08D07E0281E05DAB5 -:1050F00080F0004118B06046BDE8F08DAF497944BA -:10510000D1E9000118B0BDE8F08DDFF8A0C2634519 -:1051100025D1002D1FDA19B1514512D1D8B909E0B6 -:10512000002840F0EC82A24A214618B062F31E012A -:10513000BDE8F08D0020214618B060F31E01BDE8E7 -:10514000F08D08DA18B02346BDE8F04D0246002085 -:105150006146FBF72DBB18B02146BDE8F08D5145E7 -:1051600018DAB5F1804F0DD0A5F1005CBCF1FF5C01 -:1051700010D1B4F1000C0DDB18B06146BDE8F04D64 -:1051800000F005BC234618B00246BDE8F04D1946B4 -:10519000FBF7E3B8060024F0004C3BD1D9B15145F0 -:1051A00033D1002C06DD002DA1BF0020514618B0E0 -:1051B000BDE8F08D002C01DD002D1BDB002C13DA87 -:1051C000002D11DB012A4FF0000014BF78497C4903 -:1051D00018B0BDE8F08D022A18BF002C0AD0012AB1 -:1051E00008D1002C06DA0AE0002CB8BF002D11DA35 -:1051F000012A04D0002018B00146BDE8F08D18B097 -:1052000000204FF00041BDE8F08DA1F14050B0F119 -:105210007F601AD0012000EBE47050EA020421D034 -:10522000624C521E4FF0000B104304BF4FF0000BB6 -:10523000644C654883427CDD644A654893421FDDC7 -:10524000884217DB002D25DB37E0002C00DA4AB15D -:10525000022A0CBF01204FF0FF3018B0BDE8F04D1E -:10526000FBF709B90120FEF7E7FD18B0BDE8F04DE6 -:10527000FEF7BCBD4D4A8A4202DC002D0ADC1CE070 -:10528000814202DA002D18DA04E0484B994220DD11 -:10529000002D12DD0220FEF7CFFDFEF7ADFD054625 -:1052A0000E460022534658462146FBF756F818B0E2 -:1052B00066F31E012846BDE8F08D0220FEF7BCFD16 -:1052C000FEF7A2FD0A46214618B062F31E01BDE8B2 -:1052D000F08D002230466146FBF739F880460E46D5 -:1052E0006FF00102FBF7ABF84FF05532394BFBF78B -:1052F00031F842463346FBF730F80022364BFBF7D5 -:1053000029F8824642463346049110461946FBF777 -:1053100024F85246049BFBF720F88A4600904FF091 -:10532000C0422E4B40463146FBF717F82C4A2B4B18 -:1053300000E027E0CDE9060151460098FBF70DF8A3 -:1053400082460191274A284B40463146FBF705F833 -:105350005246019BFAF7FBFF82460B460246059137 -:10536000DDE90601FAF752FFDDE90623002688464B -:105370003046FAF7ECFF5246059BFAF7EBFF024680 -:1053800000F07EB90020B1F5801F07DA35223046E3 -:105390006146FBF754F806466FF0340000EB2150ED -:1053A00024E00000FFFF1F00FFFF0F000000F03FA0 -:1053B0000000F07F0000404301FCFFFF9E1800004A -:1053C0000000F0FF0000F0BF0000E0410000F043EB -:1053D000FFFFEF3F5555D53F0000E03F4715F73F32 -:1053E000FE822B6544DF5DF80BAE543EA0F2FF3029 -:1053F0000190C1F3130040F07F6141F040510291F0 -:10540000FE498842D8BF002004DDFD498142C8BF63 -:10541000012001DD0D9008E000200D900198401C56 -:1054200001900298A0F5801002900299F548784406 -:105430000B910D9900EBC100D0E900230F9330468A -:105440000A920B99FAF783FFCDE90601DDE90A21FB -:1054500030460F9BFAF7DAFE02460B460020EA4977 -:10546000FBF7A6F9059102460B460090DDE906011F -:10547000FAF773FF1490E5488A464FF00008784425 -:105480000299006812904FF0005040EA61010D98B7 -:105490000F9B01EB804000F5002109910A9A1298B8 -:1054A000FAF755FF32460B9BFAF754FF4246534634 -:1054B000FAF753FF0646029140465146099B129A5D -:1054C000FAF74BFFDDE90623FAF744FF3246029B69 -:1054D000FAF73DFF059B009AFAF73FFF0091149AF7 -:1054E0000490534610461946FAF737FF064602461F -:1054F000C7480B46029106217844FEF717FCCDE918 -:105500000510029B324610461946FAF726FFDDE9E0 -:105510000532FAF722FF05910646534640461946E2 -:10552000149AFAF773FE009B049AFAF716FF3246B4 -:10553000059BFAF76BFECDE905104246534610462F -:105540001946FAF70AFF0022B24B02910A90FAF7C5 -:105550005DFEDDE90532FAF759FE0E464246AD4BD7 -:105560004046FAF7F4FE029B0A9AFAF7F0FEDDE9EC -:105570000532FAF7EFFE424602910A903346104692 -:105580005146FAF7EAFECDE906015346149A02990C -:105590000A98FAF7E2FE8A4602903346424600999C -:1055A0000498FAF7DAFE5346029AFAF72FFE82467B -:1055B0000B4602460591DDE90601FAF727FEDDE913 -:1055C0000623002088460646FAF7C1FE5246059B90 -:1055D000FAF7C0FE824609914FF060428E4B30468A -:1055E0004146FAF7BAFE049006918C4A8A4B50461F -:1055F0000999FAF7B2FE82460291894A894B3046F0 -:105600004146FAF7AAFE5246029BFAF7FFFD864B87 -:105610007B440D9A03EBC203D3E90023FAF7F6FDAE -:105620000E9007910198FAF726FF0591DDE9061320 -:1056300082460E9A0498FAF7E9FD7C4A7A440D9B5B -:1056400002EBC303D3E9002300930292FAF7DEFDD5 -:105650005246059BFAF7DAFD002688465246304648 -:10566000059BFAF774FE009B029AFAF770FE069B00 -:10567000049AFAF76CFE079B0E9AFAF76BFE024645 -:1056800000200B46029038462946FAF766FE82460D -:1056900001912B4638461946029AFAF758FE3246CF -:1056A0004346FAF75AFE5246019BFAF7AFFD07460A -:1056B0008A463246434629460298FAF74EFE054688 -:1056C0000E463A465346FAF7A1FD594A884691429A -:1056D00021DBA8EB020353EA000210D12A4633462D -:1056E000FAF735FECDE90401524A534B384651468C -:1056F000FAF78CFDDDE90423FAF71AFF21D2022024 -:10570000FEF79AFBFEF778FB0A46214618B062F3D3 -:105710001E01BDE8F08D494B28F000429A4210D39B -:10572000474A08EB020353EA00027FF4C6AD2A465B -:105730003346FAF70CFE3A465346FAF7F9FE7FF67F -:10574000BCAD0022019228F000403E493E4A01EBE8 -:105750002051824223DA481C4FF4801121FA00F0D4 -:1057600040443A4AC0F30A517A44394BA1F2FF311E -:10577000CB4020EA0303C0F3130040F48010C1F1D2 -:105780001401C84012680190B8F1000FBCBF40423C -:10579000019028463146FAF7DAFD05460E462A46BC -:1057A000334638465146FAF731FD4FF0000842467D -:1057B000284B40460591FAF7D0FDCDE90601264A6F -:1057C000264B40460599FAF7C8FD009102902A46FB -:1057D000334640460599FAF7BAFD3A465346FAF77A -:1057E000B9FD1F4A1F4BFAF7B8FD009B029AFAF762 -:1057F0000DFD0746884602460B4635E08E980300AD -:105800007AB60B00E61400000000F03F1E15000001 -:105810004C1400000000084009C7EE3FFD033ADCCD -:10582000F5015B14E02F3EBE24130000E8120000D7 -:1058300000009040FE822B654715973C00CC9040BD -:1058400000346F3F01FCFFFF0000E03F3412000016 -:10585000FFFF0F00432EE63F396CA80C615C20BEB1 -:10586000EF39FAFE422EE63FDDE90601FAF7CEFCFB -:10587000DDE9062305460E46FAF769FD3A4643463A -:10588000FAF768FD0F462A4633460090104619463F -:10589000FAF763FD824602462E4888460B460521EC -:1058A0007844FEF743FA52464346FAF756FD2A4635 -:1058B0003346FAF74FFD80468A463B462846314636 -:1058C000009AFAF74AFD3B46009AFAF79FFC0691C8 -:1058D000009000224FF0804340465146FAF737FDD2 -:1058E0000F460C904246534628463146FAF735FD9E -:1058F0003B460C9AFAF75CFF069B009AFAF727FDE5 -:105900002A463346FAF723FD0022134BFAF722FD0D -:10591000054601980E4601EB00510815002810DCE1 -:1059200028463146019AFAF78AFDFEF7EBF904287A -:1059300008BFFEF769FA28463146019AFAF77FFD5B -:1059400005460B4618B02A4658462146BDE8F04D9C -:10595000FAF703BDD41000000000F03F016811F811 -:10596000012B01601046704701684A7811F8023B2C -:1059700002EB032201601046704700E0401C002843 -:1059800004D00178002901D02029F7D970472DE9EA -:10599000F04106460F46FAF7A5FF041E0D4618BF54 -:1059A0000120284320F00040C0F17F6000F1E0407A -:1059B000C00F0ED0301C18BF0120384320F000402B -:1059C000C0F17F6000F1E040C00F04BF0120FEF78E -:1059D00033FA20462946BDE8F08170B504460E46EC -:1059E0003046FAF7FDFB05462946204600F00FF841 -:1059F0002A4631462068FAF7BDFB2068284420601B -:105A000070BD026811700168491C0160704710B5D3 -:105A1000CA17046801EB12631A0A22700268521C4A -:105A2000026011700168491C016010BD1FB5044679 -:105A3000029800280DDD20460299FFF7E8FFDDE916 -:105A400002212068FAF796FB20680299084420603A -:105A50001FBD019830B1019904B02046BDE8104047 -:105A6000FFF7BBBF04B02046BDE810400021FFF7A0 -:105A7000CEBF000000000000000000000000000099 -:105A800000003F4000000000000000003000400027 -:105A900030004000000009000BC03D000BC03D007D -:105AA000090018C024407FE0224031800000180027 -:105AB00024C01B000D803240018003801C40274021 -:105AC0001C80074000401000600000000000000043 -:105AD00000000000000000001F8020404020000067 -:105AE000402020401F8000000000090006001F80A9 -:105AF000060009000000040004003F8004000400C8 -:105B00000000001000600000000000000000040021 -:105B10000400040004000400000000000040000035 -:105B2000000000000000002001C006003800400016 -:105B300000001F802040204020401F800000000007 -:105B400010403FC000400000000018C0214022402B -:105B500024401840000010802040244024401B8036 -:105B6000000002000D0011003FC0014000003C8019 -:105B7000244024402440238000001F8024402440EF -:105B80003440038000003000200027C0380020008F -:105B900000001B802440244024401B8000001C0087 -:105BA00022C0224022401F80000000000000084068 -:105BB0000000000000000000000004600000000081 -:105BC0000000000004000A0011002080404009008D -:105BD0000900090009000900000000004040208081 -:105BE00011000A00040018002000234024001800BF -:105BF00000001F802040274029401F400000004037 -:105C000007C039000F0001C0004020403FC02440C1 -:105C100024401B8000001F80204020402040308016 -:105C2000000020403FC0204020401F800000204056 -:105C30003FC024402E4030C0000020403FC02440E0 -:105C40002E00300000000F001080204022403380E2 -:105C5000020020403FC0040004003FC0204020401C -:105C600020403FC020402040000000602020202035 -:105C70003FC02000200020403FC024400B0030C027 -:105C8000204020403FC020400040004000C03FC0B6 -:105C90003C0003C03C003FC0000020403FC00C401F -:105CA00023003FC020001F802040204020401F8054 -:105CB000000020403FC024402400180000001F8046 -:105CC0002140214020E01FA0000020403FC0244090 -:105CD000260019C0004018C02440244022403180D2 -:105CE0000000300020403FC0204030000000200075 -:105CF0003F80004000403F80200020003E0001C067 -:105D0000070038002000380007C03C0007C03800FA -:105D10000000204039C0060039C0204000002000AB -:105D2000384007C0384020000000304021C02640E5 -:105D3000384020C00000000000007FE040204020EC -:105D40000000000070000C00038000400000000014 -:105D5000402040207FE000000000000020004000C4 -:105D600020000000000000100010001000100010C3 -:105D700000100000000040000000000000000000D3 -:105D800002800540054003C0004020003FC00440A1 -:105D900004400380000000000380044004400640EB -:105DA000000000000380044024403FC00040000089 -:105DB00003800540054003400000000004401FC070 -:105DC000244024402000000002E005500550065009 -:105DD000042020403FC00440040003C000400000F5 -:105DE000044027C000400000000000100010041014 -:105DF00027E00000000020403FC00140070004C031 -:105E00000440204020403FC000400040000007C048 -:105E1000040007C0040003C00000044007C00440A1 -:105E2000040003C0004000000380044004400380DD -:105E30000000041007F0045004400380000000003C -:105E400003800440045007F00010044007C00240E3 -:105E5000040004000000000006400540054004C0A6 -:105E60000000000004001F80044000400000040007 -:105E700007800040044007C000400400070004C041 -:105E8000018006000400060001C0070001C00600F2 -:105E90000000044006C0010006C0044000000410D9 -:105EA000071004E00180060004000000044005C063 -:105EB0000640044000000000000004007BE0402099 -:105EC0000000000000000000FFF0000000000000E3 -:105ED00040207BE004000000000040008000400003 -:105EE0002000200040000000000000000000000032 -:105EF0000000000000000000000000001FCC000CAB -:105F000000000000000000000800300060000800F1 -:105F1000300060000000022003FC1E20022003FC71 -:105F20001E200220000000000E1811043FFF108404 -:105F30000C78000000000F0010840F3800C00778B4 -:105F400018840078000000780F8410C411240E9883 -:105F500000E40084000808006800700000000000F1 -:105F600000000000000000000000000007E018181A -:105F7000200440020000000040022004181807E03E -:105F80000000000000000240024001800FF001808C -:105F90000240024000000080008000800FF8008076 -:105FA0000080008000000001000D000E00000000D5 -:105FB00000000000000000000080008000800080E1 -:105FC0000080008000800000000C000C0000000039 -:105FD00000000000000000000006001800600180C2 -:105FE000060018002000000007F008081004100444 -:105FF000080807F000000000080408041FFC000463 -:1060000000040000000000000E0C101410241044C6 -:1060100011840E0C000000000C181004110411046F -:1060200012880C700000000000E003200424082403 -:106030001FFC0024000000001F98108411041104AC -:10604000108810700000000007F008881104110487 -:1060500018880070000000001C00100010FC1300E5 -:106060001C001000000000000E3811441084108441 -:1060700011440E38000000000700088C1044104442 -:10608000088807F00000000000000000030C030C6B -:1060900000000000000000000000000101060000F8 -:1060A00000000000000000000080014002200410F9 -:1060B0000808100400000220022002200220022012 -:1060C0000220022000000000100408080410022032 -:1060D00001400080000000000E001200100C106C47 -:1060E00010800F00000003E00C1813E4142417C400 -:1060F000082807D000000004003C03C41C400740EF -:1061000000E4001C000410041FFC1104110411041D -:106110000E880070000003E00C1810041004100436 -:1061200010081C10000010041FFC100410041004C0 -:10613000080807F0000010041FFC1104110417C424 -:1061400010040818000010041FFC1104110017C0EF -:1061500010000800000003E00C18100410041044A4 -:106160001C780040000010041FFC10840080008098 -:1061700010841FFC10040000100410041FFC100405 -:1061800010040000000000030001100110011FFEB8 -:1061900010001000000010041FFC110403801464A0 -:1061A000181C1004000010041FFC1004000400045C -:1061B0000004000C000010041FFC1F0000FC1F0066 -:1061C0001FFC1004000010041FFC0C04030000E07E -:1061D00010181FFC100007F0080810041004100429 -:1061E000080807F0000010041FFC108410801080C5 -:1061F00010800F00000007F0081810241024101C55 -:10620000080A07F2000010041FFC1104110011C05D -:1062100011300E0C000400000E1C110410841084B8 -:1062200010441C3800001800100010041FFC10045B -:1062300010001800000010001FF8100400040004F3 -:1062400010041FF8100010001E0011E0001C007068 -:1062500013801C0010001FC0103C00E01F0000E075 -:10626000103C1FC000001004180C163401C001C0FF -:106270001634180C100410001C00130400FC130446 -:106280001C00100000000804101C1064108413048B -:106290001C04101800000000000000007FFE4002F7 -:1062A000400240020000000030000C00038000604B -:1062B000001C0003000000004002400240027FFE7C -:1062C000000000000000000000002000400040002E -:1062D0004000200000000001000100010001000159 -:1062E000000100010001000040004000200000000B -:1062F0000000000000000000009801240144014457 -:10630000014400FC000410001FFC0088010401048B -:106310000088007000000000007000880104010483 -:1063200001040088000000000070008801040104DE -:1063300011081FFC0004000000F80144014401445E -:10634000014400C800000000010401040FFC110416 -:10635000110411001800000000D6012901290129AB -:1063600001C90106000010041FFC008401000100A7 -:10637000010400FC000400000104190419FC0004DD -:1063800000040000000000000003000101011901E9 -:1063900019FE0000000010041FFC0024004001B49E -:1063A000010C010400000000100410041FFC000494 -:1063B000000400000000010401FC0104010001FCD4 -:1063C0000104010000FC010401FC00840100010043 -:1063D000010400FC0004000000F8010401040104B1 -:1063E000010400F80000010101FF0085010401041F -:1063F00000880070000000000070008801040104A3 -:10640000010501FF00010104010401FC00840104F5 -:10641000010001800000000000CC012401240124BF -:1064200001240198000000000100010007F80104A8 -:10643000010400000000010001F800040004000451 -:10644000010801FC0004010001800170000C001033 -:1064500001600180010001F0010C003001C000303A -:10646000010C01F0010000000104018C00740170B6 -:10647000018C01040000010101810171000E00186E -:1064800001600180010000000184010C013401441D -:106490000184010C00000000000000000000010069 -:1064A0003EFC400240020000000000000000FFFF30 -:1064B0000000000000000000400240023EFC01001D -:1064C000000000000000000060008000800040002C -:1064D0004000200020000000000FFFF80FFFF80C24 -:1064E0000C000C0C000C0C00040C00060C00061C2C -:1064F0000003F80001F0000000000000000FFFF8AA -:106500000FFFF80FF00000FF800007F80007F80108 -:10651000FF000FE0000FFFF80FFFF8000000000081 -:10652000000180100780700600F00C01D00C039071 -:106530000C07100E1C1007F81003E01000001000EC -:1065400000000000000000000000380000380000DB -:10655000000000000000000000000000000000003B -:106560000000000000000000800038E007F870071D -:10657000B010042018042018043018043030043CF3 -:10658000F0041FE000030000000000000000000015 -:1065900003FC0000003FFFC000007FFFF00000FC94 -:1065A00001F80001E000780003C0001C0003800037 -:1065B0001C000300000E000300000E000380001CFE -:1065C0000003C0003C0001F000780000FFFFF00075 -:1065D000007FFFE000000FFF00000000000000004F -:1065E00000000000000000000000000000000000AB -:1065F000000000001C00000000180000000038002F -:106600000000007000000000E000000001FFFFFC3F -:106610000003FFFFFC0003FFFFFC00000000000080 -:10662000000000000000000000000000000000006A -:10663000000000000000000000000000000000005A -:1066400000000000100000000070001C0000F800B6 -:106650003C0001E0007C0003C000FC00038001EC72 -:1066600000038003CC0003800F0C0003801E0C008D -:1066700003803C0C000380F80C0001E7E00C0001F3 -:10668000FFC00C0000FF000C000018000C00000010 -:1066900000000000000000000000000000000000FA -:1066A0008000003000E000007000F00001F0007891 -:1066B0000001C0003C000380001C000380600C004F -:1066C0000300E00C000300E00C000380E01C00036A -:1066D00081F01C0001E7B8780001FF3FF80000FEE0 -:1066E0001FF000001807C0000000000000000000BC -:1066F00000000000038000000007800000001F80F1 -:106700000000003F800000007B80000001E380006B -:106710000003C38000000F838000001E0380000080 -:106720007C03800000F003800003FFFFFC0003FFF8 -:10673000FFFC0003FFFFFC000000038000000003DB -:106740008000000003800000000000000000000046 -:1067500000000020E0000007E0F00000FFE078000B -:1067600003FFC01C0003F1801C000383800E0003A4 -:1067700083800E000383800E000383800C0003835C -:10678000801C000381C03C000381E078000380FF8F -:10679000F80003807FE00000001F80000000000080 -:1067A00000000000000000000000000000070000E2 -:1067B00000003FE0000000FFF0000003F8F80000D8 -:1067C00007E03C00001FC01C00003F800C0000F9E7 -:1067D000800E0001F1800E0003C1800E000301C095 -:1067E0000C000201C01C000000E07C000000FFF86B -:1067F0000000007FF00000001FC00000000000004B -:106800000000000000000000000003800000000302 -:106810008000000003800000000380001C00038053 -:1068200000FC00038007FC0003801FE00003807F62 -:1068300000000381F800000387E00000039F0000D0 -:106840000003FC00000003F000000003E000000073 -:1068500003800000000000000000000000000000B5 -:106860000007E000007E1FF00000FFBFF80001E716 -:10687000F83C000381F01C000380E00C000380E082 -:106880000E000300E00E000380E00E000380E00C29 -:10689000000381F01C0001E7B83C0000FF3FF80056 -:1068A000007E1FF00000000FE0000000000000006C -:1068B000000000000000000000003FC00000007F5A -:1068C000E0000000FFF0000001E078000003C038A5 -:1068D00006000380181E000380187E00038019F84C -:1068E0000003801FE00003803FC00003C07F000062 -:1068F00001E1FC000000FFF00000007FC00000008C -:106900003F00000000000000000000000000000048 -:10691000C0E0F0F8FC000000000000000000F03FC4 -:10692000000000000000F83F000000000000000030 -:106930000000004003B8E23F00000000000000003B -:1069400006D0CF43EBFD4C3E033333333333E33FC9 -:10695000FFAB6FDBB66DDB3F4D268F515555D53FF5 -:1069600001411DA96074D13F65DBC9934A86CD3FC3 -:10697000EF4E454A287ECA3F3E5555555555C53FB1 -:1069800093BDBE166CC166BF2CDE25AF6A56113FA3 -:10699000F16BD2C541BDBBBED0A4BE726937663EA5 -:1069A0000000000000000000C8690008000000208E -:1069B000CC000000183E0008946A0008CC000020BB -:1069C000D40B0000283E000800A24A04000000008A -:1069D000000000000102030406070809020406087B -:1069E0000000000001020304010203040607080975 -:1069F0000000000000000000000000000000000097 -:106A00000000000001000000000000000000000085 -:106A100000000000000000004D5154430000000041 -:106A20000400000000000000000000000000000062 -:106A30003C0001004D5154570000000000000000D0 -:106A40000000000000000000000000000000000046 -:106A50000000000000000000000000000000000036 -:106A60000000000000000000000000000000000026 -:106A700000000000FFFF0000154900086148000801 -:106A80000000000000000000000000000000000006 -:046A90000000000002 -:0400000508000131BD -:00000001FF +:020000040800F2 +:100000009809002045010008311B00082D1B00083D +:100010002F1B00082D1000083135000800000000DB +:10002000000000000000000000000000F91E0008B1 +:100030002F10000800000000E31D00086D300008CC +:100040005F0100085F0100085F0100085F01000810 +:100050005F0100085F0100085F0100085F01000800 +:100060005F0100085F0100085F0100085F010008F0 +:100070005F0100085F0100085F0100085F010008E0 +:100080005F0100085F0100085F0100085F010008D0 +:100090005F0100085F0100085F0100085F010008C0 +:1000A0005F0100085F0100085F0100085F010008B0 +:1000B0005F010008C13000085F0100085F0100080F +:1000C0005F0100085F0100085F0100085F01000890 +:1000D0005F01000889320008F13200085933000836 +:1000E000811900085F0100085F0100085F01000836 +:1000F0005F0100085F0100085F0100085F01000860 +:100100005F0100085F0100085F0100085F0100084F +:100110005F0100085F0100085F0100085F0100083F +:100120005F0100085F0100085F0100085F0100082F +:10013000DFF80CD000F0C4FB00480047094100087C +:10014000980900200648804706480047FEE7FEE77A +:10015000FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE777 +:100160007130000831010008A0F14101192900D8BF +:100170002030704740EA01039B0703D009E008C91B +:10018000121F08C0042AFAD203E011F8013B00F85C +:10019000013B521EF9D27047D2B201E000F8012BA8 +:1001A000491EFBD270470022F6E710B513460A46F7 +:1001B00004461946FFF7F0FF204610BD30B505464E +:1001C0002A460B4612F8010B13F8014B08B1A04266 +:1001D000F8D01CB1002802D06D1CF1E7284630BDD4 +:1001E000421C10F8011B0029FBD1801A704730B562 +:1001F00005460020034600E05B1C934205D2EC5C00 +:10020000C85C201A01D1002CF6D130BD2DE9FE4F7B +:10021000804681EA0300C00F0C46009021F00041A7 +:1002200023F00045B8EB0200A94105D24046214623 +:1002300090461C460B46024623F00040104347D030 +:10024000270DC7F30A00C3F30A510290401A019028 +:1002500040286BDAC3F3130040F4801B00989246E9 +:1002600020B10023D2EB030A63EB0B0B0198594634 +:10027000C0F14002504600F0D6F906460D46504601 +:100280005946019A00F0EEF910EB08006141002494 +:1002900087EA115284EAE7731A4340D0009A62B3A6 +:1002A000019A012A4FEA075215DC001B61EB02019B +:1002B0004FF0004202EA0752CDE90042001C41F52E +:1002C000801132462B4600F025FA03B0BDE8F08FCE +:1002D00040462146F9E7001B61EB0201001C41F595 +:1002E000801300185B412018A2F5001747EB0301AB +:1002F00040EAD570B6196D4111E06D084FEA360637 +:1003000045EAC0754FEA0752001B61EB0201001C71 +:1003100041F5801149084FEA300000195141324639 +:100320002B4603B0BDE8F04F00F0E5B9009801227C +:1003300040000023D0EB020263EBE07300982146FB +:100340004FEAE074B8EB000061EB0401E9E783F0E9 +:1003500000435BE781F0004158E72DE9FE4F81EA59 +:10036000030404F0004421F0004100944FF0000B1E +:1003700023F0004350EA01045ED052EA03045BD04C +:10038000C3F30A54C1F30A552C44A4F2F334019484 +:10039000A0FB0254C1F3130141F48011C3F3130312 +:1003A00043F4801301FB024400FB034E840A970AC6 +:1003B00044EA815447EA8357A4FB076802958D0AF3 +:1003C00005FB07854FEA932C04FB0C542705029D7F +:1003D0004FEA065847EA1637B5EB08056EEB070CEF +:1003E000870E920E47EA811742EA8312A7FB0201A9 +:1003F000B6EB0B0164EB00042B0D43EA0C335E18E3 +:1004000044EB1C50DA465146E7FB0201C5F31304E6 +:100410004FEA0B3343EA14534FEA0432019C43EA98 +:100420000603A4F10C040294009CCDE900B400F092 +:1004300071F903B0BDE8F08F00200146F9E770B50F +:1004400021F0004303430CD0C1F30A550024D5EB3F +:10045000040564EB0403D617AD1AB34102DB002098 +:10046000014670BD201841EB025170BD9623002259 +:10047000114600F012B90EB5C10F80EAE0700844D1 +:10048000CA07002140F233438DE80E000A460B46AE +:1004900000F040F903B000BD70B5C1F30A5201F09D +:1004A00000450024C1F3130140F2FF3341F48011F1 +:1004B0009A4201DA002070BD40F233439A42A2F220 +:1004C000334203DC524200F0BDF800E090402C4380 +:1004D000F1D0404270BDC1F30A5210B5C1F313010F +:1004E00040F2FF3341F480119A4201DA002010BD3E +:1004F00040F233439A42A2F2334203DC524200F00C +:10050000A1F810BD904010BD00F0004230F0004056 +:100510000AD0C10D01F56071C0F3160042EA015125 +:10052000C208400711437047002001467047000091 +:1005300030B5041E71F1000404DB4FF0004440426A +:1005400064EB0101141E73F1000405DB1C464FF03F +:100550000043524263EB0403994208BF904230BD0E +:1005600001F0004330B421F0004150EA010206D00E +:100570000A0DA2F56072C1F31301002A02DC30BC3F +:1005800000207047440F44EAC104C100E01830BCA9 +:1005900000EBC25000F078B830B50B4601460020A1 +:1005A0002022012409E021FA02F59D4205D303FA35 +:1005B00002F5491B04FA02F52844151EA2F10102B6 +:1005C000F1DC30BD2DE9F05F0546002092469B46E8 +:1005D00088460646814640241BE028464146474659 +:1005E000224600F02FF853465A46C01A914110D3C4 +:1005F00011461846224600F016F82D1A67EB01083E +:100600004F4622460120002100F00DF817EB0009AB +:100610004E41201EA4F10104DFDC484631462A4643 +:100620004346BDE8F09F202A04DB203A00FA02F19D +:10063000002070479140C2F1200320FA03F31943D0 +:1006400090407047202A04DB203A21FA02F0002172 +:10065000704721FA02F3D040C2F1200291400843D2 +:1006600019467047202A06DBCB17203A41FA02F0E0 +:1006700043EAE07306E041FA02F3D040C2F12002FF +:1006800091400843194670470029A8BF7047401C95 +:10069000490008BF20F00100704710B4B0FA80FC98 +:1006A00000FA0CF050EA010404BF10BC704749B1D5 +:1006B000CCF1200421FA04F411FA0CF118BF012145 +:1006C00021430843A3EB0C01CB1D4FEA00614FEA25 +:1006D000102042BF002010BC704700EBC3501044F4 +:1006E0000029A4BF10BC7047401C490008BF20F07F +:1006F000010010BC704710B5141E73F1000408DA35 +:10070000401C41F1000192185B411A4301D120F0D5 +:10071000010010BD2DE9F04D92469B4611B1B1FA92 +:1007200081F202E0B0FA80F220329046FFF77BFFC0 +:1007300004460F4640EA0A0041EA0B0153465A4676 +:10074000084313D0114653EA010019D0C8F1400202 +:100750005046FFF777FF05460E465046594642463B +:10076000FFF761FF084305D0012004E02046394629 +:10077000BDE8F08D0020054346EAE0762C43374380 +:100780000A986305E40AA0EB08000022FD0A44EA87 +:1007900047540A3002D500200146E9E70105101947 +:1007A0006941DDE9084500196941BDE8F04DA2E75E +:1007B0002DE9F04D81EA030404F0004B21F00045DF +:1007C00014464FF0000A23F0004150EA050220D001 +:1007D00054EA01021DD0C5F30A570246C5F31303BC +:1007E000C1F31300C1F30A5640F4801543F480139B +:1007F000A7EB0608101BD64608F2FD3873EB050080 +:1008000002D308F1010801E092185B41B8F1000F32 +:1008100003DA00200146BDE8F08D00204FF480117E +:10082000064684460EE0171B73EB050705D3121B23 +:1008300063EB050306434CEA010C49084FEA30001C +:1008400092185B4150EA0107EDD152EA030012D041 +:1008500082EA040083EA0501084305D0101BAB417E +:1008600006D20122002306E000224FF0004302E0FE +:100870006FF0010253101AEB06004CEB085110EB1D +:100880000A0041EB0B01BDE8F04DFFF734BFC1F3A7 +:100890000A52C1F3130140F2FF3341F480119A422E +:1008A00002DA00200146704740F233439A42A2F236 +:1008B000334202DC5242FFF7C5BEFFF7B4BE000070 +:1008C000064C074D06E0E06840F0010394E807009D +:1008D00098471034AC42F6D3FFF72EFC486100086D +:1008E000686100082DE9F04D00231A461B1A8A4161 +:1008F00003DB00200146BDE8F08DC1F30A52C1F3CD +:10090000130141F480154FF0000BD10702D10018FC +:100910006D41521E0027044640F2FF11384601EB9C +:10092000620A3E468046024600204FF48011FFF7DF +:1009300089FEC2197141BB1846EB0100B4EB030CF0 +:1009400075EB000C04D3E41A65EB000517460E4660 +:10095000241908F101006D4180463428E3DDF919BE +:1009600046EB0600091BA84103D24FF0FF321346A5 +:1009700001E0002213461BEB070046EB0A51BDE8DD +:10098000F04DFFF7B8BE002904D0816841F00101A5 +:1009900081607047816821F001018160704700002B +:1009A00010B5154988420AD144150121204601F0AD +:1009B0003FFA2046BDE81040002101F039BA0F4946 +:1009C00088420AD104150121204601F031FA20465F +:1009D000BDE81040002101F02BBA094988420AD134 +:1009E0000121CC03204601F023FA2046BDE8104047 +:1009F000002101F01DBA10BD002401400028014073 +:100A0000003C0140014600208968490700D50120CB +:100A10007047C06C80B270470246002012680A42DC +:100A200000D001207047014600208968090700D5E1 +:100A30000120704770B500240025194E01220723BC +:100A40001146304600F054F80121304600F08FF88E +:100A500002213046FFF7E0FF0028F9D03046FFF7CB +:100A6000D8FF0544022000F0E3FA641CE4B2052C30 +:100A7000E4D30520B5FBF0F0FFF7F8FCFFF744FDE9 +:100A80004FF06632074BFFF768FC6FF00B02FFF781 +:100A9000D6FC0122FFF7D3FCBDE87040FFF760BD34 +:100AA0000024014066660A4010B542680E4B1A40A9 +:100AB0000C790B6842EA04221343436082680B4BB3 +:100AC0001A40D1E9024323434C7942EA44021343DA +:100AD0008360C26A22F47002097C491EC9B242EAEC +:100AE0000151C16210BD0000FFFEF0FFFDF7F1FFF4 +:100AF00070B5072609290AD9C568A1F10A0404EBD3 +:100B00004404A640B543A3401D43C56007E0056902 +:100B100001EB4104A640B543A3401D4305611F23DB +:100B2000072A09D2446B521E02EB820293409C4377 +:100B300091400C43446370BD0D2A09D2046BD21F4F +:100B400002EB820293409C4391400C43046370BDCE +:100B5000C46A0D3A02EB820293409C4391400C43DD +:100B6000C46270BD816841F008018160704700294E +:100B700004D0816841F4A00181607047816821F44C +:100B8000A00181607047816841F004018160704775 +:100B900030B587B001214FF4017001F03BF94FF4FB +:100BA000004001F01FF90220ADF8040000248DF888 +:100BB000074001A9184800F05BFF184D2846FFF7D1 +:100BC000EFFE02948DF80C408DF80D404FF460213B +:100BD0000491059401218DF8181002A92846FFF709 +:100BE00063FF01212846FFF7CEFE2846FFF7BAFF34 +:100BF0002846FFF718FF0028FAD12846FFF7C3FF61 +:100C00002846FFF7FFFE0028FAD101212846FFF70A +:100C1000AEFF07B030BD00000008014000240140D5 +:100C200010B56FF0040002F013FA09480949006892 +:100C3000B0FBF1F00849C0B2087000EB4002C2EB13 +:100C4000C0104FF6FF7202EAC000488010BD0000DD +:100C50000000002000127A00280000202DE9FF414A +:100C60000121182001F0D6F80121084601F0D2F840 +:100C700043F20200ADF80C0010208DF80F000320A5 +:100C80008DF80E00244C03A9204600F0F1FE02214D +:100C9000204600F047FF6114204600F043FFA114F6 +:100CA000204600F03FFF4FF4C040ADF80C00482054 +:100CB0008DF80F00194F03A9384600F0D9FE4FF404 +:100CC000C06000F069FF28248DF8004000258DF8F1 +:100CD00001508DF8025001268DF80360684600F03F +:100CE00029FFF003ADF80C008DF80F4003A938463A +:100CF00000F0BEFE0F21022000F0A6FE01948DF848 +:100D0000085008208DF809008DF80A6001A800F04D +:100D100061FEBDE8FF810000000C014000100140B1 +:100D2000012080F3138805480168054A01F4E06159 +:100D300011430160BFF34F8FFEE700000CED00E0B0 +:100D40000400FA057FB50121022001F055F80920C1 +:100D5000ADF8080041F61F40ADF804000024ADF8DE +:100D60000A40ADF806400E4D01A9284602F03EFAB1 +:100D700001224121284602F02EFA1D218DF8001093 +:100D80008DF8014003218DF8021001218DF8031028 +:100D9000684600F0CFFE0121284602F004FA7FBD2C +:100DA00000040040F0B587B006460121480401F078 +:100DB00023F80121042001F02DF80424ADF8184097 +:100DC00003258DF81A5018218DF81B101E4F06A907 +:100DD000384600F04DFE0821ADF818108DF81B4084 +:100DE00006A9384600F044FE4FF4A06000F0D4FE9F +:100DF00026218DF804108DF8055002208DF806008C +:100E000001208DF8070001A800F094FE0296002052 +:100E1000ADF80C00ADF80E00ADF81000ADF8140000 +:100E20000C20ADF81200094C02A9204602F01AFB72 +:100E3000012240F22551204602F0F9FA0121204614 +:100E400002F0C2FA07B0F0BD0008014000440040C3 +:100E500070B586B005460121880400F0CDFF012160 +:100E6000082000F0D7FF4FF48060ADF81400032491 +:100E70008DF8164018218DF817101F4E05A9304621 +:100E800000F0F6FDF114ADF8141004218DF81710E0 +:100E900005A9304600F0ECFD4FF4A06000F07CFEA8 +:100EA00027208DF800008DF801408DF802400120C8 +:100EB0008DF80300684600F03DFE01950020ADF876 +:100EC0000800ADF80A00ADF80C00ADF810000C20D9 +:100ED000ADF80E00094C01A9204602F0C3FA012228 +:100EE00040F22551204602F0A2FA0121204602F0EC +:100EF0006BFA06B070BD0000000C014000480040D5 +:100F00002DE9F04105460F4600240C4E0BE0402130 +:100F1000304602F065FA0028F9D0295D304602F02B +:100F200003FB641CA4B2BC42F1D34021304602F062 +:100F300057FA0028F9D0BDE8F081000000480040D1 +:100F400070B54FF400512C4800F0E5FD2B4C002506 +:100F5000A8B1A572A089B0F5967F4BD3A07864287C +:100F600001D2401CA070FFF765FD606024498842F3 +:100F70003EDD2449884205DD6420607239E00120AD +:100F8000A072E7E72049884202DD5A20607230E013 +:100F90001E49884202DB502060722AE01C498842C8 +:100FA00002DB4620607224E01A49884202DD3C20C0 +:100FB00060721EE01849884202DD3220607218E03B +:100FC0001649884202DD2820607212E014498842E6 +:100FD00002DB1E2060720CE01249884202DB142002 +:100FE000607206E01049884203DB0A20607200E06C +:100FF0006572A58170BD000000100140D401002081 +:10100000B81E6540B81E85405C8F82407B147E40D0 +:101010009A9979408FC275405C8F7240D7A3704017 +:1010200052B86E40A4706D409A996940FEE77047CF +:101030000B49498848434FF0E021486100238B6108 +:10104000086940F0010008610869C20701D0C003C7 +:10105000FAD5086920F0010008618B617047000033 +:10106000280000200B49097848434FF0E0214861EF +:1010700000238B61086940F0010008610869C2071C +:1010800001D0C003FAD5086920F0010008618B6126 +:1010900070470000280000202DE9F0412B4C01276B +:1010A000FD03207D2A4E4FF00208002816D1294664 +:1010B000304600F030FD80B1C820FFF7B9FF294667 +:1010C000304600F028FD48B12946304600F023FDA7 +:1010D0000028F9D184F8158000E06775207D01288B +:1010E00014D12946304600F016FD78B1C820FFF72C +:1010F0009FFF2946304600F00EFD38B129463046A4 +:1011000000F009FD0028F9D184F81580207D02281F +:1011100017D12946304600F0FEFC002811D0C82027 +:10112000FFF786FF2946304600F0F5FC002808D07E +:101130002946304600F0EFFC0028F9D1A07A10B122 +:101140006775BDE8F08103206075FAE7D4010020DF +:10115000001001402DE9F0412B4C207D627D904232 +:101160004FD001273E03294D022A10D1314628468F +:1011700000F0D8FC00F01CFF227D62B13146284609 +:1011800000F0D2FCA77500F0F3FD02202075607D11 +:10119000012803D01EE001F099F8F3E70221284668 +:1011A00000F0C0FC3146284600F0BCFC227D12B1A4 +:1011B000022A03D00DE001F089F80AE0002001F0D6 +:1011C00001FB01F083F8002020723146284600F030 +:1011D000ABFC2775607D032813D14FF47A70FFF7BD +:1011E00027FF0221284600F09DFC3146284600F0EA +:1011F00099FC4FF40051284600F094FC0320207520 +:10120000FEE7BDE8F0810000D4010020000C0140A1 +:101210000FB4F0B5B3B0C82101A8FEF7C4FF002495 +:1012200039AA01A8389902F099F90020009001A884 +:10123000FEF7D6FF86B20D4F01AD0BE040213846D8 +:1012400002F0CEF80028F9D0295D384602F06CF99A +:10125000641CA4B2B442F1D34021384602F0C0F875 +:101260000028F9D033B0F0BC5DF814FB0044004016 +:1012700070B590B005460E463C2101A8FEF793FFDD +:101280004FF4E130FFF78EFD4FF47A742046FFF7FC +:10129000CFFE2046FFF7CCFE09E000F0DFF9C822C0 +:1012A00039A13AA000F006FB2046FFF7C1FEC82294 +:1012B00035A13AA000F0FEFA0028EED1C82232A1F2 +:1012C00037A000F0F7FA0028F8D1C8222EA136A0E6 +:1012D00000F0F0FA0028F8D10A20FFF7A9FEC82292 +:1012E00029A137A000F0E6FA0028F8D1C82226A1EB +:1012F00036A000F0DFFA0028F8D12046FFF798FE6C +:101300002046FFF795FE2046FFF792FE2046FFF7A6 +:101310008FFE3C2101A8FEF746FF33462A462DA149 +:1013200001A802F007F9224617A101A800F0C2FAAD +:101330000028F8D1C82214A12CA000F0BBFA002884 +:10134000F8D14FF4FA7422460FA12BA000F0B2FAA4 +:101350000028F8D14FF4967422460BA133A000F078 +:10136000A9FA0028F8D1C82207A134A000F0A2FAF7 +:101370000028F8D13449088064213448FEF713FF6F +:1013800010B0002070BD00004F4B000041542B43B3 +:1013900049504D4F44453D3000000000415400008D +:1013A000415445300000000041542B554152543DFA +:1013B0003131353230302C382C312C302C3000008B +:1013C00041542B43574D4F44453D320041542B521D +:1013D0005354000041542B43575341503D22257331 +:1013E000222C222573222C312C34000041542B4313 +:1013F00049504D55583D300041542B4349505354AA +:101400004152543D22554450222C223235352E3241 +:1014100035352E3235352E323535222C36303135B4 +:10142000362C34323235342C3000000041542B43FA +:1014300049504D4F44453D310000000041542B437D +:10144000495053454E440000360000200C01002056 +:1014500001460020054A1288130406D5044BC2F346 +:101460000E0298541846FEF7A9BE704736000020B9 +:101470000C0100202DE9F041324D288800045FD591 +:10148000314C0026207802283ED1304A10787B2843 +:101490003AD1A6802E4BA088115C19547D2902D028 +:1014A000401CA080F7E72A4802F0AAFDE06000286F +:1014B00040D028A1274602F085FD01468069C96910 +:1014C000FFF709F8B860A0F56A41FC3915D123A1EE +:1014D000F86802F077FD02691D4822A1283802F061 +:1014E00029F821A1F86802F06DFD026918481DA1D4 +:1014F000143802F01FF803203870F86802F03EFD3F +:1015000064211348FEF74FFE20780A2818D12A7864 +:1015100062700F480D496430FEF72CFE64210B48C1 +:10152000FEF741FE2E80BDE8F041094811A164306C +:10153000FEF744BE64210548FEF735FE0F480680DD +:10154000BDE8F081360000203C0000200C010020A6 +:1015500028020020706F72740000000073736964C9 +:10156000000000002573000070617373776F726470 +:1015700000000000434C4F53454400003800002059 +:1015800010B5174C2078012811D0022816D0032856 +:101590001FD004280AD100F019F91249A1F1140052 +:1015A00000F094F80028F8D10520207010BD0EA19D +:1015B00010A0FFF75DFE0220207010BD124C608A63 +:1015C000B0F5FA6FF9D311A000F0A8F900206082FD +:1015D00010BD17A000F0A2F90420207010BD00007B +:1015E0003C00002014020020617364717765393873 +:1015F000363700005869616F59695F494F545F4140 +:101600006972426F78000000D40100207B22636F72 +:101610006465223A2230222C226D7367223A2273AB +:101620007461727420636F6E6E656374227D000056 +:101630007B22636F6465223A2231222C226D73670C +:10164000223A2267657457696669496E666F3A7314 +:10165000756363657373227D0000000010B5184C3C +:101660004021204601F0BCFE0028F9D02B21204665 +:1016700001F05AFF0F20FFF7DBFC4021204601F06C +:10168000AFFE0028F9D02B21204601F04DFF0F209E +:10169000FFF7CEFC4021204601F0A2FE0028F9D041 +:1016A0002B21204601F040FF4FF4FA70FFF7C0FCF9 +:1016B000BDE81040142203A103A000F0FBB8000015 +:1016C000004400404F4B00004154000030B58FB043 +:1016D00004460D463C216846FEF765FD3C21684600 +:1016E000FEF761FD2B46224618A1684601F022FF55 +:1016F00064221BA1684600F0DDF810B101200FB094 +:1017000030BDC82219A11AA000F0D4F80028F8D1E1 +:10171000C82216A119A000F0CDF80028F8D1C822DF +:1017200012A121A000F0C6F80028F8D114220FA1C0 +:1017300021A000F0BFF80028F8D1224908806421D8 +:101740002148FEF730FD0020D9E7000041542B432B +:10175000574A41503D222573222C22257322000036 +:101760005749464920474F54204950004F4B0000ED +:1017700041542B4349504D55583D300041542B4363 +:10178000495053544152543D22554450222C223149 +:1017900039322E3136382E312E36222C383038362A +:1017A0002C383038362C300041542B4349504D4FA3 +:1017B00044453D310000000041542B4349505345FE +:1017C0004E440000360000200C01002070B54FF49C +:1017D000E130FFF7E7FA4FF47A742046FFF728FC70 +:1017E0002046FFF725FC4FF4487509E0FFF736FF68 +:1017F000C8221DA11DA000F05DF82846FFF718FCC7 +:10180000C82219A11DA000F055F80028EED1C82269 +:1018100015A11BA000F04EF80028F8D1C82212A193 +:1018200019A000F047F80028F8D10A20FFF700FCC3 +:10183000C8220DA11AA000F03DF80028F8D1C82256 +:1018400009A11AA000F036F80028F8D12046FFF7C9 +:10185000EFFB2046FFF7ECFB2046FFF7E9FB2046B5 +:10186000FFF7E6FB012070BD4F4B000041542B43B6 +:1018700049504D4F44453D300000000041540000A8 +:10188000415445300000000041542B554152543D15 +:101890003131353230302C382C312C302C300000A6 +:1018A00041542B43574D4F44453D310041542B5239 +:1018B000535400002DE9F04180460F461446134D65 +:1018C00000262E8064211248FEF76DFC414611A0CF +:1018D000FFF79EFCC7B18CB916E00A20FFF7A8FB02 +:1018E000288800040AD53846FFF7B2FD18B12E80CB +:1018F0000020BDE8F0812E800120FAE7641E240458 +:10190000240CEAD10120F4E70120F2E736000020A0 +:101910000C01002025730D0A000000000FB4F0B583 +:10192000B3B0C82101A8FEF73EFC002439AA01A8E3 +:10193000389901F013FE0020009001A8FEF750FC3A +:1019400086B20E4F01AD0BE04021384601F048FD54 +:101950000028F9D0295D384601F0E6FD641CA4B2E8 +:10196000B442F1D34021384601F03AFD0028F9D0C5 +:1019700033B00020F0BC5DF814FB000000440040D0 +:1019800010B54FF40044204600F014F8002808D0A9 +:10199000204600F009F80348007D002801D1FFF738 +:1019A000BFF910BDD4010020014908607047000054 +:1019B0001404014001460020054A12680A40044B05 +:1019C00014331B680B4202D0002A00D0012070475C +:1019D0000004014030B51B4A83790168002B2AD0EE +:1019E00013688B431360111D0B680468A3430B60DD +:1019F000017911440B68046823430B60114C0834CF +:101A00002168036899432160231D19680568A9436B +:101A100019604179102905D011440A680068024311 +:101A20000A6030BD216802681143216019680068AE +:101A30000143196030BD0079104402688A43026096 +:101A400030BD00000004014010B58A07120F0F23BB +:101A5000934021F00304054921448C689C438C6029 +:101A60008B68904003438B6010BD00000000014074 +:101A70002DE9F0410022CC7804F00F03E40601D5F3 +:101A80008C7823430C784FF00F0714F0FF0F4FF0C2 +:101A9000010C1CD005680CFA02F40E882640A64200 +:101AA00011D1960007FA06F825EA080503FA06F8A8 +:101AB00048EA0505CE78282E02D0482E02D002E052 +:101AC000446100E00461521C082AE4D305600A88DE +:101AD000FF2A1ED94568002202F108060CFA06F416 +:101AE0000E882640A64210D1960007FA06F825EA8D +:101AF000080503FA06F848EA0505CE78282E00D135 +:101B00004461CE78482E00D10461521C082AE3D3E8 +:101B10004560BDE8F0810246002092680A4200D08C +:101B2000012070474161704701617047FEE7FEE7A1 +:101B30007047000070B50F23C27801260178002A93 +:101B40001ED0144A126802F4E062C2F5E062120A82 +:101B5000C2F10404D3404578A54082781A402A4354 +:101B6000120101F1E02181F80024007800F01F014A +:101B70008E404009800000F1E020C0F8006170BD97 +:101B800001F01F0086404809800000F1E020C0F805 +:101B9000806170BD0CED00E0024908430249086015 +:101BA000704700000000FA050CED00E010B50021C0 +:101BB000002400220378422B10D143784D2B0DD105 +:101BC000435C1A4492B2491CC9B21E29F8D3C17FA2 +:101BD000807F01EB0020904200D1FF24204610BD01 +:101BE0002DE9F0475E4C5F4D4FF000062088000461 +:101BF00019D55D48FFF7DAFFFF280FD15A48417920 +:101C0000027901EB0221A984C179827901EB0221D9 +:101C1000E984417A007A01EB00202885268064213E +:101C20005148FEF7C0FA288AB0F5FA6F03D3E220D4 +:101C300000F0AEF82E82E98BA88C6427DFF82C81A7 +:101C40000A266FF0130A4FF48279814228D0B8F83F +:101C500000100AEB9104B0FBF7F0C2B204F10800E7 +:101C600080B21032494600F00FFFA88CB0FBF6F0AE +:101C7000B0FBF6F106FB110204F1100080B2103245 +:101C8000494600F001FFA88CB0FBF6F106FB1102FB +:101C90001834A0B21032494600F0F6FEA88CE88352 +:101CA000298CE88C81422AD0B8F800100AEB510444 +:101CB0004FF0500AB0FBF7F0C2B204F1080080B256 +:101CC0001032514600F0E0FEE88CB0FBF6F0B0FBBD +:101CD000F6F106FB110204F1100080B210325146F9 +:101CE00000F0D2FEE88CB0FBF6F106FB11021834CE +:101CF000A0B21032514600F0C7FEE88C2884288D2F +:101D0000698C88422AD0B8F80010890801EB410498 +:101D1000103CB0FBF7F0C2B204F1080080B2103200 +:101D2000494600F0B1FE288DB0FBF6F0B0FBF6F1AD +:101D300006FB110204F1100080B21032494600F097 +:101D4000A3FE288DB0FBF6F106FB11021834A0B2F9 +:101D50001032494600F098FE288D6884BDE8F0876F +:101D600038000020D4010020700100208C030020E6 +:101D700010B54FF41650FFF76BF802210348FFF738 +:101D8000D3FEBDE810401420FFF752B9000C01400B +:101D900030B585B00546002414216846FEF703FAE5 +:101DA000002142228DF800204D228DF801208DF86F +:101DB000025000208DF803008DF804006846425C54 +:101DC000224494B2491CC9B20529F8D3200A8DF8DF +:101DD00005008DF8064007216846FFF791F805B029 +:101DE00030BD7047034A516821F4404101435160BE +:101DF0007047000000100240054A002903D0D16955 +:101E00000143D1617047D1698143D16170470000BE +:101E100000100240054A002903D0916901439161F5 +:101E20007047916981439161704700000010024042 +:101E3000054A002903D0D1680143D1607047D168B9 +:101E40008143D160704700000010024010B5264A5F +:101E5000516801F00C01254B002927D0042927D017 +:101E6000082927D00360516801F0F0010909204BCF +:101E70005C5C0168E1404160546804F4E064240A59 +:101E80001C5D21FA04F48460546804F46054E40A8C +:101E90001B5DD940C160526802F44042920B144B62 +:101EA0001B1F9A5CB1FBF2F1016110BD0360DAE720 +:101EB0000360D8E7516801F47011536803F480336C +:101EC000022404EB914133B153689B0307D5094BBE +:101ED00059430160C7E7074B59430160C3E7034B10 +:101EE00059430160BFE700000010024000127A0071 +:101EF0001800002000093D00704700F001B8000004 +:101F00000CB50022019200922748016841F480310B +:101F100001604FF4A063016801F400310091019960 +:101F2000491C0191009911B901999942F3D10168B5 +:101F3000890302D50121009100E000920099012956 +:101F400030D11A490A6842F010020A600A6822F089 +:101F500003020A600A6842F002020A6041684160B6 +:101F600041684160416841F480614160416821F409 +:101F70007C114160416841F4E8114160016841F021 +:101F80008071016001688901FCD5416821F003017D +:101F90004160416841F0020141604168C1F3810143 +:101FA0000229FAD10CBD00000010024000200240BE +:101FB0002DE9F0412D4C2088400861880325B1FBB4 +:101FC000F5F10A3189B22A4E47F6FF7232805A2360 +:101FD000642200F0B1FC2088800800EB400061889A +:101FE0000627B1FBF7F2B1FBF5F102EB410189B233 +:101FF0004FF6E07232802D23322200F09DFC2088C3 +:1020000080086188B1FBF7F2B1FBF5F102EB410109 +:1020100089B248F21F4232802D23322200F08CFC1C +:1020200020886FF0170101EB500080B2282100F0EA +:1020300004FF20886FF0130505EB500080B2B42137 +:1020400000F020FF208805EB900080B2E6252946AD +:1020500000F0CEFE2088800800EB4000103880B2EF +:102060002946BDE8F04100F0A5BE00008C03002029 +:102070004E0000202DE9F041914FF889B0F5FA7F2C +:102080007BD3B878022878D300243846B97A007D0B +:10209000012903D110B14FF4FC6403E0022801D1FF +:1020A0004FF6FF74787A397A002688427ED0DFF8BE +:1020B000148250282ED3A8F800400C242346CD22A9 +:1020C0002146CA2000F0DEFB641CE4B2132CF5D3D9 +:1020D0000C242346D2222146CF2000F0D3FB641CDF +:1020E000E4B2132CF5D30C242346D7222146D42066 +:1020F00000F0C8FB641CE4B2132CF5D30C24234677 +:10210000DC222146D92000F0BDFB641CE4B2132C74 +:10211000F5D3CAE03C2831D3A8F800600C252B4643 +:10212000CD222946CA2000F0ADFB6D1CEDB2132D67 +:10213000F5D3A8F800400C242346D2222146CF2014 +:1021400000F0A0FB641CE4B2132CF5D30C2423464E +:10215000D7222146D42000F095FB641CE4B2132C56 +:10216000F5D30C242346DC222146D92000F08AFB3B +:10217000641CE4B2132CF5D397E09EE0282832D3F8 +:10218000A8F800600C252B46CD222946CA2000F075 +:1021900079FB6D1CEDB2132DF5D30C252B46D22205 +:1021A0002946CF2000F06EFB6D1C00E084E0EDB20C +:1021B000132DF3D3A8F800400C242346D722214640 +:1021C000D42000F05FFB641CE4B2132CF5D30C2484 +:1021D0002346DC222146D92000F054FB641CE4B2E3 +:1021E000132CF5D361E0142830D3A8F800600C2537 +:1021F0002B46CD222946CA2000F044FB6D1CEDB2CF +:10220000132DF5D30C252B46D2222946CF2000F0E2 +:1022100039FB6D1CEDB2132DF5D30C252B46D722BF +:102220002946D42000F02EFB6D1CEDB2132DF5D302 +:10223000A8F800400C242346DC222146D92000F0D7 +:1022400021FB641CE4B2132CF5D32EE068B3A8F88C +:1022500000600C242346CD222146CA2000F012FB48 +:10226000641CE4B2132CF5D30C242346D22221465D +:10227000CF2000F007FB641CE4B2132CF5D30C2430 +:102280002346D7222146D42000F0FCFA641CE4B295 +:10229000132CF5D30C242346DC222146D92000F050 +:1022A000F1FA641CE4B2132CF5D34FF480510648C4 +:1022B000FFF73AFC787A3872FE81BDE8F0810000C1 +:1022C000D40100204E000020000C014010B5184938 +:1022D0004FF6FF7008800923DE221946C82000F05F +:1022E000D1FA1523DE221946C82000F0CBFAC82205 +:1022F00015230921104600F0C5FADE221523092115 +:10230000104600F0BFFA0D23C8221946C52000F080 +:10231000B9FAC52211230D21104600F0B3FA11239A +:10232000C822BDE810401946C52000F0ABBA000035 +:102330004E00002070B5404D288BB0F5FA6F7AD36F +:102340000024A87D3D49002647F6FF72012808D0E9 +:10235000022814D0032821D004282ED005283BD0F1 +:1023600068E00A80234620222146002000F08AFAF5 +:10237000641CE4B20D2CF5D30220A8755AE00A8043 +:102380000F24234618222146002000F07BFA641C0B +:10239000E4B21C2CF5D30320A8754BE00A801E2460 +:1023A000234610222146002000F06CFA641CE4B29F +:1023B0002B2CF5D30420A8753CE00A802D2423465D +:1023C00008222146002000F05DFA641CE4B23A2C99 +:1023D000F5D30520A8752DE00E8023462022214646 +:1023E000002000F04FFA641CE4B20D2CF5D30F244A +:1023F000234618222146002000F044FA641CE4B26F +:102400001C2CF5D31E24234610222146002000F068 +:1024100039FA641CE4B22B2CF5D32D242346082270 +:102420002146002000F02EFA641CE4B23A2CF5D3C9 +:102430000120A8752E8370BDD40100204E0000201D +:1024400010B5112000F044FD1420FEF7F1FDD0205E +:1024500000F03EFD072000F05DFD422000F05AFD37 +:102460001D2000F057FDD12000F032FD002000F0CB +:1024700051FD1A2000F04EFD092000F04BFDD22046 +:1024800000F026FD012000F045FD222000F042FD75 +:10249000C02000F01DFD102000F03CFD3B2000F0AE +:1024A00039FD002000F036FD022000F033FD112040 +:1024B00000F030FDC52000F00BFD032000F02AFDE8 +:1024C000C82000F005FD002000F024FD252000F0CC +:1024D00021FD212000F01EFD052000F01BFD002045 +:1024E00000F018FD0A2000F015FD652000F012FD37 +:1024F000252000F00FFD772000F00CFD502000F0AB +:1025000009FD0F2000F006FD002000F003FDF8207B +:1025100000F0DEFC012000F0FDFCFE2000F0D8FC05 +:10252000002000F0F7FC022000F0F4FC202000F076 +:10253000CFFC362000F0CCFC082000F0EBFC3A2069 +:1025400000F0C6FC552000F0E5FC2B2000F0C0FC9C +:10255000002000F0DFFC002000F0DCFC012000F097 +:10256000D9FC3F2000F0D6FC2A2000F0B1FC00206E +:1025700000F0D0FC002000F0CDFC012000F0CAFCEF +:10258000DF2000F0C7FC7820FEF752FDBDE81040C8 +:10259000292000F09DBC10B5CF2000F099FC002050 +:1025A00000F0B8FCC12000F0B5FC302000F0B2FC17 +:1025B000ED2000F08DFC642000F0ACFC032000F066 +:1025C000A9FC122000F0A6FC812000F0A3FCE8206A +:1025D00000F07EFC852000F09DFC102000F09AFCAD +:1025E0007A2000F097FCCB2000F072FC392000F03C +:1025F00091FC2C2000F08EFC002000F08BFC34209D +:1026000000F088FC022000F085FCF72000F060FC60 +:10261000202000F07FFCEA2000F05AFC002000F0AF +:1026200079FC002000F076FCC02000F051FC1B205B +:1026300000F070FCC12000F04BFC012000F06AFCAF +:10264000C52000F045FC302000F064FC302000F094 +:1026500061FCC72000F03CFCB72000F05BFC36209A +:1026600000F036FC482000F055FC3A2000F030FC29 +:10267000552000F04FFCB12000F02AFC002000F0B3 +:1026800049FC1A2000F046FCB62000F021FC0A208C +:1026900000F040FCA22000F03DFCF22000F018FC0D +:1026A000002000F037FC262000F012FC012000F092 +:1026B00031FCE02000F00CFC0F2000F02BFC2A2065 +:1026C00000F028FC282000F025FC082000F022FC67 +:1026D0000E2000F01FFC082000F01CFC542000F02D +:1026E00019FCA92000F016FC432000F013FC0A207E +:1026F00000F010FC0F2000F00DFC002000F00AFCA0 +:10270000002000F007FC002000F004FC002000F096 +:1027100001FCE12000F0DCFB002000F0FBFB1520B9 +:1027200000F0F8FB172000F0F5FB072000F0F2FBAB +:10273000112000F0EFFB062000F0ECFB2B2000F056 +:10274000E9FB562000F0E6FB3C2000F0E3FB05200F +:1027500000F0E0FB102000F0DDFB0F2000F0DAFBC2 +:102760003F2000F0D7FB3F2000F0D4FB0F2000F00B +:10277000D1FB2B2000F0ACFB002000F0CBFB0020B5 +:1027800000F0C8FB012000F0C5FB3F2000F0C2FBB9 +:102790002A2000F09DFB002000F0BCFB002000F090 +:1027A000B9FB002000F0B6FBEF2000F0B3FB1120D6 +:1027B00000F08EFB7820FEF73BFCBDE8104029209E +:1027C00000F086BB70B5064600240948018845889C +:1027D0004D430021084600F077FA00F0BDFB03E00E +:1027E000304600F097FB641CAC42F9D370BD00008A +:1027F0008C0300202DE9F003214A2C272A252B26C3 +:1028000091884FF0F00C49F241384FF4A07446F62D +:10281000040300280CD0994227D001209071148025 +:10282000A2F802C0414516D1D771157256721CE04C +:1028300000209071A2F800C05480414501D0994217 +:1028400013D1D7711572567299420ED114804FF47C +:10285000F070508009E02220A1F50943893B09D09E +:10286000D0712120107220205072BDE8F0030020AA +:1028700000F07CB9D0714F2010724E205072F4E7F6 +:102880008C0300202DE9FE4F4FF0000B00250026A1 +:10289000171AA3EB010881468A46681E002F03DD44 +:1028A0004FF00101019107E003D14FF000010191C8 +:1028B00002E00190C7F10007B8F1000F03DD4FF00F +:1028C0000100009007E003D14FF00000009002E00B +:1028D0000090C8F10008474501DD3C4600E0444651 +:1028E000601C029015E01FFA8AF11FFA89F000F0CF +:1028F00015F83D444644A54202DD2D1B0198814454 +:10290000A64202DD361B009882440BF1010B1FFA30 +:102910008BFB02988345E6DDBDE8FE8F10B500F025 +:10292000D3F900F019FB03484088BDE8104000F0DF +:10293000F1BA00004C0000202DE9FC5F80468B4678 +:1029400017469A4229D302FB02FA5B430093ABEB92 +:10295000070085B20BEB070001901BE0A8EB070016 +:1029600084B208EB0709A5EB0B060FE0A4EB080007 +:10297000404306FB0600504506D80099884203D91B +:1029800029462046FFF7CAFF641CA4B2A145EDD832 +:102990006D1CADB20198A842E0D8BDE8FC9F0000D4 +:1029A000F8B501211C20FFF735FA4FF47070ADF82F +:1029B000000010208DF8030003208DF80200694606 +:1029C0002F48FFF755F82E484FF400711030016082 +:1029D00040210160802101608115016000F0FAFA58 +:1029E0003220FEF725FB3220FEF722FB254C46F66F +:1029F000040649F24135A088FF2806D3A0F57F419F +:102A0000FF3902D0B0F5134F29D1D32000F060FA7E +:102A100000F08CF800F08AF800F088F80002A0803E +:102A200000F084F8A188C0B20843A080A84210D06A +:102A3000BF2000F04DFA00F079F800F077F800F0D0 +:102A400075F80002A08000F071F8A188C0B20843B8 +:102A5000A080A088A84202D0B04200D0A580A08863 +:102A6000A84202D1FFF797FD03E0B04201D1FFF782 +:102A7000E7FC0020FFF7BEFE0020FFF7A3FEF8BD35 +:102A8000000C01408C0300202DE9F84F07460C464E +:102A90004FF00008A1462248DFF888A000EB0210A2 +:102AA000DFF884B00090009810F808600025300628 +:102AB00004D54FF6FF70AAF8020002E00020AAF841 +:102AC000020021463846FFF729FF7006060E641CF7 +:102AD000A4B2BBF80000B84205D84FF6FF70AAF8C0 +:102AE0000200BDE8F88FA4EB090010280BD06D1C84 +:102AF000EDB2082DDBD308F1010808F0FF08B8F1AA +:102B0000100FD0D3EDE74C467F1CBFB2BBF80000DE +:102B1000B842F0D84FF6FF70AAF80200E1E70000D3 +:102B2000885600084C0000208C0300202DE9F0415D +:102B300000F028FA0C4C4FF4807020608020206058 +:102B40004026201D0660451505600120FEF78AFA23 +:102B500000F008FA07460120FEF784FA2660256097 +:102B60003846BDE8F0810000100C014070B500242B +:102B7000544D46F604022946AB798988012B18D1B9 +:102B8000914216D0082814D2DFE800F00406080AA3 +:102B90000C0E101206200CE007200AE0042008E0CA +:102BA000052006E0012004E0002002E0032000E010 +:102BB0000220A1F51343413B01D0914259D108288D +:102BC00012D2DFE800F0110406080A0C0E1080246F +:102BD0000AE0402408E0C02406E0202404E0602449 +:102BE00002E0A02400E0E024362044F008049142F2 +:102BF00001D144F0020400F06BF9204600F08AF99C +:102C0000A00606D528886988884208D2298068806D +:102C100005E028886988884201D929806880287A57 +:102C200000F056F9002000F075F9002000F072F96C +:102C30002888401EC0F30F2000F06CF92878401E51 +:102C4000C0B200F067F9687A00F042F9002000F0A5 +:102C500061F9002000F05EF96888401EC0F30F2083 +:102C600000F058F9A878BDE87040401EC0B200F0EE +:102C700051B9082812D2DFE800F0040608110A0C46 +:102C80000E1030240AE0102408E0202406E0382446 +:102C900004E0282402E0182400E00824A1F50940FB +:102CA000893809D0032044F4805400F011F92046FB +:102CB000BDE8704000F02EB9112046F240010C43EF +:102CC000F3E700008C03002070B504460E461A4D51 +:102CD0002846AA88007AA2F51341413907D0A2F507 +:102CE000D041043903D0A979012913D016E000F0AE +:102CF000EFF8200A00F00EF9E0B200F00BF9687A64 +:102D000000F0E6F8300A00F005F9F0B2BDE87040D6 +:102D100000F000B92988091B491E8CB200F0D8F8D0 +:102D2000204600F0F7F8287A00F0D2F83046BDE8E7 +:102D3000704000F0EFB800008C0300202DE9F84F40 +:102D400082460C460027A046184902EBC20001EB60 +:102D50008000DFF85C9000900098C65D00254FF67B +:102D6000FF7B300602D5A9F802B002E00020A9F8E6 +:102D7000020021465046FFF7D1FD7006060E641C86 +:102D8000A4B2A4EB0800182809D06D1CEDB2082DE0 +:102D9000E7D37F1CFFB2242FDED3BDE8F88F444673 +:102DA0000AF1010A1FFA8AFAF3E70000785C0008CA +:102DB0004C00002070B504460D46302229462046BE +:102DC000FFF762FE04F1080080B22D222946FFF7CA +:102DD0005BFE04F1100080B211222946FFF754FE79 +:102DE0001834A0B22946BDE870401022FFF74CBE4F +:102DF00070B504460D46302229462046FFF744FEB2 +:102E000004F1080080B22D222946FFF73DFE04F1AF +:102E1000100080B211222946FFF736FE04F1180097 +:102E200080B20E222946FFF72FFE2034A0B2294699 +:102E3000BDE870401022FFF727BE70B504460D466E +:102E4000002229462046FFF779FF04F10C0080B2EA +:102E500001222946FFF772FF04F1180080B2022216 +:102E60002946FFF76BFF04F1240080B203222946B4 +:102E7000FFF764FF3034A0B22946BDE87040042259 +:102E8000FFF75CBF70B504460D4655222946204623 +:102E9000FFF7FAFD04F1080080B247222946FFF748 +:102EA000F3FD04F1100080B20F222946FFF7ECFD7C +:102EB00004F1180080B24D222946FFF7E5FD2034C9 +:102EC000A0B22946BDE870401322FFF7DDBD000027 +:102ED0002DE9F041064600F07DF80D4C4FF480706E +:102EE00020604020251F2860C70027600120FEF7D2 +:102EF000B9F8304600F096F80120FEF7B3F88026C6 +:102F000026600120FEF7AEF82E602F60BDE8F0814C +:102F1000140C01402DE9F041064600F05BF80D4C21 +:102F20004FF48070206040202060C500271D3D6068 +:102F30000120FEF797F8304600F074F80120FEF704 +:102F400091F880263E600120FEF78CF8266025600F +:102F5000BDE8F081100C01400148C079FFF7B8BF0F +:102F60008C03002005488068C1B2054800684FF412 +:102F70007F4202EAC000084480B27047001001405E +:102F800008080140F8B5104C207801281AD0FF201D +:102F9000ADF8000004268DF8036003258DF802507B +:102FA00069460A48FEF764FD4FF4FF50ADF8000093 +:102FB0008DF803608DF8025069460548FEF758FD0C +:102FC00001202070F8BD00004C00002000100140DE +:102FD00000080140F8B5104C207802281AD0FF20D4 +:102FE000ADF8000010268DF8036003258DF802501F +:102FF00069460A48FEF73CFD4FF4FF50ADF800006B +:103000008DF803608DF8025069460548FEF730FDE3 +:1030100002202070F8BD00004C000020001001408C +:1030200000080140C1B2084A1161C943C9B25161E7 +:10303000010A4901054A11606FEA10200006C00C20 +:10304000111D086070470000001001401008014089 +:103050004FF0E021042804D0086920F00400086142 +:103060007047086940F0040008617047704700002D +:1030700010B50F48016841F00101016041680D4A37 +:103080001140416001680C4A11400160016821F45F +:1030900080210160416821F4FE0141604FF41F016D +:1030A0008160FEF72AFF05494FF00060086010BDFF +:1030B000001002400000FFF8FFFFF6FE08ED00E000 +:1030C00010B5324C0121204600F079F800285CD080 +:1030D0000121204600F064F82D4C2E4B0021208861 +:1030E000A8B1020413D41A78C82A01D8521C1A7045 +:1030F0001A78142A0DD35A88824205D140F4004030 +:1031000020805980197004E05880197001E019700E +:103110005980214C2088A8B1020413D45A78642A1B +:1031200001D8521C5A705A78142A0DD39A888242B8 +:1031300005D140F4004020809980597004E09880C7 +:10314000597001E05970998014494FF6E852088A85 +:10315000904201D2401C0882C889904201D2401C92 +:10316000C8818889904201D2401C8881088B904296 +:1031700001D2401C0883888B904201D2401C888376 +:10318000488A904201D2401C488210BD0004004091 +:10319000360000202C00002038000020D401002040 +:1031A000C94301827047002904D0018841F0010120 +:1031B00001807047018821F00101018070470246BB +:1031C0000020138A0B4092890A40002B02D0002A6B +:1031D00000D001207047002A03D082890A438281EF +:1031E000704782898A4382817047000030B5028827 +:1031F0001B4C1C4DA0420DD0A8420BD0B0F1804F0B +:1032000008D0194B984205D0184B984202D0184B61 +:10321000984203D122F070034A881A43154B984212 +:1032200006D0154B984203D022F44073CA881A4343 +:1032300002808A8882850A880285A0420AD0A84234 +:1032400008D00E4A904205D00D4A904202D00D4A55 +:10325000904201D1097A01860121818230BD0000AE +:10326000002C0140003401400004004000080040F0 +:10327000000C0040001000400014004000400140DD +:10328000004401400048014070B5164C40F22555FD +:103290002946204600F0ABF888B1204600F040F9FE +:1032A000C3B211480288110409D410498B54521C2E +:1032B00092B202805A2A02D342F4004101800821CE +:1032C000204600F08DF8012806D1204600F028F9AC +:1032D0000821204600F074F829462046BDE87040D9 +:1032E00000F06EB800380140320000206C00002071 +:1032F00070B5164D40F225563146284600F077F855 +:1033000088B1284600F00CF9C4B211490B881804A2 +:1033100009D4581C82B20F480A80C4545A2A02D3D6 +:1033200042F4004008800821284600F059F801289E +:1033300006D1284600F0F4F80821284600F040F8AD +:1033400031462846BDE8704000F03AB800440040DD +:10335000360000200C01002070B5164C40F22555B7 +:103360002946204600F043F888B1204600F0D8F8FE +:10337000C3B211480288110409D410498B54521C5D +:1033800092B202803B2A02D342F40041018008211C +:10339000204600F025F8012806D1204600F0C0F8AC +:1033A0000821204600F00CF829462046BDE8704070 +:1033B00000F006B80048004034000020D000002093 +:1033C0008A05C94301807047002904D0818941F4EE +:1033D000005181817047818921F4005181817047BA +:1033E0000246002012880A4200D00120704770B5C2 +:1033F000002440F66A12C1F3421301F01F050126B2 +:1034000006FA05F2012B0CD0022B0DD0838A134053 +:10341000090A8E40008830400BB100B101242046DB +:1034200070BD83891340F3E7038A1340F0E710B5BA +:1034300040F66A13C1F3421301F01F040121A140B9 +:10344000012B07D0022B07D014303AB102680A438F +:10345000026010BD0C30F8E71030F6E702688A43CE +:10346000026010BD30B585B004460D46208A4CF68A +:10347000FF710840E98801432182A0894EF6F311CB +:103480000840A9882A8911436A8902431143A1810E +:10349000A08A4FF6FF410840A9890143A1826846EE +:1034A000FEF7D4FC1D48844201D1039800E0029845 +:1034B000A189090408D500EBC00101EB00102968BF +:1034C0004900B0FBF1F007E000EBC00101EB001098 +:1034D00029688900B0FBF1F06422B0FBF2F1090128 +:1034E0000B096FF018056B4300EB8300A3891D04E3 +:1034F0004FF0320307D503EBC000B0FBF2F000F051 +:103500000700084306E003EB0010B0FBF2F000F008 +:103510000F000843208105B030BD00000038014095 +:103520008088C0F308007047C1F3080181807047AC +:10353000FEE700000FB4084B10B504A902AA0398D7 +:1035400000F080F9044602A9002000F012FD204698 +:1035500010BC5DF814FB0000733F000837B514463B +:103560000846064B6A46214600F06CF90446694657 +:10357000002000F0FEFC20463EBD0000733F000826 +:10358000490050EAC12018BF04204A0D18BF40F07E +:10359000010040F2FF72B2EB515F08BF40F0020041 +:1035A000012808BF052070472DE9F0414F1E00EBB0 +:1035B000C7010446D1E9000115461E4637F0060250 +:1035C0000DD02A463346FCF7C8FE7F1E04EBC70326 +:1035D000D3E90023FCF71AFE37F00602F1D1022FDF +:1035E00025D0042F13D0062F18BFBDE8F0812A463E +:1035F0003346FCF7B2FED4E90A23FCF707FE2A465D +:103600003346FCF7AAFED4E90823FCF7FFFD2A465F +:103610003346FCF7A2FED4E90623FCF7F7FD2A4661 +:103620003346FCF79AFED4E90423FCF7EFFD2A4663 +:103630003346FCF792FED4E90223FCF7E7FD2A4665 +:103640003346FCF78AFED4E90023BDE8F041FCF7DD +:10365000DDBD00000022134610460149FDF7A8B861 +:103660000000F03FFCF7D2BD002213461046114681 +:10367000FDF79EB840F2013200204FF0E041FCF728 +:10368000DEBE0000024A00201107FCF7D8BE000091 +:1036900001FDFFFF02E008C8121F08C1002AFAD18D +:1036A00070477047002001E001C1121F002AFBD1C2 +:1036B0007047000001490860704700006800002062 +:1036C0002DE9FF5F82B00021DDE90430020DDDF855 +:1036D00040B0034318D044F61050A2F2FF324243E8 +:1036E0001514119801281FD0A5EB0B00401C5FEAB0 +:1036F000000A4FF000064E4FDFF83891B0465046B2 +:1037000015D5CAF1000413E0119801244AA3012839 +:1037100001D16FEA0B010298119AC0E90031C0E9AA +:10372000024206B0BDE8F09FCBF10000DFE704469F +:103730000021404A491842EB0450CDE9001012E044 +:10374000E00707D032463B4640464946FCF705FEB7 +:103750008046894632463B4610461946FCF7FDFD39 +:1037600006460F466410002CEAD1DDE90401DDE9CC +:103770000023BAF1000F06DAFCF7EFFD42464B4694 +:10378000FCF7EBFD05E0FDF713F842464B46FDF76D +:103790000FF804460E460022284BFCF7C9FE03D85A +:1037A0004FF0FF30014607E00022254B204631460E +:1037B000FCF72CFDFDF76BF8102409E0002C0ADB68 +:1037C0000A220023FCF7FEFE039B30321A55641ECA +:1037D00050EA0102F2D1641C039AC4F111031444AB +:1037E000119A012A03D0012208430DD10AE00843AF +:1037F00004D000204FF0110B119072E7A3EB0B05E2 +:103800006D1E0DE05B4504DD4FF0000205F1010582 +:1038100004E003DA4FF00002A5F10105002AECD024 +:1038200002981199C0E90231C0E9004579E700002A +:10383000000014400000F03F300000000000F043A2 +:103840000000E03F2DE9FF4F95B09B4689460646B4 +:1038500000250FE2252877D100242746F84A0121C8 +:10386000059400E0044316F8013F203B01FA03F001 +:103870001042F7D130782A2811D06FF02F0330781A +:10388000A0F13002092A16D8059A44F0020402EB8E +:10389000820203EB42021044761C0590EFE759F8D0 +:1038A000042B0592002A03DA504244F40054059098 +:1038B00044F00204761C30782E2816D116F8010F39 +:1038C00044F004042A280DD06FF02F023078A0F1C4 +:1038D0003003092B09D807EB870302EB4303C71812 +:1038E000761CF3E759F8047B761C30786C280FD0EF +:1038F00006DC4C2817D068280DD06A2814D104E0C3 +:10390000742810D07A280FD10DE044F400140AE096 +:1039100044F4801401E044F440147278824202D1ED +:1039200004F58014761C761C307866280BD013DCE6 +:10393000582877D009DC002875D04528F6D04628CD +:10394000F4D047281AD19DE118E0632835D06428C7 +:1039500079D0652812D195E1702873D008DC6728EA +:10396000F1D069286FD06E280DD06F2806D1B5E050 +:1039700073282CD0752875D0782874D05A4617999A +:1039800090476D1C75E1C4F30250022809D003284A +:103990000DD0D9F8001004280DD00D6009F10409EC +:1039A00067E1D9F80010EA17C1E90052F6E7D9F843 +:1039B00000100D80F2E70D70F0E719F8041B8DF888 +:1039C000001000208DF80100EA46012003E059F8BC +:1039D00004AB4FF0FF3061074FF0000102D40DE05F +:1039E00008F101018846B9420FDA8045F8DB1AF880 +:1039F00008100029F4D108E008F10101884681424D +:103A0000FADB1AF808100029F6D105985B46A0EBFE +:103A1000080721463846179A00F094FA284400EB2C +:103A2000080507E04DE029E10DE01AF8010B5A46C0 +:103A300017999047B8F10108F7D25B4621463846FE +:103A4000179A13E142E00A220092C4F302524FF0A7 +:103A5000000A022A08D059F804CB032A4FEAEC7175 +:103A60000AD00DE029E02AE009F1070121F0070260 +:103A7000F2E802C1914609E00FFA8CFC4FEAEC71C2 +:103A8000042A03D14FFA8CFC4FEAEC71002907DAC3 +:103A90000A460021DCF1000C61EB02012D2202E05C +:103AA000220504D52B228DF80420012203E0E20731 +:103AB00001D02022F7E7904659E00A2102E01022C7 +:103AC0000DE010214FF0000A00910BE010224FF0A2 +:103AD000000A44F004040827009203E008224FF093 +:103AE000000A0092C4F30252022A05D059F804CB0E +:103AF0000021032A08D009E009F1070121F007029B +:103B0000F2E802C1914605E01FFA8CFC042A01D1BB +:103B10000CF0FF0C4FF00008220728D5702806D0C3 +:103B2000009B83F0100353EA0A0305D00EE0402205 +:103B30008DF80420012208E05CEA010206D0302260 +:103B40008DF804208DF8050002229046009B83F03A +:103B5000080353EA0A030AD15CEA010201D16207B1 +:103B600005D530228DF804204FF001087F1E58281B +:103B700004D034A003900EA802900DE036A0F9E71F +:103B800053466046009AFCF71DFD84460398825C0C +:103B90000298401E029002705CEA0100F0D1029887 +:103BA00006A9081A00F1200A600702D524F480341F +:103BB00000E00127574502DDA7EB0A0000E00020E6 +:103BC00000EB0A01009005984144401A0590E0037B +:103BD00006D45B462146179A059800F0B3F90544D0 +:103BE000002706E001A85A46C05D179990476D1C52 +:103BF0007F1C4745F6DBE0030CD55B462146179A50 +:103C0000059800F09FF9054404E030205A461799C2 +:103C100090476D1C0099481E00900029F5DC08E0D3 +:103C2000029802995A460078491C029117999047C8 +:103C30006D1CBAF10001AAF1010AF1DC65E1000096 +:103C40000928010030313233343536373839616272 +:103C50006364656600000000303132333435363736 +:103C600038394142434445460000000000F058F90D +:103C70000544761C307800287FF4ECAD19B0284656 +:103C8000BDE8F08F620700D4062709F1070222F091 +:103C9000070CFCE80223E14603F000485FEA080C49 +:103CA00002D00FF2702C0DE05FEA045C02D50FF237 +:103CB000682C07E05FEAC47C02D00FF2602C01E0C0 +:103CC000AFF2700C4FF0FF3823F00043CDF850C036 +:103CD00065280CD006DC452809D046281DD0472889 +:103CE0003DD13DE0662818D067287ED138E000211C +:103CF000112F01DB112000E0781CCDE9000106A99D +:103D00000EA8FFF7DDFCDDE90F010E9A03910021FB +:103D1000009207F1010A04914DE04FF00040009736 +:103D2000CDE9011006A90EA8FFF7CAFCDDE90F02D4 +:103D300003920E9B11990022DDF80CA000930492CF +:103D400011B9791C00EB010AB7EB0A0004D4C0F1E9 +:103D5000FF3007F1010A0490AAEB0700019044E04C +:103D6000012F00DA01270021112F01DD112000E0D1 +:103D70003846CDE9000106A90EA8FFF7A1FCDDE950 +:103D80000F010E9A0391002104910092BA46210777 +:103D90000CD40399514500DA8A46BAF1010F05DDCA +:103DA000009AAAF10101515C302908D0B84202DA28 +:103DB00010F1040F06DA0121CDE9011015E0AAF196 +:103DC0000101E9E7002805DC049901440491AAEB0C +:103DD000000102E0411C514500DD8A460499401A69 +:103DE000401C01904FF000400290200704D401983D +:103DF000504501DBCDF8048000208DF84F0002987B +:103E00000DF14F07B0F1004F25D02B200E900298F6 +:103E10004FF0020800280CDA404202902D200E904C +:103E200007E00A210298FCF7B7FB3031029007F84F +:103E3000011DB8F10001A8F10108F2DC0298002888 +:103E4000EFD1791E0E980870307800F0200040F015 +:103E5000450007F8020D12A8C01B00F107081498CE +:103E6000007800B1012000EB0A01019801EBE0713C +:103E700005984144401A401E0590E00306D45B4675 +:103E80002146179A059800F05DF8054414980078CB +:103E900018B15A46179990476D1CE00324D55B462C +:103EA0002146179A059800F04DF805441CE0049847 +:103EB000002807DBDDE90301884203DD0098405C50 +:103EC000179901E0179930205A469047049805F158 +:103ED0000105401C04900198401E019004D12E2041 +:103EE0005A46179990476D1CBAF10001AAF1010AD0 +:103EF000DDDC05E017F8010B5A46179990476D1C59 +:103F0000B8F10001A8F10108F4DC5B462146179ADC +:103F10000598ABE62D0000002B00000020000000FB +:103F20002DE9F041044600251E461746880404D4B6 +:103F300005E039462020B0476D1C641EF9D528469F +:103F4000BDE8F0812DE9F041044600251E4690466B +:103F5000C80301D5302700E02027880404D505E0F8 +:103F600041463846B0476D1C641EF9D52846BDE869 +:103F7000F0810A68531C0B601070704770B50446DE +:103F80000F4E19E02568A089C00503D4A06808B1C8 +:103F9000FFF7F4FFA089C00503D4206908B1716858 +:103FA0008847A089800503D4206A08B171688847D2 +:103FB0007168204688472C46002CE3D170BD000074 +:103FC0005400002070B50D46846800E024682CB1D0 +:103FD0002946206A00F04AF80028F7D1204670BD33 +:103FE00010B5064928200968884704461CB12821D5 +:103FF0002046FCF7D8F8204610BD000054000020F1 +:1040000000221146AFF300802DE9F04104460D4631 +:104010009046FFF7E5FF0646134F0020B860C6B193 +:10402000204601F0C7F80146304600F079FB04460F +:104030008CB1B8F1000F13D0204601F0BBF8044654 +:10404000207868B13046FFF799FFBC600020BDE8DA +:10405000F0810020FBE73046FFF790FF0020F6E7F5 +:1040600005B12C603046F2E75400002070B50446DC +:104070000D46002C01D02DB10AE00DB1012070BD1C +:10408000002070BD012070BD207898B1641C6D1CAB +:104090002078FCF769F806462878FCF765F8864230 +:1040A000F2D02078FCF760F804462878FCF75CF83A +:1040B000201A70BD002070BD10B5002821D0114B12 +:1040C0000022001F196803E0814203D80A464968AC +:1040D0000029F9D152B11368841A9C4204D10068B6 +:1040E00018441060104602E0506000E0186039B1DA +:1040F00002680B1A934203D10B681A4402604968A4 +:10410000416010BD60000020FCF78AFDFCF71AFE3C +:10411000FCF7A4FDC820FCF78BFFFCF739FD4FF43A +:104120007A70FCF785FFFEF73BFC0F4C40F6B83089 +:104130002082E081A0812083C820E08320846084E5 +:10414000FDF71EFAFDF796F9FCF7FAFEFCF7A4FF5F +:10415000FDF700F8207D022803D1FEF7EBF8FDF70C +:104160003FFDFDF787FFEBE7D4010020F0B50B30F2 +:10417000154D20F007010024144A0FE003688B421C +:104180000BD38B4205D95E1A43184768C3E9006711 +:1041900000E04368136002C004E0021D10680028BC +:1041A000ECD12046002802D1286808B10020F0BDDB +:1041B000064A07481060074A121A22F00702C0E9AF +:1041C000002401202860D7E7640000206000002060 +:1041D0009C030020980500202DE9F041074608784F +:1041E000234E5B2803D0B1600020BDE8F08105209C +:1041F000F860481C00F0DEFF044620785D2811D0EE +:10420000FFF7EEFE0546B86070B1204600F0D2FF21 +:104210000146284600F084FA00F0CCFF0446200056 +:1042200004D016E0601CE0E70020DEE70020DCE7B9 +:10423000FFF7D6FEB0B1286045600546601C00F06F +:10424000B9FF0146284600F06BFA00F0B3FF0446C0 +:1042500054B120782C28EBD020785D2806D0B460AB +:104260000020C2E70020C0E70020BEE7601CBCE7DA +:10427000540000200178A1F13002092A01D811462A +:104280000AE0A1F14102052A01D8373904E0A1F181 +:104290006102052A0AD857390A01401C0178A1F1A8 +:1042A0003003092B04D8303A11440EE00020704747 +:1042B000A1F14103052B02D8373A114405E0A1F1E1 +:1042C0006103052B0BD8573A11440A01401C0178B1 +:1042D000A1F13003092B04D8303A11440EE000203C +:1042E0007047A1F14103052B02D8373A114405E08C +:1042F000A1F16103052B0AD8573A1144090140780E +:10430000A0F13002092A04D830390844704700204F +:104310007047A0F14102052A02D837390844704796 +:10432000A0F16102052A02D85739084470470020DD +:10433000704700002DE9F34F85B08A4600242546DA +:1043400059490020CDE90201002637468346012065 +:1043500001909AF800002D2805D154490020CDE99C +:1043600002010AF1010A9AF80000302801D10AF18D +:10437000010A9AF800003138082817D89AF8000086 +:104380003038FCF778F8804689460022484B2046B2 +:104390002946FBF7E2FF42464B46FBF737FF044650 +:1043A0000D461AF8010F30380928E7D99AF80000AD +:1043B0002E2827D19AF80100302823D3392821D874 +:1043C0000AF1010A9AF800003038FCF754F88046E8 +:1043D00089460022364B20462946FBF7BEFF42465F +:1043E0004B46FBF713FF04460D4600222E4B30468A +:1043F0003946FBF7ACFF06460F461AF8010F303876 +:104400000928DFD99AF80000652801D045281DD178 +:104410001AF8010F2B2802D02D2803D010E00AF142 +:10442000010A0DE04FF0FF3001900AF1010A07E0A8 +:104430000BEB8B0100EB410B0AF1010AABF1300BE6 +:104440009AF80000A0F130010929F1D901980BFB7D +:1044500000F0FCF710F832463B46FBF7D7FE024669 +:104460000B460020124900F0B9F906460F46DDE977 +:10447000020122462B46FBF770FF32463B46FBF714 +:104480006CFF04460D460598C0E9064520462946BE +:10449000FCF702F80599486105980321C16007B04F +:1044A0005046BDE8F08F00000000F03F0000F0BF74 +:1044B000000024402DE9F04107460878384E7B285B +:1044C00003D0B1600020BDE8F0810620F860481CF0 +:1044D00000F070FE054628787D2818D0FFF780FD93 +:1044E0000446B860A8B1284600F064FE01462046A4 +:1044F00000F058F800F05EFE68B1216921620027E3 +:10450000276101783A2908D0B0600020DBE7681CF9 +:10451000D9E70020D7E70020D5E7401C00F04AFE8D +:104520000146204600F0FCF800F044FE0546280055 +:1045300028D1C8E7FFF754FDA8B1206044600446C5 +:10454000681C00F037FE0146204600F02BF800F012 +:1045500031FE50B121692162276101783A2906D0E4 +:10456000B0600020AFE70020ADE70020ABE7401CC3 +:1045700000F020FE0146204600F0D2F800F01AFEBE +:10458000054645B128782C28D4D028787D2804D039 +:10459000B560002097E7002095E7681C93E70000CE +:1045A000540000202DE9F04780460D466C1C002089 +:1045B0002A785949222A06D08D60BDE8F087641C0C +:1045C0005C2A00D1641C2278222A02D00AB1401C45 +:1045D000F5D10968401C88470746380004D0681C9C +:1045E0003C464FF480691AE00020E6E75C2903D0DE +:1045F00004F8011B401C12E0461C3078722825D0BC +:1046000006DC622816D0662818D06E2804D119E07E +:1046100074281FD0752821D004F8010B701C017874 +:10462000222901D00029E1D100212170017822291D +:104630006AD06AE0082004F8010BEFE70C2004F8C8 +:10464000010BEBE70A2004F8010BE7E70D2004F863 +:10465000010BE3E7092004F8010BDFE7701CFFF70B +:1046600009FE0546361DA5F55C404845D6D3002D0C +:10467000D4D0A5F55840484513D270785C28CDD1E8 +:10468000B0787528CAD1F01CFFF7F4FDB61DA0F56F +:104690005C414945C2D2C5F3090161F39F2000F591 +:1046A00080350421802D01D2012108E0B5F5006F8D +:1046B00001D2022103E0B5F5803F00D2032160184A +:1046C00001291AD0022911D0032908D0042919D1AF +:1046D00005F0BF0242F0800200F8012DAD0905F09F +:1046E000BF0242F0800200F8012DAD0905F0BF02C3 +:1046F00042F0800200F8012DAD09084A525C2A43BD +:1047000000F8012D441889E7401CC8F810700421F6 +:10471000C8F80C1051E7000054000020B0600008F9 +:1047200070B505460C46002C20D0042224A120465A +:10473000FBF75DFDE0B1052223A12046FBF757FD05 +:10474000D0B1042222A12046FBF751FDC0B1207850 +:1047500022281AD02D2803D0A0F1300109291AD817 +:1047600021462846BDE87040FFF7E4BD002070BD3B +:104770000220E860201D70BD0020E860601D70BD53 +:104780000120E8606861201D70BD21462846BDE813 +:104790007040FFF707BF5B2805D07B2809D00E4883 +:1047A0008460002070BD21462846BDE87040FFF7B8 +:1047B00013BD21462846BDE87040FFF77BBE0000D0 +:1047C0006E756C6C0000000066616C736500000023 +:1047D0007472756500000000540000202DE9F04D52 +:1047E0001D460C4698B0174621F0004123F00043C7 +:1047F000002814BF4FF0010C4FF0000C0CEB440CE0 +:10480000FE4A0CEB02064FEA620C66452BD33E00D3 +:1048100018BF012606EB45061644F94A964222D3F4 +:10482000F84A53EA070C02D0944205D148B918B0AF +:1048300000201146BDE8F08D002808BF4FF0000CA5 +:1048400001D04FF0010C0CEB440212F5001F0AD806 +:10485000002F14BF4FF0010C4FF0000C0CEB450281 +:1048600012F5001F07D918B03A462B462146BDE87D +:10487000F04DFEF7F7BE0022DFF88CA3002CB8BF86 +:10488000534526DADFF884C36345A8BF022220DA45 +:10489000DFF870C39C451CDCDFF874C30CEB235CB1 +:1048A000BCF1140F08DDCCF1340627FA06FC0CFA33 +:1048B00006F6BE420DD108E05FB9CCF1140623FA2A +:1048C00006FC0CFA06F69E4203D10CF00102C2F17E +:1048D000020251EA000C19D1002D17DA002C18BF82 +:1048E000022A01D0012A07D00220FEF7E3FE18B009 +:1048F000BDE8F04DFEF7AEBE0220FEF7DBFEFEF790 +:10490000A9FE18B081F00041BDE8F08DB7F1000CB0 +:104910006CD1534525D104F1804212F5801201BFBC +:1049200000280020B74918B008BFBDE8F08DB54891 +:10493000884207DC002DA1BF6046294618B0BDE8BB +:10494000F08D07E0281E05DA80F0004118B06046BF +:10495000BDE8F08DAF497944D1E9000118B0BDE858 +:10496000F08DDFF8A0C2634525D1002D1FDA19B103 +:10497000514512D1D8B909E0002840F0EC82A24A92 +:10498000214618B062F31E01BDE8F08D00202146DB +:1049900018B060F31E01BDE8F08D08DA18B02346A8 +:1049A000BDE8F04D024600206146FBF701BF18B09C +:1049B0002146BDE8F08D514518DAB5F1804F0DD094 +:1049C000A5F1005CBCF1FF5C10D1B4F1000C0DDB73 +:1049D00018B06146BDE8F04D00F0F6BB234618B0B4 +:1049E0000246BDE8F04D1946FBF7B7BC060024F0BF +:1049F000004C3BD1D9B1514533D1002C06DD002DFF +:104A0000A1BF0020514618B0BDE8F08D002C01DD9B +:104A1000002D1BDB002C13DA002D11DB012A4FF0D7 +:104A2000000014BF78497C4918B0BDE8F08D022A17 +:104A300018BF002C0AD0012A08D1002C06DA0AE09F +:104A4000002CB8BF002D11DA012A04D0002018B0C4 +:104A50000146BDE8F08D18B000204FF00041BDE8E0 +:104A6000F08DA1F14050B0F17F601AD0012000EB31 +:104A7000E47050EA020421D0624C521E4FF0000B49 +:104A8000104304BF4FF0000B644C654883427CDD4B +:104A9000644A654893421FDD884217DB002D25DB01 +:104AA00037E0002C00DA4AB1022A0CBF01204FF097 +:104AB000FF3018B0BDE8F04DFBF7DDBC0120FEF77C +:104AC000F9FD18B0BDE8F04DFEF7CEBD4D4A8A4263 +:104AD00002DC002D0ADC1CE0814202DA002D18DA2B +:104AE00004E0484B994220DD002D12DD0220FEF744 +:104AF000E1FDFEF7BFFD05460E460022534658462F +:104B00002146FBF72AFC18B066F31E012846BDE8D3 +:104B1000F08D0220FEF7CEFDFEF7B4FD0A462146D9 +:104B200018B062F31E01BDE8F08D002230466146E8 +:104B3000FBF70DFC80460E466FF00102FBF77FFC91 +:104B40004FF05532394BFBF705FC42463346FBF735 +:104B500004FC0022364BFBF7FDFB824642463346FF +:104B6000049110461946FBF7F8FB5246049BFBF7ED +:104B7000F4FB8A4600904FF0C0422E4B404631462F +:104B8000FBF7EBFB2C4A2B4B00E027E0CDE90601BD +:104B900051460098FBF7E1FB82460191274A284BDA +:104BA00040463146FBF7D9FB5246019BFBF7CFFB52 +:104BB00082460B4602460591DDE90601FBF726FB1E +:104BC000DDE90623002688463046FBF7C0FB524647 +:104BD000059BFBF7BFFB024600F07EB90020B1F554 +:104BE000801F07DA352230466146FBF728FC06466F +:104BF0006FF0340000EB215024E00000FFFF1F00A5 +:104C0000FFFF0F000000F03F0000F07F0000404376 +:104C100001FCFFFFE61700000000F0FF0000F0BFFE +:104C20000000E0410000F043FFFFEF3F5555D53F46 +:104C30000000E03F4715F73FFE822B6544DF5DF83B +:104C40000BAE543EA0F2FF300190C1F3130040F0D0 +:104C50007F6141F040510291FE498842D8BF002057 +:104C600004DDFD498142C8BF012001DD0D9008E04F +:104C700000200D900198401C01900298A0F5801032 +:104C800002900299F54878440B910D9900EBC10010 +:104C9000D0E900230F9330460A920B99FBF757FB9C +:104CA000CDE90601DDE90A2130460F9BFBF7AEFA9C +:104CB00002460B460020EA49FBF77AFD05910246C1 +:104CC0000B460090DDE90601FBF747FB1490E54831 +:104CD0008A464FF0000878440299006812904FF01D +:104CE000005040EA61010D980F9B01EB804000F5F8 +:104CF000002109910A9A1298FBF729FB32460B9B77 +:104D0000FBF728FB42465346FBF727FB064602917A +:104D100040465146099B129AFBF71FFBDDE906232B +:104D2000FBF718FB3246029BFBF711FB059B009A31 +:104D3000FBF713FB0091149A049053461046194652 +:104D4000FBF70BFB06460246C7480B4602910621BD +:104D50007844FEF729FCCDE90510029B3246104647 +:104D60001946FBF7FAFADDE90532FBF7F6FA059189 +:104D70000646534640461946149AFBF747FA009BED +:104D8000049AFBF7EAFA3246059BFBF73FFACDE9B6 +:104D900005104246534610461946FBF7DEFA00223C +:104DA000B24B02910A90FBF731FADDE90532FBF7CD +:104DB0002DFA0E464246AD4B4046FBF7C8FA029B21 +:104DC0000A9AFBF7C4FADDE90532FBF7C3FA42465B +:104DD00002910A90334610465146FBF7BEFACDE9E0 +:104DE00006015346149A02990A98FBF7B6FA8A46C6 +:104DF00002903346424600990498FBF7AEFA5346B8 +:104E0000029AFBF703FA82460B4602460591DDE95A +:104E10000601FBF7FBF9DDE906230020884606467C +:104E2000FBF795FA5246059BFBF794FA82460991E7 +:104E30004FF060428E4B30464146FBF78EFA0490AD +:104E400006918C4A8A4B50460999FBF786FA8246AE +:104E50000291894A894B30464146FBF77EFA524619 +:104E6000029BFBF7D3F9864B7B440D9A03EBC203FD +:104E7000D3E90023FBF7CAF90E9007910198FBF7DD +:104E8000FAFA0591DDE9061382460E9A0498FBF7BB +:104E9000BDF97C4A7A440D9B02EBC303D3E900239E +:104EA00000930292FBF7B2F95246059BFBF7AEF96D +:104EB0000026884652463046059BFBF748FA009B81 +:104EC000029AFBF744FA069B049AFBF740FA079B09 +:104ED0000E9AFBF73FFA024600200B460290384636 +:104EE0002946FBF73AFA824601912B463846194685 +:104EF000029AFBF72CFA32464346FBF72EFA52464B +:104F0000019BFBF783F907468A463246434629460A +:104F10000298FBF722FA05460E463A465346FBF73F +:104F200075F9594A8846914221DBA8EB020353EAFE +:104F3000000210D12A463346FBF709FACDE90401F5 +:104F4000524A534B38465146FBF760F9DDE90423DA +:104F5000FBF7EEFA21D20220FEF7ACFBFEF78AFB4C +:104F60000A46214618B062F31E01BDE8F08D494B98 +:104F700028F000429A4210D3474A08EB020353EA52 +:104F800000027FF4C6AD2A463346FBF7E0F93A4605 +:104F90005346FBF7CDFA7FF6BCAD0022019228F014 +:104FA00000403E493E4A01EB2051824223DA481C30 +:104FB0004FF4801121FA00F040443A4AC0F30A51FC +:104FC0007A44394BA1F2FF31CB4020EA0303C0F30E +:104FD000130040F48010C1F11401C8401268019020 +:104FE000B8F1000FBCBF4042019028463146FBF7A4 +:104FF000AEF905460E462A46334638465146FBF77B +:1050000005F94FF000084246284B40460591FBF752 +:10501000A4F9CDE90601264A264B40460599FBF73F +:105020009CF9009102902A46334640460599FBF7C9 +:105030008EF93A465346FBF78DF91F4A1F4BFBF793 +:105040008CF9009B029AFBF7E1F807468846024676 +:105050000B4635E08E9803007AB60B002E14000044 +:105060000000F03F661400009413000000000840A8 +:1050700009C7EE3FFD033ADCF5015B14E02F3EBEAD +:105080006C1200003012000000009040FE822B6580 +:105090004715973C00CC904000346F3F01FCFFFF68 +:1050A0000000E03F7C110000FFFF0F00432EE63FB1 +:1050B000396CA80C615C20BEEF39FAFE422EE63F47 +:1050C000DDE90601FBF7A2F8DDE9062305460E46F9 +:1050D000FBF73DF93A464346FBF73CF90F462A46B3 +:1050E0003346009010461946FBF737F982460246D0 +:1050F0002E4888460B4605217844FEF755FA52465D +:105100004346FBF72AF92A463346FBF723F9804644 +:105110008A463B4628463146009AFBF71EF93B4635 +:10512000009AFBF773F80691009000224FF080433D +:1051300040465146FBF70BF90F460C90424653464A +:1051400028463146FBF709F93B460C9AFBF730FB42 +:10515000069B009AFBF7FBF82A463346FBF7F7F865 +:105160000022134BFBF7F6F8054601980E4601EBBB +:1051700000510815002810DC28463146019AFBF73B +:105180005EF9FEF7FDF9042808BFFEF77BFA284612 +:105190003146019AFBF753F905460B4618B02A46EB +:1051A00058462146BDE8F04DFBF7D7B81C1000006B +:1051B0000000F03F00E0401C002804D001780029E6 +:1051C00001D02029F7D970472DE9F04106460F4656 +:1051D000FBF788FB041E0D4618BF0120284320F072 +:1051E0000040C0F17F6000F1E040C00F0ED0301CE5 +:1051F00018BF0120384320F00040C0F17F6000F16B +:10520000E040C00F04BF0120FEF754FA20462946B3 +:10521000BDE8F08100000000000000000000000078 +:10522000000000003F4000000000000000003000CF +:10523000400030004000000009000BC03D000BC0E2 +:105240003D00090018C024407FE02240318000006A +:10525000180024C01B000D803240018003801C40D8 +:1052600027401C8007400040100060000000000044 +:10527000000000000000000000001F8020404020CF +:105280000000402020401F800000000009000600B0 +:105290001F80060009000000040004003F80040095 +:1052A000040000000010006000000000000000008A +:1052B000040004000400040004000000000000409A +:1052C0000000000000000000002001C006003800BF +:1052D000400000001F802040204020401F80000030 +:1052E000000010403FC000400000000018C02140F6 +:1052F00022402440184000001080204024402440D8 +:105300001B80000002000D0011003FC001400000A2 +:105310003C80244024402440238000001F802440FF +:1053200024403440038000003000200027C03800B3 +:10533000200000001B802440244024401B800000EB +:105340001C0022C0224022401F80000000000000FC +:1053500008400000000000000000000004600000A1 +:1053600000000000000004000A00110020804040FE +:105370000900090009000900090000000000404080 +:10538000208011000A00040018002000234024009F +:10539000180000001F802040274029401F400000C7 +:1053A000004007C039000F0001C0004020403FC04E +:1053B000244024401B8000001F80204020402040CB +:1053C0003080000020403FC0204020401F8000006F +:1053D00020403FC024402E4030C0000020403FC04D +:1053E00024402E00300000000F001080204022409A +:1053F0003380020020403FC0040004003FC0204032 +:10540000204020403FC0204020400000006020207D +:1054100020203FC02000200020403FC024400B003F +:1054200030C0204020403FC020400040004000C02D +:105430003FC03C0003C03C003FC0000020403FC0D4 +:105440000C4023003FC020001F802040204020400F +:105450001F80000020403FC02440240018000000AE +:105460001F802140214020E01FA0000020403FC0BD +:105470002440260019C0004018C024402440224087 +:1054800031800000300020403FC02040300000004C +:1054900020003F80004000403F80200020003E0070 +:1054A00001C0070038002000380007C03C0007C0DA +:1054B00038000000204039C0060039C020400000FC +:1054C0002000384007C0384020000000304021C094 +:1054D0002640384020C00000000000007FE040204F +:1054E00040200000000070000C000380004000001D +:1054F0000000402040207FE000000000000020006D +:1055000040002000000000000010001000100010FB +:10551000001000100000000040000000000000002B +:10552000000002800540054003C0004020003FC04D +:105530000440044003800000000003800440044055 +:105540000640000000000380044024403FC00040AB +:1055500000000380054005400340000000000440B7 +:105560001FC0244024402000000002E005500550E8 +:105570000650042020403FC00440040003C0004007 +:105580000000044027C00040000000000010001090 +:10559000041027E00000000020403FC00140070049 +:1055A00004C00440204020403FC0004000400000B4 +:1055B00007C0040007C0040003C00000044007C087 +:1055C0000440040003C00040000003800440044085 +:1055D00003800000041007F0045004400380000022 +:1055E000000003800440045007F00010044007C08E +:1055F0000240040004000000000006400540054091 +:1056000004C00000000004001F80044000400000AF +:10561000040007800040044007C000400400070069 +:1056200004C0018006000400060001C0070001C09C +:1056300006000000044006C0010006C0044000004F +:105640000410071004E0018006000400000004407C +:1056500005C00640044000000000000004007BE09C +:1056600040200000000000000000FFF000000000EB +:10567000000040207BE004000000000040008000AB +:10568000400020002000400000000000000000005A +:1056900000000000000000000000000000001FCC1F +:1056A000000C000000000000000008003000600056 +:1056B0000800300060000000022003FC1E200220D1 +:1056C00003FC1E200220000000000E1811043FFF02 +:1056D00010840C78000000000F0010840F3800C008 +:1056E000077818840078000000780F8410C4112413 +:1056F0000E9800E4008400080800680070000000B4 +:10570000000000000000000000000000000007E0B2 +:10571000181820044002000000004002200418185D +:1057200007E00000000000000240024001800FF08E +:1057300001800240024000000080008000800FF8DD +:1057400000800080008000000001000D000E0000BD +:1057500000000000000000000000008000800080C9 +:1057600000800080008000800000000C000C000021 +:1057700000000000000000000000000600180060AB +:105780000180060018002000000007F0080810043F +:105790001004080807F000000000080408041FFCBB +:1057A000000400040000000000000E0C101410247F +:1057B000104411840E0C000000000C181004110499 +:1057C000110412880C700000000000E00320042483 +:1057D00008241FFC0024000000001F9810841104FE +:1057E0001104108810700000000007F008881104F0 +:1057F000110418880070000000001C00100010FC4C +:1058000013001C001000000000000E38114410842A +:10581000108411440E38000000000700088C10446A +:105820001044088807F00000000000000000030C8E +:10583000030C000000000000000000000001010651 +:105840000000000000000000000000800140022075 +:105850000410080810040000022002200220022088 +:10586000022002200220000000001004080804109A +:10587000022001400080000000000E001200100C09 +:10588000106C10800F00000003E00C1813E41424C7 +:1058900017C4082807D000000004003C03C41C40C3 +:1058A000074000E4001C000410041FFC1104110454 +:1058B00011040E880070000003E00C18100410049E +:1058C000100410081C10000010041FFC1004100429 +:1058D0001004080807F0000010041FFC1104110454 +:1058E00017C410040818000010041FFC1104110054 +:1058F00017C010000800000003E00C18100410048A +:1059000010441C780040000010041FFC108400802C +:10591000008010841FFC10040000100410041FFC01 +:105920001004100400000000000300011001100129 +:105930001FFE10001000000010041FFC1104038063 +:105940001464181C1004000010041FFC1004000450 +:1059500000040004000C000010041FFC1F0000FCE9 +:105960001F001FFC1004000010041FFC0C040300A7 +:1059700000E010181FFC100007F0080810041004C5 +:105980001004080807F0000010041FFC10841080A9 +:10599000108010800F00000007F008181024102459 +:1059A000101C080A07F2000010041FFC110411006B +:1059B00011C011300E0C000400000E1C11041084E4 +:1059C000108410441C3800001800100010041FFC44 +:1059D000100410001800000010001FF8100400044C +:1059E000000410041FF8100010001E0011E0001C3D +:1059F000007013801C0010001FC0103C00E01F004E +:105A000000E0103C1FC000001004180C163401C048 +:105A100001C01634180C100410001C00130400FC04 +:105A200013041C00100000000804101C10641084F3 +:105A300013041C04101800000000000000007FFE8A +:105A40004002400240020000000030000C000380D1 +:105A50000060001C00030000000040024002400201 +:105A60007FFE000000000000000000002000400059 +:105A70004000400020000000000100010001000182 +:105A80000001000100010001000040004000200072 +:105A90000000000000000000000000980124014404 +:105AA0000144014400FC000410001FFC00880104B4 +:105AB00001040088007000000000007000880104EC +:105AC0000104010400880000000000700088010447 +:105AD000010411081FFC0004000000F80144014407 +:105AE0000144014400C800000000010401040FFC4F +:105AF0001104110411001800000000D60129012929 +:105B0000012901C90106000010041FFC00840100E6 +:105B10000100010400FC000400000104190419FC48 +:105B20000004000400000000000000030001010167 +:105B3000190119FE0000000010041FFC00240040A1 +:105B400001B4010C010400000000100410041FFC4B +:105B50000004000400000000010401FC0104010035 +:105B600001FC0104010000FC010401FC00840100AF +:105B70000100010400FC0004000000F8010401041D +:105B80000104010400F80000010101FF0085010487 +:105B9000010400880070000000000070008801040B +:105BA0000104010501FF00010104010401FC00845E +:105BB0000104010001800000000000CC0124012448 +:105BC000012401240198000000000100010007F8F1 +:105BD0000104010400000000010001F800040004B9 +:105BE0000004010801FC0004010001800170000CA8 +:105BF000001001600180010001F0010C003001C0C3 +:105C00000030010C01F0010000000104018C00745F +:105C10000170018C01040000010101810171000E7D +:105C2000001801600180010000000184010C0134B2 +:105C300001440184010C000000000000000000008D +:105C400001003EFC40024002000000000000000095 +:105C5000FFFF0000000000000000400240023EFC88 +:105C600001000000000000000000600080008000D3 +:105C700040004000200020000000000FFFF80FFF50 +:105C8000F80C0C000C0C000C0C00040C00060C00B2 +:105C9000061C0003F80001F0000000000000000FE7 +:105CA000FFF80FFFF80FF00000FF800007F8000773 +:105CB000F801FF000FE0000FFFF80FFFF8000000F1 +:105CC0000000000180100780700600F00C01D00C6D +:105CD00003900C07100E1C1007F81003E0100000D2 +:105CE0001000000000000000000000003800003834 +:105CF00000000000000000000000000000000000A4 +:105D000000000000000000000000800038E007F8FC +:105D10007007B01004201804201804301804303024 +:105D2000043CF0041FE0000300000000000000003D +:105D3000000003FC0000003FFFC000007FFFF000F8 +:105D400000FC01F80001E000780003C0001C000323 +:105D500080001C000300000E000300000E00038002 +:105D6000001C0003C0003C0001F000780000FFFFB1 +:105D7000F000007FFFE000000FFF000000000000C7 +:105D80000000000000000000000000000000000013 +:105D90000000000000001C000000001800000000CF +:105DA00038000000007000000000E000000001FF6B +:105DB000FFFC0003FFFFFC0003FFFFFC00000000EE +:105DC00000000000000000000000000000000000D3 +:105DD00000000000000000000000000000000000C3 +:105DE000000000000000100000000070001C000017 +:105DF000F8003C0001E0007C0003C000FC000380D0 +:105E000001EC00038003CC0003800F0C0003801E14 +:105E10000C0003803C0C000380F80C0001E7E00C50 +:105E20000001FFC00C0000FF000C000018000C0077 +:105E30000000000000000000000000000000000062 +:105E400000008000003000E000007000F00001F071 +:105E500000780001C0003C000380001C000380604B +:105E60000C000300E00C000300E00C000380E01CC9 +:105E7000000381F01C0001E7B8780001FF3FF80043 +:105E800000FE1FF000001807C00000000000000026 +:105E900000000000000003800000000780000000F8 +:105EA0001F800000003F800000007B80000001E3B5 +:105EB00080000003C38000000F838000001E038069 +:105EC00000007C03800000F003800003FFFFFC0063 +:105ED00003FFFFFC0003FFFFFC0000000380000045 +:105EE00000038000000003800000000000000000AC +:105EF000000000000020E0000007E0F00000FFE0EC +:105F0000780003FFC01C0003F1801C000383800E97 +:105F1000000383800E000383800E000383800C0047 +:105F20000383801C000381C03C000381E0780003F0 +:105F300080FFF80003807FE00000001F8000000069 +:105F4000000000000000000000000000000000074A +:105F5000000000003FE0000000FFF0000003F8F840 +:105F6000000007E03C00001FC01C00003F800C0048 +:105F700000F9800E0001F1800E0003C1800E0003C5 +:105F800001C00C000201C01C000000E07C00000009 +:105F9000FFF80000007FF00000001FC000000000BC +:105FA000000000000000000000000000038000006E +:105FB00000038000000003800000000380001C003C +:105FC000038000FC00038007FC0003801FE0000347 +:105FD000807F00000381F800000387E00000039F3A +:105FE00000000003FC00000003F000000003E000DC +:105FF000000003800000000000000000000000001E +:1060000000000007E000007E1FF00000FFBFF80066 +:1060100001E7F83C000381F01C000380E00C000362 +:1060200080E00E000300E00E000380E00E0003801D +:10603000E00C000381F01C0001E7B83C0000FF3FCA +:10604000F800007E1FF00000000FE00000000000DC +:106050000000000000000000000000003FC0000041 +:10606000007FE0000000FFF0000001E07800000386 +:10607000C03806000380181E000380187E000380CD +:1060800019F80003801FE00003803FC00003C07FB9 +:10609000000001E1FC000000FFF00000007FC000F4 +:1060A00000003F00000000000000000000000000B1 +:1060B0000000C0E0F0F8FC00000000000000F03F2D +:1060C000000000000000F83F000000000000000099 +:1060D0000000004003B8E23F0000000000000000A4 +:1060E00006D0CF43EBFD4C3E033333333333E33F32 +:1060F000FFAB6FDBB66DDB3F4D268F515555D53F5E +:1061000001411DA96074D13F65DBC9934A86CD3F2B +:10611000EF4E454A287ECA3F3E5555555555C53F19 +:1061200093BDBE166CC166BF2CDE25AF6A56113F0B +:10613000F16BD2C541BDBBBED0A4BE726937663E0D +:10614000000000000000000068610008000000205E +:106150006C00000094360008D46100086C00002038 +:106160002C090000A436000800A24A040000000028 +:1061700000000000010203040607080902040608E3 +:1061800000000000010203040102030406070809DD +:1061900000000000000000000000000000000000FF +:1061A00000000000010000000000000000000000EE +:1061B0000000000000000000FFFF00006D4100082B +:1061C000B9400008000000000000000000000000CE +:0461D00000000000CB +:0400000508000131BD +:00000001FF diff --git a/firmware/stm32-esp/project/EventRecorderStub.scvd b/firmware/stm32-esp/project/EventRecorderStub.scvd index 2956b296..0fb3ee58 100644 --- a/firmware/stm32-esp/project/EventRecorderStub.scvd +++ b/firmware/stm32-esp/project/EventRecorderStub.scvd @@ -1,9 +1,9 @@ - - - - - - - - - + + + + + + + + + diff --git a/firmware/stm32-esp/project/pro.uvgui.LS-PC b/firmware/stm32-esp/project/pro.uvgui.LS-PC index 45aedf3e..1bea18d0 100644 --- a/firmware/stm32-esp/project/pro.uvgui.LS-PC +++ b/firmware/stm32-esp/project/pro.uvgui.LS-PC @@ -11,17 +11,17 @@ 38003 Registers - 140 130 + 140 100 346 Code Coverage - 1008 160 + 890 100 204 Performance Analyzer - 1168 + 1168 175 175 100 @@ -86,8 +86,8 @@ 44 - 2 - 3 + 0 + 1 -1 -1 @@ -107,7 +107,7 @@ 0 563 - 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000400000003000000010000003A433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C6D61696E2E6300000000066D61696E2E6300000000C5D4F200FFFFFFFF43433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C706D5F75617274332E63000000000A706D5F75617274332E6300000000FFDC7800FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000BECEA100FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000F0A0A100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD5000100000000000000020000001A0000006F00000080070000D2030000 + 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000400000001000000010000003A433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C6D61696E2E6300000000066D61696E2E6300000000C5D4F200FFFFFFFF43433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C73686F775C706D5F75617274332E63000000000A706D5F75617274332E6300000000FFDC7800FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000BECEA100FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000F0A0A100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD50001000000000000000200000021FFFFFFC00000008306000059040000 @@ -126,11 +126,11 @@ 0 16 - F4000000530000008E050000DF000000 + 000000005300000049010000AC030000 16 - FBFFFFFFC0000000950400004C010000 + 000000006F00000049010000D2030000 @@ -146,7 +146,7 @@ 0 16 - D7FEFFFF530000001A000000EC030000 + C8FEFFFF530000000B000000AC030000 16 @@ -166,7 +166,7 @@ 0 16 - D7FEFFFF530000001A000000EC030000 + D7FEFFFF530000001A000000AC030000 16 @@ -446,7 +446,7 @@ 0 16 - D7FEFFFF530000001A000000EC030000 + D7FEFFFF530000001A000000AC030000 16 @@ -466,7 +466,7 @@ 0 16 - D7FEFFFF530000001A000000EC030000 + D7FEFFFF530000001A000000AC030000 16 @@ -486,7 +486,7 @@ 0 16 - 00000000EC0300007C070000B7040000 + 00000000BB0300008007000086040000 16 @@ -526,7 +526,7 @@ 0 16 - 00000000EC0300007C07000066050000 + 00000000CF0300008007000049050000 16 @@ -1166,7 +1166,7 @@ 0 16 - 00000000EC0300007C07000066050000 + 00000000B60300008007000030050000 16 @@ -1726,7 +1726,7 @@ 0 16 - 00000000D103000080070000EA030000 + 00000000070400007C07000020040000 16 @@ -1795,14 +1795,14 @@ 3355 - 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFFF4000000DF0000008E050000E3000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000FBFFFFFFC0000000950400004C010000F4000000530000008E050000DF0000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF9A040000530000009E04000015020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C3000001800040000000000000A5030000C000000095040000820200009E040000530000008E0500001502000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF120100005300000016010000B603000000000000020000000400000001000000B8FEFFFF2D060000FFFFFFFF01000000739400000180001000000000000007FFFFFFC00000001900000023040000000000005300000012010000B603000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000F80100008E050000FC01000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000007FFFFFF69020000950400001203000000000000FC0100008E050000A502000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC7020000FC010000CB020000A502000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000001102000028060000150200000000000001000000040000000100000002FDFFFF8A000000FFFFFFFF03000000B4010000D2010000CF0100000180008000000000000021FFFFFF820200002F050000190400001A0000001502000028060000AC0300000000000040820046030000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000007000000C7000000008000000100000000000000080400007C0700008205000001000000010000000100000077940000008000000100000000000000080400007C07000082050000010000000100000001000000C5000000008000000100000000000000080400007C070000D3040000010000000100000001000000ED0300000010000001000000D7FEFFFF6F0000001A000000080400000100000000000000010000006D0000000010000001000000D7FEFFFF6F0000001A00000008040000000000000000000000000000C30000000010000001000000D7FEFFFF6F0000001A00000008040000000000000000000000000000C40000000010000001000000D7FEFFFF6F0000001A0000000804000000000000010000000000000000000000 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFFF4000000DF0000008E050000E3000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000F40000006F0000008E050000FB000000F4000000530000008E050000DF0000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF9A040000530000009E04000015020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000009E0400006F0000008E050000310200009E040000530000008E0500001502000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF120100005300000016010000B603000000000000020000000400000001000000B8FEFFFF2D060000FFFFFFFF010000007394000001800010000000000000000000006F00000012010000D2030000000000005300000012010000B603000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000F80100008E050000FC01000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000180200008E050000C102000000000000FC0100008E050000A502000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC7020000FC010000CB020000A502000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000001102000028060000150200000000000001000000040000000100000002FDFFFF8A000000FFFFFFFF03000000B4010000D2010000CF010000018000800000000000001A0000003102000028060000C80300001A0000001502000028060000AC0300000000000040820046030000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000007000000C7000000008000000100000007FFFFFF3C04000087060000B605000001000000010000000100000077940000008000000100000007FFFFFF23040000870600009D050000010000000100000001000000C5000000008000000100000007FFFFFF2804000087060000F3040000010000000100000001000000ED0300000010000001000000CFFDFFFFC000000012FFFFFF190400000100000000000000010000006D0000000010000001000000DEFDFFFFC000000021FFFFFF19040000000000000000000000000000C30000000010000001000000DEFDFFFFC000000021FFFFFF19040000000000000000000000000000C40000000010000001000000DEFDFFFFC000000021FFFFFF1904000000000000010000000000000000000000 59392 File - 2860 - 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000004000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000001153696D4C43445F53686F775F504D325F35960000000000000011001153696D4C43445F53686F775F504D325F350844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000400160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65CC030000 + 2870 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000844656275674C6F67960000000000000012001153696D4C43445F53686F775F504D325F350844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740E54696D335F4D305F415252536574000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65CC030000 1423 @@ -1818,7 +1818,7 @@ Build 966 - 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000004001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000000000000100000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0000000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 583 @@ -1834,7 +1834,7 @@ Debug 2373 - 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000007200000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720000000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000007200000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7200000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720000000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720000000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730000000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72000000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 898 @@ -3599,11 +3599,11 @@ 0 100 - 3 + 1 ..\user\main.c 22 - 25 + 41 59 1 @@ -3612,7 +3612,7 @@ ..\user\show\pm_uart3.c 21 - 1 + 25 32 1 @@ -3628,9 +3628,9 @@ 0 - C:\Users\LS-PC\Desktop\ShowEnvir-V2.0-20210829\user\show\simulation_lcd.h + ..\user\show\simulation_lcd.h 0 - 64 + 24 56 1 diff --git a/firmware/stm32-esp/project/pro.uvgui.RJYF-PC b/firmware/stm32-esp/project/pro.uvgui.RJYF-PC index 85b8f3b2..212a445a 100644 --- a/firmware/stm32-esp/project/pro.uvgui.RJYF-PC +++ b/firmware/stm32-esp/project/pro.uvgui.RJYF-PC @@ -11,17 +11,17 @@ 38003 Registers - 188 122 + 188 131 346 Code Coverage - 1408 818 + 1408 160 204 Performance Analyzer - 1568 235 235 188 + 1568 @@ -42,7 +42,7 @@ 1936 Watch 1 - 200 288 133 + 200 133 133 1937 @@ -89,25 +89,25 @@ 2 3 - -32000 - -32000 + -1 + -1 -1 -1 - 60 - 1079 - 2741 - 1422 + 10 + 525 + 2309 + 1265 0 - 1181 - 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000A000000020000000100000048433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C6E6574776F726B666C6F772E63000000000D6E6574776F726B666C6F772E6300000000C5D4F200FFFFFFFF4A433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C657370383236365F75617274322E63000000000F657370383236365F75617274322E6300000000FFDC7800FFFFFFFF3C433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C6D61696E2E6300000000066D61696E2E6300000000BECEA100FFFFFFFF49433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C636F6D5C75617274325F726563656976652E63000000000F75617274325F726563656976652E6300000000F0A0A100FFFFFFFF47433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C646174615C62617369635F646174612E68000000000C62617369635F646174612E6800000000BCA8E100FFFFFFFF46433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C64726976655C6273705F706F72742E63000000000A6273705F706F72742E63000000009CC1B600FFFFFFFF44433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C626174746572792E630000000009626174746572792E6300000000D9ADC200FFFFFFFF45433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C706D5F75617274332E63000000000A706D5F75617274332E6300000000EAD6A300FFFFFFFF4B433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000EAD6A300FFFFFFFF4B433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832335C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000B3A6BE00FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD500010000000000000002000000470100006F000000000A00003A050000 + 481 + 01000000040000000100000001000000010000000100000000000000020000000000000001000000010000000000000028000000280000000100000003000000000000000100000049433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C657370383236365F776F726B2E63000000000E657370383236365F776F726B2E6300000000C5D4F200FFFFFFFF4A433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C657370383236365F75617274322E63000000000F657370383236365F75617274322E6300000000FFDC7800FFFFFFFF45433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C6465765F776F726B2E63000000000A6465765F776F726B2E6300000000BECEA100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD500010000000000000002000000410100006F000000000A00003A050000 @@ -116,7 +116,7 @@ -1 -1 - 0 + 1 0 0 0 @@ -126,11 +126,11 @@ 0 16 - 44010000530000006E07000015010000 + 00000000530000003D0100001E050000 16 - 440100006F0000006E07000031010000 + 85000000A1000000C5010000B1010000 @@ -146,7 +146,7 @@ 0 16 - 030000007300000040010000FF040000 + 03000000730000003A010000FF040000 16 @@ -166,7 +166,7 @@ 0 16 - 030000007300000040010000FF040000 + 03000000730000003A010000FF040000 16 @@ -446,7 +446,7 @@ 0 16 - 030000007300000040010000FF040000 + 03000000730000003A010000FF040000 16 @@ -466,7 +466,7 @@ 0 16 - 030000007300000040010000FF040000 + 03000000730000003A010000FF040000 16 @@ -486,7 +486,7 @@ 0 16 - 0000000030050000000A000015060000 + 0000000039040000000A00001E050000 16 @@ -1146,7 +1146,7 @@ 0 16 - 03000000730000003D010000FF040000 + 00000000700000004301000014050000 16 @@ -1794,15 +1794,15 @@ - 3337 - 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFF44010000150100006E07000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000440100006F0000006E0700003101000044010000530000006E070000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFF4301000053000000470100001E05000001000000020000100400000001000000C2FEFFFFB7080000FFFFFFFF05000000ED0300006D000000C3000000C40000007394000001800010000001000000000000006F000000400100003A0500000000000053000000430100001E0500000000000040410056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273000000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF00000000D00200006E070000D402000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000F00200006E070000CF03000000000000D40200006E070000B303000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFB7030000D4020000BB030000B303000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF0000000089030000F40700008D03000000000000010000000400000001000000000000000000000000000000000000000000000001000000FFFFFFFF04000000B4010000D2010000CF010000779400000180008000000000000000000000A9030000F40700004B050000000000008D030000F40700002F0500000000000040820046040000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000002000000C50000000080000001000000000000004C050000000A000031060000010000000000000001000000C70000000080000001000000000000003A050000000A00001F06000000000000010000000000000000000000 + 3507 + 000000000D000000000000000010000001000000FFFFFFFFFFFFFFFF3D01000053000000410100001E050000010000000200001004000000010000000000000000000000FFFFFFFF04000000ED0300006D000000C3000000C4000000FFFF02000B004354616262656450616E65001000000100000085000000A1000000C5010000B101000000000000530000003D0100001E0500000000000040410056040000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000020000000000000FFFFFFFFFFFFFFFF44010000150100006E07000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D60100004589000001800020000000000000440100006F0000006E0700003101000044010000530000006E070000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF4301000053000000470100001405000000000000020000000400000001000000C2FEFFFFB7080000FFFFFFFF010000007394000001800010000000000000000000006F00000043010000300500000000000053000000430100001405000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000D00200006E070000D402000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000F00200006E070000CF03000000000000D40200006E070000B303000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFB7030000D4020000BB030000B303000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF0000000089030000F40700008D03000000000000010000000400000001000000000000000000000000000000000000000000000001000000FFFFFFFF04000000B4010000D2010000CF010000779400000180008000000000000000000000A9030000F40700004B050000000000008D030000F40700002F0500000000000040820046040000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000002000000C500000000800000010000000000000055040000000A00003A050000010000000000000001000000C70000000080000001000000000000003A050000000A00001F06000000000000010000000000000000000000 59392 File - 2544 - 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE8030000000000000000000000000000000000000000000000010000000100000096000000020020500000000009553347657454696D65960000000000000014000D53696D756C6174696F6E4C43440F53696D4C43445F447261774C696E650953696D4C43445F523308506F7765725F424C09553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640C43616E416C6C4672616D65730000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 + 2548 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000D53696D756C6174696F6E4C4344960000000000000014000D53696D756C6174696F6E4C43440F53696D4C43445F447261774C696E650953696D4C43445F523308506F7765725F424C09553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640C43616E416C6C4672616D65730000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 1423 @@ -1818,7 +1818,7 @@ Build 966 - 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000000000000100000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 583 @@ -1834,7 +1834,7 @@ Debug 2373 - 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720000000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7200000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720000000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720000000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730000000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72000000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 898 @@ -3599,93 +3599,30 @@ 0 100 - 2 + 0 - ..\user\show\networkflow.c + ..\user\show\esp8266_work.c 0 - 1 - 14 + 141 + 217 1 0 ..\user\show\esp8266_uart2.c - 12 - 48 - 102 - 1 - - 0 - - - ..\user\main.c - 16 - 10 - 37 - 1 - 2 - 0 - - - ..\user\com\uart2_receive.c - 28 - 32 - 32 - 1 - - 0 - - - ..\user\data\basic_data.h - 23 - 21 - 31 - 1 - - 0 - - - ..\user\drive\bsp_port.c - 11 - 13 - 24 - 1 - - 0 - - - ..\user\show\battery.c - 0 - 47 - 56 - 1 - - 0 - - - ..\user\show\pm_uart3.c - 34 - 7 - 70 - 1 - - 0 - - - ..\user\show\simulation_lcd.h - 20 - 62 - 66 - 1 - - 0 - - - ..\user\show\simulation_lcd.c - 8 + 56 1 - 5 + 113 + 1 + 116 + 0 + + + ..\user\show\dev_work.c + 0 + 49 + 1 1 0 diff --git a/firmware/stm32-esp/project/pro.uvopt b/firmware/stm32-esp/project/pro.uvopt index fec0131d..84a1e5d5 100644 --- a/firmware/stm32-esp/project/pro.uvopt +++ b/firmware/stm32-esp/project/pro.uvopt @@ -758,7 +758,7 @@ user/data - 0 + 1 0 0 0 @@ -778,7 +778,7 @@ user/show - 0 + 1 0 0 0 diff --git a/firmware/stm32-esp/user/com/uart1_receive.c b/firmware/stm32-esp/user/com/uart1_receive.c index 0857cb9f..d069b08f 100644 --- a/firmware/stm32-esp/user/com/uart1_receive.c +++ b/firmware/stm32-esp/user/com/uart1_receive.c @@ -1,40 +1,40 @@ -#include "uart1_receive.h" - -void BSP_UART1ReceiveInfor(void) -{ - if(UART1ReadFlag&0x8000) - { - UART1ReadFlag = 0; - memset((void *)UART1ReadBuf,0,sizeof(UART1ReadBuf)); - } -} - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +#include "uart1_receive.h" + +void BSP_UART1ReceiveInfor(void) +{ + if(UART1ReadFlag&0x8000) + { + UART1ReadFlag = 0; + memset((void *)UART1ReadBuf,0,sizeof(UART1ReadBuf)); + } +} + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart1_receive.h b/firmware/stm32-esp/user/com/uart1_receive.h index 67e532ff..69fe1f4e 100644 --- a/firmware/stm32-esp/user/com/uart1_receive.h +++ b/firmware/stm32-esp/user/com/uart1_receive.h @@ -1,27 +1,27 @@ -#ifndef _UART1_RECEIVE_H_ -#define _UART1_RECEIVE_H_ - -#include "stm32f10x.h" - -#include "bsp_uart1.h" - -#include "bsp_timer3.h" - -#include "bsp_port.h" - -void Sys_Usart1RecMessage(void); - -#endif - - - - - - - - - - - - - +#ifndef _UART1_RECEIVE_H_ +#define _UART1_RECEIVE_H_ + +#include "stm32f10x.h" + +#include "bsp_uart1.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +void Sys_Usart1RecMessage(void); + +#endif + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart2_receive.c b/firmware/stm32-esp/user/com/uart2_receive.c index 5b66475e..05f40227 100644 --- a/firmware/stm32-esp/user/com/uart2_receive.c +++ b/firmware/stm32-esp/user/com/uart2_receive.c @@ -1,81 +1,81 @@ -#include "uart2_receive.h" - -uint8_t txLen = 0; -uint8_t txBuf[20] = {0}; - -static uint8_t Server_CheckSum(uint8_t * buf) -{ - uint8_t len = 0,i = 0; - uint16_t CheckSum = 0; - len = buf[2] - 2; - - for( i = 0; i < len; i++) - CheckSum += buf[i+2]; - - return (uint8_t)CheckSum; -} - -void Server_Protocol(void) -{ - if(UART2ReadFlag&0x8000) - { - if(UART2ReadBuf[0]==0xAA && UART2ReadBuf[1]==0xBB) - { - // 校验和 - switch(UART2ReadBuf[3]) - { - case 0x90 : { } break; // 返回配网结果 - case 0x91 : { DevParam.Server = UART2ReadBuf[8]; } break; // 返回网络状态 - - case 0x94 : { } break; // 返回上报属性结果 - case 0x95 : { } break; // 返回上报事件结果 - - case 0x96 : { } break; // 下发控制 - case 0x97 : { } break; // 下发获取状态 - default : break; - } - } - UART2ReadFlag = 0; - memset((void *)UART2ReadBuf,0,sizeof(UART2ReadBuf)); - } - - // 间隔2秒上报设备状态 - if( (DevParam.Server==2) && (DevParam.ServerUpdateTime>=2000) ) - { - txLen = 0; - txBuf[txLen++] = 0xAA; txBuf[txLen++] = 0xBB; - txBuf[txLen++] = 0x00; // 数据长度，帧头后有效数据长度 - txBuf[txLen++] = 0x84; // 上报属性 - txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x02; txBuf[txLen++] = 0x03; txBuf[txLen++] = 0x04; // 客户端ID - - /////////参数//////// - txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x01; - txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x01; - /////////////////////// - - txBuf[txLen++] = 0x00; // 校验和 - txBuf[txLen++] = 0x5F; // 帧尾 - - txBuf[2] = txLen-2; // 数据长度 - txBuf[txLen-2] = Server_CheckSum(txBuf);// 校验和 - - // 发送 - ESP8266_SendData( txBuf, txLen); - - DevParam.ServerUpdateTime = 0; - } -} - - - - - - - - - - - - - - +#include "uart2_receive.h" + +uint8_t txLen = 0; +uint8_t txBuf[20] = {0}; + +static uint8_t Server_CheckSum(uint8_t * buf) +{ + uint8_t len = 0,i = 0; + uint16_t CheckSum = 0; + len = buf[2] - 2; + + for( i = 0; i < len; i++) + CheckSum += buf[i+2]; + + return (uint8_t)CheckSum; +} + +void Server_Protocol(void) +{ + if(UART2ReadFlag&0x8000) + { + if(UART2ReadBuf[0]==0xAA && UART2ReadBuf[1]==0xBB) + { + // 校验和 + switch(UART2ReadBuf[3]) + { + case 0x90 : { } break; // 返回配网结果 + case 0x91 : { DevParam.Server = UART2ReadBuf[8]; } break; // 返回网络状态 + + case 0x94 : { } break; // 返回上报属性结果 + case 0x95 : { } break; // 返回上报事件结果 + + case 0x96 : { } break; // 下发控制 + case 0x97 : { } break; // 下发获取状态 + default : break; + } + } + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf,0,sizeof(UART2ReadBuf)); + } + + // 间隔2秒上报设备状态 + if( (DevParam.Server==2) && (DevParam.ServerUpdateTime>=2000) ) + { + txLen = 0; + txBuf[txLen++] = 0xAA; txBuf[txLen++] = 0xBB; + txBuf[txLen++] = 0x00; // 数据长度，帧头后有效数据长度 + txBuf[txLen++] = 0x84; // 上报属性 + txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x02; txBuf[txLen++] = 0x03; txBuf[txLen++] = 0x04; // 客户端ID + + /////////参数//////// + txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x01; + txBuf[txLen++] = 0x01; txBuf[txLen++] = 0x01; + /////////////////////// + + txBuf[txLen++] = 0x00; // 校验和 + txBuf[txLen++] = 0x5F; // 帧尾 + + txBuf[2] = txLen-2; // 数据长度 + txBuf[txLen-2] = Server_CheckSum(txBuf);// 校验和 + + // 发送 + ESP8266_SendData( txBuf, txLen); + + DevParam.ServerUpdateTime = 0; + } +} + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart2_receive.h b/firmware/stm32-esp/user/com/uart2_receive.h index a977226b..91ec0866 100644 --- a/firmware/stm32-esp/user/com/uart2_receive.h +++ b/firmware/stm32-esp/user/com/uart2_receive.h @@ -1,21 +1,21 @@ -#ifndef _UART2_RECEIVE_H_ -#define _UART2_RECEIVE_H_ - -#include "stm32f10x.h" - -#include "bsp_timer3.h" - -#include "bsp_uart2.h" - - -#endif - - - - - - - - - - +#ifndef _UART2_RECEIVE_H_ +#define _UART2_RECEIVE_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_uart2.h" + + +#endif + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart3_receive.c b/firmware/stm32-esp/user/com/uart3_receive.c index 98fad439..546a02ca 100644 --- a/firmware/stm32-esp/user/com/uart3_receive.c +++ b/firmware/stm32-esp/user/com/uart3_receive.c @@ -1,28 +1,28 @@ -#include "uart3_receive.h" - -void BSP_UART3ReceiveInfor(void) -{ -// Sys_Usart3RecComplete(System_1ms); -// if(Usart3ReadFlag&0x8000) -// { -// Sys_Usart3SendStr("uart3:"); -// Sys_Usart3SendData(Usart3ReadBuf,(Usart3ReadFlag&(~(1<<15)))); -// -// Usart3ReadFlag = 0; -// memset((void *)Usart3ReadBuf,0,sizeof(Usart3ReadBuf)); -// } -} - - - - - - - - - - - - - - +#include "uart3_receive.h" + +void BSP_UART3ReceiveInfor(void) +{ +// Sys_Usart3RecComplete(System_1ms); +// if(Usart3ReadFlag&0x8000) +// { +// Sys_Usart3SendStr("uart3:"); +// Sys_Usart3SendData(Usart3ReadBuf,(Usart3ReadFlag&(~(1<<15)))); +// +// Usart3ReadFlag = 0; +// memset((void *)Usart3ReadBuf,0,sizeof(Usart3ReadBuf)); +// } +} + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/com/uart3_receive.h b/firmware/stm32-esp/user/com/uart3_receive.h index e007392a..9d69704f 100644 --- a/firmware/stm32-esp/user/com/uart3_receive.h +++ b/firmware/stm32-esp/user/com/uart3_receive.h @@ -1,24 +1,24 @@ -#ifndef _UART3_RECEIVE_H_ -#define _UART3_RECEIVE_H_ - -#include "stm32f10x.h" - -#include "bsp_timer3.h" - -#include "bsp_uart3.h" - - -void BSP_UART3ReceiveInfor(void); - - -#endif - - - - - - - - - - +#ifndef _UART3_RECEIVE_H_ +#define _UART3_RECEIVE_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_uart3.h" + + +void BSP_UART3ReceiveInfor(void); + + +#endif + + + + + + + + + + diff --git a/firmware/stm32-esp/user/data/basic_data.c b/firmware/stm32-esp/user/data/basic_data.c index 366ded34..8ad6ef62 100644 --- a/firmware/stm32-esp/user/data/basic_data.c +++ b/firmware/stm32-esp/user/data/basic_data.c @@ -1,18 +1,18 @@ -#include "basic_data.h" - -uint8_t UART1ReadBuf[100] = {0}; -uint16_t UART1ReadFlag = 0; - -uint8_t UART2ReadBuf[100] = {0}; -uint16_t UART2ReadFlag = 0; - -uint8_t UART3ReadBuf[100] = {0}; -uint16_t UART3ReadFlag = 0; - -DevParam_t DevParam = {0}; - - - - - - +#include "basic_data.h" + +uint8_t UART1ReadBuf[100] = {0}; +uint16_t UART1ReadFlag = 0; + +uint8_t UART2ReadBuf[100] = {0}; +uint16_t UART2ReadFlag = 0; + +uint8_t UART3ReadBuf[100] = {0}; +uint16_t UART3ReadFlag = 0; + +DevParam_t DevParam = {0}; + + + + + + diff --git a/firmware/stm32-esp/user/data/basic_data.h b/firmware/stm32-esp/user/data/basic_data.h index 3e56b2aa..ff43fad8 100644 --- a/firmware/stm32-esp/user/data/basic_data.h +++ b/firmware/stm32-esp/user/data/basic_data.h @@ -1,65 +1,68 @@ -#ifndef _BASIC_DATA_H_ -#define _BASIC_DATA_H_ - -#include "stm32f10x.h" - -#define Device_LCD 1 - -extern uint8_t UART1ReadBuf[100]; -extern uint16_t UART1ReadFlag; - -extern uint8_t UART2ReadBuf[100]; -extern uint16_t UART2ReadFlag; - -extern uint8_t UART3ReadBuf[100]; -extern uint16_t UART3ReadFlag; - -typedef enum -{ - RunPhase_Standby = 0x01, - RunPhase_Runing = 0x02, - RunPhase_Close = 0x03 -}RunPhase_E; - -typedef struct -{ - uint16_t U3GetTime; - - uint8_t BatCheck; // 电池检测 - float BatVoltage; // 电池电压 - uint8_t BatSOC; // 电池SOC - uint8_t ShortBatSOC;// 显示电池SOC - uint8_t BatCharging;// 电池充电中 - - uint16_t BatInforGetTime; // 电池信息获取时间 - uint16_t BatIconRefreshTime;// 电池图标刷新时间 - - uint16_t AirInforGetTime; // 空气信息获取时间 - - uint16_t ESP8266SendTime; - - // 运行阶段 - RunPhase_E RunPhase; - RunPhase_E ShortRunPhase; - - uint8_t SideBeat; // 侧边标识 - uint16_t SideBeatTime; // 侧边跳动时间 - - uint16_t Server; - uint16_t ServerUpdateTime; - - uint16_t ShowPM1_0; - uint16_t ShowPM2_5; - uint16_t ShowPM10; - - uint16_t PM1_0; - uint16_t PM2_5; - uint16_t PM10; -}DevParam_t; -extern DevParam_t DevParam; - -#endif - - - - +#ifndef _BASIC_DATA_H_ +#define _BASIC_DATA_H_ + +#include "stm32f10x.h" + +#define Device_LCD 1 + +#define MQTT_SCode 1 +#define MQTT_AT 1 + +extern uint8_t UART1ReadBuf[100]; +extern uint16_t UART1ReadFlag; + +extern uint8_t UART2ReadBuf[100]; +extern uint16_t UART2ReadFlag; + +extern uint8_t UART3ReadBuf[100]; +extern uint16_t UART3ReadFlag; + +typedef enum +{ + RunPhase_Standby = 0x01, + RunPhase_Runing = 0x02, + RunPhase_Close = 0x03 +}RunPhase_E; + +typedef struct +{ + uint16_t U3GetTime; + + uint8_t BatCheck; // 电池检测 + float BatVoltage; // 电池电压 + uint8_t BatSOC; // 电池SOC + uint8_t ShortBatSOC;// 显示电池SOC + uint8_t BatCharging;// 电池充电中 + + uint16_t BatInforGetTime; // 电池信息获取时间 + uint16_t BatIconRefreshTime;// 电池图标刷新时间 + + uint16_t AirInforGetTime; // 空气信息获取时间 + + uint16_t ESP8266SendTime; + + // 运行阶段 + RunPhase_E RunPhase; + RunPhase_E ShortRunPhase; + + uint8_t SideBeat; // 侧边标识 + uint16_t SideBeatTime; // 侧边跳动时间 + + uint16_t Server; + uint16_t ServerUpdateTime; + + uint16_t ShowPM1_0; + uint16_t ShowPM2_5; + uint16_t ShowPM10; + + uint16_t PM1_0; + uint16_t PM2_5; + uint16_t PM10; +}DevParam_t; +extern DevParam_t DevParam; + +#endif + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_adc.c b/firmware/stm32-esp/user/drive/bsp_adc.c index 592c59d8..9c4b70f8 100644 --- a/firmware/stm32-esp/user/drive/bsp_adc.c +++ b/firmware/stm32-esp/user/drive/bsp_adc.c @@ -1,70 +1,70 @@ -#include "bsp_adc.h" - -void BSP_ADCInit(void) -{ - ADC_InitTypeDef ADC_InitStructure; - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA, ENABLE); - - RCC_ADCCLKConfig(RCC_PCLK2_Div6); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; - GPIO_Init(GPIOA,&GPIO_InitStructure); - - ADC_DeInit(ADC1); - - /* ADC1 configuration ------------------------------------------------------*/ - ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; - ADC_InitStructure.ADC_ScanConvMode = DISABLE; - ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; - ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; - ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; - ADC_InitStructure.ADC_NbrOfChannel = 1; - ADC_Init(ADC1, &ADC_InitStructure); - - ADC_Cmd(ADC1, ENABLE); - - ADC_ResetCalibration(ADC1); - while(ADC_GetResetCalibrationStatus(ADC1)); - ADC_StartCalibration(ADC1); - while(ADC_GetCalibrationStatus(ADC1)); - ADC_SoftwareStartConvCmd(ADC1,ENABLE); -} - -float ADC_GetSimpleData(void) -{ - float SimpleVoltage = 0; - uint8_t x = 0; - uint32_t total = 0; - for( x = 0;x < 5; x++) - { - // 开启转换,等待DMA传输结束 - ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 1, ADC_SampleTime_239Cycles5 ); - ADC_SoftwareStartConvCmd(ADC1, ENABLE); - while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC )){}//等待转换结束 - total += ADC_GetConversionValue(ADC1); - Delay_ms(2); - } - total = (uint32_t)(total/5); - SimpleVoltage = (float)total*3.3/4096.0*2.0; - return SimpleVoltage; -} - - - - - - - - - - - - - - - - - +#include "bsp_adc.h" + +void BSP_ADCInit(void) +{ + ADC_InitTypeDef ADC_InitStructure; + GPIO_InitTypeDef GPIO_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_GPIOA, ENABLE); + + RCC_ADCCLKConfig(RCC_PCLK2_Div6); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN; + GPIO_Init(GPIOA,&GPIO_InitStructure); + + ADC_DeInit(ADC1); + + /* ADC1 configuration ------------------------------------------------------*/ + ADC_InitStructure.ADC_Mode = ADC_Mode_Independent; + ADC_InitStructure.ADC_ScanConvMode = DISABLE; + ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; + ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None; + ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; + ADC_InitStructure.ADC_NbrOfChannel = 1; + ADC_Init(ADC1, &ADC_InitStructure); + + ADC_Cmd(ADC1, ENABLE); + + ADC_ResetCalibration(ADC1); + while(ADC_GetResetCalibrationStatus(ADC1)); + ADC_StartCalibration(ADC1); + while(ADC_GetCalibrationStatus(ADC1)); + ADC_SoftwareStartConvCmd(ADC1,ENABLE); +} + +float ADC_GetSimpleData(void) +{ + float SimpleVoltage = 0; + uint8_t x = 0; + uint32_t total = 0; + for( x = 0;x < 5; x++) + { + // 开启转换,等待DMA传输结束 + ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 1, ADC_SampleTime_239Cycles5 ); + ADC_SoftwareStartConvCmd(ADC1, ENABLE); + while(!ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC )){}//等待转换结束 + total += ADC_GetConversionValue(ADC1); + Delay_ms(2); + } + total = (uint32_t)(total/5); + SimpleVoltage = (float)total*3.3/4096.0*2.0; + return SimpleVoltage; +} + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_adc.h b/firmware/stm32-esp/user/drive/bsp_adc.h index 9a0ff8a8..26b2379b 100644 --- a/firmware/stm32-esp/user/drive/bsp_adc.h +++ b/firmware/stm32-esp/user/drive/bsp_adc.h @@ -1,17 +1,17 @@ -#ifndef _BSP_ADC_H_ -#define _BSP_ADC_H_ - -#include "stm32f10x.h" -#include "string.h" - -#include "bsp_port.h" - -#include "bsp_timer3.h" - -#include "basic_data.h" - -void BSP_ADCInit(void); -float ADC_GetSimpleData(void); - -#endif - +#ifndef _BSP_ADC_H_ +#define _BSP_ADC_H_ + +#include "stm32f10x.h" +#include "string.h" + +#include "bsp_port.h" + +#include "bsp_timer3.h" + +#include "basic_data.h" + +void BSP_ADCInit(void); +float ADC_GetSimpleData(void); + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_clock.c b/firmware/stm32-esp/user/drive/bsp_clock.c index 422c5ec2..9eaef54f 100644 --- a/firmware/stm32-esp/user/drive/bsp_clock.c +++ b/firmware/stm32-esp/user/drive/bsp_clock.c @@ -1,53 +1,53 @@ -#include "bsp_clock.h" - -static uint8_t fac_us = 0; -static uint16_t fac_ms = 0; - -//功能：systick初始化 -void BSP_ClockInit(void) -{ - SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); //选择外部时钟 HCLK/8 - fac_us=SystemCoreClock/8000000;//为系统时钟的1/8 - fac_ms = (uint16_t)fac_us*1000; -} - -//功能：毫秒级延时,最多1864ms -void Delay_ms(uint32_t nms) -{ - uint32_t temp = 0; - SysTick->LOAD=(uint32_t)nms*fac_ms;//时间加载(SysTick->LOAD为24bit) - SysTick->VAL =0x00; //清空计数器 - SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 - do - { - temp=SysTick->CTRL; - } - while( (temp&0x01) && (!(temp&(1<<16))) );//等待时间到达 - SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 - SysTick->VAL =0X00; //清空计数器 -} - -//功能：微秒级延时，最多1800ms -void Delay_us(uint32_t nus) -{ - uint32_t temp; - SysTick->LOAD=nus*fac_us; //时间加载 - SysTick->VAL=0x00; //清空计数器 - SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 - do - { - temp=SysTick->CTRL; - } - while( (temp&0x01) && (!(temp&(1<<16))) );//等待时间到达 - SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 - SysTick->VAL =0X00; //清空计数器 -} - - - - - - - - - +#include "bsp_clock.h" + +static uint8_t fac_us = 0; +static uint16_t fac_ms = 0; + +//功能：systick初始化 +void BSP_ClockInit(void) +{ + SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8); //选择外部时钟 HCLK/8 + fac_us=SystemCoreClock/8000000;//为系统时钟的1/8 + fac_ms = (uint16_t)fac_us*1000; +} + +//功能：毫秒级延时,最多1864ms +void Delay_ms(uint32_t nms) +{ + uint32_t temp = 0; + SysTick->LOAD=(uint32_t)nms*fac_ms;//时间加载(SysTick->LOAD为24bit) + SysTick->VAL =0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; + } + while( (temp&0x01) && (!(temp&(1<<16))) );//等待时间到达 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 +} + +//功能：微秒级延时，最多1800ms +void Delay_us(uint32_t nus) +{ + uint32_t temp; + SysTick->LOAD=nus*fac_us; //时间加载 + SysTick->VAL=0x00; //清空计数器 + SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ; //开始倒数 + do + { + temp=SysTick->CTRL; + } + while( (temp&0x01) && (!(temp&(1<<16))) );//等待时间到达 + SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk; //关闭计数器 + SysTick->VAL =0X00; //清空计数器 +} + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_clock.h b/firmware/stm32-esp/user/drive/bsp_clock.h index 3c1a418b..d5183c1d 100644 --- a/firmware/stm32-esp/user/drive/bsp_clock.h +++ b/firmware/stm32-esp/user/drive/bsp_clock.h @@ -1,12 +1,12 @@ -#ifndef _BSP_CLOCK_H_ -#define _BSP_CLOCK_H_ - -#include "stm32f10x.h" - -void Delay_ms(uint32_t nms); -void Delay_us(uint32_t nus); - -void BSP_ClockInit(void); - -#endif - +#ifndef _BSP_CLOCK_H_ +#define _BSP_CLOCK_H_ + +#include "stm32f10x.h" + +void Delay_ms(uint32_t nms); +void Delay_us(uint32_t nus); + +void BSP_ClockInit(void); + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_port.c b/firmware/stm32-esp/user/drive/bsp_port.c index 7ebe5bc5..1928ba41 100644 --- a/firmware/stm32-esp/user/drive/bsp_port.c +++ b/firmware/stm32-esp/user/drive/bsp_port.c @@ -1,74 +1,74 @@ -#include "bsp_port.h" - -// 禁用JTAG引脚,保留SWD引脚 -void Sys_DisableJTAGEnableSWD(void) -{ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE); //开启AFIO时钟 - GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable,ENABLE); //禁止JTAG功能 -} - -// PM 初始化 -void BSP_PowerInit(void) -{ - GPIO_InitTypeDef GPIO_InitStructure; - EXTI_InitTypeDef EXTI_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC,ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1|GPIO_Pin_12|GPIO_Pin_13; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOB,&GPIO_InitStructure); - - Power_PMD4(0); Power_3V3(0); Power_LCD(0); - - // 唤醒/正在充电指示/充电完成 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_14; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; - GPIO_Init(GPIOC,&GPIO_InitStructure); - - /* Configure one bit for preemption priority */ - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); - - /* 配置P[A|B|C|D|E]0为中断源 */ - NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; - GPIO_Init(GPIOC,&GPIO_InitStructure); - - GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource15); - EXTI_InitStructure.EXTI_Line = EXTI15_10_IRQn; - EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; - EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; //下降沿中断 - EXTI_InitStructure.EXTI_LineCmd = ENABLE; - EXTI_Init(&EXTI_InitStructure); -} - -void EXTI15_10_IRQHandler(void) -{ - if(EXTI_GetITStatus(EXTI_Line15) != RESET) - { - EXTI_ClearITPendingBit(EXTI_Line15); - - if(DevParam.RunPhase == 0) - { - BSP_Restart(); - } - } -} - -// mcu 重新启动 -void BSP_Restart(void){ - __set_FAULTMASK(1); - NVIC_SystemReset(); -} - - - +#include "bsp_port.h" + +// 禁用JTAG引脚,保留SWD引脚 +void Sys_DisableJTAGEnableSWD(void) +{ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO,ENABLE); //开启AFIO时钟 + GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable,ENABLE); //禁止JTAG功能 +} + +// PM 初始化 +void BSP_PowerInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + EXTI_InitTypeDef EXTI_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC,ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1|GPIO_Pin_12|GPIO_Pin_13; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOB,&GPIO_InitStructure); + + Power_PMD4(0); Power_3V3(0); Power_LCD(0); + + // 唤醒/正在充电指示/充电完成 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_14; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + /* Configure one bit for preemption priority */ + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1); + + /* 配置P[A|B|C|D|E]0为中断源 */ + NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPD; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource15); + EXTI_InitStructure.EXTI_Line = EXTI15_10_IRQn; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; //下降沿中断 + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); +} + +void EXTI15_10_IRQHandler(void) +{ + if(EXTI_GetITStatus(EXTI_Line15) != RESET) + { + EXTI_ClearITPendingBit(EXTI_Line15); + + if(DevParam.RunPhase == 0) + { + BSP_Restart(); + } + } +} + +// mcu 重新启动 +void BSP_Restart(void){ + __set_FAULTMASK(1); + NVIC_SystemReset(); +} + + + diff --git a/firmware/stm32-esp/user/drive/bsp_port.h b/firmware/stm32-esp/user/drive/bsp_port.h index 23c0a77f..6c26b2b4 100644 --- a/firmware/stm32-esp/user/drive/bsp_port.h +++ b/firmware/stm32-esp/user/drive/bsp_port.h @@ -1,34 +1,34 @@ -#ifndef _BSP_PORT_H_ -#define _BSP_PORT_H_ - -#include "stm32f10x.h" - -#include "bsp_clock.h" - -#include "bsp_timer3.h" - -#include "basic_data.h" - -// 禁用JTAG引脚,保留SWD引脚 -void Sys_DisableJTAGEnableSWD(void); - -#define Power_PMD4(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_1) :GPIO_ResetBits(GPIOB,GPIO_Pin_1) // PM2.5 -#define Power_LCD(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_12):GPIO_ResetBits(GPIOB,GPIO_Pin_12)// LCD -#define Power_3V3(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_13):GPIO_ResetBits(GPIOB,GPIO_Pin_13)// 3.3V - -#define Read_BatCharging() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_13)// 电池充电中状态，低电平有效 -#define Read_BatComplete() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_14)// 电池充电完成状态，低电平有效 -#define Read_BootKey() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_15)// 开机按键 -void BSP_PowerInit(void); -void Dev_ReadIndicate(void); - -// 重启 -void BSP_Restart(void); - - - -#endif - - - - +#ifndef _BSP_PORT_H_ +#define _BSP_PORT_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "bsp_timer3.h" + +#include "basic_data.h" + +// 禁用JTAG引脚,保留SWD引脚 +void Sys_DisableJTAGEnableSWD(void); + +#define Power_PMD4(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_1) :GPIO_ResetBits(GPIOB,GPIO_Pin_1) // PM2.5 +#define Power_LCD(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_12):GPIO_ResetBits(GPIOB,GPIO_Pin_12)// LCD +#define Power_3V3(x) (x)?GPIO_SetBits(GPIOB,GPIO_Pin_13):GPIO_ResetBits(GPIOB,GPIO_Pin_13)// 3.3V + +#define Read_BatCharging() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_13)// 电池充电中状态，低电平有效 +#define Read_BatComplete() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_14)// 电池充电完成状态，低电平有效 +#define Read_BootKey() GPIO_ReadInputDataBit(GPIOC, GPIO_Pin_15)// 开机按键 +void BSP_PowerInit(void); +void Dev_ReadIndicate(void); + +// 重启 +void BSP_Restart(void); + + + +#endif + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_timer3.c b/firmware/stm32-esp/user/drive/bsp_timer3.c index a19201ee..d3da7aad 100644 --- a/firmware/stm32-esp/user/drive/bsp_timer3.c +++ b/firmware/stm32-esp/user/drive/bsp_timer3.c @@ -1,123 +1,123 @@ -#include "bsp_timer3.h" - -/*如果Period=N*10，那么每隔N毫秒中断一次。*/ -void BSP_Timer3Init(void){ - TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; - NVIC_InitTypeDef NVIC_InitStructure; - - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); //时钟使能 - - TIM_TimeBaseStructure.TIM_Period = 9; //设置在下一个更新事件装入活动的自动重装载寄存器周期的值 计数到N*10为Nms - TIM_TimeBaseStructure.TIM_Prescaler =(7200-1); //设置用来作为TIMx时钟频率除数的预分频值 10Khz的计数频率 - TIM_TimeBaseStructure.TIM_ClockDivision = 0; //设置时钟分割:TDTS = Tck_tim - TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIM向上计数模式 - TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); //根据TIM_TimeBaseInitStruct中指定的参数初始化TIMx的时间基数单位 - - TIM_ITConfig( //使能或者失能指定的TIM中断 - TIM3, //TIM3 - TIM_IT_Update| //TIM 中断源 - TIM_IT_Trigger,//TIM 触发中断源 - ENABLE //使能 - ); - /*配置中断优先级*/ - NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; //TIM3中断 - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //先占优先级0级 - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //从优先级3级 - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQ通道被使能 - NVIC_Init(&NVIC_InitStructure);//根据NVIC_InitStruct中指定的参数初始化外设NVIC寄存器 - - TIM_Cmd(TIM3, ENABLE); //使能TIMx外设 -} - -uint16_t UART2Count = 0; -uint8_t UART2RecTime = 0; - -uint16_t UART3Count = 0; -uint8_t UART3RecTime = 0; - -void TIM3_IRQHandler(void) //TIM3中断服务程序 -{ - if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET)//检查指定的TIM中断发生与否 - { - TIM_ClearITPendingBit(TIM3,TIM_IT_Update); //清除TIMx的中断标志位 - - // 串口2接收判断 - if((UART2ReadFlag!=0)&&(!(UART2ReadFlag&0x8000))) - { - if(UART2RecTime<=200) - UART2RecTime++; - if(UART2RecTime >= 20) - { - if(UART2Count == UART2ReadFlag) - { - UART2ReadFlag |= (1 << 15); - UART2Count = 0; - UART2RecTime = 0; - } - else - { - UART2Count = UART2ReadFlag; - UART2RecTime = 0; - } - } - } - else { UART2RecTime = 0; UART2Count = 0; } - // 串口3接收判断 - if((UART3ReadFlag!=0)&&(!(UART3ReadFlag&0x8000))) - { - if(UART3RecTime <= 100) - UART3RecTime++; - if(UART3RecTime >= 20) - { - if(UART3Count == UART3ReadFlag) - { - UART3ReadFlag |= (1 << 15); - UART3Count = 0; - UART3RecTime = 0; - } - else - { - UART3Count = UART3ReadFlag; - UART3RecTime = 0; - } - } - } - else { UART3RecTime = 0; UART3Count = 0; } - - // 空气信息获取时间 - if(DevParam.AirInforGetTime<65000) - DevParam.AirInforGetTime++; - // 电池图标刷新时间 - if(DevParam.BatIconRefreshTime<65000) - DevParam.BatIconRefreshTime++; - // 电池信息获取时间 - if(DevParam.BatInforGetTime<65000) - DevParam.BatInforGetTime++; - // 侧边跳动时间 - if(DevParam.SideBeatTime<65000) - DevParam.SideBeatTime++; - // 上报到服务器状态时间 - if(DevParam.ServerUpdateTime<65000) - DevParam.ServerUpdateTime++; - // 发送时间 - if(DevParam.ESP8266SendTime<65000) - DevParam.ESP8266SendTime++; - } -} - - - - - - - - - - - - - - - - - +#include "bsp_timer3.h" + +/*如果Period=N*10，那么每隔N毫秒中断一次。*/ +void BSP_Timer3Init(void){ + TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); //时钟使能 + + TIM_TimeBaseStructure.TIM_Period = 9; //设置在下一个更新事件装入活动的自动重装载寄存器周期的值 计数到N*10为Nms + TIM_TimeBaseStructure.TIM_Prescaler =(7200-1); //设置用来作为TIMx时钟频率除数的预分频值 10Khz的计数频率 + TIM_TimeBaseStructure.TIM_ClockDivision = 0; //设置时钟分割:TDTS = Tck_tim + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIM向上计数模式 + TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); //根据TIM_TimeBaseInitStruct中指定的参数初始化TIMx的时间基数单位 + + TIM_ITConfig( //使能或者失能指定的TIM中断 + TIM3, //TIM3 + TIM_IT_Update| //TIM 中断源 + TIM_IT_Trigger,//TIM 触发中断源 + ENABLE //使能 + ); + /*配置中断优先级*/ + NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn; //TIM3中断 + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //先占优先级0级 + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //从优先级3级 + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQ通道被使能 + NVIC_Init(&NVIC_InitStructure);//根据NVIC_InitStruct中指定的参数初始化外设NVIC寄存器 + + TIM_Cmd(TIM3, ENABLE); //使能TIMx外设 +} + +uint16_t UART2Count = 0; +uint8_t UART2RecTime = 0; + +uint16_t UART3Count = 0; +uint8_t UART3RecTime = 0; + +void TIM3_IRQHandler(void) //TIM3中断服务程序 +{ + if (TIM_GetITStatus(TIM3, TIM_IT_Update) != RESET)//检查指定的TIM中断发生与否 + { + TIM_ClearITPendingBit(TIM3,TIM_IT_Update); //清除TIMx的中断标志位 + + // 串口2接收判断 + if((UART2ReadFlag!=0)&&(!(UART2ReadFlag&0x8000))) + { + if(UART2RecTime<=200) + UART2RecTime++; + if(UART2RecTime >= 20) + { + if(UART2Count == UART2ReadFlag) + { + UART2ReadFlag |= (1 << 15); + UART2Count = 0; + UART2RecTime = 0; + } + else + { + UART2Count = UART2ReadFlag; + UART2RecTime = 0; + } + } + } + else { UART2RecTime = 0; UART2Count = 0; } + // 串口3接收判断 + if((UART3ReadFlag!=0)&&(!(UART3ReadFlag&0x8000))) + { + if(UART3RecTime <= 100) + UART3RecTime++; + if(UART3RecTime >= 20) + { + if(UART3Count == UART3ReadFlag) + { + UART3ReadFlag |= (1 << 15); + UART3Count = 0; + UART3RecTime = 0; + } + else + { + UART3Count = UART3ReadFlag; + UART3RecTime = 0; + } + } + } + else { UART3RecTime = 0; UART3Count = 0; } + + // 空气信息获取时间 + if(DevParam.AirInforGetTime<65000) + DevParam.AirInforGetTime++; + // 电池图标刷新时间 + if(DevParam.BatIconRefreshTime<65000) + DevParam.BatIconRefreshTime++; + // 电池信息获取时间 + if(DevParam.BatInforGetTime<65000) + DevParam.BatInforGetTime++; + // 侧边跳动时间 + if(DevParam.SideBeatTime<65000) + DevParam.SideBeatTime++; + // 上报到服务器状态时间 + if(DevParam.ServerUpdateTime<65000) + DevParam.ServerUpdateTime++; + // 发送时间 + if(DevParam.ESP8266SendTime<65000) + DevParam.ESP8266SendTime++; + } +} + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_timer3.h b/firmware/stm32-esp/user/drive/bsp_timer3.h index 8efc8ba1..62cc4c36 100644 --- a/firmware/stm32-esp/user/drive/bsp_timer3.h +++ b/firmware/stm32-esp/user/drive/bsp_timer3.h @@ -1,15 +1,15 @@ -#ifndef _BSP_TIMER3_H_ -#define _BSP_TIMER3_H_ - -#include "stm32f10x.h" - -#include "bsp_uart3.h" - -#include "esp8266_uart2.h" - -#include "basic_data.h" - -void BSP_Timer3Init(void); - -#endif - +#ifndef _BSP_TIMER3_H_ +#define _BSP_TIMER3_H_ + +#include "stm32f10x.h" + +#include "bsp_uart3.h" + +#include "esp8266_uart2.h" + +#include "basic_data.h" + +void BSP_Timer3Init(void); + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_tool.c b/firmware/stm32-esp/user/drive/bsp_tool.c index 1d31fd69..07e1629c 100644 --- a/firmware/stm32-esp/user/drive/bsp_tool.c +++ b/firmware/stm32-esp/user/drive/bsp_tool.c @@ -1,2 +1,2 @@ -#include "bsp_tool.h" - +#include "bsp_tool.h" + diff --git a/firmware/stm32-esp/user/drive/bsp_tool.h b/firmware/stm32-esp/user/drive/bsp_tool.h index fcb2c4fe..b0292ece 100644 --- a/firmware/stm32-esp/user/drive/bsp_tool.h +++ b/firmware/stm32-esp/user/drive/bsp_tool.h @@ -1,11 +1,11 @@ -#ifndef _BSP_TOOL_H_ -#define _BSP_TOOL_H_ - -#include "stm32f10x.h" - -#include "bsp_clock.h" - -#include "basic_data.h" - -#endif - +#ifndef _BSP_TOOL_H_ +#define _BSP_TOOL_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "basic_data.h" + +#endif + diff --git a/firmware/stm32-esp/user/drive/bsp_uart1.c b/firmware/stm32-esp/user/drive/bsp_uart1.c index e1d6f012..ae58e3cd 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart1.c +++ b/firmware/stm32-esp/user/drive/bsp_uart1.c @@ -1,107 +1,107 @@ -#include "bsp_uart1.h" - -void BSP_UART1SendStr(char *ch){ - uint16_t i = 0,j = 0; - j = strlen(ch); - - for(i = 0;i < j;i++) - { - while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET){}; - USART_SendData(USART1,ch[i]); - } - while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); -} - -// 发送数据 -void BSP_UART1SendData(uint8_t *ch,uint16_t len){ - uint16_t i; - for(i = 0;i < len;i++) - { - while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET){}; - USART_SendData(USART1,ch[i]); - } - while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); -} - -void BSP_UART1Init(uint32_t bound){ - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; - //使能USART1,GPIOA - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOA,ENABLE); - - //USART1_TX GPIOA.9 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - //USART1_RX GPIOA.10初始化 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - //Usart1 NVIC 配置 - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); - - NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - //USART 初始化设置 - USART_InitStructure.USART_BaudRate = bound; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART1,&USART_InitStructure); - - USART_ITConfig(USART1,USART_IT_RXNE,ENABLE); - USART_Cmd(USART1, ENABLE); -} - -// 读取USARTx->SR能避免莫名其妙的错误 -uint8_t Usart1ReadBuf[100] = {0}; -uint16_t Usart1ReadFlag = 0; -void USART1_IRQHandler(void){ - uint8_t res = 0; - if(USART_GetITStatus(USART1,USART_IT_RXNE) != RESET) - { - res =USART_ReceiveData(USART1); - - // 是否存在数据没有处理 - if( (Usart1ReadFlag&0x8000)==0 ) - { - Usart1ReadBuf[Usart1ReadFlag] = res; - Usart1ReadFlag++; - - // 判断是否接收结束 - if(Usart1ReadFlag>=90) - { - Usart1ReadFlag |= (1 << 15); - } - } - } - //溢出-如果发生溢出需要先读SR,再读DR,则可清除不断入中断的问题 - if( USART_GetFlagStatus(USART1,USART_FLAG_ORE)==SET ) - { - USART_ReceiveData(USART1); - USART_ClearFlag(USART1,USART_FLAG_ORE); - } - USART_ClearFlag(USART1,USART_IT_RXNE); -} - - - - - - - - - - - - +#include "bsp_uart1.h" + +void BSP_UART1SendStr(char *ch){ + uint16_t i = 0,j = 0; + j = strlen(ch); + + for(i = 0;i < j;i++) + { + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET){}; + USART_SendData(USART1,ch[i]); + } + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); +} + +// 发送数据 +void BSP_UART1SendData(uint8_t *ch,uint16_t len){ + uint16_t i; + for(i = 0;i < len;i++) + { + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET){}; + USART_SendData(USART1,ch[i]); + } + while(USART_GetFlagStatus(USART1,USART_FLAG_TC)==RESET); +} + +void BSP_UART1Init(uint32_t bound){ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + //使能USART1,GPIOA + RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1|RCC_APB2Periph_GPIOA,ENABLE); + + //USART1_TX GPIOA.9 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + //USART1_RX GPIOA.10初始化 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + //Usart1 NVIC 配置 + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + + NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + //USART 初始化设置 + USART_InitStructure.USART_BaudRate = bound; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART1,&USART_InitStructure); + + USART_ITConfig(USART1,USART_IT_RXNE,ENABLE); + USART_Cmd(USART1, ENABLE); +} + +// 读取USARTx->SR能避免莫名其妙的错误 +uint8_t Usart1ReadBuf[100] = {0}; +uint16_t Usart1ReadFlag = 0; +void USART1_IRQHandler(void){ + uint8_t res = 0; + if(USART_GetITStatus(USART1,USART_IT_RXNE) != RESET) + { + res =USART_ReceiveData(USART1); + + // 是否存在数据没有处理 + if( (Usart1ReadFlag&0x8000)==0 ) + { + Usart1ReadBuf[Usart1ReadFlag] = res; + Usart1ReadFlag++; + + // 判断是否接收结束 + if(Usart1ReadFlag>=90) + { + Usart1ReadFlag |= (1 << 15); + } + } + } + //溢出-如果发生溢出需要先读SR,再读DR,则可清除不断入中断的问题 + if( USART_GetFlagStatus(USART1,USART_FLAG_ORE)==SET ) + { + USART_ReceiveData(USART1); + USART_ClearFlag(USART1,USART_FLAG_ORE); + } + USART_ClearFlag(USART1,USART_IT_RXNE); +} + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_uart1.h b/firmware/stm32-esp/user/drive/bsp_uart1.h index f5c03333..35c73e28 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart1.h +++ b/firmware/stm32-esp/user/drive/bsp_uart1.h @@ -1,22 +1,22 @@ -#ifndef _BSP_UART1_H_ -#define _BSP_UART1_H_ - -#include "stm32f10x.h" -#include "bsp_clock.h" - -#include "stdio.h" -#include "string.h" -#include "stdarg.h" - -#include "bsp_timer3.h" - - -void Sys_SendLog(const char *fmt, ...); - -// 判断串口01接收完成 -void BSP_UART1RecComplete(uint64_t Std_1ms); -void BSP_UART1SendStr(char *ch); -void BSP_UART1SendData(uint8_t *ch,uint16_t len); -void BSP_UART1Init(uint32_t bound); - -#endif +#ifndef _BSP_UART1_H_ +#define _BSP_UART1_H_ + +#include "stm32f10x.h" +#include "bsp_clock.h" + +#include "stdio.h" +#include "string.h" +#include "stdarg.h" + +#include "bsp_timer3.h" + + +void Sys_SendLog(const char *fmt, ...); + +// 判断串口01接收完成 +void BSP_UART1RecComplete(uint64_t Std_1ms); +void BSP_UART1SendStr(char *ch); +void BSP_UART1SendData(uint8_t *ch,uint16_t len); +void BSP_UART1Init(uint32_t bound); + +#endif diff --git a/firmware/stm32-esp/user/drive/bsp_uart2.c b/firmware/stm32-esp/user/drive/bsp_uart2.c index 077dd0bb..fb5f9208 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart2.c +++ b/firmware/stm32-esp/user/drive/bsp_uart2.c @@ -1,111 +1,111 @@ -#include "bsp_uart2.h" - -// 串口2 PA2 TX PA3 RX -void Dev_UART2SendStr(char* fmt,...){ - uint8_t tbuf[200] = {0}; - uint16_t i = 0,j = 0; - - va_list ap; - va_start(ap,fmt); - vsprintf((char*)tbuf, fmt, ap); - va_end(ap); - - j = strlen((const char*)tbuf); - - for( i = 0; i < j; i++) - { - while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){}; - USART_SendData(USART2, tbuf[i]); - } - while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET); -} -// 发送数据 -void Dev_UART2SendData(uint8_t *ch,uint16_t len){ - uint16_t i = 0; - for(i = 0;i < len;i++) - { - while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; - USART_SendData(USART2,ch[i]); - } - while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET); -} - -void BSP_UART2Init(uint32_t bound) -{ - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; - - //使能USART,GPIO - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2,ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(GPIOA, &GPIO_InitStructure); - - // NVIC 配置 - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); - - NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - // USART 配置 - USART_InitStructure.USART_BaudRate = bound; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART2, &USART_InitStructure); - - USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);//开启串口接受中断 - USART_Cmd(USART2, ENABLE); //使能串口 -} - -/*读取USARTx->SR能避免莫名其妙的错误*/ -void USART2_IRQHandler(void) -{ - uint8_t res = 0; - if(USART_GetITStatus(USART2, USART_IT_RXNE)!=RESET) - { - res = USART_ReceiveData(USART2); - - // 是否存在数据没有处理 - if( (UART2ReadFlag&0x8000)==0 ) - { - UART2ReadBuf[UART2ReadFlag++] = res; - if(UART2ReadFlag>=90) - { - UART2ReadFlag |= (1 << 15); - } - } - } - /*溢出-如果发生溢出需要先读SR,再读DR寄存器则可清除不断入中断的问题*/ - if( USART_GetFlagStatus(USART2, USART_FLAG_ORE)==SET ) - { - USART_ReceiveData(USART2); - USART_ClearFlag(USART2, USART_FLAG_ORE); - } - USART_ClearFlag(USART2, USART_IT_RXNE); -} - - - - - - - - - - - - +#include "bsp_uart2.h" + +// 串口2 PA2 TX PA3 RX +void Dev_UART2SendStr(char* fmt,...){ + uint8_t tbuf[200] = {0}; + uint16_t i = 0,j = 0; + + va_list ap; + va_start(ap,fmt); + vsprintf((char*)tbuf, fmt, ap); + va_end(ap); + + j = strlen((const char*)tbuf); + + for( i = 0; i < j; i++) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, tbuf[i]); + } + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET); +} +// 发送数据 +void Dev_UART2SendData(uint8_t *ch,uint16_t len){ + uint16_t i = 0; + for(i = 0;i < len;i++) + { + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2,ch[i]); + } + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET); +} + +void BSP_UART2Init(uint32_t bound) +{ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + //使能USART,GPIO + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2,ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + // NVIC 配置 + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + + NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + // USART 配置 + USART_InitStructure.USART_BaudRate = bound; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART2, &USART_InitStructure); + + USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);//开启串口接受中断 + USART_Cmd(USART2, ENABLE); //使能串口 +} + +/*读取USARTx->SR能避免莫名其妙的错误*/ +void USART2_IRQHandler(void) +{ + uint8_t res = 0; + if(USART_GetITStatus(USART2, USART_IT_RXNE)!=RESET) + { + res = USART_ReceiveData(USART2); + + // 是否存在数据没有处理 + if( (UART2ReadFlag&0x8000)==0 ) + { + UART2ReadBuf[UART2ReadFlag++] = res; + if(UART2ReadFlag>=90) + { + UART2ReadFlag |= (1 << 15); + } + } + } + /*溢出-如果发生溢出需要先读SR,再读DR寄存器则可清除不断入中断的问题*/ + if( USART_GetFlagStatus(USART2, USART_FLAG_ORE)==SET ) + { + USART_ReceiveData(USART2); + USART_ClearFlag(USART2, USART_FLAG_ORE); + } + USART_ClearFlag(USART2, USART_IT_RXNE); +} + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_uart2.h b/firmware/stm32-esp/user/drive/bsp_uart2.h index b3f7bffd..a61b414f 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart2.h +++ b/firmware/stm32-esp/user/drive/bsp_uart2.h @@ -1,19 +1,19 @@ -#ifndef _BSP_UART2_H_ -#define _BSP_UART2_H_ - -#include "stm32f10x.h" -#include "bsp_clock.h" - -#include "stdio.h" -#include "string.h" -#include "stdarg.h" - -#include "bsp_timer3.h" - -#include "basic_data.h" - -void Dev_UART2SendStr(char* fmt,...); -void Dev_UART2SendData(uint8_t *ch, uint16_t len); -void BSP_UART2Init(uint32_t bound); - -#endif +#ifndef _BSP_UART2_H_ +#define _BSP_UART2_H_ + +#include "stm32f10x.h" +#include "bsp_clock.h" + +#include "stdio.h" +#include "string.h" +#include "stdarg.h" + +#include "bsp_timer3.h" + +#include "basic_data.h" + +void Dev_UART2SendStr(char* fmt,...); +void Dev_UART2SendData(uint8_t *ch, uint16_t len); +void BSP_UART2Init(uint32_t bound); + +#endif diff --git a/firmware/stm32-esp/user/drive/bsp_uart3.c b/firmware/stm32-esp/user/drive/bsp_uart3.c index f29dca5d..aa1c7b9c 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart3.c +++ b/firmware/stm32-esp/user/drive/bsp_uart3.c @@ -1,109 +1,109 @@ -#include "bsp_uart3.h" - -// 串口3 PB10 TX PB11 RX -void BSP_UART3SendStr(char *ch){ - uint16_t i = 0,j = 0; - j = strlen(ch); - - for(i = 0;i < j;i++) - { - while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET){}; - USART_SendData(USART3,ch[i]); - } - while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET); -} - -// 发送数据 -void BSP_UART3SendData(uint8_t *ch,uint16_t len){ - uint16_t i = 0; - for(i = 0;i < len;i++) - { - while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET){}; - USART_SendData(USART3,ch[i]); - } - while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET); -} - -void BSP_UART3Init(uint32_t bound){ - GPIO_InitTypeDef GPIO_InitStructure; - USART_InitTypeDef USART_InitStructure; - NVIC_InitTypeDef NVIC_InitStructure; - - //使能USART3,GPIOB - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3,ENABLE); - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); - - //USART3_TX GPIOB10 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_Init(GPIOB, &GPIO_InitStructure); - - //USART3_RX GPIOB11 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_Init(GPIOB, &GPIO_InitStructure); - - //Usart3 NVIC 配置 - NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); - - NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - //USART 初始化设置 - USART_InitStructure.USART_BaudRate = bound; - USART_InitStructure.USART_WordLength = USART_WordLength_8b; - USART_InitStructure.USART_StopBits = USART_StopBits_1; - USART_InitStructure.USART_Parity = USART_Parity_No; - USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; - USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; - USART_Init(USART3, &USART_InitStructure); - - USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);//开启串口接受中断 - USART_Cmd(USART3, ENABLE); //使能串口 -} - -// 读取USARTx->SR能避免莫名其妙的错误 -uint8_t Usart3ReadBuf[60] = {0}; -uint16_t Usart3ReadFlag = 0; -void USART3_IRQHandler(void) -{ - uint8_t res = 0; - if(USART_GetITStatus(USART3, USART_IT_RXNE) != RESET) - { - res = USART_ReceiveData(USART3); - - // 是否存在数据没有处理 - if( (Usart3ReadFlag&0x8000)==0 ) - { - Usart3ReadBuf[Usart3ReadFlag] = res; - Usart3ReadFlag++; - if(Usart3ReadFlag>=59) - { - Usart3ReadFlag |= (1 << 15); - } - } - } - //溢出-如果发生溢出需要先读SR,再读DR寄存器则可清除不断入中断的问题 - if( USART_GetFlagStatus(USART3,USART_FLAG_ORE)==SET ) - { - USART_ReceiveData(USART3); - USART_ClearFlag(USART3,USART_FLAG_ORE); - } - USART_ClearFlag(USART3,USART_IT_RXNE); -} - - - - - - - - - - - - +#include "bsp_uart3.h" + +// 串口3 PB10 TX PB11 RX +void BSP_UART3SendStr(char *ch){ + uint16_t i = 0,j = 0; + j = strlen(ch); + + for(i = 0;i < j;i++) + { + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET){}; + USART_SendData(USART3,ch[i]); + } + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET); +} + +// 发送数据 +void BSP_UART3SendData(uint8_t *ch,uint16_t len){ + uint16_t i = 0; + for(i = 0;i < len;i++) + { + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET){}; + USART_SendData(USART3,ch[i]); + } + while(USART_GetFlagStatus(USART3,USART_FLAG_TC)==RESET); +} + +void BSP_UART3Init(uint32_t bound){ + GPIO_InitTypeDef GPIO_InitStructure; + USART_InitTypeDef USART_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + //使能USART3,GPIOB + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3,ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); + + //USART3_TX GPIOB10 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_Init(GPIOB, &GPIO_InitStructure); + + //USART3_RX GPIOB11 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_Init(GPIOB, &GPIO_InitStructure); + + //Usart3 NVIC 配置 + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + + NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority= 3; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + //USART 初始化设置 + USART_InitStructure.USART_BaudRate = bound; + USART_InitStructure.USART_WordLength = USART_WordLength_8b; + USART_InitStructure.USART_StopBits = USART_StopBits_1; + USART_InitStructure.USART_Parity = USART_Parity_No; + USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; + USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; + USART_Init(USART3, &USART_InitStructure); + + USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);//开启串口接受中断 + USART_Cmd(USART3, ENABLE); //使能串口 +} + +// 读取USARTx->SR能避免莫名其妙的错误 +uint8_t Usart3ReadBuf[60] = {0}; +uint16_t Usart3ReadFlag = 0; +void USART3_IRQHandler(void) +{ + uint8_t res = 0; + if(USART_GetITStatus(USART3, USART_IT_RXNE) != RESET) + { + res = USART_ReceiveData(USART3); + + // 是否存在数据没有处理 + if( (Usart3ReadFlag&0x8000)==0 ) + { + Usart3ReadBuf[Usart3ReadFlag] = res; + Usart3ReadFlag++; + if(Usart3ReadFlag>=59) + { + Usart3ReadFlag |= (1 << 15); + } + } + } + //溢出-如果发生溢出需要先读SR,再读DR寄存器则可清除不断入中断的问题 + if( USART_GetFlagStatus(USART3,USART_FLAG_ORE)==SET ) + { + USART_ReceiveData(USART3); + USART_ClearFlag(USART3,USART_FLAG_ORE); + } + USART_ClearFlag(USART3,USART_IT_RXNE); +} + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/drive/bsp_uart3.h b/firmware/stm32-esp/user/drive/bsp_uart3.h index cff599f4..24d2c0e9 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart3.h +++ b/firmware/stm32-esp/user/drive/bsp_uart3.h @@ -1,18 +1,18 @@ -#ifndef _BSP_UART3_H_ -#define _BSP_UART3_H_ - -#include "stm32f10x.h" -#include "bsp_clock.h" - -#include "stdio.h" -#include "string.h" - -#include "basic_data.h" - -// 判断串口03接收完成 -void BSP_UART3SendStr(char *ch); -void BSP_UART3SendData(uint8_t *ch,uint16_t len); -void BSP_UART3Init(uint32_t bound); - -#endif - +#ifndef _BSP_UART3_H_ +#define _BSP_UART3_H_ + +#include "stm32f10x.h" +#include "bsp_clock.h" + +#include "stdio.h" +#include "string.h" + +#include "basic_data.h" + +// 判断串口03接收完成 +void BSP_UART3SendStr(char *ch); +void BSP_UART3SendData(uint8_t *ch,uint16_t len); +void BSP_UART3Init(uint32_t bound); + +#endif + diff --git a/firmware/stm32-esp/user/main.c b/firmware/stm32-esp/user/main.c index 7067220b..dcddda92 100644 --- a/firmware/stm32-esp/user/main.c +++ b/firmware/stm32-esp/user/main.c @@ -1,67 +1,66 @@ -#include "main.h" - -/************************ - ESP8266 UART2 - PMD4 UART3 -************************/ -int main() -{ - BSP_ClockInit(); - - BSP_Timer3Init(); - - // 电源控制部分 - BSP_PowerInit(); - Delay_ms(200); - - // 电池电压ADC - BSP_ADCInit(); - - // LCD - #ifdef Device_LCD - Delay_ms(500); - - SimLCD_Init(); - - DevParam.AirInforGetTime = 3000; - DevParam.BatIconRefreshTime= 3000; - DevParam.BatInforGetTime = 3000; - DevParam.SideBeatTime = 3000; - - DevParam.ShowPM1_0 = 200; - DevParam.ShowPM2_5 = 200; - DevParam.ShowPM10 = 200; - #endif - while(1) - { - // 网络配网部分 - ESP8266_NetWorkFlow(); - - // 网络数据接收处理 - ESP8266_NetReceiveInfor(); - - // 电池，获取电池信息 - Bat_GetWorkInfor(); - - // 读取电路板状态 - Dev_ScanExtIndicate(); - - // 切换工作模式 - Dev_SwitchWorkMode(); - - // 系统正常运行处理流程 - if(DevParam.RunPhase == RunPhase_Runing) - { - // 显示部分，侧边跳动 - Show_BroadSideBeat(); - - // PMD4，获取空气信息 - PMD4_GetAirInfor(); - } - - // 显示部分，电池图标刷新 - Show_BatIconRefresh(); - } -} - - +#include "main.h" + +/************************ + ESP8266 UART2 + PMD4 UART3 +************************/ +int main() +{ + BSP_ClockInit(); + + BSP_Timer3Init(); + + // 电源控制部分 + BSP_PowerInit(); + Delay_ms(200); + + // 电池电压ADC + BSP_ADCInit(); + + // LCD + #ifdef Device_LCD + Delay_ms(1000); + SimLCD_Init(); + + DevParam.AirInforGetTime = 3000; + DevParam.BatIconRefreshTime= 3000; + DevParam.BatInforGetTime = 3000; + DevParam.SideBeatTime = 3000; + + DevParam.ShowPM1_0 = 200; + DevParam.ShowPM2_5 = 200; + DevParam.ShowPM10 = 200; + #endif + while(1) + { + // 网络配网部分 + ESP8266_NetWorkFlow(); + + // 网络数据接收处理 + ESP8266_NetReceiveInfor(); + + // 电池，获取电池信息 + Bat_GetWorkInfor(); + + // 读取电路板状态 + Dev_ScanExtIndicate(); + + // 切换工作模式 + Dev_SwitchWorkMode(); + + // 系统正常运行处理流程 + if(DevParam.RunPhase == RunPhase_Runing) + { + // 显示部分，侧边跳动 + Show_BroadSideBeat(); +// + // PMD4，获取空气信息 + PMD4_GetAirInfor(); + } + + // 显示部分，电池图标刷新 + Show_BatIconRefresh(); + } +} + + diff --git a/firmware/stm32-esp/user/main.h b/firmware/stm32-esp/user/main.h index 9bfcac83..005f21b7 100644 --- a/firmware/stm32-esp/user/main.h +++ b/firmware/stm32-esp/user/main.h @@ -1,28 +1,28 @@ -#ifndef _MAIN_H_ -#define _MAIN_H_ - -#include "stm32f10x.h" - -#include "bsp_clock.h" - -#include "bsp_timer3.h" - -#include "bsp_port.h" - -#include "bsp_tool.h" - -#include "bsp_adc.h" - -#include "pm_uart3.h" - -#include "uart2_receive.h" - -#include "simulation_lcd.h" - -#include "esp8266_work.h" - -#include "dev_work.h" - -#include "battery.h" - -#endif +#ifndef _MAIN_H_ +#define _MAIN_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "bsp_tool.h" + +#include "bsp_adc.h" + +#include "pm_uart3.h" + +#include "uart2_receive.h" + +#include "simulation_lcd.h" + +#include "esp8266_work.h" + +#include "dev_work.h" + +#include "battery.h" + +#endif diff --git a/firmware/stm32-esp/user/show/battery.c b/firmware/stm32-esp/user/show/battery.c index 6d9b2768..80cc1922 100644 --- a/firmware/stm32-esp/user/show/battery.c +++ b/firmware/stm32-esp/user/show/battery.c @@ -1,220 +1,220 @@ -#include "battery.h" - -/*电池，获取电池信息*/ -void Bat_GetWorkInfor(void) -{ - /***读取正在充电指示***/ - if(Read_BatCharging()==0) - DevParam.BatCharging = 1; - else - DevParam.BatCharging = 0; - - if(DevParam.BatInforGetTime >= 300) - { - if(DevParam.BatCheck < 100) - DevParam.BatCheck++; - /***获取电池电压***/ - DevParam.BatVoltage = ADC_GetSimpleData(); - if(DevParam.BatVoltage >= 3.58) - { - /***转换电池容量***/ - if(DevParam.BatVoltage>=4.16) - DevParam.ShortBatSOC = 100; - else if(DevParam.BatVoltage>=4.08) - DevParam.ShortBatSOC = 90; - else if(DevParam.BatVoltage>=3.97) - DevParam.ShortBatSOC = 80; - else if(DevParam.BatVoltage>=3.90) - DevParam.ShortBatSOC = 70; - else if(DevParam.BatVoltage>=3.84) - DevParam.ShortBatSOC = 60; - else if(DevParam.BatVoltage>=3.79) - DevParam.ShortBatSOC = 50; - else if(DevParam.BatVoltage>=3.76) - DevParam.ShortBatSOC = 40; - else if(DevParam.BatVoltage>=3.73) - DevParam.ShortBatSOC = 30; - else if(DevParam.BatVoltage>=3.71) - DevParam.ShortBatSOC = 20; - else if(DevParam.BatVoltage>=3.65) - DevParam.ShortBatSOC = 10; - } - else - { - DevParam.ShortBatSOC = 0; - } - DevParam.BatInforGetTime = 0; - } -} -/*显示部分，电池图标外形刷新*/ -void Show_BatIconShapeRefresh(void) -{ - #ifdef Device_LCD - // 电池外形 - SimLCD_PointColor = SimLCDColor_WHITE; - SimLCD_DrawLine( 200, 9, 222, 9); - SimLCD_DrawLine( 200, 21, 222, 21); - - SimLCD_DrawLine( 200, 9, 200, 21); - SimLCD_DrawLine( 222, 9, 222, 21); - - SimLCD_DrawLine( 197, 13, 200, 13); // 上横线 - SimLCD_DrawLine( 197, 13, 197, 17); // 中横线 - SimLCD_DrawLine( 197, 17, 200, 17); // 下横线 - #endif -} -/*显示部分，电池图标刷新*/ -void Show_BatIconRefresh(void) -{ - if((DevParam.BatIconRefreshTime>=500)&&(DevParam.BatCheck>=2)) - { - #ifdef Device_LCD - uint8_t i = 0; - uint16_t FontColor = 0; - if( (DevParam.BatCharging==1)&&(DevParam.RunPhase!=0) ) - {// 充电中，电池图标变成绿色 - FontColor = SimLCDColor_GREEN; - } - else if(DevParam.RunPhase==RunPhase_Runing) - {// 其他，电池图标变成白色 - FontColor = SimLCDColor_WHITE; - } - // 显示SOC - if(DevParam.ShortBatSOC!=DevParam.BatSOC) - { - if( DevParam.ShortBatSOC >= 80 ) { - SimLCD_PointColor = FontColor; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 202, i, 205, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 207, i, 210, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 212, i, 215, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 217, i, 220, i); - } - else if( DevParam.ShortBatSOC >= 60 ) { - SimLCD_PointColor = SimLCDColor_BLACK; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 202, i, 205, i); - SimLCD_PointColor = FontColor; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 207, i, 210, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 212, i, 215, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 217, i, 220, i); - } - else if( DevParam.ShortBatSOC >= 40 ) { - SimLCD_PointColor = SimLCDColor_BLACK; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 202, i, 205, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 207, i, 210, i); - - SimLCD_PointColor = FontColor; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 212, i, 215, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 217, i, 220, i); - } - else if( DevParam.ShortBatSOC >= 20 ) { - SimLCD_PointColor = SimLCDColor_BLACK; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 202, i, 205, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 207, i, 210, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 212, i, 215, i); - SimLCD_PointColor = FontColor; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 217, i, 220, i); - } - else if( DevParam.ShortBatSOC >= 1 ) { - SimLCD_PointColor = SimLCDColor_BLACK; - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 202, i, 205, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 207, i, 210, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 212, i, 215, i); - for( i = 12; i < 19; i++) - SimLCD_DrawLine( 217, i, 220, i); - } - Power_LCD(1); - DevParam.BatSOC =DevParam.ShortBatSOC; - } - #endif - DevParam.BatIconRefreshTime = 0; - } -} -/*显示部分，侧边跳动*/ -void Show_BroadSideBeat(void) -{ - if(DevParam.SideBeatTime>=2000) - { - #ifdef Device_LCD - uint8_t i = 0; - if(DevParam.SideBeat==1) { - SimLCD_PointColor = SimLCDColor_CYAN; - for(i = 0; i < 13; i++) - SimLCD_DrawLine( 0, i, 32, i); - DevParam.SideBeat = 2; - } - else if(DevParam.SideBeat==2) { - SimLCD_PointColor = SimLCDColor_CYAN; - for(i = 15; i < 28; i++) - SimLCD_DrawLine( 0, i, 24, i); - DevParam.SideBeat = 3; - } - else if(DevParam.SideBeat==3) { - SimLCD_PointColor = SimLCDColor_CYAN; - for(i = 30; i < 43; i++) - SimLCD_DrawLine( 0, i, 16, i); - DevParam.SideBeat = 4; - } - else if(DevParam.SideBeat==4) { - SimLCD_PointColor = SimLCDColor_CYAN; - for(i = 45; i < 58; i++) - SimLCD_DrawLine( 0, i, 8, i); - DevParam.SideBeat = 5; - } - else if(DevParam.SideBeat==5) { - SimLCD_PointColor = SimLCDColor_BLACK; - for(i = 0; i < 13; i++) - SimLCD_DrawLine( 0, i, 32, i); - for(i = 15; i < 28; i++) - SimLCD_DrawLine( 0, i, 24, i); - for(i = 30; i < 43; i++) - SimLCD_DrawLine( 0, i, 16, i); - for(i = 45; i < 58; i++) - SimLCD_DrawLine( 0, i, 8, i); - DevParam.SideBeat = 1; - } - #endif - DevParam.SideBeatTime = 0; - } -} - - - - - - - - - - - - - - - - - - - - - - - +#include "battery.h" + +/*电池，获取电池信息*/ +void Bat_GetWorkInfor(void) +{ + /***读取正在充电指示***/ + if(Read_BatCharging()==0) + DevParam.BatCharging = 1; + else + DevParam.BatCharging = 0; + + if(DevParam.BatInforGetTime >= 300) + { + if(DevParam.BatCheck < 100) + DevParam.BatCheck++; + /***获取电池电压***/ + DevParam.BatVoltage = ADC_GetSimpleData(); + if(DevParam.BatVoltage >= 3.58) + { + /***转换电池容量***/ + if(DevParam.BatVoltage>=4.16) + DevParam.ShortBatSOC = 100; + else if(DevParam.BatVoltage>=4.08) + DevParam.ShortBatSOC = 90; + else if(DevParam.BatVoltage>=3.97) + DevParam.ShortBatSOC = 80; + else if(DevParam.BatVoltage>=3.90) + DevParam.ShortBatSOC = 70; + else if(DevParam.BatVoltage>=3.84) + DevParam.ShortBatSOC = 60; + else if(DevParam.BatVoltage>=3.79) + DevParam.ShortBatSOC = 50; + else if(DevParam.BatVoltage>=3.76) + DevParam.ShortBatSOC = 40; + else if(DevParam.BatVoltage>=3.73) + DevParam.ShortBatSOC = 30; + else if(DevParam.BatVoltage>=3.71) + DevParam.ShortBatSOC = 20; + else if(DevParam.BatVoltage>=3.65) + DevParam.ShortBatSOC = 10; + } + else + { + DevParam.ShortBatSOC = 0; + } + DevParam.BatInforGetTime = 0; + } +} +/*显示部分，电池图标外形刷新*/ +void Show_BatIconShapeRefresh(void) +{ + #ifdef Device_LCD + // 电池外形 + SimLCD_PointColor = SimLCDColor_WHITE; + SimLCD_DrawLine( 200, 9, 222, 9); + SimLCD_DrawLine( 200, 21, 222, 21); + + SimLCD_DrawLine( 200, 9, 200, 21); + SimLCD_DrawLine( 222, 9, 222, 21); + + SimLCD_DrawLine( 197, 13, 200, 13); // 上横线 + SimLCD_DrawLine( 197, 13, 197, 17); // 中横线 + SimLCD_DrawLine( 197, 17, 200, 17); // 下横线 + #endif +} +/*显示部分，电池图标刷新*/ +void Show_BatIconRefresh(void) +{ + if((DevParam.BatIconRefreshTime>=500)&&(DevParam.BatCheck>=2)) + { + #ifdef Device_LCD + uint8_t i = 0; + uint16_t FontColor = 0; + if( (DevParam.BatCharging==1)&&(DevParam.RunPhase!=0) ) + {// 充电中，电池图标变成绿色 + FontColor = SimLCDColor_GREEN; + } + else if(DevParam.RunPhase==RunPhase_Runing) + {// 其他，电池图标变成白色 + FontColor = SimLCDColor_WHITE; + } + // 显示SOC + if(DevParam.ShortBatSOC!=DevParam.BatSOC) + { + if( DevParam.ShortBatSOC >= 80 ) { + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 60 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 40 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 20 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + SimLCD_PointColor = FontColor; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + else if( DevParam.ShortBatSOC >= 1 ) { + SimLCD_PointColor = SimLCDColor_BLACK; + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 202, i, 205, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 207, i, 210, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 212, i, 215, i); + for( i = 12; i < 19; i++) + SimLCD_DrawLine( 217, i, 220, i); + } + Power_LCD(1); + DevParam.BatSOC =DevParam.ShortBatSOC; + } + #endif + DevParam.BatIconRefreshTime = 0; + } +} +/*显示部分，侧边跳动*/ +void Show_BroadSideBeat(void) +{ + if(DevParam.SideBeatTime>=2000) + { + #ifdef Device_LCD + uint8_t i = 0; + if(DevParam.SideBeat==1) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 0; i < 13; i++) + SimLCD_DrawLine( 0, i, 32, i); + DevParam.SideBeat = 2; + } + else if(DevParam.SideBeat==2) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 15; i < 28; i++) + SimLCD_DrawLine( 0, i, 24, i); + DevParam.SideBeat = 3; + } + else if(DevParam.SideBeat==3) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 30; i < 43; i++) + SimLCD_DrawLine( 0, i, 16, i); + DevParam.SideBeat = 4; + } + else if(DevParam.SideBeat==4) { + SimLCD_PointColor = SimLCDColor_CYAN; + for(i = 45; i < 58; i++) + SimLCD_DrawLine( 0, i, 8, i); + DevParam.SideBeat = 5; + } + else if(DevParam.SideBeat==5) { + SimLCD_PointColor = SimLCDColor_BLACK; + for(i = 0; i < 13; i++) + SimLCD_DrawLine( 0, i, 32, i); + for(i = 15; i < 28; i++) + SimLCD_DrawLine( 0, i, 24, i); + for(i = 30; i < 43; i++) + SimLCD_DrawLine( 0, i, 16, i); + for(i = 45; i < 58; i++) + SimLCD_DrawLine( 0, i, 8, i); + DevParam.SideBeat = 1; + } + #endif + DevParam.SideBeatTime = 0; + } +} + + + + + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/battery.h b/firmware/stm32-esp/user/show/battery.h index b6f3acc8..792fc876 100644 --- a/firmware/stm32-esp/user/show/battery.h +++ b/firmware/stm32-esp/user/show/battery.h @@ -1,31 +1,31 @@ -#ifndef _BATTERY_H_ -#define _BATTERY_H_ - -#include "stm32f10x.h" - -#include "bsp_timer3.h" - -#include "bsp_port.h" - -#include "bsp_adc.h" - -#include "simulation_lcd.h" - -/*电池，获取电池信息*/ -void Bat_GetWorkInfor(void); -/*显示部分，电池图标外形刷新*/ -void Show_BatIconShapeRefresh(void); -/*显示部分，电池图标刷新*/ -void Show_BatIconRefresh(void); -/*显示部分，侧边跳动*/ -void Show_BroadSideBeat(void); -#endif - - - - - - - - - +#ifndef _BATTERY_H_ +#define _BATTERY_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "bsp_adc.h" + +#include "simulation_lcd.h" + +/*电池，获取电池信息*/ +void Bat_GetWorkInfor(void); +/*显示部分，电池图标外形刷新*/ +void Show_BatIconShapeRefresh(void); +/*显示部分，电池图标刷新*/ +void Show_BatIconRefresh(void); +/*显示部分，侧边跳动*/ +void Show_BroadSideBeat(void); +#endif + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/dev_work.c b/firmware/stm32-esp/user/show/dev_work.c index 1ff2a4c0..dfa42f6f 100644 --- a/firmware/stm32-esp/user/show/dev_work.c +++ b/firmware/stm32-esp/user/show/dev_work.c @@ -1,127 +1,127 @@ -#include "dev_work.h" - -void Dev_ScanExtIndicate(void) -{ - /*开机检测*/ - if(DevParam.RunPhase==0) - { - if(Read_BootKey()) - { - Delay_ms(200); - if(Read_BootKey()) - { - while(Read_BootKey()); - DevParam.ShortRunPhase = RunPhase_Runing; - } - } - else - { - DevParam.ShortRunPhase = RunPhase_Standby; - } - } - // 待机模式 - if(DevParam.RunPhase==RunPhase_Standby) - { - if(Read_BootKey()) - { - Delay_ms(200); - if(Read_BootKey()) - { - while(Read_BootKey()); - DevParam.ShortRunPhase = RunPhase_Runing; - } - } - } - // 运行模式 - if(DevParam.RunPhase==RunPhase_Runing) - { - if(Read_BootKey()) - { - Delay_ms(200); - if(Read_BootKey()) - { - while(Read_BootKey()); - - // 关机/进入待机状态 - if(DevParam.BatCharging) - DevParam.ShortRunPhase = RunPhase_Standby; - else - DevParam.ShortRunPhase = RunPhase_Close; - } - } - } -} - -/*切换工作模式*/ -void Dev_SwitchWorkMode(void) -{ - if(DevParam.RunPhase!=DevParam.ShortRunPhase) - { - if(DevParam.ShortRunPhase == RunPhase_Runing) - { - // 显示初始化 - #ifdef Device_LCD - Power_LCD(0); - - /*显示部分，基础外形刷新*/ - Show_BasicShapeRefresh(); - - /*显示部分，电池图标外形刷新*/ - if(DevParam.RunPhase == 0) - Show_BatIconShapeRefresh(); - else - Power_LCD(1); - #endif - - // 侧边跳动初始化 - DevParam.SideBeat = 1; - - /*空气检测仪初始化*/ - PMD4_Init(); - - DevParam.RunPhase = RunPhase_Runing; - } - if(DevParam.ShortRunPhase == RunPhase_Standby) - { - Power_PMD4(0); - - #ifdef Device_LCD - Power_LCD(0); - - if(DevParam.RunPhase==0) - { - /*显示部分，电池图标外形刷新*/ - Show_BatIconShapeRefresh(); - } - else if(DevParam.RunPhase==RunPhase_Runing) - { - // 进行清屏操作 - SimLCD_Clear(SimLCDColor_BLACK); - - /*显示部分，电池图标外形刷新*/ - Show_BatIconShapeRefresh(); - - // 数据部分清零 - DevParam.BatSOC = 0; - - Power_LCD(1); - } - #endif - - DevParam.RunPhase = RunPhase_Standby; - } - // 关机模式 - if(DevParam.ShortRunPhase == RunPhase_Close) - { - Delay_ms(1000); - Power_PMD4(0); - Power_LCD(0); - Power_3V3(0); - DevParam.RunPhase = RunPhase_Close; - while(1); - } - } -} - - - +#include "dev_work.h" + +void Dev_ScanExtIndicate(void) +{ + /*开机检测*/ + if(DevParam.RunPhase==0) + { + if(Read_BootKey()) + { + Delay_ms(200); + if(Read_BootKey()) + { + while(Read_BootKey()); + DevParam.ShortRunPhase = RunPhase_Runing; + } + } + else + { + DevParam.ShortRunPhase = RunPhase_Standby; + } + } + // 待机模式 + if(DevParam.RunPhase==RunPhase_Standby) + { + if(Read_BootKey()) + { + Delay_ms(200); + if(Read_BootKey()) + { + while(Read_BootKey()); + DevParam.ShortRunPhase = RunPhase_Runing; + } + } + } + // 运行模式 + if(DevParam.RunPhase==RunPhase_Runing) + { + if(Read_BootKey()) + { + Delay_ms(200); + if(Read_BootKey()) + { + while(Read_BootKey()); + + // 关机/进入待机状态 + if(DevParam.BatCharging) + DevParam.ShortRunPhase = RunPhase_Standby; + else + DevParam.ShortRunPhase = RunPhase_Close; + } + } + } +} + +/*切换工作模式*/ +void Dev_SwitchWorkMode(void) +{ + if(DevParam.RunPhase!=DevParam.ShortRunPhase) + { + if(DevParam.ShortRunPhase == RunPhase_Runing) + { + // 显示初始化 + #ifdef Device_LCD + Power_LCD(0); + + /*显示部分，基础外形刷新*/ + Show_BasicShapeRefresh(); + + /*显示部分，电池图标外形刷新*/ + if(DevParam.RunPhase == 0) + Show_BatIconShapeRefresh(); + else + Power_LCD(1); + #endif + + // 侧边跳动初始化 + DevParam.SideBeat = 1; + + /*空气检测仪初始化*/ + PMD4_Init(); + + DevParam.RunPhase = RunPhase_Runing; + } + if(DevParam.ShortRunPhase == RunPhase_Standby) + { + Power_PMD4(0); + + #ifdef Device_LCD + Power_LCD(0); + + if(DevParam.RunPhase==0) + { + /*显示部分，电池图标外形刷新*/ + Show_BatIconShapeRefresh(); + } + else if(DevParam.RunPhase==RunPhase_Runing) + { + // 进行清屏操作 + SimLCD_Clear(SimLCDColor_BLACK); + + /*显示部分，电池图标外形刷新*/ + Show_BatIconShapeRefresh(); + + // 数据部分清零 + DevParam.BatSOC = 0; + + Power_LCD(1); + } + #endif + + DevParam.RunPhase = RunPhase_Standby; + } + // 关机模式 + if(DevParam.ShortRunPhase == RunPhase_Close) + { + Delay_ms(1000); + Power_PMD4(0); + Power_LCD(0); + Power_3V3(0); + DevParam.RunPhase = RunPhase_Close; + while(1); + } + } +} + + + diff --git a/firmware/stm32-esp/user/show/dev_work.h b/firmware/stm32-esp/user/show/dev_work.h index 64c2131d..03191395 100644 --- a/firmware/stm32-esp/user/show/dev_work.h +++ b/firmware/stm32-esp/user/show/dev_work.h @@ -1,29 +1,29 @@ -#ifndef _DEV_WORK_H_ -#define _DEV_WORK_H_ - -#include "stm32f10x.h" - -#include "bsp_timer3.h" - -#include "bsp_port.h" - -#include "bsp_adc.h" - -#include "simulation_lcd.h" - -#include "battery.h" - -#include "pm_uart3.h" - -void Dev_ScanExtIndicate(void); -void Dev_SwitchWorkMode(void); -#endif - - - - - - - - - +#ifndef _DEV_WORK_H_ +#define _DEV_WORK_H_ + +#include "stm32f10x.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "bsp_adc.h" + +#include "simulation_lcd.h" + +#include "battery.h" + +#include "pm_uart3.h" + +void Dev_ScanExtIndicate(void); +void Dev_SwitchWorkMode(void); +#endif + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/esp8266_uart2.c b/firmware/stm32-esp/user/show/esp8266_uart2.c index 7637c6ab..08c99912 100644 --- a/firmware/stm32-esp/user/show/esp8266_uart2.c +++ b/firmware/stm32-esp/user/show/esp8266_uart2.c @@ -1,253 +1,253 @@ -#include "esp8266_uart2.h" - -//检测应答命令 -static uint8_t* ESP8266_CheckCmd(uint8_t *str) -{ - char *strx = 0; - if(UART2ReadFlag&0x8000) - { - UART2ReadBuf[UART2ReadFlag&0x7FFF] = 0;//添加结束符 - strx = strstr((const char*)UART2ReadBuf,(const char*)str); - } - return (uint8_t*)strx; -} - -//cmd:发送的命令字符串 -//ack:期待的应答结果,如果为空,则表示不需要等待应答 -//返回值:0,发送成功 1,发送失败 -static uint8_t ESP8266_SendCmd(uint8_t *cmd,uint8_t *ack,uint16_t waittime) { - UART2ReadFlag = 0; - memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - - Dev_UART2SendStr("%s\r\n", cmd);//发送命令 - if(ack&&waittime) //需要等待应答 - { - while(--waittime) //等待倒计时 - { - Delay_ms(10); - if(UART2ReadFlag&0x8000) - { - if(ESP8266_CheckCmd(ack)) - { - UART2ReadFlag = 0; - return 0; - } - else - { - UART2ReadFlag = 0; - return 1; - } - } - } - if(waittime==0) - { - return 1; - } - } - return 1; -} -uint8_t ESP8266_SendStr(char* fmt,...) -{ - uint8_t tbuf[200] = {0}; - uint16_t i = 0,j = 0; - - va_list ap; - va_start(ap, fmt); - vsprintf((char*)tbuf, fmt, ap); - va_end(ap); - - j = strlen((const char*)tbuf); - - for( i = 0; i < j; i++) - { - while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} - USART_SendData(USART2, tbuf[i]); - } - while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} - - return 0; -} -uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len) -{ - uint16_t i = 0; - for( i = 0; i < len; i++) - { - while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} - USART_SendData(USART2, tbuf[i]); - } - while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} - return 0; -} -// STA模式下获取本地IP -void ESP8266_GetLocalIP(uint8_t* ipbuf){ - uint8_t *p,*p1; - - if(ESP8266_SendCmd( (uint8_t *)"AT+CIFSR", (uint8_t *)"OK", 50)) - { - ipbuf[0] = 0; - return; - } - - p = ESP8266_CheckCmd((uint8_t *)"\""); - p1 = (uint8_t *)strstr((const char*)(p+1),"\""); - *p1=0; - sprintf((char*)ipbuf,"%s",p+1); -} - -//退出透传模式 0,退出成功; 1,退出失败 -uint8_t ESP8266_QuitTrans(void){ - while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; - USART_SendData(USART2, '+'); - Delay_ms(15); - while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; - USART_SendData(USART2, '+'); - Delay_ms(15); - while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; - USART_SendData(USART2, '+'); - Delay_ms(500); //等待500ms - return ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",20);//退出透传判断 -} - -//获取连接状态 0,未连接;1,连接成功. -uint8_t ESP8266_ConstaCheck(void){ - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTATUS",(uint8_t *)"OK",50)); - return 0; -} - -uint8_t ESP8266_APInit(char *name, char *password){ - uint8_t Sbuf[60] ={0}; - - // UART2 - BSP_UART2Init(115200); - - Delay_ms(1000); - Delay_ms(1000); - - while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) - {//退出透传 - ESP8266_QuitTrans(); - - //关闭透传模式 - ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); - Delay_ms(1000); - } - - // 关闭回显 - while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); - - // 设置波特率 - while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); - - Delay_ms(10); - - // 设置WIFI AP模式 - while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=2",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); - - // 延时4秒等待重启成功 - Delay_ms(1000); - Delay_ms(1000); - Delay_ms(1000); - Delay_ms(1000); - - memset(Sbuf, 0 , sizeof(Sbuf)); - sprintf((char*)Sbuf, "AT+CWSAP=\"%s\",\"%s\",1,4", name, password); - while(ESP8266_SendCmd(Sbuf, (uint8_t *)"OK", 1000)); - - #ifdef TCP_Mode - - #endif - #ifdef UDP_Mode - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"255.255.255.255\",60156,42254,0",(uint8_t *)"OK",500)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",300)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",200)); - #endif - - UART2ReadFlag = 0; - memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - return 0; -} -uint8_t ESP8266_STAConnect(char *name, char *password){ - uint8_t Sbuf[60] ={0}; - - memset(Sbuf, 0 , sizeof(Sbuf)); - sprintf((char*)Sbuf,"AT+CWJAP=\"%s\",\"%s\"", name, password); - if(ESP8266_SendCmd( Sbuf, (uint8_t *)"WIFI GOT IP", 100)){ - return 1; - } - else { - #ifdef TCP_Mode - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"TCP\",\"192.168.0.102\",8086",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); - #endif - #ifdef UDP_Mode - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"192.168.1.6\",8086,8086,0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); - #endif - - UART2ReadFlag = 0; - memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - return 0; - } -} -uint8_t ESP8266_STAInit(void){ - // 初始化串口 - BSP_UART2Init(115200); - - // 延时2秒等待串口初始化完成 - Delay_ms(1000); - Delay_ms(1000); - while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) - { - //退出透传 - ESP8266_QuitTrans(); - - //关闭透传模式 - ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); - Delay_ms(800); - } - // 关闭回显 - while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); - - // 设置波特率 - while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); - - Delay_ms(10); - - // 设置WIFI STA模式 - while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=1",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); - - Delay_ms(1000); - Delay_ms(1000); - Delay_ms(1000); - Delay_ms(1000); - - - - return 1; -} - - - - - - - - - - - - - - - - - - - +#include "esp8266_uart2.h" + +//检测应答命令 +static uint8_t* ESP8266_CheckCmd(uint8_t *str) +{ + char *strx = 0; + if(UART2ReadFlag&0x8000) + { + UART2ReadBuf[UART2ReadFlag&0x7FFF] = 0;//添加结束符 + strx = strstr((const char*)UART2ReadBuf,(const char*)str); + } + return (uint8_t*)strx; +} + +//cmd:发送的命令字符串 +//ack:期待的应答结果,如果为空,则表示不需要等待应答 +//返回值:0,发送成功 1,发送失败 +static uint8_t ESP8266_SendCmd(uint8_t *cmd,uint8_t *ack,uint16_t waittime) { + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + + Dev_UART2SendStr("%s\r\n", cmd);//发送命令 + if(ack&&waittime) //需要等待应答 + { + while(--waittime) //等待倒计时 + { + Delay_ms(10); + if(UART2ReadFlag&0x8000) + { + if(ESP8266_CheckCmd(ack)) + { + UART2ReadFlag = 0; + return 0; + } + else + { + UART2ReadFlag = 0; + return 1; + } + } + } + if(waittime==0) + { + return 1; + } + } + return 1; +} +uint8_t ESP8266_SendStr(char* fmt,...) +{ + uint8_t tbuf[200] = {0}; + uint16_t i = 0,j = 0; + + va_list ap; + va_start(ap, fmt); + vsprintf((char*)tbuf, fmt, ap); + va_end(ap); + + j = strlen((const char*)tbuf); + + for( i = 0; i < j; i++) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + USART_SendData(USART2, tbuf[i]); + } + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + + return 0; +} +uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len) +{ + uint16_t i = 0; + for( i = 0; i < len; i++) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + USART_SendData(USART2, tbuf[i]); + } + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){} + return 0; +} +// STA模式下获取本地IP +void ESP8266_GetLocalIP(uint8_t* ipbuf){ + uint8_t *p,*p1; + + if(ESP8266_SendCmd( (uint8_t *)"AT+CIFSR", (uint8_t *)"OK", 50)) + { + ipbuf[0] = 0; + return; + } + + p = ESP8266_CheckCmd((uint8_t *)"\""); + p1 = (uint8_t *)strstr((const char*)(p+1),"\""); + *p1=0; + sprintf((char*)ipbuf,"%s",p+1); +} + +//退出透传模式 0,退出成功; 1,退出失败 +uint8_t ESP8266_QuitTrans(void){ + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, '+'); + Delay_ms(15); + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, '+'); + Delay_ms(15); + while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, '+'); + Delay_ms(500); //等待500ms + return ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",20);//退出透传判断 +} + +//获取连接状态 0,未连接;1,连接成功. +uint8_t ESP8266_ConstaCheck(void){ + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTATUS",(uint8_t *)"OK",50)); + return 0; +} + +uint8_t ESP8266_APInit(char *name, char *password){ + uint8_t Sbuf[60] ={0}; + + // UART2 + BSP_UART2Init(115200); + + Delay_ms(1000); + Delay_ms(1000); + + while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) + {//退出透传 + ESP8266_QuitTrans(); + + //关闭透传模式 + ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); + Delay_ms(1000); + } + + // 关闭回显 + while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); + + // 设置波特率 + while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); + + Delay_ms(10); + + // 设置WIFI AP模式 + while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=2",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); + + // 延时4秒等待重启成功 + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + + memset(Sbuf, 0 , sizeof(Sbuf)); + sprintf((char*)Sbuf, "AT+CWSAP=\"%s\",\"%s\",1,4", name, password); + while(ESP8266_SendCmd(Sbuf, (uint8_t *)"OK", 1000)); + + #ifdef TCP_Mode + + #endif + #ifdef UDP_Mode + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"255.255.255.255\",60156,42254,0",(uint8_t *)"OK",500)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",300)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",200)); + #endif + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + return 0; +} +uint8_t ESP8266_STAConnect(char *name, char *password){ + uint8_t Sbuf[60] ={0}; + + memset(Sbuf, 0 , sizeof(Sbuf)); + sprintf((char*)Sbuf,"AT+CWJAP=\"%s\",\"%s\"", name, password); + if(ESP8266_SendCmd( Sbuf, (uint8_t *)"WIFI GOT IP", 100)){ + return 1; + } + else { + #ifdef TCP_Mode + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"TCP\",\"192.168.0.102\",8086",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); + #endif + #ifdef UDP_Mode + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"192.168.1.6\",8086,8086,0",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); + #endif + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + return 0; + } +} +uint8_t ESP8266_STAInit(void){ + // 初始化串口 + BSP_UART2Init(115200); + + // 延时2秒等待串口初始化完成 + Delay_ms(1000); + Delay_ms(1000); + while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) + { + //退出透传 + ESP8266_QuitTrans(); + + //关闭透传模式 + ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); + Delay_ms(800); + } + // 关闭回显 + while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); + + // 设置波特率 + while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); + + Delay_ms(10); + + // 设置WIFI STA模式 + while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=1",(uint8_t *)"OK",200)); + while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); + + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + Delay_ms(1000); + + + + return 1; +} + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/esp8266_uart2.h b/firmware/stm32-esp/user/show/esp8266_uart2.h index 64895e76..a8d1276c 100644 --- a/firmware/stm32-esp/user/show/esp8266_uart2.h +++ b/firmware/stm32-esp/user/show/esp8266_uart2.h @@ -1,23 +1,23 @@ -#ifndef _ESP8266_UART2_H_ -#define _ESP8266_UART2_H_ - -#include "stm32f10x.h" - -#include "bsp_uart2.h" - -#include "stdio.h" -#include "string.h" -#include "stdarg.h" - -//#define TCP_Mode 1 -#define UDP_Mode 1 - -uint8_t ESP8266_SendStr(char* fmt,...); -uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len); -uint8_t ESP8266_APInit(char *name, char *password); -uint8_t ESP8266_STAInit(void); -uint8_t ESP8266_STAConnect(char *name, char *password); - -#endif - - +#ifndef _ESP8266_UART2_H_ +#define _ESP8266_UART2_H_ + +#include "stm32f10x.h" + +#include "bsp_uart2.h" + +#include "stdio.h" +#include "string.h" +#include "stdarg.h" + +//#define TCP_Mode 1 +#define UDP_Mode 1 + +uint8_t ESP8266_SendStr(char* fmt,...); +uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len); +uint8_t ESP8266_APInit(char *name, char *password); +uint8_t ESP8266_STAInit(void); +uint8_t ESP8266_STAConnect(char *name, char *password); + +#endif + + diff --git a/firmware/stm32-esp/user/show/esp8266_work.c b/firmware/stm32-esp/user/show/esp8266_work.c index d7757dda..946612b5 100644 --- a/firmware/stm32-esp/user/show/esp8266_work.c +++ b/firmware/stm32-esp/user/show/esp8266_work.c @@ -1,269 +1,298 @@ -#include "esp8266_work.h" - -/**************************** - 配网流程 - 1、将无线设备初始化为AP模式，默认设置为 - 2、 -****************************/ -static uint8_t NetWorkFlow = 1; -static uint32_t Nport = 0; -static uint8_t Nssid[20] = {0}; -static uint8_t Npassword[20] = {0}; - -MQTTPacket_connectData MQTT_ConnectData = MQTTPacket_connectData_initializer; -char MQTT_ClientId[150] = {0}; -char MQTT_Username[65] = {0}; -char MQTT_Password[65] = {0}; - -volatile uint16_t MQTT_ReadBufLen = 0; - -int ESP8266_WaitData(unsigned char* buf, int count) -{ - while(1) - { - if(UART2ReadFlag&0x8000) - { - memcpy(buf, (void*)&UART2ReadBuf[MQTT_ReadBufLen], count); - MQTT_ReadBufLen += count; - return count; - } - Delay_ms(10); - } -} - -uint8_t MQTT_UserSubscribe(char *pSubTopic) { - uint8_t buf[200] = {0}; - uint32_t buflen = sizeof(buf); - int32_t msgid = 1; - int32_t req_qos = 0; // 服务质量 - - MQTTString topicString = MQTTString_initializer; - topicString.cstring = pSubTopic; - - // 订阅格式化 - MQTTSerialize_subscribe(buf, buflen, 0, msgid, 1, &topicString, &req_qos); - - // 发送订阅 - UART2ReadFlag = 0; - ESP8266_SendStr((char *)buf); - if (MQTTPacket_read(buf, buflen, ESP8266_WaitData)==SUBACK) /* wait for suback */ - { - unsigned short submsgid; - int subcount; - int granted_qos; - - MQTTDeserialize_suback(&submsgid, 1, &subcount, &granted_qos, buf, buflen); - if (granted_qos != 0) - { - //Sys_SendLog("granted qos != 0, %d\n", granted_qos); - return 0; - } - else - { - //Sys_SendLog("granted qos = 0\n"); - return 1; - } - } - else - { - //Sys_SendLog("no suback received!\r\n"); - return 0; - } -} -// MQTT_Publish("/mqtt/topic/0", "hello0"); -void MQTT_UserPublish(char *pPubTopic, char *payload, int payloadlen) { - uint8_t buf[400] = {0}; - int buflen = sizeof(buf); - MQTTString topicString = MQTTString_initializer; - int len = 0; - - topicString.cstring = pPubTopic; - len += MQTTSerialize_publish((unsigned char *)(buf + len), buflen - len, 0, 0, 0, 0, topicString, (unsigned char *)payload, payloadlen); - ESP8266_SendStr((char *)buf); -} -uint8_t buf[400] = {0}; -int buflen = 0; -void ESP8266_NetWorkFlow(void) -{ - // 第一步，初始化为AP - if(NetWorkFlow == 1) { - ESP8266_APInit("XiaoYi_IOT_AirBox", "asdqwe9867"); - NetWorkFlow = 2; - } - // 第二步，持续发送UDP广播 - else if(NetWorkFlow == 2) { - if(DevParam.ESP8266SendTime >= 2000) - { - ESP8266_SendStr("{\"code\":\"0\",\"msg\":\"start connect\"}"); - DevParam.ESP8266SendTime = 0; - } - } - // 第三步，返回接受成功信息 - else if(NetWorkFlow == 3) { - ESP8266_SendStr("{\"code\":\"1\",\"msg\":\"getWifiInfo:success\"}"); - NetWorkFlow = 4; - } - // 第四步，连接家庭无线 - else if(NetWorkFlow == 4) { - ESP8266_STAInit(); - while(ESP8266_STAConnect((char *)Nssid, (char *)Npassword)); - NetWorkFlow = 5; - } - else if(NetWorkFlow == 5) { - MQTT_ConnectData.MQTTVersion = 4; // 3.1.1 - MQTT_ConnectData.keepAliveInterval = 60; // 设置心跳包间隔时间 - MQTT_ConnectData.clientID.cstring = (char *)MQTT_ClientId;// 客户端ID - MQTT_ConnectData.username.cstring = (char *)MQTT_Username;// 用户名 - MQTT_ConnectData.password.cstring = (char *)MQTT_Password;// 密码 - MQTT_ConnectData.cleansession = 0; // 清除会话 - - //rc = aiotMqttSign(product_key, device_name, device_secret, \ - //MQTT_ConnectData.clientID.cstring, MQTT_ConnectData.username.cstring, MQTT_ConnectData.password.cstring); - //if (rc < 0) { - //Sys_SendLog("aiotMqttSign -%0x4x\n", -rc); - //return -1; - //} - - // 网络连接 - //char *host = "a1ykSq0uPgd.iot-as-mqtt.cn-shanghai.aliyuncs.com"; - //int port = 1883; - //transport_open( host, port); - - // 发送 登录数据 - // 将连接字符串格式化一下，现在还没有发送 - memset(buf, 0 ,sizeof(buf)); - buflen = sizeof(buf); - - MQTTSerialize_connect( buf, buflen, &MQTT_ConnectData); - UART2ReadFlag = 0; - ESP8266_SendStr((char *)buf); - - // 等待connack - if (MQTTPacket_read(buf, buflen, ESP8266_WaitData) == CONNACK){ - unsigned char sessionPresent, connack_rc; - if (MQTTDeserialize_connack(&sessionPresent, &connack_rc, buf, buflen) != 1 || connack_rc != 0) - { - //Sys_SendLog("Unable to connect,return code %d\r\n", connack_rc); - //return -1; - } - } - /*订阅*/ - MQTT_UserSubscribe("status/set/7CDFA1049ADA"); //更新设备状态 - MQTT_UserSubscribe("status/get/7CDFA1049ADA"); //获取设备状态 - MQTT_UserSubscribe("setting/set/7CDFA1049ADA");//更新设备配置 - MQTT_UserSubscribe("setting/get/7CDFA1049ADA");//获取设备配置 - } - else if(NetWorkFlow == 10) - { - if(DevParam.ESP8266SendTime >= 2000) - { - MQTTSerialize_pingreq(buf, buflen);// 发送心跳 - ESP8266_SendStr((char *)buf); - DevParam.ESP8266SendTime = 0; - } - // 发布设备状态 - else if(DevParam.ESP8266SendTime>=1500){ - // /a1ykSq0uPgd/qmvH76OCy2FeGp9DDMPx/user/update - // 0x00 00000001 0032 0100 001223 - char txBuf[30] = {0}; - char txLen = 0; - //txBuf[txLen++] = COMMAND_REPORT;// 属性上报 - txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x01;// ID - //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0); // INT16 - //txBuf[txLen++] = DeviceData.prop_bool; // BOOL - //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0);// FLOAT - - MQTT_UserPublish("device_info", txBuf, txLen); - DevParam.ESP8266SendTime = 0; - } - } -} - -cJSON *root = NULL; -char JsonString[100] = {0}; -uint16_t init = 0; -uint16_t i = 0; - -uint8_t rbuf[256] = {0}; -uint8_t rlen = 0; -void ESP8266_NetReceiveInfor(void) -{ - if(UART2ReadFlag&0x8000) - { - if(NetWorkFlow == 2) { - // {"port":"60156","ssid":"xxx","password":"xxxx"} - if(UART2ReadBuf[0] == '{') - { - for(i = 0;;i++) - { - JsonString[i] = UART2ReadBuf[i]; - if(UART2ReadBuf[i] == '}') - { - // 解析数据 - root = cJSON_Parse((char *)JsonString); - if(root == NULL) - { - memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - UART3ReadFlag = 0; - return; - } - Nport = cJSON_GetObjectItem(root, "port")->valuedouble; - if(Nport==60156) - { - sprintf((char *)Nssid, "%s",cJSON_GetObjectItem(root, "ssid")->valuestring); - sprintf((char *)Npassword,"%s",cJSON_GetObjectItem(root, "password")->valuestring); - // 进入无线第三步 - NetWorkFlow = 3; - } - cJSON_Delete(root); - memset(JsonString, 0, sizeof(JsonString)); - break; - } - } - } - } - if(NetWorkFlow == 10) - { - rlen = UART2ReadFlag&(~(1<<15)); - memcpy(rbuf, (void*)&UART2ReadBuf, rlen); - memset(UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - UART2ReadFlag = 0; - - if (strstr((char *)rbuf, "CLOSED")) - { - - } - else - { - if (0xD0 == *rbuf) - { - //Sys_SendLog("MQTT Heart Beat \r\n"); - } - else - { -// strncpy(Topic, (void*)(rbuf+4), rbuf[3]); -// printf("Topic: %s\r\n", Topic); -// strncpy(message,(void*)(rbuf+4+rbuf[3]),rbuf[1]-rbuf[3]-2); -// printf("Message: %s\r\n", message); -// memset(rbuf, 0, sizeof(rbuf)); - } - } - } - } -} - - - - - - - - - - - - - - - - +#include "esp8266_work.h" + +/**************************** + 配网流程 + 1、将无线设备初始化为AP模式，默认设置为 + 2、 + // 配置 MQTT 用户属性 + // AT+MQTTUSERCFG=0,1,"8bf209cd00704760b7a60b2f71be9d8c","test","123456",0,0,""\r\n + // 配置 MQTT 连接属性 + // AT+MQTTCONNCFG=0,120,0,"","",0,0\r\n + // 连接/查询 MQTT Broker + // AT+MQTTCONN=0,"106.12.9.213",1883,0\r\n + // 发布主题 + // {"deviceNum":"7CDFA1049ADA","categoryId":2,"firmwareVersion":"1.0","ownerId":"1"} + // AT+MQTTPUB=0,"device_info","{"deviceNum":"E8DB84933050","categoryId":1,"firmwareVersion":"1.0","ownerId":"1"}",0,0\r\n + // 订阅/查询主题 + // AT+MQTTSUB=0,"status/set/E8DB84933050",1\r\n + // 取消订阅主题 + // AT+MQTTUNSUB=0,"status/set/E8DB84933050" + // 关闭连接, 释放资源 + // AT+MQTTCLEAN=0 +****************************/ +static uint8_t NetWorkFlow = 1; +static uint32_t Nport = 0; +static uint8_t Nssid[20] = {0}; +static uint8_t Npassword[20] = {0}; + +#ifdef MQTT_SCode +MQTTPacket_connectData MQTT_ConnectData = MQTTPacket_connectData_initializer; +char MQTT_ClientId[150] = {0}; +char MQTT_Username[65] = {0}; +char MQTT_Password[65] = {0}; +volatile uint16_t MQTT_ReadBufLen = 0; +#endif + +int ESP8266_WaitData(unsigned char* buf, int count) +{ + while(1) + { + if(UART2ReadFlag&0x8000) + { + memcpy(buf, (void*)&UART2ReadBuf[MQTT_ReadBufLen], count); + MQTT_ReadBufLen += count; + return count; + } + Delay_ms(10); + } +} +#ifdef MQTT_SCode +uint8_t MQTT_UserSubscribe(char *pSubTopic) { + uint8_t buf[200] = {0}; + uint32_t buflen = sizeof(buf); + int32_t msgid = 1; + int32_t req_qos = 0; // 服务质量 + + MQTTString topicString = MQTTString_initializer; + topicString.cstring = pSubTopic; + + // 订阅格式化 + MQTTSerialize_subscribe(buf, buflen, 0, msgid, 1, &topicString, &req_qos); + + // 发送订阅 + UART2ReadFlag = 0; + ESP8266_SendStr((char *)buf); + if (MQTTPacket_read(buf, buflen, ESP8266_WaitData)==SUBACK) /* wait for suback */ + { + unsigned short submsgid; + int subcount; + int granted_qos; + + MQTTDeserialize_suback(&submsgid, 1, &subcount, &granted_qos, buf, buflen); + if (granted_qos != 0) + { + //Sys_SendLog("granted qos != 0, %d\n", granted_qos); + return 0; + } + else + { + //Sys_SendLog("granted qos = 0\n"); + return 1; + } + } + else + { + //Sys_SendLog("no suback received!\r\n"); + return 0; + } +} +#endif +#ifdef MQTT_SCode +// MQTT_Publish("/mqtt/topic/0", "hello0"); +void MQTT_UserPublish(char *pPubTopic, char *payload, int payloadlen) { + uint8_t buf[400] = {0}; + int buflen = sizeof(buf); + MQTTString topicString = MQTTString_initializer; + int len = 0; + + topicString.cstring = pPubTopic; + len += MQTTSerialize_publish((unsigned char *)(buf + len), buflen - len, 0, 0, 0, 0, topicString, (unsigned char *)payload, payloadlen); + ESP8266_SendStr((char *)buf); +} +#endif +uint8_t buf[400] = {0}; +int buflen = 0; +void ESP8266_NetWorkFlow(void) +{ + // 第一步，初始化为AP + if(NetWorkFlow == 1) { + ESP8266_APInit("XiaoYi_IOT_AirBox", "asdqwe9867"); + NetWorkFlow = 2; + } + // 第二步，持续发送UDP广播 + else if(NetWorkFlow == 2) { + if(DevParam.ESP8266SendTime >= 2000) + { + ESP8266_SendStr("{\"code\":\"0\",\"msg\":\"start connect\"}"); + DevParam.ESP8266SendTime = 0; + } + } + // 第三步，返回接受成功信息 + else if(NetWorkFlow == 3) { + ESP8266_SendStr("{\"code\":\"1\",\"msg\":\"getWifiInfo:success\"}"); + NetWorkFlow = 4; + } + // 第四步，连接家庭无线 + else if(NetWorkFlow == 4) { + ESP8266_STAInit(); + while(ESP8266_STAConnect((char *)Nssid, (char *)Npassword)); + NetWorkFlow = 5; + } + else if(NetWorkFlow == 5) { + #ifdef MQTT_SCode +// MQTT_ConnectData.MQTTVersion = 4; // 3.1.1 +// MQTT_ConnectData.keepAliveInterval = 60; // 设置心跳包间隔时间 +// MQTT_ConnectData.clientID.cstring = (char *)MQTT_ClientId;// 客户端ID +// MQTT_ConnectData.username.cstring = (char *)MQTT_Username;// 用户名 +// MQTT_ConnectData.password.cstring = (char *)MQTT_Password;// 密码 +// MQTT_ConnectData.cleansession = 0; // 清除会话 + + //rc = aiotMqttSign(product_key, device_name, device_secret, \ + //MQTT_ConnectData.clientID.cstring, MQTT_ConnectData.username.cstring, MQTT_ConnectData.password.cstring); + //if (rc < 0) { + //Sys_SendLog("aiotMqttSign -%0x4x\n", -rc); + //return -1; + //} + + // 网络连接 + //char *host = "a1ykSq0uPgd.iot-as-mqtt.cn-shanghai.aliyuncs.com"; + //int port = 1883; + //transport_open( host, port); + + // 发送 登录数据 + // 将连接字符串格式化一下，现在还没有发送 +// memset(buf, 0 ,sizeof(buf)); +// buflen = sizeof(buf); +// +// MQTTSerialize_connect( buf, buflen, &MQTT_ConnectData); +// UART2ReadFlag = 0; +// ESP8266_SendStr((char *)buf); + + // 等待connack +// if (MQTTPacket_read(buf, buflen, ESP8266_WaitData) == CONNACK){ +// unsigned char sessionPresent, connack_rc; +// if (MQTTDeserialize_connack(&sessionPresent, &connack_rc, buf, buflen) != 1 || connack_rc != 0) +// { +// //Sys_SendLog("Unable to connect,return code %d\r\n", connack_rc); +// //return -1; +// } +// } + /*订阅*/ +// MQTT_UserSubscribe("status/set/7CDFA1049ADA"); //更新设备状态 +// MQTT_UserSubscribe("status/get/7CDFA1049ADA"); //获取设备状态 +// MQTT_UserSubscribe("setting/set/7CDFA1049ADA");//更新设备配置 +// MQTT_UserSubscribe("setting/get/7CDFA1049ADA");//获取设备配置 + #endif + /********************************/ + #ifdef MQTT_AT + + #endif + /********************************/ + } + else if(NetWorkFlow == 10) + { + #ifdef MQTT_SCode +// if(DevParam.ESP8266SendTime >= 2000) +// { +// MQTTSerialize_pingreq(buf, buflen);// 发送心跳 +// ESP8266_SendStr((char *)buf); +// DevParam.ESP8266SendTime = 0; +// } + // 发布设备状态 +// else if(DevParam.ESP8266SendTime>=1500){ +// // /a1ykSq0uPgd/qmvH76OCy2FeGp9DDMPx/user/update +// // 0x00 00000001 0032 0100 001223 +// char txBuf[30] = {0}; +// char txLen = 0; +// //txBuf[txLen++] = COMMAND_REPORT;// 属性上报 +// txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x01;// ID +// //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0); // INT16 +// //txBuf[txLen++] = DeviceData.prop_bool; // BOOL +// //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0);// FLOAT + +// MQTT_UserPublish("device_info", txBuf, txLen); +// DevParam.ESP8266SendTime = 0; +// } + #endif + } +} + +cJSON *root = NULL; +char JsonString[100] = {0}; +uint16_t init = 0; +uint16_t i = 0; + +uint8_t rbuf[256] = {0}; +uint8_t rlen = 0; +void ESP8266_NetReceiveInfor(void) { + if(UART2ReadFlag&0x8000) + { + if(NetWorkFlow == 2) { + // {"port":"60156","ssid":"xxx","password":"xxxx"} + if(UART2ReadBuf[0] == '{') + { + for(i = 0;;i++) + { + JsonString[i] = UART2ReadBuf[i]; + if(UART2ReadBuf[i] == '}') + { + // 解析数据 + root = cJSON_Parse((char *)JsonString); + if(root == NULL) + { + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART3ReadFlag = 0; + return; + } + Nport = cJSON_GetObjectItem(root, "port")->valuedouble; + if(Nport==60156) + { + sprintf((char *)Nssid, "%s",cJSON_GetObjectItem(root, "ssid")->valuestring); + sprintf((char *)Npassword,"%s",cJSON_GetObjectItem(root, "password")->valuestring); + // 进入无线第三步 + NetWorkFlow = 3; + } + cJSON_Delete(root); + memset(JsonString, 0, sizeof(JsonString)); + break; + } + } + } + } + if(NetWorkFlow == 10) + { + #ifdef MQTT_SCode + rlen = UART2ReadFlag&(~(1<<15)); + memcpy(rbuf, (void*)&UART2ReadBuf, rlen); + memset(UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART2ReadFlag = 0; + + if (strstr((char *)rbuf, "CLOSED")) + { + + } + else + { + if (0xD0 == *rbuf) + { + //Sys_SendLog("MQTT Heart Beat \r\n"); + } + else + { +// strncpy(Topic, (void*)(rbuf+4), rbuf[3]); +// printf("Topic: %s\r\n", Topic); +// strncpy(message,(void*)(rbuf+4+rbuf[3]),rbuf[1]-rbuf[3]-2); +// printf("Message: %s\r\n", message); +// memset(rbuf, 0, sizeof(rbuf)); + } + } + #endif + } + } +} + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/esp8266_work.h b/firmware/stm32-esp/user/show/esp8266_work.h index 19be3ab4..2302e6c3 100644 --- a/firmware/stm32-esp/user/show/esp8266_work.h +++ b/firmware/stm32-esp/user/show/esp8266_work.h @@ -1,18 +1,18 @@ -#ifndef _ESP8266_WORK_H_ -#define _ESP8266_WORK_H_ - -#include "stm32f10x.h" - -#include "esp8266_uart2.h" - -#include "cJSON.h" - -#include "MQTTPacket.h" - -#include "MQTTConnect.h" - -void ESP8266_NetWorkFlow(void); -void ESP8266_NetReceiveInfor(void); -#endif - - +#ifndef _ESP8266_WORK_H_ +#define _ESP8266_WORK_H_ + +#include "stm32f10x.h" + +#include "esp8266_uart2.h" + +#include "cJSON.h" + +#include "MQTTPacket.h" + +#include "MQTTConnect.h" + +void ESP8266_NetWorkFlow(void); +void ESP8266_NetReceiveInfor(void); +#endif + + diff --git a/firmware/stm32-esp/user/show/pm_uart3.c b/firmware/stm32-esp/user/show/pm_uart3.c index ce7abc55..f18609a2 100644 --- a/firmware/stm32-esp/user/show/pm_uart3.c +++ b/firmware/stm32-esp/user/show/pm_uart3.c @@ -1,196 +1,196 @@ -#include "pm_uart3.h" - -// 校验 -// 校验正确--0xff 校验错误--0x00 -uint8_t PMD4_CheckSum(uint8_t *data) { - uint8_t i = 0, result = 0; - uint16_t sum = 0; - - if( (data[0] == 0x42) && (data[1] == 0x4d) ) - { - for(i = 0; i < 30; i++) - { - sum += data[i]; - } - if( sum == ((data[30]<<8) + data[31]) ) - { - result = 0xff; - } - } - return result; -} -// PM 初始化 -void PMD4_Init(void) { - BSP_UART3Init(9600); - - Power_PMD4(1); - Delay_ms(20); -} - -// 请求获取空气信息 -void PMD4_ReqGetAirInfor(uint8_t Code) { - uint16_t sum = 0; - uint8_t data[20] = {0}; - uint8_t i = 0; - - data[0] = 0x42; - data[1] = 0x4d; - - data[2] = Code; - - data[3] = 0x00; - data[4] = 0x00; - - for(i = 0; i < 5; i++) - { - sum += data[i]; - } - data[5] = (uint8_t)(sum>>8); - data[6] = (uint8_t)(sum>>0); - - BSP_UART3SendData(data, 7); -} -/*PMD4，获取空气信息*/ -void PMD4_GetAirInfor(void) -{ - #ifdef Device_LCD - uint16_t x = 0, y = 0; - uint8_t i = 0; - #endif - - if(UART3ReadFlag&0x8000) - { - if( PMD4_CheckSum(UART3ReadBuf)==0xff) - { - DevParam.PM1_0 = (uint16_t)(UART3ReadBuf[4]<<8) + (uint16_t)(UART3ReadBuf[5]<<0); - DevParam.PM2_5 = (uint16_t)(UART3ReadBuf[6]<<8) + (uint16_t)(UART3ReadBuf[7]<<0); - DevParam.PM10 = (uint16_t)(UART3ReadBuf[8]<<8) + (uint16_t)(UART3ReadBuf[9]<<0); - } - UART3ReadFlag = 0; - memset((void *)UART3ReadBuf, 0, sizeof(UART3ReadBuf)); - } - if(DevParam.AirInforGetTime >= 2000) - { - PMD4_ReqGetAirInfor(0xE2); - DevParam.AirInforGetTime = 0; - } - /**********显示实时空气信息*****************/ - #ifdef Device_LCD - // PM1.0 - if(DevParam.ShowPM1_0 != DevParam.PM1_0) - { - x = (uint16_t)(SimLCD.width/2/2-20); - y = 260; - - // 1 - i = (uint8_t)(DevParam.PM1_0/100); - SimLCD_NewShowChar( (x+8), y, (i + 16)); - // 1 - i = (uint8_t)(DevParam.PM1_0/10%10); - SimLCD_NewShowChar( (x+16), y, (i + 16)); - // 0 - i = (uint8_t)(DevParam.PM1_0%10); - SimLCD_NewShowChar( (x+24), y, (i + 16)); - - DevParam.ShowPM1_0 = DevParam.PM1_0; - } - // PM2.5 - if(DevParam.ShowPM2_5 != DevParam.PM2_5) - { - x = (uint16_t)(SimLCD.width/2-20); - y = 80; - - // 1 - i = (uint8_t)(DevParam.PM2_5/100); - SimLCD_NewShowChar( (x+8), y, (i + 16)); - // 1 - i = (uint8_t)(DevParam.PM2_5/10%10); - SimLCD_NewShowChar( (x+16), y, (i + 16)); - // 0 - i = (uint8_t)(DevParam.PM2_5%10); - SimLCD_NewShowChar( (x+24), y, (i + 16)); - - DevParam.ShowPM2_5 = DevParam.PM2_5; - } - // PM10 - if(DevParam.PM10 != DevParam.ShowPM10) - { - x = (uint16_t)(SimLCD.width/2/2*3-16); - y = 260; - - // 1 - i = (uint8_t)(DevParam.PM10/100); - SimLCD_NewShowChar( (x+8), y, (i + 16)); - // 1 - i = (uint8_t)(DevParam.PM10/10%10); - SimLCD_NewShowChar( (x+16), y, (i + 16)); - // 0 - i = (uint8_t)(DevParam.PM10%10); - SimLCD_NewShowChar( (x+24), y, (i + 16)); - - DevParam.ShowPM10 = DevParam.PM10; - } - #endif -} -/*显示部分，基础外形刷新*/ -void Show_BasicShapeRefresh(void) -{ - #ifdef Device_LCD - uint16_t x = 0, y = 0; - - // 画上边内圆 - x = (uint16_t)(SimLCD.width/2); - y = (uint16_t)(SimLCD.height/3) + 10; - - // 填充圆环 r0外圆 r1内圆 - SimLCD_PointColor = SimLCDColor_CYAN; - SimLCD_FillTorus( x, y, 100, 90); - - // 画下边两个圆 - x = (uint16_t)(SimLCD.width/2/2*3); - y = (uint16_t)(SimLCD.height/3*2) + (uint16_t)(SimLCD.height/3/2); - - // 填充圆环 r0外圆 r1内圆 - SimLCD_PointColor = SimLCDColor_YELLOW; - SimLCD_FillTorus( x, y, 50, 45); - - x = (uint16_t)(SimLCD.width/2/2); - y = (uint16_t)(SimLCD.height/3*2) + (uint16_t)(SimLCD.height/3/2); - SimLCD_PointColor = SimLCDColor_LIGHTGREEN; - SimLCD_FillTorus( x, y, 50, 45); - - // 显示字符串 PM2.5 ug/m3 PM1.0 PM10 - x = (uint16_t)(SimLCD.width/2-24); - y = 40; - SimLCD_Show_PM2_5( x, y); - - x = (uint16_t)(SimLCD.width/2-20); - y = 180; - SimLCD_Show_ug_m3( x, y); - x = (uint16_t)(SimLCD.width/2/2-20); - y = 230; - SimLCD_Show_PM1_0( x, y); - x = (uint16_t)(SimLCD.width/2/2*3-16); - y = 230; - SimLCD_Show_PM10( x, y); - #endif -} - - - - - - - - - - - - - - - - - - - +#include "pm_uart3.h" + +// 校验 +// 校验正确--0xff 校验错误--0x00 +uint8_t PMD4_CheckSum(uint8_t *data) { + uint8_t i = 0, result = 0; + uint16_t sum = 0; + + if( (data[0] == 0x42) && (data[1] == 0x4d) ) + { + for(i = 0; i < 30; i++) + { + sum += data[i]; + } + if( sum == ((data[30]<<8) + data[31]) ) + { + result = 0xff; + } + } + return result; +} +// PM 初始化 +void PMD4_Init(void) { + BSP_UART3Init(9600); + + Power_PMD4(1); + Delay_ms(20); +} + +// 请求获取空气信息 +void PMD4_ReqGetAirInfor(uint8_t Code) { + uint16_t sum = 0; + uint8_t data[20] = {0}; + uint8_t i = 0; + + data[0] = 0x42; + data[1] = 0x4d; + + data[2] = Code; + + data[3] = 0x00; + data[4] = 0x00; + + for(i = 0; i < 5; i++) + { + sum += data[i]; + } + data[5] = (uint8_t)(sum>>8); + data[6] = (uint8_t)(sum>>0); + + BSP_UART3SendData(data, 7); +} +/*PMD4，获取空气信息*/ +void PMD4_GetAirInfor(void) +{ + #ifdef Device_LCD + uint16_t x = 0, y = 0; + uint8_t i = 0; + #endif + + if(UART3ReadFlag&0x8000) + { + if( PMD4_CheckSum(UART3ReadBuf)==0xff) + { + DevParam.PM1_0 = (uint16_t)(UART3ReadBuf[4]<<8) + (uint16_t)(UART3ReadBuf[5]<<0); + DevParam.PM2_5 = (uint16_t)(UART3ReadBuf[6]<<8) + (uint16_t)(UART3ReadBuf[7]<<0); + DevParam.PM10 = (uint16_t)(UART3ReadBuf[8]<<8) + (uint16_t)(UART3ReadBuf[9]<<0); + } + UART3ReadFlag = 0; + memset((void *)UART3ReadBuf, 0, sizeof(UART3ReadBuf)); + } + if(DevParam.AirInforGetTime >= 2000) + { + PMD4_ReqGetAirInfor(0xE2); + DevParam.AirInforGetTime = 0; + } + /**********显示实时空气信息*****************/ + #ifdef Device_LCD + // PM1.0 + if(DevParam.ShowPM1_0 != DevParam.PM1_0) + { + x = (uint16_t)(SimLCD.width/2/2-20); + y = 260; + + // 1 + i = (uint8_t)(DevParam.PM1_0/100); + SimLCD_NewShowChar( (x+8), y, (i + 16)); + // 1 + i = (uint8_t)(DevParam.PM1_0/10%10); + SimLCD_NewShowChar( (x+16), y, (i + 16)); + // 0 + i = (uint8_t)(DevParam.PM1_0%10); + SimLCD_NewShowChar( (x+24), y, (i + 16)); + + DevParam.ShowPM1_0 = DevParam.PM1_0; + } + // PM2.5 + if(DevParam.ShowPM2_5 != DevParam.PM2_5) + { + x = (uint16_t)(SimLCD.width/2-20); + y = 80; + + // 1 + i = (uint8_t)(DevParam.PM2_5/100); + SimLCD_NewShowChar( (x+8), y, (i + 16)); + // 1 + i = (uint8_t)(DevParam.PM2_5/10%10); + SimLCD_NewShowChar( (x+16), y, (i + 16)); + // 0 + i = (uint8_t)(DevParam.PM2_5%10); + SimLCD_NewShowChar( (x+24), y, (i + 16)); + + DevParam.ShowPM2_5 = DevParam.PM2_5; + } + // PM10 + if(DevParam.PM10 != DevParam.ShowPM10) + { + x = (uint16_t)(SimLCD.width/2/2*3-16); + y = 260; + + // 1 + i = (uint8_t)(DevParam.PM10/100); + SimLCD_NewShowChar( (x+8), y, (i + 16)); + // 1 + i = (uint8_t)(DevParam.PM10/10%10); + SimLCD_NewShowChar( (x+16), y, (i + 16)); + // 0 + i = (uint8_t)(DevParam.PM10%10); + SimLCD_NewShowChar( (x+24), y, (i + 16)); + + DevParam.ShowPM10 = DevParam.PM10; + } + #endif +} +/*显示部分，基础外形刷新*/ +void Show_BasicShapeRefresh(void) +{ + #ifdef Device_LCD + uint16_t x = 0, y = 0; + + // 画上边内圆 + x = (uint16_t)(SimLCD.width/2); + y = (uint16_t)(SimLCD.height/3) + 10; + + // 填充圆环 r0外圆 r1内圆 + SimLCD_PointColor = SimLCDColor_CYAN; + SimLCD_FillTorus( x, y, 100, 90); + + // 画下边两个圆 + x = (uint16_t)(SimLCD.width/2/2*3); + y = (uint16_t)(SimLCD.height/3*2) + (uint16_t)(SimLCD.height/3/2); + + // 填充圆环 r0外圆 r1内圆 + SimLCD_PointColor = SimLCDColor_YELLOW; + SimLCD_FillTorus( x, y, 50, 45); + + x = (uint16_t)(SimLCD.width/2/2); + y = (uint16_t)(SimLCD.height/3*2) + (uint16_t)(SimLCD.height/3/2); + SimLCD_PointColor = SimLCDColor_LIGHTGREEN; + SimLCD_FillTorus( x, y, 50, 45); + + // 显示字符串 PM2.5 ug/m3 PM1.0 PM10 + x = (uint16_t)(SimLCD.width/2-24); + y = 40; + SimLCD_Show_PM2_5( x, y); + + x = (uint16_t)(SimLCD.width/2-20); + y = 180; + SimLCD_Show_ug_m3( x, y); + x = (uint16_t)(SimLCD.width/2/2-20); + y = 230; + SimLCD_Show_PM1_0( x, y); + x = (uint16_t)(SimLCD.width/2/2*3-16); + y = 230; + SimLCD_Show_PM10( x, y); + #endif +} + + + + + + + + + + + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/pm_uart3.h b/firmware/stm32-esp/user/show/pm_uart3.h index cb07f78e..4d2ea076 100644 --- a/firmware/stm32-esp/user/show/pm_uart3.h +++ b/firmware/stm32-esp/user/show/pm_uart3.h @@ -1,28 +1,28 @@ -#ifndef _PM_UART3_H_ -#define _PM_UART3_H_ - -#include "stm32f10x.h" - -#include "bsp_uart3.h" - -#include "bsp_timer3.h" - -#include "bsp_port.h" - -#include "simulation_lcd.h" - -void PMD4_Init(void); -/*PMD4，获取空气信息*/ -void PMD4_GetAirInfor(void); -/*显示部分，基础外形刷新*/ -void Show_BasicShapeRefresh(void); -#endif - - - - - - - - - +#ifndef _PM_UART3_H_ +#define _PM_UART3_H_ + +#include "stm32f10x.h" + +#include "bsp_uart3.h" + +#include "bsp_timer3.h" + +#include "bsp_port.h" + +#include "simulation_lcd.h" + +void PMD4_Init(void); +/*PMD4，获取空气信息*/ +void PMD4_GetAirInfor(void); +/*显示部分，基础外形刷新*/ +void Show_BasicShapeRefresh(void); +#endif + + + + + + + + + diff --git a/firmware/stm32-esp/user/show/simulation_font.h b/firmware/stm32-esp/user/show/simulation_font.h index ca1a88a7..3557f783 100644 --- a/firmware/stm32-esp/user/show/simulation_font.h +++ b/firmware/stm32-esp/user/show/simulation_font.h @@ -1,270 +1,270 @@ -#ifndef _SIMULATION_FONT_H_ -#define _SIMULATION_FONT_H_ - -//常用ASCII表 -//偏移量32 -//ASCII字符集: !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ -//PC2LCD2002取模方式设置：阴码+逐列式+顺向+C51格式 -//总共：3个字符集（12*12、16*16和24*24），用户可以自行新增其他分辨率的字符集。 -//每个字符所占用的字节数为:(size/8+((size%8)?1:0))*(size/2),其中size:是字库生成时的点阵大小(12/16/24...) - -const unsigned char Simulation_Asc1206[95][12]={ -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ -{0x00,0x00,0x00,0x00,0x3F,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ -{0x00,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x40,0x00,0x00,0x00},/*""",2*/ -{0x09,0x00,0x0B,0xC0,0x3D,0x00,0x0B,0xC0,0x3D,0x00,0x09,0x00},/*"#",3*/ -{0x18,0xC0,0x24,0x40,0x7F,0xE0,0x22,0x40,0x31,0x80,0x00,0x00},/*"$",4*/ -{0x18,0x00,0x24,0xC0,0x1B,0x00,0x0D,0x80,0x32,0x40,0x01,0x80},/*"%",5*/ -{0x03,0x80,0x1C,0x40,0x27,0x40,0x1C,0x80,0x07,0x40,0x00,0x40},/*"&",6*/ -{0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x20,0x40,0x40,0x20},/*"(",8*/ -{0x00,0x00,0x40,0x20,0x20,0x40,0x1F,0x80,0x00,0x00,0x00,0x00},/*")",9*/ -{0x09,0x00,0x06,0x00,0x1F,0x80,0x06,0x00,0x09,0x00,0x00,0x00},/*"*",10*/ -{0x04,0x00,0x04,0x00,0x3F,0x80,0x04,0x00,0x04,0x00,0x00,0x00},/*"+",11*/ -{0x00,0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ -{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x00,0x00},/*"-",13*/ -{0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ -{0x00,0x20,0x01,0xC0,0x06,0x00,0x38,0x00,0x40,0x00,0x00,0x00},/*"/",15*/ -{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"0",16*/ -{0x00,0x00,0x10,0x40,0x3F,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"1",17*/ -{0x18,0xC0,0x21,0x40,0x22,0x40,0x24,0x40,0x18,0x40,0x00,0x00},/*"2",18*/ -{0x10,0x80,0x20,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"3",19*/ -{0x02,0x00,0x0D,0x00,0x11,0x00,0x3F,0xC0,0x01,0x40,0x00,0x00},/*"4",20*/ -{0x3C,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x23,0x80,0x00,0x00},/*"5",21*/ -{0x1F,0x80,0x24,0x40,0x24,0x40,0x34,0x40,0x03,0x80,0x00,0x00},/*"6",22*/ -{0x30,0x00,0x20,0x00,0x27,0xC0,0x38,0x00,0x20,0x00,0x00,0x00},/*"7",23*/ -{0x1B,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"8",24*/ -{0x1C,0x00,0x22,0xC0,0x22,0x40,0x22,0x40,0x1F,0x80,0x00,0x00},/*"9",25*/ -{0x00,0x00,0x00,0x00,0x08,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ -{0x00,0x00,0x00,0x00,0x04,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ -{0x00,0x00,0x04,0x00,0x0A,0x00,0x11,0x00,0x20,0x80,0x40,0x40},/*"<",28*/ -{0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x00,0x00},/*"=",29*/ -{0x00,0x00,0x40,0x40,0x20,0x80,0x11,0x00,0x0A,0x00,0x04,0x00},/*">",30*/ -{0x18,0x00,0x20,0x00,0x23,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"?",31*/ -{0x1F,0x80,0x20,0x40,0x27,0x40,0x29,0x40,0x1F,0x40,0x00,0x00},/*"@",32*/ -{0x00,0x40,0x07,0xC0,0x39,0x00,0x0F,0x00,0x01,0xC0,0x00,0x40},/*"A",33*/ -{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"B",34*/ -{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x30,0x80,0x00,0x00},/*"C",35*/ -{0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"D",36*/ -{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x40,0x30,0xC0,0x00,0x00},/*"E",37*/ -{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x00,0x30,0x00,0x00,0x00},/*"F",38*/ -{0x0F,0x00,0x10,0x80,0x20,0x40,0x22,0x40,0x33,0x80,0x02,0x00},/*"G",39*/ -{0x20,0x40,0x3F,0xC0,0x04,0x00,0x04,0x00,0x3F,0xC0,0x20,0x40},/*"H",40*/ -{0x20,0x40,0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x00,0x00},/*"I",41*/ -{0x00,0x60,0x20,0x20,0x20,0x20,0x3F,0xC0,0x20,0x00,0x20,0x00},/*"J",42*/ -{0x20,0x40,0x3F,0xC0,0x24,0x40,0x0B,0x00,0x30,0xC0,0x20,0x40},/*"K",43*/ -{0x20,0x40,0x3F,0xC0,0x20,0x40,0x00,0x40,0x00,0x40,0x00,0xC0},/*"L",44*/ -{0x3F,0xC0,0x3C,0x00,0x03,0xC0,0x3C,0x00,0x3F,0xC0,0x00,0x00},/*"M",45*/ -{0x20,0x40,0x3F,0xC0,0x0C,0x40,0x23,0x00,0x3F,0xC0,0x20,0x00},/*"N",46*/ -{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"O",47*/ -{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"P",48*/ -{0x1F,0x80,0x21,0x40,0x21,0x40,0x20,0xE0,0x1F,0xA0,0x00,0x00},/*"Q",49*/ -{0x20,0x40,0x3F,0xC0,0x24,0x40,0x26,0x00,0x19,0xC0,0x00,0x40},/*"R",50*/ -{0x18,0xC0,0x24,0x40,0x24,0x40,0x22,0x40,0x31,0x80,0x00,0x00},/*"S",51*/ -{0x30,0x00,0x20,0x40,0x3F,0xC0,0x20,0x40,0x30,0x00,0x00,0x00},/*"T",52*/ -{0x20,0x00,0x3F,0x80,0x00,0x40,0x00,0x40,0x3F,0x80,0x20,0x00},/*"U",53*/ -{0x20,0x00,0x3E,0x00,0x01,0xC0,0x07,0x00,0x38,0x00,0x20,0x00},/*"V",54*/ -{0x38,0x00,0x07,0xC0,0x3C,0x00,0x07,0xC0,0x38,0x00,0x00,0x00},/*"W",55*/ -{0x20,0x40,0x39,0xC0,0x06,0x00,0x39,0xC0,0x20,0x40,0x00,0x00},/*"X",56*/ -{0x20,0x00,0x38,0x40,0x07,0xC0,0x38,0x40,0x20,0x00,0x00,0x00},/*"Y",57*/ -{0x30,0x40,0x21,0xC0,0x26,0x40,0x38,0x40,0x20,0xC0,0x00,0x00},/*"Z",58*/ -{0x00,0x00,0x00,0x00,0x7F,0xE0,0x40,0x20,0x40,0x20,0x00,0x00},/*"[",59*/ -{0x00,0x00,0x70,0x00,0x0C,0x00,0x03,0x80,0x00,0x40,0x00,0x00},/*"\",60*/ -{0x00,0x00,0x40,0x20,0x40,0x20,0x7F,0xE0,0x00,0x00,0x00,0x00},/*"]",61*/ -{0x00,0x00,0x20,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ -{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10},/*"_",63*/ -{0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ -{0x00,0x00,0x02,0x80,0x05,0x40,0x05,0x40,0x03,0xC0,0x00,0x40},/*"a",65*/ -{0x20,0x00,0x3F,0xC0,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"b",66*/ -{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x06,0x40,0x00,0x00},/*"c",67*/ -{0x00,0x00,0x03,0x80,0x04,0x40,0x24,0x40,0x3F,0xC0,0x00,0x40},/*"d",68*/ -{0x00,0x00,0x03,0x80,0x05,0x40,0x05,0x40,0x03,0x40,0x00,0x00},/*"e",69*/ -{0x00,0x00,0x04,0x40,0x1F,0xC0,0x24,0x40,0x24,0x40,0x20,0x00},/*"f",70*/ -{0x00,0x00,0x02,0xE0,0x05,0x50,0x05,0x50,0x06,0x50,0x04,0x20},/*"g",71*/ -{0x20,0x40,0x3F,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"h",72*/ -{0x00,0x00,0x04,0x40,0x27,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"i",73*/ -{0x00,0x10,0x00,0x10,0x04,0x10,0x27,0xE0,0x00,0x00,0x00,0x00},/*"j",74*/ -{0x20,0x40,0x3F,0xC0,0x01,0x40,0x07,0x00,0x04,0xC0,0x04,0x40},/*"k",75*/ -{0x20,0x40,0x20,0x40,0x3F,0xC0,0x00,0x40,0x00,0x40,0x00,0x00},/*"l",76*/ -{0x07,0xC0,0x04,0x00,0x07,0xC0,0x04,0x00,0x03,0xC0,0x00,0x00},/*"m",77*/ -{0x04,0x40,0x07,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"n",78*/ -{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"o",79*/ -{0x04,0x10,0x07,0xF0,0x04,0x50,0x04,0x40,0x03,0x80,0x00,0x00},/*"p",80*/ -{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x50,0x07,0xF0,0x00,0x10},/*"q",81*/ -{0x04,0x40,0x07,0xC0,0x02,0x40,0x04,0x00,0x04,0x00,0x00,0x00},/*"r",82*/ -{0x00,0x00,0x06,0x40,0x05,0x40,0x05,0x40,0x04,0xC0,0x00,0x00},/*"s",83*/ -{0x00,0x00,0x04,0x00,0x1F,0x80,0x04,0x40,0x00,0x40,0x00,0x00},/*"t",84*/ -{0x04,0x00,0x07,0x80,0x00,0x40,0x04,0x40,0x07,0xC0,0x00,0x40},/*"u",85*/ -{0x04,0x00,0x07,0x00,0x04,0xC0,0x01,0x80,0x06,0x00,0x04,0x00},/*"v",86*/ -{0x06,0x00,0x01,0xC0,0x07,0x00,0x01,0xC0,0x06,0x00,0x00,0x00},/*"w",87*/ -{0x04,0x40,0x06,0xC0,0x01,0x00,0x06,0xC0,0x04,0x40,0x00,0x00},/*"x",88*/ -{0x04,0x10,0x07,0x10,0x04,0xE0,0x01,0x80,0x06,0x00,0x04,0x00},/*"y",89*/ -{0x00,0x00,0x04,0x40,0x05,0xC0,0x06,0x40,0x04,0x40,0x00,0x00},/*"z",90*/ -{0x00,0x00,0x00,0x00,0x04,0x00,0x7B,0xE0,0x40,0x20,0x00,0x00},/*"{",91*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00},/*"|",92*/ -{0x00,0x00,0x40,0x20,0x7B,0xE0,0x04,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ -{0x40,0x00,0x80,0x00,0x40,0x00,0x20,0x00,0x20,0x00,0x40,0x00},/*"~",94*/ -}; - -const unsigned char Simulation_Asc1608[95][16]={ -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xCC,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ -{0x00,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x00,0x00},/*""",2*/ -{0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x00,0x00},/*"#",3*/ -{0x00,0x00,0x0E,0x18,0x11,0x04,0x3F,0xFF,0x10,0x84,0x0C,0x78,0x00,0x00,0x00,0x00},/*"$",4*/ -{0x0F,0x00,0x10,0x84,0x0F,0x38,0x00,0xC0,0x07,0x78,0x18,0x84,0x00,0x78,0x00,0x00},/*"%",5*/ -{0x00,0x78,0x0F,0x84,0x10,0xC4,0x11,0x24,0x0E,0x98,0x00,0xE4,0x00,0x84,0x00,0x08},/*"&",6*/ -{0x08,0x00,0x68,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x18,0x18,0x20,0x04,0x40,0x02,0x00,0x00},/*"(",8*/ -{0x00,0x00,0x40,0x02,0x20,0x04,0x18,0x18,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ -{0x02,0x40,0x02,0x40,0x01,0x80,0x0F,0xF0,0x01,0x80,0x02,0x40,0x02,0x40,0x00,0x00},/*"*",10*/ -{0x00,0x80,0x00,0x80,0x00,0x80,0x0F,0xF8,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00},/*"+",11*/ -{0x00,0x01,0x00,0x0D,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ -{0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},/*"-",13*/ -{0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ -{0x00,0x00,0x00,0x06,0x00,0x18,0x00,0x60,0x01,0x80,0x06,0x00,0x18,0x00,0x20,0x00},/*"/",15*/ -{0x00,0x00,0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"0",16*/ -{0x00,0x00,0x08,0x04,0x08,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"1",17*/ -{0x00,0x00,0x0E,0x0C,0x10,0x14,0x10,0x24,0x10,0x44,0x11,0x84,0x0E,0x0C,0x00,0x00},/*"2",18*/ -{0x00,0x00,0x0C,0x18,0x10,0x04,0x11,0x04,0x11,0x04,0x12,0x88,0x0C,0x70,0x00,0x00},/*"3",19*/ -{0x00,0x00,0x00,0xE0,0x03,0x20,0x04,0x24,0x08,0x24,0x1F,0xFC,0x00,0x24,0x00,0x00},/*"4",20*/ -{0x00,0x00,0x1F,0x98,0x10,0x84,0x11,0x04,0x11,0x04,0x10,0x88,0x10,0x70,0x00,0x00},/*"5",21*/ -{0x00,0x00,0x07,0xF0,0x08,0x88,0x11,0x04,0x11,0x04,0x18,0x88,0x00,0x70,0x00,0x00},/*"6",22*/ -{0x00,0x00,0x1C,0x00,0x10,0x00,0x10,0xFC,0x13,0x00,0x1C,0x00,0x10,0x00,0x00,0x00},/*"7",23*/ -{0x00,0x00,0x0E,0x38,0x11,0x44,0x10,0x84,0x10,0x84,0x11,0x44,0x0E,0x38,0x00,0x00},/*"8",24*/ -{0x00,0x00,0x07,0x00,0x08,0x8C,0x10,0x44,0x10,0x44,0x08,0x88,0x07,0xF0,0x00,0x00},/*"9",25*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x03,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ -{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ -{0x00,0x00,0x00,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10,0x04,0x00,0x00},/*"<",28*/ -{0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x00,0x00},/*"=",29*/ -{0x00,0x00,0x10,0x04,0x08,0x08,0x04,0x10,0x02,0x20,0x01,0x40,0x00,0x80,0x00,0x00},/*">",30*/ -{0x00,0x00,0x0E,0x00,0x12,0x00,0x10,0x0C,0x10,0x6C,0x10,0x80,0x0F,0x00,0x00,0x00},/*"?",31*/ -{0x03,0xE0,0x0C,0x18,0x13,0xE4,0x14,0x24,0x17,0xC4,0x08,0x28,0x07,0xD0,0x00,0x00},/*"@",32*/ -{0x00,0x04,0x00,0x3C,0x03,0xC4,0x1C,0x40,0x07,0x40,0x00,0xE4,0x00,0x1C,0x00,0x04},/*"A",33*/ -{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x11,0x04,0x0E,0x88,0x00,0x70,0x00,0x00},/*"B",34*/ -{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x04,0x10,0x08,0x1C,0x10,0x00,0x00},/*"C",35*/ -{0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"D",36*/ -{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x17,0xC4,0x10,0x04,0x08,0x18,0x00,0x00},/*"E",37*/ -{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x17,0xC0,0x10,0x00,0x08,0x00,0x00,0x00},/*"F",38*/ -{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x44,0x1C,0x78,0x00,0x40,0x00,0x00},/*"G",39*/ -{0x10,0x04,0x1F,0xFC,0x10,0x84,0x00,0x80,0x00,0x80,0x10,0x84,0x1F,0xFC,0x10,0x04},/*"H",40*/ -{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x00,0x00,0x00,0x00},/*"I",41*/ -{0x00,0x03,0x00,0x01,0x10,0x01,0x10,0x01,0x1F,0xFE,0x10,0x00,0x10,0x00,0x00,0x00},/*"J",42*/ -{0x10,0x04,0x1F,0xFC,0x11,0x04,0x03,0x80,0x14,0x64,0x18,0x1C,0x10,0x04,0x00,0x00},/*"K",43*/ -{0x10,0x04,0x1F,0xFC,0x10,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x0C,0x00,0x00},/*"L",44*/ -{0x10,0x04,0x1F,0xFC,0x1F,0x00,0x00,0xFC,0x1F,0x00,0x1F,0xFC,0x10,0x04,0x00,0x00},/*"M",45*/ -{0x10,0x04,0x1F,0xFC,0x0C,0x04,0x03,0x00,0x00,0xE0,0x10,0x18,0x1F,0xFC,0x10,0x00},/*"N",46*/ -{0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"O",47*/ -{0x10,0x04,0x1F,0xFC,0x10,0x84,0x10,0x80,0x10,0x80,0x10,0x80,0x0F,0x00,0x00,0x00},/*"P",48*/ -{0x07,0xF0,0x08,0x18,0x10,0x24,0x10,0x24,0x10,0x1C,0x08,0x0A,0x07,0xF2,0x00,0x00},/*"Q",49*/ -{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x11,0xC0,0x11,0x30,0x0E,0x0C,0x00,0x04},/*"R",50*/ -{0x00,0x00,0x0E,0x1C,0x11,0x04,0x10,0x84,0x10,0x84,0x10,0x44,0x1C,0x38,0x00,0x00},/*"S",51*/ -{0x18,0x00,0x10,0x00,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x00,0x18,0x00,0x00,0x00},/*"T",52*/ -{0x10,0x00,0x1F,0xF8,0x10,0x04,0x00,0x04,0x00,0x04,0x10,0x04,0x1F,0xF8,0x10,0x00},/*"U",53*/ -{0x10,0x00,0x1E,0x00,0x11,0xE0,0x00,0x1C,0x00,0x70,0x13,0x80,0x1C,0x00,0x10,0x00},/*"V",54*/ -{0x1F,0xC0,0x10,0x3C,0x00,0xE0,0x1F,0x00,0x00,0xE0,0x10,0x3C,0x1F,0xC0,0x00,0x00},/*"W",55*/ -{0x10,0x04,0x18,0x0C,0x16,0x34,0x01,0xC0,0x01,0xC0,0x16,0x34,0x18,0x0C,0x10,0x04},/*"X",56*/ -{0x10,0x00,0x1C,0x00,0x13,0x04,0x00,0xFC,0x13,0x04,0x1C,0x00,0x10,0x00,0x00,0x00},/*"Y",57*/ -{0x08,0x04,0x10,0x1C,0x10,0x64,0x10,0x84,0x13,0x04,0x1C,0x04,0x10,0x18,0x00,0x00},/*"Z",58*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x40,0x02,0x40,0x02,0x40,0x02,0x00,0x00},/*"[",59*/ -{0x00,0x00,0x30,0x00,0x0C,0x00,0x03,0x80,0x00,0x60,0x00,0x1C,0x00,0x03,0x00,0x00},/*"\",60*/ -{0x00,0x00,0x40,0x02,0x40,0x02,0x40,0x02,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ -{0x00,0x00,0x00,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00},/*"^",62*/ -{0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01},/*"_",63*/ -{0x00,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ -{0x00,0x00,0x00,0x98,0x01,0x24,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xFC,0x00,0x04},/*"a",65*/ -{0x10,0x00,0x1F,0xFC,0x00,0x88,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"b",66*/ -{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x00},/*"c",67*/ -{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x11,0x08,0x1F,0xFC,0x00,0x04},/*"d",68*/ -{0x00,0x00,0x00,0xF8,0x01,0x44,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xC8,0x00,0x00},/*"e",69*/ -{0x00,0x00,0x01,0x04,0x01,0x04,0x0F,0xFC,0x11,0x04,0x11,0x04,0x11,0x00,0x18,0x00},/*"f",70*/ -{0x00,0x00,0x00,0xD6,0x01,0x29,0x01,0x29,0x01,0x29,0x01,0xC9,0x01,0x06,0x00,0x00},/*"g",71*/ -{0x10,0x04,0x1F,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"h",72*/ -{0x00,0x00,0x01,0x04,0x19,0x04,0x19,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"i",73*/ -{0x00,0x00,0x00,0x03,0x00,0x01,0x01,0x01,0x19,0x01,0x19,0xFE,0x00,0x00,0x00,0x00},/*"j",74*/ -{0x10,0x04,0x1F,0xFC,0x00,0x24,0x00,0x40,0x01,0xB4,0x01,0x0C,0x01,0x04,0x00,0x00},/*"k",75*/ -{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"l",76*/ -{0x01,0x04,0x01,0xFC,0x01,0x04,0x01,0x00,0x01,0xFC,0x01,0x04,0x01,0x00,0x00,0xFC},/*"m",77*/ -{0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"n",78*/ -{0x00,0x00,0x00,0xF8,0x01,0x04,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0xF8,0x00,0x00},/*"o",79*/ -{0x01,0x01,0x01,0xFF,0x00,0x85,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"p",80*/ -{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x05,0x01,0xFF,0x00,0x01},/*"q",81*/ -{0x01,0x04,0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x04,0x01,0x00,0x01,0x80,0x00,0x00},/*"r",82*/ -{0x00,0x00,0x00,0xCC,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x98,0x00,0x00},/*"s",83*/ -{0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xF8,0x01,0x04,0x01,0x04,0x00,0x00,0x00,0x00},/*"t",84*/ -{0x01,0x00,0x01,0xF8,0x00,0x04,0x00,0x04,0x00,0x04,0x01,0x08,0x01,0xFC,0x00,0x04},/*"u",85*/ -{0x01,0x00,0x01,0x80,0x01,0x70,0x00,0x0C,0x00,0x10,0x01,0x60,0x01,0x80,0x01,0x00},/*"v",86*/ -{0x01,0xF0,0x01,0x0C,0x00,0x30,0x01,0xC0,0x00,0x30,0x01,0x0C,0x01,0xF0,0x01,0x00},/*"w",87*/ -{0x00,0x00,0x01,0x04,0x01,0x8C,0x00,0x74,0x01,0x70,0x01,0x8C,0x01,0x04,0x00,0x00},/*"x",88*/ -{0x01,0x01,0x01,0x81,0x01,0x71,0x00,0x0E,0x00,0x18,0x01,0x60,0x01,0x80,0x01,0x00},/*"y",89*/ -{0x00,0x00,0x01,0x84,0x01,0x0C,0x01,0x34,0x01,0x44,0x01,0x84,0x01,0x0C,0x00,0x00},/*"z",90*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x3E,0xFC,0x40,0x02,0x40,0x02},/*"{",91*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ -{0x00,0x00,0x40,0x02,0x40,0x02,0x3E,0xFC,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ -{0x00,0x00,0x60,0x00,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x20,0x00},/*"~",94*/ -}; - -const unsigned char Simulation_Asc3636[5][36]= { -{0x00,0x00,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xF8,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x04,0x0C,0x00,0x06,0x0C,0x00,0x06,0x1C,0x00,0x03,0xF8,0x00,0x01,0xF0, -0x00,0x00,0x00,0x00},/*"P",0*/ -{0x00,0x00,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xF8,0x0F,0xF0,0x00,0x00,0xFF,0x80,0x00,0x07,0xF8,0x00,0x07,0xF8,0x01,0xFF,0x00,0x0F,0xE0,0x00,0x0F,0xFF,0xF8,0x0F,0xFF, -0xF8,0x00,0x00,0x00},/*"M",1*/ -{0x00,0x00,0x00,0x01,0x80,0x10,0x07,0x80,0x70,0x06,0x00,0xF0,0x0C,0x01,0xD0,0x0C,0x03,0x90,0x0C,0x07,0x10,0x0E,0x1C,0x10,0x07,0xF8,0x10,0x03,0xE0,0x10,0x00,0x00, -0x10,0x00,0x00,0x00},/*"2",2*/ -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00},/*".",3*/ -{0x00,0x00,0x80,0x00,0x38,0xE0,0x07,0xF8,0x70,0x07,0xB0,0x10,0x04,0x20,0x18,0x04,0x20,0x18,0x04,0x30,0x18,0x04,0x30,0x30,0x04,0x3C,0xF0,0x04,0x1F,0xE0,0x00,0x03, -0x00,0x00,0x00,0x00},/*"5",4*/ -}; - -const unsigned char Simulation_Asc3838[10][90]= { -{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFC,0x00,0x00, - 0x00,0x3F,0xFF,0xC0,0x00,0x00,0x7F,0xFF,0xF0,0x00, - 0x00,0xFC,0x01,0xF8,0x00,0x01,0xE0,0x00,0x78,0x00, - 0x03,0xC0,0x00,0x1C,0x00,0x03,0x80,0x00,0x1C,0x00, - 0x03,0x00,0x00,0x0E,0x00,0x03,0x00,0x00,0x0E,0x00, - 0x03,0x80,0x00,0x1C,0x00,0x03,0xC0,0x00,0x3C,0x00, - 0x01,0xF0,0x00,0x78,0x00,0x00,0xFF,0xFF,0xF0,0x00, - 0x00,0x7F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0x00,0x00, - 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"0",0*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x70, -0x00,0x00,0x00,0x00,0xE0,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, -0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"1",1*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x70,0x00,0x1C,0x00,0x00,0xF8,0x00,0x3C,0x00,0x01,0xE0,0x00,0x7C,0x00,0x03,0xC0,0x00,0xFC,0x00,0x03,0x80, -0x01,0xEC,0x00,0x03,0x80,0x03,0xCC,0x00,0x03,0x80,0x0F,0x0C,0x00,0x03,0x80,0x1E,0x0C,0x00,0x03,0x80,0x3C,0x0C,0x00,0x03,0x80,0xF8,0x0C,0x00,0x01,0xE7,0xE0,0x0C, -0x00,0x01,0xFF,0xC0,0x0C,0x00,0x00,0xFF,0x00,0x0C,0x00,0x00,0x18,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"2",2*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x30,0x00,0xE0,0x00,0x00,0x70,0x00,0xF0,0x00,0x01,0xF0,0x00,0x78,0x00,0x01,0xC0,0x00,0x3C,0x00,0x03,0x80, -0x00,0x1C,0x00,0x03,0x80,0x60,0x0C,0x00,0x03,0x00,0xE0,0x0C,0x00,0x03,0x00,0xE0,0x0C,0x00,0x03,0x80,0xE0,0x1C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x01,0xE7,0xB8,0x78, -0x00,0x01,0xFF,0x3F,0xF8,0x00,0x00,0xFE,0x1F,0xF0,0x00,0x00,0x18,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"3",3*/ - -{0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x07,0x80,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x3F,0x80,0x00,0x00,0x00,0x7B,0x80,0x00,0x00,0x01,0xE3,0x80,0x00,0x00,0x03, -0xC3,0x80,0x00,0x00,0x0F,0x83,0x80,0x00,0x00,0x1E,0x03,0x80,0x00,0x00,0x7C,0x03,0x80,0x00,0x00,0xF0,0x03,0x80,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC, -0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00},/*"4",4*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0xE0,0x00,0x00,0x07,0xE0,0xF0,0x00,0x00,0xFF,0xE0,0x78,0x00,0x03,0xFF,0xC0,0x1C,0x00,0x03,0xF1,0x80,0x1C,0x00,0x03,0x83, -0x80,0x0E,0x00,0x03,0x83,0x80,0x0E,0x00,0x03,0x83,0x80,0x0E,0x00,0x03,0x83,0x80,0x0C,0x00,0x03,0x83,0x80,0x1C,0x00,0x03,0x81,0xC0,0x3C,0x00,0x03,0x81,0xE0,0x78, -0x00,0x03,0x80,0xFF,0xF8,0x00,0x03,0x80,0x7F,0xE0,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"5",5*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00,0x3F,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x03,0xF8,0xF8,0x00,0x00,0x07,0xE0,0x3C,0x00,0x00,0x1F, -0xC0,0x1C,0x00,0x00,0x3F,0x80,0x0C,0x00,0x00,0xF9,0x80,0x0E,0x00,0x01,0xF1,0x80,0x0E,0x00,0x03,0xC1,0x80,0x0E,0x00,0x03,0x01,0xC0,0x0C,0x00,0x02,0x01,0xC0,0x1C, -0x00,0x00,0x00,0xE0,0x7C,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xF0,0x00,0x00,0x00,0x1F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00},/*"6",6*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x1C,0x00,0x03,0x80, -0x00,0xFC,0x00,0x03,0x80,0x07,0xFC,0x00,0x03,0x80,0x1F,0xE0,0x00,0x03,0x80,0x7F,0x00,0x00,0x03,0x81,0xF8,0x00,0x00,0x03,0x87,0xE0,0x00,0x00,0x03,0x9F,0x00,0x00, -0x00,0x03,0xFC,0x00,0x00,0x00,0x03,0xF0,0x00,0x00,0x00,0x03,0xE0,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"7",7*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x00,0x00,0x7E,0x1F,0xF0,0x00,0x00,0xFF,0xBF,0xF8,0x00,0x01,0xE7,0xF8,0x3C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x03,0x80, -0xE0,0x0C,0x00,0x03,0x80,0xE0,0x0E,0x00,0x03,0x00,0xE0,0x0E,0x00,0x03,0x80,0xE0,0x0E,0x00,0x03,0x80,0xE0,0x0C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x01,0xE7,0xB8,0x3C, -0x00,0x00,0xFF,0x3F,0xF8,0x00,0x00,0x7E,0x1F,0xF0,0x00,0x00,0x00,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"8",8*/ - -{0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x00,0x00,0x00,0x7F,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x01,0xE0,0x78,0x00,0x00,0x03,0xC0,0x38,0x06,0x00,0x03,0x80, -0x18,0x1E,0x00,0x03,0x80,0x18,0x7E,0x00,0x03,0x80,0x19,0xF8,0x00,0x03,0x80,0x1F,0xE0,0x00,0x03,0x80,0x3F,0xC0,0x00,0x03,0xC0,0x7F,0x00,0x00,0x01,0xE1,0xFC,0x00, -0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xC0,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"9",9*/ - -}; -#endif - - +#ifndef _SIMULATION_FONT_H_ +#define _SIMULATION_FONT_H_ + +//常用ASCII表 +//偏移量32 +//ASCII字符集: !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ +//PC2LCD2002取模方式设置：阴码+逐列式+顺向+C51格式 +//总共：3个字符集（12*12、16*16和24*24），用户可以自行新增其他分辨率的字符集。 +//每个字符所占用的字节数为:(size/8+((size%8)?1:0))*(size/2),其中size:是字库生成时的点阵大小(12/16/24...) + +const unsigned char Simulation_Asc1206[95][12]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x3F,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x40,0x00,0x00,0x00},/*""",2*/ +{0x09,0x00,0x0B,0xC0,0x3D,0x00,0x0B,0xC0,0x3D,0x00,0x09,0x00},/*"#",3*/ +{0x18,0xC0,0x24,0x40,0x7F,0xE0,0x22,0x40,0x31,0x80,0x00,0x00},/*"$",4*/ +{0x18,0x00,0x24,0xC0,0x1B,0x00,0x0D,0x80,0x32,0x40,0x01,0x80},/*"%",5*/ +{0x03,0x80,0x1C,0x40,0x27,0x40,0x1C,0x80,0x07,0x40,0x00,0x40},/*"&",6*/ +{0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x80,0x20,0x40,0x40,0x20},/*"(",8*/ +{0x00,0x00,0x40,0x20,0x20,0x40,0x1F,0x80,0x00,0x00,0x00,0x00},/*")",9*/ +{0x09,0x00,0x06,0x00,0x1F,0x80,0x06,0x00,0x09,0x00,0x00,0x00},/*"*",10*/ +{0x04,0x00,0x04,0x00,0x3F,0x80,0x04,0x00,0x04,0x00,0x00,0x00},/*"+",11*/ +{0x00,0x10,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x00,0x00},/*"-",13*/ +{0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x20,0x01,0xC0,0x06,0x00,0x38,0x00,0x40,0x00,0x00,0x00},/*"/",15*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x10,0x40,0x3F,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x18,0xC0,0x21,0x40,0x22,0x40,0x24,0x40,0x18,0x40,0x00,0x00},/*"2",18*/ +{0x10,0x80,0x20,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"3",19*/ +{0x02,0x00,0x0D,0x00,0x11,0x00,0x3F,0xC0,0x01,0x40,0x00,0x00},/*"4",20*/ +{0x3C,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x23,0x80,0x00,0x00},/*"5",21*/ +{0x1F,0x80,0x24,0x40,0x24,0x40,0x34,0x40,0x03,0x80,0x00,0x00},/*"6",22*/ +{0x30,0x00,0x20,0x00,0x27,0xC0,0x38,0x00,0x20,0x00,0x00,0x00},/*"7",23*/ +{0x1B,0x80,0x24,0x40,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"8",24*/ +{0x1C,0x00,0x22,0xC0,0x22,0x40,0x22,0x40,0x1F,0x80,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x08,0x40,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x04,0x60,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x04,0x00,0x0A,0x00,0x11,0x00,0x20,0x80,0x40,0x40},/*"<",28*/ +{0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x40,0x40,0x20,0x80,0x11,0x00,0x0A,0x00,0x04,0x00},/*">",30*/ +{0x18,0x00,0x20,0x00,0x23,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"?",31*/ +{0x1F,0x80,0x20,0x40,0x27,0x40,0x29,0x40,0x1F,0x40,0x00,0x00},/*"@",32*/ +{0x00,0x40,0x07,0xC0,0x39,0x00,0x0F,0x00,0x01,0xC0,0x00,0x40},/*"A",33*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x40,0x1B,0x80,0x00,0x00},/*"B",34*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x30,0x80,0x00,0x00},/*"C",35*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"D",36*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x40,0x30,0xC0,0x00,0x00},/*"E",37*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x2E,0x00,0x30,0x00,0x00,0x00},/*"F",38*/ +{0x0F,0x00,0x10,0x80,0x20,0x40,0x22,0x40,0x33,0x80,0x02,0x00},/*"G",39*/ +{0x20,0x40,0x3F,0xC0,0x04,0x00,0x04,0x00,0x3F,0xC0,0x20,0x40},/*"H",40*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x20,0x40,0x20,0x40,0x00,0x00},/*"I",41*/ +{0x00,0x60,0x20,0x20,0x20,0x20,0x3F,0xC0,0x20,0x00,0x20,0x00},/*"J",42*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x0B,0x00,0x30,0xC0,0x20,0x40},/*"K",43*/ +{0x20,0x40,0x3F,0xC0,0x20,0x40,0x00,0x40,0x00,0x40,0x00,0xC0},/*"L",44*/ +{0x3F,0xC0,0x3C,0x00,0x03,0xC0,0x3C,0x00,0x3F,0xC0,0x00,0x00},/*"M",45*/ +{0x20,0x40,0x3F,0xC0,0x0C,0x40,0x23,0x00,0x3F,0xC0,0x20,0x00},/*"N",46*/ +{0x1F,0x80,0x20,0x40,0x20,0x40,0x20,0x40,0x1F,0x80,0x00,0x00},/*"O",47*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x24,0x00,0x18,0x00,0x00,0x00},/*"P",48*/ +{0x1F,0x80,0x21,0x40,0x21,0x40,0x20,0xE0,0x1F,0xA0,0x00,0x00},/*"Q",49*/ +{0x20,0x40,0x3F,0xC0,0x24,0x40,0x26,0x00,0x19,0xC0,0x00,0x40},/*"R",50*/ +{0x18,0xC0,0x24,0x40,0x24,0x40,0x22,0x40,0x31,0x80,0x00,0x00},/*"S",51*/ +{0x30,0x00,0x20,0x40,0x3F,0xC0,0x20,0x40,0x30,0x00,0x00,0x00},/*"T",52*/ +{0x20,0x00,0x3F,0x80,0x00,0x40,0x00,0x40,0x3F,0x80,0x20,0x00},/*"U",53*/ +{0x20,0x00,0x3E,0x00,0x01,0xC0,0x07,0x00,0x38,0x00,0x20,0x00},/*"V",54*/ +{0x38,0x00,0x07,0xC0,0x3C,0x00,0x07,0xC0,0x38,0x00,0x00,0x00},/*"W",55*/ +{0x20,0x40,0x39,0xC0,0x06,0x00,0x39,0xC0,0x20,0x40,0x00,0x00},/*"X",56*/ +{0x20,0x00,0x38,0x40,0x07,0xC0,0x38,0x40,0x20,0x00,0x00,0x00},/*"Y",57*/ +{0x30,0x40,0x21,0xC0,0x26,0x40,0x38,0x40,0x20,0xC0,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x7F,0xE0,0x40,0x20,0x40,0x20,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x70,0x00,0x0C,0x00,0x03,0x80,0x00,0x40,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x20,0x40,0x20,0x7F,0xE0,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x20,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10},/*"_",63*/ +{0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x02,0x80,0x05,0x40,0x05,0x40,0x03,0xC0,0x00,0x40},/*"a",65*/ +{0x20,0x00,0x3F,0xC0,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x06,0x40,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x24,0x40,0x3F,0xC0,0x00,0x40},/*"d",68*/ +{0x00,0x00,0x03,0x80,0x05,0x40,0x05,0x40,0x03,0x40,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x04,0x40,0x1F,0xC0,0x24,0x40,0x24,0x40,0x20,0x00},/*"f",70*/ +{0x00,0x00,0x02,0xE0,0x05,0x50,0x05,0x50,0x06,0x50,0x04,0x20},/*"g",71*/ +{0x20,0x40,0x3F,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"h",72*/ +{0x00,0x00,0x04,0x40,0x27,0xC0,0x00,0x40,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x10,0x00,0x10,0x04,0x10,0x27,0xE0,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x20,0x40,0x3F,0xC0,0x01,0x40,0x07,0x00,0x04,0xC0,0x04,0x40},/*"k",75*/ +{0x20,0x40,0x20,0x40,0x3F,0xC0,0x00,0x40,0x00,0x40,0x00,0x00},/*"l",76*/ +{0x07,0xC0,0x04,0x00,0x07,0xC0,0x04,0x00,0x03,0xC0,0x00,0x00},/*"m",77*/ +{0x04,0x40,0x07,0xC0,0x04,0x40,0x04,0x00,0x03,0xC0,0x00,0x40},/*"n",78*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x40,0x03,0x80,0x00,0x00},/*"o",79*/ +{0x04,0x10,0x07,0xF0,0x04,0x50,0x04,0x40,0x03,0x80,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x03,0x80,0x04,0x40,0x04,0x50,0x07,0xF0,0x00,0x10},/*"q",81*/ +{0x04,0x40,0x07,0xC0,0x02,0x40,0x04,0x00,0x04,0x00,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x06,0x40,0x05,0x40,0x05,0x40,0x04,0xC0,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x04,0x00,0x1F,0x80,0x04,0x40,0x00,0x40,0x00,0x00},/*"t",84*/ +{0x04,0x00,0x07,0x80,0x00,0x40,0x04,0x40,0x07,0xC0,0x00,0x40},/*"u",85*/ +{0x04,0x00,0x07,0x00,0x04,0xC0,0x01,0x80,0x06,0x00,0x04,0x00},/*"v",86*/ +{0x06,0x00,0x01,0xC0,0x07,0x00,0x01,0xC0,0x06,0x00,0x00,0x00},/*"w",87*/ +{0x04,0x40,0x06,0xC0,0x01,0x00,0x06,0xC0,0x04,0x40,0x00,0x00},/*"x",88*/ +{0x04,0x10,0x07,0x10,0x04,0xE0,0x01,0x80,0x06,0x00,0x04,0x00},/*"y",89*/ +{0x00,0x00,0x04,0x40,0x05,0xC0,0x06,0x40,0x04,0x40,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x04,0x00,0x7B,0xE0,0x40,0x20,0x00,0x00},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x20,0x7B,0xE0,0x04,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x40,0x00,0x80,0x00,0x40,0x00,0x20,0x00,0x20,0x00,0x40,0x00},/*"~",94*/ +}; + +const unsigned char Simulation_Asc1608[95][16]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*" ",0*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xCC,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*"!",1*/ +{0x00,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x08,0x00,0x30,0x00,0x60,0x00,0x00,0x00},/*""",2*/ +{0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x03,0xFC,0x1E,0x20,0x02,0x20,0x00,0x00},/*"#",3*/ +{0x00,0x00,0x0E,0x18,0x11,0x04,0x3F,0xFF,0x10,0x84,0x0C,0x78,0x00,0x00,0x00,0x00},/*"$",4*/ +{0x0F,0x00,0x10,0x84,0x0F,0x38,0x00,0xC0,0x07,0x78,0x18,0x84,0x00,0x78,0x00,0x00},/*"%",5*/ +{0x00,0x78,0x0F,0x84,0x10,0xC4,0x11,0x24,0x0E,0x98,0x00,0xE4,0x00,0x84,0x00,0x08},/*"&",6*/ +{0x08,0x00,0x68,0x00,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"'",7*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x18,0x18,0x20,0x04,0x40,0x02,0x00,0x00},/*"(",8*/ +{0x00,0x00,0x40,0x02,0x20,0x04,0x18,0x18,0x07,0xE0,0x00,0x00,0x00,0x00,0x00,0x00},/*")",9*/ +{0x02,0x40,0x02,0x40,0x01,0x80,0x0F,0xF0,0x01,0x80,0x02,0x40,0x02,0x40,0x00,0x00},/*"*",10*/ +{0x00,0x80,0x00,0x80,0x00,0x80,0x0F,0xF8,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00},/*"+",11*/ +{0x00,0x01,0x00,0x0D,0x00,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*",",12*/ +{0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},/*"-",13*/ +{0x00,0x00,0x00,0x0C,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*".",14*/ +{0x00,0x00,0x00,0x06,0x00,0x18,0x00,0x60,0x01,0x80,0x06,0x00,0x18,0x00,0x20,0x00},/*"/",15*/ +{0x00,0x00,0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"0",16*/ +{0x00,0x00,0x08,0x04,0x08,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"1",17*/ +{0x00,0x00,0x0E,0x0C,0x10,0x14,0x10,0x24,0x10,0x44,0x11,0x84,0x0E,0x0C,0x00,0x00},/*"2",18*/ +{0x00,0x00,0x0C,0x18,0x10,0x04,0x11,0x04,0x11,0x04,0x12,0x88,0x0C,0x70,0x00,0x00},/*"3",19*/ +{0x00,0x00,0x00,0xE0,0x03,0x20,0x04,0x24,0x08,0x24,0x1F,0xFC,0x00,0x24,0x00,0x00},/*"4",20*/ +{0x00,0x00,0x1F,0x98,0x10,0x84,0x11,0x04,0x11,0x04,0x10,0x88,0x10,0x70,0x00,0x00},/*"5",21*/ +{0x00,0x00,0x07,0xF0,0x08,0x88,0x11,0x04,0x11,0x04,0x18,0x88,0x00,0x70,0x00,0x00},/*"6",22*/ +{0x00,0x00,0x1C,0x00,0x10,0x00,0x10,0xFC,0x13,0x00,0x1C,0x00,0x10,0x00,0x00,0x00},/*"7",23*/ +{0x00,0x00,0x0E,0x38,0x11,0x44,0x10,0x84,0x10,0x84,0x11,0x44,0x0E,0x38,0x00,0x00},/*"8",24*/ +{0x00,0x00,0x07,0x00,0x08,0x8C,0x10,0x44,0x10,0x44,0x08,0x88,0x07,0xF0,0x00,0x00},/*"9",25*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x03,0x0C,0x00,0x00,0x00,0x00,0x00,0x00},/*":",26*/ +{0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*";",27*/ +{0x00,0x00,0x00,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10,0x04,0x00,0x00},/*"<",28*/ +{0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x02,0x20,0x00,0x00},/*"=",29*/ +{0x00,0x00,0x10,0x04,0x08,0x08,0x04,0x10,0x02,0x20,0x01,0x40,0x00,0x80,0x00,0x00},/*">",30*/ +{0x00,0x00,0x0E,0x00,0x12,0x00,0x10,0x0C,0x10,0x6C,0x10,0x80,0x0F,0x00,0x00,0x00},/*"?",31*/ +{0x03,0xE0,0x0C,0x18,0x13,0xE4,0x14,0x24,0x17,0xC4,0x08,0x28,0x07,0xD0,0x00,0x00},/*"@",32*/ +{0x00,0x04,0x00,0x3C,0x03,0xC4,0x1C,0x40,0x07,0x40,0x00,0xE4,0x00,0x1C,0x00,0x04},/*"A",33*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x11,0x04,0x0E,0x88,0x00,0x70,0x00,0x00},/*"B",34*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x04,0x10,0x08,0x1C,0x10,0x00,0x00},/*"C",35*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"D",36*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x04,0x17,0xC4,0x10,0x04,0x08,0x18,0x00,0x00},/*"E",37*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x17,0xC0,0x10,0x00,0x08,0x00,0x00,0x00},/*"F",38*/ +{0x03,0xE0,0x0C,0x18,0x10,0x04,0x10,0x04,0x10,0x44,0x1C,0x78,0x00,0x40,0x00,0x00},/*"G",39*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x00,0x80,0x00,0x80,0x10,0x84,0x1F,0xFC,0x10,0x04},/*"H",40*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x04,0x00,0x00,0x00,0x00},/*"I",41*/ +{0x00,0x03,0x00,0x01,0x10,0x01,0x10,0x01,0x1F,0xFE,0x10,0x00,0x10,0x00,0x00,0x00},/*"J",42*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x03,0x80,0x14,0x64,0x18,0x1C,0x10,0x04,0x00,0x00},/*"K",43*/ +{0x10,0x04,0x1F,0xFC,0x10,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x0C,0x00,0x00},/*"L",44*/ +{0x10,0x04,0x1F,0xFC,0x1F,0x00,0x00,0xFC,0x1F,0x00,0x1F,0xFC,0x10,0x04,0x00,0x00},/*"M",45*/ +{0x10,0x04,0x1F,0xFC,0x0C,0x04,0x03,0x00,0x00,0xE0,0x10,0x18,0x1F,0xFC,0x10,0x00},/*"N",46*/ +{0x07,0xF0,0x08,0x08,0x10,0x04,0x10,0x04,0x10,0x04,0x08,0x08,0x07,0xF0,0x00,0x00},/*"O",47*/ +{0x10,0x04,0x1F,0xFC,0x10,0x84,0x10,0x80,0x10,0x80,0x10,0x80,0x0F,0x00,0x00,0x00},/*"P",48*/ +{0x07,0xF0,0x08,0x18,0x10,0x24,0x10,0x24,0x10,0x1C,0x08,0x0A,0x07,0xF2,0x00,0x00},/*"Q",49*/ +{0x10,0x04,0x1F,0xFC,0x11,0x04,0x11,0x00,0x11,0xC0,0x11,0x30,0x0E,0x0C,0x00,0x04},/*"R",50*/ +{0x00,0x00,0x0E,0x1C,0x11,0x04,0x10,0x84,0x10,0x84,0x10,0x44,0x1C,0x38,0x00,0x00},/*"S",51*/ +{0x18,0x00,0x10,0x00,0x10,0x04,0x1F,0xFC,0x10,0x04,0x10,0x00,0x18,0x00,0x00,0x00},/*"T",52*/ +{0x10,0x00,0x1F,0xF8,0x10,0x04,0x00,0x04,0x00,0x04,0x10,0x04,0x1F,0xF8,0x10,0x00},/*"U",53*/ +{0x10,0x00,0x1E,0x00,0x11,0xE0,0x00,0x1C,0x00,0x70,0x13,0x80,0x1C,0x00,0x10,0x00},/*"V",54*/ +{0x1F,0xC0,0x10,0x3C,0x00,0xE0,0x1F,0x00,0x00,0xE0,0x10,0x3C,0x1F,0xC0,0x00,0x00},/*"W",55*/ +{0x10,0x04,0x18,0x0C,0x16,0x34,0x01,0xC0,0x01,0xC0,0x16,0x34,0x18,0x0C,0x10,0x04},/*"X",56*/ +{0x10,0x00,0x1C,0x00,0x13,0x04,0x00,0xFC,0x13,0x04,0x1C,0x00,0x10,0x00,0x00,0x00},/*"Y",57*/ +{0x08,0x04,0x10,0x1C,0x10,0x64,0x10,0x84,0x13,0x04,0x1C,0x04,0x10,0x18,0x00,0x00},/*"Z",58*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xFE,0x40,0x02,0x40,0x02,0x40,0x02,0x00,0x00},/*"[",59*/ +{0x00,0x00,0x30,0x00,0x0C,0x00,0x03,0x80,0x00,0x60,0x00,0x1C,0x00,0x03,0x00,0x00},/*"\",60*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x40,0x02,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00},/*"]",61*/ +{0x00,0x00,0x00,0x00,0x20,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00},/*"^",62*/ +{0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01},/*"_",63*/ +{0x00,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"`",64*/ +{0x00,0x00,0x00,0x98,0x01,0x24,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xFC,0x00,0x04},/*"a",65*/ +{0x10,0x00,0x1F,0xFC,0x00,0x88,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"b",66*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x00},/*"c",67*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x11,0x08,0x1F,0xFC,0x00,0x04},/*"d",68*/ +{0x00,0x00,0x00,0xF8,0x01,0x44,0x01,0x44,0x01,0x44,0x01,0x44,0x00,0xC8,0x00,0x00},/*"e",69*/ +{0x00,0x00,0x01,0x04,0x01,0x04,0x0F,0xFC,0x11,0x04,0x11,0x04,0x11,0x00,0x18,0x00},/*"f",70*/ +{0x00,0x00,0x00,0xD6,0x01,0x29,0x01,0x29,0x01,0x29,0x01,0xC9,0x01,0x06,0x00,0x00},/*"g",71*/ +{0x10,0x04,0x1F,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"h",72*/ +{0x00,0x00,0x01,0x04,0x19,0x04,0x19,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"i",73*/ +{0x00,0x00,0x00,0x03,0x00,0x01,0x01,0x01,0x19,0x01,0x19,0xFE,0x00,0x00,0x00,0x00},/*"j",74*/ +{0x10,0x04,0x1F,0xFC,0x00,0x24,0x00,0x40,0x01,0xB4,0x01,0x0C,0x01,0x04,0x00,0x00},/*"k",75*/ +{0x00,0x00,0x10,0x04,0x10,0x04,0x1F,0xFC,0x00,0x04,0x00,0x04,0x00,0x00,0x00,0x00},/*"l",76*/ +{0x01,0x04,0x01,0xFC,0x01,0x04,0x01,0x00,0x01,0xFC,0x01,0x04,0x01,0x00,0x00,0xFC},/*"m",77*/ +{0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x00,0x01,0x00,0x01,0x04,0x00,0xFC,0x00,0x04},/*"n",78*/ +{0x00,0x00,0x00,0xF8,0x01,0x04,0x01,0x04,0x01,0x04,0x01,0x04,0x00,0xF8,0x00,0x00},/*"o",79*/ +{0x01,0x01,0x01,0xFF,0x00,0x85,0x01,0x04,0x01,0x04,0x00,0x88,0x00,0x70,0x00,0x00},/*"p",80*/ +{0x00,0x00,0x00,0x70,0x00,0x88,0x01,0x04,0x01,0x04,0x01,0x05,0x01,0xFF,0x00,0x01},/*"q",81*/ +{0x01,0x04,0x01,0x04,0x01,0xFC,0x00,0x84,0x01,0x04,0x01,0x00,0x01,0x80,0x00,0x00},/*"r",82*/ +{0x00,0x00,0x00,0xCC,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x24,0x01,0x98,0x00,0x00},/*"s",83*/ +{0x00,0x00,0x01,0x00,0x01,0x00,0x07,0xF8,0x01,0x04,0x01,0x04,0x00,0x00,0x00,0x00},/*"t",84*/ +{0x01,0x00,0x01,0xF8,0x00,0x04,0x00,0x04,0x00,0x04,0x01,0x08,0x01,0xFC,0x00,0x04},/*"u",85*/ +{0x01,0x00,0x01,0x80,0x01,0x70,0x00,0x0C,0x00,0x10,0x01,0x60,0x01,0x80,0x01,0x00},/*"v",86*/ +{0x01,0xF0,0x01,0x0C,0x00,0x30,0x01,0xC0,0x00,0x30,0x01,0x0C,0x01,0xF0,0x01,0x00},/*"w",87*/ +{0x00,0x00,0x01,0x04,0x01,0x8C,0x00,0x74,0x01,0x70,0x01,0x8C,0x01,0x04,0x00,0x00},/*"x",88*/ +{0x01,0x01,0x01,0x81,0x01,0x71,0x00,0x0E,0x00,0x18,0x01,0x60,0x01,0x80,0x01,0x00},/*"y",89*/ +{0x00,0x00,0x01,0x84,0x01,0x0C,0x01,0x34,0x01,0x44,0x01,0x84,0x01,0x0C,0x00,0x00},/*"z",90*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x3E,0xFC,0x40,0x02,0x40,0x02},/*"{",91*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00},/*"|",92*/ +{0x00,0x00,0x40,0x02,0x40,0x02,0x3E,0xFC,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"}",93*/ +{0x00,0x00,0x60,0x00,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x20,0x00,0x20,0x00},/*"~",94*/ +}; + +const unsigned char Simulation_Asc3636[5][36]= { +{0x00,0x00,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xF8,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x0C,0x0C,0x00,0x04,0x0C,0x00,0x06,0x0C,0x00,0x06,0x1C,0x00,0x03,0xF8,0x00,0x01,0xF0, +0x00,0x00,0x00,0x00},/*"P",0*/ +{0x00,0x00,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xF8,0x0F,0xF0,0x00,0x00,0xFF,0x80,0x00,0x07,0xF8,0x00,0x07,0xF8,0x01,0xFF,0x00,0x0F,0xE0,0x00,0x0F,0xFF,0xF8,0x0F,0xFF, +0xF8,0x00,0x00,0x00},/*"M",1*/ +{0x00,0x00,0x00,0x01,0x80,0x10,0x07,0x80,0x70,0x06,0x00,0xF0,0x0C,0x01,0xD0,0x0C,0x03,0x90,0x0C,0x07,0x10,0x0E,0x1C,0x10,0x07,0xF8,0x10,0x03,0xE0,0x10,0x00,0x00, +0x10,0x00,0x00,0x00},/*"2",2*/ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00},/*".",3*/ +{0x00,0x00,0x80,0x00,0x38,0xE0,0x07,0xF8,0x70,0x07,0xB0,0x10,0x04,0x20,0x18,0x04,0x20,0x18,0x04,0x30,0x18,0x04,0x30,0x30,0x04,0x3C,0xF0,0x04,0x1F,0xE0,0x00,0x03, +0x00,0x00,0x00,0x00},/*"5",4*/ +}; + +const unsigned char Simulation_Asc3838[10][90]= { +{0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFC,0x00,0x00, + 0x00,0x3F,0xFF,0xC0,0x00,0x00,0x7F,0xFF,0xF0,0x00, + 0x00,0xFC,0x01,0xF8,0x00,0x01,0xE0,0x00,0x78,0x00, + 0x03,0xC0,0x00,0x1C,0x00,0x03,0x80,0x00,0x1C,0x00, + 0x03,0x00,0x00,0x0E,0x00,0x03,0x00,0x00,0x0E,0x00, + 0x03,0x80,0x00,0x1C,0x00,0x03,0xC0,0x00,0x3C,0x00, + 0x01,0xF0,0x00,0x78,0x00,0x00,0xFF,0xFF,0xF0,0x00, + 0x00,0x7F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"0",0*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x1C,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x70, +0x00,0x00,0x00,0x00,0xE0,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"1",1*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x70,0x00,0x1C,0x00,0x00,0xF8,0x00,0x3C,0x00,0x01,0xE0,0x00,0x7C,0x00,0x03,0xC0,0x00,0xFC,0x00,0x03,0x80, +0x01,0xEC,0x00,0x03,0x80,0x03,0xCC,0x00,0x03,0x80,0x0F,0x0C,0x00,0x03,0x80,0x1E,0x0C,0x00,0x03,0x80,0x3C,0x0C,0x00,0x03,0x80,0xF8,0x0C,0x00,0x01,0xE7,0xE0,0x0C, +0x00,0x01,0xFF,0xC0,0x0C,0x00,0x00,0xFF,0x00,0x0C,0x00,0x00,0x18,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"2",2*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x30,0x00,0xE0,0x00,0x00,0x70,0x00,0xF0,0x00,0x01,0xF0,0x00,0x78,0x00,0x01,0xC0,0x00,0x3C,0x00,0x03,0x80, +0x00,0x1C,0x00,0x03,0x80,0x60,0x0C,0x00,0x03,0x00,0xE0,0x0C,0x00,0x03,0x00,0xE0,0x0C,0x00,0x03,0x80,0xE0,0x1C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x01,0xE7,0xB8,0x78, +0x00,0x01,0xFF,0x3F,0xF8,0x00,0x00,0xFE,0x1F,0xF0,0x00,0x00,0x18,0x07,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"3",3*/ + +{0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x07,0x80,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x3F,0x80,0x00,0x00,0x00,0x7B,0x80,0x00,0x00,0x01,0xE3,0x80,0x00,0x00,0x03, +0xC3,0x80,0x00,0x00,0x0F,0x83,0x80,0x00,0x00,0x1E,0x03,0x80,0x00,0x00,0x7C,0x03,0x80,0x00,0x00,0xF0,0x03,0x80,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFC, +0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00},/*"4",4*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0xE0,0x00,0x00,0x07,0xE0,0xF0,0x00,0x00,0xFF,0xE0,0x78,0x00,0x03,0xFF,0xC0,0x1C,0x00,0x03,0xF1,0x80,0x1C,0x00,0x03,0x83, +0x80,0x0E,0x00,0x03,0x83,0x80,0x0E,0x00,0x03,0x83,0x80,0x0E,0x00,0x03,0x83,0x80,0x0C,0x00,0x03,0x83,0x80,0x1C,0x00,0x03,0x81,0xC0,0x3C,0x00,0x03,0x81,0xE0,0x78, +0x00,0x03,0x80,0xFF,0xF8,0x00,0x03,0x80,0x7F,0xE0,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"5",5*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00,0x3F,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x03,0xF8,0xF8,0x00,0x00,0x07,0xE0,0x3C,0x00,0x00,0x1F, +0xC0,0x1C,0x00,0x00,0x3F,0x80,0x0C,0x00,0x00,0xF9,0x80,0x0E,0x00,0x01,0xF1,0x80,0x0E,0x00,0x03,0xC1,0x80,0x0E,0x00,0x03,0x01,0xC0,0x0C,0x00,0x02,0x01,0xC0,0x1C, +0x00,0x00,0x00,0xE0,0x7C,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xF0,0x00,0x00,0x00,0x1F,0xC0,0x00,0x00,0x00,0x00,0x00,0x00},/*"6",6*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x03,0x80,0x00,0x1C,0x00,0x03,0x80, +0x00,0xFC,0x00,0x03,0x80,0x07,0xFC,0x00,0x03,0x80,0x1F,0xE0,0x00,0x03,0x80,0x7F,0x00,0x00,0x03,0x81,0xF8,0x00,0x00,0x03,0x87,0xE0,0x00,0x00,0x03,0x9F,0x00,0x00, +0x00,0x03,0xFC,0x00,0x00,0x00,0x03,0xF0,0x00,0x00,0x00,0x03,0xE0,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"7",7*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x00,0x00,0x7E,0x1F,0xF0,0x00,0x00,0xFF,0xBF,0xF8,0x00,0x01,0xE7,0xF8,0x3C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x03,0x80, +0xE0,0x0C,0x00,0x03,0x80,0xE0,0x0E,0x00,0x03,0x00,0xE0,0x0E,0x00,0x03,0x80,0xE0,0x0E,0x00,0x03,0x80,0xE0,0x0C,0x00,0x03,0x81,0xF0,0x1C,0x00,0x01,0xE7,0xB8,0x3C, +0x00,0x00,0xFF,0x3F,0xF8,0x00,0x00,0x7E,0x1F,0xF0,0x00,0x00,0x00,0x0F,0xE0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"8",8*/ + +{0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x00,0x00,0x00,0x7F,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x01,0xE0,0x78,0x00,0x00,0x03,0xC0,0x38,0x06,0x00,0x03,0x80, +0x18,0x1E,0x00,0x03,0x80,0x18,0x7E,0x00,0x03,0x80,0x19,0xF8,0x00,0x03,0x80,0x1F,0xE0,0x00,0x03,0x80,0x3F,0xC0,0x00,0x03,0xC0,0x7F,0x00,0x00,0x01,0xE1,0xFC,0x00, +0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xC0,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/*"9",9*/ + +}; +#endif + + diff --git a/firmware/stm32-esp/user/show/simulation_lcd.c b/firmware/stm32-esp/user/show/simulation_lcd.c index 1d18330f..b4838164 100644 --- a/firmware/stm32-esp/user/show/simulation_lcd.c +++ b/firmware/stm32-esp/user/show/simulation_lcd.c @@ -1,1157 +1,1157 @@ -#include "simulation_lcd.h" -#include "simulation_font.h" - -// LCD的画笔颜色和背景色 -uint16_t SimLCD_PointColor = 0x0000;// 画笔颜色 -uint16_t SimLCD_BackColor = 0xFFFF;// 背景色 - -// 管理LCD参数 默认为竖屏 -SimLCD_t SimLCD = {0}; - -// 读出数据控制线 -#define Simulation_RD(x) (x)?(GPIOB->BSRR = (1<<6)):(GPIOB->BRR = (1<<6)) -// 写入数据控制线 -#define Simulation_WR(x) (x)?(GPIOB->BSRR = (1<<7)):(GPIOB->BRR = (1<<7)) -// 数据/命令选择管脚(1:数据读写,0:命令读写) -#define Simulation_RS(x) (x)?(GPIOB->BSRR = (1<<8)):(GPIOB->BRR = (1<<8)) -// 片选信号线 -#define Simulation_CS(x) (x)?(GPIOB->BSRR = (1<<9)):(GPIOB->BRR = (1<<9)) - -// 16位双向数据线 1 输入 2 输出 -static uint8_t PortDir = 0; -static void Simulation_SetOut(void) { - if( PortDir != 2 ) - { - GPIO_InitTypeDef GPIO_InitStructure; - - // PC0/1/2/3/4/5/6/7 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOC,&GPIO_InitStructure); - - // PA5/6/7/8/9/10/11/12 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOA,&GPIO_InitStructure); - - PortDir = 2; - } -} -static void Simulation_SetIn(void) { - if( PortDir != 1 ) - { - GPIO_InitTypeDef GPIO_InitStructure; - - // PC0/1/2/3/4/5/6/7 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOC,&GPIO_InitStructure); - - // PA5/6/7/8/9/10/11/12 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOA,&GPIO_InitStructure); - - PortDir = 1; - } -} -static void Simulation_WriteData(uint16_t data) { - uint16_t flag = 0; - flag = (data>>0)&0x00FF; - GPIOC->BSRR = flag; - flag = (~flag)&0x00FF; - GPIOC->BRR = flag; - - flag = 0; - flag = (uint16_t)(((data>>8)&0x00FF)<<5); - GPIOA->BSRR = flag; - flag = (uint16_t)(((~((data>>8)&0x00FF))&0x00FF)<<5); - GPIOA->BRR = flag; -} -static uint16_t Simulation_ReadData(void) { - uint16_t flag1 = 0; - uint16_t flag2 = 0; - flag1 = GPIOC->IDR; - flag2 = (uint16_t)(flag1&0x00FF); - - flag1 = 0; - flag1 = GPIOA->IDR; - flag2 = flag2 + (uint16_t)((flag1<<3)&0xFF00); - - return flag2; -} - -static void SimLCD_WriteCmd(uint16_t data) { - Simulation_SetOut(); - - Simulation_RS(0); - Simulation_RD(1); - Simulation_CS(0); - Delay_us(1); - Simulation_WriteData(data); - Delay_us(1); - Simulation_WR(0); - Delay_us(1); - Simulation_WR(1); - Simulation_CS(1); -} -static void SimLCD_WriteData(uint16_t data) { - Simulation_SetOut(); - - Simulation_RS(1); - Simulation_RD(1); - Simulation_CS(0); - Delay_us(1); - Simulation_WriteData(data); - Delay_us(1); - Simulation_WR(0); - Delay_us(1); - Simulation_WR(1); - Simulation_CS(1); -} - -static uint16_t SimLCD_ReadData(void) { - uint16_t flag = 0; - - Simulation_SetIn(); - - Simulation_RS(1); - Simulation_WR(1); - Simulation_RD(0); - Simulation_CS(0); - Delay_us(1); - flag = Simulation_ReadData(); - Delay_us(1); - Simulation_RD(1); - Simulation_CS(1); - return flag; -} -// 开始写GRAM -void SimLCD_WriteRAMPrepare(void){ - SimLCD_WriteCmd(SimLCD.wramcmd); -} - -// LCD写GRAM -// RGB_Code:颜色值 -void SimLCD_WriteRAM(uint16_t RGB_Code){ - SimLCD_WriteData(RGB_Code); -} - -//从ILI93xx读出的数据为GBR格式，而我们写入的时候为RGB格式。 -//通过该函数转换 -//c:GBR格式的颜色值 -//返回值：RGB格式的颜色值 -uint16_t SimLCD_BGR2RGB(uint16_t c){ - uint16_t r,g,b,rgb; - b = (c>>0)&0x1f; - g = (c>>5)&0x3f; - r = (c>>11)&0x1f; - rgb=(b<<11)+(g<<5)+(r<<0); - return(rgb); -} -// 当mdk -O1时间优化时需要设置 -void SimLCD_Delay(u8 i){ - while(i--); -} -//设置光标位置 -//Xpos:横坐标 -//Ypos:纵坐标 -void SimLCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { - if( (SimLCD.id==0X9341) || (SimLCD.id==0X6804) ) - { - SimLCD_WriteCmd(SimLCD.setxcmd); /* 设置X坐标 */ - SimLCD_WriteData( Xpos >> 8 ); /* 先高8位，然后低8位 */ - SimLCD_WriteData( Xpos & 0x00ff ); /* 设置起始点和结束点*/ - - SimLCD_WriteCmd( SimLCD.setycmd ); /* 设置Y坐标*/ - SimLCD_WriteData( Ypos >> 8 ); - SimLCD_WriteData( Ypos & 0x00ff ); - } - else - { - if(SimLCD.dir==1) - Xpos = SimLCD.width-1-Xpos;// 横屏其实就是调转x,y坐标 - SimLCD_WriteCmd(SimLCD.setxcmd); - SimLCD_WriteData( Xpos ); - SimLCD_WriteCmd(SimLCD.setxcmd); - SimLCD_WriteData( Ypos ); - } -} -// 读取个某点的颜色值 -// x,y:坐标 -// 返回值:此点的颜色 -uint16_t SimLCD_ReadPoint(uint16_t x, uint16_t y) { - uint16_t r = 0,g = 0,b = 0; - if( (x>=SimLCD.width) || (y>=SimLCD.height) ) return 0; // 超过了范围,直接返回 - SimLCD_SetCursor(x, y); - if( (SimLCD.id==0X9341) || (SimLCD.id==0X6804) ) - SimLCD_WriteCmd(0X2E); // 9341/6804 发送读GRAM指令 - else - SimLCD_WriteCmd(SimLCD_R34); //其他IC发送读GRAM指令 - if(SimLCD.id==0X9320) - SimLCD_Delay(2); // FOR 9320,延时2us - - if(SimLCD_ReadData()) - r = 0; // dummy Read - SimLCD_Delay(2); - r = SimLCD_ReadData(); //实际坐标颜色 - if(SimLCD.id==0X9341) // 9341要分2次读出 - { - SimLCD_Delay(2); - b = 0; - b = SimLCD_ReadData(); - g = r&0xFF;//对于9341,第一次读取的是RG的值,R在前,G在后,各占8位 - g <<= 8; - } - else if(SimLCD.id==0X6804) - r = SimLCD_ReadData();//6804第二次读取的才是真实值 - if(SimLCD.id==0X9325||SimLCD.id==0X4535||SimLCD.id==0X4531||SimLCD.id==0X8989||SimLCD.id==0XB505) - return r;//这几种IC直接返回颜色值 - else if(SimLCD.id==0X9341) - return (((r>>11)<<11)|((g>>10)<<5)|(b>>11)); //ILI9341需要公式转换一下 - else - return SimLCD_BGR2RGB(r); //其他IC -} -//LCD开启显示 -void SimLCD_DisplayOn(void){ - if(SimLCD.id==0X9341||SimLCD.id==0X6804) - SimLCD_WriteCmd(0X29); //开启显示 - else - { - //开启显示 - SimLCD_WriteCmd(SimLCD_R7); - SimLCD_WriteData(0x0173); - } -} -//LCD关闭显示 -void SimLCD_DisplayOff(void){ - if(SimLCD.id==0X9341||SimLCD.id==0X6804) - SimLCD_WriteCmd(0X28); - else - { - SimLCD_WriteCmd(SimLCD_R7); - SimLCD_WriteData(0x0); - } -} - -//设置LCD的自动扫描方向 -//注意:其他函数可能会受到此函数设置的影响(尤其是9341/6804这两个奇葩), -//所以,一般设置为L2R_U2D即可,如果设置为其他扫描方式,可能导致显示不正常. -//dir:0~7,代表8个方向(具体定义见lcd.h) -//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341等IC已经实际测试 -void SimLCD_ScanDir(uint8_t dir) { - uint16_t regval = 0, temp = 0; - uint8_t dirreg = 0; - // 横屏时，对6804不改变扫描方向！ - if(SimLCD.dir==1 && SimLCD.id!=0X6804) { - switch(dir)//方向转换 - { - case 0:dir=6;break; - case 1:dir=7;break; - case 2:dir=4;break; - case 3:dir=5;break; - case 4:dir=1;break; - case 5:dir=0;break; - case 6:dir=3;break; - case 7:dir=2;break; - } - } - // 9341/6804,很特殊 - if(SimLCD.id==0x9341||SimLCD.id==0X6804) { - switch(dir) - { - case SimLCD_L2R_U2D://从左到右,从上到下 - regval|=(0<<7)|(0<<6)|(0<<5); - break; - case SimLCD_L2R_D2U://从左到右,从下到上 - regval|=(1<<7)|(0<<6)|(0<<5); - break; - case SimLCD_R2L_U2D://从右到左,从上到下 - regval|=(0<<7)|(1<<6)|(0<<5); - break; - case SimLCD_R2L_D2U://从右到左,从下到上 - regval|=(1<<7)|(1<<6)|(0<<5); - break; - case SimLCD_U2D_L2R://从上到下,从左到右 - regval|=(0<<7)|(0<<6)|(1<<5); - break; - case SimLCD_U2D_R2L://从上到下,从右到左 - regval|=(0<<7)|(1<<6)|(1<<5); - break; - case SimLCD_D2U_L2R://从下到上,从左到右 - regval|=(1<<7)|(0<<6)|(1<<5); - break; - case SimLCD_D2U_R2L://从下到上,从右到左 - regval|=(1<<7)|(1<<6)|(1<<5); - break; - } - dirreg = 0X36; - regval|= 0X08;// BGR - if(SimLCD.id==0X6804) - regval |= 0x02; // 6804的BIT6和9341的反了 - - SimLCD_WriteCmd(dirreg); - SimLCD_WriteData(regval); - - if(regval&0X20) - { - if(SimLCD.width < SimLCD.height)//交换X,Y - { - temp = SimLCD.width; - SimLCD.width = SimLCD.height; - SimLCD.height= temp; - } - }else - { - if(SimLCD.width > SimLCD.height)//交换X,Y - { - temp = SimLCD.width; - SimLCD.width = SimLCD.height; - SimLCD.height = temp; - } - } - - SimLCD_WriteCmd(SimLCD.setxcmd); - SimLCD_WriteData(0); - SimLCD_WriteData(0); - SimLCD_WriteData((SimLCD.width-1)>>8); - SimLCD_WriteData((SimLCD.width-1)&0XFF); - - SimLCD_WriteCmd(SimLCD.setycmd); - SimLCD_WriteData(0); - SimLCD_WriteData(0); - SimLCD_WriteData((SimLCD.height-1)>>8); - SimLCD_WriteData((SimLCD.height-1)&0XFF); - } - else { - switch(dir) - { - case SimLCD_L2R_U2D://从左到右,从上到下 - regval|=(1<<5)|(1<<4)|(0<<3); - break; - case SimLCD_L2R_D2U://从左到右,从下到上 - regval|=(0<<5)|(1<<4)|(0<<3); - break; - case SimLCD_R2L_U2D://从右到左,从上到下 - regval|=(1<<5)|(0<<4)|(0<<3); - break; - case SimLCD_R2L_D2U://从右到左,从下到上 - regval|=(0<<5)|(0<<4)|(0<<3); - break; - case SimLCD_U2D_L2R://从上到下,从左到右 - regval|=(1<<5)|(1<<4)|(1<<3); - break; - case SimLCD_U2D_R2L://从上到下,从右到左 - regval|=(1<<5)|(0<<4)|(1<<3); - break; - case SimLCD_D2U_L2R://从下到上,从左到右 - regval|=(0<<5)|(1<<4)|(1<<3); - break; - case SimLCD_D2U_R2L://从下到上,从右到左 - regval|=(0<<5)|(0<<4)|(1<<3); - break; - } - if(SimLCD.id==0x8989)//8989 IC - { - dirreg=0X11; - regval|=0X6040; //65K - }else//其他驱动IC - { - dirreg=0X03; - regval|=1<<12; - } - SimLCD_WriteCmd(dirreg); - SimLCD_WriteData(regval); - } -} -//画点 -//x,y:坐标 -//POINT_COLOR:此点的颜色 -void SimLCD_DrawPoint(uint16_t x, uint16_t y) { - SimLCD_SetCursor(x,y); //设置光标位置 - SimLCD_WriteRAMPrepare(); //开始写入GRAM - SimLCD_WriteData(SimLCD_PointColor); -} -//快速画点 -//x,y:坐标 -//color:颜色 -void SimLCD_FastDrawPoint(uint16_t x,uint16_t y,uint16_t color) { - if(SimLCD.id==0X9341||SimLCD.id==0X6804) - { - SimLCD_WriteCmd(SimLCD.setxcmd); - SimLCD_WriteData(x>>8); - SimLCD_WriteData(x&0XFF); - - SimLCD_WriteCmd(SimLCD.setycmd); - SimLCD_WriteData(y>>8); - SimLCD_WriteData(y&0XFF); - } - else - { - if(SimLCD.dir==1) - x = SimLCD.width-1-x;//横屏其实就是调转x,y坐标 - - SimLCD_WriteCmd(SimLCD.setxcmd); - SimLCD_WriteData(x); - - SimLCD_WriteCmd(SimLCD.setycmd); - SimLCD_WriteData(y); - } - SimLCD_WriteCmd(SimLCD.wramcmd); - SimLCD_WriteData(color); -} - -// 设置LCD显示方向（6804不支持横屏显示） -// dir:0,竖屏；1,横屏 -void SimLCD_DisplayDir(uint8_t dir) { - if(dir==0)//竖屏 - { - SimLCD.dir = 0; //竖屏 - SimLCD.width = 240;//--宽度 - SimLCD.height= 320;//--高度 - if(SimLCD.id==0X9341||SimLCD.id==0X6804) - { - SimLCD.wramcmd=0X2C; //--开始写grammer指令 - SimLCD.setxcmd=0X2A; - SimLCD.setycmd=0X2B; - if(SimLCD.id==0X6804) - { - SimLCD.width =320; - SimLCD.height=480; - } - } - } - else if(SimLCD.id!=0X6804)//6804不支持横屏显示 - { - SimLCD.dir =1;//横屏 - SimLCD.width =320; - SimLCD.height=240; - if(SimLCD.id==0X9341) - { - SimLCD.wramcmd=0X2C; - SimLCD.setxcmd=0X2A; - SimLCD.setycmd=0X2B; - }else if(SimLCD.id==0X8989) - { - SimLCD.wramcmd = SimLCD_R34; - SimLCD.setxcmd = 0X4F; - SimLCD.setycmd = 0X4E; - }else - { - SimLCD.wramcmd = SimLCD_R34; - SimLCD.setxcmd = SimLCD_R33; - SimLCD.setycmd = SimLCD_R32; - } - } - SimLCD_ScanDir(SimLCD_DefScanDir); //默认扫描方向 -} -//清屏函数 -//color:要清屏的填充色 -void SimLCD_Clear(uint16_t color) { - uint32_t index=0; - uint32_t totalpoint = SimLCD.width; - totalpoint *= SimLCD.height; // 得到总点数 - - SimLCD_SetCursor(0x0000, 0x0000); // 设置光标位置 - - SimLCD_WriteRAMPrepare(); // 开始写入GRAM - for(index = 0; index < totalpoint; index++) - SimLCD_WriteData(color); -} -static void SimLCD9341_Init(void){ - SimLCD_WriteCmd(0xCF); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0xC1); - SimLCD_WriteData(0X30); - - SimLCD_WriteCmd(0xED); - SimLCD_WriteData(0x64); - SimLCD_WriteData(0x03); - SimLCD_WriteData(0X12); - SimLCD_WriteData(0X81); - - SimLCD_WriteCmd(0xE8); - SimLCD_WriteData(0x85); - SimLCD_WriteData(0x10); - SimLCD_WriteData(0x7A); - - SimLCD_WriteCmd(0xCB); - SimLCD_WriteData(0x39); - SimLCD_WriteData(0x2C); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x34); - SimLCD_WriteData(0x02); - - SimLCD_WriteCmd(0xF7); - SimLCD_WriteData(0x20); - - SimLCD_WriteCmd(0xEA); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - - SimLCD_WriteCmd(0xC0); //Power control - SimLCD_WriteData(0x1B); //VRH[5:0] - - SimLCD_WriteCmd(0xC1); //Power control - SimLCD_WriteData(0x01); //SAP[2:0];BT[3:0] - - SimLCD_WriteCmd(0xC5); //VCM control - SimLCD_WriteData(0x30); //-3F - SimLCD_WriteData(0x30); //=3C - - SimLCD_WriteCmd(0xC7); //VCM control2 - SimLCD_WriteData(0XB7); - - SimLCD_WriteCmd(0x36); //Memory Access Control - SimLCD_WriteData(0x48); - - SimLCD_WriteCmd(0x3A); - SimLCD_WriteData(0x55); - - SimLCD_WriteCmd(0xB1); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x1A); - - SimLCD_WriteCmd(0xB6); //Display Function Control - SimLCD_WriteData(0x0A); - SimLCD_WriteData(0xA2); - - SimLCD_WriteCmd(0xF2); //3Gamma Function Disable - SimLCD_WriteData(0x00); - - SimLCD_WriteCmd(0x26); //Gamma curve selected - SimLCD_WriteData(0x01); - - SimLCD_WriteCmd(0xE0); //Set Gamma - SimLCD_WriteData(0x0F); - SimLCD_WriteData(0x2A); - SimLCD_WriteData(0x28); - SimLCD_WriteData(0x08); - SimLCD_WriteData(0x0E); - SimLCD_WriteData(0x08); - SimLCD_WriteData(0x54); - SimLCD_WriteData(0XA9); - SimLCD_WriteData(0x43); - SimLCD_WriteData(0x0A); - SimLCD_WriteData(0x0F); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - - SimLCD_WriteCmd(0XE1); //Set Gamma - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x15); - SimLCD_WriteData(0x17); - SimLCD_WriteData(0x07); - SimLCD_WriteData(0x11); - SimLCD_WriteData(0x06); - SimLCD_WriteData(0x2B); - SimLCD_WriteData(0x56); - SimLCD_WriteData(0x3C); - SimLCD_WriteData(0x05); - SimLCD_WriteData(0x10); - SimLCD_WriteData(0x0F); - SimLCD_WriteData(0x3F); - SimLCD_WriteData(0x3F); - SimLCD_WriteData(0x0F); - - SimLCD_WriteCmd(0x2B); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x01); - SimLCD_WriteData(0x3f); - - SimLCD_WriteCmd(0x2A); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0x00); - SimLCD_WriteData(0xef); - - SimLCD_WriteCmd(0x11); //Exit Sleep - Delay_ms(120); - SimLCD_WriteCmd(0x29); //display on -} - -static void SimLCD6804_Init(void){ - SimLCD_WriteCmd(0X11); - Delay_ms(20); - - SimLCD_WriteCmd(0XD0);//VCI1 VCL VGH VGL DDVDH VREG1OUT power amplitude setting - SimLCD_WriteData(0X07); - SimLCD_WriteData(0X42); - SimLCD_WriteData(0X1D); - - SimLCD_WriteCmd(0XD1);//VCOMH VCOM_AC amplitude setting - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X1a); - SimLCD_WriteData(0X09); - - SimLCD_WriteCmd(0XD2);//Operational Amplifier Circuit Constant Current Adjust , charge pump frequency setting - SimLCD_WriteData(0X01); - SimLCD_WriteData(0X22); - - SimLCD_WriteCmd(0XC0);//REV SM GS - SimLCD_WriteData(0X10); - SimLCD_WriteData(0X3B); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X02); - SimLCD_WriteData(0X11); - - SimLCD_WriteCmd(0XC5);// Frame rate setting = 72HZ when setting 0x03 - SimLCD_WriteData(0X03); - - SimLCD_WriteCmd(0XC8);//Gamma setting - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X25); - SimLCD_WriteData(0X21); - SimLCD_WriteData(0X05); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X0a); - SimLCD_WriteData(0X65); - SimLCD_WriteData(0X25); - SimLCD_WriteData(0X77); - SimLCD_WriteData(0X50); - SimLCD_WriteData(0X0f); - SimLCD_WriteData(0X00); - - SimLCD_WriteCmd(0XF8); - SimLCD_WriteData(0X01); - - SimLCD_WriteCmd(0XFE); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X02); - - SimLCD_WriteCmd(0X20);//Exit invert mode - - SimLCD_WriteCmd(0X36); - SimLCD_WriteData(0X08);//原来是a - - SimLCD_WriteCmd(0X3A); - SimLCD_WriteData(0X55);//16位模式 - - SimLCD_WriteCmd(0X2B); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X01); - SimLCD_WriteData(0X3F); - - SimLCD_WriteCmd(0X2A); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X00); - SimLCD_WriteData(0X01); - SimLCD_WriteData(0XDF); - Delay_ms(120); - SimLCD_WriteCmd(0X29); -} -//初始化lcd -//该初始化函数可以初始化各种ILI93XX液晶,但是其他函数是基于ILI9320的!!! -//在其他型号的驱动芯片上没有测试! -/******************************************************* - CS： TFTLCD 片选信号。 - WR：向 TFTLCD 写入数据。 - RD：从 TFTLCD 读取数据。 - D[15:0]: 16 位双向数据线。 - RST：硬复位 TFTLCD。 - RS：命令/数据标志（ 0，读写命令； 1，读写数据） -*******************************************************/ -void SimLCD_Init(void) { - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC,ENABLE); - // B6/B7/B8/B9 - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOB,&GPIO_InitStructure); - - Simulation_CS(1);Simulation_RD(1);Simulation_WR(1);Simulation_RS(1); - - // 设置端口位输出模式 - Simulation_SetOut(); - - Delay_ms(50); - Delay_ms(50); - // 读到ID不正确,新增lcddev.id==0X9300判断，因为9341在未被复位的情况下会被读成9300 - if( (SimLCD.id<0XFF) || (SimLCD.id==0XFFFF) || (SimLCD.id==0X9300) ) - { - //尝试9341 ID的读取 - SimLCD_WriteCmd(0xD3); - SimLCD_ReadData(); //dummy read - SimLCD_ReadData(); //读到0X00 - SimLCD.id = ((SimLCD_ReadData()<<8)&0xff00);//读取93 - SimLCD.id |= (SimLCD_ReadData()&0x00ff); //读取41 - if(SimLCD.id!=0x9341) //非9341,尝试是不是6804 - { - SimLCD_WriteCmd(0xBF); - SimLCD_ReadData(); //dummy read - SimLCD_ReadData(); //读回0X01 - SimLCD.id = ((SimLCD_ReadData()<<8)&0xff00);//读取0X68 - SimLCD.id |= (SimLCD_ReadData()&0x00ff); //读取0X04 - } - if(SimLCD.id!=0x9341&&SimLCD.id!=0x6804) - SimLCD.id=0x9341;//新增，用于识别9341 - } - // 9341初始化 - if(SimLCD.id==0X9341) - SimLCD9341_Init(); - // 6804初始化 - else if(SimLCD.id==0x6804) - SimLCD6804_Init(); - - SimLCD_DisplayDir(0); // 默认为竖屏 - SimLCD_Clear(SimLCDColor_BLACK); -} - -#if 1 -void SimLCD_AllPic(uint16_t *PIC) { - uint32_t index=0; - uint32_t totalpoint=SimLCD.width; - totalpoint*=SimLCD.height; //得到总点数 - SimLCD_SetCursor(0x00,0x0000);//设置光标位置 - SimLCD_WriteRAMPrepare(); //开始写入GRAM - for(index=0;index < 320*480;index++) - SimLCD_WriteData(PIC[index]); -} -#endif - -//在指定区域内填充单个颜色 -//(sx,sy),(ex,ey):填充矩形对角坐标,区域大小为:(ex-sx+1)*(ey-sy+1) -//color:要填充的颜色 -void SimLCD_Fill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t color) { - uint16_t i,j; - uint16_t xlen=0; - xlen=ex-sx+1; - for(i=sy;i<=ey;i++) - { - SimLCD_SetCursor(sx,i); // 设置光标位置 - SimLCD_WriteRAMPrepare();// 开始写入GRAM - for(j = 0;j < xlen; j++) // 设置光标位置 - SimLCD_WriteData(color); - } -} -//在指定区域内填充指定颜色块 -//(sx,sy),(ex,ey):填充矩形对角坐标,区域大小为:(ex-sx+1)*(ey-sy+1) -//color:要填充的颜色 -void SimLCD_ColorFill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t *color) { - uint16_t height,width; - uint16_t i,j; - width=ex-sx+1; //得到填充的宽度 - height=ey-sy+1; //高度 - for(i = 0;i < height;i++) - { - SimLCD_SetCursor(sx,sy+i); //设置光标位置 - SimLCD_WriteRAMPrepare(); //开始写入GRAM - for(j = 0;j < width;j++) - SimLCD_WriteData(color[i*width+j]); - } -} -//画线 -//x1,y1:起点坐标 -//x2,y2:终点坐标 -void SimLCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { - uint16_t t = 0; - int xerr=0,yerr=0,delta_x,delta_y,distance; - int incx,incy,uRow,uCol; - delta_x=x2-x1; //计算坐标增量 - delta_y=y2-y1; - uRow=x1; - uCol=y1; - if(delta_x>0)incx=1; //设置单步方向 - else if(delta_x==0)incx=0;//垂直线 - else {incx=-1;delta_x=-delta_x;} - if(delta_y>0)incy=1; - else if(delta_y==0)incy=0;//水平线 - else{incy=-1;delta_y=-delta_y;} - if( delta_x>delta_y)distance=delta_x; //选取基本增量坐标轴 - else distance=delta_y; - for(t=0;t<=distance+1;t++ )//画线输出 - { - SimLCD_DrawPoint(uRow,uCol);//画点 - xerr+=delta_x; - yerr+=delta_y; - if(xerr>distance) - { - xerr-=distance; - uRow+=incx; - } - if(yerr>distance) - { - yerr-=distance; - uCol+=incy; - } - } -} -//画矩形 -//(x1,y1),(x2,y2):矩形的对角坐标 -void SimLCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { - SimLCD_DrawLine(x1,y1,x2,y1); - SimLCD_DrawLine(x1,y1,x1,y2); - SimLCD_DrawLine(x1,y2,x2,y2); - SimLCD_DrawLine(x2,y1,x2,y2); -} - -//在指定位置画一个指定大小的圆 -//(x,y):中心点 -//r :半径 -void SimLCD_DrawCircle(uint16_t x0,uint16_t y0,uint8_t r) { - int a = 0,b = 0; - int di = 0; - a = 0; b = r; - di = 3-(r<<1); //判断下个点位置的标志 - while(a <= b) - { - SimLCD_DrawPoint(x0+a,y0-b); //5 - SimLCD_DrawPoint(x0+b,y0-a); //0 - SimLCD_DrawPoint(x0+b,y0+a); //4 - SimLCD_DrawPoint(x0+a,y0+b); //6 - SimLCD_DrawPoint(x0-a,y0+b); //1 - SimLCD_DrawPoint(x0-b,y0+a); - SimLCD_DrawPoint(x0-a,y0-b); //2 - SimLCD_DrawPoint(x0-b,y0-a); //7 - a++; - - //使用Bresenham算法画圆 - if(di<0) di +=4*a+6; - else - { - di+=10+4*(a-b); - b--; - } - } -} - -#if 1 -//-在指定位置显示一个字符 -//-x,y:起始坐标 -//-num:要显示的字符:" "--->"~" -//-size:字体大小 12/16 这是字体的高度 -//-mode:叠加方式(1)还是非叠加方式(0) -void SimLCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint8_t mode) { - uint8_t temp = 0, t1 = 0, t = 0; - uint16_t y0 = y, colortemp = SimLCD_PointColor; - - // 设置窗口 - num=num-' '; //得到偏移后的值 - if(!mode) //非叠加方式 - { - for(t = 0;t < size;t++) - { - if(size==12) - temp=Simulation_Asc1206[num][t];//调用1206字体 - else - temp=Simulation_Asc1608[num][t];//调用1608字体 - - for(t1=0;t1<8;t1++) - { - if(temp&0x80) - SimLCD_PointColor = colortemp; - else - SimLCD_PointColor = SimLCD_BackColor; - - SimLCD_DrawPoint(x,y); - temp<<=1; - y++; - if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 - if((y-y0)==size) //--达到高度值 - { - y=y0; - x++; - if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 - break; - } - } - } - } - else//叠加方式 - { - for(t=0;t=SimLCD.height){SimLCD_PointColor=colortemp;return;}//超区域了 - if((y-y0)==size) - { - y=y0; - x++; - if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 - break; - } - } - } - } - SimLCD_PointColor = colortemp; -} -#endif -//m^n函数 -//返回值:m^n次方. -uint32_t SimLCD_Pow(uint8_t m,uint8_t n) { - uint32_t result = 1; - while(n--)result*=m; - return result; -} -/* 显示数字,高位为0,则不显示 - x,y :起点坐标 - len :数字的位数 - size:字体大小 - color:颜色 - num:数值(0~4294967295); -*/ -void SimLCD_ShowNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size) { - uint8_t t = 0, temp = 0, enshow = 0; - for(t = 0; t < len; t++) - { - temp=(num/SimLCD_Pow(10,len-t-1))%10; - if(enshow==0&&t<(len-1)) - { - if(temp==0) - { - SimLCD_ShowChar(x+(size/2)*t,y,' ',size,1); - continue; - } - else enshow=1; - - } - SimLCD_ShowChar(x+(size/2)*t,y,temp+'0',size,1); - } -} -/* 显示数字,高位为0,还是显示 - x,y:起点坐标 - num:数值(0~999999999); - len:长度(即要显示的位数) - size:字体大小 - mode: - [7]:0,不填充;1,填充0. - [6:1]:保留 - [0]:0,非叠加显示;1,叠加显示. -*/ -void SimLCD_ShowxNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size,uint8_t mode) { - uint8_t t = 0, temp = 0, enshow = 0; - for(t = 0;t < len; t++) - { - temp=(num/SimLCD_Pow(10,len-t-1))%10; - if(enshow==0&&t<(len-1)) - { - if(temp==0) - { - if(mode&0X80) - SimLCD_ShowChar(x+(size/2)*t,y,'0',size,mode&0X01); - else - SimLCD_ShowChar(x+(size/2)*t,y,' ',size,mode&0X01); - continue; - } - else - enshow=1; - } - SimLCD_ShowChar(x+(size/2)*t,y,temp+'0',size,mode&0X01); - } -} -/* 显示字符串 - x,y:起点坐标 - width,height:区域大小 - size:字体大小 - *p:字符串起始地址 -*/ -void SimLCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p) { - uint8_t x0 = x; - width+=x; - height+=y; - while((*p<='~')&&(*p>=' '))//判断是不是非法字符! - { - if(x>=width){x=x0;y+=size;} - if(y>=height)break;//退出 - SimLCD_ShowChar(x,y,*p,size,0); - x+=size/2; - p++; - } -} -void SimLCD_NewShowChar(uint16_t x, uint16_t y, uint16_t ziti){ - uint8_t temp = 0, t = 0, t1 = 0; - uint16_t y0 = y; - for(t = 0;t < 16;t++) - { - temp = Simulation_Asc1608[ziti][t];//调用1608字体 - - for(t1 = 0; t1 < 8; t1++) - { - if(temp&0x80) - SimLCD_PointColor = SimLCDColor_WHITE; - else - SimLCD_PointColor = SimLCDColor_BLACK; - SimLCD_DrawPoint(x, y); - temp<<=1; - y++; - if(x>=SimLCD.width){SimLCD_PointColor=SimLCDColor_WHITE;return;}//超区域了 - if((y-y0)==16) //--达到高度值 - { - y=y0; - x++; - if(x>=SimLCD.width){SimLCD_PointColor=SimLCDColor_WHITE;return;}//超区域了 - break; - } - } - } -} - -void SimLCD_NewShowNum32(uint16_t x, uint16_t y, uint16_t ziti){ - uint8_t temp = 0, t = 0, t1 = 0; - uint16_t y0 = y; - for(t = 0;t < 36;t++) - { - temp = Simulation_Asc3838[ziti][t]; - - for(t1 = 0; t1 < 8; t1++) - { - if(temp&0x80) - SimLCD_PointColor = SimLCDColor_WHITE; - else - SimLCD_PointColor = SimLCDColor_BLACK; - SimLCD_DrawPoint(x, y); - temp<<=1; - y++; - if((y-y0)==32) //--达到高度值 - { - y=y0; - x++; - break; - } - } - } -} - -// 写到LCD的PM2.5 -void SimLCD_ShowPM2_5(uint16_t x, uint16_t y, uint16_t ziti){ - uint8_t temp = 0, t = 0, t1 = 0; - uint16_t y0 = y; - for(t = 0;t < 36;t++) - { - temp = Simulation_Asc3636[ziti][t];//调用1608字体 - - for(t1 = 0; t1 < 8; t1++) - { - if(temp&0x80) - SimLCD_PointColor = SimLCDColor_WHITE; - else - SimLCD_PointColor = SimLCDColor_BLACK; - SimLCD_DrawPoint(x, y); - temp <<= 1; - y++; - if((y-y0)==24) //--达到高度值 - { - y=y0; - x++; - break; - } - } - } -} - -void SimLCD_Show_PM2_5(uint16_t x, uint16_t y) { - // P - SimLCD_ShowPM2_5( (x+0), y, 0); - // M - SimLCD_ShowPM2_5( (x+12), y, 1); - // 2 - SimLCD_ShowPM2_5( (x+24), y, 2); - // . - SimLCD_ShowPM2_5( (x+36), y, 3); - // 5 - SimLCD_ShowPM2_5( (x+48), y, 4); -} - -void SimLCD_Show_ug_m3(uint16_t x, uint16_t y) { - // u - SimLCD_NewShowChar( (x+0), y, 85); - // g - SimLCD_NewShowChar( (x+8), y, 71); - // / - SimLCD_NewShowChar( (x+16), y, 15); - // m - SimLCD_NewShowChar( (x+24), y, 77); - // 3 - SimLCD_NewShowChar( (x+32), y, 19); -} - -void SimLCD_Show_PM1_0(uint16_t x, uint16_t y) { - // P - SimLCD_NewShowChar( (x+0), y, 48); - // M - SimLCD_NewShowChar( (x+8), y, 45); - // 1 - SimLCD_NewShowChar( (x+16), y, 17); - // . - SimLCD_NewShowChar( (x+24), y, 14); - // 0 - SimLCD_NewShowChar( (x+32), y, 16); -} - -void SimLCD_Show_PM10(uint16_t x, uint16_t y) { - // P - SimLCD_NewShowChar( (x+0), y, 48); - // M - SimLCD_NewShowChar( (x+8), y, 45); - // 1 - SimLCD_NewShowChar( (x+16), y, 17); - // 0 - SimLCD_NewShowChar( (x+24), y, 16); -} - -//x0,y0:坐标 -//r半径 -//color:颜色 -void SimLCD_FillCircle(uint16_t x0,uint16_t y0,uint16_t r0) { - uint16_t x,y,r = r0; - for(y = y0 - r;y < y0 +r;y++) - { - for(x=x0 - r;x < x0+r;x++) - { - if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) <= r*r) - { - SimLCD_DrawPoint(x,y); - } - } - } -} -// 填充圆环 r0外圆 r1内圆 -void SimLCD_FillTorus(uint16_t x0,uint16_t y0,uint16_t r0,uint16_t r1) { - uint16_t x = 0,y = 0,r = r0; - - uint32_t area0 = 0,area1 = 0; - - if(r0 < r1) - return; - - area0 = r0 * r0; area1 = r1 * r1; - - for(y = y0 - r; y < y0+r; y++) - { - for(x=x0 - r; x < x0+r; x++) - { - // 外圆填充 - if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) <= area0) - { - // 内圆填充 - if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) > area1) - SimLCD_DrawPoint(x,y); - } - } - } -} - - - - - - +#include "simulation_lcd.h" +#include "simulation_font.h" + +// LCD的画笔颜色和背景色 +uint16_t SimLCD_PointColor = 0x0000;// 画笔颜色 +uint16_t SimLCD_BackColor = 0xFFFF;// 背景色 + +// 管理LCD参数 默认为竖屏 +SimLCD_t SimLCD = {0}; + +// 读出数据控制线 +#define Simulation_RD(x) (x)?(GPIOB->BSRR = (1<<6)):(GPIOB->BRR = (1<<6)) +// 写入数据控制线 +#define Simulation_WR(x) (x)?(GPIOB->BSRR = (1<<7)):(GPIOB->BRR = (1<<7)) +// 数据/命令选择管脚(1:数据读写,0:命令读写) +#define Simulation_RS(x) (x)?(GPIOB->BSRR = (1<<8)):(GPIOB->BRR = (1<<8)) +// 片选信号线 +#define Simulation_CS(x) (x)?(GPIOB->BSRR = (1<<9)):(GPIOB->BRR = (1<<9)) + +// 16位双向数据线 1 输入 2 输出 +static uint8_t PortDir = 0; +static void Simulation_SetOut(void) { + if( PortDir != 2 ) + { + GPIO_InitTypeDef GPIO_InitStructure; + + // PC0/1/2/3/4/5/6/7 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + // PA5/6/7/8/9/10/11/12 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA,&GPIO_InitStructure); + + PortDir = 2; + } +} +static void Simulation_SetIn(void) { + if( PortDir != 1 ) + { + GPIO_InitTypeDef GPIO_InitStructure; + + // PC0/1/2/3/4/5/6/7 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_2|GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOC,&GPIO_InitStructure); + + // PA5/6/7/8/9/10/11/12 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10|GPIO_Pin_11|GPIO_Pin_12; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOA,&GPIO_InitStructure); + + PortDir = 1; + } +} +static void Simulation_WriteData(uint16_t data) { + uint16_t flag = 0; + flag = (data>>0)&0x00FF; + GPIOC->BSRR = flag; + flag = (~flag)&0x00FF; + GPIOC->BRR = flag; + + flag = 0; + flag = (uint16_t)(((data>>8)&0x00FF)<<5); + GPIOA->BSRR = flag; + flag = (uint16_t)(((~((data>>8)&0x00FF))&0x00FF)<<5); + GPIOA->BRR = flag; +} +static uint16_t Simulation_ReadData(void) { + uint16_t flag1 = 0; + uint16_t flag2 = 0; + flag1 = GPIOC->IDR; + flag2 = (uint16_t)(flag1&0x00FF); + + flag1 = 0; + flag1 = GPIOA->IDR; + flag2 = flag2 + (uint16_t)((flag1<<3)&0xFF00); + + return flag2; +} + +static void SimLCD_WriteCmd(uint16_t data) { + Simulation_SetOut(); + + Simulation_RS(0); + Simulation_RD(1); + Simulation_CS(0); + Delay_us(1); + Simulation_WriteData(data); + Delay_us(1); + Simulation_WR(0); + Delay_us(1); + Simulation_WR(1); + Simulation_CS(1); +} +static void SimLCD_WriteData(uint16_t data) { + Simulation_SetOut(); + + Simulation_RS(1); + Simulation_RD(1); + Simulation_CS(0); + Delay_us(1); + Simulation_WriteData(data); + Delay_us(1); + Simulation_WR(0); + Delay_us(1); + Simulation_WR(1); + Simulation_CS(1); +} + +static uint16_t SimLCD_ReadData(void) { + uint16_t flag = 0; + + Simulation_SetIn(); + + Simulation_RS(1); + Simulation_WR(1); + Simulation_RD(0); + Simulation_CS(0); + Delay_us(1); + flag = Simulation_ReadData(); + Delay_us(1); + Simulation_RD(1); + Simulation_CS(1); + return flag; +} +// 开始写GRAM +void SimLCD_WriteRAMPrepare(void){ + SimLCD_WriteCmd(SimLCD.wramcmd); +} + +// LCD写GRAM +// RGB_Code:颜色值 +void SimLCD_WriteRAM(uint16_t RGB_Code){ + SimLCD_WriteData(RGB_Code); +} + +//从ILI93xx读出的数据为GBR格式，而我们写入的时候为RGB格式。 +//通过该函数转换 +//c:GBR格式的颜色值 +//返回值：RGB格式的颜色值 +uint16_t SimLCD_BGR2RGB(uint16_t c){ + uint16_t r,g,b,rgb; + b = (c>>0)&0x1f; + g = (c>>5)&0x3f; + r = (c>>11)&0x1f; + rgb=(b<<11)+(g<<5)+(r<<0); + return(rgb); +} +// 当mdk -O1时间优化时需要设置 +void SimLCD_Delay(u8 i){ + while(i--); +} +//设置光标位置 +//Xpos:横坐标 +//Ypos:纵坐标 +void SimLCD_SetCursor(uint16_t Xpos, uint16_t Ypos) { + if( (SimLCD.id==0X9341) || (SimLCD.id==0X6804) ) + { + SimLCD_WriteCmd(SimLCD.setxcmd); /* 设置X坐标 */ + SimLCD_WriteData( Xpos >> 8 ); /* 先高8位，然后低8位 */ + SimLCD_WriteData( Xpos & 0x00ff ); /* 设置起始点和结束点*/ + + SimLCD_WriteCmd( SimLCD.setycmd ); /* 设置Y坐标*/ + SimLCD_WriteData( Ypos >> 8 ); + SimLCD_WriteData( Ypos & 0x00ff ); + } + else + { + if(SimLCD.dir==1) + Xpos = SimLCD.width-1-Xpos;// 横屏其实就是调转x,y坐标 + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData( Xpos ); + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData( Ypos ); + } +} +// 读取个某点的颜色值 +// x,y:坐标 +// 返回值:此点的颜色 +uint16_t SimLCD_ReadPoint(uint16_t x, uint16_t y) { + uint16_t r = 0,g = 0,b = 0; + if( (x>=SimLCD.width) || (y>=SimLCD.height) ) return 0; // 超过了范围,直接返回 + SimLCD_SetCursor(x, y); + if( (SimLCD.id==0X9341) || (SimLCD.id==0X6804) ) + SimLCD_WriteCmd(0X2E); // 9341/6804 发送读GRAM指令 + else + SimLCD_WriteCmd(SimLCD_R34); //其他IC发送读GRAM指令 + if(SimLCD.id==0X9320) + SimLCD_Delay(2); // FOR 9320,延时2us + + if(SimLCD_ReadData()) + r = 0; // dummy Read + SimLCD_Delay(2); + r = SimLCD_ReadData(); //实际坐标颜色 + if(SimLCD.id==0X9341) // 9341要分2次读出 + { + SimLCD_Delay(2); + b = 0; + b = SimLCD_ReadData(); + g = r&0xFF;//对于9341,第一次读取的是RG的值,R在前,G在后,各占8位 + g <<= 8; + } + else if(SimLCD.id==0X6804) + r = SimLCD_ReadData();//6804第二次读取的才是真实值 + if(SimLCD.id==0X9325||SimLCD.id==0X4535||SimLCD.id==0X4531||SimLCD.id==0X8989||SimLCD.id==0XB505) + return r;//这几种IC直接返回颜色值 + else if(SimLCD.id==0X9341) + return (((r>>11)<<11)|((g>>10)<<5)|(b>>11)); //ILI9341需要公式转换一下 + else + return SimLCD_BGR2RGB(r); //其他IC +} +//LCD开启显示 +void SimLCD_DisplayOn(void){ + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + SimLCD_WriteCmd(0X29); //开启显示 + else + { + //开启显示 + SimLCD_WriteCmd(SimLCD_R7); + SimLCD_WriteData(0x0173); + } +} +//LCD关闭显示 +void SimLCD_DisplayOff(void){ + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + SimLCD_WriteCmd(0X28); + else + { + SimLCD_WriteCmd(SimLCD_R7); + SimLCD_WriteData(0x0); + } +} + +//设置LCD的自动扫描方向 +//注意:其他函数可能会受到此函数设置的影响(尤其是9341/6804这两个奇葩), +//所以,一般设置为L2R_U2D即可,如果设置为其他扫描方式,可能导致显示不正常. +//dir:0~7,代表8个方向(具体定义见lcd.h) +//9320/9325/9328/4531/4535/1505/b505/8989/5408/9341等IC已经实际测试 +void SimLCD_ScanDir(uint8_t dir) { + uint16_t regval = 0, temp = 0; + uint8_t dirreg = 0; + // 横屏时，对6804不改变扫描方向！ + if(SimLCD.dir==1 && SimLCD.id!=0X6804) { + switch(dir)//方向转换 + { + case 0:dir=6;break; + case 1:dir=7;break; + case 2:dir=4;break; + case 3:dir=5;break; + case 4:dir=1;break; + case 5:dir=0;break; + case 6:dir=3;break; + case 7:dir=2;break; + } + } + // 9341/6804,很特殊 + if(SimLCD.id==0x9341||SimLCD.id==0X6804) { + switch(dir) + { + case SimLCD_L2R_U2D://从左到右,从上到下 + regval|=(0<<7)|(0<<6)|(0<<5); + break; + case SimLCD_L2R_D2U://从左到右,从下到上 + regval|=(1<<7)|(0<<6)|(0<<5); + break; + case SimLCD_R2L_U2D://从右到左,从上到下 + regval|=(0<<7)|(1<<6)|(0<<5); + break; + case SimLCD_R2L_D2U://从右到左,从下到上 + regval|=(1<<7)|(1<<6)|(0<<5); + break; + case SimLCD_U2D_L2R://从上到下,从左到右 + regval|=(0<<7)|(0<<6)|(1<<5); + break; + case SimLCD_U2D_R2L://从上到下,从右到左 + regval|=(0<<7)|(1<<6)|(1<<5); + break; + case SimLCD_D2U_L2R://从下到上,从左到右 + regval|=(1<<7)|(0<<6)|(1<<5); + break; + case SimLCD_D2U_R2L://从下到上,从右到左 + regval|=(1<<7)|(1<<6)|(1<<5); + break; + } + dirreg = 0X36; + regval|= 0X08;// BGR + if(SimLCD.id==0X6804) + regval |= 0x02; // 6804的BIT6和9341的反了 + + SimLCD_WriteCmd(dirreg); + SimLCD_WriteData(regval); + + if(regval&0X20) + { + if(SimLCD.width < SimLCD.height)//交换X,Y + { + temp = SimLCD.width; + SimLCD.width = SimLCD.height; + SimLCD.height= temp; + } + }else + { + if(SimLCD.width > SimLCD.height)//交换X,Y + { + temp = SimLCD.width; + SimLCD.width = SimLCD.height; + SimLCD.height = temp; + } + } + + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData(0); + SimLCD_WriteData(0); + SimLCD_WriteData((SimLCD.width-1)>>8); + SimLCD_WriteData((SimLCD.width-1)&0XFF); + + SimLCD_WriteCmd(SimLCD.setycmd); + SimLCD_WriteData(0); + SimLCD_WriteData(0); + SimLCD_WriteData((SimLCD.height-1)>>8); + SimLCD_WriteData((SimLCD.height-1)&0XFF); + } + else { + switch(dir) + { + case SimLCD_L2R_U2D://从左到右,从上到下 + regval|=(1<<5)|(1<<4)|(0<<3); + break; + case SimLCD_L2R_D2U://从左到右,从下到上 + regval|=(0<<5)|(1<<4)|(0<<3); + break; + case SimLCD_R2L_U2D://从右到左,从上到下 + regval|=(1<<5)|(0<<4)|(0<<3); + break; + case SimLCD_R2L_D2U://从右到左,从下到上 + regval|=(0<<5)|(0<<4)|(0<<3); + break; + case SimLCD_U2D_L2R://从上到下,从左到右 + regval|=(1<<5)|(1<<4)|(1<<3); + break; + case SimLCD_U2D_R2L://从上到下,从右到左 + regval|=(1<<5)|(0<<4)|(1<<3); + break; + case SimLCD_D2U_L2R://从下到上,从左到右 + regval|=(0<<5)|(1<<4)|(1<<3); + break; + case SimLCD_D2U_R2L://从下到上,从右到左 + regval|=(0<<5)|(0<<4)|(1<<3); + break; + } + if(SimLCD.id==0x8989)//8989 IC + { + dirreg=0X11; + regval|=0X6040; //65K + }else//其他驱动IC + { + dirreg=0X03; + regval|=1<<12; + } + SimLCD_WriteCmd(dirreg); + SimLCD_WriteData(regval); + } +} +//画点 +//x,y:坐标 +//POINT_COLOR:此点的颜色 +void SimLCD_DrawPoint(uint16_t x, uint16_t y) { + SimLCD_SetCursor(x,y); //设置光标位置 + SimLCD_WriteRAMPrepare(); //开始写入GRAM + SimLCD_WriteData(SimLCD_PointColor); +} +//快速画点 +//x,y:坐标 +//color:颜色 +void SimLCD_FastDrawPoint(uint16_t x,uint16_t y,uint16_t color) { + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + { + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData(x>>8); + SimLCD_WriteData(x&0XFF); + + SimLCD_WriteCmd(SimLCD.setycmd); + SimLCD_WriteData(y>>8); + SimLCD_WriteData(y&0XFF); + } + else + { + if(SimLCD.dir==1) + x = SimLCD.width-1-x;//横屏其实就是调转x,y坐标 + + SimLCD_WriteCmd(SimLCD.setxcmd); + SimLCD_WriteData(x); + + SimLCD_WriteCmd(SimLCD.setycmd); + SimLCD_WriteData(y); + } + SimLCD_WriteCmd(SimLCD.wramcmd); + SimLCD_WriteData(color); +} + +// 设置LCD显示方向（6804不支持横屏显示） +// dir:0,竖屏；1,横屏 +void SimLCD_DisplayDir(uint8_t dir) { + if(dir==0)//竖屏 + { + SimLCD.dir = 0; //竖屏 + SimLCD.width = 240;//--宽度 + SimLCD.height= 320;//--高度 + if(SimLCD.id==0X9341||SimLCD.id==0X6804) + { + SimLCD.wramcmd=0X2C; //--开始写grammer指令 + SimLCD.setxcmd=0X2A; + SimLCD.setycmd=0X2B; + if(SimLCD.id==0X6804) + { + SimLCD.width =320; + SimLCD.height=480; + } + } + } + else if(SimLCD.id!=0X6804)//6804不支持横屏显示 + { + SimLCD.dir =1;//横屏 + SimLCD.width =320; + SimLCD.height=240; + if(SimLCD.id==0X9341) + { + SimLCD.wramcmd=0X2C; + SimLCD.setxcmd=0X2A; + SimLCD.setycmd=0X2B; + }else if(SimLCD.id==0X8989) + { + SimLCD.wramcmd = SimLCD_R34; + SimLCD.setxcmd = 0X4F; + SimLCD.setycmd = 0X4E; + }else + { + SimLCD.wramcmd = SimLCD_R34; + SimLCD.setxcmd = SimLCD_R33; + SimLCD.setycmd = SimLCD_R32; + } + } + SimLCD_ScanDir(SimLCD_DefScanDir); //默认扫描方向 +} +//清屏函数 +//color:要清屏的填充色 +void SimLCD_Clear(uint16_t color) { + uint32_t index=0; + uint32_t totalpoint = SimLCD.width; + totalpoint *= SimLCD.height; // 得到总点数 + + SimLCD_SetCursor(0x0000, 0x0000); // 设置光标位置 + + SimLCD_WriteRAMPrepare(); // 开始写入GRAM + for(index = 0; index < totalpoint; index++) + SimLCD_WriteData(color); +} +static void SimLCD9341_Init(void){ + SimLCD_WriteCmd(0xCF); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0xC1); + SimLCD_WriteData(0X30); + + SimLCD_WriteCmd(0xED); + SimLCD_WriteData(0x64); + SimLCD_WriteData(0x03); + SimLCD_WriteData(0X12); + SimLCD_WriteData(0X81); + + SimLCD_WriteCmd(0xE8); + SimLCD_WriteData(0x85); + SimLCD_WriteData(0x10); + SimLCD_WriteData(0x7A); + + SimLCD_WriteCmd(0xCB); + SimLCD_WriteData(0x39); + SimLCD_WriteData(0x2C); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x34); + SimLCD_WriteData(0x02); + + SimLCD_WriteCmd(0xF7); + SimLCD_WriteData(0x20); + + SimLCD_WriteCmd(0xEA); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + + SimLCD_WriteCmd(0xC0); //Power control + SimLCD_WriteData(0x1B); //VRH[5:0] + + SimLCD_WriteCmd(0xC1); //Power control + SimLCD_WriteData(0x01); //SAP[2:0];BT[3:0] + + SimLCD_WriteCmd(0xC5); //VCM control + SimLCD_WriteData(0x30); //-3F + SimLCD_WriteData(0x30); //=3C + + SimLCD_WriteCmd(0xC7); //VCM control2 + SimLCD_WriteData(0XB7); + + SimLCD_WriteCmd(0x36); //Memory Access Control + SimLCD_WriteData(0x48); + + SimLCD_WriteCmd(0x3A); + SimLCD_WriteData(0x55); + + SimLCD_WriteCmd(0xB1); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x1A); + + SimLCD_WriteCmd(0xB6); //Display Function Control + SimLCD_WriteData(0x0A); + SimLCD_WriteData(0xA2); + + SimLCD_WriteCmd(0xF2); //3Gamma Function Disable + SimLCD_WriteData(0x00); + + SimLCD_WriteCmd(0x26); //Gamma curve selected + SimLCD_WriteData(0x01); + + SimLCD_WriteCmd(0xE0); //Set Gamma + SimLCD_WriteData(0x0F); + SimLCD_WriteData(0x2A); + SimLCD_WriteData(0x28); + SimLCD_WriteData(0x08); + SimLCD_WriteData(0x0E); + SimLCD_WriteData(0x08); + SimLCD_WriteData(0x54); + SimLCD_WriteData(0XA9); + SimLCD_WriteData(0x43); + SimLCD_WriteData(0x0A); + SimLCD_WriteData(0x0F); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + + SimLCD_WriteCmd(0XE1); //Set Gamma + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x15); + SimLCD_WriteData(0x17); + SimLCD_WriteData(0x07); + SimLCD_WriteData(0x11); + SimLCD_WriteData(0x06); + SimLCD_WriteData(0x2B); + SimLCD_WriteData(0x56); + SimLCD_WriteData(0x3C); + SimLCD_WriteData(0x05); + SimLCD_WriteData(0x10); + SimLCD_WriteData(0x0F); + SimLCD_WriteData(0x3F); + SimLCD_WriteData(0x3F); + SimLCD_WriteData(0x0F); + + SimLCD_WriteCmd(0x2B); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x01); + SimLCD_WriteData(0x3f); + + SimLCD_WriteCmd(0x2A); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0x00); + SimLCD_WriteData(0xef); + + SimLCD_WriteCmd(0x11); //Exit Sleep + Delay_ms(120); + SimLCD_WriteCmd(0x29); //display on +} + +static void SimLCD6804_Init(void){ + SimLCD_WriteCmd(0X11); + Delay_ms(20); + + SimLCD_WriteCmd(0XD0);//VCI1 VCL VGH VGL DDVDH VREG1OUT power amplitude setting + SimLCD_WriteData(0X07); + SimLCD_WriteData(0X42); + SimLCD_WriteData(0X1D); + + SimLCD_WriteCmd(0XD1);//VCOMH VCOM_AC amplitude setting + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X1a); + SimLCD_WriteData(0X09); + + SimLCD_WriteCmd(0XD2);//Operational Amplifier Circuit Constant Current Adjust , charge pump frequency setting + SimLCD_WriteData(0X01); + SimLCD_WriteData(0X22); + + SimLCD_WriteCmd(0XC0);//REV SM GS + SimLCD_WriteData(0X10); + SimLCD_WriteData(0X3B); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X02); + SimLCD_WriteData(0X11); + + SimLCD_WriteCmd(0XC5);// Frame rate setting = 72HZ when setting 0x03 + SimLCD_WriteData(0X03); + + SimLCD_WriteCmd(0XC8);//Gamma setting + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X25); + SimLCD_WriteData(0X21); + SimLCD_WriteData(0X05); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X0a); + SimLCD_WriteData(0X65); + SimLCD_WriteData(0X25); + SimLCD_WriteData(0X77); + SimLCD_WriteData(0X50); + SimLCD_WriteData(0X0f); + SimLCD_WriteData(0X00); + + SimLCD_WriteCmd(0XF8); + SimLCD_WriteData(0X01); + + SimLCD_WriteCmd(0XFE); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X02); + + SimLCD_WriteCmd(0X20);//Exit invert mode + + SimLCD_WriteCmd(0X36); + SimLCD_WriteData(0X08);//原来是a + + SimLCD_WriteCmd(0X3A); + SimLCD_WriteData(0X55);//16位模式 + + SimLCD_WriteCmd(0X2B); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X01); + SimLCD_WriteData(0X3F); + + SimLCD_WriteCmd(0X2A); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X00); + SimLCD_WriteData(0X01); + SimLCD_WriteData(0XDF); + Delay_ms(120); + SimLCD_WriteCmd(0X29); +} +//初始化lcd +//该初始化函数可以初始化各种ILI93XX液晶,但是其他函数是基于ILI9320的!!! +//在其他型号的驱动芯片上没有测试! +/******************************************************* + CS： TFTLCD 片选信号。 + WR：向 TFTLCD 写入数据。 + RD：从 TFTLCD 读取数据。 + D[15:0]: 16 位双向数据线。 + RST：硬复位 TFTLCD。 + RS：命令/数据标志（ 0，读写命令； 1，读写数据） +*******************************************************/ +void SimLCD_Init(void) { + GPIO_InitTypeDef GPIO_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA|RCC_APB2Periph_GPIOB|RCC_APB2Periph_GPIOC,ENABLE); + // B6/B7/B8/B9 + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6|GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOB,&GPIO_InitStructure); + + Simulation_CS(1);Simulation_RD(1);Simulation_WR(1);Simulation_RS(1); + + // 设置端口位输出模式 + Simulation_SetOut(); + + Delay_ms(50); + Delay_ms(50); + // 读到ID不正确,新增lcddev.id==0X9300判断，因为9341在未被复位的情况下会被读成9300 + if( (SimLCD.id<0XFF) || (SimLCD.id==0XFFFF) || (SimLCD.id==0X9300) ) + { + //尝试9341 ID的读取 + SimLCD_WriteCmd(0xD3); + SimLCD_ReadData(); //dummy read + SimLCD_ReadData(); //读到0X00 + SimLCD.id = ((SimLCD_ReadData()<<8)&0xff00);//读取93 + SimLCD.id |= (SimLCD_ReadData()&0x00ff); //读取41 + if(SimLCD.id!=0x9341) //非9341,尝试是不是6804 + { + SimLCD_WriteCmd(0xBF); + SimLCD_ReadData(); //dummy read + SimLCD_ReadData(); //读回0X01 + SimLCD.id = ((SimLCD_ReadData()<<8)&0xff00);//读取0X68 + SimLCD.id |= (SimLCD_ReadData()&0x00ff); //读取0X04 + } + if(SimLCD.id!=0x9341&&SimLCD.id!=0x6804) + SimLCD.id=0x9341;//新增，用于识别9341 + } + // 9341初始化 + if(SimLCD.id==0X9341) + SimLCD9341_Init(); + // 6804初始化 + else if(SimLCD.id==0x6804) + SimLCD6804_Init(); + + SimLCD_DisplayDir(0); // 默认为竖屏 + SimLCD_Clear(SimLCDColor_BLACK); +} + +#if 1 +void SimLCD_AllPic(uint16_t *PIC) { + uint32_t index=0; + uint32_t totalpoint=SimLCD.width; + totalpoint*=SimLCD.height; //得到总点数 + SimLCD_SetCursor(0x00,0x0000);//设置光标位置 + SimLCD_WriteRAMPrepare(); //开始写入GRAM + for(index=0;index < 320*480;index++) + SimLCD_WriteData(PIC[index]); +} +#endif + +//在指定区域内填充单个颜色 +//(sx,sy),(ex,ey):填充矩形对角坐标,区域大小为:(ex-sx+1)*(ey-sy+1) +//color:要填充的颜色 +void SimLCD_Fill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t color) { + uint16_t i,j; + uint16_t xlen=0; + xlen=ex-sx+1; + for(i=sy;i<=ey;i++) + { + SimLCD_SetCursor(sx,i); // 设置光标位置 + SimLCD_WriteRAMPrepare();// 开始写入GRAM + for(j = 0;j < xlen; j++) // 设置光标位置 + SimLCD_WriteData(color); + } +} +//在指定区域内填充指定颜色块 +//(sx,sy),(ex,ey):填充矩形对角坐标,区域大小为:(ex-sx+1)*(ey-sy+1) +//color:要填充的颜色 +void SimLCD_ColorFill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t *color) { + uint16_t height,width; + uint16_t i,j; + width=ex-sx+1; //得到填充的宽度 + height=ey-sy+1; //高度 + for(i = 0;i < height;i++) + { + SimLCD_SetCursor(sx,sy+i); //设置光标位置 + SimLCD_WriteRAMPrepare(); //开始写入GRAM + for(j = 0;j < width;j++) + SimLCD_WriteData(color[i*width+j]); + } +} +//画线 +//x1,y1:起点坐标 +//x2,y2:终点坐标 +void SimLCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { + uint16_t t = 0; + int xerr=0,yerr=0,delta_x,delta_y,distance; + int incx,incy,uRow,uCol; + delta_x=x2-x1; //计算坐标增量 + delta_y=y2-y1; + uRow=x1; + uCol=y1; + if(delta_x>0)incx=1; //设置单步方向 + else if(delta_x==0)incx=0;//垂直线 + else {incx=-1;delta_x=-delta_x;} + if(delta_y>0)incy=1; + else if(delta_y==0)incy=0;//水平线 + else{incy=-1;delta_y=-delta_y;} + if( delta_x>delta_y)distance=delta_x; //选取基本增量坐标轴 + else distance=delta_y; + for(t=0;t<=distance+1;t++ )//画线输出 + { + SimLCD_DrawPoint(uRow,uCol);//画点 + xerr+=delta_x; + yerr+=delta_y; + if(xerr>distance) + { + xerr-=distance; + uRow+=incx; + } + if(yerr>distance) + { + yerr-=distance; + uCol+=incy; + } + } +} +//画矩形 +//(x1,y1),(x2,y2):矩形的对角坐标 +void SimLCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) { + SimLCD_DrawLine(x1,y1,x2,y1); + SimLCD_DrawLine(x1,y1,x1,y2); + SimLCD_DrawLine(x1,y2,x2,y2); + SimLCD_DrawLine(x2,y1,x2,y2); +} + +//在指定位置画一个指定大小的圆 +//(x,y):中心点 +//r :半径 +void SimLCD_DrawCircle(uint16_t x0,uint16_t y0,uint8_t r) { + int a = 0,b = 0; + int di = 0; + a = 0; b = r; + di = 3-(r<<1); //判断下个点位置的标志 + while(a <= b) + { + SimLCD_DrawPoint(x0+a,y0-b); //5 + SimLCD_DrawPoint(x0+b,y0-a); //0 + SimLCD_DrawPoint(x0+b,y0+a); //4 + SimLCD_DrawPoint(x0+a,y0+b); //6 + SimLCD_DrawPoint(x0-a,y0+b); //1 + SimLCD_DrawPoint(x0-b,y0+a); + SimLCD_DrawPoint(x0-a,y0-b); //2 + SimLCD_DrawPoint(x0-b,y0-a); //7 + a++; + + //使用Bresenham算法画圆 + if(di<0) di +=4*a+6; + else + { + di+=10+4*(a-b); + b--; + } + } +} + +#if 1 +//-在指定位置显示一个字符 +//-x,y:起始坐标 +//-num:要显示的字符:" "--->"~" +//-size:字体大小 12/16 这是字体的高度 +//-mode:叠加方式(1)还是非叠加方式(0) +void SimLCD_ShowChar(uint16_t x,uint16_t y,uint8_t num,uint8_t size,uint8_t mode) { + uint8_t temp = 0, t1 = 0, t = 0; + uint16_t y0 = y, colortemp = SimLCD_PointColor; + + // 设置窗口 + num=num-' '; //得到偏移后的值 + if(!mode) //非叠加方式 + { + for(t = 0;t < size;t++) + { + if(size==12) + temp=Simulation_Asc1206[num][t];//调用1206字体 + else + temp=Simulation_Asc1608[num][t];//调用1608字体 + + for(t1=0;t1<8;t1++) + { + if(temp&0x80) + SimLCD_PointColor = colortemp; + else + SimLCD_PointColor = SimLCD_BackColor; + + SimLCD_DrawPoint(x,y); + temp<<=1; + y++; + if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 + if((y-y0)==size) //--达到高度值 + { + y=y0; + x++; + if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 + break; + } + } + } + } + else//叠加方式 + { + for(t=0;t=SimLCD.height){SimLCD_PointColor=colortemp;return;}//超区域了 + if((y-y0)==size) + { + y=y0; + x++; + if(x>=SimLCD.width){SimLCD_PointColor=colortemp;return;}//超区域了 + break; + } + } + } + } + SimLCD_PointColor = colortemp; +} +#endif +//m^n函数 +//返回值:m^n次方. +uint32_t SimLCD_Pow(uint8_t m,uint8_t n) { + uint32_t result = 1; + while(n--)result*=m; + return result; +} +/* 显示数字,高位为0,则不显示 + x,y :起点坐标 + len :数字的位数 + size:字体大小 + color:颜色 + num:数值(0~4294967295); +*/ +void SimLCD_ShowNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size) { + uint8_t t = 0, temp = 0, enshow = 0; + for(t = 0; t < len; t++) + { + temp=(num/SimLCD_Pow(10,len-t-1))%10; + if(enshow==0&&t<(len-1)) + { + if(temp==0) + { + SimLCD_ShowChar(x+(size/2)*t,y,' ',size,1); + continue; + } + else enshow=1; + + } + SimLCD_ShowChar(x+(size/2)*t,y,temp+'0',size,1); + } +} +/* 显示数字,高位为0,还是显示 + x,y:起点坐标 + num:数值(0~999999999); + len:长度(即要显示的位数) + size:字体大小 + mode: + [7]:0,不填充;1,填充0. + [6:1]:保留 + [0]:0,非叠加显示;1,叠加显示. +*/ +void SimLCD_ShowxNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size,uint8_t mode) { + uint8_t t = 0, temp = 0, enshow = 0; + for(t = 0;t < len; t++) + { + temp=(num/SimLCD_Pow(10,len-t-1))%10; + if(enshow==0&&t<(len-1)) + { + if(temp==0) + { + if(mode&0X80) + SimLCD_ShowChar(x+(size/2)*t,y,'0',size,mode&0X01); + else + SimLCD_ShowChar(x+(size/2)*t,y,' ',size,mode&0X01); + continue; + } + else + enshow=1; + } + SimLCD_ShowChar(x+(size/2)*t,y,temp+'0',size,mode&0X01); + } +} +/* 显示字符串 + x,y:起点坐标 + width,height:区域大小 + size:字体大小 + *p:字符串起始地址 +*/ +void SimLCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p) { + uint8_t x0 = x; + width+=x; + height+=y; + while((*p<='~')&&(*p>=' '))//判断是不是非法字符! + { + if(x>=width){x=x0;y+=size;} + if(y>=height)break;//退出 + SimLCD_ShowChar(x,y,*p,size,0); + x+=size/2; + p++; + } +} +void SimLCD_NewShowChar(uint16_t x, uint16_t y, uint16_t ziti){ + uint8_t temp = 0, t = 0, t1 = 0; + uint16_t y0 = y; + for(t = 0;t < 16;t++) + { + temp = Simulation_Asc1608[ziti][t];//调用1608字体 + + for(t1 = 0; t1 < 8; t1++) + { + if(temp&0x80) + SimLCD_PointColor = SimLCDColor_WHITE; + else + SimLCD_PointColor = SimLCDColor_BLACK; + SimLCD_DrawPoint(x, y); + temp<<=1; + y++; + if(x>=SimLCD.width){SimLCD_PointColor=SimLCDColor_WHITE;return;}//超区域了 + if((y-y0)==16) //--达到高度值 + { + y=y0; + x++; + if(x>=SimLCD.width){SimLCD_PointColor=SimLCDColor_WHITE;return;}//超区域了 + break; + } + } + } +} + +void SimLCD_NewShowNum32(uint16_t x, uint16_t y, uint16_t ziti){ + uint8_t temp = 0, t = 0, t1 = 0; + uint16_t y0 = y; + for(t = 0;t < 36;t++) + { + temp = Simulation_Asc3838[ziti][t]; + + for(t1 = 0; t1 < 8; t1++) + { + if(temp&0x80) + SimLCD_PointColor = SimLCDColor_WHITE; + else + SimLCD_PointColor = SimLCDColor_BLACK; + SimLCD_DrawPoint(x, y); + temp<<=1; + y++; + if((y-y0)==32) //--达到高度值 + { + y=y0; + x++; + break; + } + } + } +} + +// 写到LCD的PM2.5 +void SimLCD_ShowPM2_5(uint16_t x, uint16_t y, uint16_t ziti){ + uint8_t temp = 0, t = 0, t1 = 0; + uint16_t y0 = y; + for(t = 0;t < 36;t++) + { + temp = Simulation_Asc3636[ziti][t];//调用1608字体 + + for(t1 = 0; t1 < 8; t1++) + { + if(temp&0x80) + SimLCD_PointColor = SimLCDColor_WHITE; + else + SimLCD_PointColor = SimLCDColor_BLACK; + SimLCD_DrawPoint(x, y); + temp <<= 1; + y++; + if((y-y0)==24) //--达到高度值 + { + y=y0; + x++; + break; + } + } + } +} + +void SimLCD_Show_PM2_5(uint16_t x, uint16_t y) { + // P + SimLCD_ShowPM2_5( (x+0), y, 0); + // M + SimLCD_ShowPM2_5( (x+12), y, 1); + // 2 + SimLCD_ShowPM2_5( (x+24), y, 2); + // . + SimLCD_ShowPM2_5( (x+36), y, 3); + // 5 + SimLCD_ShowPM2_5( (x+48), y, 4); +} + +void SimLCD_Show_ug_m3(uint16_t x, uint16_t y) { + // u + SimLCD_NewShowChar( (x+0), y, 85); + // g + SimLCD_NewShowChar( (x+8), y, 71); + // / + SimLCD_NewShowChar( (x+16), y, 15); + // m + SimLCD_NewShowChar( (x+24), y, 77); + // 3 + SimLCD_NewShowChar( (x+32), y, 19); +} + +void SimLCD_Show_PM1_0(uint16_t x, uint16_t y) { + // P + SimLCD_NewShowChar( (x+0), y, 48); + // M + SimLCD_NewShowChar( (x+8), y, 45); + // 1 + SimLCD_NewShowChar( (x+16), y, 17); + // . + SimLCD_NewShowChar( (x+24), y, 14); + // 0 + SimLCD_NewShowChar( (x+32), y, 16); +} + +void SimLCD_Show_PM10(uint16_t x, uint16_t y) { + // P + SimLCD_NewShowChar( (x+0), y, 48); + // M + SimLCD_NewShowChar( (x+8), y, 45); + // 1 + SimLCD_NewShowChar( (x+16), y, 17); + // 0 + SimLCD_NewShowChar( (x+24), y, 16); +} + +//x0,y0:坐标 +//r半径 +//color:颜色 +void SimLCD_FillCircle(uint16_t x0,uint16_t y0,uint16_t r0) { + uint16_t x,y,r = r0; + for(y = y0 - r;y < y0 +r;y++) + { + for(x=x0 - r;x < x0+r;x++) + { + if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) <= r*r) + { + SimLCD_DrawPoint(x,y); + } + } + } +} +// 填充圆环 r0外圆 r1内圆 +void SimLCD_FillTorus(uint16_t x0,uint16_t y0,uint16_t r0,uint16_t r1) { + uint16_t x = 0,y = 0,r = r0; + + uint32_t area0 = 0,area1 = 0; + + if(r0 < r1) + return; + + area0 = r0 * r0; area1 = r1 * r1; + + for(y = y0 - r; y < y0+r; y++) + { + for(x=x0 - r; x < x0+r; x++) + { + // 外圆填充 + if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) <= area0) + { + // 内圆填充 + if(((x-x0)*(x-x0)+(y-y0)*(y-y0)) > area1) + SimLCD_DrawPoint(x,y); + } + } + } +} + + + + + + diff --git a/firmware/stm32-esp/user/show/simulation_lcd.h b/firmware/stm32-esp/user/show/simulation_lcd.h index 36449217..54bbe352 100644 --- a/firmware/stm32-esp/user/show/simulation_lcd.h +++ b/firmware/stm32-esp/user/show/simulation_lcd.h @@ -1,206 +1,206 @@ -#ifndef _SIMULATION_LCD_H_ -#define _SIMULATION_LCD_H_ - -#include "stm32f10x.h" - -#include "bsp_clock.h" - -#include "stdlib.h" - -typedef struct -{ - uint16_t width; // LCD 宽度 - uint16_t height; // LCD 高度 - uint16_t id; // LCD ID - uint8_t dir; // 横屏还是竖屏控制：0，竖屏；1，横屏。 - - uint8_t wramcmd; // 开始写gram指令 - uint8_t setxcmd; // 设置x坐标指令 - uint8_t setycmd; // 设置y坐标指令 -}SimLCD_t; -extern SimLCD_t SimLCD; //管理LCD重要参数 - -//LCD的画笔颜色和背景色 -extern uint16_t SimLCD_PointColor;// 画笔颜色 -extern uint16_t SimLCD_BackColor;// 背景色 - -//扫描方向定义 -#define SimLCD_L2R_U2D 0 //从左到右,从上到下 -#define SimLCD_L2R_D2U 1 //从左到右,从下到上 -#define SimLCD_R2L_U2D 2 //从右到左,从上到下 -#define SimLCD_R2L_D2U 3 //从右到左,从下到上 - -#define SimLCD_U2D_L2R 4 //从上到下,从左到右 -#define SimLCD_U2D_R2L 5 //从上到下,从右到左 -#define SimLCD_D2U_L2R 6 //从下到上,从左到右 -#define SimLCD_D2U_R2L 7 //从下到上,从右到左 - -// 默认的扫描方向 -#define SimLCD_DefScanDir SimLCD_L2R_U2D - -void SimLCD_Init(void); -void SimLCD_Clear(uint16_t color); -void SimLCD_DrawPoint(uint16_t x, uint16_t y); -uint16_t SimLCD_ReadPoint(uint16_t x, uint16_t y); -void SimLCD_Fill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t color); -void SimLCD_ColorFill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t *color); -void SimLCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); -void SimLCD_DrawCircle(uint16_t x0,uint16_t y0,uint8_t r); -void SimLCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); -void SimLCD_ShowNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size); -void SimLCD_ShowxNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size,uint8_t mode); -void SimLCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p); - -void SimLCD_FillTorus(uint16_t x0,uint16_t y0,uint16_t r0,uint16_t r1); - -void SimLCD_Show_PM2_5(uint16_t x, uint16_t y); -void SimLCD_Show_ug_m3(uint16_t x, uint16_t y); -void SimLCD_Show_PM1_0(uint16_t x, uint16_t y); -void SimLCD_Show_PM10(uint16_t x, uint16_t y); - -void SimLCD_NewShowChar(uint16_t x, uint16_t y, uint16_t ziti); -void SimLCD_NewShowNum32(uint16_t x, uint16_t y, uint16_t ziti); - -//画笔颜色 -#define SimLCDColor_WHITE 0xFFFF -#define SimLCDColor_BLACK 0x0000 -#define SimLCDColor_BLUE 0x001F -#define SimLCDColor_BRED 0XF81F -#define SimLCDColor_GRED 0XFFE0 -#define SimLCDColor_GBLUE 0X07FF -#define SimLCDColor_RED 0xF800 -#define SimLCDColor_MAGENTA 0xF81F -#define SimLCDColor_GREEN 0x07E0 -#define SimLCDColor_CYAN 0x7FFF -#define SimLCDColor_YELLOW 0xFFE0 -#define SimLCDColor_BROWN 0XBC40 //棕色 -#define SimLCDColor_BRRED 0XFC07 //棕红色 -#define SimLCDColor_GRAY 0X8430 //灰色 -//GUI颜色 -#define SimLCDColor_DARKBLUE 0X01CF //深蓝色 -#define SimLCDColor_LIGHTBLUE 0X7D7C //浅蓝色 -#define SimLCDColor_GRAYBLUE 0X5458 //灰蓝色 -//以上三色为PANEL的颜色 -#define SimLCDColor_LIGHTGREEN 0X841F //浅绿色 -//#define SimLCDColor_LIGHTGRAY 0XEF5B //浅灰色(PANNEL) -#define SimLCDColor_LGRAY 0XC618 //浅灰色(PANNEL),窗体背景色 - -#define SimLCDColor_LGRAYBLUE 0XA651 //浅灰蓝色(中间层颜色) -#define SimLCDColor_LBBLUE 0X2B12 //浅棕蓝色(选择条目的反色) - -//9320/9325 LCD寄存器 -#define SimLCD_R0 0x00 -#define SimLCD_R1 0x01 -#define SimLCD_R2 0x02 -#define SimLCD_R3 0x03 -#define SimLCD_R4 0x04 -#define SimLCD_R5 0x05 -#define SimLCD_R6 0x06 -#define SimLCD_R7 0x07 -#define SimLCD_R8 0x08 -#define SimLCD_R9 0x09 -#define SimLCD_R10 0x0A -#define SimLCD_R12 0x0C -#define SimLCD_R13 0x0D -#define SimLCD_R14 0x0E -#define SimLCD_R15 0x0F -#define SimLCD_R16 0x10 -#define SimLCD_R17 0x11 -#define SimLCD_R18 0x12 -#define SimLCD_R19 0x13 -#define SimLCD_R20 0x14 -#define SimLCD_R21 0x15 -#define SimLCD_R22 0x16 -#define SimLCD_R23 0x17 -#define SimLCD_R24 0x18 -#define SimLCD_R25 0x19 -#define SimLCD_R26 0x1A -#define SimLCD_R27 0x1B -#define SimLCD_R28 0x1C -#define SimLCD_R29 0x1D -#define SimLCD_R30 0x1E -#define SimLCD_R31 0x1F -#define SimLCD_R32 0x20 -#define SimLCD_R33 0x21 -#define SimLCD_R34 0x22 -#define SimLCD_R36 0x24 -#define SimLCD_R37 0x25 -#define SimLCD_R40 0x28 -#define SimLCD_R41 0x29 -#define SimLCD_R43 0x2B -#define SimLCD_R45 0x2D -#define SimLCD_R48 0x30 -#define SimLCD_R49 0x31 -#define SimLCD_R50 0x32 -#define SimLCD_R51 0x33 -#define SimLCD_R52 0x34 -#define SimLCD_R53 0x35 -#define SimLCD_R54 0x36 -#define SimLCD_R55 0x37 -#define SimLCD_R56 0x38 -#define SimLCD_R57 0x39 -#define SimLCD_R59 0x3B -#define SimLCD_R60 0x3C -#define SimLCD_R61 0x3D -#define SimLCD_R62 0x3E -#define SimLCD_R63 0x3F -#define SimLCD_R64 0x40 -#define SimLCD_R65 0x41 -#define SimLCD_R66 0x42 -#define SimLCD_R67 0x43 -#define SimLCD_R68 0x44 -#define SimLCD_R69 0x45 -#define SimLCD_R70 0x46 -#define SimLCD_R71 0x47 -#define SimLCD_R72 0x48 -#define SimLCD_R73 0x49 -#define SimLCD_R74 0x4A -#define SimLCD_R75 0x4B -#define SimLCD_R76 0x4C -#define SimLCD_R77 0x4D -#define SimLCD_R78 0x4E -#define SimLCD_R79 0x4F -#define SimLCD_R80 0x50 -#define SimLCD_R81 0x51 -#define SimLCD_R82 0x52 -#define SimLCD_R83 0x53 -#define SimLCD_R96 0x60 -#define SimLCD_R97 0x61 -#define SimLCD_R106 0x6A -#define SimLCD_R118 0x76 -#define SimLCD_R128 0x80 -#define SimLCD_R129 0x81 -#define SimLCD_R130 0x82 -#define SimLCD_R131 0x83 -#define SimLCD_R132 0x84 -#define SimLCD_R133 0x85 -#define SimLCD_R134 0x86 -#define SimLCD_R135 0x87 -#define SimLCD_R136 0x88 -#define SimLCD_R137 0x89 -#define SimLCD_R139 0x8B -#define SimLCD_R140 0x8C -#define SimLCD_R141 0x8D -#define SimLCD_R143 0x8F -#define SimLCD_R144 0x90 -#define SimLCD_R145 0x91 -#define SimLCD_R146 0x92 -#define SimLCD_R147 0x93 -#define SimLCD_R148 0x94 -#define SimLCD_R149 0x95 -#define SimLCD_R150 0x96 -#define SimLCD_R151 0x97 -#define SimLCD_R152 0x98 -#define SimLCD_R153 0x99 -#define SimLCD_R154 0x9A -#define SimLCD_R157 0x9D -#define SimLCD_R192 0xC0 -#define SimLCD_R193 0xC1 -#define SimLCD_R229 0xE5 - -#endif - - - - - +#ifndef _SIMULATION_LCD_H_ +#define _SIMULATION_LCD_H_ + +#include "stm32f10x.h" + +#include "bsp_clock.h" + +#include "stdlib.h" + +typedef struct +{ + uint16_t width; // LCD 宽度 + uint16_t height; // LCD 高度 + uint16_t id; // LCD ID + uint8_t dir; // 横屏还是竖屏控制：0，竖屏；1，横屏。 + + uint8_t wramcmd; // 开始写gram指令 + uint8_t setxcmd; // 设置x坐标指令 + uint8_t setycmd; // 设置y坐标指令 +}SimLCD_t; +extern SimLCD_t SimLCD; //管理LCD重要参数 + +//LCD的画笔颜色和背景色 +extern uint16_t SimLCD_PointColor;// 画笔颜色 +extern uint16_t SimLCD_BackColor;// 背景色 + +//扫描方向定义 +#define SimLCD_L2R_U2D 0 //从左到右,从上到下 +#define SimLCD_L2R_D2U 1 //从左到右,从下到上 +#define SimLCD_R2L_U2D 2 //从右到左,从上到下 +#define SimLCD_R2L_D2U 3 //从右到左,从下到上 + +#define SimLCD_U2D_L2R 4 //从上到下,从左到右 +#define SimLCD_U2D_R2L 5 //从上到下,从右到左 +#define SimLCD_D2U_L2R 6 //从下到上,从左到右 +#define SimLCD_D2U_R2L 7 //从下到上,从右到左 + +// 默认的扫描方向 +#define SimLCD_DefScanDir SimLCD_L2R_U2D + +void SimLCD_Init(void); +void SimLCD_Clear(uint16_t color); +void SimLCD_DrawPoint(uint16_t x, uint16_t y); +uint16_t SimLCD_ReadPoint(uint16_t x, uint16_t y); +void SimLCD_Fill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t color); +void SimLCD_ColorFill(uint16_t sx,uint16_t sy,uint16_t ex,uint16_t ey,uint16_t *color); +void SimLCD_DrawLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); +void SimLCD_DrawCircle(uint16_t x0,uint16_t y0,uint8_t r); +void SimLCD_DrawRectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); +void SimLCD_ShowNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size); +void SimLCD_ShowxNum(uint16_t x,uint16_t y,uint32_t num,uint8_t len,uint8_t size,uint8_t mode); +void SimLCD_ShowString(uint16_t x,uint16_t y,uint16_t width,uint16_t height,uint8_t size,uint8_t *p); + +void SimLCD_FillTorus(uint16_t x0,uint16_t y0,uint16_t r0,uint16_t r1); + +void SimLCD_Show_PM2_5(uint16_t x, uint16_t y); +void SimLCD_Show_ug_m3(uint16_t x, uint16_t y); +void SimLCD_Show_PM1_0(uint16_t x, uint16_t y); +void SimLCD_Show_PM10(uint16_t x, uint16_t y); + +void SimLCD_NewShowChar(uint16_t x, uint16_t y, uint16_t ziti); +void SimLCD_NewShowNum32(uint16_t x, uint16_t y, uint16_t ziti); + +//画笔颜色 +#define SimLCDColor_WHITE 0xFFFF +#define SimLCDColor_BLACK 0x0000 +#define SimLCDColor_BLUE 0x001F +#define SimLCDColor_BRED 0XF81F +#define SimLCDColor_GRED 0XFFE0 +#define SimLCDColor_GBLUE 0X07FF +#define SimLCDColor_RED 0xF800 +#define SimLCDColor_MAGENTA 0xF81F +#define SimLCDColor_GREEN 0x07E0 +#define SimLCDColor_CYAN 0x7FFF +#define SimLCDColor_YELLOW 0xFFE0 +#define SimLCDColor_BROWN 0XBC40 //棕色 +#define SimLCDColor_BRRED 0XFC07 //棕红色 +#define SimLCDColor_GRAY 0X8430 //灰色 +//GUI颜色 +#define SimLCDColor_DARKBLUE 0X01CF //深蓝色 +#define SimLCDColor_LIGHTBLUE 0X7D7C //浅蓝色 +#define SimLCDColor_GRAYBLUE 0X5458 //灰蓝色 +//以上三色为PANEL的颜色 +#define SimLCDColor_LIGHTGREEN 0X841F //浅绿色 +//#define SimLCDColor_LIGHTGRAY 0XEF5B //浅灰色(PANNEL) +#define SimLCDColor_LGRAY 0XC618 //浅灰色(PANNEL),窗体背景色 + +#define SimLCDColor_LGRAYBLUE 0XA651 //浅灰蓝色(中间层颜色) +#define SimLCDColor_LBBLUE 0X2B12 //浅棕蓝色(选择条目的反色) + +//9320/9325 LCD寄存器 +#define SimLCD_R0 0x00 +#define SimLCD_R1 0x01 +#define SimLCD_R2 0x02 +#define SimLCD_R3 0x03 +#define SimLCD_R4 0x04 +#define SimLCD_R5 0x05 +#define SimLCD_R6 0x06 +#define SimLCD_R7 0x07 +#define SimLCD_R8 0x08 +#define SimLCD_R9 0x09 +#define SimLCD_R10 0x0A +#define SimLCD_R12 0x0C +#define SimLCD_R13 0x0D +#define SimLCD_R14 0x0E +#define SimLCD_R15 0x0F +#define SimLCD_R16 0x10 +#define SimLCD_R17 0x11 +#define SimLCD_R18 0x12 +#define SimLCD_R19 0x13 +#define SimLCD_R20 0x14 +#define SimLCD_R21 0x15 +#define SimLCD_R22 0x16 +#define SimLCD_R23 0x17 +#define SimLCD_R24 0x18 +#define SimLCD_R25 0x19 +#define SimLCD_R26 0x1A +#define SimLCD_R27 0x1B +#define SimLCD_R28 0x1C +#define SimLCD_R29 0x1D +#define SimLCD_R30 0x1E +#define SimLCD_R31 0x1F +#define SimLCD_R32 0x20 +#define SimLCD_R33 0x21 +#define SimLCD_R34 0x22 +#define SimLCD_R36 0x24 +#define SimLCD_R37 0x25 +#define SimLCD_R40 0x28 +#define SimLCD_R41 0x29 +#define SimLCD_R43 0x2B +#define SimLCD_R45 0x2D +#define SimLCD_R48 0x30 +#define SimLCD_R49 0x31 +#define SimLCD_R50 0x32 +#define SimLCD_R51 0x33 +#define SimLCD_R52 0x34 +#define SimLCD_R53 0x35 +#define SimLCD_R54 0x36 +#define SimLCD_R55 0x37 +#define SimLCD_R56 0x38 +#define SimLCD_R57 0x39 +#define SimLCD_R59 0x3B +#define SimLCD_R60 0x3C +#define SimLCD_R61 0x3D +#define SimLCD_R62 0x3E +#define SimLCD_R63 0x3F +#define SimLCD_R64 0x40 +#define SimLCD_R65 0x41 +#define SimLCD_R66 0x42 +#define SimLCD_R67 0x43 +#define SimLCD_R68 0x44 +#define SimLCD_R69 0x45 +#define SimLCD_R70 0x46 +#define SimLCD_R71 0x47 +#define SimLCD_R72 0x48 +#define SimLCD_R73 0x49 +#define SimLCD_R74 0x4A +#define SimLCD_R75 0x4B +#define SimLCD_R76 0x4C +#define SimLCD_R77 0x4D +#define SimLCD_R78 0x4E +#define SimLCD_R79 0x4F +#define SimLCD_R80 0x50 +#define SimLCD_R81 0x51 +#define SimLCD_R82 0x52 +#define SimLCD_R83 0x53 +#define SimLCD_R96 0x60 +#define SimLCD_R97 0x61 +#define SimLCD_R106 0x6A +#define SimLCD_R118 0x76 +#define SimLCD_R128 0x80 +#define SimLCD_R129 0x81 +#define SimLCD_R130 0x82 +#define SimLCD_R131 0x83 +#define SimLCD_R132 0x84 +#define SimLCD_R133 0x85 +#define SimLCD_R134 0x86 +#define SimLCD_R135 0x87 +#define SimLCD_R136 0x88 +#define SimLCD_R137 0x89 +#define SimLCD_R139 0x8B +#define SimLCD_R140 0x8C +#define SimLCD_R141 0x8D +#define SimLCD_R143 0x8F +#define SimLCD_R144 0x90 +#define SimLCD_R145 0x91 +#define SimLCD_R146 0x92 +#define SimLCD_R147 0x93 +#define SimLCD_R148 0x94 +#define SimLCD_R149 0x95 +#define SimLCD_R150 0x96 +#define SimLCD_R151 0x97 +#define SimLCD_R152 0x98 +#define SimLCD_R153 0x99 +#define SimLCD_R154 0x9A +#define SimLCD_R157 0x9D +#define SimLCD_R192 0xC0 +#define SimLCD_R193 0xC1 +#define SimLCD_R229 0xE5 + +#endif + + + + + diff --git a/firmware/stm32-esp/user/show/stmflash.c b/firmware/stm32-esp/user/show/stmflash.c index f9fb705c..e770e4c4 100644 --- a/firmware/stm32-esp/user/show/stmflash.c +++ b/firmware/stm32-esp/user/show/stmflash.c @@ -1,116 +1,116 @@ -#include "stmflash.h" - -//读取指定地址的半字(16位数据) -//faddr:读地址(此地址必须为2的倍数!!) -//返回值:对应数据. -u16 STMFLASH_ReadHalfWord(u32 faddr) -{ - return *(vu16*)faddr; -} -#if STM32_FLASH_WREN //如果使能了写 -//不检查的写入 -//WriteAddr:起始地址 -//pBuffer:数据指针 -//NumToWrite:半字(16位)数 -void STMFLASH_Write_NoCheck(u32 WriteAddr,u16 *pBuffer,u16 NumToWrite) -{ - u16 i; - for(i=0;i=(STM32_FLASH_BASE+1024*STM32_FLASH_SIZE)))return;//非法地址 - FLASH_Unlock(); //解锁 - offaddr=WriteAddr-STM32_FLASH_BASE; //实际偏移地址. - secpos=offaddr/STM_SECTOR_SIZE; //扇区地址 0~127 for STM32F103RBT6 - secoff=(offaddr%STM_SECTOR_SIZE)/2; //在扇区内的偏移(2个字节为基本单位.) - secremain=STM_SECTOR_SIZE/2-secoff; //扇区剩余空间大小 - if(NumToWrite<=secremain)secremain=NumToWrite;//不大于该扇区范围 - while(1) - { - STMFLASH_Read(secpos*STM_SECTOR_SIZE+STM32_FLASH_BASE,STMFLASH_BUF,STM_SECTOR_SIZE/2);//读出整个扇区的内容 - for(i=0;i(STM_SECTOR_SIZE/2))secremain=STM_SECTOR_SIZE/2;//下一个扇区还是写不完 - else secremain=NumToWrite;//下一个扇区可以写完了 - } - }; - FLASH_Lock();//上锁 -} -#endif - -//从指定地址开始读出指定长度的数据 -//ReadAddr:起始地址 -//pBuffer:数据指针 -//NumToWrite:半字(16位)数 -void STMFLASH_Read(u32 ReadAddr,u16 *pBuffer,u16 NumToRead) -{ - u16 i; - for(i=0;i=(STM32_FLASH_BASE+1024*STM32_FLASH_SIZE)))return;//非法地址 + FLASH_Unlock(); //解锁 + offaddr=WriteAddr-STM32_FLASH_BASE; //实际偏移地址. + secpos=offaddr/STM_SECTOR_SIZE; //扇区地址 0~127 for STM32F103RBT6 + secoff=(offaddr%STM_SECTOR_SIZE)/2; //在扇区内的偏移(2个字节为基本单位.) + secremain=STM_SECTOR_SIZE/2-secoff; //扇区剩余空间大小 + if(NumToWrite<=secremain)secremain=NumToWrite;//不大于该扇区范围 + while(1) + { + STMFLASH_Read(secpos*STM_SECTOR_SIZE+STM32_FLASH_BASE,STMFLASH_BUF,STM_SECTOR_SIZE/2);//读出整个扇区的内容 + for(i=0;i(STM_SECTOR_SIZE/2))secremain=STM_SECTOR_SIZE/2;//下一个扇区还是写不完 + else secremain=NumToWrite;//下一个扇区可以写完了 + } + }; + FLASH_Lock();//上锁 +} +#endif + +//从指定地址开始读出指定长度的数据 +//ReadAddr:起始地址 +//pBuffer:数据指针 +//NumToWrite:半字(16位)数 +void STMFLASH_Read(u32 ReadAddr,u16 *pBuffer,u16 NumToRead) +{ + u16 i; + for(i=0;i
© COPYRIGHT 2011 STMicroelectronics
- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_CONF_H -#define __STM32F10x_CONF_H - -/* Includes ------------------------------------------------------------------*/ -/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ -#include "stm32f10x_adc.h" -#include "stm32f10x_bkp.h" -#include "stm32f10x_can.h" -#include "stm32f10x_cec.h" -#include "stm32f10x_crc.h" -#include "stm32f10x_dac.h" -#include "stm32f10x_dbgmcu.h" -#include "stm32f10x_dma.h" -#include "stm32f10x_exti.h" -#include "stm32f10x_flash.h" -#include "stm32f10x_fsmc.h" -#include "stm32f10x_gpio.h" -#include "stm32f10x_i2c.h" -#include "stm32f10x_iwdg.h" -#include "stm32f10x_pwr.h" -#include "stm32f10x_rcc.h" -#include "stm32f10x_rtc.h" -#include "stm32f10x_sdio.h" -#include "stm32f10x_spi.h" -#include "stm32f10x_tim.h" -#include "stm32f10x_usart.h" -#include "stm32f10x_wwdg.h" -#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Uncomment the line below to expanse the "assert_param" macro in the - Standard Peripheral Library drivers code */ -/* #define USE_FULL_ASSERT 1 */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT - -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function which reports - * the name of the source file and the source line number of the call - * that failed. If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#endif /* __STM32F10x_CONF_H */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_conf.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_cec.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/user/stm32f10x_it.c b/firmware/stm32-esp/user/stm32f10x_it.c index 18acee17..52823b8a 100644 --- a/firmware/stm32-esp/user/stm32f10x_it.c +++ b/firmware/stm32-esp/user/stm32f10x_it.c @@ -1,160 +1,160 @@ -/** - ****************************************************************************** - * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c - * @author MCD Application Team - * @version V3.5.0 - * @date 08-April-2011 - * @brief Main Interrupt Service Routines. - * This file provides template for all exceptions handler and - * peripherals interrupt service routine. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x_it.h" - -/** @addtogroup STM32F10x_StdPeriph_Template - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************/ -/* Cortex-M3 Processor Exceptions Handlers */ -/******************************************************************************/ - -/** - * @brief This function handles NMI exception. - * @param None - * @retval None - */ -void NMI_Handler(void) -{ -} - -/** - * @brief This function handles Hard Fault exception. - * @param None - * @retval None - */ -void HardFault_Handler(void) -{ - /* Go to infinite loop when Hard Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Memory Manage exception. - * @param None - * @retval None - */ -void MemManage_Handler(void) -{ - /* Go to infinite loop when Memory Manage exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Bus Fault exception. - * @param None - * @retval None - */ -void BusFault_Handler(void) -{ - /* Go to infinite loop when Bus Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles Usage Fault exception. - * @param None - * @retval None - */ -void UsageFault_Handler(void) -{ - /* Go to infinite loop when Usage Fault exception occurs */ - while (1) - { - } -} - -/** - * @brief This function handles SVCall exception. - * @param None - * @retval None - */ -void SVC_Handler(void) -{ -} - -/** - * @brief This function handles Debug Monitor exception. - * @param None - * @retval None - */ -void DebugMon_Handler(void) -{ -} - -/** - * @brief This function handles PendSVC exception. - * @param None - * @retval None - */ -void PendSV_Handler(void) -{ -} - -/** - * @brief This function handles SysTick Handler. - * @param None - * @retval None - */ -void SysTick_Handler(void) -{ -} - -/******************************************************************************/ -/* STM32F10x Peripherals Interrupt Handlers */ -/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ -/* available peripheral interrupt handler's name please refer to the startup */ -/* file (startup_stm32f10x_xx.s). */ -/******************************************************************************/ - -/** - * @brief This function handles PPP interrupt request. - * @param None - * @retval None - */ -/*void PPP_IRQHandler(void) -{ -}*/ - -/** - * @} - */ - - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and + * peripherals interrupt service routine. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_it.h" + +/** @addtogroup STM32F10x_StdPeriph_Template + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M3 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSVC exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ +} + +/******************************************************************************/ +/* STM32F10x Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f10x_xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles PPP interrupt request. + * @param None + * @retval None + */ +/*void PPP_IRQHandler(void) +{ +}*/ + +/** + * @} + */ + + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/firmware/stm32-esp/user/stm32f10x_it.h b/firmware/stm32-esp/user/stm32f10x_it.h index 88902626..9935cf26 100644 --- a/firmware/stm32-esp/user/stm32f10x_it.h +++ b/firmware/stm32-esp/user/stm32f10x_it.h @@ -1,54 +1,54 @@ -/** - ****************************************************************************** - * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h - * @author MCD Application Team - * @version V3.5.0 - * @date 08-April-2011 - * @brief This file contains the headers of the interrupt handlers. - ****************************************************************************** - * @attention - * - * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS - * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE - * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY - * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING - * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE - * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. - * - *

© COPYRIGHT 2011 STMicroelectronics

- ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32F10x_IT_H -#define __STM32F10x_IT_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f10x.h" - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions ------------------------------------------------------- */ - -void NMI_Handler(void); -void HardFault_Handler(void); -void MemManage_Handler(void); -void BusFault_Handler(void); -void UsageFault_Handler(void); -void SVC_Handler(void); -void DebugMon_Handler(void); -void PendSV_Handler(void); -void SysTick_Handler(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32F10x_IT_H */ - -/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file Project/STM32F10x_StdPeriph_Template/stm32f10x_it.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + *

© COPYRIGHT 2011 STMicroelectronics

+ ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IT_H +#define __STM32F10x_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F10x_IT_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ From a8bc50f67ca4b3a90ec78d1c753a334078a77a87 Mon Sep 17 00:00:00 2001 From: xxmfl <34223241+xxmfl@users.noreply.github.com> Date: Thu, 2 Sep 2021 10:08:27 +0800 Subject: [PATCH 6/9] =?UTF-8?q?2021=E5=B9=B49=E6=9C=882=E6=97=A510:07:12?= =?UTF-8?q?=201.=E5=A2=9E=E5=8A=A0=E5=BE=AE=E4=BF=A1=E5=B0=8F=E7=A8=8B?= =?UTF-8?q?=E5=BA=8F=E6=8E=A5=E5=8F=A3=202.4G=E5=BC=80=E5=85=B3=E5=8A=9F?= =?UTF-8?q?=E8=83=BD=E6=8E=A5=E5=8F=A3?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- spring-boot/.gitignore | 39 +- .../.mvn/wrapper/MavenWrapperDownloader.java | 117 + spring-boot/.mvn/wrapper/maven-wrapper.jar | Bin 0 -> 50710 bytes .../.mvn/wrapper/maven-wrapper.properties | 2 + spring-boot/mvnw | 310 +++ spring-boot/mvnw.cmd | 182 ++ spring-boot/pom.xml | 9 +- spring-boot/ruoyi-admin/pom.xml | 25 +- .../main/java/com/ruoyi/RuoYiApplication.java | 10 +- .../com/ruoyi/RuoYiServletInitializer.java | 8 +- .../controller/common/CaptchaController.java | 25 +- .../controller/common/CommonController.java | 49 +- .../controller/monitor/CacheController.java | 9 +- .../controller/monitor/ServerController.java | 8 +- .../monitor/SysLogininforController.java | 18 +- .../monitor/SysOperlogController.java | 18 +- .../monitor/SysUserOnlineController.java | 39 +- .../system/SysConfigController.java | 36 +- .../controller/system/SysDeptController.java | 58 +- .../system/SysDictDataController.java | 33 +- .../system/SysDictTypeController.java | 36 +- .../controller/system/SysLoginController.java | 42 +- .../controller/system/SysMenuController.java | 56 +- .../system/SysNoticeController.java | 21 +- .../controller/system/SysPostController.java | 43 +- .../system/SysProfileController.java | 36 +- .../controller/system/SysRoleController.java | 59 +- .../controller/system/SysUserController.java | 84 +- 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.../common/utils/spring/SpringUtils.java | 49 +- .../com/ruoyi/common/utils/sql/SqlUtil.java | 14 +- .../com/ruoyi/common/utils/uuid/IdUtils.java | 25 +- .../com/ruoyi/common/utils/uuid/UUID.java | 163 +- spring-boot/ruoyi-framework/pom.xml | 8 +- .../framework/aspectj/DataScopeAspect.java | 68 +- .../framework/aspectj/DataSourceAspect.java | 28 +- .../ruoyi/framework/aspectj/LogAspect.java | 100 +- .../framework/config/ApplicationConfig.java | 7 +- .../ruoyi/framework/config/CaptchaConfig.java | 13 +- .../ruoyi/framework/config/DruidConfig.java | 52 +- .../config/FastJson2JsonRedisSerializer.java | 30 +- .../ruoyi/framework/config/FilterConfig.java | 14 +- .../framework/config/KaptchaTextCreator.java | 38 +- .../ruoyi/framework/config/MyBatisConfig.java | 64 +- .../ruoyi/framework/config/RedisConfig.java | 10 +- .../framework/config/ResourcesConfig.java | 14 +- .../framework/config/SecurityConfig.java | 25 +- .../ruoyi/framework/config/ServerConfig.java | 14 +- .../framework/config/ThreadPoolConfig.java | 16 +- .../config/properties/DruidProperties.java | 8 +- .../datasource/DynamicDataSource.java | 12 +- .../DynamicDataSourceContextHolder.java | 16 +- .../interceptor/RepeatSubmitInterceptor.java | 20 +- .../impl/SameUrlDataInterceptor.java | 41 +- .../ruoyi/framework/manager/AsyncManager.java | 20 +- .../framework/manager/ShutdownManager.java | 17 +- .../manager/factory/AsyncFactory.java | 41 +- .../filter/JwtAuthenticationTokenFilter.java | 12 +- .../handle/AuthenticationEntryPointImpl.java | 9 +- .../handle/LogoutSuccessHandlerImpl.java | 14 +- .../ruoyi/framework/web/domain/Server.java | 79 +- .../framework/web/domain/server/Cpu.java | 41 +- .../framework/web/domain/server/Jvm.java | 51 +- .../framework/web/domain/server/Mem.java | 26 +- .../framework/web/domain/server/Sys.java | 35 +- .../framework/web/domain/server/SysFile.java | 47 +- .../web/exception/GlobalExceptionHandler.java | 38 +- .../framework/web/service/AuthService.java | 106 + .../web/service/PermissionService.java | 85 +- .../web/service/SysLoginService.java | 120 +- .../web/service/SysPermissionService.java | 30 +- .../framework/web/service/TokenService.java | 59 +- .../web/service/UserDetailsServiceImpl.java | 42 +- spring-boot/ruoyi-generator/pom.xml | 9 + .../com/ruoyi/generator/SggCodeGenerator.java | 70 + .../com/ruoyi/generator/config/GenConfig.java | 47 +- .../generator/controller/GenController.java | 45 +- .../com/ruoyi/generator/domain/GenTable.java | 263 +- .../generator/domain/GenTableColumn.java | 259 +- .../mapper/GenTableColumnMapper.java | 18 +- .../generator/mapper/GenTableMapper.java | 24 +- .../service/GenTableColumnServiceImpl.java | 72 +- .../service/GenTableServiceImpl.java | 220 +- .../service/IGenTableColumnService.java | 14 +- .../generator/service/IGenTableService.java | 34 +- .../com/ruoyi/generator/util/GenUtils.java | 126 +- .../generator/util/VelocityInitializer.java | 16 +- .../ruoyi/generator/util/VelocityUtils.java | 163 +- .../src/main/resources/generator.yml | 4 +- .../mapper/generator/GenTableColumnMapper.xml | 162 +- .../mapper/generator/GenTableMapper.xml | 337 +-- .../main/resources/vm/java/controller.java.vm | 53 +- .../src/main/resources/vm/java/domain.java.vm | 126 +- .../src/main/resources/vm/java/mapper.java.vm | 68 +- .../main/resources/vm/java/service.java.vm | 18 +- .../resources/vm/java/serviceImpl.java.vm | 176 +- .../main/resources/vm/java/sub-domain.java.vm | 104 +- .../src/main/resources/vm/js/api.js.vm | 56 +- .../main/resources/vm/vue/index-tree.vue.vm | 1063 ++++---- .../src/main/resources/vm/vue/index.vue.vm | 1304 ++++----- .../src/main/resources/vm/xml/mapper.xml.vm | 219 +- .../ruoyi/quartz/config/ScheduleConfig.java | 9 +- .../quartz/controller/SysJobController.java | 36 +- .../controller/SysJobLogController.java | 23 +- .../java/com/ruoyi/quartz/domain/SysJob.java | 122 +- .../com/ruoyi/quartz/domain/SysJobLog.java | 118 +- .../ruoyi/quartz/mapper/SysJobLogMapper.java | 16 +- .../com/ruoyi/quartz/mapper/SysJobMapper.java | 20 +- .../quartz/service/ISysJobLogService.java | 16 +- .../ruoyi/quartz/service/ISysJobService.java | 28 +- .../service/impl/SysJobLogServiceImpl.java | 34 +- .../service/impl/SysJobServiceImpl.java | 102 +- .../java/com/ruoyi/quartz/task/RyTask.java | 14 +- .../ruoyi/quartz/util/AbstractQuartzJob.java | 36 +- .../java/com/ruoyi/quartz/util/CronUtils.java | 30 +- .../com/ruoyi/quartz/util/JobInvokeUtil.java | 95 +- .../QuartzDisallowConcurrentExecution.java | 9 +- .../ruoyi/quartz/util/QuartzJobExecution.java | 9 +- .../com/ruoyi/quartz/util/ScheduleUtils.java | 30 +- .../mapper/quartz/SysJobLogMapper.xml | 168 +- .../resources/mapper/quartz/SysJobMapper.xml | 209 +- spring-boot/ruoyi-system/pom.xml | 24 +- .../controller/IotCategoryController.java | 27 +- .../controller/IotDeviceController.java | 149 +- .../controller/IotDeviceSetController.java | 86 +- .../controller/IotDeviceStatusController.java | 81 +- .../IotDeviceUserRelationController.java | 97 + .../system/controller/IotGroupController.java | 27 +- .../system/controller/MqttController.java | 7 +- .../TUserAccountInfoController.java | 97 + .../controller/TUserLoginLogController.java | 97 + .../com/ruoyi/system/domain/IotCategory.java | 57 +- .../com/ruoyi/system/domain/IotDevice.java | 168 +- .../com/ruoyi/system/domain/IotDeviceSet.java | 311 ++- .../ruoyi/system/domain/IotDeviceStatus.java | 266 +- .../system/domain/IotDeviceUserRelation.java | 136 + .../com/ruoyi/system/domain/IotGroup.java | 83 +- .../com/ruoyi/system/domain/SysConfig.java | 82 +- .../ruoyi/system/domain/SysLogininfor.java | 96 +- .../com/ruoyi/system/domain/SysNotice.java | 80 +- .../com/ruoyi/system/domain/SysOperLog.java | 176 +- .../java/com/ruoyi/system/domain/SysPost.java | 92 +- .../com/ruoyi/system/domain/SysRoleDept.java | 35 +- .../com/ruoyi/system/domain/SysRoleMenu.java | 35 +- .../ruoyi/system/domain/SysUserOnline.java | 85 +- .../com/ruoyi/system/domain/SysUserPost.java | 35 +- .../com/ruoyi/system/domain/SysUserRole.java | 35 +- .../ruoyi/system/domain/TUserAccountInfo.java | 327 +++ .../ruoyi/system/domain/TUserLoginLog.java | 146 + .../system/domain/vo/DeviceControlCMD.java | 16 + .../system/domain/vo/IotDeviceListDto.java | 281 +- .../com/ruoyi/system/domain/vo/MetaVo.java | 32 +- .../com/ruoyi/system/domain/vo/RouterVo.java | 54 +- .../system/mapper/IotCategoryMapper.java | 20 +- .../ruoyi/system/mapper/IotDeviceMapper.java | 28 +- .../system/mapper/IotDeviceSetMapper.java | 20 +- .../system/mapper/IotDeviceStatusMapper.java | 20 +- .../mapper/IotDeviceUserRelationMapper.java | 63 + .../ruoyi/system/mapper/IotGroupMapper.java | 20 +- .../ruoyi/system/mapper/SysConfigMapper.java | 22 +- .../ruoyi/system/mapper/SysDeptMapper.java | 36 +- .../system/mapper/SysDictDataMapper.java | 30 +- .../system/mapper/SysDictTypeMapper.java | 24 +- .../system/mapper/SysLogininforMapper.java | 16 +- .../ruoyi/system/mapper/SysMenuMapper.java | 10 +- .../ruoyi/system/mapper/SysNoticeMapper.java | 20 +- .../ruoyi/system/mapper/SysOperLogMapper.java | 16 +- .../ruoyi/system/mapper/SysPostMapper.java | 30 +- .../system/mapper/SysRoleDeptMapper.java | 16 +- .../ruoyi/system/mapper/SysRoleMapper.java | 32 +- .../system/mapper/SysRoleMenuMapper.java | 16 +- .../ruoyi/system/mapper/SysUserMapper.java | 32 +- .../system/mapper/SysUserPostMapper.java | 16 +- .../system/mapper/SysUserRoleMapper.java | 22 +- .../system/mapper/TUserAccountInfoMapper.java | 63 + .../system/mapper/TUserLoginLogMapper.java | 63 + .../ruoyi/system/mqtt/config/MqttConfig.java | 56 +- .../system/mqtt/config/MqttPushClient.java | 6 + .../system/mqtt/config/PushCallback.java | 46 +- .../system/service/IIotCategoryService.java | 18 +- .../system/service/IIotDeviceService.java | 38 +- .../system/service/IIotDeviceSetService.java | 18 +- .../service/IIotDeviceStatusService.java | 18 +- .../IIotDeviceUserRelationService.java | 68 + .../system/service/IIotGroupService.java | 18 +- .../system/service/ISysConfigService.java | 20 +- .../ruoyi/system/service/ISysDeptService.java | 30 +- .../system/service/ISysDictDataService.java | 20 +- .../system/service/ISysDictTypeService.java | 24 +- .../system/service/ISysLogininforService.java | 12 +- .../ruoyi/system/service/ISysMenuService.java | 38 +- .../system/service/ISysNoticeService.java | 20 +- .../system/service/ISysOperLogService.java | 14 +- .../ruoyi/system/service/ISysPostService.java | 28 +- .../ruoyi/system/service/ISysRoleService.java | 36 +- .../system/service/ISysUserOnlineService.java | 21 +- .../ruoyi/system/service/ISysUserService.java | 48 +- .../service/ITUserAccountInfoService.java | 61 + .../system/service/ITUserLoginLogService.java | 61 + .../service/impl/IotCategoryServiceImpl.java | 36 +- .../service/impl/IotDeviceServiceImpl.java | 277 +- .../service/impl/IotDeviceSetServiceImpl.java | 39 +- .../impl/IotDeviceStatusServiceImpl.java | 42 +- .../IotDeviceUserRelationServiceImpl.java | 113 + .../service/impl/IotGroupServiceImpl.java | 36 +- .../service/impl/SysConfigServiceImpl.java | 79 +- .../service/impl/SysDeptServiceImpl.java | 129 +- .../service/impl/SysDictDataServiceImpl.java | 47 +- .../service/impl/SysDictTypeServiceImpl.java | 84 +- .../impl/SysLogininforServiceImpl.java | 24 +- .../service/impl/SysMenuServiceImpl.java | 203 +- .../service/impl/SysNoticeServiceImpl.java | 36 +- .../service/impl/SysOperLogServiceImpl.java | 29 +- .../service/impl/SysPostServiceImpl.java | 73 +- .../service/impl/SysRoleServiceImpl.java | 122 +- .../impl/SysUserOnlineServiceImpl.java | 48 +- .../service/impl/SysUserServiceImpl.java | 194 +- .../impl/TUserAccountInfoServiceImpl.java | 87 + .../impl/TUserLoginLogServiceImpl.java | 87 + .../mapper/system/IotCategoryMapper.xml | 32 +- .../mapper/system/IotDeviceMapper.xml | 265 +- .../mapper/system/IotDeviceSetMapper.xml | 95 +- .../mapper/system/IotDeviceStatusMapper.xml | 83 +- .../system/IotDeviceUserRelationMapper.xml | 126 + .../mapper/system/IotGroupMapper.xml | 49 +- .../mapper/system/SysConfigMapper.xml | 139 +- .../resources/mapper/system/SysDeptMapper.xml | 280 +- .../mapper/system/SysDictDataMapper.xml | 237 +- .../mapper/system/SysDictTypeMapper.xml | 194 +- .../mapper/system/SysLogininforMapper.xml | 96 +- .../resources/mapper/system/SysMenuMapper.xml | 363 +-- .../mapper/system/SysNoticeMapper.xml | 113 +- .../mapper/system/SysOperLogMapper.xml | 147 +- .../resources/mapper/system/SysPostMapper.xml | 228 +- .../mapper/system/SysRoleDeptMapper.xml | 56 +- .../resources/mapper/system/SysRoleMapper.xml | 289 +- .../mapper/system/SysRoleMenuMapper.xml | 56 +- .../resources/mapper/system/SysUserMapper.xml | 363 +-- .../mapper/system/SysUserPostMapper.xml | 56 +- .../mapper/system/SysUserRoleMapper.xml | 76 +- .../mapper/system/TUserAccountInfoMapper.xml | 148 ++ .../mapper/system/TUserLoginLogMapper.xml | 86 + spring-boot/sql/develop_xiaoyi_wumei.sql | 2340 +++++++++++++++++ 337 files changed, 16032 insertions(+), 12055 deletions(-) create mode 100644 spring-boot/.mvn/wrapper/MavenWrapperDownloader.java create mode 100644 spring-boot/.mvn/wrapper/maven-wrapper.jar create mode 100644 spring-boot/.mvn/wrapper/maven-wrapper.properties create mode 100644 spring-boot/mvnw create mode 100644 spring-boot/mvnw.cmd create mode 100644 spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxConfig.java create mode 100644 spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxMpConfig.java create mode 100644 spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxProperties.java create mode 100644 spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/MpLoginBody.java create mode 100644 spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/AuthService.java create mode 100644 spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/SggCodeGenerator.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceUserRelationController.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserAccountInfoController.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserLoginLogController.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceUserRelation.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserAccountInfo.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserLoginLog.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/DeviceControlCMD.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceUserRelationMapper.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserAccountInfoMapper.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserLoginLogMapper.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceUserRelationService.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserAccountInfoService.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserLoginLogService.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceUserRelationServiceImpl.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserAccountInfoServiceImpl.java create mode 100644 spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserLoginLogServiceImpl.java create mode 100644 spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceUserRelationMapper.xml create mode 100644 spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserAccountInfoMapper.xml create mode 100644 spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserLoginLogMapper.xml create mode 100644 spring-boot/sql/develop_xiaoyi_wumei.sql diff --git a/spring-boot/.gitignore b/spring-boot/.gitignore index 2c0e049a..549e00a2 100644 --- a/spring-boot/.gitignore +++ b/spring-boot/.gitignore @@ -1,15 +1,8 @@ -###################################################################### -# Build Tools - -.gradle -/build/ -!gradle/wrapper/gradle-wrapper.jar - +HELP.md target/ !.mvn/wrapper/maven-wrapper.jar - -###################################################################### -# IDE +!**/src/main/**/target/ +!**/src/test/**/target/ ### STS ### .apt_generated @@ -18,6 +11,7 @@ target/ .project .settings .springBeans +.sts4-cache ### IntelliJ IDEA ### .idea @@ -26,19 +20,14 @@ target/ *.ipr ### NetBeans ### -nbproject/private/ -build/* -nbbuild/ -dist/ -nbdist/ -.nb-gradle/ +/nbproject/private/ +/nbbuild/ +/dist/ +/nbdist/ +/.nb-gradle/ +build/ +!**/src/main/**/build/ +!**/src/test/**/build/ -###################################################################### -# Others -*.log -*.xml.versionsBackup -*.swp - -!*/build/*.java -!*/build/*.html -!*/build/*.xml +### VS Code ### +.vscode/ diff --git a/spring-boot/.mvn/wrapper/MavenWrapperDownloader.java b/spring-boot/.mvn/wrapper/MavenWrapperDownloader.java new file mode 100644 index 00000000..e76d1f32 --- /dev/null +++ b/spring-boot/.mvn/wrapper/MavenWrapperDownloader.java @@ -0,0 +1,117 @@ +/* + * Copyright 2007-present the original author or authors. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * https://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +import java.net.*; +import java.io.*; +import java.nio.channels.*; +import java.util.Properties; + +public class MavenWrapperDownloader { + + private static final String WRAPPER_VERSION = "0.5.6"; + /** + * Default URL to download the maven-wrapper.jar from, if no 'downloadUrl' is provided. + */ + private static final String DEFAULT_DOWNLOAD_URL = "https://repo.maven.apache.org/maven2/io/takari/maven-wrapper/" + + WRAPPER_VERSION + "/maven-wrapper-" + WRAPPER_VERSION + ".jar"; + + /** + * Path to the maven-wrapper.properties file, which might contain a downloadUrl property to + * use instead of the default one. + */ + private static final String MAVEN_WRAPPER_PROPERTIES_PATH = + ".mvn/wrapper/maven-wrapper.properties"; + + /** + * Path where the maven-wrapper.jar will be saved to. + */ + private static final String MAVEN_WRAPPER_JAR_PATH = + ".mvn/wrapper/maven-wrapper.jar"; + + /** + * Name of the property which should be used to override the default download url for the wrapper. + */ + private static final String PROPERTY_NAME_WRAPPER_URL = "wrapperUrl"; + + public static void main(String args[]) { + System.out.println("- Downloader started"); + File baseDirectory = new File(args[0]); + System.out.println("- Using base directory: " + baseDirectory.getAbsolutePath()); + + // If the maven-wrapper.properties exists, read it and check if it contains a custom + // wrapperUrl parameter. + File mavenWrapperPropertyFile = new File(baseDirectory, MAVEN_WRAPPER_PROPERTIES_PATH); + String url = DEFAULT_DOWNLOAD_URL; + if(mavenWrapperPropertyFile.exists()) { + FileInputStream mavenWrapperPropertyFileInputStream = null; + try { + mavenWrapperPropertyFileInputStream = new FileInputStream(mavenWrapperPropertyFile); + Properties mavenWrapperProperties = new Properties(); + mavenWrapperProperties.load(mavenWrapperPropertyFileInputStream); + url = mavenWrapperProperties.getProperty(PROPERTY_NAME_WRAPPER_URL, url); + } catch (IOException e) { + System.out.println("- ERROR loading '" + MAVEN_WRAPPER_PROPERTIES_PATH + "'"); + } finally { + try { + if(mavenWrapperPropertyFileInputStream != null) { + mavenWrapperPropertyFileInputStream.close(); + } + } catch (IOException e) { + // Ignore ... + } + } + } + System.out.println("- Downloading from: " + url); + + File outputFile = new File(baseDirectory.getAbsolutePath(), MAVEN_WRAPPER_JAR_PATH); + if(!outputFile.getParentFile().exists()) { + if(!outputFile.getParentFile().mkdirs()) { + System.out.println( + "- ERROR creating output directory '" + outputFile.getParentFile().getAbsolutePath() + "'"); + } + } + System.out.println("- Downloading to: " + outputFile.getAbsolutePath()); + try { + downloadFileFromURL(url, outputFile); + System.out.println("Done"); + System.exit(0); + } catch (Throwable e) { + System.out.println("- Error downloading"); + e.printStackTrace(); + System.exit(1); + } + } + + private static void downloadFileFromURL(String urlString, File destination) throws Exception { + if (System.getenv("MVNW_USERNAME") != null && System.getenv("MVNW_PASSWORD") != null) { + String username = System.getenv("MVNW_USERNAME"); + char[] password = System.getenv("MVNW_PASSWORD").toCharArray(); + Authenticator.setDefault(new Authenticator() { + @Override + protected PasswordAuthentication getPasswordAuthentication() { + return new PasswordAuthentication(username, password); + } + }); + } + URL website = new URL(urlString); + ReadableByteChannel rbc; + rbc = Channels.newChannel(website.openStream()); + FileOutputStream fos = new FileOutputStream(destination); + fos.getChannel().transferFrom(rbc, 0, Long.MAX_VALUE); + fos.close(); + rbc.close(); + } + +} diff --git a/spring-boot/.mvn/wrapper/maven-wrapper.jar b/spring-boot/.mvn/wrapper/maven-wrapper.jar new file mode 100644 index 0000000000000000000000000000000000000000..2cc7d4a55c0cd0092912bf49ae38b3a9e3fd0054 GIT binary patch literal 50710 zcmbTd1CVCTmM+|7+wQV$+qP}n>auOywyU~q+qUhh+uxis_~*a##hm*_WW?9E7Pb7N%LRFiwbEGCJ0XP=%-6oeT$XZcYgtzC2~q zk(K08IQL8oTl}>>+hE5YRgXTB@fZ4TH9>7=79e`%%tw*SQUa9~$xKD5rS!;ZG@ocK zQdcH}JX?W|0_Afv?y`-NgLum62B&WSD$-w;O6G0Sm;SMX65z)l%m1e-g8Q$QTI;(Q z+x$xth4KFvH@Bs6(zn!iF#nenk^Y^ce;XIItAoCsow38eq?Y-Auh!1in#Rt-_D>H^ z=EjbclGGGa6VnaMGmMLj`x3NcwA43Jb(0gzl;RUIRAUDcR1~99l2SAPkVhoRMMtN} zXvC<tOmX83grD8GSo_Lo?%lNfhD#EBgPo z*nf@ppMC#B!T)Ae0RG$mlJWmGl7CkuU~B8-==5i;rS;8i6rJ=PoQxf446XDX9g|c> zU64ePyMlsI^V5Jq5A+BPe#e73+kpc_r1tv#B)~EZ;7^67F0*QiYfrk0uVW;Qb=NsG zN>gsuCwvb?s-KQIppEaeXtEMdc9dy6Dfduz-tMTms+i01{eD9JE&h?Kht*$eOl#&L zJdM_-vXs(V#$Ed;5wyNWJdPNh+Z$+;$|%qR(t`4W@kDhd*{(7-33BOS6L$UPDeE_53j${QfKN-0v-HG z(QfyvFNbwPK%^!eIo4ac1;b>c0vyf9}Xby@YY!lkz-UvNp zwj#Gg|4B~?n?G^{;(W;|{SNoJbHTMpQJ*Wq5b{l9c8(%?Kd^1?H1om1de0Da9M;Q=n zUfn{f87iVb^>Exl*nZ0hs(Yt>&V9$Pg`zX`AI%`+0SWQ4Zc(8lUDcTluS z5a_KerZWe}a-MF9#Cd^fi!y3%@RFmg&~YnYZ6<=L`UJ0v={zr)>$A;x#MCHZy1st7 ztT+N07NR+vOwSV2pvWuN1%lO!K#Pj0Fr>Q~R40{bwdL%u9i`DSM4RdtEH#cW)6}+I-eE< z&tZs+(Ogu(H_;$a$!7w`MH0r%h&@KM+<>gJL@O~2K2?VrSYUBbhCn#yy?P)uF3qWU z0o09mIik+kvzV6w>vEZy@&Mr)SgxPzUiDA&%07m17udz9usD82afQEps3$pe!7fUf z0eiidkJ)m3qhOjVHC_M(RYCBO%CZKZXFb8}s0-+}@CIn&EF(rRWUX2g^yZCvl0bI} zbP;1S)iXnRC&}5-Tl(hASKqdSnO?ASGJ*MIhOXIblmEudj(M|W!+I3eDc}7t`^mtg z)PKlaXe(OH+q-)qcQ8a@!llRrpGI8DsjhoKvw9T;TEH&?s=LH0w$EzI>%u;oD@x83 zJL7+ncjI9nn!TlS_KYu5vn%f*@qa5F;| zEFxY&B?g=IVlaF3XNm_03PA)=3|{n-UCgJoTr;|;1AU9|kPE_if8!Zvb}0q$5okF$ zHaJdmO&gg!9oN|M{!qGE=tb|3pVQ8PbL$}e;NgXz<6ZEggI}wO@aBP**2Wo=yN#ZC z4G$m^yaM9g=|&!^ft8jOLuzc3Psca*;7`;gnHm}tS0%f4{|VGEwu45KptfNmwxlE~ z^=r30gi@?cOm8kAz!EylA4G~7kbEiRlRIzwrb~{_2(x^$-?|#e6Bi_**(vyr_~9Of z!n>Gqf+Qwiu!xhi9f53=PM3`3tNF}pCOiPU|H4;pzjcsqbwg*{{kyrTxk<;mx~(;; z1NMrpaQ`57yn34>Jo3b|HROE(UNcQash!0p2-!Cz;{IRv#Vp5!3o$P8!%SgV~k&Hnqhp`5eLjTcy93cK!3Hm-$`@yGnaE=?;*2uSpiZTs_dDd51U%i z{|Zd9ou-;laGS_x=O}a+ zB||za<795A?_~Q=r=coQ+ZK@@ zId~hWQL<%)fI_WDIX#=(WNl!Dm$a&ROfLTd&B$vatq!M-2Jcs;N2vps$b6P1(N}=oI3<3luMTmC|0*{ zm1w8bt7vgX($!0@V0A}XIK)w!AzUn7vH=pZEp0RU0p?}ch2XC-7r#LK&vyc2=-#Q2 z^L%8)JbbcZ%g0Du;|8=q8B>X=mIQirpE=&Ox{TiuNDnOPd-FLI^KfEF729!!0x#Es z@>3ursjFSpu%C-8WL^Zw!7a0O-#cnf`HjI+AjVCFitK}GXO`ME&on|^=~Zc}^LBp9 zj=-vlN;Uc;IDjtK38l7}5xxQF&sRtfn4^TNtnzXv4M{r&ek*(eNbIu!u$>Ed%` z5x7+&)2P&4>0J`N&ZP8$vcR+@FS0126s6+Jx_{{`3ZrIMwaJo6jdrRwE$>IU_JTZ} z(||hyyQ)4Z1@wSlT94(-QKqkAatMmkT7pCycEB1U8KQbFX&?%|4$yyxCtm3=W`$4fiG0WU3yI@c zx{wfmkZAYE_5M%4{J-ygbpH|(|GD$2f$3o_Vti#&zfSGZMQ5_f3xt6~+{RX=$H8at z?GFG1Tmp}}lmm-R->ve*Iv+XJ@58p|1_jRvfEgz$XozU8#iJS})UM6VNI!3RUU!{5 zXB(+Eqd-E;cHQ>)`h0(HO_zLmzR3Tu-UGp;08YntWwMY-9i^w_u#wR?JxR2bky5j9 z3Sl-dQQU$xrO0xa&>vsiK`QN<$Yd%YXXM7*WOhnRdSFt5$aJux8QceC?lA0_if|s> ze{ad*opH_kb%M&~(~&UcX0nFGq^MqjxW?HJIP462v9XG>j(5Gat_)#SiNfahq2Mz2 zU`4uV8m$S~o9(W>mu*=h%Gs(Wz+%>h;R9Sg)jZ$q8vT1HxX3iQnh6&2rJ1u|j>^Qf`A76K%_ubL`Zu?h4`b=IyL>1!=*%!_K)=XC z6d}4R5L+sI50Q4P3upXQ3Z!~1ZXLlh!^UNcK6#QpYt-YC=^H=EPg3)z*wXo*024Q4b2sBCG4I# zlTFFY=kQ>xvR+LsuDUAk)q%5pEcqr(O_|^spjhtpb1#aC& zghXzGkGDC_XDa%t(X`E+kvKQ4zrQ*uuQoj>7@@ykWvF332)RO?%AA&Fsn&MNzmFa$ zWk&&^=NNjxLjrli_8ESU)}U|N{%j&TQmvY~lk!~Jh}*=^INA~&QB9em!in_X%Rl1&Kd~Z(u z9mra#<@vZQlOY+JYUwCrgoea4C8^(xv4ceCXcejq84TQ#sF~IU2V}LKc~Xlr_P=ry zl&Hh0exdCbVd^NPCqNNlxM3vA13EI8XvZ1H9#bT7y*U8Y{H8nwGpOR!e!!}*g;mJ#}T{ekSb}5zIPmye*If(}}_=PcuAW#yidAa^9-`<8Gr0 z)Fz=NiZ{)HAvw{Pl5uu)?)&i&Us$Cx4gE}cIJ}B4Xz~-q7)R_%owbP!z_V2=Aq%Rj z{V;7#kV1dNT9-6R+H}}(ED*_!F=~uz>&nR3gb^Ce%+0s#u|vWl<~JD3MvS0T9thdF zioIG3c#Sdsv;LdtRv3ml7%o$6LTVL>(H`^@TNg`2KPIk*8-IB}X!MT0`hN9Ddf7yN z?J=GxPL!uJ7lqwowsl?iRrh@#5C$%E&h~Z>XQcvFC*5%0RN-Opq|=IwX(dq(*sjs+ zqy99+v~m|6T#zR*e1AVxZ8djd5>eIeCi(b8sUk)OGjAsKSOg^-ugwl2WSL@d#?mdl zib0v*{u-?cq}dDGyZ%$XRY=UkQwt2oGu`zQneZh$=^! zj;!pCBWQNtvAcwcWIBM2y9!*W|8LmQy$H~5BEx)78J`4Z0(FJO2P^!YyQU{*Al+fs z){!4JvT1iLrJ8aU3k0t|P}{RN)_^v%$$r;+p0DY7N8CXzmS*HB*=?qaaF9D@#_$SN zSz{moAK<*RH->%r7xX~9gVW$l7?b|_SYI)gcjf0VAUJ%FcQP(TpBs; zg$25D!Ry_`8xpS_OJdeo$qh#7U+cepZ??TII7_%AXsT$B z=e)Bx#v%J0j``00Zk5hsvv6%T^*xGNx%KN-=pocSoqE5_R)OK%-Pbu^1MNzfds)mL zxz^F4lDKV9D&lEY;I+A)ui{TznB*CE$=9(wgE{m}`^<--OzV-5V4X2w9j(_!+jpTr zJvD*y6;39&T+==$F&tsRKM_lqa1HC}aGL0o`%c9mO=fts?36@8MGm7Vi{Y z^<7m$(EtdSr#22<(rm_(l_(`j!*Pu~Y>>xc>I9M#DJYDJNHO&4=HM%YLIp?;iR&$m z#_$ZWYLfGLt5FJZhr3jpYb`*%9S!zCG6ivNHYzNHcI%khtgHBliM^Ou}ZVD7ehU9 zS+W@AV=?Ro!=%AJ>Kcy9aU3%VX3|XM_K0A+ZaknKDyIS3S-Hw1C7&BSW5)sqj5Ye_ z4OSW7Yu-;bCyYKHFUk}<*<(@TH?YZPHr~~Iy%9@GR2Yd}J2!N9K&CN7Eq{Ka!jdu; zQNB*Y;i(7)OxZK%IHGt#Rt?z`I|A{q_BmoF!f^G}XVeTbe1Wnzh%1g>j}>DqFf;Rp zz7>xIs12@Ke0gr+4-!pmFP84vCIaTjqFNg{V`5}Rdt~xE^I;Bxp4)|cs8=f)1YwHz zqI`G~s2~qqDV+h02b`PQpUE#^^Aq8l%y2|ByQeXSADg5*qMprEAE3WFg0Q39`O+i1 z!J@iV!`Y~C$wJ!5Z+j5$i<1`+@)tBG$JL=!*uk=2k;T<@{|s1$YL079FvK%mPhyHV zP8^KGZnp`(hVMZ;s=n~3r2y;LTwcJwoBW-(ndU-$03{RD zh+Qn$ja_Z^OuMf3Ub|JTY74s&Am*(n{J3~@#OJNYuEVVJd9*H%)oFoRBkySGm`hx! zT3tG|+aAkXcx-2Apy)h^BkOyFTWQVeZ%e2@;*0DtlG9I3Et=PKaPt&K zw?WI7S;P)TWED7aSH$3hL@Qde?H#tzo^<(o_sv_2ci<7M?F$|oCFWc?7@KBj-;N$P zB;q!8@bW-WJY9do&y|6~mEruZAVe$!?{)N9rZZxD-|oltkhW9~nR8bLBGXw<632!l z*TYQn^NnUy%Ds}$f^=yQ+BM-a5X4^GHF=%PDrRfm_uqC zh{sKwIu|O0&jWb27;wzg4w5uA@TO_j(1X?8E>5Zfma|Ly7Bklq|s z9)H`zoAGY3n-+&JPrT!>u^qg9Evx4y@GI4$n-Uk_5wttU1_t?6><>}cZ-U+&+~JE) zPlDbO_j;MoxdLzMd~Ew|1o^a5q_1R*JZ=#XXMzg?6Zy!^hop}qoLQlJ{(%!KYt`MK z8umEN@Z4w!2=q_oe=;QttPCQy3Nm4F@x>@v4sz_jo{4m*0r%J(w1cSo;D_hQtJs7W z><$QrmG^+<$4{d2bgGo&3-FV}avg9zI|Rr(k{wTyl3!M1q+a zD9W{pCd%il*j&Ft z5H$nENf>>k$;SONGW`qo6`&qKs*T z2^RS)pXk9b@(_Fw1bkb)-oqK|v}r$L!W&aXA>IpcdNZ_vWE#XO8X`#Yp1+?RshVcd zknG%rPd*4ECEI0wD#@d+3NbHKxl}n^Sgkx==Iu%}HvNliOqVBqG?P2va zQ;kRJ$J6j;+wP9cS za#m;#GUT!qAV%+rdWolk+)6kkz4@Yh5LXP+LSvo9_T+MmiaP-eq6_k;)i6_@WSJ zlT@wK$zqHu<83U2V*yJ|XJU4farT#pAA&@qu)(PO^8PxEmPD4;Txpio+2)#!9 z>&=i7*#tc0`?!==vk>s7V+PL#S1;PwSY?NIXN2=Gu89x(cToFm))7L;< z+bhAbVD*bD=}iU`+PU+SBobTQ%S!=VL!>q$rfWsaaV}Smz>lO9JXT#`CcH_mRCSf4%YQAw`$^yY z3Y*^Nzk_g$xn7a_NO(2Eb*I=^;4f!Ra#Oo~LLjlcjke*k*o$~U#0ZXOQ5@HQ&T46l z7504MUgZkz2gNP1QFN8Y?nSEnEai^Rgyvl}xZfMUV6QrJcXp;jKGqB=D*tj{8(_pV zqyB*DK$2lgYGejmJUW)*s_Cv65sFf&pb(Yz8oWgDtQ0~k^0-wdF|tj}MOXaN@ydF8 zNr={U?=;&Z?wr^VC+`)S2xl}QFagy;$mG=TUs7Vi2wws5zEke4hTa2)>O0U?$WYsZ z<8bN2bB_N4AWd%+kncgknZ&}bM~eDtj#C5uRkp21hWW5gxWvc6b*4+dn<{c?w9Rmf zIVZKsPl{W2vQAlYO3yh}-{Os=YBnL8?uN5(RqfQ=-1cOiUnJu>KcLA*tQK3FU`_bM zM^T28w;nAj5EdAXFi&Kk1Nnl2)D!M{@+D-}bIEe+Lc4{s;YJc-{F#``iS2uk;2!Zp zF9#myUmO!wCeJIoi^A+T^e~20c+c2C}XltaR!|U-HfDA=^xF97ev}$l6#oY z&-&T{egB)&aV$3_aVA51XGiU07$s9vubh_kQG?F$FycvS6|IO!6q zq^>9|3U^*!X_C~SxX&pqUkUjz%!j=VlXDo$!2VLH!rKj@61mDpSr~7B2yy{>X~_nc zRI+7g2V&k zd**H++P9dg!-AOs3;GM`(g<+GRV$+&DdMVpUxY9I1@uK28$az=6oaa+PutlO9?6#? zf-OsgT>^@8KK>ggkUQRPPgC7zjKFR5spqQb3ojCHzj^(UH~v+!y*`Smv)VpVoPwa6 zWG18WJaPKMi*F6Zdk*kU^`i~NNTfn3BkJniC`yN98L-Awd)Z&mY? zprBW$!qL-OL7h@O#kvYnLsfff@kDIegt~?{-*5A7JrA;#TmTe?jICJqhub-G@e??D zqiV#g{)M!kW1-4SDel7TO{;@*h2=_76g3NUD@|c*WO#>MfYq6_YVUP+&8e4|%4T`w zXzhmVNziAHazWO2qXcaOu@R1MrPP{t)`N)}-1&~mq=ZH=w=;-E$IOk=y$dOls{6sRR`I5>|X zpq~XYW4sd;J^6OwOf**J>a7u$S>WTFPRkjY;BfVgQst)u4aMLR1|6%)CB^18XCz+r ztkYQ}G43j~Q&1em(_EkMv0|WEiKu;z2zhb(L%$F&xWwzOmk;VLBYAZ8lOCziNoPw1 zv2BOyXA`A8z^WH!nXhKXM`t0;6D*-uGds3TYGrm8SPnJJOQ^fJU#}@aIy@MYWz**H zvkp?7I5PE{$$|~{-ZaFxr6ZolP^nL##mHOErB^AqJqn^hFA=)HWj!m3WDaHW$C)i^ z9@6G$SzB=>jbe>4kqr#sF7#K}W*Cg-5y6kun3u&0L7BpXF9=#7IN8FOjWrWwUBZiU zT_se3ih-GBKx+Uw0N|CwP3D@-C=5(9T#BH@M`F2!Goiqx+Js5xC92|Sy0%WWWp={$(am!#l~f^W_oz78HX<0X#7 zp)p1u~M*o9W@O8P{0Qkg@Wa# z2{Heb&oX^CQSZWSFBXKOfE|tsAm#^U-WkDnU;IowZ`Ok4!mwHwH=s|AqZ^YD4!5!@ zPxJj+Bd-q6w_YG`z_+r;S86zwXb+EO&qogOq8h-Ect5(M2+>(O7n7)^dP*ws_3U6v zVsh)sk^@*c>)3EML|0<-YROho{lz@Nd4;R9gL{9|64xVL`n!m$-Jjrx?-Bacp!=^5 z1^T^eB{_)Y<9)y{-4Rz@9_>;_7h;5D+@QcbF4Wv7hu)s0&==&6u)33 zHRj+&Woq-vDvjwJCYES@$C4{$?f$Ibi4G()UeN11rgjF+^;YE^5nYprYoJNoudNj= zm1pXSeG64dcWHObUetodRn1Fw|1nI$D9z}dVEYT0lQnsf_E1x2vBLql7NrHH!n&Sq z6lc*mvU=WS6=v9Lrl}&zRiu_6u;6g%_DU{9b+R z#YHqX7`m9eydf?KlKu6Sb%j$%_jmydig`B*TN`cZL-g!R)iE?+Q5oOqBFKhx z%MW>BC^(F_JuG(ayE(MT{S3eI{cKiwOtPwLc0XO*{*|(JOx;uQOfq@lp_^cZo=FZj z4#}@e@dJ>Bn%2`2_WPeSN7si^{U#H=7N4o%Dq3NdGybrZgEU$oSm$hC)uNDC_M9xc zGzwh5Sg?mpBIE8lT2XsqTt3j3?We8}3bzLBTQd639vyg^$0#1epq8snlDJP2(BF)K zSx30RM+{f+b$g{9usIL8H!hCO117Xgv}ttPJm9wVRjPk;ePH@zxv%j9k5`TzdXLeT zFgFX`V7cYIcBls5WN0Pf6SMBN+;CrQ(|EsFd*xtwr#$R{Z9FP`OWtyNsq#mCgZ7+P z^Yn$haBJ)r96{ZJd8vlMl?IBxrgh=fdq_NF!1{jARCVz>jNdC)H^wfy?R94#MPdUjcYX>#wEx+LB#P-#4S-%YH>t-j+w zOFTI8gX$ard6fAh&g=u&56%3^-6E2tpk*wx3HSCQ+t7+*iOs zPk5ysqE}i*cQocFvA68xHfL|iX(C4h*67@3|5Qwle(8wT&!&{8*{f%0(5gH+m>$tq zp;AqrP7?XTEooYG1Dzfxc>W%*CyL16q|fQ0_jp%%Bk^k!i#Nbi(N9&T>#M{gez_Ws zYK=l}adalV(nH}I_!hNeb;tQFk3BHX7N}}R8%pek^E`X}%ou=cx8InPU1EE0|Hen- zyw8MoJqB5=)Z%JXlrdTXAE)eqLAdVE-=>wGHrkRet}>3Yu^lt$Kzu%$3#(ioY}@Gu zjk3BZuQH&~7H+C*uX^4}F*|P89JX;Hg2U!pt>rDi(n(Qe-c}tzb0#6_ItoR0->LSt zR~UT<-|@TO%O`M+_e_J4wx7^)5_%%u+J=yF_S#2Xd?C;Ss3N7KY^#-vx+|;bJX&8r zD?|MetfhdC;^2WG`7MCgs>TKKN=^=!x&Q~BzmQio_^l~LboTNT=I zC5pme^P@ER``p$2md9>4!K#vV-Fc1an7pl>_|&>aqP}+zqR?+~Z;f2^`a+-!Te%V? z;H2SbF>jP^GE(R1@%C==XQ@J=G9lKX+Z<@5}PO(EYkJh=GCv#)Nj{DkWJM2}F&oAZ6xu8&g7pn1ps2U5srwQ7CAK zN&*~@t{`31lUf`O;2w^)M3B@o)_mbRu{-`PrfNpF!R^q>yTR&ETS7^-b2*{-tZAZz zw@q5x9B5V8Qd7dZ!Ai$9hk%Q!wqbE1F1c96&zwBBaRW}(^axoPpN^4Aw}&a5dMe+*Gomky_l^54*rzXro$ z>LL)U5Ry>~FJi=*{JDc)_**c)-&faPz`6v`YU3HQa}pLtb5K)u%K+BOqXP0)rj5Au$zB zW1?vr?mDv7Fsxtsr+S6ucp2l#(4dnr9sD*v+@*>g#M4b|U?~s93>Pg{{a5|rm2xfI z`>E}?9S@|IoUX{Q1zjm5YJT|3S>&09D}|2~BiMo=z4YEjXlWh)V&qs;*C{`UMxp$9 zX)QB?G$fPD6z5_pNs>Jeh{^&U^)Wbr?2D6-q?)`*1k@!UvwQgl8eG$r+)NnFoT)L6 zg7lEh+E6J17krfYJCSjWzm67hEth24pomhz71|Qodn#oAILN)*Vwu2qpJirG)4Wnv}9GWOFrQg%Je+gNrPl8mw7ykE8{ z=|B4+uwC&bpp%eFcRU6{mxRV32VeH8XxX>v$du<$(DfinaaWxP<+Y97Z#n#U~V zVEu-GoPD=9$}P;xv+S~Ob#mmi$JQmE;Iz4(){y*9pFyW-jjgdk#oG$fl4o9E8bo|L zWjo4l%n51@Kz-n%zeSCD`uB?T%FVk+KBI}=ve zvlcS#wt`U6wrJo}6I6Rwb=1GzZfwE=I&Ne@p7*pH84XShXYJRgvK)UjQL%R9Zbm(m zxzTQsLTON$WO7vM)*vl%Pc0JH7WhP;$z@j=y#avW4X8iqy6mEYr@-}PW?H)xfP6fQ z&tI$F{NNct4rRMSHhaelo<5kTYq+(?pY)Ieh8*sa83EQfMrFupMM@nfEV@EmdHUv9 z35uzIrIuo4#WnF^_jcpC@uNNaYTQ~uZWOE6P@LFT^1@$o&q+9Qr8YR+ObBkpP9=F+$s5+B!mX2~T zAuQ6RenX?O{IlLMl1%)OK{S7oL}X%;!XUxU~xJN8xk z`xywS*naF(J#?vOpB(K=o~lE;m$zhgPWDB@=p#dQIW>xe_p1OLoWInJRKbEuoncf; zmS1!u-ycc1qWnDg5Nk2D)BY%jmOwCLC+Ny>`f&UxFowIsHnOXfR^S;&F(KXd{ODlm z$6#1ccqt-HIH9)|@fHnrKudu!6B$_R{fbCIkSIb#aUN|3RM>zuO>dpMbROZ`^hvS@ z$FU-;e4W}!ubzKrU@R*dW*($tFZ>}dd*4_mv)#O>X{U@zSzQt*83l9mI zI$8O<5AIDx`wo0}f2fsPC_l>ONx_`E7kdXu{YIZbp1$(^oBAH({T~&oQ&1{X951QW zmhHUxd)t%GQ9#ak5fTjk-cahWC;>^Rg7(`TVlvy0W@Y!Jc%QL3Ozu# zDPIqBCy&T2PWBj+d-JA-pxZlM=9ja2ce|3B(^VCF+a*MMp`(rH>Rt6W1$;r{n1(VK zLs>UtkT43LR2G$AOYHVailiqk7naz2yZGLo*xQs!T9VN5Q>eE(w zw$4&)&6xIV$IO^>1N-jrEUg>O8G4^@y+-hQv6@OmF@gy^nL_n1P1-Rtyy$Bl;|VcV zF=p*&41-qI5gG9UhKmmnjs932!6hceXa#-qfK;3d*a{)BrwNFeKU|ge?N!;zk+kB! zMD_uHJR#%b54c2tr~uGPLTRLg$`fupo}cRJeTwK;~}A>(Acy4k-Xk&Aa1&eWYS1ULWUj@fhBiWY$pdfy+F z@G{OG{*v*mYtH3OdUjwEr6%_ZPZ3P{@rfbNPQG!BZ7lRyC^xlMpWH`@YRar`tr}d> z#wz87t?#2FsH-jM6m{U=gp6WPrZ%*w0bFm(T#7m#v^;f%Z!kCeB5oiF`W33W5Srdt zdU?YeOdPG@98H7NpI{(uN{FJdu14r(URPH^F6tOpXuhU7T9a{3G3_#Ldfx_nT(Hec zo<1dyhsVsTw;ZkVcJ_0-h-T3G1W@q)_Q30LNv)W?FbMH+XJ* zy=$@39Op|kZv`Rt>X`zg&at(?PO^I=X8d9&myFEx#S`dYTg1W+iE?vt#b47QwoHI9 zNP+|3WjtXo{u}VG(lLUaW0&@yD|O?4TS4dfJI`HC-^q;M(b3r2;7|FONXphw-%7~* z&;2!X17|05+kZOpQ3~3!Nb>O94b&ZSs%p)TK)n3m=4eiblVtSx@KNFgBY_xV6ts;NF;GcGxMP8OKV^h6LmSb2E#Qnw ze!6Mnz7>lE9u{AgQ~8u2zM8CYD5US8dMDX-5iMlgpE9m*s+Lh~A#P1er*rF}GHV3h z=`STo?kIXw8I<`W0^*@mB1$}pj60R{aJ7>C2m=oghKyxMbFNq#EVLgP0cH3q7H z%0?L93-z6|+jiN|@v>ix?tRBU(v-4RV`}cQH*fp|)vd3)8i9hJ3hkuh^8dz{F5-~_ zUUr1T3cP%cCaTooM8dj|4*M=e6flH0&8ve32Q)0dyisl))XkZ7Wg~N}6y`+Qi2l+e zUd#F!nJp{#KIjbQdI`%oZ`?h=5G^kZ_uN`<(`3;a!~EMsWV|j-o>c?x#;zR2ktiB! z);5rrHl?GPtr6-o!tYd|uK;Vbsp4P{v_4??=^a>>U4_aUXPWQ$FPLE4PK$T^3Gkf$ zHo&9$U&G`d(Os6xt1r?sg14n)G8HNyWa^q8#nf0lbr4A-Fi;q6t-`pAx1T*$eKM*$ z|CX|gDrk#&1}>5H+`EjV$9Bm)Njw&7-ZR{1!CJTaXuP!$Pcg69`{w5BRHysB$(tWUes@@6aM69kb|Lx$%BRY^-o6bjH#0!7b;5~{6J+jKxU!Kmi# zndh@+?}WKSRY2gZ?Q`{(Uj|kb1%VWmRryOH0T)f3cKtG4oIF=F7RaRnH0Rc_&372={_3lRNsr95%ZO{IX{p@YJ^EI%+gvvKes5cY+PE@unghjdY5#9A!G z70u6}?zmd?v+{`vCu-53_v5@z)X{oPC@P)iA3jK$`r zSA2a7&!^zmUiZ82R2=1cumBQwOJUPz5Ay`RLfY(EiwKkrx%@YN^^XuET;tE zmr-6~I7j!R!KrHu5CWGSChO6deaLWa*9LLJbcAJsFd%Dy>a!>J`N)Z&oiU4OEP-!Ti^_!p}O?7`}i7Lsf$-gBkuY*`Zb z7=!nTT;5z$_5$=J=Ko+Cp|Q0J=%oFr>hBgnL3!tvFoLNhf#D0O=X^h+x08iB;@8pXdRHxX}6R4k@i6%vmsQwu^5z zk1ip`#^N)^#Lg#HOW3sPI33xqFB4#bOPVnY%d6prwxf;Y-w9{ky4{O6&94Ra8VN@K zb-lY;&`HtxW@sF!doT5T$2&lIvJpbKGMuDAFM#!QPXW87>}=Q4J3JeXlwHys?!1^#37q_k?N@+u&Ns20pEoBeZC*np;i;M{2C0Z4_br2gsh6eL z#8`#sn41+$iD?^GL%5?cbRcaa-Nx0vE(D=*WY%rXy3B%gNz0l?#noGJGP728RMY#q z=2&aJf@DcR?QbMmN)ItUe+VM_U!ryqA@1VVt$^*xYt~-qvW!J4Tp<-3>jT=7Zow5M z8mSKp0v4b%a8bxFr>3MwZHSWD73D@+$5?nZAqGM#>H@`)mIeC#->B)P8T$zh-Pxnc z8)~Zx?TWF4(YfKuF3WN_ckpCe5;x4V4AA3(i$pm|78{%!q?|~*eH0f=?j6i)n~Hso zmTo>vqEtB)`%hP55INf7HM@taH)v`Fw40Ayc*R!T?O{ziUpYmP)AH`euTK!zg9*6Z z!>M=$3pd0!&TzU=hc_@@^Yd3eUQpX4-33}b{?~5t5lgW=ldJ@dUAH%`l5US1y_`40 zs(X`Qk}vvMDYYq+@Rm+~IyCX;iD~pMgq^KY)T*aBz@DYEB={PxA>)mI6tM*sx-DmGQHEaHwRrAmNjO!ZLHO4b;;5mf@zzlPhkP($JeZGE7 z?^XN}Gf_feGoG~BjUgVa*)O`>lX=$BSR2)uD<9 z>o^|nb1^oVDhQbfW>>!;8-7<}nL6L^V*4pB=>wwW+RXAeRvKED(n1;R`A6v$6gy0I(;Vf?!4;&sgn7F%LpM}6PQ?0%2Z@b{It<(G1CZ|>913E0nR2r^Pa*Bp z@tFGi*CQ~@Yc-?{cwu1 zsilf=k^+Qs>&WZG(3WDixisHpR>`+ihiRwkL(3T|=xsoNP*@XX3BU8hr57l3k;pni zI``=3Nl4xh4oDj<%>Q1zYXHr%Xg_xrK3Nq?vKX3|^Hb(Bj+lONTz>4yhU-UdXt2>j z<>S4NB&!iE+ao{0Tx^N*^|EZU;0kJkx@zh}S^P{ieQjGl468CbC`SWnwLRYYiStXm zOxt~Rb3D{dz=nHMcY)#r^kF8|q8KZHVb9FCX2m^X*(|L9FZg!5a7((!J8%MjT$#Fs)M1Pb zq6hBGp%O1A+&%2>l0mpaIzbo&jc^!oN^3zxap3V2dNj3x<=TwZ&0eKX5PIso9j1;e zwUg+C&}FJ`k(M|%%}p=6RPUq4sT3-Y;k-<68ciZ~_j|bt>&9ZLHNVrp#+pk}XvM{8 z`?k}o-!if>hVlCP9j%&WI2V`5SW)BCeR5>MQhF)po=p~AYN%cNa_BbV6EEh_kk^@a zD>4&>uCGCUmyA-c)%DIcF4R6!>?6T~Mj_m{Hpq`*(wj>foHL;;%;?(((YOxGt)Bhx zuS+K{{CUsaC++%}S6~CJ=|vr(iIs-je)e9uJEU8ZJAz)w166q)R^2XI?@E2vUQ!R% zn@dxS!JcOimXkWJBz8Y?2JKQr>`~SmE2F2SL38$SyR1^yqj8_mkBp)o$@+3BQ~Mid z9U$XVqxX3P=XCKj0*W>}L0~Em`(vG<>srF8+*kPrw z20{z(=^w+ybdGe~Oo_i|hYJ@kZl*(9sHw#Chi&OIc?w`nBODp?ia$uF%Hs(X>xm?j zqZQ`Ybf@g#wli`!-al~3GWiE$K+LCe=Ndi!#CVjzUZ z!sD2O*;d28zkl))m)YN7HDi^z5IuNo3^w(zy8 zszJG#mp#Cj)Q@E@r-=NP2FVxxEAeOI2e=|KshybNB6HgE^(r>HD{*}S}mO>LuRGJT{*tfTzw_#+er-0${}%YPe@CMJ1Ng#j#)i)SnY@ss3gL;g zg2D~#Kpdfu#G;q1qz_TwSz1VJT(b3zby$Vk&;Y#1(A)|xj`_?i5YQ;TR%jice5E;0 zYHg;`zS5{S*9xI6o^j>rE8Ua*XhIw{_-*&@(R|C(am8__>+Ws&Q^ymy*X4~hR2b5r zm^p3sw}yv=tdyncy_Ui7{BQS732et~Z_@{-IhHDXAV`(Wlay<#hb>%H%WDi+K$862nA@BDtM#UCKMu+kM`!JHyWSi?&)A7_ z3{cyNG%a~nnH_!+;g&JxEMAmh-Z}rC!o7>OVzW&PoMyTA_g{hqXG)SLraA^OP**<7 zjWbr7z!o2n3hnx7A=2O=WL;`@9N{vQIM@&|G-ljrPvIuJHYtss0Er0fT5cMXNUf1B z7FAwBDixt0X7C3S)mPe5g`YtME23wAnbU)+AtV}z+e8G;0BP=bI;?(#|Ep!vVfDbK zvx+|CKF>yt0hWQ3drchU#XBU+HiuG*V^snFAPUp-5<#R&BUAzoB!aZ+e*KIxa26V}s6?nBK(U-7REa573wg-jqCg>H8~>O{ z*C0JL-?X-k_y%hpUFL?I>0WV{oV`Nb)nZbJG01R~AG>flIJf)3O*oB2i8~;!P?Wo_ z0|QEB*fifiL6E6%>tlAYHm2cjTFE@*<);#>689Z6S#BySQ@VTMhf9vYQyLeDg1*F} zjq>i1*x>5|CGKN{l9br3kB0EHY|k4{%^t7-uhjd#NVipUZa=EUuE5kS1_~qYX?>hJ z$}!jc9$O$>J&wnu0SgfYods^z?J4X;X7c77Me0kS-dO_VUQ39T(Kv(Y#s}Qqz-0AH z^?WRL(4RzpkD+T5FG_0NyPq-a-B7A5LHOCqwObRJi&oRi(<;OuIN7SV5PeHU$<@Zh zPozEV`dYmu0Z&Tqd>t>8JVde9#Pt+l95iHe$4Xwfy1AhI zDM4XJ;bBTTvRFtW>E+GzkN)9k!hA5z;xUOL2 zq4}zn-DP{qc^i|Y%rvi|^5k-*8;JZ~9a;>-+q_EOX+p1Wz;>i7c}M6Nv`^NY&{J-> z`(mzDJDM}QPu5i44**2Qbo(XzZ-ZDu%6vm8w@DUarqXj41VqP~ zs&4Y8F^Waik3y1fQo`bVUH;b=!^QrWb)3Gl=QVKr+6sxc=ygauUG|cm?|X=;Q)kQ8 zM(xrICifa2p``I7>g2R~?a{hmw@{!NS5`VhH8+;cV(F>B94M*S;5#O`YzZH1Z%yD? zZ61w(M`#aS-*~Fj;x|J!KM|^o;MI#Xkh0ULJcA?o4u~f%Z^16ViA27FxU5GM*rKq( z7cS~MrZ=f>_OWx8j#-Q3%!aEU2hVuTu(7`TQk-Bi6*!<}0WQi;_FpO;fhpL4`DcWp zGOw9vx0N~6#}lz(r+dxIGZM3ah-8qrqMmeRh%{z@dbUD2w15*_4P?I~UZr^anP}DB zU9CCrNiy9I3~d#&!$DX9e?A});BjBtQ7oGAyoI$8YQrkLBIH@2;lt4E^)|d6Jwj}z z&2_E}Y;H#6I4<10d_&P0{4|EUacwFHauvrjAnAm6yeR#}f}Rk27CN)vhgRqEyPMMS7zvunj2?`f;%?alsJ+-K+IzjJx>h8 zu~m_y$!J5RWAh|C<6+uiCNsOKu)E72M3xKK(a9Okw3e_*O&}7llNV!=P87VM2DkAk zci!YXS2&=P0}Hx|wwSc9JP%m8dMJA*q&VFB0yMI@5vWoAGraygwn){R+Cj6B1a2Px z5)u(K5{+;z2n*_XD!+Auv#LJEM)(~Hx{$Yb^ldQmcYF2zNH1V30*)CN_|1$v2|`LnFUT$%-tO0Eg|c5$BB~yDfzS zcOXJ$wpzVK0MfTjBJ0b$r#_OvAJ3WRt+YOLlJPYMx~qp>^$$$h#bc|`g0pF-Ao43? z>*A+8lx>}L{p(Tni2Vvk)dtzg$hUKjSjXRagj)$h#8=KV>5s)J4vGtRn5kP|AXIz! zPgbbVxW{2o4s-UM;c#We8P&mPN|DW7_uLF!a|^0S=wr6Esx9Z$2|c1?GaupU6$tb| zY_KU`(_29O_%k(;>^|6*pZURH3`@%EuKS;Ns z1lujmf;r{qAN&Q0&m{wJSZ8MeE7RM5+Sq;ul_ z`+ADrd_Um+G37js6tKsArNB}n{p*zTUxQr>3@wA;{EUbjNjlNd6$Mx zg0|MyU)v`sa~tEY5$en7^PkC=S<2@!nEdG6L=h(vT__0F=S8Y&eM=hal#7eM(o^Lu z2?^;05&|CNliYrq6gUv;|i!(W{0N)LWd*@{2q*u)}u*> z7MQgk6t9OqqXMln?zoMAJcc zMKaof_Up})q#DzdF?w^%tTI7STI^@8=Wk#enR*)&%8yje>+tKvUYbW8UAPg55xb70 zEn5&Ba~NmOJlgI#iS8W3-@N%>V!#z-ZRwfPO1)dQdQkaHsiqG|~we2ALqG7Ruup(DqSOft2RFg_X%3w?6VqvV1uzX_@F(diNVp z4{I|}35=11u$;?|JFBEE*gb;T`dy+8gWJ9~pNsecrO`t#V9jW-6mnfO@ff9od}b(3s4>p0i30gbGIv~1@a^F2kl7YO;DxmF3? zWi-RoXhzRJV0&XE@ACc?+@6?)LQ2XNm4KfalMtsc%4!Fn0rl zpHTrHwR>t>7W?t!Yc{*-^xN%9P0cs0kr=`?bQ5T*oOo&VRRu+1chM!qj%2I!@+1XF z4GWJ=7ix9;Wa@xoZ0RP`NCWw0*8247Y4jIZ>GEW7zuoCFXl6xIvz$ezsWgKdVMBH> z{o!A7f;R-@eK9Vj7R40xx)T<2$?F2E<>Jy3F;;=Yt}WE59J!1WN367 zA^6pu_zLoZIf*x031CcwotS{L8bJE(<_F%j_KJ2P_IusaZXwN$&^t716W{M6X2r_~ zaiMwdISX7Y&Qi&Uh0upS3TyEIXNDICQlT5fHXC`aji-c{U(J@qh-mWl-uMN|T&435 z5)a1dvB|oe%b2mefc=Vpm0C%IUYYh7HI*;3UdgNIz}R##(#{(_>82|zB0L*1i4B5j-xi9O4x10rs_J6*gdRBX=@VJ+==sWb&_Qc6tSOowM{BX@(zawtjl zdU!F4OYw2@Tk1L^%~JCwb|e#3CC>srRHQ*(N%!7$Mu_sKh@|*XtR>)BmWw!;8-mq7 zBBnbjwx8Kyv|hd*`5}84flTHR1Y@@uqjG`UG+jN_YK&RYTt7DVwfEDXDW4U+iO{>K zw1hr{_XE*S*K9TzzUlJH2rh^hUm2v7_XjwTuYap|>zeEDY$HOq3X4Tz^X}E9z)x4F zs+T?Ed+Hj<#jY-`Va~fT2C$=qFT-5q$@p9~0{G&eeL~tiIAHXA!f6C(rAlS^)&k<- zXU|ZVs}XQ>s5iONo~t!XXZgtaP$Iau;JT%h)>}v54yut~pykaNye4axEK#5@?TSsQ zE;Jvf9I$GVb|S`7$pG)4vgo9NXsKr?u=F!GnA%VS2z$@Z(!MR9?EPcAqi5ft)Iz6sNl`%kj+_H-X`R<>BFrBW=fSlD|{`D%@Rcbu2?%>t7i34k?Ujb)2@J-`j#4 zLK<69qcUuniIan-$A1+fR=?@+thwDIXtF1Tks@Br-xY zfB+zblrR(ke`U;6U~-;p1Kg8Lh6v~LjW@9l2P6s+?$2!ZRPX`(ZkRGe7~q(4&gEi<$ch`5kQ?*1=GSqkeV z{SA1EaW_A!t{@^UY2D^YO0(H@+kFVzZaAh0_`A`f(}G~EP~?B|%gtxu&g%^x{EYSz zk+T;_c@d;+n@$<>V%P=nk36?L!}?*=vK4>nJSm+1%a}9UlmTJTrfX4{Lb7smNQn@T zw9p2%(Zjl^bWGo1;DuMHN(djsEm)P8mEC2sL@KyPjwD@d%QnZ$ zMJ3cnn!_!iP{MzWk%PI&D?m?C(y2d|2VChluN^yHya(b`h>~GkI1y;}O_E57zOs!{ zt2C@M$^PR2U#(dZmA-sNreB@z-yb0Bf7j*yONhZG=onhx>t4)RB`r6&TP$n zgmN*)eCqvgriBO-abHQ8ECN0bw?z5Bxpx z=jF@?zFdVn?@gD5egM4o$m`}lV(CWrOKKq(sv*`mNcHcvw&Xryfw<{ch{O&qc#WCTXX6=#{MV@q#iHYba!OUY+MGeNTjP%Fj!WgM&`&RlI^=AWTOqy-o zHo9YFt!gQ*p7{Fl86>#-JLZo(b^O`LdFK~OsZBRR@6P?ad^Ujbqm_j^XycM4ZHFyg ziUbIFW#2tj`65~#2V!4z7DM8Z;fG0|APaQ{a2VNYpNotB7eZ5kp+tPDz&Lqs0j%Y4tA*URpcfi z_M(FD=fRGdqf430j}1z`O0I=;tLu81bwJXdYiN7_&a-?ly|-j*+=--XGvCq#32Gh(=|qj5F?kmihk{%M&$}udW5)DHK zF_>}5R8&&API}o0osZJRL3n~>76nUZ&L&iy^s>PMnNcYZ|9*1$v-bzbT3rpWsJ+y{ zPrg>5Zlery96Um?lc6L|)}&{992{_$J&=4%nRp9BAC6!IB=A&=tF>r8S*O-=!G(_( zwXbX_rGZgeiK*&n5E;f=k{ktyA1(;x_kiMEt0*gpp_4&(twlS2e5C?NoD{n>X2AT# zY@Zp?#!b1zNq96MQqeO*M1MMBin5v#RH52&Xd~DO6-BZLnA6xO1$sou(YJ1Dlc{WF zVa%2DyYm`V#81jP@70IJ;DX@y*iUt$MLm)ByAD$eUuji|5{ptFYq(q)mE(5bOpxjM z^Q`AHWq44SG3`_LxC9fwR)XRVIp=B%<(-lOC3jI#bb@dK(*vjom!=t|#<@dZql%>O z15y^{4tQoeW9Lu%G&V$90x6F)xN6y_oIn;!Q zs)8jT$;&;u%Y>=T3hg34A-+Y*na=|glcStr5D;&5*t5*DmD~x;zQAV5{}Ya`?RRGa zT*t9@$a~!co;pD^!J5bo?lDOWFx%)Y=-fJ+PDGc0>;=q=s?P4aHForSB+)v0WY2JH z?*`O;RHum6j%#LG)Vu#ciO#+jRC3!>T(9fr+XE7T2B7Z|0nR5jw@WG)kDDzTJ=o4~ zUpeyt7}_nd`t}j9BKqryOha{34erm)RmST)_9Aw)@ zHbiyg5n&E{_CQR@h<}34d7WM{s{%5wdty1l+KX8*?+-YkNK2Be*6&jc>@{Fd;Ps|| z26LqdI3#9le?;}risDq$K5G3yoqK}C^@-8z^wj%tdgw-6@F#Ju{Sg7+y)L?)U$ez> zoOaP$UFZ?y5BiFycir*pnaAaY+|%1%8&|(@VB)zweR%?IidwJyK5J!STzw&2RFx zZV@qeaCB01Hu#U9|1#=Msc8Pgz5P*4Lrp!Q+~(G!OiNR{qa7|r^H?FC6gVhkk3y7=uW#Sh;&>78bZ}aK*C#NH$9rX@M3f{nckYI+5QG?Aj1DM)@~z_ zw!UAD@gedTlePB*%4+55naJ8ak_;))#S;4ji!LOqY5VRI){GMwHR~}6t4g>5C_#U# ztYC!tjKjrKvRy=GAsJVK++~$|+s!w9z3H4G^mACv=EErXNSmH7qN}%PKcN|8%9=i)qS5+$L zu&ya~HW%RMVJi4T^pv?>mw*Gf<)-7gf#Qj|e#w2|v4#t!%Jk{&xlf;$_?jW*n!Pyx zkG$<18kiLOAUPuFfyu-EfWX%4jYnjBYc~~*9JEz6oa)_R|8wjZA|RNrAp%}14L7fW zi7A5Wym*K+V8pkqqO-X#3ft{0qs?KVt^)?kS>AicmeO&q+~J~ zp0YJ_P~_a8j= zsAs~G=8F=M{4GZL{|B__UorX@MRNQLn?*_gym4aW(~+i13knnk1P=khoC-ViMZk+x zLW(l}oAg1H`dU+Fv**;qw|ANDSRs>cGqL!Yw^`; zv;{E&8CNJcc)GHzTYM}f&NPw<6j{C3gaeelU#y!M)w-utYEHOCCJo|Vgp7K6C_$14 zqIrLUB0bsgz^D%V%fbo2f9#yb#CntTX?55Xy|Kps&Xek*4_r=KDZ z+`TQuv|$l}MWLzA5Ay6Cvsa^7xvwXpy?`w(6vx4XJ zWuf1bVSb#U8{xlY4+wlZ$9jjPk)X_;NFMqdgq>m&W=!KtP+6NL57`AMljW+es zzqjUjgz;V*kktJI?!NOg^s_)ph45>4UDA!Vo0hn>KZ+h-3=?Y3*R=#!fOX zP$Y~+14$f66ix?UWB_6r#fMcC^~X4R-<&OD1CSDNuX~y^YwJ>sW0j`T<2+3F9>cLo z#!j57$ll2K9(%$4>eA7(>FJX5e)pR5&EZK!IMQzOfik#FU*o*LGz~7u(8}XzIQRy- z!U7AlMTIe|DgQFmc%cHy_9^{o`eD%ja_L>ckU6$O4*U**o5uR7`FzqkU8k4gxtI=o z^P^oGFPm5jwZMI{;nH}$?p@uV8FT4r=|#GziKXK07bHJLtK}X%I0TON$uj(iJ`SY^ zc$b2CoxCQ>7LH@nxcdW&_C#fMYBtTxcg46dL{vf%EFCZ~eErMvZq&Z%Lhumnkn^4A zsx$ay(FnN7kYah}tZ@0?-0Niroa~13`?hVi6`ndno`G+E8;$<6^gsE-K3)TxyoJ4M zb6pj5=I8^FD5H@`^V#Qb2^0cx7wUz&cruA5g>6>qR5)O^t1(-qqP&1g=qvY#s&{bx zq8Hc%LsbK1*%n|Y=FfojpE;w~)G0-X4i*K3{o|J7`krhIOd*c*$y{WIKz2n2*EXEH zT{oml3Th5k*vkswuFXdGDlcLj15Nec5pFfZ*0?XHaF_lVuiB%Pv&p7z)%38}%$Gup zVTa~C8=cw%6BKn_|4E?bPNW4PT7}jZQLhDJhvf4z;~L)506IE0 zX!tWXX(QOQPRj-p80QG79t8T2^az4Zp2hOHziQlvT!|H)jv{Ixodabzv6lBj)6WRB z{)Kg@$~~(7$-az?lw$4@L%I&DI0Lo)PEJJziWP33a3azb?jyXt1v0N>2kxwA6b%l> zZqRpAo)Npi&loWbjFWtEV)783BbeIAhqyuc+~>i7aQ8shIXt)bjCWT6$~ro^>99G} z2XfmT0(|l!)XJb^E!#3z4oEGIsL(xd; zYX1`1I(cG|u#4R4T&C|m*9KB1`UzKvho5R@1eYtUL9B72{i(ir&ls8g!pD ztR|25xGaF!4z5M+U@@lQf(12?xGy`!|3E}7pI$k`jOIFjiDr{tqf0va&3pOn6Pu)% z@xtG2zjYuJXrV)DUrIF*y<1O1<$#54kZ#2;=X51J^F#0nZ0(;S$OZDt_U2bx{RZ=Q zMMdd$fH|!s{ zXq#l;{`xfV`gp&C>A`WrQU?d{!Ey5(1u*VLJt>i27aZ-^&2IIk=zP5p+{$q(K?2(b z8?9h)kvj9SF!Dr zoyF}?V|9;6abHxWk2cEvGs$-}Pg}D+ZzgkaN&$Snp%;5m%zh1E#?Wac-}x?BYlGN#U#Mek*}kek#I9XaHt?mz3*fDrRTQ#&#~xyeqJk1QJ~E$7qsw6 z?sV;|?*=-{M<1+hXoj?@-$y+(^BJ1H~wQ9G8C0#^aEAyhDduNX@haoa=PuPp zYsGv8UBfQaRHgBgLjmP^eh>fLMeh{8ic)?xz?#3kX-D#Z{;W#cd_`9OMFIaJg-=t`_3*!YDgtNQ2+QUEAJB9M{~AvT$H`E)IKmCR21H532+ata8_i_MR@ z2Xj<3w<`isF~Ah$W{|9;51ub*f4#9ziKrOR&jM{x7I_7()O@`F*5o$KtZ?fxU~g`t zUovNEVKYn$U~VX8eR)qb`7;D8pn*Pp$(otYTqL)5KH$lUS-jf}PGBjy$weoceAcPp z&5ZYB$r&P$MN{0H0AxCe4Qmd3T%M*5d4i%#!nmBCN-WU-4m4Tjxn-%j3HagwTxCZ9 z)j5vO-C7%s%D!&UfO>bi2oXiCw<-w{vVTK^rVbv#W=WjdADJy8$khnU!`ZWCIU`># zyjc^1W~pcu>@lDZ{zr6gv%)2X4n27~Ve+cQqcND%0?IFSP4sH#yIaXXYAq^z3|cg` z`I3$m%jra>e2W-=DiD@84T!cb%||k)nPmEE09NC%@PS_OLhkrX*U!cgD*;;&gIaA(DyVT4QD+q_xu z>r`tg{hiGY&DvD-)B*h+YEd+Zn)WylQl}<4>(_NlsKXCRV;a)Rcw!wtelM2_rWX`j zTh5A|i6=2BA(iMCnj_fob@*eA;V?oa4Z1kRBGaU07O70fb6-qmA$Hg$ps@^ka1=RO zTbE_2#)1bndC3VuK@e!Sftxq4=Uux}fDxXE#Q5_x=E1h>T5`DPHz zbH<_OjWx$wy7=%0!mo*qH*7N4tySm+R0~(rbus`7;+wGh;C0O%x~fEMkt!eV>U$`i z5>Q(o z=t$gPjgGh0&I7KY#k50V7DJRX<%^X z>6+ebc9efB3@eE2Tr){;?_w`vhgF>`-GDY(YkR{9RH(MiCnyRtd!LxXJ75z+?2 zGi@m^+2hKJ5sB1@Xi@s_@p_Kwbc<*LQ_`mr^Y%j}(sV_$`J(?_FWP)4NW*BIL~sR>t6 zM;qTJZ~GoY36&{h-Pf}L#y2UtR}>ZaI%A6VkU>vG4~}9^i$5WP2Tj?Cc}5oQxe2=q z8BeLa$hwCg_psjZyC2+?yX4*hJ58Wu^w9}}7X*+i5Rjqu5^@GzXiw#SUir1G1`jY% zOL=GE_ENYxhcyUrEt9XlMNP6kx6h&%6^u3@zB8KUCAa18T(R2J`%JjWZ z!{7cXaEW+Qu*iJPu+m>QqW}Lo$4Z+!I)0JNzZ&_M%=|B1yejFRM04bGAvu{=lNPd+ zJRI^DRQ(?FcVUD+bgEcAi@o(msqys9RTCG#)TjI!9~3-dc`>gW;HSJuQvH~d`MQs86R$|SKXHh zqS9Qy)u;T`>>a!$LuaE2keJV%;8g)tr&Nnc;EkvA-RanHXsy)D@XN0a>h}z2j81R; zsUNJf&g&rKpuD0WD@=dDrPHdBoK42WoBU|nMo17o(5^;M|dB4?|FsAGVrSyWcI`+FVw^vTVC`y}f(BwJl zrw3Sp151^9=}B})6@H*i4-dIN_o^br+BkcLa^H56|^2XsT0dESw2 zMX>(KqNl=x2K5=zIKg}2JpGAZu{I_IO}0$EQ5P{4zol**PCt3F4`GX}2@vr8#Y)~J zKb)gJeHcFnR@4SSh%b;c%J`l=W*40UPjF#q{<}ywv-=vHRFmDjv)NtmC zQx9qm)d%0zH&qG7AFa3VAU1S^(n8VFTC~Hb+HjYMjX8r#&_0MzlNR*mnLH5hi}`@{ zK$8qiDDvS_(L9_2vHgzEQ${DYSE;DqB!g*jhJghE&=LTnbgl&Xepo<*uRtV{2wDHN z)l;Kg$TA>Y|K8Lc&LjWGj<+bp4Hiye_@BfU(y#nF{fpR&|Ltbye?e^j0}8JC4#xi% zv29ZR%8%hk=3ZDvO-@1u8KmQ@6p%E|dlHuy#H1&MiC<*$YdLkHmR#F3ae;bKd;@*i z2_VfELG=B}JMLCO-6UQy^>RDE%K4b>c%9ki`f~Z2Qu8hO7C#t%Aeg8E%+}6P7Twtg z-)dj(w}_zFK&86KR@q9MHicUAucLVshUdmz_2@32(V`y3`&Kf8Q2I)+!n0mR=rrDU zXvv^$ho;yh*kNqJ#r1}b0|i|xRUF6;lhx$M*uG3SNLUTC@|htC z-=fsw^F%$qqz4%QdjBrS+ov}Qv!z00E+JWas>p?z@=t!WWU3K*?Z(0meTuTOC7OTx zU|kFLE0bLZ+WGcL$u4E}5dB0g`h|uwv3=H6f+{5z9oLv-=Q45+n~V4WwgO=CabjM% zBAN+RjM65(-}>Q2V#i1Na@a0`08g&y;W#@sBiX6Tpy8r}*+{RnyGUT`?XeHSqo#|J z^ww~c;ou|iyzpErDtlVU=`8N7JSu>4M z_pr9=tX0edVn9B}YFO2y(88j#S{w%E8vVOpAboK*27a7e4Ekjt0)hIX99*1oE;vex z7#%jhY=bPijA=Ce@9rRO(Vl_vnd00!^TAc<+wVvRM9{;hP*rqEL_(RzfK$er_^SN; z)1a8vo8~Dr5?;0X0J62Cusw$A*c^Sx1)dom`-)Pl7hsW4i(r*^Mw`z5K>!2ixB_mu z*Ddqjh}zceRFdmuX1akM1$3>G=#~|y?eYv(e-`Qy?bRHIq=fMaN~fB zUa6I8Rt=)jnplP>yuS+P&PxeWpJ#1$F`iqRl|jF$WL_aZFZl@kLo&d$VJtu&w?Q0O zzuXK>6gmygq(yXJy0C1SL}T8AplK|AGNUOhzlGeK_oo|haD@)5PxF}rV+5`-w{Aag zus45t=FU*{LguJ11Sr-28EZkq;!mJO7AQGih1L4rEyUmp>B!%X0YemsrV3QFvlgt* z5kwlPzaiJ+kZ^PMd-RRbl(Y?F*m`4*UIhIuf#8q>H_M=fM*L_Op-<_r zBZagV=4B|EW+KTja?srADTZXCd3Yv%^Chfpi)cg{ED${SI>InNpRj5!euKv?=Xn92 zsS&FH(*w`qLIy$doc>RE&A5R?u zzkl1sxX|{*fLpXvIW>9d<$ePROttn3oc6R!sN{&Y+>Jr@yeQN$sFR z;w6A<2-0%UA?c8Qf;sX7>>uKRBv3Ni)E9pI{uVzX|6Bb0U)`lhLE3hK58ivfRs1}d zNjlGK0hdq0qjV@q1qI%ZFMLgcpWSY~mB^LK)4GZ^h_@H+3?dAe_a~k*;9P_d7%NEFP6+ zgV(oGr*?W(ql?6SQ~`lUsjLb%MbfC4V$)1E0Y_b|OIYxz4?O|!kRb?BGrgiH5+(>s zoqM}v*;OBfg-D1l`M6T6{K`LG+0dJ1)!??G5g(2*vlNkm%Q(MPABT$r13q?|+kL4- zf)Mi5r$sn;u41aK(K#!m+goyd$c!KPl~-&-({j#D4^7hQkV3W|&>l_b!}!z?4($OA z5IrkfuT#F&S1(`?modY&I40%gtroig{YMvF{K{>5u^I51k8RriGd${z)=5k2tG zM|&Bp5kDTfb#vfuTTd?)a=>bX=lokw^y9+2LS?kwHQIWI~pYgy7 zb?A-RKVm_vM5!9?C%qYdfRAw& zAU7`up~%g=p@}pg#b7E)BFYx3g%(J36Nw(Dij!b>cMl@CSNbrW!DBDbTD4OXk!G4x zi}JBKc8HBYx$J~31PXH+4^x|UxK~(<@I;^3pWN$E=sYma@JP|8YL`L(zI6Y#c%Q{6 z*APf`DU$S4pr#_!60BH$FGViP14iJmbrzSrOkR;f3YZa{#E7Wpd@^4E-zH8EgPc-# zKWFPvh%WbqU_%ZEt`=Q?odKHc7@SUmY{GK`?40VuL~o)bS|is$Hn=<=KGHOsEC5tB zFb|q}gGlL97NUf$G$>^1b^3E18PZ~Pm9kX%*ftnolljiEt@2#F2R5ah$zbXd%V_Ev zyDd{1o_uuoBga$fB@Fw!V5F3jIr=a-ykqrK?WWZ#a(bglI_-8pq74RK*KfQ z0~Dzus7_l;pMJYf>Bk`)`S8gF!To-BdMnVw5M-pyu+aCiC5dwNH|6fgRsIKZcF&)g zr}1|?VOp}I3)IR@m1&HX1~#wsS!4iYqES zK}4J{Ei>;e3>LB#Oly>EZkW14^@YmpbgxCDi#0RgdM${&wxR+LiX}B+iRioOB0(pDKpVEI;ND?wNx>%e|m{RsqR_{(nmQ z3ZS}@t!p4a(BKx_-CYwrcyJ5u1TO9bcXti$8sy>xcLKqKCc#~UOZYD{llKTSFEjJ~ zyNWt>tLU}*>^`TvPxtP%F`ZJQw@W0^>x;!^@?k_)9#bF$j0)S3;mH-IR5y82l|%=F z2lR8zhP?XNP-ucZZ6A+o$xOyF!w;RaLHGh57GZ|TCXhJqY~GCh)aXEV$1O&$c}La1 zjuJxkY9SM4av^Hb;i7efiYaMwI%jGy`3NdY)+mcJhF(3XEiSlU3c|jMBi|;m-c?~T z+x0_@;SxcoY=(6xNgO$bBt~Pj8`-<1S|;Bsjrzw3@zSjt^JC3X3*$HI79i~!$RmTz zsblZsLYs7L$|=1CB$8qS!tXrWs!F@BVuh?kN(PvE5Av-*r^iYu+L^j^m9JG^#=m>@ z=1soa)H*w6KzoR$B8mBCXoU;f5^bVuwQ3~2LKg!yxomG1#XPmn(?YH@E~_ED+W6mxs%x{%Z<$pW`~ON1~2XjP5v(0{C{+6Dm$00tsd3w=f=ZENy zOgb-=f}|Hb*LQ$YdWg<(u7x3`PKF)B7ZfZ6;1FrNM63 z?O6tE%EiU@6%rVuwIQjvGtOofZBGZT1Sh(xLIYt9c4VI8`!=UJd2BfLjdRI#SbVAX ziT(f*RI^T!IL5Ac>ql7uduF#nuCRJ1)2bdvAyMxp-5^Ww5p#X{rb5)(X|fEhDHHW{ zw(Lfc$g;+Q`B0AiPGtmK%*aWfQQ$d!*U<|-@n2HZvCWSiw^I>#vh+LyC;aaVWGbmkENr z&kl*8o^_FW$T?rDYLO1Pyi%>@&kJKQoH2E0F`HjcN}Zlnx1ddoDA>G4Xu_jyp6vuT zPvC}pT&Owx+qB`zUeR|4G;OH(<<^_bzkjln0k40t`PQxc$7h(T8Ya~X+9gDc8Z9{Z z&y0RAU}#_kQGrM;__MK9vwIwK^aoqFhk~dK!ARf1zJqHMxF2?7-8|~yoO@_~Ed;_wvT%Vs{9RK$6uUQ|&@#6vyBsFK9eZW1Ft#D2)VpQRwpR(;x^ zdoTgMqfF9iBl%{`QDv7B0~8{8`8k`C4@cbZAXBu00v#kYl!#_Wug{)2PwD5cNp?K^ z9+|d-4z|gZ!L{57>!Ogfbzchm>J1)Y%?NThxIS8frAw@z>Zb9v%3_3~F@<=LG%r*U zaTov}{{^z~SeX!qgSYow`_5)ij*QtGp4lvF`aIGQ>@3ZTkDmsl#@^5*NGjOuu82}o zzLF~Q9SW+mP=>88%eSA1W4_W7-Q>rdq^?t=m6}^tDPaBRGFLg%ak93W!kOp#EO{6& zP%}Iff5HZQ9VW$~+9r=|Quj#z*=YwcnssS~9|ub2>v|u1JXP47vZ1&L1O%Z1DsOrDfSIMHU{VT>&>H=9}G3i@2rP+rx@eU@uE8rJNec zij~#FmuEBj03F1~ct@C@$>y)zB+tVyjV3*n`mtAhIM0$58vM9jOQC}JJOem|EpwqeMuYPxu3sv}oMS?S#o6GGK@8PN59)m&K4Dc&X% z(;XL_kKeYkafzS3Wn5DD>Yiw{LACy_#jY4op(>9q>>-*9@C0M+=b#bknAWZ37^(Ij zq>H%<@>o4a#6NydoF{_M4i4zB_KG)#PSye9bk0Ou8h%1Dtl7Q_y#7*n%g)?m>xF~( zjqvOwC;*qvN_3(*a+w2|ao0D?@okOvg8JskUw(l7n`0fncglavwKd?~l_ryKJ^Ky! zKCHkIC-o7%fFvPa$)YNh022lakMar^dgL=t#@XLyNHHw!b?%WlM)R@^!)I!smZL@k zBi=6wE5)2v&!UNV(&)oOYW(6Qa!nUjDKKBf-~Da=#^HE4(@mWk)LPvhyN3i4goB$3K8iV7uh zsv+a?#c4&NWeK(3AH;ETrMOIFgu{_@%XRwCZ;L=^8Ts)hix4Pf3yJRQ<8xb^CkdmC z?c_gB)XmRsk`9ch#tx4*hO=#qS7={~Vb4*tTf<5P%*-XMfUUYkI9T1cEF;ObfxxI-yNuA=I$dCtz3ey znVkctYD*`fUuZ(57+^B*R=Q}~{1z#2!ca?)+YsRQb+lt^LmEvZt_`=j^wqig+wz@n@ z`LIMQJT3bxMzuKg8EGBU+Q-6cs5(@5W?N>JpZL{$9VF)veF`L5%DSYTNQEypW%6$u zm_~}T{HeHj1bAlKl8ii92l9~$dm=UM21kLemA&b$;^!wB7#IKWGnF$TVq!!lBlG4 z{?Rjz?P(uvid+|i$VH?`-C&Gcb3{(~Vpg`w+O);Wk1|Mrjxrht0GfRUnZqz2MhrXa zqgVC9nemD5)H$to=~hp)c=l9?#~Z_7i~=U-`FZxb-|TR9@YCxx;Zjo-WpMNOn2)z) zFPGGVl%3N$f`gp$gPnWC+f4(rmts%fidpo^BJx72zAd7|*Xi{2VXmbOm)1`w^tm9% znM=0Fg4bDxH5PxPEm{P3#A(mxqlM7SIARP?|2&+c7qmU8kP&iApzL|F>Dz)Ixp_`O zP%xrP1M6@oYhgo$ZWwrAsYLa4 z|I;DAvJxno9HkQrhLPQk-8}=De{9U3U%)dJ$955?_AOms!9gia%)0E$Mp}$+0er@< zq7J&_SzvShM?e%V?_zUu{niL@gt5UFOjFJUJ}L?$f%eU%jUSoujr{^O=?=^{19`ON zlRIy8Uo_nqcPa6@yyz`CM?pMJ^^SN^Fqtt`GQ8Q#W4kE7`V9^LT}j#pMChl!j#g#J zr-=CCaV%xyFeQ9SK+mG(cTwW*)xa(eK;_Z(jy)woZp~> zA(4}-&VH+TEeLzPTqw&FOoK(ZjD~m{KW05fiGLe@E3Z2`rLukIDahE*`u!ubU)9`o zn^-lyht#E#-dt~S>}4y$-mSbR8{T@}22cn^refuQ08NjLOv?JiEWjyOnzk<^R5%gO zhUH_B{oz~u#IYwVnUg8?3P*#DqD8#X;%q%HY**=I>>-S|!X*-!x1{^l#OnR56O>iD zc;i;KS+t$koh)E3)w0OjWJl_aW2;xF=9D9Kr>)(5}4FqUbk# zI#$N8o0w;IChL49m9CJTzoC!|u{Ljd%ECgBOf$}&jA^$(V#P#~)`&g`H8E{uv52pp zwto`xUL-L&WTAVREEm$0g_gYPL(^vHq(*t1WCH_6alhkeW&GCZ3hL)|{O-jiFOBrF z!EW=Jej|dqQitT6!B-7&io2K)WIm~Q)v@yq%U|VpV+I?{y0@Yd%n8~-NuuM*pM~KA z85YB};IS~M(c<}4Hxx>qRK0cdl&e?t253N%vefkgds>Ubn8X}j6Vpgs>a#nFq$osY z1ZRwLqFv=+BTb=i%D2Wv>_yE0z}+niZ4?rE|*a3d7^kndWGwnFqt+iZ(7+aln<}jzbAQ(#Z2SS}3S$%Bd}^ zc9ghB%O)Z_mTZMRC&H#)I#fiLuIkGa^`4e~9oM5zKPx?zjkC&Xy0~r{;S?FS%c7w< zWbMpzc(xSw?9tGxG~_l}Acq}zjt5ClaB7-!vzqnlrX;}$#+PyQ9oU)_DfePh2E1<7 ztok6g6K^k^DuHR*iJ?jw?bs_whk|bx`dxu^nC6#e{1*m~z1eq7m}Cf$*^Eua(oi_I zAL+3opNhJteu&mWQ@kQWPucmiP)4|nFG`b2tpC;h{-PI@`+h?9v=9mn|0R-n8#t=+Z*FD(c5 zjj79Jxkgck*DV=wpFgRZuwr%}KTm+dx?RT@aUHJdaX-ODh~gByS?WGx&czAkvkg;x zrf92l8$Or_zOwJVwh>5rB`Q5_5}ef6DjS*$x30nZbuO3dijS*wvNEqTY5p1_A0gWr znH<(Qvb!os14|R)n2Ost>jS2;d1zyLHu`Svm|&dZD+PpP{Bh>U&`Md;gRl64q;>{8MJJM$?UNUd`aC>BiLe>*{ zJY15->yW+<3rLgYeTruFDtk1ovU<$(_y7#HgUq>)r0{^}Xbth}V#6?%5jeFYt;SG^ z3qF)=uWRU;Jj)Q}cpY8-H+l_n$2$6{ZR?&*IGr{>ek!69ZH0ZoJ*Ji+ezzlJ^%qL3 zO5a`6gwFw(moEzqxh=yJ9M1FTn!eo&qD#y5AZXErHs%22?A+JmS&GIolml!)rZTnUDM3YgzYfT#;OXn)`PWv3Ta z!-i|-Wojv*k&bC}_JJDjiAK(Ba|YZgUI{f}TdEOFT2+}nPmttytw7j%@bQZDV1vvj z^rp{gRkCDmYJHGrE1~e~AE!-&6B6`7UxVQuvRrfdFkGX8H~SNP_X4EodVd;lXd^>eV1jN+Tt4}Rsn)R0LxBz0c=NXU|pUe!MQQFkGBWbR3&(jLm z%RSLc#p}5_dO{GD=DEFr=Fc% z85CBF>*t!6ugI?soX(*JNxBp+-DdZ4X0LldiK}+WWGvXV(C(Ht|!3$psR=&c*HIM=BmX;pRIpz@Ale{9dhGe(U2|Giv;# zOc|;?p67J=Q(kamB*aus=|XP|m{jN^6@V*Bpm?ye56Njh#vyJqE=DweC;?Rv7faX~ zde03n^I~0B2vUmr;w^X37tVxUK?4}ifsSH5_kpKZIzpYu0;Kv}SBGfI2AKNp+VN#z`nI{UNDRbo-wqa4NEls zICRJpu)??cj^*WcZ^MAv+;bDbh~gpN$1Cor<{Y2oyIDws^JsfW^5AL$azE(T0p&pP z1Mv~6Q44R&RHoH95&OuGx2srIr<@zYJTOMKiVs;Bx3py89I87LOb@%mr`0)#;7_~Z zzcZj8?w=)>%5@HoCHE_&hnu(n_yQ-L(~VjpjjkbT7e)Dk5??fApg(d>vwLRJ-x{um z*Nt?DqTSxh_MIyogY!vf1mU1`Gld-&L)*43f6dilz`Q@HEz;+>MDDYv9u!s;WXeao zUq=TaL$P*IFgJzrGc>j1dDOd zed+=ZBo?w4mr$2)Ya}?vedDopomhW1`#P<%YOJ_j=WwClX0xJH-f@s?^tmzs_j7t!k zK@j^zS0Q|mM4tVP5Ram$VbS6|YDY&y?Q1r1joe9dj08#CM{RSMTU}(RCh`hp_Rkl- zGd|Cv~G@F{DLhCizAm9AN!^{rNs8hu!G@8RpnGx7e`-+K$ffN<0qjR zGq^$dj_Tv!n*?zOSyk5skI7JVKJ)3jysnjIu-@VSzQiP8r6MzudCU=~?v-U8yzo^7 zGf~SUTvEp+S*!X9uX!sq=o}lH;r{pzk~M*VA(uyQ`3C8!{C;)&6)95fv(cK!%Cuz$ z_Zal57H6kPN>25KNiI6z6F)jzEkh#%OqU#-__Xzy)KyH};81#N6OfX$$IXWzOn`Q& z4f$Z1t>)8&8PcYfEwY5UadU1yg+U*(1m2ZlHoC-!2?gB!!fLhmTl))D@dhvkx#+Yj z1O=LV{(T%{^IeCuFK>%QR!VZ4GnO5tK8a+thWE zg4VytZrwcS?7^ zuZfhYnB8dwd%VLO?DK7pV5Wi<(`~DYqOXn8#jUIL^)12*Dbhk4GmL_E2`WX&iT16o zk(t|hok(Y|v-wzn?4x34T)|+SfZP>fiq!><*%vnxGN~ypST-FtC+@TPv*vYv@iU!_ z@2gf|PrgQ?Ktf*9^CnJ(x*CtZVB8!OBfg0%!wL;Z8(tYYre0vcnPGlyCc$V(Ipl*P z_(J!a=o@vp^%Efme!K74(Ke7A>Y}|sxV+JL^aYa{~m%5#$$+R1? zGaQhZTTX!#s#=Xtpegqero$RNt&`4xn3g$)=y*;=N=Qai)}~`xtxI_N*#MMCIq#HFifT zz(-*m;pVH&+4bixL&Bbg)W5FN^bH87pAHp)zPkWNMfTFqS=l~AC$3FX3kQUSh_C?-ZftyClgM)o_D7cX$RGlEYblux0jv5 zTr|i-I3@ZPCGheCl~BGhImF)K4!9@?pC(gi3ozX=a!|r1)LFxy_8c&wY0<^{2cm|P zv6Y`QktY*;I)IUd5y3ne1CqpVanlY45z8hf4&$EUBnucDj16pDa4&GI&TArYhf*xh zdj>*%APH8(h~c>o@l#%T>R$e>rwVx_WUB|~V`p^JHsg*y12lzj&zF}w6W09HwB2yb z%Q~`es&(;7#*DUC_w-Dmt7|$*?TA_m;zB+-u{2;Bg{O}nV7G_@7~<)Bv8fH^G$XG8$(&{A zwXJK5LRK%M34(t$&NI~MHT{UQ9qN-V_yn|%PqC81EIiSzmMM=2zb`mIwiP_b)x+2M z7Gd`83h79j#SItpQ}luuf2uOU`my_rY5T{6P#BNlb%h%<#MZb=m@y5aW;#o1^2Z)SWo+b`y0gV^iRcZtz5!-05vF z7wNo=hc6h4hc&s@uL^jqRvD6thVYtbErDK9k!;+a0xoE0WL7zLixjn5;$fXvT=O3I zT6jI&^A7k6R{&5#lVjz#8%_RiAa2{di{`kx79K+j72$H(!ass|B%@l%KeeKchYLe_ z>!(JC2fxsv>XVen+Y42GeYPxMWqm`6F$(E<6^s|g(slNk!lL*6v^W2>f6hh^mE$s= z3D$)}{V5(Qm&A6bp%2Q}*GZ5Qrf}n7*Hr51?bJOyA-?B4vg6y_EX<*-e20h{=0Mxs zbuQGZ$fLyO5v$nQ&^kuH+mNq9O#MWSfThtH|0q1i!NrWj^S}_P;Q1OkYLW6U^?_7G zx2wg?CULj7))QU(n{$0JE%1t2dWrMi2g-Os{v|8^wK{@qlj%+1b^?NI z$}l2tjp0g>K3O+p%yK<9!XqmQ?E9>z&(|^Pi~aSRwI5x$jaA62GFz9%fmO3t3a>cq zK8Xbv=5Ps~4mKN5+Eqw12(!PEyedFXv~VLxMB~HwT1Vfo51pQ#D8e$e4pFZ{&RC2P z5gTIzl{3!&(tor^BwZfR8j4k{7Rq#`riKXP2O-Bh66#WWK2w=z;iD9GLl+3 zpHIaI4#lQ&S-xBK8PiQ%dwOh?%BO~DCo06pN7<^dnZCN@NzY{_Z1>rrB0U|nC&+!2 z2y!oBcTd2;@lzyk(B=TkyZ)zy0deK05*Q0zk+o$@nun`VI1Er7pjq>8V zNmlW{p7S^Btgb(TA}jL(uR>`0w8gHP^T~Sh5Tkip^spk4SBAhC{TZU}_Z)UJw-}zm zPq{KBm!k)?P{`-(9?LFt&YN4s%SIZ-9lJ!Ws~B%exHOeVFk3~}HewnnH(d)qkLQ_d z6h>O)pEE{vbOVw}E+jdYC^wM+AAhaI(YAibUc@B#_mDss0Ji&BK{WG`4 zOk>vSNq(Bq2IB@s>>Rxm6Wv?h;ZXkpb1l8u|+_qXWdC*jjcPCixq;!%BVPSp#hP zqo`%cNf&YoQXHC$D=D45RiT|5ngPlh?0T~?lUf*O)){K@*Kbh?3RW1j9-T?%lDk@y z4+~?wKI%Y!-=O|_IuKz|=)F;V7ps=5@g)RrE;;tvM$gUhG>jHcw2Hr@fS+k^Zr~>G z^JvPrZc}_&d_kEsqAEMTMJw!!CBw)u&ZVzmq+ZworuaE&TT>$pYsd9|g9O^0orAe8 z221?Va!l1|Y5X1Y?{G7rt1sX#qFA^?RLG^VjoxPf63;AS=_mVDfGJKg73L zsGdnTUD40y(>S##2l|W2Cy!H(@@5KBa(#gs`vlz}Y~$ot5VsqPQ{{YtjYFvIumZzt zA{CcxZLJR|4#{j7k~Tu*jkwz8QA|5G1$Cl895R`Zyp;irp1{KN){kB30O8P1W5;@bG znvX74roeMmQlUi=v9Y%(wl$ZC#9tKNFpvi3!C}f1m6Ct|l2g%psc{TJp)@yu)*e2> z((p0Fg*8gJ!|3WZke9;Z{8}&NRkv7iP=#_y-F}x^y?2m%-D_aj^)f04%mneyjo_;) z6qc_Zu$q37d~X``*eP~Q>I2gg%rrV8v=kDfpp$=%Vj}hF)^dsSWygoN(A$g*E=Do6FX?&(@F#7pbiJ`;c0c@Ul zDqW_90Wm#5f2L<(Lf3)3TeXtI7nhYwRm(F;*r_G6K@OPW4H(Y3O5SjUzBC}u3d|eQ8*8d@?;zUPE+i#QNMn=r(ap?2SH@vo*m z3HJ%XuG_S6;QbWy-l%qU;8x;>z>4pMW7>R}J%QLf%@1BY(4f_1iixd-6GlO7Vp*yU zp{VU^3?s?90i=!#>H`lxT!q8rk>W_$2~kbpz7eV{3wR|8E=8**5?qn8#n`*(bt1xRQrdGxyx2y%B$qmw#>ZV$c7%cO#%JM1lY$Y0q?Yuo> ze9KdJoiM)RH*SB%^;TAdX-zEjA7@%y=!0=Zg%iWK7jVI9b&Dk}0$Af&08KHo+ zOwDhFvA(E|ER%a^cdh@^wLUlmIv6?_3=BvX8jKk92L=Y}7Jf5OGMfh` zBdR1wFCi-i5@`9km{isRb0O%TX+f~)KNaEz{rXQa89`YIF;EN&gN)cigu6mNh>?Cm zAO&Im2flv6D{jwm+y<%WsPe4!89n~KN|7}Cb{Z;XweER73r}Qp2 zz}WP4j}U0&(uD&9yGy6`!+_v-S(yG*iytsTR#x_Rc>=6u^vnRDnf1gP{#2>`ffrAC% zTZ5WQ@hAK;P;>kX{D)mIXe4%a5p=LO1xXH@8T?mz7Q@d)$3pL{{B!2{-v70L*o1AO+|n5beiw~ zk@(>m?T3{2k2c;NWc^`4@P&Z?BjxXJ@;x1qhn)9Mn*IFdt_J-dIqx5#d`NfyfX~m( zIS~5)MfZ2Uy?_4W`47i}u0ZgPh<{D|w_d#;D}Q&U$Q-G}xM1A@1f{#%A$jh6Qp&0hQ<0bPOM z-{1Wm&p%%#eb_?x7i;bol EfAhh=DF6Tf literal 0 HcmV?d00001 diff --git a/spring-boot/.mvn/wrapper/maven-wrapper.properties b/spring-boot/.mvn/wrapper/maven-wrapper.properties new file mode 100644 index 00000000..abd303b6 --- /dev/null +++ b/spring-boot/.mvn/wrapper/maven-wrapper.properties @@ -0,0 +1,2 @@ +distributionUrl=https://repo.maven.apache.org/maven2/org/apache/maven/apache-maven/3.8.2/apache-maven-3.8.2-bin.zip +wrapperUrl=https://repo.maven.apache.org/maven2/io/takari/maven-wrapper/0.5.6/maven-wrapper-0.5.6.jar diff --git a/spring-boot/mvnw b/spring-boot/mvnw new file mode 100644 index 00000000..a16b5431 --- /dev/null +++ b/spring-boot/mvnw @@ -0,0 +1,310 @@ +#!/bin/sh +# ---------------------------------------------------------------------------- +# Licensed to the Apache Software Foundation (ASF) under one +# or more contributor license agreements. See the NOTICE file +# distributed with this work for additional information +# regarding copyright ownership. The ASF licenses this file +# to you under the Apache License, Version 2.0 (the +# "License"); you may not use this file except in compliance +# with the License. You may obtain a copy of the License at +# +# https://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, +# software distributed under the License is distributed on an +# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +# KIND, either express or implied. See the License for the +# specific language governing permissions and limitations +# under the License. +# ---------------------------------------------------------------------------- + +# ---------------------------------------------------------------------------- +# Maven Start Up Batch script +# +# Required ENV vars: +# ------------------ +# JAVA_HOME - location of a JDK home dir +# +# Optional ENV vars +# ----------------- +# M2_HOME - location of maven2's installed home dir +# MAVEN_OPTS - parameters passed to the Java VM when running Maven +# e.g. to debug Maven itself, use +# set MAVEN_OPTS=-Xdebug -Xrunjdwp:transport=dt_socket,server=y,suspend=y,address=8000 +# MAVEN_SKIP_RC - flag to disable loading of mavenrc files +# ---------------------------------------------------------------------------- + +if [ -z "$MAVEN_SKIP_RC" ] ; then + + if [ -f /etc/mavenrc ] ; then + . /etc/mavenrc + fi + + if [ -f "$HOME/.mavenrc" ] ; then + . "$HOME/.mavenrc" + fi + +fi + +# OS specific support. $var _must_ be set to either true or false. +cygwin=false; +darwin=false; +mingw=false +case "`uname`" in + CYGWIN*) cygwin=true ;; + MINGW*) mingw=true;; + Darwin*) darwin=true + # Use /usr/libexec/java_home if available, otherwise fall back to /Library/Java/Home + # See https://developer.apple.com/library/mac/qa/qa1170/_index.html + if [ -z "$JAVA_HOME" ]; then + if [ -x "/usr/libexec/java_home" ]; then + export JAVA_HOME="`/usr/libexec/java_home`" + else + export JAVA_HOME="/Library/Java/Home" + fi + fi + ;; +esac + +if [ -z "$JAVA_HOME" ] ; then + if [ -r /etc/gentoo-release ] ; then + JAVA_HOME=`java-config --jre-home` + fi +fi + +if [ -z "$M2_HOME" ] ; then + ## resolve links - $0 may be a link to maven's home + PRG="$0" + + # need this for relative symlinks + while [ -h "$PRG" ] ; do + ls=`ls -ld "$PRG"` + link=`expr "$ls" : '.*-> \(.*\)$'` + if expr "$link" : '/.*' > /dev/null; then + PRG="$link" + else + PRG="`dirname "$PRG"`/$link" + fi + done + + saveddir=`pwd` + + M2_HOME=`dirname "$PRG"`/.. + + # make it fully qualified + M2_HOME=`cd "$M2_HOME" && pwd` + + cd "$saveddir" + # echo Using m2 at $M2_HOME +fi + +# For Cygwin, ensure paths are in UNIX format before anything is touched +if $cygwin ; then + [ -n "$M2_HOME" ] && + M2_HOME=`cygpath --unix "$M2_HOME"` + [ -n "$JAVA_HOME" ] && + JAVA_HOME=`cygpath --unix "$JAVA_HOME"` + [ -n "$CLASSPATH" ] && + CLASSPATH=`cygpath --path --unix "$CLASSPATH"` +fi + +# For Mingw, ensure paths are in UNIX format before anything is touched +if $mingw ; then + [ -n "$M2_HOME" ] && + M2_HOME="`(cd "$M2_HOME"; pwd)`" + [ -n "$JAVA_HOME" ] && + JAVA_HOME="`(cd "$JAVA_HOME"; pwd)`" +fi + +if [ -z "$JAVA_HOME" ]; then + javaExecutable="`which javac`" + if [ -n "$javaExecutable" ] && ! [ "`expr \"$javaExecutable\" : '\([^ ]*\)'`" = "no" ]; then + # readlink(1) is not available as standard on Solaris 10. + readLink=`which readlink` + if [ ! `expr "$readLink" : '\([^ ]*\)'` = "no" ]; then + if $darwin ; then + javaHome="`dirname \"$javaExecutable\"`" + javaExecutable="`cd \"$javaHome\" && pwd -P`/javac" + else + javaExecutable="`readlink -f \"$javaExecutable\"`" + fi + javaHome="`dirname \"$javaExecutable\"`" + javaHome=`expr "$javaHome" : '\(.*\)/bin'` + JAVA_HOME="$javaHome" + export JAVA_HOME + fi + fi +fi + +if [ -z "$JAVACMD" ] ; then + if [ -n "$JAVA_HOME" ] ; then + if [ -x "$JAVA_HOME/jre/sh/java" ] ; then + # IBM's JDK on AIX uses strange locations for the executables + JAVACMD="$JAVA_HOME/jre/sh/java" + else + JAVACMD="$JAVA_HOME/bin/java" + fi + else + JAVACMD="`which java`" + fi +fi + +if [ ! -x "$JAVACMD" ] ; then + echo "Error: JAVA_HOME is not defined correctly." >&2 + echo " We cannot execute $JAVACMD" >&2 + exit 1 +fi + +if [ -z "$JAVA_HOME" ] ; then + echo "Warning: JAVA_HOME environment variable is not set." +fi + +CLASSWORLDS_LAUNCHER=org.codehaus.plexus.classworlds.launcher.Launcher + +# traverses directory structure from process work directory to filesystem root +# first directory with .mvn subdirectory is considered project base directory +find_maven_basedir() { + + if [ -z "$1" ] + then + echo "Path not specified to find_maven_basedir" + return 1 + fi + + basedir="$1" + wdir="$1" + while [ "$wdir" != '/' ] ; do + if [ -d "$wdir"/.mvn ] ; then + basedir=$wdir + break + fi + # workaround for JBEAP-8937 (on Solaris 10/Sparc) + if [ -d "${wdir}" ]; then + wdir=`cd "$wdir/.."; pwd` + fi + # end of workaround + done + echo "${basedir}" +} + +# concatenates all lines of a file +concat_lines() { + if [ -f "$1" ]; then + echo "$(tr -s '\n' ' ' < "$1")" + fi +} + +BASE_DIR=`find_maven_basedir "$(pwd)"` +if [ -z "$BASE_DIR" ]; then + exit 1; +fi + +########################################################################################## +# Extension to allow automatically downloading the maven-wrapper.jar from Maven-central +# This allows using the maven wrapper in projects that prohibit checking in binary data. +########################################################################################## +if [ -r "$BASE_DIR/.mvn/wrapper/maven-wrapper.jar" ]; then + if [ "$MVNW_VERBOSE" = true ]; then + echo "Found .mvn/wrapper/maven-wrapper.jar" + fi +else + if [ "$MVNW_VERBOSE" = true ]; then + echo "Couldn't find .mvn/wrapper/maven-wrapper.jar, downloading it ..." + fi + if [ -n "$MVNW_REPOURL" ]; then + jarUrl="$MVNW_REPOURL/io/takari/maven-wrapper/0.5.6/maven-wrapper-0.5.6.jar" + else + jarUrl="https://repo.maven.apache.org/maven2/io/takari/maven-wrapper/0.5.6/maven-wrapper-0.5.6.jar" + fi + while IFS="=" read key value; do + case "$key" in (wrapperUrl) jarUrl="$value"; break ;; + esac + done < "$BASE_DIR/.mvn/wrapper/maven-wrapper.properties" + if [ "$MVNW_VERBOSE" = true ]; then + echo "Downloading from: $jarUrl" + fi + wrapperJarPath="$BASE_DIR/.mvn/wrapper/maven-wrapper.jar" + if $cygwin; then + wrapperJarPath=`cygpath --path --windows "$wrapperJarPath"` + fi + + if command -v wget > /dev/null; then + if [ "$MVNW_VERBOSE" = true ]; then + echo "Found wget ... using wget" + fi + if [ -z "$MVNW_USERNAME" ] || [ -z "$MVNW_PASSWORD" ]; then + wget "$jarUrl" -O "$wrapperJarPath" + else + wget --http-user=$MVNW_USERNAME --http-password=$MVNW_PASSWORD "$jarUrl" -O "$wrapperJarPath" + fi + elif command -v curl > /dev/null; then + if [ "$MVNW_VERBOSE" = true ]; then + echo "Found curl ... using curl" + fi + if [ -z "$MVNW_USERNAME" ] || [ -z "$MVNW_PASSWORD" ]; then + curl -o "$wrapperJarPath" "$jarUrl" -f + else + curl --user $MVNW_USERNAME:$MVNW_PASSWORD -o "$wrapperJarPath" "$jarUrl" -f + fi + + else + if [ "$MVNW_VERBOSE" = true ]; then + echo "Falling back to using Java to download" + fi + javaClass="$BASE_DIR/.mvn/wrapper/MavenWrapperDownloader.java" + # For Cygwin, switch paths to Windows format before running javac + if $cygwin; then + javaClass=`cygpath --path --windows "$javaClass"` + fi + if [ -e "$javaClass" ]; then + if [ ! -e "$BASE_DIR/.mvn/wrapper/MavenWrapperDownloader.class" ]; then + if [ "$MVNW_VERBOSE" = true ]; then + echo " - Compiling MavenWrapperDownloader.java ..." + fi + # Compiling the Java class + ("$JAVA_HOME/bin/javac" "$javaClass") + fi + if [ -e "$BASE_DIR/.mvn/wrapper/MavenWrapperDownloader.class" ]; then + # Running the downloader + if [ "$MVNW_VERBOSE" = true ]; then + echo " - Running MavenWrapperDownloader.java ..." + fi + ("$JAVA_HOME/bin/java" -cp .mvn/wrapper MavenWrapperDownloader "$MAVEN_PROJECTBASEDIR") + fi + fi + fi +fi +########################################################################################## +# End of extension +########################################################################################## + +export MAVEN_PROJECTBASEDIR=${MAVEN_BASEDIR:-"$BASE_DIR"} +if [ "$MVNW_VERBOSE" = true ]; then + echo $MAVEN_PROJECTBASEDIR +fi +MAVEN_OPTS="$(concat_lines "$MAVEN_PROJECTBASEDIR/.mvn/jvm.config") $MAVEN_OPTS" + +# For Cygwin, switch paths to Windows format before running java +if $cygwin; then + [ -n "$M2_HOME" ] && + M2_HOME=`cygpath --path --windows "$M2_HOME"` + [ -n "$JAVA_HOME" ] && + JAVA_HOME=`cygpath --path --windows "$JAVA_HOME"` + [ -n "$CLASSPATH" ] && + CLASSPATH=`cygpath --path --windows "$CLASSPATH"` + [ -n "$MAVEN_PROJECTBASEDIR" ] && + MAVEN_PROJECTBASEDIR=`cygpath --path --windows "$MAVEN_PROJECTBASEDIR"` +fi + +# Provide a "standardized" way to retrieve the CLI args that will +# work with both Windows and non-Windows executions. +MAVEN_CMD_LINE_ARGS="$MAVEN_CONFIG $@" +export MAVEN_CMD_LINE_ARGS + +WRAPPER_LAUNCHER=org.apache.maven.wrapper.MavenWrapperMain + +exec "$JAVACMD" \ + $MAVEN_OPTS \ + -classpath "$MAVEN_PROJECTBASEDIR/.mvn/wrapper/maven-wrapper.jar" \ + "-Dmaven.home=${M2_HOME}" "-Dmaven.multiModuleProjectDirectory=${MAVEN_PROJECTBASEDIR}" \ + ${WRAPPER_LAUNCHER} $MAVEN_CONFIG "$@" diff --git a/spring-boot/mvnw.cmd b/spring-boot/mvnw.cmd new file mode 100644 index 00000000..c8d43372 --- /dev/null +++ b/spring-boot/mvnw.cmd @@ -0,0 +1,182 @@ +@REM ---------------------------------------------------------------------------- +@REM Licensed to the Apache Software Foundation (ASF) under one +@REM or more contributor license agreements. See the NOTICE file +@REM distributed with this work for additional information +@REM regarding copyright ownership. The ASF licenses this file +@REM to you under the Apache License, Version 2.0 (the +@REM "License"); you may not use this file except in compliance +@REM with the License. You may obtain a copy of the License at +@REM +@REM https://www.apache.org/licenses/LICENSE-2.0 +@REM +@REM Unless required by applicable law or agreed to in writing, +@REM software distributed under the License is distributed on an +@REM "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY +@REM KIND, either express or implied. See the License for the +@REM specific language governing permissions and limitations +@REM under the License. +@REM ---------------------------------------------------------------------------- + +@REM ---------------------------------------------------------------------------- +@REM Maven Start Up Batch script +@REM +@REM Required ENV vars: +@REM JAVA_HOME - location of a JDK home dir +@REM +@REM Optional ENV vars +@REM M2_HOME - location of maven2's installed home dir +@REM MAVEN_BATCH_ECHO - set to 'on' to enable the echoing of the batch commands +@REM MAVEN_BATCH_PAUSE - set to 'on' to wait for a keystroke before ending +@REM MAVEN_OPTS - parameters passed to the Java VM when running Maven +@REM e.g. to debug Maven itself, use +@REM set MAVEN_OPTS=-Xdebug -Xrunjdwp:transport=dt_socket,server=y,suspend=y,address=8000 +@REM MAVEN_SKIP_RC - flag to disable loading of mavenrc files +@REM ---------------------------------------------------------------------------- + +@REM Begin all REM lines with '@' in case MAVEN_BATCH_ECHO is 'on' +@echo off +@REM set title of command window +title %0 +@REM enable echoing by setting MAVEN_BATCH_ECHO to 'on' +@if "%MAVEN_BATCH_ECHO%" == "on" echo %MAVEN_BATCH_ECHO% + +@REM set %HOME% to equivalent of $HOME +if "%HOME%" == "" (set "HOME=%HOMEDRIVE%%HOMEPATH%") + +@REM Execute a user defined script before this one +if not "%MAVEN_SKIP_RC%" == "" goto skipRcPre +@REM check for pre script, once with legacy .bat ending and once with .cmd ending +if exist "%HOME%\mavenrc_pre.bat" call "%HOME%\mavenrc_pre.bat" +if exist "%HOME%\mavenrc_pre.cmd" call "%HOME%\mavenrc_pre.cmd" +:skipRcPre + +@setlocal + +set ERROR_CODE=0 + +@REM To isolate internal variables from possible post scripts, we use another setlocal +@setlocal + +@REM ==== START VALIDATION ==== +if not "%JAVA_HOME%" == "" goto OkJHome + +echo. +echo Error: JAVA_HOME not found in your environment. >&2 +echo Please set the JAVA_HOME variable in your environment to match the >&2 +echo location of your Java installation. >&2 +echo. +goto error + +:OkJHome +if exist "%JAVA_HOME%\bin\java.exe" goto init + +echo. +echo Error: JAVA_HOME is set to an invalid directory. >&2 +echo JAVA_HOME = "%JAVA_HOME%" >&2 +echo Please set the JAVA_HOME variable in your environment to match the >&2 +echo location of your Java installation. >&2 +echo. +goto error + +@REM ==== END VALIDATION ==== + +:init + +@REM Find the project base dir, i.e. the directory that contains the folder ".mvn". +@REM Fallback to current working directory if not found. + +set MAVEN_PROJECTBASEDIR=%MAVEN_BASEDIR% +IF NOT "%MAVEN_PROJECTBASEDIR%"=="" goto endDetectBaseDir + +set EXEC_DIR=%CD% +set WDIR=%EXEC_DIR% +:findBaseDir +IF EXIST "%WDIR%"\.mvn goto baseDirFound +cd .. +IF "%WDIR%"=="%CD%" goto baseDirNotFound +set WDIR=%CD% +goto findBaseDir + +:baseDirFound +set MAVEN_PROJECTBASEDIR=%WDIR% +cd "%EXEC_DIR%" +goto endDetectBaseDir + +:baseDirNotFound +set MAVEN_PROJECTBASEDIR=%EXEC_DIR% +cd "%EXEC_DIR%" + +:endDetectBaseDir + +IF NOT EXIST "%MAVEN_PROJECTBASEDIR%\.mvn\jvm.config" goto endReadAdditionalConfig + +@setlocal EnableExtensions EnableDelayedExpansion +for /F "usebackq delims=" %%a in ("%MAVEN_PROJECTBASEDIR%\.mvn\jvm.config") do set JVM_CONFIG_MAVEN_PROPS=!JVM_CONFIG_MAVEN_PROPS! %%a +@endlocal & set JVM_CONFIG_MAVEN_PROPS=%JVM_CONFIG_MAVEN_PROPS% + +:endReadAdditionalConfig + +SET MAVEN_JAVA_EXE="%JAVA_HOME%\bin\java.exe" +set WRAPPER_JAR="%MAVEN_PROJECTBASEDIR%\.mvn\wrapper\maven-wrapper.jar" +set WRAPPER_LAUNCHER=org.apache.maven.wrapper.MavenWrapperMain + +set DOWNLOAD_URL="https://repo.maven.apache.org/maven2/io/takari/maven-wrapper/0.5.6/maven-wrapper-0.5.6.jar" + +FOR /F "tokens=1,2 delims==" %%A IN ("%MAVEN_PROJECTBASEDIR%\.mvn\wrapper\maven-wrapper.properties") DO ( + IF "%%A"=="wrapperUrl" SET DOWNLOAD_URL=%%B +) + +@REM Extension to allow automatically downloading the maven-wrapper.jar from Maven-central +@REM This allows using the maven wrapper in projects that prohibit checking in binary data. +if exist %WRAPPER_JAR% ( + if "%MVNW_VERBOSE%" == "true" ( + echo Found %WRAPPER_JAR% + ) +) else ( + if not "%MVNW_REPOURL%" == "" ( + SET DOWNLOAD_URL="%MVNW_REPOURL%/io/takari/maven-wrapper/0.5.6/maven-wrapper-0.5.6.jar" + ) + if "%MVNW_VERBOSE%" == "true" ( + echo Couldn't find %WRAPPER_JAR%, downloading it ... + echo Downloading from: %DOWNLOAD_URL% + ) + + powershell -Command "&{"^ + "$webclient = new-object System.Net.WebClient;"^ + "if (-not ([string]::IsNullOrEmpty('%MVNW_USERNAME%') -and [string]::IsNullOrEmpty('%MVNW_PASSWORD%'))) {"^ + "$webclient.Credentials = new-object System.Net.NetworkCredential('%MVNW_USERNAME%', '%MVNW_PASSWORD%');"^ + "}"^ + "[Net.ServicePointManager]::SecurityProtocol = [Net.SecurityProtocolType]::Tls12; $webclient.DownloadFile('%DOWNLOAD_URL%', '%WRAPPER_JAR%')"^ + "}" + if "%MVNW_VERBOSE%" == "true" ( + echo Finished downloading %WRAPPER_JAR% + ) +) +@REM End of extension + +@REM Provide a "standardized" way to retrieve the CLI args that will +@REM work with both Windows and non-Windows executions. +set MAVEN_CMD_LINE_ARGS=%* + +%MAVEN_JAVA_EXE% %JVM_CONFIG_MAVEN_PROPS% %MAVEN_OPTS% %MAVEN_DEBUG_OPTS% -classpath %WRAPPER_JAR% "-Dmaven.multiModuleProjectDirectory=%MAVEN_PROJECTBASEDIR%" %WRAPPER_LAUNCHER% %MAVEN_CONFIG% %* +if ERRORLEVEL 1 goto error +goto end + +:error +set ERROR_CODE=1 + +:end +@endlocal & set ERROR_CODE=%ERROR_CODE% + +if not "%MAVEN_SKIP_RC%" == "" goto skipRcPost +@REM check for post script, once with legacy .bat ending and once with .cmd ending +if exist "%HOME%\mavenrc_post.bat" call "%HOME%\mavenrc_post.bat" +if exist "%HOME%\mavenrc_post.cmd" call "%HOME%\mavenrc_post.cmd" +:skipRcPost + +@REM pause the script if MAVEN_BATCH_PAUSE is set to 'on' +if "%MAVEN_BATCH_PAUSE%" == "on" pause + +if "%MAVEN_TERMINATE_CMD%" == "on" exit %ERROR_CODE% + +exit /B %ERROR_CODE% diff --git a/spring-boot/pom.xml b/spring-boot/pom.xml index 745154b1..88a00b2c 100644 --- a/spring-boot/pom.xml +++ b/spring-boot/pom.xml @@ -8,6 +8,7 @@ ruoyi 3.4.0 + ruoyi http://www.ruoyi.vip 若依管理系统 @@ -193,7 +194,12 @@ ruoyi-common ${ruoyi.version} - + + + com.zaxxer + HikariCP + 3.2.0 + @@ -204,6 +210,7 @@ ruoyi-quartz ruoyi-generator ruoyi-common + xiaoyi-mpgb pom diff --git a/spring-boot/ruoyi-admin/pom.xml b/spring-boot/ruoyi-admin/pom.xml index ed8d8da6..bde32892 100644 --- a/spring-boot/ruoyi-admin/pom.xml +++ b/spring-boot/ruoyi-admin/pom.xml @@ -50,7 +50,7 @@ springfox-swagger-ui - + mysql mysql-connector-java @@ -73,6 +73,17 @@ com.ruoyi ruoyi-generator + + com.zaxxer + HikariCP + 4.0.3 + + + com.zaxxer + HikariCP + 4.0.3 + + @@ -93,15 +104,15 @@ - - org.apache.maven.plugins - maven-war-plugin - 3.1.0 + + org.apache.maven.plugins + maven-war-plugin + 3.1.0 false ${project.artifactId} - - + + ${project.artifactId} diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiApplication.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiApplication.java index 32eb6f1d..8498b9fa 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiApplication.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiApplication.java @@ -6,14 +6,12 @@ import org.springframework.boot.autoconfigure.jdbc.DataSourceAutoConfiguration; /** * 启动程序 - * + * * @author ruoyi */ -@SpringBootApplication(exclude = { DataSourceAutoConfiguration.class }) -public class RuoYiApplication -{ - public static void main(String[] args) - { +@SpringBootApplication(exclude = {DataSourceAutoConfiguration.class}) +public class RuoYiApplication { + public static void main(String[] args) { // System.setProperty("spring.devtools.restart.enabled", "false"); SpringApplication.run(RuoYiApplication.class, args); System.out.println("(♥◠‿◠)ﾉﾞ 若依启动成功 ლ(´ڡ`ლ)ﾞ \n" + diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiServletInitializer.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiServletInitializer.java index 6de67dc7..70cb1b36 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiServletInitializer.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/RuoYiServletInitializer.java @@ -5,14 +5,12 @@ import org.springframework.boot.web.servlet.support.SpringBootServletInitializer /** * web容器中进行部署 - * + * * @author ruoyi */ -public class RuoYiServletInitializer extends SpringBootServletInitializer -{ +public class RuoYiServletInitializer extends SpringBootServletInitializer { @Override - protected SpringApplicationBuilder configure(SpringApplicationBuilder application) - { + protected SpringApplicationBuilder configure(SpringApplicationBuilder application) { return application.sources(RuoYiApplication.class); } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CaptchaController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CaptchaController.java index 8cafcef1..c45e9daa 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CaptchaController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CaptchaController.java @@ -6,6 +6,7 @@ import java.util.concurrent.TimeUnit; import javax.annotation.Resource; import javax.imageio.ImageIO; import javax.servlet.http.HttpServletResponse; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.beans.factory.annotation.Value; import org.springframework.util.FastByteArrayOutputStream; @@ -20,12 +21,11 @@ import com.ruoyi.common.utils.uuid.IdUtils; /** * 验证码操作处理 - * + * * @author ruoyi */ @RestController -public class CaptchaController -{ +public class CaptchaController { @Resource(name = "captchaProducer") private Producer captchaProducer; @@ -34,7 +34,7 @@ public class CaptchaController @Autowired private RedisCache redisCache; - + // 验证码类型 @Value("${ruoyi.captchaType}") private String captchaType; @@ -43,8 +43,7 @@ public class CaptchaController * 生成验证码 */ @GetMapping("/captchaImage") - public AjaxResult getCode(HttpServletResponse response) throws IOException - { + public AjaxResult getCode(HttpServletResponse response) throws IOException { // 保存验证码信息 String uuid = IdUtils.simpleUUID(); String verifyKey = Constants.CAPTCHA_CODE_KEY + uuid; @@ -53,15 +52,12 @@ public class CaptchaController BufferedImage image = null; // 生成验证码 - if ("math".equals(captchaType)) - { + if ("math".equals(captchaType)) { String capText = captchaProducerMath.createText(); capStr = capText.substring(0, capText.lastIndexOf("@")); code = capText.substring(capText.lastIndexOf("@") + 1); image = captchaProducerMath.createImage(capStr); - } - else if ("char".equals(captchaType)) - { + } else if ("char".equals(captchaType)) { capStr = code = captchaProducer.createText(); image = captchaProducer.createImage(capStr); } @@ -69,12 +65,9 @@ public class CaptchaController redisCache.setCacheObject(verifyKey, code, Constants.CAPTCHA_EXPIRATION, TimeUnit.MINUTES); // 转换流信息写出 FastByteArrayOutputStream os = new FastByteArrayOutputStream(); - try - { + try { ImageIO.write(image, "jpg", os); - } - catch (IOException e) - { + } catch (IOException e) { return AjaxResult.error(e.getMessage()); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CommonController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CommonController.java index e0c728fa..a6188d6b 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CommonController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/common/CommonController.java @@ -2,6 +2,7 @@ package com.ruoyi.web.controller.common; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.beans.factory.annotation.Autowired; @@ -20,12 +21,11 @@ import com.ruoyi.framework.config.ServerConfig; /** * 通用请求处理 - * + * * @author ruoyi */ @RestController -public class CommonController -{ +public class CommonController { private static final Logger log = LoggerFactory.getLogger(CommonController.class); @Autowired @@ -33,17 +33,14 @@ public class CommonController /** * 通用下载请求 - * + * * @param fileName 文件名称 - * @param delete 是否删除 + * @param delete 是否删除 */ @GetMapping("common/download") - public void fileDownload(String fileName, Boolean delete, HttpServletResponse response, HttpServletRequest request) - { - try - { - if (!FileUtils.checkAllowDownload(fileName)) - { + public void fileDownload(String fileName, Boolean delete, HttpServletResponse response, HttpServletRequest request) { + try { + if (!FileUtils.checkAllowDownload(fileName)) { throw new Exception(StringUtils.format("文件名称({})非法，不允许下载。 ", fileName)); } String realFileName = System.currentTimeMillis() + fileName.substring(fileName.indexOf("_") + 1); @@ -52,13 +49,10 @@ public class CommonController response.setContentType(MediaType.APPLICATION_OCTET_STREAM_VALUE); FileUtils.setAttachmentResponseHeader(response, realFileName); FileUtils.writeBytes(filePath, response.getOutputStream()); - if (delete) - { + if (delete) { FileUtils.deleteFile(filePath); } - } - catch (Exception e) - { + } catch (Exception e) { log.error("下载文件失败", e); } } @@ -67,10 +61,8 @@ public class CommonController * 通用上传请求 */ @PostMapping("/common/upload") - public AjaxResult uploadFile(MultipartFile file) throws Exception - { - try - { + public AjaxResult uploadFile(MultipartFile file) throws Exception { + try { // 上传文件路径 String filePath = RuoYiConfig.getUploadPath(); // 上传并返回新文件名称 @@ -80,9 +72,7 @@ public class CommonController ajax.put("fileName", fileName); ajax.put("url", url); return ajax; - } - catch (Exception e) - { + } catch (Exception e) { return AjaxResult.error(e.getMessage()); } } @@ -92,12 +82,9 @@ public class CommonController */ @GetMapping("/common/download/resource") public void resourceDownload(String resource, HttpServletRequest request, HttpServletResponse response) - throws Exception - { - try - { - if (!FileUtils.checkAllowDownload(resource)) - { + throws Exception { + try { + if (!FileUtils.checkAllowDownload(resource)) { throw new Exception(StringUtils.format("资源文件({})非法，不允许下载。 ", resource)); } // 本地资源路径 @@ -109,9 +96,7 @@ public class CommonController response.setContentType(MediaType.APPLICATION_OCTET_STREAM_VALUE); FileUtils.setAttachmentResponseHeader(response, downloadName); FileUtils.writeBytes(downloadPath, response.getOutputStream()); - } - catch (Exception e) - { + } catch (Exception e) { log.error("下载文件失败", e); } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/CacheController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/CacheController.java index 7b97de24..6add5519 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/CacheController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/CacheController.java @@ -5,6 +5,7 @@ import java.util.HashMap; import java.util.List; import java.util.Map; import java.util.Properties; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.data.redis.core.RedisCallback; import org.springframework.data.redis.core.RedisTemplate; @@ -17,20 +18,18 @@ import com.ruoyi.common.utils.StringUtils; /** * 缓存监控 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/cache") -public class CacheController -{ +public class CacheController { @Autowired private RedisTemplate redisTemplate; @PreAuthorize("@ss.hasPermi('monitor:cache:list')") @GetMapping() - public AjaxResult getInfo() throws Exception - { + public AjaxResult getInfo() throws Exception { Properties info = (Properties) redisTemplate.execute((RedisCallback) connection -> connection.info()); Properties commandStats = (Properties) redisTemplate.execute((RedisCallback) connection -> connection.info("commandstats")); Object dbSize = redisTemplate.execute((RedisCallback) connection -> connection.dbSize()); diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/ServerController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/ServerController.java index cc805ad8..63da0b83 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/ServerController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/ServerController.java @@ -9,17 +9,15 @@ import com.ruoyi.framework.web.domain.Server; /** * 服务器监控 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/server") -public class ServerController -{ +public class ServerController { @PreAuthorize("@ss.hasPermi('monitor:server:list')") @GetMapping() - public AjaxResult getInfo() throws Exception - { + public AjaxResult getInfo() throws Exception { Server server = new Server(); server.copyTo(); return AjaxResult.success(server); diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysLogininforController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysLogininforController.java index 339f2428..9db3e65c 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysLogininforController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysLogininforController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.monitor; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.web.bind.annotation.DeleteMapping; @@ -19,20 +20,18 @@ import com.ruoyi.system.service.ISysLogininforService; /** * 系统访问记录 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/logininfor") -public class SysLogininforController extends BaseController -{ +public class SysLogininforController extends BaseController { @Autowired private ISysLogininforService logininforService; @PreAuthorize("@ss.hasPermi('monitor:logininfor:list')") @GetMapping("/list") - public TableDataInfo list(SysLogininfor logininfor) - { + public TableDataInfo list(SysLogininfor logininfor) { startPage(); List list = logininforService.selectLogininforList(logininfor); return getDataTable(list); @@ -41,8 +40,7 @@ public class SysLogininforController extends BaseController @Log(title = "登录日志", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('monitor:logininfor:export')") @GetMapping("/export") - public AjaxResult export(SysLogininfor logininfor) - { + public AjaxResult export(SysLogininfor logininfor) { List list = logininforService.selectLogininforList(logininfor); ExcelUtil util = new ExcelUtil(SysLogininfor.class); return util.exportExcel(list, "登录日志"); @@ -51,16 +49,14 @@ public class SysLogininforController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:logininfor:remove')") @Log(title = "登录日志", businessType = BusinessType.DELETE) @DeleteMapping("/{infoIds}") - public AjaxResult remove(@PathVariable Long[] infoIds) - { + public AjaxResult remove(@PathVariable Long[] infoIds) { return toAjax(logininforService.deleteLogininforByIds(infoIds)); } @PreAuthorize("@ss.hasPermi('monitor:logininfor:remove')") @Log(title = "登录日志", businessType = BusinessType.CLEAN) @DeleteMapping("/clean") - public AjaxResult clean() - { + public AjaxResult clean() { logininforService.cleanLogininfor(); return AjaxResult.success(); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysOperlogController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysOperlogController.java index 0332a14a..d9ed0d6b 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysOperlogController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysOperlogController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.monitor; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.web.bind.annotation.DeleteMapping; @@ -19,20 +20,18 @@ import com.ruoyi.system.service.ISysOperLogService; /** * 操作日志记录 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/operlog") -public class SysOperlogController extends BaseController -{ +public class SysOperlogController extends BaseController { @Autowired private ISysOperLogService operLogService; @PreAuthorize("@ss.hasPermi('monitor:operlog:list')") @GetMapping("/list") - public TableDataInfo list(SysOperLog operLog) - { + public TableDataInfo list(SysOperLog operLog) { startPage(); List list = operLogService.selectOperLogList(operLog); return getDataTable(list); @@ -41,8 +40,7 @@ public class SysOperlogController extends BaseController @Log(title = "操作日志", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('monitor:operlog:export')") @GetMapping("/export") - public AjaxResult export(SysOperLog operLog) - { + public AjaxResult export(SysOperLog operLog) { List list = operLogService.selectOperLogList(operLog); ExcelUtil util = new ExcelUtil(SysOperLog.class); return util.exportExcel(list, "操作日志"); @@ -50,16 +48,14 @@ public class SysOperlogController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:operlog:remove')") @DeleteMapping("/{operIds}") - public AjaxResult remove(@PathVariable Long[] operIds) - { + public AjaxResult remove(@PathVariable Long[] operIds) { return toAjax(operLogService.deleteOperLogByIds(operIds)); } @Log(title = "操作日志", businessType = BusinessType.CLEAN) @PreAuthorize("@ss.hasPermi('monitor:operlog:remove')") @DeleteMapping("/clean") - public AjaxResult clean() - { + public AjaxResult clean() { operLogService.cleanOperLog(); return AjaxResult.success(); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysUserOnlineController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysUserOnlineController.java index 9b157ea7..6bab7a1e 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysUserOnlineController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/monitor/SysUserOnlineController.java @@ -4,6 +4,7 @@ import java.util.ArrayList; import java.util.Collection; import java.util.Collections; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.web.bind.annotation.DeleteMapping; @@ -25,13 +26,12 @@ import com.ruoyi.system.service.ISysUserOnlineService; /** * 在线用户监控 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/online") -public class SysUserOnlineController extends BaseController -{ +public class SysUserOnlineController extends BaseController { @Autowired private ISysUserOnlineService userOnlineService; @@ -40,36 +40,24 @@ public class SysUserOnlineController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:online:list')") @GetMapping("/list") - public TableDataInfo list(String ipaddr, String userName) - { + public TableDataInfo list(String ipaddr, String userName) { Collection keys = redisCache.keys(Constants.LOGIN_TOKEN_KEY + "*"); List userOnlineList = new ArrayList(); - for (String key : keys) - { + for (String key : keys) { LoginUser user = redisCache.getCacheObject(key); - if (StringUtils.isNotEmpty(ipaddr) && StringUtils.isNotEmpty(userName)) - { - if (StringUtils.equals(ipaddr, user.getIpaddr()) && StringUtils.equals(userName, user.getUsername())) - { + if (StringUtils.isNotEmpty(ipaddr) && StringUtils.isNotEmpty(userName)) { + if (StringUtils.equals(ipaddr, user.getIpaddr()) && StringUtils.equals(userName, user.getUsername())) { userOnlineList.add(userOnlineService.selectOnlineByInfo(ipaddr, userName, user)); } - } - else if (StringUtils.isNotEmpty(ipaddr)) - { - if (StringUtils.equals(ipaddr, user.getIpaddr())) - { + } else if (StringUtils.isNotEmpty(ipaddr)) { + if (StringUtils.equals(ipaddr, user.getIpaddr())) { userOnlineList.add(userOnlineService.selectOnlineByIpaddr(ipaddr, user)); } - } - else if (StringUtils.isNotEmpty(userName) && StringUtils.isNotNull(user.getUser())) - { - if (StringUtils.equals(userName, user.getUsername())) - { + } else if (StringUtils.isNotEmpty(userName) && StringUtils.isNotNull(user.getUser())) { + if (StringUtils.equals(userName, user.getUsername())) { userOnlineList.add(userOnlineService.selectOnlineByUserName(userName, user)); } - } - else - { + } else { userOnlineList.add(userOnlineService.loginUserToUserOnline(user)); } } @@ -84,8 +72,7 @@ public class SysUserOnlineController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:online:forceLogout')") @Log(title = "在线用户", businessType = BusinessType.FORCE) @DeleteMapping("/{tokenId}") - public AjaxResult forceLogout(@PathVariable String tokenId) - { + public AjaxResult forceLogout(@PathVariable String tokenId) { redisCache.deleteObject(Constants.LOGIN_TOKEN_KEY + tokenId); return AjaxResult.success(); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysConfigController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysConfigController.java index fb39a336..6b66d059 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysConfigController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysConfigController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -26,13 +27,12 @@ import com.ruoyi.system.service.ISysConfigService; /** * 参数配置 信息操作处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/config") -public class SysConfigController extends BaseController -{ +public class SysConfigController extends BaseController { @Autowired private ISysConfigService configService; @@ -41,8 +41,7 @@ public class SysConfigController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:config:list')") @GetMapping("/list") - public TableDataInfo list(SysConfig config) - { + public TableDataInfo list(SysConfig config) { startPage(); List list = configService.selectConfigList(config); return getDataTable(list); @@ -51,8 +50,7 @@ public class SysConfigController extends BaseController @Log(title = "参数管理", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('system:config:export')") @GetMapping("/export") - public AjaxResult export(SysConfig config) - { + public AjaxResult export(SysConfig config) { List list = configService.selectConfigList(config); ExcelUtil util = new ExcelUtil(SysConfig.class); return util.exportExcel(list, "参数数据"); @@ -63,8 +61,7 @@ public class SysConfigController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:config:query')") @GetMapping(value = "/{configId}") - public AjaxResult getInfo(@PathVariable Long configId) - { + public AjaxResult getInfo(@PathVariable Long configId) { return AjaxResult.success(configService.selectConfigById(configId)); } @@ -72,8 +69,7 @@ public class SysConfigController extends BaseController * 根据参数键名查询参数值 */ @GetMapping(value = "/configKey/{configKey}") - public AjaxResult getConfigKey(@PathVariable String configKey) - { + public AjaxResult getConfigKey(@PathVariable String configKey) { return AjaxResult.success(configService.selectConfigByKey(configKey)); } @@ -84,10 +80,8 @@ public class SysConfigController extends BaseController @Log(title = "参数管理", businessType = BusinessType.INSERT) @PostMapping @RepeatSubmit - public AjaxResult add(@Validated @RequestBody SysConfig config) - { - if (UserConstants.NOT_UNIQUE.equals(configService.checkConfigKeyUnique(config))) - { + public AjaxResult add(@Validated @RequestBody SysConfig config) { + if (UserConstants.NOT_UNIQUE.equals(configService.checkConfigKeyUnique(config))) { return AjaxResult.error("新增参数'" + config.getConfigName() + "'失败，参数键名已存在"); } config.setCreateBy(SecurityUtils.getUsername()); @@ -100,10 +94,8 @@ public class SysConfigController extends BaseController @PreAuthorize("@ss.hasPermi('system:config:edit')") @Log(title = "参数管理", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysConfig config) - { - if (UserConstants.NOT_UNIQUE.equals(configService.checkConfigKeyUnique(config))) - { + public AjaxResult edit(@Validated @RequestBody SysConfig config) { + if (UserConstants.NOT_UNIQUE.equals(configService.checkConfigKeyUnique(config))) { return AjaxResult.error("修改参数'" + config.getConfigName() + "'失败，参数键名已存在"); } config.setUpdateBy(SecurityUtils.getUsername()); @@ -116,8 +108,7 @@ public class SysConfigController extends BaseController @PreAuthorize("@ss.hasPermi('system:config:remove')") @Log(title = "参数管理", businessType = BusinessType.DELETE) @DeleteMapping("/{configIds}") - public AjaxResult remove(@PathVariable Long[] configIds) - { + public AjaxResult remove(@PathVariable Long[] configIds) { return toAjax(configService.deleteConfigByIds(configIds)); } @@ -127,8 +118,7 @@ public class SysConfigController extends BaseController @PreAuthorize("@ss.hasPermi('system:config:remove')") @Log(title = "参数管理", businessType = BusinessType.CLEAN) @DeleteMapping("/clearCache") - public AjaxResult clearCache() - { + public AjaxResult clearCache() { configService.clearCache(); return AjaxResult.success(); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDeptController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDeptController.java index 480816ab..848da05a 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDeptController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDeptController.java @@ -2,6 +2,7 @@ package com.ruoyi.web.controller.system; import java.util.Iterator; import java.util.List; + import org.apache.commons.lang3.ArrayUtils; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; @@ -26,13 +27,12 @@ import com.ruoyi.system.service.ISysDeptService; /** * 部门信息 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/dept") -public class SysDeptController extends BaseController -{ +public class SysDeptController extends BaseController { @Autowired private ISysDeptService deptService; @@ -41,8 +41,7 @@ public class SysDeptController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:dept:list')") @GetMapping("/list") - public AjaxResult list(SysDept dept) - { + public AjaxResult list(SysDept dept) { List depts = deptService.selectDeptList(dept); return AjaxResult.success(depts); } @@ -52,16 +51,13 @@ public class SysDeptController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:dept:list')") @GetMapping("/list/exclude/{deptId}") - public AjaxResult excludeChild(@PathVariable(value = "deptId", required = false) Long deptId) - { + public AjaxResult excludeChild(@PathVariable(value = "deptId", required = false) Long deptId) { List depts = deptService.selectDeptList(new SysDept()); Iterator it = depts.iterator(); - while (it.hasNext()) - { + while (it.hasNext()) { SysDept d = (SysDept) it.next(); if (d.getDeptId().intValue() == deptId - || ArrayUtils.contains(StringUtils.split(d.getAncestors(), ","), deptId + "")) - { + || ArrayUtils.contains(StringUtils.split(d.getAncestors(), ","), deptId + "")) { it.remove(); } } @@ -73,8 +69,7 @@ public class SysDeptController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:dept:query')") @GetMapping(value = "/{deptId}") - public AjaxResult getInfo(@PathVariable Long deptId) - { + public AjaxResult getInfo(@PathVariable Long deptId) { return AjaxResult.success(deptService.selectDeptById(deptId)); } @@ -82,8 +77,7 @@ public class SysDeptController extends BaseController * 获取部门下拉树列表 */ @GetMapping("/treeselect") - public AjaxResult treeselect(SysDept dept) - { + public AjaxResult treeselect(SysDept dept) { List depts = deptService.selectDeptList(dept); return AjaxResult.success(deptService.buildDeptTreeSelect(depts)); } @@ -92,8 +86,7 @@ public class SysDeptController extends BaseController * 加载对应角色部门列表树 */ @GetMapping(value = "/roleDeptTreeselect/{roleId}") - public AjaxResult roleDeptTreeselect(@PathVariable("roleId") Long roleId) - { + public AjaxResult roleDeptTreeselect(@PathVariable("roleId") Long roleId) { List depts = deptService.selectDeptList(new SysDept()); AjaxResult ajax = AjaxResult.success(); ajax.put("checkedKeys", deptService.selectDeptListByRoleId(roleId)); @@ -107,10 +100,8 @@ public class SysDeptController extends BaseController @PreAuthorize("@ss.hasPermi('system:dept:add')") @Log(title = "部门管理", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysDept dept) - { - if (UserConstants.NOT_UNIQUE.equals(deptService.checkDeptNameUnique(dept))) - { + public AjaxResult add(@Validated @RequestBody SysDept dept) { + if (UserConstants.NOT_UNIQUE.equals(deptService.checkDeptNameUnique(dept))) { return AjaxResult.error("新增部门'" + dept.getDeptName() + "'失败，部门名称已存在"); } dept.setCreateBy(SecurityUtils.getUsername()); @@ -123,19 +114,13 @@ public class SysDeptController extends BaseController @PreAuthorize("@ss.hasPermi('system:dept:edit')") @Log(title = "部门管理", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysDept dept) - { - if (UserConstants.NOT_UNIQUE.equals(deptService.checkDeptNameUnique(dept))) - { + public AjaxResult edit(@Validated @RequestBody SysDept dept) { + if (UserConstants.NOT_UNIQUE.equals(deptService.checkDeptNameUnique(dept))) { return AjaxResult.error("修改部门'" + dept.getDeptName() + "'失败，部门名称已存在"); - } - else if (dept.getParentId().equals(dept.getDeptId())) - { + } else if (dept.getParentId().equals(dept.getDeptId())) { return AjaxResult.error("修改部门'" + dept.getDeptName() + "'失败，上级部门不能是自己"); - } - else if (StringUtils.equals(UserConstants.DEPT_DISABLE, dept.getStatus()) - && deptService.selectNormalChildrenDeptById(dept.getDeptId()) > 0) - { + } else if (StringUtils.equals(UserConstants.DEPT_DISABLE, dept.getStatus()) + && deptService.selectNormalChildrenDeptById(dept.getDeptId()) > 0) { return AjaxResult.error("该部门包含未停用的子部门！"); } dept.setUpdateBy(SecurityUtils.getUsername()); @@ -148,14 +133,11 @@ public class SysDeptController extends BaseController @PreAuthorize("@ss.hasPermi('system:dept:remove')") @Log(title = "部门管理", businessType = BusinessType.DELETE) @DeleteMapping("/{deptId}") - public AjaxResult remove(@PathVariable Long deptId) - { - if (deptService.hasChildByDeptId(deptId)) - { + public AjaxResult remove(@PathVariable Long deptId) { + if (deptService.hasChildByDeptId(deptId)) { return AjaxResult.error("存在下级部门,不允许删除"); } - if (deptService.checkDeptExistUser(deptId)) - { + if (deptService.checkDeptExistUser(deptId)) { return AjaxResult.error("部门存在用户,不允许删除"); } return toAjax(deptService.deleteDeptById(deptId)); diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictDataController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictDataController.java index 91bd67db..f367daec 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictDataController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictDataController.java @@ -2,6 +2,8 @@ package com.ruoyi.web.controller.system; import java.util.ArrayList; import java.util.List; + +import com.alibaba.druid.pool.DruidDataSource; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -27,13 +29,12 @@ import com.ruoyi.system.service.ISysDictTypeService; /** * 数据字典信息 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/dict/data") -public class SysDictDataController extends BaseController -{ +public class SysDictDataController extends BaseController { @Autowired private ISysDictDataService dictDataService; @@ -42,9 +43,10 @@ public class SysDictDataController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:list')") @GetMapping("/list") - public TableDataInfo list(SysDictData dictData) - { + public TableDataInfo list(SysDictData dictData) { + startPage(); + List list = dictDataService.selectDictDataList(dictData); return getDataTable(list); } @@ -52,8 +54,7 @@ public class SysDictDataController extends BaseController @Log(title = "字典数据", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('system:dict:export')") @GetMapping("/export") - public AjaxResult export(SysDictData dictData) - { + public AjaxResult export(SysDictData dictData) { List list = dictDataService.selectDictDataList(dictData); ExcelUtil util = new ExcelUtil(SysDictData.class); return util.exportExcel(list, "字典数据"); @@ -64,8 +65,7 @@ public class SysDictDataController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:dict:query')") @GetMapping(value = "/{dictCode}") - public AjaxResult getInfo(@PathVariable Long dictCode) - { + public AjaxResult getInfo(@PathVariable Long dictCode) { return AjaxResult.success(dictDataService.selectDictDataById(dictCode)); } @@ -73,11 +73,9 @@ public class SysDictDataController extends BaseController * 根据字典类型查询字典数据信息 */ @GetMapping(value = "/type/{dictType}") - public AjaxResult dictType(@PathVariable String dictType) - { + public AjaxResult dictType(@PathVariable String dictType) { List data = dictTypeService.selectDictDataByType(dictType); - if (StringUtils.isNull(data)) - { + if (StringUtils.isNull(data)) { data = new ArrayList(); } return AjaxResult.success(data); @@ -89,8 +87,7 @@ public class SysDictDataController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:add')") @Log(title = "字典数据", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysDictData dict) - { + public AjaxResult add(@Validated @RequestBody SysDictData dict) { dict.setCreateBy(SecurityUtils.getUsername()); return toAjax(dictDataService.insertDictData(dict)); } @@ -101,8 +98,7 @@ public class SysDictDataController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:edit')") @Log(title = "字典数据", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysDictData dict) - { + public AjaxResult edit(@Validated @RequestBody SysDictData dict) { dict.setUpdateBy(SecurityUtils.getUsername()); return toAjax(dictDataService.updateDictData(dict)); } @@ -113,8 +109,7 @@ public class SysDictDataController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:remove')") @Log(title = "字典类型", businessType = BusinessType.DELETE) @DeleteMapping("/{dictCodes}") - public AjaxResult remove(@PathVariable Long[] dictCodes) - { + public AjaxResult remove(@PathVariable Long[] dictCodes) { return toAjax(dictDataService.deleteDictDataByIds(dictCodes)); } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictTypeController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictTypeController.java index a4e0b2b1..ecf841cf 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictTypeController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysDictTypeController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -25,20 +26,18 @@ import com.ruoyi.system.service.ISysDictTypeService; /** * 数据字典信息 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/dict/type") -public class SysDictTypeController extends BaseController -{ +public class SysDictTypeController extends BaseController { @Autowired private ISysDictTypeService dictTypeService; @PreAuthorize("@ss.hasPermi('system:dict:list')") @GetMapping("/list") - public TableDataInfo list(SysDictType dictType) - { + public TableDataInfo list(SysDictType dictType) { startPage(); List list = dictTypeService.selectDictTypeList(dictType); return getDataTable(list); @@ -47,8 +46,7 @@ public class SysDictTypeController extends BaseController @Log(title = "字典类型", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('system:dict:export')") @GetMapping("/export") - public AjaxResult export(SysDictType dictType) - { + public AjaxResult export(SysDictType dictType) { List list = dictTypeService.selectDictTypeList(dictType); ExcelUtil util = new ExcelUtil(SysDictType.class); return util.exportExcel(list, "字典类型"); @@ -59,8 +57,7 @@ public class SysDictTypeController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:dict:query')") @GetMapping(value = "/{dictId}") - public AjaxResult getInfo(@PathVariable Long dictId) - { + public AjaxResult getInfo(@PathVariable Long dictId) { return AjaxResult.success(dictTypeService.selectDictTypeById(dictId)); } @@ -70,10 +67,8 @@ public class SysDictTypeController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:add')") @Log(title = "字典类型", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysDictType dict) - { - if (UserConstants.NOT_UNIQUE.equals(dictTypeService.checkDictTypeUnique(dict))) - { + public AjaxResult add(@Validated @RequestBody SysDictType dict) { + if (UserConstants.NOT_UNIQUE.equals(dictTypeService.checkDictTypeUnique(dict))) { return AjaxResult.error("新增字典'" + dict.getDictName() + "'失败，字典类型已存在"); } dict.setCreateBy(SecurityUtils.getUsername()); @@ -86,10 +81,8 @@ public class SysDictTypeController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:edit')") @Log(title = "字典类型", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysDictType dict) - { - if (UserConstants.NOT_UNIQUE.equals(dictTypeService.checkDictTypeUnique(dict))) - { + public AjaxResult edit(@Validated @RequestBody SysDictType dict) { + if (UserConstants.NOT_UNIQUE.equals(dictTypeService.checkDictTypeUnique(dict))) { return AjaxResult.error("修改字典'" + dict.getDictName() + "'失败，字典类型已存在"); } dict.setUpdateBy(SecurityUtils.getUsername()); @@ -102,8 +95,7 @@ public class SysDictTypeController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:remove')") @Log(title = "字典类型", businessType = BusinessType.DELETE) @DeleteMapping("/{dictIds}") - public AjaxResult remove(@PathVariable Long[] dictIds) - { + public AjaxResult remove(@PathVariable Long[] dictIds) { return toAjax(dictTypeService.deleteDictTypeByIds(dictIds)); } @@ -113,8 +105,7 @@ public class SysDictTypeController extends BaseController @PreAuthorize("@ss.hasPermi('system:dict:remove')") @Log(title = "字典类型", businessType = BusinessType.CLEAN) @DeleteMapping("/clearCache") - public AjaxResult clearCache() - { + public AjaxResult clearCache() { dictTypeService.clearCache(); return AjaxResult.success(); } @@ -123,8 +114,7 @@ public class SysDictTypeController extends BaseController * 获取字典选择框列表 */ @GetMapping("/optionselect") - public AjaxResult optionselect() - { + public AjaxResult optionselect() { List dictTypes = dictTypeService.selectDictTypeAll(); return AjaxResult.success(dictTypes); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysLoginController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysLoginController.java index 997c5821..e6bfd0c2 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysLoginController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysLoginController.java @@ -1,7 +1,11 @@ package com.ruoyi.web.controller.system; +import java.util.HashMap; import java.util.List; +import java.util.Map; import java.util.Set; + +import com.ruoyi.common.core.domain.model.MpLoginBody; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.web.bind.annotation.GetMapping; import org.springframework.web.bind.annotation.PostMapping; @@ -21,12 +25,11 @@ import com.ruoyi.system.service.ISysMenuService; /** * 登录验证 - * + * * @author ruoyi */ @RestController -public class SysLoginController -{ +public class SysLoginController { @Autowired private SysLoginService loginService; @@ -41,13 +44,12 @@ public class SysLoginController /** * 登录方法 - * + * * @param loginBody 登录信息 * @return 结果 */ @PostMapping("/login") - public AjaxResult login(@RequestBody LoginBody loginBody) - { + public AjaxResult login(@RequestBody LoginBody loginBody) { AjaxResult ajax = AjaxResult.success(); // 生成令牌 String token = loginService.login(loginBody.getUsername(), loginBody.getPassword(), loginBody.getCode(), @@ -56,14 +58,31 @@ public class SysLoginController return ajax; } + /** + * @return + * @Method 微信小程序用户登录 + * @Description TODO + * @Param null + * @date 2021-08-26,0026 11:47 + * @author admin + */ + @PostMapping("/wxLogin") + public AjaxResult wxLogin(@RequestBody MpLoginBody loginBody) { + AjaxResult ajax = AjaxResult.success(); + // 生成令牌 + String token = loginService.mpLlogin(loginBody); + ajax.put(Constants.TOKEN, token); + + return ajax; + } + /** * 获取用户信息 - * + * * @return 用户信息 */ @GetMapping("getInfo") - public AjaxResult getInfo() - { + public AjaxResult getInfo() { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); SysUser user = loginUser.getUser(); // 角色集合 @@ -79,12 +98,11 @@ public class SysLoginController /** * 获取路由信息 - * + * * @return 路由信息 */ @GetMapping("getRouters") - public AjaxResult getRouters() - { + public AjaxResult getRouters() { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); // 用户信息 SysUser user = loginUser.getUser(); diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysMenuController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysMenuController.java index 2ee72383..ce646e13 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysMenuController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysMenuController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -28,13 +29,12 @@ import com.ruoyi.system.service.ISysMenuService; /** * 菜单信息 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/menu") -public class SysMenuController extends BaseController -{ +public class SysMenuController extends BaseController { @Autowired private ISysMenuService menuService; @@ -46,11 +46,11 @@ public class SysMenuController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:menu:list')") @GetMapping("/list") - public AjaxResult list(SysMenu menu) - { + public AjaxResult list(SysMenu menu) { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); Long userId = loginUser.getUser().getUserId(); List menus = menuService.selectMenuList(menu, userId); + return AjaxResult.success(menus); } @@ -59,8 +59,7 @@ public class SysMenuController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:menu:query')") @GetMapping(value = "/{menuId}") - public AjaxResult getInfo(@PathVariable Long menuId) - { + public AjaxResult getInfo(@PathVariable Long menuId) { return AjaxResult.success(menuService.selectMenuById(menuId)); } @@ -68,8 +67,7 @@ public class SysMenuController extends BaseController * 获取菜单下拉树列表 */ @GetMapping("/treeselect") - public AjaxResult treeselect(SysMenu menu) - { + public AjaxResult treeselect(SysMenu menu) { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); Long userId = loginUser.getUser().getUserId(); List menus = menuService.selectMenuList(menu, userId); @@ -80,8 +78,7 @@ public class SysMenuController extends BaseController * 加载对应角色菜单列表树 */ @GetMapping(value = "/roleMenuTreeselect/{roleId}") - public AjaxResult roleMenuTreeselect(@PathVariable("roleId") Long roleId) - { + public AjaxResult roleMenuTreeselect(@PathVariable("roleId") Long roleId) { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); List menus = menuService.selectMenuList(loginUser.getUser().getUserId()); AjaxResult ajax = AjaxResult.success(); @@ -96,15 +93,11 @@ public class SysMenuController extends BaseController @PreAuthorize("@ss.hasPermi('system:menu:add')") @Log(title = "菜单管理", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysMenu menu) - { - if (UserConstants.NOT_UNIQUE.equals(menuService.checkMenuNameUnique(menu))) - { + public AjaxResult add(@Validated @RequestBody SysMenu menu) { + if (UserConstants.NOT_UNIQUE.equals(menuService.checkMenuNameUnique(menu))) { return AjaxResult.error("新增菜单'" + menu.getMenuName() + "'失败，菜单名称已存在"); - } - else if (UserConstants.YES_FRAME.equals(menu.getIsFrame()) - && !StringUtils.startsWithAny(menu.getPath(), Constants.HTTP, Constants.HTTPS)) - { + } else if (UserConstants.YES_FRAME.equals(menu.getIsFrame()) + && !StringUtils.startsWithAny(menu.getPath(), Constants.HTTP, Constants.HTTPS)) { return AjaxResult.error("新增菜单'" + menu.getMenuName() + "'失败，地址必须以http(s)://开头"); } menu.setCreateBy(SecurityUtils.getUsername()); @@ -117,19 +110,13 @@ public class SysMenuController extends BaseController @PreAuthorize("@ss.hasPermi('system:menu:edit')") @Log(title = "菜单管理", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysMenu menu) - { - if (UserConstants.NOT_UNIQUE.equals(menuService.checkMenuNameUnique(menu))) - { + public AjaxResult edit(@Validated @RequestBody SysMenu menu) { + if (UserConstants.NOT_UNIQUE.equals(menuService.checkMenuNameUnique(menu))) { return AjaxResult.error("修改菜单'" + menu.getMenuName() + "'失败，菜单名称已存在"); - } - else if (UserConstants.YES_FRAME.equals(menu.getIsFrame()) - && !StringUtils.startsWithAny(menu.getPath(), Constants.HTTP, Constants.HTTPS)) - { + } else if (UserConstants.YES_FRAME.equals(menu.getIsFrame()) + && !StringUtils.startsWithAny(menu.getPath(), Constants.HTTP, Constants.HTTPS)) { return AjaxResult.error("修改菜单'" + menu.getMenuName() + "'失败，地址必须以http(s)://开头"); - } - else if (menu.getMenuId().equals(menu.getParentId())) - { + } else if (menu.getMenuId().equals(menu.getParentId())) { return AjaxResult.error("修改菜单'" + menu.getMenuName() + "'失败，上级菜单不能选择自己"); } menu.setUpdateBy(SecurityUtils.getUsername()); @@ -142,14 +129,11 @@ public class SysMenuController extends BaseController @PreAuthorize("@ss.hasPermi('system:menu:remove')") @Log(title = "菜单管理", businessType = BusinessType.DELETE) @DeleteMapping("/{menuId}") - public AjaxResult remove(@PathVariable("menuId") Long menuId) - { - if (menuService.hasChildByMenuId(menuId)) - { + public AjaxResult remove(@PathVariable("menuId") Long menuId) { + if (menuService.hasChildByMenuId(menuId)) { return AjaxResult.error("存在子菜单,不允许删除"); } - if (menuService.checkMenuExistRole(menuId)) - { + if (menuService.checkMenuExistRole(menuId)) { return AjaxResult.error("菜单已分配,不允许删除"); } return toAjax(menuService.deleteMenuById(menuId)); diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysNoticeController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysNoticeController.java index 224e594d..d0ac4231 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysNoticeController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysNoticeController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -23,13 +24,12 @@ import com.ruoyi.system.service.ISysNoticeService; /** * 公告 信息操作处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/notice") -public class SysNoticeController extends BaseController -{ +public class SysNoticeController extends BaseController { @Autowired private ISysNoticeService noticeService; @@ -38,8 +38,7 @@ public class SysNoticeController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:notice:list')") @GetMapping("/list") - public TableDataInfo list(SysNotice notice) - { + public TableDataInfo list(SysNotice notice) { startPage(); List list = noticeService.selectNoticeList(notice); return getDataTable(list); @@ -50,8 +49,7 @@ public class SysNoticeController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:notice:query')") @GetMapping(value = "/{noticeId}") - public AjaxResult getInfo(@PathVariable Long noticeId) - { + public AjaxResult getInfo(@PathVariable Long noticeId) { return AjaxResult.success(noticeService.selectNoticeById(noticeId)); } @@ -61,8 +59,7 @@ public class SysNoticeController extends BaseController @PreAuthorize("@ss.hasPermi('system:notice:add')") @Log(title = "通知公告", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysNotice notice) - { + public AjaxResult add(@Validated @RequestBody SysNotice notice) { notice.setCreateBy(SecurityUtils.getUsername()); return toAjax(noticeService.insertNotice(notice)); } @@ -73,8 +70,7 @@ public class SysNoticeController extends BaseController @PreAuthorize("@ss.hasPermi('system:notice:edit')") @Log(title = "通知公告", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysNotice notice) - { + public AjaxResult edit(@Validated @RequestBody SysNotice notice) { notice.setUpdateBy(SecurityUtils.getUsername()); return toAjax(noticeService.updateNotice(notice)); } @@ -85,8 +81,7 @@ public class SysNoticeController extends BaseController @PreAuthorize("@ss.hasPermi('system:notice:remove')") @Log(title = "通知公告", businessType = BusinessType.DELETE) @DeleteMapping("/{noticeIds}") - public AjaxResult remove(@PathVariable Long[] noticeIds) - { + public AjaxResult remove(@PathVariable Long[] noticeIds) { return toAjax(noticeService.deleteNoticeByIds(noticeIds)); } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysPostController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysPostController.java index 0c73ea8d..83149d46 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysPostController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysPostController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -25,13 +26,12 @@ import com.ruoyi.system.service.ISysPostService; /** * 岗位信息操作处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/post") -public class SysPostController extends BaseController -{ +public class SysPostController extends BaseController { @Autowired private ISysPostService postService; @@ -40,18 +40,16 @@ public class SysPostController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:post:list')") @GetMapping("/list") - public TableDataInfo list(SysPost post) - { + public TableDataInfo list(SysPost post) { startPage(); List list = postService.selectPostList(post); return getDataTable(list); } - + @Log(title = "岗位管理", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('system:post:export')") @GetMapping("/export") - public AjaxResult export(SysPost post) - { + public AjaxResult export(SysPost post) { List list = postService.selectPostList(post); ExcelUtil util = new ExcelUtil(SysPost.class); return util.exportExcel(list, "岗位数据"); @@ -62,8 +60,7 @@ public class SysPostController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:post:query')") @GetMapping(value = "/{postId}") - public AjaxResult getInfo(@PathVariable Long postId) - { + public AjaxResult getInfo(@PathVariable Long postId) { return AjaxResult.success(postService.selectPostById(postId)); } @@ -73,14 +70,10 @@ public class SysPostController extends BaseController @PreAuthorize("@ss.hasPermi('system:post:add')") @Log(title = "岗位管理", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysPost post) - { - if (UserConstants.NOT_UNIQUE.equals(postService.checkPostNameUnique(post))) - { + public AjaxResult add(@Validated @RequestBody SysPost post) { + if (UserConstants.NOT_UNIQUE.equals(postService.checkPostNameUnique(post))) { return AjaxResult.error("新增岗位'" + post.getPostName() + "'失败，岗位名称已存在"); - } - else if (UserConstants.NOT_UNIQUE.equals(postService.checkPostCodeUnique(post))) - { + } else if (UserConstants.NOT_UNIQUE.equals(postService.checkPostCodeUnique(post))) { return AjaxResult.error("新增岗位'" + post.getPostName() + "'失败，岗位编码已存在"); } post.setCreateBy(SecurityUtils.getUsername()); @@ -93,14 +86,10 @@ public class SysPostController extends BaseController @PreAuthorize("@ss.hasPermi('system:post:edit')") @Log(title = "岗位管理", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysPost post) - { - if (UserConstants.NOT_UNIQUE.equals(postService.checkPostNameUnique(post))) - { + public AjaxResult edit(@Validated @RequestBody SysPost post) { + if (UserConstants.NOT_UNIQUE.equals(postService.checkPostNameUnique(post))) { return AjaxResult.error("修改岗位'" + post.getPostName() + "'失败，岗位名称已存在"); - } - else if (UserConstants.NOT_UNIQUE.equals(postService.checkPostCodeUnique(post))) - { + } else if (UserConstants.NOT_UNIQUE.equals(postService.checkPostCodeUnique(post))) { return AjaxResult.error("修改岗位'" + post.getPostName() + "'失败，岗位编码已存在"); } post.setUpdateBy(SecurityUtils.getUsername()); @@ -113,8 +102,7 @@ public class SysPostController extends BaseController @PreAuthorize("@ss.hasPermi('system:post:remove')") @Log(title = "岗位管理", businessType = BusinessType.DELETE) @DeleteMapping("/{postIds}") - public AjaxResult remove(@PathVariable Long[] postIds) - { + public AjaxResult remove(@PathVariable Long[] postIds) { return toAjax(postService.deletePostByIds(postIds)); } @@ -122,8 +110,7 @@ public class SysPostController extends BaseController * 获取岗位选择框列表 */ @GetMapping("/optionselect") - public AjaxResult optionselect() - { + public AjaxResult optionselect() { List posts = postService.selectPostAll(); return AjaxResult.success(posts); } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysProfileController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysProfileController.java index c2f3f227..caa25394 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysProfileController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysProfileController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.io.IOException; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.web.bind.annotation.GetMapping; import org.springframework.web.bind.annotation.PostMapping; @@ -25,13 +26,12 @@ import com.ruoyi.system.service.ISysUserService; /** * 个人信息 业务处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/user/profile") -public class SysProfileController extends BaseController -{ +public class SysProfileController extends BaseController { @Autowired private ISysUserService userService; @@ -42,8 +42,7 @@ public class SysProfileController extends BaseController * 个人信息 */ @GetMapping - public AjaxResult profile() - { + public AjaxResult profile() { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); SysUser user = loginUser.getUser(); AjaxResult ajax = AjaxResult.success(user); @@ -57,10 +56,8 @@ public class SysProfileController extends BaseController */ @Log(title = "个人信息", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult updateProfile(@RequestBody SysUser user) - { - if (userService.updateUserProfile(user) > 0) - { + public AjaxResult updateProfile(@RequestBody SysUser user) { + if (userService.updateUserProfile(user) > 0) { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); // 更新缓存用户信息 loginUser.getUser().setNickName(user.getNickName()); @@ -78,21 +75,17 @@ public class SysProfileController extends BaseController */ @Log(title = "个人信息", businessType = BusinessType.UPDATE) @PutMapping("/updatePwd") - public AjaxResult updatePwd(String oldPassword, String newPassword) - { + public AjaxResult updatePwd(String oldPassword, String newPassword) { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); String userName = loginUser.getUsername(); String password = loginUser.getPassword(); - if (!SecurityUtils.matchesPassword(oldPassword, password)) - { + if (!SecurityUtils.matchesPassword(oldPassword, password)) { return AjaxResult.error("修改密码失败，旧密码错误"); } - if (SecurityUtils.matchesPassword(newPassword, password)) - { + if (SecurityUtils.matchesPassword(newPassword, password)) { return AjaxResult.error("新密码不能与旧密码相同"); } - if (userService.resetUserPwd(userName, SecurityUtils.encryptPassword(newPassword)) > 0) - { + if (userService.resetUserPwd(userName, SecurityUtils.encryptPassword(newPassword)) > 0) { // 更新缓存用户密码 loginUser.getUser().setPassword(SecurityUtils.encryptPassword(newPassword)); tokenService.setLoginUser(loginUser); @@ -106,14 +99,11 @@ public class SysProfileController extends BaseController */ @Log(title = "用户头像", businessType = BusinessType.UPDATE) @PostMapping("/avatar") - public AjaxResult avatar(@RequestParam("avatarfile") MultipartFile file) throws IOException - { - if (!file.isEmpty()) - { + public AjaxResult avatar(@RequestParam("avatarfile") MultipartFile file) throws IOException { + if (!file.isEmpty()) { LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); String avatar = FileUploadUtils.upload(RuoYiConfig.getAvatarPath(), file); - if (userService.updateUserAvatar(loginUser.getUsername(), avatar)) - { + if (userService.updateUserAvatar(loginUser.getUsername(), avatar)) { AjaxResult ajax = AjaxResult.success(); ajax.put("imgUrl", avatar); // 更新缓存用户头像 diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysRoleController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysRoleController.java index ca581e7c..7b4d50f4 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysRoleController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysRoleController.java @@ -1,6 +1,7 @@ package com.ruoyi.web.controller.system; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.validation.annotation.Validated; @@ -31,29 +32,27 @@ import com.ruoyi.system.service.ISysUserService; /** * 角色信息 - * + * * @author ruoyi */ @RestController @RequestMapping("/system/role") -public class SysRoleController extends BaseController -{ +public class SysRoleController extends BaseController { @Autowired private ISysRoleService roleService; @Autowired private TokenService tokenService; - + @Autowired private SysPermissionService permissionService; - + @Autowired private ISysUserService userService; @PreAuthorize("@ss.hasPermi('system:role:list')") @GetMapping("/list") - public TableDataInfo list(SysRole role) - { + public TableDataInfo list(SysRole role) { startPage(); List list = roleService.selectRoleList(role); return getDataTable(list); @@ -62,8 +61,7 @@ public class SysRoleController extends BaseController @Log(title = "角色管理", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('system:role:export')") @GetMapping("/export") - public AjaxResult export(SysRole role) - { + public AjaxResult export(SysRole role) { List list = roleService.selectRoleList(role); ExcelUtil util = new ExcelUtil(SysRole.class); return util.exportExcel(list, "角色数据"); @@ -74,8 +72,7 @@ public class SysRoleController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:role:query')") @GetMapping(value = "/{roleId}") - public AjaxResult getInfo(@PathVariable Long roleId) - { + public AjaxResult getInfo(@PathVariable Long roleId) { return AjaxResult.success(roleService.selectRoleById(roleId)); } @@ -85,14 +82,10 @@ public class SysRoleController extends BaseController @PreAuthorize("@ss.hasPermi('system:role:add')") @Log(title = "角色管理", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@Validated @RequestBody SysRole role) - { - if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleNameUnique(role))) - { + public AjaxResult add(@Validated @RequestBody SysRole role) { + if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleNameUnique(role))) { return AjaxResult.error("新增角色'" + role.getRoleName() + "'失败，角色名称已存在"); - } - else if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleKeyUnique(role))) - { + } else if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleKeyUnique(role))) { return AjaxResult.error("新增角色'" + role.getRoleName() + "'失败，角色权限已存在"); } role.setCreateBy(SecurityUtils.getUsername()); @@ -106,25 +99,19 @@ public class SysRoleController extends BaseController @PreAuthorize("@ss.hasPermi('system:role:edit')") @Log(title = "角色管理", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysRole role) - { + public AjaxResult edit(@Validated @RequestBody SysRole role) { roleService.checkRoleAllowed(role); - if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleNameUnique(role))) - { + if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleNameUnique(role))) { return AjaxResult.error("修改角色'" + role.getRoleName() + "'失败，角色名称已存在"); - } - else if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleKeyUnique(role))) - { + } else if (UserConstants.NOT_UNIQUE.equals(roleService.checkRoleKeyUnique(role))) { return AjaxResult.error("修改角色'" + role.getRoleName() + "'失败，角色权限已存在"); } role.setUpdateBy(SecurityUtils.getUsername()); - - if (roleService.updateRole(role) > 0) - { + + if (roleService.updateRole(role) > 0) { // 更新缓存用户权限 LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); - if (StringUtils.isNotNull(loginUser.getUser()) && !loginUser.getUser().isAdmin()) - { + if (StringUtils.isNotNull(loginUser.getUser()) && !loginUser.getUser().isAdmin()) { loginUser.setPermissions(permissionService.getMenuPermission(loginUser.getUser())); loginUser.setUser(userService.selectUserByUserName(loginUser.getUser().getUserName())); tokenService.setLoginUser(loginUser); @@ -140,8 +127,7 @@ public class SysRoleController extends BaseController @PreAuthorize("@ss.hasPermi('system:role:edit')") @Log(title = "角色管理", businessType = BusinessType.UPDATE) @PutMapping("/dataScope") - public AjaxResult dataScope(@RequestBody SysRole role) - { + public AjaxResult dataScope(@RequestBody SysRole role) { roleService.checkRoleAllowed(role); return toAjax(roleService.authDataScope(role)); } @@ -152,8 +138,7 @@ public class SysRoleController extends BaseController @PreAuthorize("@ss.hasPermi('system:role:edit')") @Log(title = "角色管理", businessType = BusinessType.UPDATE) @PutMapping("/changeStatus") - public AjaxResult changeStatus(@RequestBody SysRole role) - { + public AjaxResult changeStatus(@RequestBody SysRole role) { roleService.checkRoleAllowed(role); role.setUpdateBy(SecurityUtils.getUsername()); return toAjax(roleService.updateRoleStatus(role)); @@ -165,8 +150,7 @@ public class SysRoleController extends BaseController @PreAuthorize("@ss.hasPermi('system:role:remove')") @Log(title = "角色管理", businessType = BusinessType.DELETE) @DeleteMapping("/{roleIds}") - public AjaxResult remove(@PathVariable Long[] roleIds) - { + public AjaxResult remove(@PathVariable Long[] roleIds) { return toAjax(roleService.deleteRoleByIds(roleIds)); } @@ -175,8 +159,7 @@ public class SysRoleController extends BaseController */ @PreAuthorize("@ss.hasPermi('system:role:query')") @GetMapping("/optionselect") - public AjaxResult optionselect() - { + public AjaxResult optionselect() { return AjaxResult.success(roleService.selectRoleAll()); } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysUserController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysUserController.java index 51f9d2a0..21b29f87 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysUserController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/system/SysUserController.java @@ -37,14 +37,13 @@ import com.ruoyi.system.service.ISysUserService; /** * 用户信息 - * + * * @author ruoyi */ -@Api(value="用户管理",tags="用户管理") +@Api(value = "用户管理", tags = "用户管理") @RestController @RequestMapping("/system/user") -public class SysUserController extends BaseController -{ +public class SysUserController extends BaseController { @Autowired private ISysUserService userService; @@ -63,8 +62,7 @@ public class SysUserController extends BaseController @ApiOperation(value = "获取用户列表", notes = "获取用户列表") @PreAuthorize("@ss.hasPermi('system:user:list')") @GetMapping("/list") - public TableDataInfo list(SysUser user) - { + public TableDataInfo list(SysUser user) { startPage(); List list = userService.selectUserList(user); return getDataTable(list); @@ -73,8 +71,7 @@ public class SysUserController extends BaseController @Log(title = "用户管理", businessType = BusinessType.EXPORT) @PreAuthorize("@ss.hasPermi('system:user:export')") @GetMapping("/export") - public AjaxResult export(SysUser user) - { + public AjaxResult export(SysUser user) { List list = userService.selectUserList(user); ExcelUtil util = new ExcelUtil(SysUser.class); return util.exportExcel(list, "用户数据"); @@ -83,8 +80,7 @@ public class SysUserController extends BaseController @Log(title = "用户管理", businessType = BusinessType.IMPORT) @PreAuthorize("@ss.hasPermi('system:user:import')") @PostMapping("/importData") - public AjaxResult importData(MultipartFile file, boolean updateSupport) throws Exception - { + public AjaxResult importData(MultipartFile file, boolean updateSupport) throws Exception { ExcelUtil util = new ExcelUtil(SysUser.class); List userList = util.importExcel(file.getInputStream()); LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); @@ -94,8 +90,7 @@ public class SysUserController extends BaseController } @GetMapping("/importTemplate") - public AjaxResult importTemplate() - { + public AjaxResult importTemplate() { ExcelUtil util = new ExcelUtil(SysUser.class); return util.importTemplateExcel("用户数据"); } @@ -105,15 +100,13 @@ public class SysUserController extends BaseController */ @ApiOperation(value = "根据用户编号获取详细信息", notes = "根据用户编号获取详细信息") @PreAuthorize("@ss.hasPermi('system:user:query')") - @GetMapping(value = { "/", "/{userId}" }) - public AjaxResult getInfo(@PathVariable(value = "userId", required = false) Long userId) - { + @GetMapping(value = {"/", "/{userId}"}) + public AjaxResult getInfo(@PathVariable(value = "userId", required = false) Long userId) { AjaxResult ajax = AjaxResult.success(); List roles = roleService.selectRoleAll(); ajax.put("roles", SysUser.isAdmin(userId) ? roles : roles.stream().filter(r -> !r.isAdmin()).collect(Collectors.toList())); ajax.put("posts", postService.selectPostAll()); - if (StringUtils.isNotNull(userId)) - { + if (StringUtils.isNotNull(userId)) { ajax.put(AjaxResult.DATA_TAG, userService.selectUserById(userId)); ajax.put("postIds", postService.selectPostListByUserId(userId)); ajax.put("roleIds", roleService.selectRoleListByUserId(userId)); @@ -128,20 +121,14 @@ public class SysUserController extends BaseController @Log(title = "用户管理", businessType = BusinessType.INSERT) @PostMapping @ApiOperation(value = "新增用户", notes = "新增用户") - public AjaxResult add(@Validated @RequestBody SysUser user) - { - if (UserConstants.NOT_UNIQUE.equals(userService.checkUserNameUnique(user.getUserName()))) - { + public AjaxResult add(@Validated @RequestBody SysUser user) { + if (UserConstants.NOT_UNIQUE.equals(userService.checkUserNameUnique(user.getUserName()))) { return AjaxResult.error("新增用户'" + user.getUserName() + "'失败，登录账号已存在"); - } - else if (StringUtils.isNotEmpty(user.getPhonenumber()) - && UserConstants.NOT_UNIQUE.equals(userService.checkPhoneUnique(user))) - { + } else if (StringUtils.isNotEmpty(user.getPhonenumber()) + && UserConstants.NOT_UNIQUE.equals(userService.checkPhoneUnique(user))) { return AjaxResult.error("新增用户'" + user.getUserName() + "'失败，手机号码已存在"); - } - else if (StringUtils.isNotEmpty(user.getEmail()) - && UserConstants.NOT_UNIQUE.equals(userService.checkEmailUnique(user))) - { + } else if (StringUtils.isNotEmpty(user.getEmail()) + && UserConstants.NOT_UNIQUE.equals(userService.checkEmailUnique(user))) { return AjaxResult.error("新增用户'" + user.getUserName() + "'失败，邮箱账号已存在"); } user.setCreateBy(SecurityUtils.getUsername()); @@ -155,20 +142,14 @@ public class SysUserController extends BaseController @Log(title = "用户管理", businessType = BusinessType.INSERT) @PostMapping("/register") @ApiOperation(value = "用户注册", notes = "用户注册") - public AjaxResult register(@Validated @RequestBody SysUser user) - { - if (UserConstants.NOT_UNIQUE.equals(userService.checkUserNameUnique(user.getUserName()))) - { + public AjaxResult register(@Validated @RequestBody SysUser user) { + if (UserConstants.NOT_UNIQUE.equals(userService.checkUserNameUnique(user.getUserName()))) { return AjaxResult.error("新增用户'" + user.getUserName() + "'失败，登录账号已存在"); - } - else if (StringUtils.isNotEmpty(user.getPhonenumber()) - && UserConstants.NOT_UNIQUE.equals(userService.checkPhoneUnique(user))) - { + } else if (StringUtils.isNotEmpty(user.getPhonenumber()) + && UserConstants.NOT_UNIQUE.equals(userService.checkPhoneUnique(user))) { return AjaxResult.error("新增用户'" + user.getUserName() + "'失败，手机号码已存在"); - } - else if (StringUtils.isNotEmpty(user.getEmail()) - && UserConstants.NOT_UNIQUE.equals(userService.checkEmailUnique(user))) - { + } else if (StringUtils.isNotEmpty(user.getEmail()) + && UserConstants.NOT_UNIQUE.equals(userService.checkEmailUnique(user))) { return AjaxResult.error("新增用户'" + user.getUserName() + "'失败，邮箱账号已存在"); } user.setDelFlag("0"); @@ -183,17 +164,13 @@ public class SysUserController extends BaseController @PreAuthorize("@ss.hasPermi('system:user:edit')") @Log(title = "用户管理", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@Validated @RequestBody SysUser user) - { + public AjaxResult edit(@Validated @RequestBody SysUser user) { userService.checkUserAllowed(user); if (StringUtils.isNotEmpty(user.getPhonenumber()) - && UserConstants.NOT_UNIQUE.equals(userService.checkPhoneUnique(user))) - { + && UserConstants.NOT_UNIQUE.equals(userService.checkPhoneUnique(user))) { return AjaxResult.error("修改用户'" + user.getUserName() + "'失败，手机号码已存在"); - } - else if (StringUtils.isNotEmpty(user.getEmail()) - && UserConstants.NOT_UNIQUE.equals(userService.checkEmailUnique(user))) - { + } else if (StringUtils.isNotEmpty(user.getEmail()) + && UserConstants.NOT_UNIQUE.equals(userService.checkEmailUnique(user))) { return AjaxResult.error("修改用户'" + user.getUserName() + "'失败，邮箱账号已存在"); } user.setUpdateBy(SecurityUtils.getUsername()); @@ -207,8 +184,7 @@ public class SysUserController extends BaseController @PreAuthorize("@ss.hasPermi('system:user:remove')") @Log(title = "用户管理", businessType = BusinessType.DELETE) @DeleteMapping("/{userIds}") - public AjaxResult remove(@PathVariable Long[] userIds) - { + public AjaxResult remove(@PathVariable Long[] userIds) { return toAjax(userService.deleteUserByIds(userIds)); } @@ -219,8 +195,7 @@ public class SysUserController extends BaseController @PreAuthorize("@ss.hasPermi('system:user:resetPwd')") @Log(title = "用户管理", businessType = BusinessType.UPDATE) @PutMapping("/resetPwd") - public AjaxResult resetPwd(@RequestBody SysUser user) - { + public AjaxResult resetPwd(@RequestBody SysUser user) { userService.checkUserAllowed(user); user.setPassword(SecurityUtils.encryptPassword(user.getPassword())); user.setUpdateBy(SecurityUtils.getUsername()); @@ -234,8 +209,7 @@ public class SysUserController extends BaseController @PreAuthorize("@ss.hasPermi('system:user:edit')") @Log(title = "用户管理", businessType = BusinessType.UPDATE) @PutMapping("/changeStatus") - public AjaxResult changeStatus(@RequestBody SysUser user) - { + public AjaxResult changeStatus(@RequestBody SysUser user) { userService.checkUserAllowed(user); user.setUpdateBy(SecurityUtils.getUsername()); return toAjax(userService.updateUserStatus(user)); diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/SwaggerController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/SwaggerController.java index f66ca24e..b79c15f4 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/SwaggerController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/SwaggerController.java @@ -8,17 +8,15 @@ import com.ruoyi.common.core.controller.BaseController; /** * swagger 接口 - * + * * @author ruoyi */ @Controller @RequestMapping("/tool/swagger") -public class SwaggerController extends BaseController -{ +public class SwaggerController extends BaseController { @PreAuthorize("@ss.hasPermi('tool:swagger:view')") @GetMapping() - public String index() - { + public String index() { return redirect("/swagger-ui.html"); } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/TestController.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/TestController.java index 9c6e6b5e..9e94bda1 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/TestController.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/controller/tool/TestController.java @@ -4,6 +4,7 @@ import java.util.ArrayList; import java.util.LinkedHashMap; import java.util.List; import java.util.Map; + import org.springframework.web.bind.annotation.DeleteMapping; import org.springframework.web.bind.annotation.GetMapping; import org.springframework.web.bind.annotation.PathVariable; @@ -22,15 +23,15 @@ import io.swagger.annotations.ApiOperation; /** * swagger 用户测试方法 - * + * * @author ruoyi */ @Api("用户信息管理") @RestController @RequestMapping("/test/user") -public class TestController extends BaseController -{ +public class TestController extends BaseController { private final static Map users = new LinkedHashMap(); + { users.put(1, new UserEntity(1, "admin", "admin123", "15888888888")); users.put(2, new UserEntity(2, "ry", "admin123", "15666666666")); @@ -38,8 +39,7 @@ public class TestController extends BaseController @ApiOperation("获取用户列表") @GetMapping("/list") - public AjaxResult userList() - { + public AjaxResult userList() { List userList = new ArrayList(users.values()); return AjaxResult.success(userList); } @@ -47,14 +47,10 @@ public class TestController extends BaseController @ApiOperation("获取用户详细") @ApiImplicitParam(name = "userId", value = "用户ID", required = true, dataType = "int", paramType = "path") @GetMapping("/{userId}") - public AjaxResult getUser(@PathVariable Integer userId) - { - if (!users.isEmpty() && users.containsKey(userId)) - { + public AjaxResult getUser(@PathVariable Integer userId) { + if (!users.isEmpty() && users.containsKey(userId)) { return AjaxResult.success(users.get(userId)); - } - else - { + } else { return AjaxResult.error("用户不存在"); } } @@ -62,10 +58,8 @@ public class TestController extends BaseController @ApiOperation("新增用户") @ApiImplicitParam(name = "userEntity", value = "新增用户信息", dataType = "UserEntity") @PostMapping("/save") - public AjaxResult save(UserEntity user) - { - if (StringUtils.isNull(user) || StringUtils.isNull(user.getUserId())) - { + public AjaxResult save(UserEntity user) { + if (StringUtils.isNull(user) || StringUtils.isNull(user.getUserId())) { return AjaxResult.error("用户ID不能为空"); } return AjaxResult.success(users.put(user.getUserId(), user)); @@ -74,14 +68,11 @@ public class TestController extends BaseController @ApiOperation("更新用户") @ApiImplicitParam(name = "userEntity", value = "新增用户信息", dataType = "UserEntity") @PutMapping("/update") - public AjaxResult update(UserEntity user) - { - if (StringUtils.isNull(user) || StringUtils.isNull(user.getUserId())) - { + public AjaxResult update(UserEntity user) { + if (StringUtils.isNull(user) || StringUtils.isNull(user.getUserId())) { return AjaxResult.error("用户ID不能为空"); } - if (users.isEmpty() || !users.containsKey(user.getUserId())) - { + if (users.isEmpty() || !users.containsKey(user.getUserId())) { return AjaxResult.error("用户不存在"); } users.remove(user.getUserId()); @@ -91,23 +82,18 @@ public class TestController extends BaseController @ApiOperation("删除用户信息") @ApiImplicitParam(name = "userId", value = "用户ID", required = true, dataType = "int", paramType = "path") @DeleteMapping("/{userId}") - public AjaxResult delete(@PathVariable Integer userId) - { - if (!users.isEmpty() && users.containsKey(userId)) - { + public AjaxResult delete(@PathVariable Integer userId) { + if (!users.isEmpty() && users.containsKey(userId)) { users.remove(userId); return AjaxResult.success(); - } - else - { + } else { return AjaxResult.error("用户不存在"); } } } @ApiModel("用户实体") -class UserEntity -{ +class UserEntity { @ApiModelProperty("用户ID") private Integer userId; @@ -120,56 +106,46 @@ class UserEntity @ApiModelProperty("用户手机") private String mobile; - public UserEntity() - { + public UserEntity() { } - public UserEntity(Integer userId, String username, String password, String mobile) - { + public UserEntity(Integer userId, String username, String password, String mobile) { this.userId = userId; this.username = username; this.password = password; this.mobile = mobile; } - public Integer getUserId() - { + public Integer getUserId() { return userId; } - public void setUserId(Integer userId) - { + public void setUserId(Integer userId) { this.userId = userId; } - public String getUsername() - { + public String getUsername() { return username; } - public void setUsername(String username) - { + public void setUsername(String username) { this.username = username; } - public String getPassword() - { + public String getPassword() { return password; } - public void setPassword(String password) - { + public void setPassword(String password) { this.password = password; } - public String getMobile() - { + public String getMobile() { return mobile; } - public void setMobile(String mobile) - { + public void setMobile(String mobile) { this.mobile = mobile; } } diff --git a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/core/config/SwaggerConfig.java b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/core/config/SwaggerConfig.java index bf997cf7..5ea47cd5 100644 --- a/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/core/config/SwaggerConfig.java +++ b/spring-boot/ruoyi-admin/src/main/java/com/ruoyi/web/core/config/SwaggerConfig.java @@ -2,6 +2,7 @@ package com.ruoyi.web.core.config; import java.util.ArrayList; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.beans.factory.annotation.Value; import org.springframework.context.annotation.Bean; @@ -23,22 +24,27 @@ import springfox.documentation.swagger2.annotations.EnableSwagger2; /** * Swagger2的接口配置 - * + * * @author ruoyi */ @Configuration @EnableSwagger2 -public class SwaggerConfig -{ - /** 系统基础配置 */ +public class SwaggerConfig { + /** + * 系统基础配置 + */ @Autowired private RuoYiConfig ruoyiConfig; - /** 是否开启swagger */ + /** + * 是否开启swagger + */ @Value("${swagger.enabled}") private boolean enabled; - /** 设置请求的统一前缀 */ + /** + * 设置请求的统一前缀 + */ @Value("${swagger.pathMapping}") private String pathMapping; @@ -46,8 +52,7 @@ public class SwaggerConfig * 创建API */ @Bean - public Docket createRestApi() - { + public Docket createRestApi() { return new Docket(DocumentationType.SWAGGER_2) // 是否启用Swagger .enable(enabled) @@ -71,8 +76,7 @@ public class SwaggerConfig /** * 安全模式，这里指定token通过Authorization头请求头传递 */ - private List securitySchemes() - { + private List securitySchemes() { List apiKeyList = new ArrayList(); apiKeyList.add(new ApiKey("Authorization", "Authorization", "header")); return apiKeyList; @@ -81,8 +85,7 @@ public class SwaggerConfig /** * 安全上下文 */ - private List securityContexts() - { + private List securityContexts() { List securityContexts = new ArrayList<>(); securityContexts.add( SecurityContext.builder() @@ -95,8 +98,7 @@ public class SwaggerConfig /** * 默认的安全上引用 */ - private List defaultAuth() - { + private List defaultAuth() { AuthorizationScope authorizationScope = new AuthorizationScope("global", "accessEverything"); AuthorizationScope[] authorizationScopes = new AuthorizationScope[1]; authorizationScopes[0] = authorizationScope; @@ -108,8 +110,7 @@ public class SwaggerConfig /** * 添加摘要信息 */ - private ApiInfo apiInfo() - { + private ApiInfo apiInfo() { // 用ApiInfoBuilder进行定制 return new ApiInfoBuilder() // 设置标题 diff --git a/spring-boot/ruoyi-admin/src/main/resources/application-druid.yml b/spring-boot/ruoyi-admin/src/main/resources/application-druid.yml index 41297b37..15942599 100644 --- a/spring-boot/ruoyi-admin/src/main/resources/application-druid.yml +++ b/spring-boot/ruoyi-admin/src/main/resources/application-druid.yml @@ -1,57 +1,57 @@ # 数据源配置 spring: - datasource: - type: com.alibaba.druid.pool.DruidDataSource - driverClassName: com.mysql.cj.jdbc.Driver - druid: - # 主库数据源 - master: - url: jdbc:mysql://localhost:3306/wumei-smart?useUnicode=true&characterEncoding=utf8&zeroDateTimeBehavior=convertToNull&useSSL=true&serverTimezone=GMT%2B8 - username: root - password: root - # 从库数据源 - slave: - # 从数据源开关/默认关闭 - enabled: false - url: - username: - password: - # 初始连接数 - initialSize: 5 - # 最小连接池数量 - minIdle: 10 - # 最大连接池数量 - maxActive: 20 - # 配置获取连接等待超时的时间 - maxWait: 60000 - # 配置间隔多久才进行一次检测，检测需要关闭的空闲连接，单位是毫秒 - timeBetweenEvictionRunsMillis: 60000 - # 配置一个连接在池中最小生存的时间，单位是毫秒 - minEvictableIdleTimeMillis: 300000 - # 配置一个连接在池中最大生存的时间，单位是毫秒 - maxEvictableIdleTimeMillis: 900000 - # 配置检测连接是否有效 - validationQuery: SELECT 1 FROM DUAL - testWhileIdle: true - testOnBorrow: false - testOnReturn: false - webStatFilter: - enabled: true - statViewServlet: - enabled: true - # 设置白名单，不填则允许所有访问 - allow: - url-pattern: /druid/* - # 控制台管理用户名和密码 - login-username: - login-password: - filter: - stat: - enabled: true - # 慢SQL记录 - log-slow-sql: true - slow-sql-millis: 1000 - merge-sql: true - wall: - config: - multi-statement-allow: true \ No newline at end of file + datasource: + type: com.alibaba.druid.pool.DruidDataSource + driverClassName: com.mysql.cj.jdbc.Driver + druid: + # 主库数据源 + master: + url: jdbc:mysql://host:3306/develop_xiaoyi_wumei?useUnicode=true&characterEncoding=utf8&zeroDateTimeBehavior=convertToNull&useSSL=true&serverTimezone=GMT%2B8 + username: root + password: 123456 + # 从库数据源 + slave: + # 从数据源开关/默认关闭 + enabled: false + url: + username: + password: + # 初始连接数 + initialSize: 5 + # 最小连接池数量 + minIdle: 10 + # 最大连接池数量 + maxActive: 20 + # 配置获取连接等待超时的时间 + maxWait: 60000 + # 配置间隔多久才进行一次检测，检测需要关闭的空闲连接，单位是毫秒 + timeBetweenEvictionRunsMillis: 60000 + # 配置一个连接在池中最小生存的时间，单位是毫秒 + minEvictableIdleTimeMillis: 300000 + # 配置一个连接在池中最大生存的时间，单位是毫秒 + maxEvictableIdleTimeMillis: 900000 + # 配置检测连接是否有效 + validationQuery: SELECT 1 FROM DUAL + testWhileIdle: true + testOnBorrow: false + testOnReturn: false + webStatFilter: + enabled: true + statViewServlet: + enabled: true + # 设置白名单，不填则允许所有访问 + allow: + url-pattern: /druid/* + # 控制台管理用户名和密码 + login-username: + login-password: + filter: + stat: + enabled: true + # 慢SQL记录 + log-slow-sql: true + slow-sql-millis: 1000 + merge-sql: true + wall: + config: + multi-statement-allow: true \ No newline at end of file diff --git a/spring-boot/ruoyi-admin/src/main/resources/application.yml b/spring-boot/ruoyi-admin/src/main/resources/application.yml index 8a05437d..bf4491bd 100644 --- a/spring-boot/ruoyi-admin/src/main/resources/application.yml +++ b/spring-boot/ruoyi-admin/src/main/resources/application.yml @@ -18,7 +18,7 @@ ruoyi: # 开发环境配置 server: # 服务器的HTTP端口，默认为8080 - port: 8080 + port: 9160 servlet: # 应用的访问路径 context-path: / @@ -42,15 +42,15 @@ spring: messages: # 国际化资源文件路径 basename: i18n/messages - profiles: + profiles: active: druid # 文件上传 servlet: - multipart: - # 单个文件大小 - max-file-size: 10MB - # 设置总上传的文件大小 - max-request-size: 20MB + multipart: + # 单个文件大小 + max-file-size: 10MB + # 设置总上传的文件大小 + max-request-size: 20MB # 服务模块 devtools: restart: @@ -82,36 +82,36 @@ spring: mqtt: username: admin # 账号 password: admin # 密码 - host-url: tcp://localhost:1883 # mqtt连接tcp地址 - client-id: server-${random.value} # 客户端Id，每个启动的id要不同 随机：${random.value} + host-url: tcp://host:1883 # mqtt连接tcp地址 + client-id: server-xiaoyi-${random.value} # 客户端Id，每个启动的id要不同 随机：${random.value} default-topic: test # 默认主题 timeout: 100 # 超时时间 keepalive: 100 # 保持连接数 # token配置 token: - # 令牌自定义标识 - header: Authorization - # 令牌密钥 - secret: abcdefghijklmnopqrstuvwxyz - # 令牌有效期（默认30分钟，设置为1周过期） - expireTime: 10000 - + # 令牌自定义标识 + header: Authorization + # 令牌密钥 + secret: abcdefghijklmnopqrstuvwxyz + # 令牌有效期（默认30分钟，设置为1周过期） + expireTime: 10000 + # MyBatis配置 mybatis: - # 搜索指定包别名 - typeAliasesPackage: com.ruoyi.**.domain - # 配置mapper的扫描，找到所有的mapper.xml映射文件 - mapperLocations: classpath*:mapper/**/*Mapper.xml - # 加载全局的配置文件 - configLocation: classpath:mybatis/mybatis-config.xml + # 搜索指定包别名 + typeAliasesPackage: com.ruoyi.**.domain + # 配置mapper的扫描，找到所有的mapper.xml映射文件 + mapperLocations: classpath*:mapper/**/*Mapper.xml + # 加载全局的配置文件 + configLocation: classpath:mybatis/mybatis-config.xml # PageHelper分页插件 -pagehelper: +pagehelper: helperDialect: mysql reasonable: false supportMethodsArguments: true - params: count=countSql + params: count=countSql # Swagger配置 swagger: @@ -121,10 +121,26 @@ swagger: pathMapping: /dev-api # 防止XSS攻击 -xss: +xss: # 过滤开关 enabled: true # 排除链接（多个用逗号分隔） excludes: /system/notice/* # 匹配链接 urlPatterns: /system/*,/monitor/*,/tool/* + +# 公众号配置(必填) +wx: + miniapp: + appid: appid # # + appSecret: appSecret # # + config-storage: + type: Memory # 配置类型: Memory(默认), Jedis, RedisTemplate + key-prefix: wa # 相关redis前缀配置: wa(默认) + redis: + host: 127.0.0.1 + port: 6379 + passowrd: + # http客户端配置 + http-client-type: HttpClient # http客户端类型: HttpClient(默认), OkHttp, JoddHttp + diff --git a/spring-boot/ruoyi-admin/src/main/resources/i18n/messages.properties b/spring-boot/ruoyi-admin/src/main/resources/i18n/messages.properties index d63aa1f8..46f023be 100644 --- a/spring-boot/ruoyi-admin/src/main/resources/i18n/messages.properties +++ b/spring-boot/ruoyi-admin/src/main/resources/i18n/messages.properties @@ -10,23 +10,18 @@ user.password.delete=对不起，您的账号已被删除 user.blocked=用户已封禁，请联系管理员 role.blocked=角色已封禁，请联系管理员 user.logout.success=退出成功 - length.not.valid=长度必须在{min}到{max}个字符之间 - user.username.not.valid=* 2到20个汉字、字母、数字或下划线组成，且必须以非数字开头 user.password.not.valid=* 5-50个字符 - user.email.not.valid=邮箱格式错误 user.mobile.phone.number.not.valid=手机号格式错误 user.login.success=登录成功 user.notfound=请重新登录 user.forcelogout=管理员强制退出，请重新登录 user.unknown.error=未知错误，请重新登录 - ##文件上传消息 upload.exceed.maxSize=上传的文件大小超出限制的文件大小！
允许的文件最大大小是：{0}MB！ upload.filename.exceed.length=上传的文件名最长{0}个字符 - ##权限 no.permission=您没有数据的权限，请联系管理员添加权限 [{0}] no.create.permission=您没有创建数据的权限，请联系管理员添加权限 [{0}] diff --git a/spring-boot/ruoyi-admin/src/main/resources/logback.xml b/spring-boot/ruoyi-admin/src/main/resources/logback.xml index a360583f..7793b8d8 100644 --- a/spring-boot/ruoyi-admin/src/main/resources/logback.xml +++ b/spring-boot/ruoyi-admin/src/main/resources/logback.xml @@ -1,31 +1,31 @@ - + - + - - - - ${log.pattern} - - - - - - ${log.path}/sys-info.log + + + + ${log.pattern} + + + + + + ${log.path}/sys-info.log - + - ${log.path}/sys-info.%d{yyyy-MM-dd}.log - - 60 - - - ${log.pattern} - - + ${log.path}/sys-info.%d{yyyy-MM-dd}.log + + 60 + + + ${log.pattern} + + INFO @@ -33,16 +33,16 @@ DENY - - - - ${log.path}/sys-error.log + + + + ${log.path}/sys-error.log ${log.path}/sys-error.%d{yyyy-MM-dd}.log - - 60 + + 60 ${log.pattern} @@ -50,16 +50,16 @@ ERROR - + ACCEPT - + DENY - - + + - ${log.path}/sys-user.log + ${log.path}/sys-user.log ${log.path}/sys-user.%d{yyyy-MM-dd}.log @@ -70,23 +70,23 @@ ${log.pattern} - - - - - - - - - - + + + + + - - + - - + + + + + + + + diff --git a/spring-boot/ruoyi-admin/src/main/resources/mybatis/mybatis-config.xml b/spring-boot/ruoyi-admin/src/main/resources/mybatis/mybatis-config.xml index e8b52be8..55005995 100644 --- a/spring-boot/ruoyi-admin/src/main/resources/mybatis/mybatis-config.xml +++ b/spring-boot/ruoyi-admin/src/main/resources/mybatis/mybatis-config.xml @@ -1,15 +1,15 @@ + PUBLIC "-//mybatis.org//DTD Config 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-config.dtd"> - - - - - - - - - + + + + + + + + + diff --git a/spring-boot/ruoyi-common/pom.xml b/spring-boot/ruoyi-common/pom.xml index bc2327cb..e6d5e8e0 100644 --- a/spring-boot/ruoyi-common/pom.xml +++ b/spring-boot/ruoyi-common/pom.xml @@ -52,7 +52,7 @@ org.apache.commons commons-lang3 - + com.fasterxml.jackson.core @@ -118,6 +118,31 @@ javax.servlet javax.servlet-api + + org.projectlombok + lombok + + + org.projectlombok + lombok + 1.18.20 + + + com.github.binarywang + weixin-java-miniapp + 4.1.5.B + compile + + + com.github.binarywang + weixin-java-miniapp + 4.1.5.B + + + com.github.binarywang + weixin-java-mp + 4.1.5.B + diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataScope.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataScope.java index 176878e9..b0d4b7ff 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataScope.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataScope.java @@ -8,14 +8,13 @@ import java.lang.annotation.Target; /** * 数据权限过滤注解 - * + * * @author ruoyi */ @Target(ElementType.METHOD) @Retention(RetentionPolicy.RUNTIME) @Documented -public @interface DataScope -{ +public @interface DataScope { /** * 部门表的别名 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataSource.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataSource.java index 79cd191f..48f6ffdb 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataSource.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/DataSource.java @@ -6,21 +6,21 @@ import java.lang.annotation.Inherited; import java.lang.annotation.Retention; import java.lang.annotation.RetentionPolicy; import java.lang.annotation.Target; + import com.ruoyi.common.enums.DataSourceType; /** * 自定义多数据源切换注解 - * + *

* 优先级：先方法，后类，如果方法覆盖了类上的数据源类型，以方法的为准，否则以类上的为准 * * @author ruoyi */ -@Target({ ElementType.METHOD, ElementType.TYPE }) +@Target({ElementType.METHOD, ElementType.TYPE}) @Retention(RetentionPolicy.RUNTIME) @Documented @Inherited -public @interface DataSource -{ +public @interface DataSource { /** * 切换数据源名称 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excel.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excel.java index b09f4cec..c21655e8 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excel.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excel.java @@ -8,13 +8,12 @@ import java.math.BigDecimal; /** * 自定义导出Excel数据注解 - * + * * @author ruoyi */ @Retention(RetentionPolicy.RUNTIME) @Target(ElementType.FIELD) -public @interface Excel -{ +public @interface Excel { /** * 导出时在excel中排序 */ @@ -110,18 +109,15 @@ public @interface Excel */ Align align() default Align.AUTO; - public enum Align - { + public enum Align { AUTO(0), LEFT(1), CENTER(2), RIGHT(3); private final int value; - Align(int value) - { + Align(int value) { this.value = value; } - public int value() - { + public int value() { return this.value; } } @@ -131,34 +127,28 @@ public @interface Excel */ Type type() default Type.ALL; - public enum Type - { + public enum Type { ALL(0), EXPORT(1), IMPORT(2); private final int value; - Type(int value) - { + Type(int value) { this.value = value; } - public int value() - { + public int value() { return this.value; } } - public enum ColumnType - { + public enum ColumnType { NUMERIC(0), STRING(1), IMAGE(2); private final int value; - ColumnType(int value) - { + ColumnType(int value) { this.value = value; } - public int value() - { + public int value() { return this.value; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excels.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excels.java index d33004f5..271210ef 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excels.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Excels.java @@ -7,12 +7,11 @@ import java.lang.annotation.Target; /** * Excel注解集 - * + * * @author ruoyi */ @Target(ElementType.FIELD) @Retention(RetentionPolicy.RUNTIME) -public @interface Excels -{ +public @interface Excels { Excel[] value(); } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Log.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Log.java index eb05dc7c..a8683c8a 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Log.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/Log.java @@ -5,22 +5,21 @@ import java.lang.annotation.ElementType; import java.lang.annotation.Retention; import java.lang.annotation.RetentionPolicy; import java.lang.annotation.Target; + import com.ruoyi.common.enums.BusinessType; import com.ruoyi.common.enums.OperatorType; /** * 自定义操作日志记录注解 - * - * @author ruoyi * + * @author ruoyi */ -@Target({ ElementType.PARAMETER, ElementType.METHOD }) +@Target({ElementType.PARAMETER, ElementType.METHOD}) @Retention(RetentionPolicy.RUNTIME) @Documented -public @interface Log -{ +public @interface Log { /** - * 模块 + * 模块 */ public String title() default ""; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/RepeatSubmit.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/RepeatSubmit.java index 9e350f17..29c667f8 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/RepeatSubmit.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/annotation/RepeatSubmit.java @@ -9,15 +9,13 @@ import java.lang.annotation.Target; /** * 自定义注解防止表单重复提交 - * - * @author ruoyi * + * @author ruoyi */ @Inherited @Target(ElementType.METHOD) @Retention(RetentionPolicy.RUNTIME) @Documented -public @interface RepeatSubmit -{ +public @interface RepeatSubmit { } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/RuoYiConfig.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/RuoYiConfig.java index d5d8723f..efc85bdb 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/RuoYiConfig.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/RuoYiConfig.java @@ -5,112 +5,108 @@ import org.springframework.stereotype.Component; /** * 读取项目相关配置 - * + * * @author ruoyi */ @Component @ConfigurationProperties(prefix = "ruoyi") -public class RuoYiConfig -{ - /** 项目名称 */ +public class RuoYiConfig { + /** + * 项目名称 + */ private String name; - /** 版本 */ + /** + * 版本 + */ private String version; - /** 版权年份 */ + /** + * 版权年份 + */ private String copyrightYear; - /** 实例演示开关 */ + /** + * 实例演示开关 + */ private boolean demoEnabled; - /** 上传路径 */ + /** + * 上传路径 + */ private static String profile; - /** 获取地址开关 */ + /** + * 获取地址开关 + */ private static boolean addressEnabled; - public String getName() - { + public String getName() { return name; } - public void setName(String name) - { + public void setName(String name) { this.name = name; } - public String getVersion() - { + public String getVersion() { return version; } - public void setVersion(String version) - { + public void setVersion(String version) { this.version = version; } - public String getCopyrightYear() - { + public String getCopyrightYear() { return copyrightYear; } - public void setCopyrightYear(String copyrightYear) - { + public void setCopyrightYear(String copyrightYear) { this.copyrightYear = copyrightYear; } - public boolean isDemoEnabled() - { + public boolean isDemoEnabled() { return demoEnabled; } - public void setDemoEnabled(boolean demoEnabled) - { + public void setDemoEnabled(boolean demoEnabled) { this.demoEnabled = demoEnabled; } - public static String getProfile() - { + public static String getProfile() { return profile; } - public void setProfile(String profile) - { + public void setProfile(String profile) { RuoYiConfig.profile = profile; } - public static boolean isAddressEnabled() - { + public static boolean isAddressEnabled() { return addressEnabled; } - public void setAddressEnabled(boolean addressEnabled) - { + public void setAddressEnabled(boolean addressEnabled) { RuoYiConfig.addressEnabled = addressEnabled; } /** * 获取头像上传路径 */ - public static String getAvatarPath() - { + public static String getAvatarPath() { return getProfile() + "/avatar"; } /** * 获取下载路径 */ - public static String getDownloadPath() - { + public static String getDownloadPath() { return getProfile() + "/download/"; } /** * 获取上传路径 */ - public static String getUploadPath() - { + public static String getUploadPath() { return getProfile() + "/upload"; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxConfig.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxConfig.java new file mode 100644 index 00000000..b07732cc --- /dev/null +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxConfig.java @@ -0,0 +1,36 @@ +package com.ruoyi.common.config; + +import cn.binarywang.wx.miniapp.api.WxMaService; +import cn.binarywang.wx.miniapp.api.impl.WxMaServiceImpl; +import cn.binarywang.wx.miniapp.config.WxMaConfig; +import cn.binarywang.wx.miniapp.config.impl.WxMaDefaultConfigImpl; +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.context.annotation.Bean; +import org.springframework.context.annotation.Configuration; + +@Configuration +public class WxConfig { + + @Autowired + private WxProperties properties; + + @Bean + public WxMaConfig wxMaConfig() { + WxMaDefaultConfigImpl config = new WxMaDefaultConfigImpl(); + + config.setAppid(properties.getAppId()); + config.setSecret(properties.getAppSecret()); + return config; + } + + @Bean + public WxMaService wxMaService(WxMaConfig maConfig) { + WxMaService service = new WxMaServiceImpl(); + service.setWxMaConfig(maConfig); + return service; + } + +} + + + diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxMpConfig.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxMpConfig.java new file mode 100644 index 00000000..71531c32 --- /dev/null +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxMpConfig.java @@ -0,0 +1,50 @@ +package com.ruoyi.common.config; + +import com.ruoyi.common.constant.Constants; +import me.chanjar.weixin.mp.api.WxMpQrcodeService; +import me.chanjar.weixin.mp.api.WxMpService; +import me.chanjar.weixin.mp.api.impl.WxMpQrcodeServiceImpl; +import me.chanjar.weixin.mp.api.impl.WxMpServiceImpl; +import me.chanjar.weixin.mp.config.WxMpConfigStorage; +import me.chanjar.weixin.mp.config.impl.WxMpDefaultConfigImpl; +import org.springframework.context.annotation.Bean; +import org.springframework.context.annotation.Configuration; + +/** + * 类名: WxConfig + * 描述: TODO + * 时间: 2021/1/10 13:08 + * 开发人: admin + */ +@Configuration +public class WxMpConfig { + + @Bean + public WxMpConfigStorage wxMpConfigStorage() { + + WxMpDefaultConfigImpl wxMpInMemoryConfigStorage = new WxMpDefaultConfigImpl(); + //设置appid 这个在项目中肯定是通过配置来实现 + wxMpInMemoryConfigStorage.setAppId(Constants.wxAppId); + //设置密码 + wxMpInMemoryConfigStorage.setSecret(Constants.wxAppSecret); + return wxMpInMemoryConfigStorage; + + } + + @Bean//文档中需要用到这个对象 + public WxMpService wxMpService() { + WxMpServiceImpl wxMpService = new WxMpServiceImpl(); + //设置微信配置的存储 + wxMpService.setWxMpConfigStorage(wxMpConfigStorage()); + return wxMpService; + + } + + @Bean//文档中需要用到这个对象 + public WxMpQrcodeService wxMpQrcodeService() { + WxMpQrcodeService wxMpQrcodeService = new WxMpQrcodeServiceImpl(wxMpService()); + //设置微信配置的存储 + return wxMpQrcodeService; + + } +} diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxProperties.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxProperties.java new file mode 100644 index 00000000..05fb732c --- /dev/null +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/config/WxProperties.java @@ -0,0 +1,69 @@ +package com.ruoyi.common.config; + +import org.springframework.boot.context.properties.ConfigurationProperties; +import org.springframework.context.annotation.Configuration; + +@Configuration +@ConfigurationProperties(prefix = "wx.miniapp") +public class WxProperties { + + private String appId; + + private String appSecret; + + private String mchId; + + private String mchKey; + + private String notifyUrl; + + private String keyPath; + + public String getNotifyUrl() { + return notifyUrl; + } + + public void setNotifyUrl(String notifyUrl) { + this.notifyUrl = notifyUrl; + } + + public String getMchKey() { + return mchKey; + } + + public void setMchKey(String mchKey) { + this.mchKey = mchKey; + } + + public String getAppId() { + return this.appId; + } + + public void setAppId(String appId) { + this.appId = appId; + } + + public String getAppSecret() { + return appSecret; + } + + public void setAppSecret(String appSecret) { + this.appSecret = appSecret; + } + + public String getMchId() { + return mchId; + } + + public void setMchId(String mchId) { + this.mchId = mchId; + } + + public String getKeyPath() { + return keyPath; + } + + public void setKeyPath(String keyPath) { + this.keyPath = keyPath; + } +} \ No newline at end of file diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/Constants.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/Constants.java index 6e13ac15..9cb56056 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/Constants.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/Constants.java @@ -2,11 +2,10 @@ package com.ruoyi.common.constant; /** * 通用常量信息 - * + * * @author ruoyi */ -public class Constants -{ +public class Constants { /** * UTF-8 字符集 */ @@ -61,7 +60,7 @@ public class Constants * 登录用户 redis key */ public static final String LOGIN_TOKEN_KEY = "login_tokens:"; - + /** * 防重提交 redis key */ @@ -126,4 +125,8 @@ public class Constants * 资源映射路径 前缀 */ public static final String RESOURCE_PREFIX = "/profile"; + public static final String DEFAULT_AVATAR = "https://c-ssl.duitang.com/uploads/item/201912/27/20191227145714_rtHRc.thumb.1000_0.jpeg"; + + public static String wxAppId = "wx00e680cbf69d159c"; + public static String wxAppSecret = "4902e0e4470663112f505f498b036c55"; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/GenConstants.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/GenConstants.java index 1fa328e4..c831bd7f 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/GenConstants.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/GenConstants.java @@ -2,113 +2,180 @@ package com.ruoyi.common.constant; /** * 代码生成通用常量 - * + * * @author ruoyi */ -public class GenConstants -{ - /** 单表（增删改查） */ +public class GenConstants { + /** + * 单表（增删改查） + */ public static final String TPL_CRUD = "crud"; - /** 树表（增删改查） */ + /** + * 树表（增删改查） + */ public static final String TPL_TREE = "tree"; - /** 主子表（增删改查） */ + /** + * 主子表（增删改查） + */ public static final String TPL_SUB = "sub"; - /** 树编码字段 */ + /** + * 树编码字段 + */ public static final String TREE_CODE = "treeCode"; - /** 树父编码字段 */ + /** + * 树父编码字段 + */ public static final String TREE_PARENT_CODE = "treeParentCode"; - /** 树名称字段 */ + /** + * 树名称字段 + */ public static final String TREE_NAME = "treeName"; - /** 上级菜单ID字段 */ + /** + * 上级菜单ID字段 + */ public static final String PARENT_MENU_ID = "parentMenuId"; - /** 上级菜单名称字段 */ + /** + * 上级菜单名称字段 + */ public static final String PARENT_MENU_NAME = "parentMenuName"; - /** 数据库字符串类型 */ - public static final String[] COLUMNTYPE_STR = { "char", "varchar", "nvarchar", "varchar2" }; + /** + * 数据库字符串类型 + */ + public static final String[] COLUMNTYPE_STR = {"char", "varchar", "nvarchar", "varchar2"}; - /** 数据库文本类型 */ - public static final String[] COLUMNTYPE_TEXT = { "tinytext", "text", "mediumtext", "longtext" }; + /** + * 数据库文本类型 + */ + public static final String[] COLUMNTYPE_TEXT = {"tinytext", "text", "mediumtext", "longtext"}; - /** 数据库时间类型 */ - public static final String[] COLUMNTYPE_TIME = { "datetime", "time", "date", "timestamp" }; + /** + * 数据库时间类型 + */ + public static final String[] COLUMNTYPE_TIME = {"datetime", "time", "date", "timestamp"}; - /** 数据库数字类型 */ - public static final String[] COLUMNTYPE_NUMBER = { "tinyint", "smallint", "mediumint", "int", "number", "integer", - "bit", "bigint", "float", "double", "decimal" }; + /** + * 数据库数字类型 + */ + public static final String[] COLUMNTYPE_NUMBER = {"tinyint", "smallint", "mediumint", "int", "number", "integer", + "bit", "bigint", "float", "double", "decimal"}; - /** 页面不需要编辑字段 */ - public static final String[] COLUMNNAME_NOT_EDIT = { "id", "create_by", "create_time", "del_flag" }; + /** + * 页面不需要编辑字段 + */ + public static final String[] COLUMNNAME_NOT_EDIT = {"id", "create_by", "create_time", "del_flag"}; - /** 页面不需要显示的列表字段 */ - public static final String[] COLUMNNAME_NOT_LIST = { "id", "create_by", "create_time", "del_flag", "update_by", - "update_time" }; + /** + * 页面不需要显示的列表字段 + */ + public static final String[] COLUMNNAME_NOT_LIST = {"id", "create_by", "create_time", "del_flag", "update_by", + "update_time"}; - /** 页面不需要查询字段 */ - public static final String[] COLUMNNAME_NOT_QUERY = { "id", "create_by", "create_time", "del_flag", "update_by", - "update_time", "remark" }; + /** + * 页面不需要查询字段 + */ + public static final String[] COLUMNNAME_NOT_QUERY = {"id", "create_by", "create_time", "del_flag", "update_by", + "update_time", "remark"}; - /** Entity基类字段 */ - public static final String[] BASE_ENTITY = { "createBy", "createTime", "updateBy", "updateTime", "remark" }; + /** + * Entity基类字段 + */ + public static final String[] BASE_ENTITY = {"createBy", "createTime", "updateBy", "updateTime", "remark"}; - /** Tree基类字段 */ - public static final String[] TREE_ENTITY = { "parentName", "parentId", "orderNum", "ancestors", "children" }; + /** + * Tree基类字段 + */ + public static final String[] TREE_ENTITY = {"parentName", "parentId", "orderNum", "ancestors", "children"}; - /** 文本框 */ + /** + * 文本框 + */ public static final String HTML_INPUT = "input"; - /** 文本域 */ + /** + * 文本域 + */ public static final String HTML_TEXTAREA = "textarea"; - /** 下拉框 */ + /** + * 下拉框 + */ public static final String HTML_SELECT = "select"; - /** 单选框 */ + /** + * 单选框 + */ public static final String HTML_RADIO = "radio"; - /** 复选框 */ + /** + * 复选框 + */ public static final String HTML_CHECKBOX = "checkbox"; - /** 日期控件 */ + /** + * 日期控件 + */ public static final String HTML_DATETIME = "datetime"; - /** 图片上传控件 */ + /** + * 图片上传控件 + */ public static final String HTML_IMAGE_UPLOAD = "imageUpload"; - /** 文件上传控件 */ + /** + * 文件上传控件 + */ public static final String HTML_FILE_UPLOAD = "fileUpload"; - /** 富文本控件 */ + /** + * 富文本控件 + */ public static final String HTML_EDITOR = "editor"; - /** 字符串类型 */ + /** + * 字符串类型 + */ public static final String TYPE_STRING = "String"; - /** 整型 */ + /** + * 整型 + */ public static final String TYPE_INTEGER = "Integer"; - /** 长整型 */ + /** + * 长整型 + */ public static final String TYPE_LONG = "Long"; - /** 浮点型 */ + /** + * 浮点型 + */ public static final String TYPE_DOUBLE = "Double"; - /** 高精度计算类型 */ + /** + * 高精度计算类型 + */ public static final String TYPE_BIGDECIMAL = "BigDecimal"; - /** 时间类型 */ + /** + * 时间类型 + */ public static final String TYPE_DATE = "Date"; - /** 模糊查询 */ + /** + * 模糊查询 + */ public static final String QUERY_LIKE = "LIKE"; - /** 需要 */ + /** + * 需要 + */ public static final String REQUIRE = "1"; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/HttpStatus.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/HttpStatus.java index d60afee2..4ce8f31a 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/HttpStatus.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/HttpStatus.java @@ -2,11 +2,10 @@ package com.ruoyi.common.constant; /** * 返回状态码 - * + * * @author ruoyi */ -public class HttpStatus -{ +public class HttpStatus { /** * 操作成功 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/ScheduleConstants.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/ScheduleConstants.java index 62ad8154..0af14ad2 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/ScheduleConstants.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/ScheduleConstants.java @@ -2,30 +2,38 @@ package com.ruoyi.common.constant; /** * 任务调度通用常量 - * + * * @author ruoyi */ -public class ScheduleConstants -{ +public class ScheduleConstants { public static final String TASK_CLASS_NAME = "TASK_CLASS_NAME"; - /** 执行目标key */ + /** + * 执行目标key + */ public static final String TASK_PROPERTIES = "TASK_PROPERTIES"; - /** 默认 */ + /** + * 默认 + */ public static final String MISFIRE_DEFAULT = "0"; - /** 立即触发执行 */ + /** + * 立即触发执行 + */ public static final String MISFIRE_IGNORE_MISFIRES = "1"; - /** 触发一次执行 */ + /** + * 触发一次执行 + */ public static final String MISFIRE_FIRE_AND_PROCEED = "2"; - /** 不触发立即执行 */ + /** + * 不触发立即执行 + */ public static final String MISFIRE_DO_NOTHING = "3"; - public enum Status - { + public enum Status { /** * 正常 */ @@ -37,13 +45,11 @@ public class ScheduleConstants private String value; - private Status(String value) - { + private Status(String value) { this.value = value; } - public String getValue() - { + public String getValue() { return value; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/UserConstants.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/UserConstants.java index 56b46ba8..67bc9baf 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/UserConstants.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/constant/UserConstants.java @@ -2,62 +2,93 @@ package com.ruoyi.common.constant; /** * 用户常量信息 - * + * * @author ruoyi */ -public class UserConstants -{ +public class UserConstants { /** * 平台内系统用户的唯一标志 */ public static final String SYS_USER = "SYS_USER"; - /** 正常状态 */ + /** + * 正常状态 + */ public static final String NORMAL = "0"; - /** 异常状态 */ + /** + * 异常状态 + */ public static final String EXCEPTION = "1"; - /** 用户封禁状态 */ + /** + * 用户封禁状态 + */ public static final String USER_DISABLE = "1"; - /** 角色封禁状态 */ + /** + * 角色封禁状态 + */ public static final String ROLE_DISABLE = "1"; - /** 部门正常状态 */ + /** + * 部门正常状态 + */ public static final String DEPT_NORMAL = "0"; - /** 部门停用状态 */ + /** + * 部门停用状态 + */ public static final String DEPT_DISABLE = "1"; - /** 字典正常状态 */ + /** + * 字典正常状态 + */ public static final String DICT_NORMAL = "0"; - /** 是否为系统默认（是） */ + /** + * 是否为系统默认（是） + */ public static final String YES = "Y"; - /** 是否菜单外链（是） */ + /** + * 是否菜单外链（是） + */ public static final String YES_FRAME = "0"; - /** 是否菜单外链（否） */ + /** + * 是否菜单外链（否） + */ public static final String NO_FRAME = "1"; - /** 菜单类型（目录） */ + /** + * 菜单类型（目录） + */ public static final String TYPE_DIR = "M"; - /** 菜单类型（菜单） */ + /** + * 菜单类型（菜单） + */ public static final String TYPE_MENU = "C"; - /** 菜单类型（按钮） */ + /** + * 菜单类型（按钮） + */ public static final String TYPE_BUTTON = "F"; - /** Layout组件标识 */ + /** + * Layout组件标识 + */ public final static String LAYOUT = "Layout"; - /** ParentView组件标识 */ + /** + * ParentView组件标识 + */ public final static String PARENT_VIEW = "ParentView"; - /** 校验返回结果码 */ + /** + * 校验返回结果码 + */ public final static String UNIQUE = "0"; public final static String NOT_UNIQUE = "1"; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/controller/BaseController.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/controller/BaseController.java index 2a31e70f..2eae5289 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/controller/BaseController.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/controller/BaseController.java @@ -3,6 +3,7 @@ package com.ruoyi.common.core.controller; import java.beans.PropertyEditorSupport; import java.util.Date; import java.util.List; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.web.bind.WebDataBinder; @@ -20,25 +21,21 @@ import com.ruoyi.common.utils.sql.SqlUtil; /** * web层通用数据处理 - * + * * @author ruoyi */ -public class BaseController -{ +public class BaseController { protected final Logger logger = LoggerFactory.getLogger(BaseController.class); /** * 将前台传递过来的日期格式的字符串，自动转化为Date类型 */ @InitBinder - public void initBinder(WebDataBinder binder) - { + public void initBinder(WebDataBinder binder) { // Date 类型转换 - binder.registerCustomEditor(Date.class, new PropertyEditorSupport() - { + binder.registerCustomEditor(Date.class, new PropertyEditorSupport() { @Override - public void setAsText(String text) - { + public void setAsText(String text) { setValue(DateUtils.parseDate(text)); } }); @@ -47,13 +44,11 @@ public class BaseController /** * 设置请求分页数据 */ - protected void startPage() - { + protected void startPage() { PageDomain pageDomain = TableSupport.buildPageRequest(); Integer pageNum = pageDomain.getPageNum(); Integer pageSize = pageDomain.getPageSize(); - if (StringUtils.isNotNull(pageNum) && StringUtils.isNotNull(pageSize)) - { + if (StringUtils.isNotNull(pageNum) && StringUtils.isNotNull(pageSize)) { String orderBy = SqlUtil.escapeOrderBySql(pageDomain.getOrderBy()); PageHelper.startPage(pageNum, pageSize, orderBy); } @@ -62,9 +57,8 @@ public class BaseController /** * 响应请求分页数据 */ - @SuppressWarnings({ "rawtypes", "unchecked" }) - protected TableDataInfo getDataTable(List list) - { + @SuppressWarnings({"rawtypes", "unchecked"}) + protected TableDataInfo getDataTable(List list) { TableDataInfo rspData = new TableDataInfo(); rspData.setCode(HttpStatus.SUCCESS); rspData.setMsg("查询成功"); @@ -75,20 +69,18 @@ public class BaseController /** * 响应返回结果 - * + * * @param rows 影响行数 * @return 操作结果 */ - protected AjaxResult toAjax(int rows) - { + protected AjaxResult toAjax(int rows) { return rows > 0 ? AjaxResult.success() : AjaxResult.error(); } /** * 页面跳转 */ - public String redirect(String url) - { + public String redirect(String url) { return StringUtils.format("redirect:{}", url); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/AjaxResult.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/AjaxResult.java index 28e5a688..f6db15df 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/AjaxResult.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/AjaxResult.java @@ -1,148 +1,142 @@ package com.ruoyi.common.core.domain; import java.util.HashMap; + import com.ruoyi.common.constant.HttpStatus; import com.ruoyi.common.utils.StringUtils; /** * 操作消息提醒 - * + * * @author ruoyi */ -public class AjaxResult extends HashMap -{ +public class AjaxResult extends HashMap { private static final long serialVersionUID = 1L; - /** 状态码 */ + /** + * 状态码 + */ public static final String CODE_TAG = "code"; - /** 返回内容 */ + /** + * 返回内容 + */ public static final String MSG_TAG = "msg"; - /** 数据对象 */ + /** + * 数据对象 + */ public static final String DATA_TAG = "data"; /** * 初始化一个新创建的 AjaxResult 对象，使其表示一个空消息。 */ - public AjaxResult() - { + public AjaxResult() { } /** * 初始化一个新创建的 AjaxResult 对象 - * + * * @param code 状态码 - * @param msg 返回内容 + * @param msg 返回内容 */ - public AjaxResult(int code, String msg) - { + public AjaxResult(int code, String msg) { super.put(CODE_TAG, code); super.put(MSG_TAG, msg); } /** * 初始化一个新创建的 AjaxResult 对象 - * + * * @param code 状态码 - * @param msg 返回内容 + * @param msg 返回内容 * @param data 数据对象 */ - public AjaxResult(int code, String msg, Object data) - { + public AjaxResult(int code, String msg, Object data) { super.put(CODE_TAG, code); super.put(MSG_TAG, msg); - if (StringUtils.isNotNull(data)) - { + if (StringUtils.isNotNull(data)) { super.put(DATA_TAG, data); } } /** * 返回成功消息 - * + * * @return 成功消息 */ - public static AjaxResult success() - { + public static AjaxResult success() { return AjaxResult.success("操作成功"); } /** * 返回成功数据 - * + * * @return 成功消息 */ - public static AjaxResult success(Object data) - { + public static AjaxResult success(Object data) { return AjaxResult.success("操作成功", data); } /** * 返回成功消息 - * + * * @param msg 返回内容 * @return 成功消息 */ - public static AjaxResult success(String msg) - { + public static AjaxResult success(String msg) { return AjaxResult.success(msg, null); } /** * 返回成功消息 - * - * @param msg 返回内容 + * + * @param msg 返回内容 * @param data 数据对象 * @return 成功消息 */ - public static AjaxResult success(String msg, Object data) - { + public static AjaxResult success(String msg, Object data) { return new AjaxResult(HttpStatus.SUCCESS, msg, data); } /** * 返回错误消息 - * + * * @return */ - public static AjaxResult error() - { + public static AjaxResult error() { return AjaxResult.error("操作失败"); } /** * 返回错误消息 - * + * * @param msg 返回内容 * @return 警告消息 */ - public static AjaxResult error(String msg) - { + public static AjaxResult error(String msg) { return AjaxResult.error(msg, null); } /** * 返回错误消息 - * - * @param msg 返回内容 + * + * @param msg 返回内容 * @param data 数据对象 * @return 警告消息 */ - public static AjaxResult error(String msg, Object data) - { + public static AjaxResult error(String msg, Object data) { return new AjaxResult(HttpStatus.ERROR, msg, data); } /** * 返回错误消息 - * + * * @param code 状态码 - * @param msg 返回内容 + * @param msg 返回内容 * @return 警告消息 */ - public static AjaxResult error(int code, String msg) - { + public static AjaxResult error(int code, String msg) { return new AjaxResult(code, msg, null); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/BaseEntity.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/BaseEntity.java index f7d5bf46..093fee41 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/BaseEntity.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/BaseEntity.java @@ -4,111 +4,110 @@ import java.io.Serializable; import java.util.Date; import java.util.HashMap; import java.util.Map; + import com.fasterxml.jackson.annotation.JsonFormat; /** * Entity基类 - * + * * @author ruoyi */ -public class BaseEntity implements Serializable -{ +public class BaseEntity implements Serializable { private static final long serialVersionUID = 1L; - /** 搜索值 */ + /** + * 搜索值 + */ private String searchValue; - /** 创建者 */ + /** + * 创建者 + */ private String createBy; - /** 创建时间 */ + /** + * 创建时间 + */ @JsonFormat(pattern = "yyyy-MM-dd HH:mm:ss") private Date createTime; - /** 更新者 */ + /** + * 更新者 + */ private String updateBy; - /** 更新时间 */ + /** + * 更新时间 + */ @JsonFormat(pattern = "yyyy-MM-dd HH:mm:ss") private Date updateTime; - /** 备注 */ + /** + * 备注 + */ private String remark; - /** 请求参数 */ + /** + * 请求参数 + */ private Map params; - public String getSearchValue() - { + public String getSearchValue() { return searchValue; } - public void setSearchValue(String searchValue) - { + public void setSearchValue(String searchValue) { this.searchValue = searchValue; } - public String getCreateBy() - { + public String getCreateBy() { return createBy; } - public void setCreateBy(String createBy) - { + public void setCreateBy(String createBy) { this.createBy = createBy; } - public Date getCreateTime() - { + public Date getCreateTime() { return createTime; } - public void setCreateTime(Date createTime) - { + public void setCreateTime(Date createTime) { this.createTime = createTime; } - public String getUpdateBy() - { + public String getUpdateBy() { return updateBy; } - public void setUpdateBy(String updateBy) - { + public void setUpdateBy(String updateBy) { this.updateBy = updateBy; } - public Date getUpdateTime() - { + public Date getUpdateTime() { return updateTime; } - public void setUpdateTime(Date updateTime) - { + public void setUpdateTime(Date updateTime) { this.updateTime = updateTime; } - public String getRemark() - { + public String getRemark() { return remark; } - public void setRemark(String remark) - { + public void setRemark(String remark) { this.remark = remark; } - public Map getParams() - { - if (params == null) - { + public Map getParams() { + if (params == null) { params = new HashMap<>(); } return params; } - public void setParams(Map params) - { + public void setParams(Map params) { this.params = params; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeEntity.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeEntity.java index a180a18c..265c7385 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeEntity.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeEntity.java @@ -5,75 +5,74 @@ import java.util.List; /** * Tree基类 - * + * * @author ruoyi */ -public class TreeEntity extends BaseEntity -{ +public class TreeEntity extends BaseEntity { private static final long serialVersionUID = 1L; - /** 父菜单名称 */ + /** + * 父菜单名称 + */ private String parentName; - /** 父菜单ID */ + /** + * 父菜单ID + */ private Long parentId; - /** 显示顺序 */ + /** + * 显示顺序 + */ private Integer orderNum; - /** 祖级列表 */ + /** + * 祖级列表 + */ private String ancestors; - /** 子部门 */ + /** + * 子部门 + */ private List children = new ArrayList<>(); - public String getParentName() - { + public String getParentName() { return parentName; } - public void setParentName(String parentName) - { + public void setParentName(String parentName) { this.parentName = parentName; } - public Long getParentId() - { + public Long getParentId() { return parentId; } - public void setParentId(Long parentId) - { + public void setParentId(Long parentId) { this.parentId = parentId; } - public Integer getOrderNum() - { + public Integer getOrderNum() { return orderNum; } - public void setOrderNum(Integer orderNum) - { + public void setOrderNum(Integer orderNum) { this.orderNum = orderNum; } - public String getAncestors() - { + public String getAncestors() { return ancestors; } - public void setAncestors(String ancestors) - { + public void setAncestors(String ancestors) { this.ancestors = ancestors; } - public List getChildren() - { + public List getChildren() { return children; } - public void setChildren(List children) - { + public void setChildren(List children) { this.children = children; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeSelect.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeSelect.java index bd835db9..8649ccec 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeSelect.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/TreeSelect.java @@ -3,75 +3,72 @@ package com.ruoyi.common.core.domain; import java.io.Serializable; import java.util.List; import java.util.stream.Collectors; + import com.fasterxml.jackson.annotation.JsonInclude; import com.ruoyi.common.core.domain.entity.SysDept; import com.ruoyi.common.core.domain.entity.SysMenu; /** * Treeselect树结构实体类 - * + * * @author ruoyi */ -public class TreeSelect implements Serializable -{ +public class TreeSelect implements Serializable { private static final long serialVersionUID = 1L; - /** 节点ID */ + /** + * 节点ID + */ private Long id; - /** 节点名称 */ + /** + * 节点名称 + */ private String label; - /** 子节点 */ + /** + * 子节点 + */ @JsonInclude(JsonInclude.Include.NON_EMPTY) private List children; - public TreeSelect() - { + public TreeSelect() { } - public TreeSelect(SysDept dept) - { + public TreeSelect(SysDept dept) { this.id = dept.getDeptId(); this.label = dept.getDeptName(); this.children = dept.getChildren().stream().map(TreeSelect::new).collect(Collectors.toList()); } - public TreeSelect(SysMenu menu) - { + public TreeSelect(SysMenu menu) { this.id = menu.getMenuId(); this.label = menu.getMenuName(); this.children = menu.getChildren().stream().map(TreeSelect::new).collect(Collectors.toList()); } - public Long getId() - { + public Long getId() { return id; } - public void setId(Long id) - { + public void setId(Long id) { this.id = id; } - public String getLabel() - { + public String getLabel() { return label; } - public void setLabel(String label) - { + public void setLabel(String label) { this.label = label; } - public List getChildren() - { + public List getChildren() { return children; } - public void setChildren(List children) - { + public void setChildren(List children) { this.children = children; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDept.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDept.java index c9238e23..df48444f 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDept.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDept.java @@ -5,198 +5,198 @@ import java.util.List; import javax.validation.constraints.Email; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.core.domain.BaseEntity; /** * 部门表 sys_dept - * + * * @author ruoyi */ -public class SysDept extends BaseEntity -{ +public class SysDept extends BaseEntity { private static final long serialVersionUID = 1L; - /** 部门ID */ + /** + * 部门ID + */ private Long deptId; - /** 父部门ID */ + /** + * 父部门ID + */ private Long parentId; - /** 祖级列表 */ + /** + * 祖级列表 + */ private String ancestors; - /** 部门名称 */ + /** + * 部门名称 + */ private String deptName; - /** 显示顺序 */ + /** + * 显示顺序 + */ private String orderNum; - /** 负责人 */ + /** + * 负责人 + */ private String leader; - /** 联系电话 */ + /** + * 联系电话 + */ private String phone; - /** 邮箱 */ + /** + * 邮箱 + */ private String email; - /** 部门状态:0正常,1停用 */ + /** + * 部门状态:0正常,1停用 + */ private String status; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - /** 父部门名称 */ + /** + * 父部门名称 + */ private String parentName; - - /** 子部门 */ + + /** + * 子部门 + */ private List children = new ArrayList(); - public Long getDeptId() - { + public Long getDeptId() { return deptId; } - public void setDeptId(Long deptId) - { + public void setDeptId(Long deptId) { this.deptId = deptId; } - public Long getParentId() - { + public Long getParentId() { return parentId; } - public void setParentId(Long parentId) - { + public void setParentId(Long parentId) { this.parentId = parentId; } - public String getAncestors() - { + public String getAncestors() { return ancestors; } - public void setAncestors(String ancestors) - { + public void setAncestors(String ancestors) { this.ancestors = ancestors; } @NotBlank(message = "部门名称不能为空") @Size(min = 0, max = 30, message = "部门名称长度不能超过30个字符") - public String getDeptName() - { + public String getDeptName() { return deptName; } - public void setDeptName(String deptName) - { + public void setDeptName(String deptName) { this.deptName = deptName; } @NotBlank(message = "显示顺序不能为空") - public String getOrderNum() - { + public String getOrderNum() { return orderNum; } - public void setOrderNum(String orderNum) - { + public void setOrderNum(String orderNum) { this.orderNum = orderNum; } - public String getLeader() - { + public String getLeader() { return leader; } - public void setLeader(String leader) - { + public void setLeader(String leader) { this.leader = leader; } @Size(min = 0, max = 11, message = "联系电话长度不能超过11个字符") - public String getPhone() - { + public String getPhone() { return phone; } - public void setPhone(String phone) - { + public void setPhone(String phone) { this.phone = phone; } @Email(message = "邮箱格式不正确") @Size(min = 0, max = 50, message = "邮箱长度不能超过50个字符") - public String getEmail() - { + public String getEmail() { return email; } - public void setEmail(String email) - { + public void setEmail(String email) { this.email = email; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } - public void setDelFlag(String delFlag) - { + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public String getParentName() - { + public String getParentName() { return parentName; } - public void setParentName(String parentName) - { + public void setParentName(String parentName) { this.parentName = parentName; } - public List getChildren() - { + public List getChildren() { return children; } - public void setChildren(List children) - { + public void setChildren(List children) { this.children = children; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("deptId", getDeptId()) - .append("parentId", getParentId()) - .append("ancestors", getAncestors()) - .append("deptName", getDeptName()) - .append("orderNum", getOrderNum()) - .append("leader", getLeader()) - .append("phone", getPhone()) - .append("email", getEmail()) - .append("status", getStatus()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("deptId", getDeptId()) + .append("parentId", getParentId()) + .append("ancestors", getAncestors()) + .append("deptName", getDeptName()) + .append("orderNum", getOrderNum()) + .append("leader", getLeader()) + .append("phone", getPhone()) + .append("email", getEmail()) + .append("status", getStatus()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .toString(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictData.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictData.java index 3f152b34..709c6c7a 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictData.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictData.java @@ -2,6 +2,7 @@ package com.ruoyi.common.core.domain.entity; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -11,166 +12,164 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 字典数据表 sys_dict_data - * + * * @author ruoyi */ -public class SysDictData extends BaseEntity -{ +public class SysDictData extends BaseEntity { private static final long serialVersionUID = 1L; - /** 字典编码 */ + /** + * 字典编码 + */ @Excel(name = "字典编码", cellType = ColumnType.NUMERIC) private Long dictCode; - /** 字典排序 */ + /** + * 字典排序 + */ @Excel(name = "字典排序", cellType = ColumnType.NUMERIC) private Long dictSort; - /** 字典标签 */ + /** + * 字典标签 + */ @Excel(name = "字典标签") private String dictLabel; - /** 字典键值 */ + /** + * 字典键值 + */ @Excel(name = "字典键值") private String dictValue; - /** 字典类型 */ + /** + * 字典类型 + */ @Excel(name = "字典类型") private String dictType; - /** 样式属性（其他样式扩展） */ + /** + * 样式属性（其他样式扩展） + */ private String cssClass; - /** 表格字典样式 */ + /** + * 表格字典样式 + */ private String listClass; - /** 是否默认（Y是 N否） */ + /** + * 是否默认（Y是 N否） + */ @Excel(name = "是否默认", readConverterExp = "Y=是,N=否") private String isDefault; - /** 状态（0正常 1停用） */ + /** + * 状态（0正常 1停用） + */ @Excel(name = "状态", readConverterExp = "0=正常,1=停用") private String status; - public Long getDictCode() - { + public Long getDictCode() { return dictCode; } - public void setDictCode(Long dictCode) - { + public void setDictCode(Long dictCode) { this.dictCode = dictCode; } - public Long getDictSort() - { + public Long getDictSort() { return dictSort; } - public void setDictSort(Long dictSort) - { + public void setDictSort(Long dictSort) { this.dictSort = dictSort; } @NotBlank(message = "字典标签不能为空") @Size(min = 0, max = 100, message = "字典标签长度不能超过100个字符") - public String getDictLabel() - { + public String getDictLabel() { return dictLabel; } - public void setDictLabel(String dictLabel) - { + public void setDictLabel(String dictLabel) { this.dictLabel = dictLabel; } @NotBlank(message = "字典键值不能为空") @Size(min = 0, max = 100, message = "字典键值长度不能超过100个字符") - public String getDictValue() - { + public String getDictValue() { return dictValue; } - public void setDictValue(String dictValue) - { + public void setDictValue(String dictValue) { this.dictValue = dictValue; } @NotBlank(message = "字典类型不能为空") @Size(min = 0, max = 100, message = "字典类型长度不能超过100个字符") - public String getDictType() - { + public String getDictType() { return dictType; } - public void setDictType(String dictType) - { + public void setDictType(String dictType) { this.dictType = dictType; } @Size(min = 0, max = 100, message = "样式属性长度不能超过100个字符") - public String getCssClass() - { + public String getCssClass() { return cssClass; } - public void setCssClass(String cssClass) - { + public void setCssClass(String cssClass) { this.cssClass = cssClass; } - public String getListClass() - { + public String getListClass() { return listClass; } - public void setListClass(String listClass) - { + public void setListClass(String listClass) { this.listClass = listClass; } - public boolean getDefault() - { + public boolean getDefault() { return UserConstants.YES.equals(this.isDefault) ? true : false; } - public String getIsDefault() - { + public String getIsDefault() { return isDefault; } - public void setIsDefault(String isDefault) - { + public void setIsDefault(String isDefault) { this.isDefault = isDefault; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("dictCode", getDictCode()) - .append("dictSort", getDictSort()) - .append("dictLabel", getDictLabel()) - .append("dictValue", getDictValue()) - .append("dictType", getDictType()) - .append("cssClass", getCssClass()) - .append("listClass", getListClass()) - .append("isDefault", getIsDefault()) - .append("status", getStatus()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("dictCode", getDictCode()) + .append("dictSort", getDictSort()) + .append("dictLabel", getDictLabel()) + .append("dictValue", getDictValue()) + .append("dictType", getDictType()) + .append("cssClass", getCssClass()) + .append("listClass", getListClass()) + .append("isDefault", getIsDefault()) + .append("status", getStatus()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictType.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictType.java index d2c42498..8627553c 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictType.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysDictType.java @@ -2,6 +2,7 @@ package com.ruoyi.common.core.domain.entity; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -10,85 +11,84 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 字典类型表 sys_dict_type - * + * * @author ruoyi */ -public class SysDictType extends BaseEntity -{ +public class SysDictType extends BaseEntity { private static final long serialVersionUID = 1L; - /** 字典主键 */ + /** + * 字典主键 + */ @Excel(name = "字典主键", cellType = ColumnType.NUMERIC) private Long dictId; - /** 字典名称 */ + /** + * 字典名称 + */ @Excel(name = "字典名称") private String dictName; - /** 字典类型 */ + /** + * 字典类型 + */ @Excel(name = "字典类型") private String dictType; - /** 状态（0正常 1停用） */ + /** + * 状态（0正常 1停用） + */ @Excel(name = "状态", readConverterExp = "0=正常,1=停用") private String status; - public Long getDictId() - { + public Long getDictId() { return dictId; } - public void setDictId(Long dictId) - { + public void setDictId(Long dictId) { this.dictId = dictId; } @NotBlank(message = "字典名称不能为空") @Size(min = 0, max = 100, message = "字典类型名称长度不能超过100个字符") - public String getDictName() - { + public String getDictName() { return dictName; } - public void setDictName(String dictName) - { + public void setDictName(String dictName) { this.dictName = dictName; } @NotBlank(message = "字典类型不能为空") @Size(min = 0, max = 100, message = "字典类型类型长度不能超过100个字符") - public String getDictType() - { + public String getDictType() { return dictType; } - public void setDictType(String dictType) - { + public void setDictType(String dictType) { this.dictType = dictType; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("dictId", getDictId()) - .append("dictName", getDictName()) - .append("dictType", getDictType()) - .append("status", getStatus()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("dictId", getDictId()) + .append("dictName", getDictName()) + .append("dictType", getDictType()) + .append("status", getStatus()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysMenu.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysMenu.java index 94d654ae..59f6ae96 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysMenu.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysMenu.java @@ -4,242 +4,242 @@ import java.util.ArrayList; import java.util.List; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.core.domain.BaseEntity; /** * 菜单权限表 sys_menu - * + * * @author ruoyi */ -public class SysMenu extends BaseEntity -{ +public class SysMenu extends BaseEntity { private static final long serialVersionUID = 1L; - /** 菜单ID */ + /** + * 菜单ID + */ private Long menuId; - /** 菜单名称 */ + /** + * 菜单名称 + */ private String menuName; - /** 父菜单名称 */ + /** + * 父菜单名称 + */ private String parentName; - /** 父菜单ID */ + /** + * 父菜单ID + */ private Long parentId; - /** 显示顺序 */ + /** + * 显示顺序 + */ private String orderNum; - /** 路由地址 */ + /** + * 路由地址 + */ private String path; - /** 组件路径 */ + /** + * 组件路径 + */ private String component; - /** 是否为外链（0是 1否） */ + /** + * 是否为外链（0是 1否） + */ private String isFrame; - /** 是否缓存（0缓存 1不缓存） */ + /** + * 是否缓存（0缓存 1不缓存） + */ private String isCache; - /** 类型（M目录 C菜单 F按钮） */ + /** + * 类型（M目录 C菜单 F按钮） + */ private String menuType; - /** 显示状态（0显示 1隐藏） */ + /** + * 显示状态（0显示 1隐藏） + */ private String visible; - - /** 菜单状态（0显示 1隐藏） */ + + /** + * 菜单状态（0显示 1隐藏） + */ private String status; - /** 权限字符串 */ + /** + * 权限字符串 + */ private String perms; - /** 菜单图标 */ + /** + * 菜单图标 + */ private String icon; - /** 子菜单 */ + /** + * 子菜单 + */ private List children = new ArrayList(); - public Long getMenuId() - { + public Long getMenuId() { return menuId; } - public void setMenuId(Long menuId) - { + public void setMenuId(Long menuId) { this.menuId = menuId; } @NotBlank(message = "菜单名称不能为空") @Size(min = 0, max = 50, message = "菜单名称长度不能超过50个字符") - public String getMenuName() - { + public String getMenuName() { return menuName; } - public void setMenuName(String menuName) - { + public void setMenuName(String menuName) { this.menuName = menuName; } - public String getParentName() - { + public String getParentName() { return parentName; } - public void setParentName(String parentName) - { + public void setParentName(String parentName) { this.parentName = parentName; } - public Long getParentId() - { + public Long getParentId() { return parentId; } - public void setParentId(Long parentId) - { + public void setParentId(Long parentId) { this.parentId = parentId; } @NotBlank(message = "显示顺序不能为空") - public String getOrderNum() - { + public String getOrderNum() { return orderNum; } - public void setOrderNum(String orderNum) - { + public void setOrderNum(String orderNum) { this.orderNum = orderNum; } @Size(min = 0, max = 200, message = "路由地址不能超过200个字符") - public String getPath() - { + public String getPath() { return path; } - public void setPath(String path) - { + public void setPath(String path) { this.path = path; } @Size(min = 0, max = 200, message = "组件路径不能超过255个字符") - public String getComponent() - { + public String getComponent() { return component; } - public void setComponent(String component) - { + public void setComponent(String component) { this.component = component; } - public String getIsFrame() - { + public String getIsFrame() { return isFrame; } - public void setIsFrame(String isFrame) - { + public void setIsFrame(String isFrame) { this.isFrame = isFrame; } - public String getIsCache() - { + public String getIsCache() { return isCache; } - public void setIsCache(String isCache) - { + public void setIsCache(String isCache) { this.isCache = isCache; } @NotBlank(message = "菜单类型不能为空") - public String getMenuType() - { + public String getMenuType() { return menuType; } - public void setMenuType(String menuType) - { + public void setMenuType(String menuType) { this.menuType = menuType; } - public String getVisible() - { + public String getVisible() { return visible; } - public void setVisible(String visible) - { + public void setVisible(String visible) { this.visible = visible; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } @Size(min = 0, max = 100, message = "权限标识长度不能超过100个字符") - public String getPerms() - { + public String getPerms() { return perms; } - public void setPerms(String perms) - { + public void setPerms(String perms) { this.perms = perms; } - public String getIcon() - { + public String getIcon() { return icon; } - public void setIcon(String icon) - { + public void setIcon(String icon) { this.icon = icon; } - public List getChildren() - { + public List getChildren() { return children; } - public void setChildren(List children) - { + public void setChildren(List children) { this.children = children; } - + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("menuId", getMenuId()) - .append("menuName", getMenuName()) - .append("parentId", getParentId()) - .append("orderNum", getOrderNum()) - .append("path", getPath()) - .append("component", getComponent()) - .append("isFrame", getIsFrame()) - .append("IsCache", getIsCache()) - .append("menuType", getMenuType()) - .append("visible", getVisible()) - .append("status ", getStatus()) - .append("perms", getPerms()) - .append("icon", getIcon()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("menuId", getMenuId()) + .append("menuName", getMenuName()) + .append("parentId", getParentId()) + .append("orderNum", getOrderNum()) + .append("path", getPath()) + .append("component", getComponent()) + .append("isFrame", getIsFrame()) + .append("IsCache", getIsCache()) + .append("menuType", getMenuType()) + .append("visible", getVisible()) + .append("status ", getStatus()) + .append("perms", getPerms()) + .append("icon", getIcon()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysRole.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysRole.java index 2991595a..43b6b89f 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysRole.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysRole.java @@ -2,6 +2,7 @@ package com.ruoyi.common.core.domain.entity; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -10,217 +11,212 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 角色表 sys_role - * + * * @author ruoyi */ -public class SysRole extends BaseEntity -{ +public class SysRole extends BaseEntity { private static final long serialVersionUID = 1L; - /** 角色ID */ + /** + * 角色ID + */ @Excel(name = "角色序号", cellType = ColumnType.NUMERIC) private Long roleId; - /** 角色名称 */ + /** + * 角色名称 + */ @Excel(name = "角色名称") private String roleName; - /** 角色权限 */ + /** + * 角色权限 + */ @Excel(name = "角色权限") private String roleKey; - /** 角色排序 */ + /** + * 角色排序 + */ @Excel(name = "角色排序") private String roleSort; - /** 数据范围（1：所有数据权限；2：自定义数据权限；3：本部门数据权限；4：本部门及以下数据权限） */ + /** + * 数据范围（1：所有数据权限；2：自定义数据权限；3：本部门数据权限；4：本部门及以下数据权限） + */ @Excel(name = "数据范围", readConverterExp = "1=所有数据权限,2=自定义数据权限,3=本部门数据权限,4=本部门及以下数据权限") private String dataScope; - /** 菜单树选择项是否关联显示（ 0：父子不互相关联显示 1：父子互相关联显示） */ + /** + * 菜单树选择项是否关联显示（ 0：父子不互相关联显示 1：父子互相关联显示） + */ private boolean menuCheckStrictly; - /** 部门树选择项是否关联显示（0：父子不互相关联显示 1：父子互相关联显示 ） */ + /** + * 部门树选择项是否关联显示（0：父子不互相关联显示 1：父子互相关联显示 ） + */ private boolean deptCheckStrictly; - /** 角色状态（0正常 1停用） */ + /** + * 角色状态（0正常 1停用） + */ @Excel(name = "角色状态", readConverterExp = "0=正常,1=停用") private String status; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - /** 用户是否存在此角色标识 默认不存在 */ + /** + * 用户是否存在此角色标识 默认不存在 + */ private boolean flag = false; - /** 菜单组 */ + /** + * 菜单组 + */ private Long[] menuIds; - /** 部门组（数据权限） */ + /** + * 部门组（数据权限） + */ private Long[] deptIds; - public SysRole() - { + public SysRole() { } - public SysRole(Long roleId) - { + public SysRole(Long roleId) { this.roleId = roleId; } - public Long getRoleId() - { + public Long getRoleId() { return roleId; } - public void setRoleId(Long roleId) - { + public void setRoleId(Long roleId) { this.roleId = roleId; } - public boolean isAdmin() - { + public boolean isAdmin() { return isAdmin(this.roleId); } - public static boolean isAdmin(Long roleId) - { + public static boolean isAdmin(Long roleId) { return roleId != null && 1L == roleId; } @NotBlank(message = "角色名称不能为空") @Size(min = 0, max = 30, message = "角色名称长度不能超过30个字符") - public String getRoleName() - { + public String getRoleName() { return roleName; } - public void setRoleName(String roleName) - { + public void setRoleName(String roleName) { this.roleName = roleName; } @NotBlank(message = "权限字符不能为空") @Size(min = 0, max = 100, message = "权限字符长度不能超过100个字符") - public String getRoleKey() - { + public String getRoleKey() { return roleKey; } - public void setRoleKey(String roleKey) - { + public void setRoleKey(String roleKey) { this.roleKey = roleKey; } @NotBlank(message = "显示顺序不能为空") - public String getRoleSort() - { + public String getRoleSort() { return roleSort; } - public void setRoleSort(String roleSort) - { + public void setRoleSort(String roleSort) { this.roleSort = roleSort; } - public String getDataScope() - { + public String getDataScope() { return dataScope; } - public void setDataScope(String dataScope) - { + public void setDataScope(String dataScope) { this.dataScope = dataScope; } - public boolean isMenuCheckStrictly() - { + public boolean isMenuCheckStrictly() { return menuCheckStrictly; } - public void setMenuCheckStrictly(boolean menuCheckStrictly) - { + public void setMenuCheckStrictly(boolean menuCheckStrictly) { this.menuCheckStrictly = menuCheckStrictly; } - public boolean isDeptCheckStrictly() - { + public boolean isDeptCheckStrictly() { return deptCheckStrictly; } - public void setDeptCheckStrictly(boolean deptCheckStrictly) - { + public void setDeptCheckStrictly(boolean deptCheckStrictly) { this.deptCheckStrictly = deptCheckStrictly; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } - public void setDelFlag(String delFlag) - { + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public boolean isFlag() - { + public boolean isFlag() { return flag; } - public void setFlag(boolean flag) - { + public void setFlag(boolean flag) { this.flag = flag; } - public Long[] getMenuIds() - { + public Long[] getMenuIds() { return menuIds; } - public void setMenuIds(Long[] menuIds) - { + public void setMenuIds(Long[] menuIds) { this.menuIds = menuIds; } - public Long[] getDeptIds() - { + public Long[] getDeptIds() { return deptIds; } - public void setDeptIds(Long[] deptIds) - { + public void setDeptIds(Long[] deptIds) { this.deptIds = deptIds; } - + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("roleId", getRoleId()) - .append("roleName", getRoleName()) - .append("roleKey", getRoleKey()) - .append("roleSort", getRoleSort()) - .append("dataScope", getDataScope()) - .append("menuCheckStrictly", isMenuCheckStrictly()) - .append("deptCheckStrictly", isDeptCheckStrictly()) - .append("status", getStatus()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("roleId", getRoleId()) + .append("roleName", getRoleName()) + .append("roleKey", getRoleKey()) + .append("roleSort", getRoleSort()) + .append("dataScope", getDataScope()) + .append("menuCheckStrictly", isMenuCheckStrictly()) + .append("deptCheckStrictly", isDeptCheckStrictly()) + .append("status", getStatus()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysUser.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysUser.java index d08668ab..0c21b684 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysUser.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/entity/SysUser.java @@ -5,6 +5,7 @@ import java.util.List; import javax.validation.constraints.Email; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.fasterxml.jackson.annotation.JsonIgnore; @@ -17,312 +18,318 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 用户对象 sys_user - * + * * @author ruoyi */ -public class SysUser extends BaseEntity -{ +public class SysUser extends BaseEntity { private static final long serialVersionUID = 1L; - /** 用户ID */ + /** + * 用户ID + */ @Excel(name = "用户序号", cellType = ColumnType.NUMERIC, prompt = "用户编号") private Long userId; - /** 部门ID */ + /** + * 部门ID + */ @Excel(name = "部门编号", type = Type.IMPORT) private Long deptId; - /** 用户账号 */ + /** + * 用户账号 + */ @Excel(name = "登录名称") private String userName; - /** 用户昵称 */ + /** + * 用户昵称 + */ @Excel(name = "用户名称") private String nickName; - /** 用户邮箱 */ + @Excel(name = "用户OpenId") + private String openId; + + /** + * 用户邮箱 + */ @Excel(name = "用户邮箱") private String email; - /** 手机号码 */ + /** + * 手机号码 + */ @Excel(name = "手机号码") private String phonenumber; - /** 用户性别 */ + /** + * 用户性别 + */ @Excel(name = "用户性别", readConverterExp = "0=男,1=女,2=未知") private String sex; - /** 用户头像 */ + /** + * 用户头像 + */ private String avatar; - /** 密码 */ + /** + * 密码 + */ private String password; - /** 盐加密 */ + /** + * 盐加密 + */ private String salt; - /** 帐号状态（0正常 1停用） */ + /** + * 帐号状态（0正常 1停用） + */ @Excel(name = "帐号状态", readConverterExp = "0=正常,1=停用") private String status; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - /** 最后登录IP */ + /** + * 最后登录IP + */ @Excel(name = "最后登录IP", type = Type.EXPORT) private String loginIp; - /** 最后登录时间 */ + /** + * 最后登录时间 + */ @Excel(name = "最后登录时间", width = 30, dateFormat = "yyyy-MM-dd HH:mm:ss", type = Type.EXPORT) private Date loginDate; - /** 部门对象 */ + /** + * 部门对象 + */ @Excels({ - @Excel(name = "部门名称", targetAttr = "deptName", type = Type.EXPORT), - @Excel(name = "部门负责人", targetAttr = "leader", type = Type.EXPORT) + @Excel(name = "部门名称", targetAttr = "deptName", type = Type.EXPORT), + @Excel(name = "部门负责人", targetAttr = "leader", type = Type.EXPORT) }) private SysDept dept; - /** 角色对象 */ + /** + * 角色对象 + */ private List roles; - /** 角色组 */ + /** + * 角色组 + */ private Long[] roleIds; - /** 岗位组 */ + /** + * 岗位组 + */ private Long[] postIds; - public SysUser() - { + public SysUser() { } - public SysUser(Long userId) - { + public String getOpenId() { + return openId; + } + + public void setOpenId(String openId) { + this.openId = openId; + } + + public SysUser(Long userId) { this.userId = userId; } - public Long getUserId() - { + public Long getUserId() { return userId; } - public void setUserId(Long userId) - { + public void setUserId(Long userId) { this.userId = userId; } - public boolean isAdmin() - { + public boolean isAdmin() { return isAdmin(this.userId); } - public static boolean isAdmin(Long userId) - { + public static boolean isAdmin(Long userId) { return userId != null && 1L == userId; } - public Long getDeptId() - { + public Long getDeptId() { return deptId; } - public void setDeptId(Long deptId) - { + public void setDeptId(Long deptId) { this.deptId = deptId; } @Size(min = 0, max = 30, message = "用户昵称长度不能超过30个字符") - public String getNickName() - { + public String getNickName() { return nickName; } - public void setNickName(String nickName) - { + public void setNickName(String nickName) { this.nickName = nickName; } @NotBlank(message = "用户账号不能为空") @Size(min = 0, max = 30, message = "用户账号长度不能超过30个字符") - public String getUserName() - { + public String getUserName() { return userName; } - public void setUserName(String userName) - { + public void setUserName(String userName) { this.userName = userName; } @Email(message = "邮箱格式不正确") @Size(min = 0, max = 50, message = "邮箱长度不能超过50个字符") - public String getEmail() - { + public String getEmail() { return email; } - public void setEmail(String email) - { + public void setEmail(String email) { this.email = email; } @Size(min = 0, max = 11, message = "手机号码长度不能超过11个字符") - public String getPhonenumber() - { + public String getPhonenumber() { return phonenumber; } - public void setPhonenumber(String phonenumber) - { + public void setPhonenumber(String phonenumber) { this.phonenumber = phonenumber; } - public String getSex() - { + public String getSex() { return sex; } - public void setSex(String sex) - { + public void setSex(String sex) { this.sex = sex; } - public String getAvatar() - { + public String getAvatar() { return avatar; } - public void setAvatar(String avatar) - { + public void setAvatar(String avatar) { this.avatar = avatar; } - @JsonIgnore + @JsonIgnore @JsonProperty - public String getPassword() - { + public String getPassword() { return password; } - public void setPassword(String password) - { + public void setPassword(String password) { this.password = password; } - public String getSalt() - { + public String getSalt() { return salt; } - public void setSalt(String salt) - { + public void setSalt(String salt) { this.salt = salt; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } - public void setDelFlag(String delFlag) - { + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public String getLoginIp() - { + public String getLoginIp() { return loginIp; } - public void setLoginIp(String loginIp) - { + public void setLoginIp(String loginIp) { this.loginIp = loginIp; } - public Date getLoginDate() - { + public Date getLoginDate() { return loginDate; } - public void setLoginDate(Date loginDate) - { + public void setLoginDate(Date loginDate) { this.loginDate = loginDate; } - public SysDept getDept() - { + public SysDept getDept() { return dept; } - public void setDept(SysDept dept) - { + public void setDept(SysDept dept) { this.dept = dept; } - public List getRoles() - { + public List getRoles() { return roles; } - public void setRoles(List roles) - { + public void setRoles(List roles) { this.roles = roles; } - public Long[] getRoleIds() - { + public Long[] getRoleIds() { return roleIds; } - public void setRoleIds(Long[] roleIds) - { + public void setRoleIds(Long[] roleIds) { this.roleIds = roleIds; } - public Long[] getPostIds() - { + public Long[] getPostIds() { return postIds; } - public void setPostIds(Long[] postIds) - { + public void setPostIds(Long[] postIds) { this.postIds = postIds; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("userId", getUserId()) - .append("deptId", getDeptId()) - .append("userName", getUserName()) - .append("nickName", getNickName()) - .append("email", getEmail()) - .append("phonenumber", getPhonenumber()) - .append("sex", getSex()) - .append("avatar", getAvatar()) - .append("password", getPassword()) - .append("salt", getSalt()) - .append("status", getStatus()) - .append("delFlag", getDelFlag()) - .append("loginIp", getLoginIp()) - .append("loginDate", getLoginDate()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .append("dept", getDept()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("userId", getUserId()) + .append("deptId", getDeptId()) + .append("userName", getUserName()) + .append("nickName", getNickName()) + .append("email", getEmail()) + .append("phonenumber", getPhonenumber()) + .append("sex", getSex()) + .append("avatar", getAvatar()) + .append("password", getPassword()) + .append("salt", getSalt()) + .append("status", getStatus()) + .append("delFlag", getDelFlag()) + .append("loginIp", getLoginIp()) + .append("loginDate", getLoginDate()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .append("dept", getDept()) + .toString(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginBody.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginBody.java index 03948b43..2d2fe112 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginBody.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginBody.java @@ -2,11 +2,10 @@ package com.ruoyi.common.core.domain.model; /** * 用户登录对象 - * + * * @author ruoyi */ -public class LoginBody -{ +public class LoginBody { /** * 用户名 */ @@ -27,43 +26,35 @@ public class LoginBody */ private String uuid = ""; - public String getUsername() - { + public String getUsername() { return username; } - public void setUsername(String username) - { + public void setUsername(String username) { this.username = username; } - public String getPassword() - { + public String getPassword() { return password; } - public void setPassword(String password) - { + public void setPassword(String password) { this.password = password; } - public String getCode() - { + public String getCode() { return code; } - public void setCode(String code) - { + public void setCode(String code) { this.code = code; } - public String getUuid() - { + public String getUuid() { return uuid; } - public void setUuid(String uuid) - { + public void setUuid(String uuid) { this.uuid = uuid; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginUser.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginUser.java index 6e3f1c6b..f9867ba9 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginUser.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/LoginUser.java @@ -1,7 +1,9 @@ package com.ruoyi.common.core.domain.model; import java.util.Collection; +import java.util.HashSet; import java.util.Set; + import org.springframework.security.core.GrantedAuthority; import org.springframework.security.core.userdetails.UserDetails; import com.fasterxml.jackson.annotation.JsonIgnore; @@ -9,11 +11,10 @@ import com.ruoyi.common.core.domain.entity.SysUser; /** * 登录用户身份权限 - * + * * @author ruoyi */ -public class LoginUser implements UserDetails -{ +public class LoginUser implements UserDetails { private static final long serialVersionUID = 1L; /** @@ -61,36 +62,32 @@ public class LoginUser implements UserDetails */ private SysUser user; - public String getToken() - { + public String getToken() { return token; } - public void setToken(String token) - { + public void setToken(String token) { this.token = token; } - public LoginUser() - { + public LoginUser() { } - public LoginUser(SysUser user, Set permissions) - { + public LoginUser(SysUser user, Set permissions) { this.user = user; this.permissions = permissions; } + + @JsonIgnore @Override - public String getPassword() - { + public String getPassword() { return user.getPassword(); } @Override - public String getUsername() - { + public String getUsername() { return user.getUserName(); } @@ -99,130 +96,110 @@ public class LoginUser implements UserDetails */ @JsonIgnore @Override - public boolean isAccountNonExpired() - { + public boolean isAccountNonExpired() { return true; } /** * 指定用户是否解锁,锁定的用户无法进行身份验证 - * + * * @return */ @JsonIgnore @Override - public boolean isAccountNonLocked() - { + public boolean isAccountNonLocked() { return true; } /** * 指示是否已过期的用户的凭据(密码),过期的凭据防止认证 - * + * * @return */ @JsonIgnore @Override - public boolean isCredentialsNonExpired() - { + public boolean isCredentialsNonExpired() { return true; } /** * 是否可用 ,禁用的用户不能身份验证 - * + * * @return */ @JsonIgnore @Override - public boolean isEnabled() - { + public boolean isEnabled() { return true; } - public Long getLoginTime() - { + public Long getLoginTime() { return loginTime; } - public void setLoginTime(Long loginTime) - { + public void setLoginTime(Long loginTime) { this.loginTime = loginTime; } - public String getIpaddr() - { + public String getIpaddr() { return ipaddr; } - public void setIpaddr(String ipaddr) - { + public void setIpaddr(String ipaddr) { this.ipaddr = ipaddr; } - public String getLoginLocation() - { + public String getLoginLocation() { return loginLocation; } - public void setLoginLocation(String loginLocation) - { + public void setLoginLocation(String loginLocation) { this.loginLocation = loginLocation; } - public String getBrowser() - { + public String getBrowser() { return browser; } - public void setBrowser(String browser) - { + public void setBrowser(String browser) { this.browser = browser; } - public String getOs() - { + public String getOs() { return os; } - public void setOs(String os) - { + public void setOs(String os) { this.os = os; } - public Long getExpireTime() - { + public Long getExpireTime() { return expireTime; } - public void setExpireTime(Long expireTime) - { + public void setExpireTime(Long expireTime) { this.expireTime = expireTime; } - public Set getPermissions() - { + public Set getPermissions() { + System.out.println("用户权限："+permissions); return permissions; } - public void setPermissions(Set permissions) - { + public void setPermissions(Set permissions) { this.permissions = permissions; } - public SysUser getUser() - { + public SysUser getUser() { return user; } - public void setUser(SysUser user) - { + public void setUser(SysUser user) { this.user = user; } @Override - public Collection getAuthorities() - { + public Collection getAuthorities() { return null; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/MpLoginBody.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/MpLoginBody.java new file mode 100644 index 00000000..161fba39 --- /dev/null +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/domain/model/MpLoginBody.java @@ -0,0 +1,17 @@ +package com.ruoyi.common.core.domain.model; + +import com.alibaba.fastjson.JSONObject; +import lombok.Data; + +/** + * 微信小程序用户登录对象 + * + * @author ruoyi + */ +@Data +public class MpLoginBody { + private String code; + + private JSONObject options; //{"path":"pages/mine/help/index","query":{},"scene":1001,"referrerInfo":{}} + +} diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/PageDomain.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/PageDomain.java index 6fba8837..b63c3feb 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/PageDomain.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/PageDomain.java @@ -4,69 +4,66 @@ import com.ruoyi.common.utils.StringUtils; /** * 分页数据 - * + * * @author ruoyi */ -public class PageDomain -{ - /** 当前记录起始索引 */ +public class PageDomain { + /** + * 当前记录起始索引 + */ private Integer pageNum; - /** 每页显示记录数 */ + /** + * 每页显示记录数 + */ private Integer pageSize; - /** 排序列 */ + /** + * 排序列 + */ private String orderByColumn; - /** 排序的方向desc或者asc */ + /** + * 排序的方向desc或者asc + */ private String isAsc = "asc"; - public String getOrderBy() - { - if (StringUtils.isEmpty(orderByColumn)) - { + public String getOrderBy() { + if (StringUtils.isEmpty(orderByColumn)) { return ""; } return StringUtils.toUnderScoreCase(orderByColumn) + " " + isAsc; } - public Integer getPageNum() - { + public Integer getPageNum() { return pageNum; } - public void setPageNum(Integer pageNum) - { + public void setPageNum(Integer pageNum) { this.pageNum = pageNum; } - public Integer getPageSize() - { + public Integer getPageSize() { return pageSize; } - public void setPageSize(Integer pageSize) - { + public void setPageSize(Integer pageSize) { this.pageSize = pageSize; } - public String getOrderByColumn() - { + public String getOrderByColumn() { return orderByColumn; } - public void setOrderByColumn(String orderByColumn) - { + public void setOrderByColumn(String orderByColumn) { this.orderByColumn = orderByColumn; } - public String getIsAsc() - { + public String getIsAsc() { return isAsc; } - public void setIsAsc(String isAsc) - { + public void setIsAsc(String isAsc) { this.isAsc = isAsc; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableDataInfo.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableDataInfo.java index 847685ba..d223e860 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableDataInfo.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableDataInfo.java @@ -5,81 +5,78 @@ import java.util.List; /** * 表格分页数据对象 - * + * * @author ruoyi */ -public class TableDataInfo implements Serializable -{ +public class TableDataInfo implements Serializable { private static final long serialVersionUID = 1L; - /** 总记录数 */ + /** + * 总记录数 + */ private long total; - /** 列表数据 */ + /** + * 列表数据 + */ private List rows; - /** 消息状态码 */ + /** + * 消息状态码 + */ private int code; - /** 消息内容 */ + /** + * 消息内容 + */ private String msg; /** * 表格数据对象 */ - public TableDataInfo() - { + public TableDataInfo() { } /** * 分页 - * - * @param list 列表数据 + * + * @param list 列表数据 * @param total 总记录数 */ - public TableDataInfo(List list, int total) - { + public TableDataInfo(List list, int total) { this.rows = list; this.total = total; } - public long getTotal() - { + public long getTotal() { return total; } - public void setTotal(long total) - { + public void setTotal(long total) { this.total = total; } - public List getRows() - { + public List getRows() { return rows; } - public void setRows(List rows) - { + public void setRows(List rows) { this.rows = rows; } - public int getCode() - { + public int getCode() { return code; } - public void setCode(int code) - { + public void setCode(int code) { this.code = code; } - public String getMsg() - { + public String getMsg() { return msg; } - public void setMsg(String msg) - { + public void setMsg(String msg) { this.msg = msg; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableSupport.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableSupport.java index 14eb1e11..812bee2b 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableSupport.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/page/TableSupport.java @@ -4,11 +4,10 @@ import com.ruoyi.common.utils.ServletUtils; /** * 表格数据处理 - * + * * @author ruoyi */ -public class TableSupport -{ +public class TableSupport { /** * 当前记录起始索引 */ @@ -32,8 +31,7 @@ public class TableSupport /** * 封装分页对象 */ - public static PageDomain getPageDomain() - { + public static PageDomain getPageDomain() { PageDomain pageDomain = new PageDomain(); pageDomain.setPageNum(ServletUtils.getParameterToInt(PAGE_NUM)); pageDomain.setPageSize(ServletUtils.getParameterToInt(PAGE_SIZE)); @@ -42,8 +40,7 @@ public class TableSupport return pageDomain; } - public static PageDomain buildPageRequest() - { + public static PageDomain buildPageRequest() { return getPageDomain(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/redis/RedisCache.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/redis/RedisCache.java index 22a610db..d354cf4f 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/redis/RedisCache.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/redis/RedisCache.java @@ -6,6 +6,7 @@ import java.util.List; import java.util.Map; import java.util.Set; import java.util.concurrent.TimeUnit; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.data.redis.core.BoundSetOperations; import org.springframework.data.redis.core.HashOperations; @@ -18,59 +19,54 @@ import org.springframework.stereotype.Component; * * @author ruoyi **/ -@SuppressWarnings(value = { "unchecked", "rawtypes" }) +@SuppressWarnings(value = {"unchecked", "rawtypes"}) @Component -public class RedisCache -{ +public class RedisCache { @Autowired public RedisTemplate redisTemplate; /** * 缓存基本的对象，Integer、String、实体类等 * - * @param key 缓存的键值 + * @param key 缓存的键值 * @param value 缓存的值 */ - public void setCacheObject(final String key, final T value) - { + public void setCacheObject(final String key, final T value) { redisTemplate.opsForValue().set(key, value); } /** * 缓存基本的对象，Integer、String、实体类等 * - * @param key 缓存的键值 - * @param value 缓存的值 - * @param timeout 时间 + * @param key 缓存的键值 + * @param value 缓存的值 + * @param timeout 时间 * @param timeUnit 时间颗粒度 */ - public void setCacheObject(final String key, final T value, final Integer timeout, final TimeUnit timeUnit) - { + public void setCacheObject(final String key, final T value, final Integer timeout, final TimeUnit timeUnit) { redisTemplate.opsForValue().set(key, value, timeout, timeUnit); } /** * 设置有效时间 * - * @param key Redis键 + * @param key Redis键 * @param timeout 超时时间 * @return true=设置成功；false=设置失败 */ - public boolean expire(final String key, final long timeout) - { + public boolean expire(final String key, final long timeout) { return expire(key, timeout, TimeUnit.SECONDS); } /** * 设置有效时间 * - * @param key Redis键 + * @param key Redis键 * @param timeout 超时时间 - * @param unit 时间单位 + * @param unit 时间单位 * @return true=设置成功；false=设置失败 */ - public boolean expire(final String key, final long timeout, final TimeUnit unit) - { + public boolean expire(final String key, final long timeout, final TimeUnit unit) { return redisTemplate.expire(key, timeout, unit); } @@ -80,8 +76,7 @@ public class RedisCache * @param key 缓存键值 * @return 缓存键值对应的数据 */ - public T getCacheObject(final String key) - { + public T getCacheObject(final String key) { ValueOperations operation = redisTemplate.opsForValue(); return operation.get(key); } @@ -91,8 +86,7 @@ public class RedisCache * * @param key */ - public boolean deleteObject(final String key) - { + public boolean deleteObject(final String key) { return redisTemplate.delete(key); } @@ -102,20 +96,18 @@ public class RedisCache * @param collection 多个对象 * @return */ - public long deleteObject(final Collection collection) - { + public long deleteObject(final Collection collection) { return redisTemplate.delete(collection); } /** * 缓存List数据 * - * @param key 缓存的键值 + * @param key 缓存的键值 * @param dataList 待缓存的List数据 * @return 缓存的对象 */ - public long setCacheList(final String key, final List dataList) - { + public long setCacheList(final String key, final List dataList) { Long count = redisTemplate.opsForList().rightPushAll(key, dataList); return count == null ? 0 : count; } @@ -126,24 +118,21 @@ public class RedisCache * @param key 缓存的键值 * @return 缓存键值对应的数据 */ - public List getCacheList(final String key) - { + public List getCacheList(final String key) { return redisTemplate.opsForList().range(key, 0, -1); } /** * 缓存Set * - * @param key 缓存键值 + * @param key 缓存键值 * @param dataSet 缓存的数据 * @return 缓存数据的对象 */ - public BoundSetOperations setCacheSet(final String key, final Set dataSet) - { + public BoundSetOperations setCacheSet(final String key, final Set dataSet) { BoundSetOperations setOperation = redisTemplate.boundSetOps(key); Iterator it = dataSet.iterator(); - while (it.hasNext()) - { + while (it.hasNext()) { setOperation.add(it.next()); } return setOperation; @@ -155,8 +144,7 @@ public class RedisCache * @param key * @return */ - public Set getCacheSet(final String key) - { + public Set getCacheSet(final String key) { return redisTemplate.opsForSet().members(key); } @@ -166,8 +154,7 @@ public class RedisCache * @param key * @param dataMap */ - public void setCacheMap(final String key, final Map dataMap) - { + public void setCacheMap(final String key, final Map dataMap) { if (dataMap != null) { redisTemplate.opsForHash().putAll(key, dataMap); } @@ -179,32 +166,29 @@ public class RedisCache * @param key * @return */ - public Map getCacheMap(final String key) - { + public Map getCacheMap(final String key) { return redisTemplate.opsForHash().entries(key); } /** * 往Hash中存入数据 * - * @param key Redis键 - * @param hKey Hash键 + * @param key Redis键 + * @param hKey Hash键 * @param value 值 */ - public void setCacheMapValue(final String key, final String hKey, final T value) - { + public void setCacheMapValue(final String key, final String hKey, final T value) { redisTemplate.opsForHash().put(key, hKey, value); } /** * 获取Hash中的数据 * - * @param key Redis键 + * @param key Redis键 * @param hKey Hash键 * @return Hash中的对象 */ - public T getCacheMapValue(final String key, final String hKey) - { + public T getCacheMapValue(final String key, final String hKey) { HashOperations opsForHash = redisTemplate.opsForHash(); return opsForHash.get(key, hKey); } @@ -212,12 +196,11 @@ public class RedisCache /** * 获取多个Hash中的数据 * - * @param key Redis键 + * @param key Redis键 * @param hKeys Hash键集合 * @return Hash对象集合 */ - public List getMultiCacheMapValue(final String key, final Collection hKeys) - { + public List getMultiCacheMapValue(final String key, final Collection hKeys) { return redisTemplate.opsForHash().multiGet(key, hKeys); } @@ -227,8 +210,7 @@ public class RedisCache * @param pattern 字符串前缀 * @return 对象列表 */ - public Collection keys(final String pattern) - { + public Collection keys(final String pattern) { return redisTemplate.keys(pattern); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/CharsetKit.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/CharsetKit.java index 84124aac..71f33353 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/CharsetKit.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/CharsetKit.java @@ -2,75 +2,81 @@ package com.ruoyi.common.core.text; import java.nio.charset.Charset; import java.nio.charset.StandardCharsets; + import com.ruoyi.common.utils.StringUtils; /** * 字符集工具类 - * + * * @author ruoyi */ -public class CharsetKit -{ - /** ISO-8859-1 */ +public class CharsetKit { + /** + * ISO-8859-1 + */ public static final String ISO_8859_1 = "ISO-8859-1"; - /** UTF-8 */ + /** + * UTF-8 + */ public static final String UTF_8 = "UTF-8"; - /** GBK */ + /** + * GBK + */ public static final String GBK = "GBK"; - /** ISO-8859-1 */ + /** + * ISO-8859-1 + */ public static final Charset CHARSET_ISO_8859_1 = Charset.forName(ISO_8859_1); - /** UTF-8 */ + /** + * UTF-8 + */ public static final Charset CHARSET_UTF_8 = Charset.forName(UTF_8); - /** GBK */ + /** + * GBK + */ public static final Charset CHARSET_GBK = Charset.forName(GBK); /** * 转换为Charset对象 - * + * * @param charset 字符集，为空则返回默认字符集 * @return Charset */ - public static Charset charset(String charset) - { + public static Charset charset(String charset) { return StringUtils.isEmpty(charset) ? Charset.defaultCharset() : Charset.forName(charset); } /** * 转换字符串的字符集编码 - * - * @param source 字符串 - * @param srcCharset 源字符集，默认ISO-8859-1 + * + * @param source 字符串 + * @param srcCharset 源字符集，默认ISO-8859-1 * @param destCharset 目标字符集，默认UTF-8 * @return 转换后的字符集 */ - public static String convert(String source, String srcCharset, String destCharset) - { + public static String convert(String source, String srcCharset, String destCharset) { return convert(source, Charset.forName(srcCharset), Charset.forName(destCharset)); } /** * 转换字符串的字符集编码 - * - * @param source 字符串 - * @param srcCharset 源字符集，默认ISO-8859-1 + * + * @param source 字符串 + * @param srcCharset 源字符集，默认ISO-8859-1 * @param destCharset 目标字符集，默认UTF-8 * @return 转换后的字符集 */ - public static String convert(String source, Charset srcCharset, Charset destCharset) - { - if (null == srcCharset) - { + public static String convert(String source, Charset srcCharset, Charset destCharset) { + if (null == srcCharset) { srcCharset = StandardCharsets.ISO_8859_1; } - if (null == destCharset) - { + if (null == destCharset) { destCharset = StandardCharsets.UTF_8; } - if (StringUtils.isEmpty(source) || srcCharset.equals(destCharset)) - { + if (StringUtils.isEmpty(source) || srcCharset.equals(destCharset)) { return source; } return new String(source.getBytes(srcCharset), destCharset); @@ -79,8 +85,7 @@ public class CharsetKit /** * @return 系统字符集编码 */ - public static String systemCharset() - { + public static String systemCharset() { return Charset.defaultCharset().name(); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/Convert.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/Convert.java index b17dfdda..f9dce907 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/Convert.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/Convert.java @@ -6,32 +6,29 @@ import java.nio.ByteBuffer; import java.nio.charset.Charset; import java.text.NumberFormat; import java.util.Set; + import com.ruoyi.common.utils.StringUtils; /** * 类型转换器 - * + * * @author ruoyi */ -public class Convert -{ +public class Convert { /** * 转换为字符串
* 如果给定的值为null，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static String toStr(Object value, String defaultValue) - { - if (null == value) - { + public static String toStr(Object value, String defaultValue) { + if (null == value) { return defaultValue; } - if (value instanceof String) - { + if (value instanceof String) { return (String) value; } return value.toString(); @@ -41,12 +38,11 @@ public class Convert * 转换为字符串
* 如果给定的值为null，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static String toStr(Object value) - { + public static String toStr(Object value) { return toStr(value, null); } @@ -54,19 +50,16 @@ public class Convert * 转换为字符
* 如果给定的值为null，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Character toChar(Object value, Character defaultValue) - { - if (null == value) - { + public static Character toChar(Object value, Character defaultValue) { + if (null == value) { return defaultValue; } - if (value instanceof Character) - { + if (value instanceof Character) { return (Character) value; } @@ -78,12 +71,11 @@ public class Convert * 转换为字符
* 如果给定的值为null，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Character toChar(Object value) - { + public static Character toChar(Object value) { return toChar(value, null); } @@ -91,36 +83,28 @@ public class Convert * 转换为byte
* 如果给定的值为null，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Byte toByte(Object value, Byte defaultValue) - { - if (value == null) - { + public static Byte toByte(Object value, Byte defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Byte) - { + if (value instanceof Byte) { return (Byte) value; } - if (value instanceof Number) - { + if (value instanceof Number) { return ((Number) value).byteValue(); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return Byte.parseByte(valueStr); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -129,12 +113,11 @@ public class Convert * 转换为byte
* 如果给定的值为null，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Byte toByte(Object value) - { + public static Byte toByte(Object value) { return toByte(value, null); } @@ -142,36 +125,28 @@ public class Convert * 转换为Short
* 如果给定的值为null，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Short toShort(Object value, Short defaultValue) - { - if (value == null) - { + public static Short toShort(Object value, Short defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Short) - { + if (value instanceof Short) { return (Short) value; } - if (value instanceof Number) - { + if (value instanceof Number) { return ((Number) value).shortValue(); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return Short.parseShort(valueStr.trim()); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -180,12 +155,11 @@ public class Convert * 转换为Short
* 如果给定的值为null，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Short toShort(Object value) - { + public static Short toShort(Object value) { return toShort(value, null); } @@ -193,32 +167,25 @@ public class Convert * 转换为Number
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Number toNumber(Object value, Number defaultValue) - { - if (value == null) - { + public static Number toNumber(Object value, Number defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Number) - { + if (value instanceof Number) { return (Number) value; } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return NumberFormat.getInstance().parse(valueStr); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -227,12 +194,11 @@ public class Convert * 转换为Number
* 如果给定的值为空，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Number toNumber(Object value) - { + public static Number toNumber(Object value) { return toNumber(value, null); } @@ -240,36 +206,28 @@ public class Convert * 转换为int
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Integer toInt(Object value, Integer defaultValue) - { - if (value == null) - { + public static Integer toInt(Object value, Integer defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Integer) - { + if (value instanceof Integer) { return (Integer) value; } - if (value instanceof Number) - { + if (value instanceof Number) { return ((Number) value).intValue(); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return Integer.parseInt(valueStr.trim()); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -278,54 +236,48 @@ public class Convert * 转换为int
* 如果给定的值为null，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Integer toInt(Object value) - { + public static Integer toInt(Object value) { return toInt(value, null); } /** * 转换为Integer数组
- * + * * @param str 被转换的值 * @return 结果 */ - public static Integer[] toIntArray(String str) - { + public static Integer[] toIntArray(String str) { return toIntArray(",", str); } /** * 转换为Long数组
- * + * * @param str 被转换的值 * @return 结果 */ - public static Long[] toLongArray(String str) - { + public static Long[] toLongArray(String str) { return toLongArray(",", str); } /** * 转换为Integer数组
- * + * * @param split 分隔符 * @param split 被转换的值 * @return 结果 */ - public static Integer[] toIntArray(String split, String str) - { - if (StringUtils.isEmpty(str)) - { - return new Integer[] {}; + public static Integer[] toIntArray(String split, String str) { + if (StringUtils.isEmpty(str)) { + return new Integer[]{}; } String[] arr = str.split(split); final Integer[] ints = new Integer[arr.length]; - for (int i = 0; i < arr.length; i++) - { + for (int i = 0; i < arr.length; i++) { final Integer v = toInt(arr[i], 0); ints[i] = v; } @@ -334,21 +286,18 @@ public class Convert /** * 转换为Long数组
- * + * * @param split 分隔符 - * @param str 被转换的值 + * @param str 被转换的值 * @return 结果 */ - public static Long[] toLongArray(String split, String str) - { - if (StringUtils.isEmpty(str)) - { - return new Long[] {}; + public static Long[] toLongArray(String split, String str) { + if (StringUtils.isEmpty(str)) { + return new Long[]{}; } String[] arr = str.split(split); final Long[] longs = new Long[arr.length]; - for (int i = 0; i < arr.length; i++) - { + for (int i = 0; i < arr.length; i++) { final Long v = toLong(arr[i], null); longs[i] = v; } @@ -357,24 +306,22 @@ public class Convert /** * 转换为String数组
- * + * * @param str 被转换的值 * @return 结果 */ - public static String[] toStrArray(String str) - { + public static String[] toStrArray(String str) { return toStrArray(",", str); } /** * 转换为String数组
- * + * * @param split 分隔符 * @param split 被转换的值 * @return 结果 */ - public static String[] toStrArray(String split, String str) - { + public static String[] toStrArray(String split, String str) { return str.split(split); } @@ -382,37 +329,29 @@ public class Convert * 转换为long
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Long toLong(Object value, Long defaultValue) - { - if (value == null) - { + public static Long toLong(Object value, Long defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Long) - { + if (value instanceof Long) { return (Long) value; } - if (value instanceof Number) - { + if (value instanceof Number) { return ((Number) value).longValue(); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { // 支持科学计数法 return new BigDecimal(valueStr.trim()).longValue(); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -421,12 +360,11 @@ public class Convert * 转换为long
* 如果给定的值为null，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Long toLong(Object value) - { + public static Long toLong(Object value) { return toLong(value, null); } @@ -434,37 +372,29 @@ public class Convert * 转换为double
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Double toDouble(Object value, Double defaultValue) - { - if (value == null) - { + public static Double toDouble(Object value, Double defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Double) - { + if (value instanceof Double) { return (Double) value; } - if (value instanceof Number) - { + if (value instanceof Number) { return ((Number) value).doubleValue(); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { // 支持科学计数法 return new BigDecimal(valueStr.trim()).doubleValue(); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -473,12 +403,11 @@ public class Convert * 转换为double
* 如果给定的值为空，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Double toDouble(Object value) - { + public static Double toDouble(Object value) { return toDouble(value, null); } @@ -486,36 +415,28 @@ public class Convert * 转换为Float
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Float toFloat(Object value, Float defaultValue) - { - if (value == null) - { + public static Float toFloat(Object value, Float defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Float) - { + if (value instanceof Float) { return (Float) value; } - if (value instanceof Number) - { + if (value instanceof Number) { return ((Number) value).floatValue(); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return Float.parseFloat(valueStr.trim()); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -524,12 +445,11 @@ public class Convert * 转换为Float
* 如果给定的值为空，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Float toFloat(Object value) - { + public static Float toFloat(Object value) { return toFloat(value, null); } @@ -537,29 +457,24 @@ public class Convert * 转换为boolean
* String支持的值为：true、false、yes、ok、no，1,0 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static Boolean toBool(Object value, Boolean defaultValue) - { - if (value == null) - { + public static Boolean toBool(Object value, Boolean defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof Boolean) - { + if (value instanceof Boolean) { return (Boolean) value; } String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } valueStr = valueStr.trim().toLowerCase(); - switch (valueStr) - { + switch (valueStr) { case "true": return true; case "false": @@ -583,47 +498,39 @@ public class Convert * 转换为boolean
* 如果给定的值为空，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static Boolean toBool(Object value) - { + public static Boolean toBool(Object value) { return toBool(value, null); } /** * 转换为Enum对象
* 如果给定的值为空，或者转换失败，返回默认值
- * - * @param clazz Enum的Class - * @param value 值 + * + * @param clazz Enum的Class + * @param value 值 * @param defaultValue 默认值 * @return Enum */ - public static > E toEnum(Class clazz, Object value, E defaultValue) - { - if (value == null) - { + public static > E toEnum(Class clazz, Object value, E defaultValue) { + if (value == null) { return defaultValue; } - if (clazz.isAssignableFrom(value.getClass())) - { + if (clazz.isAssignableFrom(value.getClass())) { @SuppressWarnings("unchecked") E myE = (E) value; return myE; } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return Enum.valueOf(clazz, valueStr); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -631,13 +538,12 @@ public class Convert /** * 转换为Enum对象
* 如果给定的值为空，或者转换失败，返回默认值null
- * + * * @param clazz Enum的Class * @param value 值 * @return Enum */ - public static > E toEnum(Class clazz, Object value) - { + public static > E toEnum(Class clazz, Object value) { return toEnum(clazz, value, null); } @@ -645,36 +551,28 @@ public class Convert * 转换为BigInteger
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static BigInteger toBigInteger(Object value, BigInteger defaultValue) - { - if (value == null) - { + public static BigInteger toBigInteger(Object value, BigInteger defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof BigInteger) - { + if (value instanceof BigInteger) { return (BigInteger) value; } - if (value instanceof Long) - { + if (value instanceof Long) { return BigInteger.valueOf((Long) value); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return new BigInteger(valueStr); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -683,12 +581,11 @@ public class Convert * 转换为BigInteger
* 如果给定的值为空，或者转换失败，返回默认值null
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static BigInteger toBigInteger(Object value) - { + public static BigInteger toBigInteger(Object value) { return toBigInteger(value, null); } @@ -696,44 +593,34 @@ public class Convert * 转换为BigDecimal
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * - * @param value 被转换的值 + * + * @param value 被转换的值 * @param defaultValue 转换错误时的默认值 * @return 结果 */ - public static BigDecimal toBigDecimal(Object value, BigDecimal defaultValue) - { - if (value == null) - { + public static BigDecimal toBigDecimal(Object value, BigDecimal defaultValue) { + if (value == null) { return defaultValue; } - if (value instanceof BigDecimal) - { + if (value instanceof BigDecimal) { return (BigDecimal) value; } - if (value instanceof Long) - { + if (value instanceof Long) { return new BigDecimal((Long) value); } - if (value instanceof Double) - { + if (value instanceof Double) { return new BigDecimal((Double) value); } - if (value instanceof Integer) - { + if (value instanceof Integer) { return new BigDecimal((Integer) value); } final String valueStr = toStr(value, null); - if (StringUtils.isEmpty(valueStr)) - { + if (StringUtils.isEmpty(valueStr)) { return defaultValue; } - try - { + try { return new BigDecimal(valueStr); - } - catch (Exception e) - { + } catch (Exception e) { return defaultValue; } } @@ -742,65 +629,55 @@ public class Convert * 转换为BigDecimal
* 如果给定的值为空，或者转换失败，返回默认值
* 转换失败不会报错 - * + * * @param value 被转换的值 * @return 结果 */ - public static BigDecimal toBigDecimal(Object value) - { + public static BigDecimal toBigDecimal(Object value) { return toBigDecimal(value, null); } /** * 将对象转为字符串
* 1、Byte数组和ByteBuffer会被转换为对应字符串的数组 2、对象数组会调用Arrays.toString方法 - * + * * @param obj 对象 * @return 字符串 */ - public static String utf8Str(Object obj) - { + public static String utf8Str(Object obj) { return str(obj, CharsetKit.CHARSET_UTF_8); } /** * 将对象转为字符串
* 1、Byte数组和ByteBuffer会被转换为对应字符串的数组 2、对象数组会调用Arrays.toString方法 - * - * @param obj 对象 + * + * @param obj 对象 * @param charsetName 字符集 * @return 字符串 */ - public static String str(Object obj, String charsetName) - { + public static String str(Object obj, String charsetName) { return str(obj, Charset.forName(charsetName)); } /** * 将对象转为字符串
* 1、Byte数组和ByteBuffer会被转换为对应字符串的数组 2、对象数组会调用Arrays.toString方法 - * - * @param obj 对象 + * + * @param obj 对象 * @param charset 字符集 * @return 字符串 */ - public static String str(Object obj, Charset charset) - { - if (null == obj) - { + public static String str(Object obj, Charset charset) { + if (null == obj) { return null; } - if (obj instanceof String) - { + if (obj instanceof String) { return (String) obj; - } - else if (obj instanceof byte[] || obj instanceof Byte[]) - { + } else if (obj instanceof byte[] || obj instanceof Byte[]) { return str((Byte[]) obj, charset); - } - else if (obj instanceof ByteBuffer) - { + } else if (obj instanceof ByteBuffer) { return str((ByteBuffer) obj, charset); } return obj.toString(); @@ -808,32 +685,28 @@ public class Convert /** * 将byte数组转为字符串 - * - * @param bytes byte数组 + * + * @param bytes byte数组 * @param charset 字符集 * @return 字符串 */ - public static String str(byte[] bytes, String charset) - { + public static String str(byte[] bytes, String charset) { return str(bytes, StringUtils.isEmpty(charset) ? Charset.defaultCharset() : Charset.forName(charset)); } /** * 解码字节码 - * - * @param data 字符串 + * + * @param data 字符串 * @param charset 字符集，如果此字段为空，则解码的结果取决于平台 * @return 解码后的字符串 */ - public static String str(byte[] data, Charset charset) - { - if (data == null) - { + public static String str(byte[] data, Charset charset) { + if (data == null) { return null; } - if (null == charset) - { + if (null == charset) { return new String(data); } return new String(data, charset); @@ -841,15 +714,13 @@ public class Convert /** * 将编码的byteBuffer数据转换为字符串 - * - * @param data 数据 + * + * @param data 数据 * @param charset 字符集，如果为空使用当前系统字符集 * @return 字符串 */ - public static String str(ByteBuffer data, String charset) - { - if (data == null) - { + public static String str(ByteBuffer data, String charset) { + if (data == null) { return null; } @@ -858,56 +729,48 @@ public class Convert /** * 将编码的byteBuffer数据转换为字符串 - * - * @param data 数据 + * + * @param data 数据 * @param charset 字符集，如果为空使用当前系统字符集 * @return 字符串 */ - public static String str(ByteBuffer data, Charset charset) - { - if (null == charset) - { + public static String str(ByteBuffer data, Charset charset) { + if (null == charset) { charset = Charset.defaultCharset(); } return charset.decode(data).toString(); } // ----------------------------------------------------------------------- 全角半角转换 + /** * 半角转全角 - * + * * @param input String. * @return 全角字符串. */ - public static String toSBC(String input) - { + public static String toSBC(String input) { return toSBC(input, null); } /** * 半角转全角 - * - * @param input String + * + * @param input String * @param notConvertSet 不替换的字符集合 * @return 全角字符串. */ - public static String toSBC(String input, Set notConvertSet) - { + public static String toSBC(String input, Set notConvertSet) { char c[] = input.toCharArray(); - for (int i = 0; i < c.length; i++) - { - if (null != notConvertSet && notConvertSet.contains(c[i])) - { + for (int i = 0; i < c.length; i++) { + if (null != notConvertSet && notConvertSet.contains(c[i])) { // 跳过不替换的字符 continue; } - if (c[i] == ' ') - { + if (c[i] == ' ') { c[i] = '\u3000'; - } - else if (c[i] < '\177') - { + } else if (c[i] < '\177') { c[i] = (char) (c[i] + 65248); } @@ -917,39 +780,32 @@ public class Convert /** * 全角转半角 - * + * * @param input String. * @return 半角字符串 */ - public static String toDBC(String input) - { + public static String toDBC(String input) { return toDBC(input, null); } /** * 替换全角为半角 - * - * @param text 文本 + * + * @param text 文本 * @param notConvertSet 不替换的字符集合 * @return 替换后的字符 */ - public static String toDBC(String text, Set notConvertSet) - { + public static String toDBC(String text, Set notConvertSet) { char c[] = text.toCharArray(); - for (int i = 0; i < c.length; i++) - { - if (null != notConvertSet && notConvertSet.contains(c[i])) - { + for (int i = 0; i < c.length; i++) { + if (null != notConvertSet && notConvertSet.contains(c[i])) { // 跳过不替换的字符 continue; } - if (c[i] == '\u3000') - { + if (c[i] == '\u3000') { c[i] = ' '; - } - else if (c[i] > '\uFF00' && c[i] < '\uFF5F') - { + } else if (c[i] > '\uFF00' && c[i] < '\uFF5F') { c[i] = (char) (c[i] - 65248); } } @@ -960,35 +816,30 @@ public class Convert /** * 数字金额大写转换 先写个完整的然后将如零拾替换成零 - * + * * @param n 数字 * @return 中文大写数字 */ - public static String digitUppercase(double n) - { - String[] fraction = { "角", "分" }; - String[] digit = { "零", "壹", "贰", "叁", "肆", "伍", "陆", "柒", "捌", "玖" }; - String[][] unit = { { "元", "万", "亿" }, { "", "拾", "佰", "仟" } }; + public static String digitUppercase(double n) { + String[] fraction = {"角", "分"}; + String[] digit = {"零", "壹", "贰", "叁", "肆", "伍", "陆", "柒", "捌", "玖"}; + String[][] unit = {{"元", "万", "亿"}, {"", "拾", "佰", "仟"}}; String head = n < 0 ? "负" : ""; n = Math.abs(n); String s = ""; - for (int i = 0; i < fraction.length; i++) - { + for (int i = 0; i < fraction.length; i++) { s += (digit[(int) (Math.floor(n * 10 * Math.pow(10, i)) % 10)] + fraction[i]).replaceAll("(零.)+", ""); } - if (s.length() < 1) - { + if (s.length() < 1) { s = "整"; } int integerPart = (int) Math.floor(n); - for (int i = 0; i < unit[0].length && integerPart > 0; i++) - { + for (int i = 0; i < unit[0].length && integerPart > 0; i++) { String p = ""; - for (int j = 0; j < unit[1].length && n > 0; j++) - { + for (int j = 0; j < unit[1].length && n > 0; j++) { p = digit[integerPart % 10] + unit[1][j] + p; integerPart = integerPart / 10; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/StrFormatter.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/StrFormatter.java index c78ac776..eec64f99 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/StrFormatter.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/core/text/StrFormatter.java @@ -4,11 +4,10 @@ import com.ruoyi.common.utils.StringUtils; /** * 字符串格式化 - * + * * @author ruoyi */ -public class StrFormatter -{ +public class StrFormatter { public static final String EMPTY_JSON = "{}"; public static final char C_BACKSLASH = '\\'; public static final char C_DELIM_START = '{'; @@ -22,15 +21,13 @@ public class StrFormatter * 通常使用：format("this is {} for {}", "a", "b") -> this is a for b
* 转义{}： format("this is \\{} for {}", "a", "b") -> this is \{} for a
* 转义\： format("this is \\\\{} for {}", "a", "b") -> this is \a for b
- * + * * @param strPattern 字符串模板 - * @param argArray 参数列表 + * @param argArray 参数列表 * @return 结果 */ - public static String format(final String strPattern, final Object... argArray) - { - if (StringUtils.isEmpty(strPattern) || StringUtils.isEmpty(argArray)) - { + public static String format(final String strPattern, final Object... argArray) { + if (StringUtils.isEmpty(strPattern) || StringUtils.isEmpty(argArray)) { return strPattern; } final int strPatternLength = strPattern.length(); @@ -40,43 +37,30 @@ public class StrFormatter int handledPosition = 0; int delimIndex;// 占位符所在位置 - for (int argIndex = 0; argIndex < argArray.length; argIndex++) - { + for (int argIndex = 0; argIndex < argArray.length; argIndex++) { delimIndex = strPattern.indexOf(EMPTY_JSON, handledPosition); - if (delimIndex == -1) - { - if (handledPosition == 0) - { + if (delimIndex == -1) { + if (handledPosition == 0) { return strPattern; - } - else - { // 字符串模板剩余部分不再包含占位符，加入剩余部分后返回结果 + } else { // 字符串模板剩余部分不再包含占位符，加入剩余部分后返回结果 sbuf.append(strPattern, handledPosition, strPatternLength); return sbuf.toString(); } - } - else - { - if (delimIndex > 0 && strPattern.charAt(delimIndex - 1) == C_BACKSLASH) - { - if (delimIndex > 1 && strPattern.charAt(delimIndex - 2) == C_BACKSLASH) - { + } else { + if (delimIndex > 0 && strPattern.charAt(delimIndex - 1) == C_BACKSLASH) { + if (delimIndex > 1 && strPattern.charAt(delimIndex - 2) == C_BACKSLASH) { // 转义符之前还有一个转义符，占位符依旧有效 sbuf.append(strPattern, handledPosition, delimIndex - 1); sbuf.append(Convert.utf8Str(argArray[argIndex])); handledPosition = delimIndex + 2; - } - else - { + } else { // 占位符被转义 argIndex--; sbuf.append(strPattern, handledPosition, delimIndex - 1); sbuf.append(C_DELIM_START); handledPosition = delimIndex + 1; } - } - else - { + } else { // 正常占位符 sbuf.append(strPattern, handledPosition, delimIndex); sbuf.append(Convert.utf8Str(argArray[argIndex])); diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessStatus.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessStatus.java index 10b7306f..ce32cb41 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessStatus.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessStatus.java @@ -2,12 +2,10 @@ package com.ruoyi.common.enums; /** * 操作状态 - * - * @author ruoyi * + * @author ruoyi */ -public enum BusinessStatus -{ +public enum BusinessStatus { /** * 成功 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessType.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessType.java index 2e17c4a5..2d2f2e46 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessType.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/BusinessType.java @@ -2,11 +2,10 @@ package com.ruoyi.common.enums; /** * 业务操作类型 - * + * * @author ruoyi */ -public enum BusinessType -{ +public enum BusinessType { /** * 其它 */ @@ -51,7 +50,7 @@ public enum BusinessType * 生成代码 */ GENCODE, - + /** * 清空数据 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/DataSourceType.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/DataSourceType.java index 0d945be5..e9ed99af 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/DataSourceType.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/DataSourceType.java @@ -2,11 +2,10 @@ package com.ruoyi.common.enums; /** * 数据源 - * + * * @author ruoyi */ -public enum DataSourceType -{ +public enum DataSourceType { /** * 主库 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/HttpMethod.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/HttpMethod.java index be6f7392..a0cf8e5e 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/HttpMethod.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/HttpMethod.java @@ -2,6 +2,7 @@ package com.ruoyi.common.enums; import java.util.HashMap; import java.util.Map; + import org.springframework.lang.Nullable; /** @@ -9,28 +10,23 @@ import org.springframework.lang.Nullable; * * @author ruoyi */ -public enum HttpMethod -{ +public enum HttpMethod { GET, HEAD, POST, PUT, PATCH, DELETE, OPTIONS, TRACE; private static final Map mappings = new HashMap<>(16); - static - { - for (HttpMethod httpMethod : values()) - { + static { + for (HttpMethod httpMethod : values()) { mappings.put(httpMethod.name(), httpMethod); } } @Nullable - public static HttpMethod resolve(@Nullable String method) - { + public static HttpMethod resolve(@Nullable String method) { return (method != null ? mappings.get(method) : null); } - public boolean matches(String method) - { + public boolean matches(String method) { return (this == resolve(method)); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/OperatorType.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/OperatorType.java index bdd143c1..3c4127d9 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/OperatorType.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/OperatorType.java @@ -2,11 +2,10 @@ package com.ruoyi.common.enums; /** * 操作人类别 - * + * * @author ruoyi */ -public enum OperatorType -{ +public enum OperatorType { /** * 其它 */ diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/UserStatus.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/UserStatus.java index d7ff44a9..673ddebd 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/UserStatus.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/enums/UserStatus.java @@ -2,29 +2,25 @@ package com.ruoyi.common.enums; /** * 用户状态 - * + * * @author ruoyi */ -public enum UserStatus -{ +public enum UserStatus { OK("0", "正常"), DISABLE("1", "停用"), DELETED("2", "删除"); private final String code; private final String info; - UserStatus(String code, String info) - { + UserStatus(String code, String info) { this.code = code; this.info = info; } - public String getCode() - { + public String getCode() { return code; } - public String getInfo() - { + public String getInfo() { return info; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/BaseException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/BaseException.java index 92d6ae2d..21ff9fae 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/BaseException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/BaseException.java @@ -5,11 +5,10 @@ import com.ruoyi.common.utils.StringUtils; /** * 基础异常 - * + * * @author ruoyi */ -public class BaseException extends RuntimeException -{ +public class BaseException extends RuntimeException { private static final long serialVersionUID = 1L; /** @@ -32,66 +31,54 @@ public class BaseException extends RuntimeException */ private String defaultMessage; - public BaseException(String module, String code, Object[] args, String defaultMessage) - { + public BaseException(String module, String code, Object[] args, String defaultMessage) { this.module = module; this.code = code; this.args = args; this.defaultMessage = defaultMessage; } - public BaseException(String module, String code, Object[] args) - { + public BaseException(String module, String code, Object[] args) { this(module, code, args, null); } - public BaseException(String module, String defaultMessage) - { + public BaseException(String module, String defaultMessage) { this(module, null, null, defaultMessage); } - public BaseException(String code, Object[] args) - { + public BaseException(String code, Object[] args) { this(null, code, args, null); } - public BaseException(String defaultMessage) - { + public BaseException(String defaultMessage) { this(null, null, null, defaultMessage); } @Override - public String getMessage() - { + public String getMessage() { String message = null; - if (!StringUtils.isEmpty(code)) - { + if (!StringUtils.isEmpty(code)) { message = MessageUtils.message(code, args); } - if (message == null) - { + if (message == null) { message = defaultMessage; } return message; } - public String getModule() - { + public String getModule() { return module; } - public String getCode() - { + public String getCode() { return code; } - public Object[] getArgs() - { + public Object[] getArgs() { return args; } - public String getDefaultMessage() - { + public String getDefaultMessage() { return defaultMessage; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/CustomException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/CustomException.java index d96c7ba7..b9ee3afb 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/CustomException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/CustomException.java @@ -2,42 +2,36 @@ package com.ruoyi.common.exception; /** * 自定义异常 - * + * * @author ruoyi */ -public class CustomException extends RuntimeException -{ +public class CustomException extends RuntimeException { private static final long serialVersionUID = 1L; private Integer code; private String message; - public CustomException(String message) - { + public CustomException(String message) { this.message = message; } - public CustomException(String message, Integer code) - { + public CustomException(String message, Integer code) { this.message = message; this.code = code; } - public CustomException(String message, Throwable e) - { + public CustomException(String message, Throwable e) { super(message, e); this.message = message; } @Override - public String getMessage() - { + public String getMessage() { return message; } - public Integer getCode() - { + public Integer getCode() { return code; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/DemoModeException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/DemoModeException.java index f6ad2ab4..9178131d 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/DemoModeException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/DemoModeException.java @@ -2,14 +2,12 @@ package com.ruoyi.common.exception; /** * 演示模式异常 - * + * * @author ruoyi */ -public class DemoModeException extends RuntimeException -{ +public class DemoModeException extends RuntimeException { private static final long serialVersionUID = 1L; - public DemoModeException() - { + public DemoModeException() { } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/UtilException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/UtilException.java index 980fa465..01cc8782 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/UtilException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/UtilException.java @@ -2,25 +2,21 @@ package com.ruoyi.common.exception; /** * 工具类异常 - * + * * @author ruoyi */ -public class UtilException extends RuntimeException -{ +public class UtilException extends RuntimeException { private static final long serialVersionUID = 8247610319171014183L; - public UtilException(Throwable e) - { + public UtilException(Throwable e) { super(e.getMessage(), e); } - public UtilException(String message) - { + public UtilException(String message) { super(message); } - public UtilException(String message, Throwable throwable) - { + public UtilException(String message, Throwable throwable) { super(message, throwable); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileException.java index 75d6dbf1..95f59be5 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileException.java @@ -4,15 +4,13 @@ import com.ruoyi.common.exception.BaseException; /** * 文件信息异常类 - * + * * @author ruoyi */ -public class FileException extends BaseException -{ +public class FileException extends BaseException { private static final long serialVersionUID = 1L; - public FileException(String code, Object[] args) - { + public FileException(String code, Object[] args) { super("file", code, args, null); } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileNameLengthLimitExceededException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileNameLengthLimitExceededException.java index 70e0ec9b..64a5020d 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileNameLengthLimitExceededException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileNameLengthLimitExceededException.java @@ -2,15 +2,13 @@ package com.ruoyi.common.exception.file; /** * 文件名称超长限制异常类 - * + * * @author ruoyi */ -public class FileNameLengthLimitExceededException extends FileException -{ +public class FileNameLengthLimitExceededException extends FileException { private static final long serialVersionUID = 1L; - public FileNameLengthLimitExceededException(int defaultFileNameLength) - { - super("upload.filename.exceed.length", new Object[] { defaultFileNameLength }); + public FileNameLengthLimitExceededException(int defaultFileNameLength) { + super("upload.filename.exceed.length", new Object[]{defaultFileNameLength}); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileSizeLimitExceededException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileSizeLimitExceededException.java index ec6ab054..93e9e1c6 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileSizeLimitExceededException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/FileSizeLimitExceededException.java @@ -2,15 +2,13 @@ package com.ruoyi.common.exception.file; /** * 文件名大小限制异常类 - * + * * @author ruoyi */ -public class FileSizeLimitExceededException extends FileException -{ +public class FileSizeLimitExceededException extends FileException { private static final long serialVersionUID = 1L; - public FileSizeLimitExceededException(long defaultMaxSize) - { - super("upload.exceed.maxSize", new Object[] { defaultMaxSize }); + public FileSizeLimitExceededException(long defaultMaxSize) { + super("upload.exceed.maxSize", new Object[]{defaultMaxSize}); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/InvalidExtensionException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/InvalidExtensionException.java index 8f63a799..ce5c7fda 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/InvalidExtensionException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/file/InvalidExtensionException.java @@ -1,70 +1,60 @@ package com.ruoyi.common.exception.file; import java.util.Arrays; + import org.apache.commons.fileupload.FileUploadException; /** * 文件上传 误异常类 - * + * * @author ruoyi */ -public class InvalidExtensionException extends FileUploadException -{ +public class InvalidExtensionException extends FileUploadException { private static final long serialVersionUID = 1L; private String[] allowedExtension; private String extension; private String filename; - public InvalidExtensionException(String[] allowedExtension, String extension, String filename) - { + public InvalidExtensionException(String[] allowedExtension, String extension, String filename) { super("filename : [" + filename + "], extension : [" + extension + "], allowed extension : [" + Arrays.toString(allowedExtension) + "]"); this.allowedExtension = allowedExtension; this.extension = extension; this.filename = filename; } - public String[] getAllowedExtension() - { + public String[] getAllowedExtension() { return allowedExtension; } - public String getExtension() - { + public String getExtension() { return extension; } - public String getFilename() - { + public String getFilename() { return filename; } - public static class InvalidImageExtensionException extends InvalidExtensionException - { + public static class InvalidImageExtensionException extends InvalidExtensionException { private static final long serialVersionUID = 1L; - public InvalidImageExtensionException(String[] allowedExtension, String extension, String filename) - { + public InvalidImageExtensionException(String[] allowedExtension, String extension, String filename) { super(allowedExtension, extension, filename); } } - public static class InvalidFlashExtensionException extends InvalidExtensionException - { + public static class InvalidFlashExtensionException extends InvalidExtensionException { private static final long serialVersionUID = 1L; - public InvalidFlashExtensionException(String[] allowedExtension, String extension, String filename) - { + public InvalidFlashExtensionException(String[] allowedExtension, String extension, String filename) { super(allowedExtension, extension, filename); } } - public static class InvalidMediaExtensionException extends InvalidExtensionException - { + public static class InvalidMediaExtensionException extends InvalidExtensionException { private static final long serialVersionUID = 1L; - public InvalidMediaExtensionException(String[] allowedExtension, String extension, String filename) - { + public InvalidMediaExtensionException(String[] allowedExtension, String extension, String filename) { super(allowedExtension, extension, filename); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/job/TaskException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/job/TaskException.java index a567b408..c9ac31f1 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/job/TaskException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/job/TaskException.java @@ -2,33 +2,28 @@ package com.ruoyi.common.exception.job; /** * 计划策略异常 - * + * * @author ruoyi */ -public class TaskException extends Exception -{ +public class TaskException extends Exception { private static final long serialVersionUID = 1L; private Code code; - public TaskException(String msg, Code code) - { + public TaskException(String msg, Code code) { this(msg, code, null); } - public TaskException(String msg, Code code, Exception nestedEx) - { + public TaskException(String msg, Code code, Exception nestedEx) { super(msg, nestedEx); this.code = code; } - public Code getCode() - { + public Code getCode() { return code; } - public enum Code - { + public enum Code { TASK_EXISTS, NO_TASK_EXISTS, TASK_ALREADY_STARTED, UNKNOWN, CONFIG_ERROR, TASK_NODE_NOT_AVAILABLE } } \ No newline at end of file diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaException.java index 389dbc75..90404854 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaException.java @@ -2,15 +2,13 @@ package com.ruoyi.common.exception.user; /** * 验证码错误异常类 - * + * * @author ruoyi */ -public class CaptchaException extends UserException -{ +public class CaptchaException extends UserException { private static final long serialVersionUID = 1L; - public CaptchaException() - { + public CaptchaException() { super("user.jcaptcha.error", null); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaExpireException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaExpireException.java index 85f94861..ae5f759f 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaExpireException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/CaptchaExpireException.java @@ -2,15 +2,13 @@ package com.ruoyi.common.exception.user; /** * 验证码失效异常类 - * + * * @author ruoyi */ -public class CaptchaExpireException extends UserException -{ +public class CaptchaExpireException extends UserException { private static final long serialVersionUID = 1L; - public CaptchaExpireException() - { + public CaptchaExpireException() { super("user.jcaptcha.expire", null); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserException.java index aa015f88..886ffb5a 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserException.java @@ -4,15 +4,13 @@ import com.ruoyi.common.exception.BaseException; /** * 用户信息异常类 - * + * * @author ruoyi */ -public class UserException extends BaseException -{ +public class UserException extends BaseException { private static final long serialVersionUID = 1L; - public UserException(String code, Object[] args) - { + public UserException(String code, Object[] args) { super("user", code, args, null); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserPasswordNotMatchException.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserPasswordNotMatchException.java index a7f3e5ff..0fab1167 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserPasswordNotMatchException.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/exception/user/UserPasswordNotMatchException.java @@ -2,15 +2,13 @@ package com.ruoyi.common.exception.user; /** * 用户密码不正确或不符合规范异常类 - * + * * @author ruoyi */ -public class UserPasswordNotMatchException extends UserException -{ +public class UserPasswordNotMatchException extends UserException { private static final long serialVersionUID = 1L; - public UserPasswordNotMatchException() - { + public UserPasswordNotMatchException() { super("user.password.not.match", null); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatableFilter.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatableFilter.java index ac45bfc3..e1fc3a61 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatableFilter.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatableFilter.java @@ -8,45 +8,38 @@ import javax.servlet.ServletException; import javax.servlet.ServletRequest; import javax.servlet.ServletResponse; import javax.servlet.http.HttpServletRequest; + import org.springframework.http.MediaType; import com.ruoyi.common.utils.StringUtils; /** * Repeatable 过滤器 - * + * * @author ruoyi */ -public class RepeatableFilter implements Filter -{ +public class RepeatableFilter implements Filter { @Override - public void init(FilterConfig filterConfig) throws ServletException - { + public void init(FilterConfig filterConfig) throws ServletException { } @Override public void doFilter(ServletRequest request, ServletResponse response, FilterChain chain) - throws IOException, ServletException - { + throws IOException, ServletException { ServletRequest requestWrapper = null; if (request instanceof HttpServletRequest - && StringUtils.equalsAnyIgnoreCase(request.getContentType(), MediaType.APPLICATION_JSON_VALUE)) - { + && StringUtils.equalsAnyIgnoreCase(request.getContentType(), MediaType.APPLICATION_JSON_VALUE)) { requestWrapper = new RepeatedlyRequestWrapper((HttpServletRequest) request, response); } - if (null == requestWrapper) - { + if (null == requestWrapper) { chain.doFilter(request, response); - } - else - { + } else { chain.doFilter(requestWrapper, response); } } @Override - public void destroy() - { + public void destroy() { } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatedlyRequestWrapper.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatedlyRequestWrapper.java index bd7097f5..f72291ce 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatedlyRequestWrapper.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/RepeatedlyRequestWrapper.java @@ -9,19 +9,18 @@ import javax.servlet.ServletInputStream; import javax.servlet.ServletResponse; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletRequestWrapper; + import com.ruoyi.common.utils.http.HttpHelper; /** * 构建可重复读取inputStream的request - * + * * @author ruoyi */ -public class RepeatedlyRequestWrapper extends HttpServletRequestWrapper -{ +public class RepeatedlyRequestWrapper extends HttpServletRequestWrapper { private final byte[] body; - public RepeatedlyRequestWrapper(HttpServletRequest request, ServletResponse response) throws IOException - { + public RepeatedlyRequestWrapper(HttpServletRequest request, ServletResponse response) throws IOException { super(request); request.setCharacterEncoding("UTF-8"); response.setCharacterEncoding("UTF-8"); @@ -30,41 +29,34 @@ public class RepeatedlyRequestWrapper extends HttpServletRequestWrapper } @Override - public BufferedReader getReader() throws IOException - { + public BufferedReader getReader() throws IOException { return new BufferedReader(new InputStreamReader(getInputStream())); } @Override - public ServletInputStream getInputStream() throws IOException - { + public ServletInputStream getInputStream() throws IOException { final ByteArrayInputStream bais = new ByteArrayInputStream(body); - return new ServletInputStream() - { + return new ServletInputStream() { @Override - public int read() throws IOException - { + public int read() throws IOException { return bais.read(); } @Override - public boolean isFinished() - { + public boolean isFinished() { return false; } @Override - public boolean isReady() - { + public boolean isReady() { return false; } @Override - public void setReadListener(ReadListener readListener) - { + public void setReadListener(ReadListener readListener) { } }; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssFilter.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssFilter.java index b3df122e..729aa2d2 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssFilter.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssFilter.java @@ -13,15 +13,15 @@ import javax.servlet.ServletRequest; import javax.servlet.ServletResponse; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import com.ruoyi.common.utils.StringUtils; /** * 防止XSS攻击的过滤器 - * + * * @author ruoyi */ -public class XssFilter implements Filter -{ +public class XssFilter implements Filter { /** * 排除链接 */ @@ -33,32 +33,26 @@ public class XssFilter implements Filter public boolean enabled = false; @Override - public void init(FilterConfig filterConfig) throws ServletException - { + public void init(FilterConfig filterConfig) throws ServletException { String tempExcludes = filterConfig.getInitParameter("excludes"); String tempEnabled = filterConfig.getInitParameter("enabled"); - if (StringUtils.isNotEmpty(tempExcludes)) - { + if (StringUtils.isNotEmpty(tempExcludes)) { String[] url = tempExcludes.split(","); - for (int i = 0; url != null && i < url.length; i++) - { + for (int i = 0; url != null && i < url.length; i++) { excludes.add(url[i]); } } - if (StringUtils.isNotEmpty(tempEnabled)) - { + if (StringUtils.isNotEmpty(tempEnabled)) { enabled = Boolean.valueOf(tempEnabled); } } @Override public void doFilter(ServletRequest request, ServletResponse response, FilterChain chain) - throws IOException, ServletException - { + throws IOException, ServletException { HttpServletRequest req = (HttpServletRequest) request; HttpServletResponse resp = (HttpServletResponse) response; - if (handleExcludeURL(req, resp)) - { + if (handleExcludeURL(req, resp)) { chain.doFilter(request, response); return; } @@ -66,23 +60,18 @@ public class XssFilter implements Filter chain.doFilter(xssRequest, response); } - private boolean handleExcludeURL(HttpServletRequest request, HttpServletResponse response) - { - if (!enabled) - { + private boolean handleExcludeURL(HttpServletRequest request, HttpServletResponse response) { + if (!enabled) { return true; } - if (excludes == null || excludes.isEmpty()) - { + if (excludes == null || excludes.isEmpty()) { return false; } String url = request.getServletPath(); - for (String pattern : excludes) - { + for (String pattern : excludes) { Pattern p = Pattern.compile("^" + pattern); Matcher m = p.matcher(url); - if (m.find()) - { + if (m.find()) { return true; } } @@ -90,8 +79,7 @@ public class XssFilter implements Filter } @Override - public void destroy() - { + public void destroy() { } } \ No newline at end of file diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssHttpServletRequestWrapper.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssHttpServletRequestWrapper.java index 3c9efb29..7152f4d3 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssHttpServletRequestWrapper.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/filter/XssHttpServletRequestWrapper.java @@ -6,6 +6,7 @@ import javax.servlet.ReadListener; import javax.servlet.ServletInputStream; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletRequestWrapper; + import org.apache.commons.io.IOUtils; import org.springframework.http.HttpHeaders; import org.springframework.http.MediaType; @@ -14,29 +15,24 @@ import com.ruoyi.common.utils.html.EscapeUtil; /** * XSS过滤处理 - * + * * @author ruoyi */ -public class XssHttpServletRequestWrapper extends HttpServletRequestWrapper -{ +public class XssHttpServletRequestWrapper extends HttpServletRequestWrapper { /** * @param request */ - public XssHttpServletRequestWrapper(HttpServletRequest request) - { + public XssHttpServletRequestWrapper(HttpServletRequest request) { super(request); } @Override - public String[] getParameterValues(String name) - { + public String[] getParameterValues(String name) { String[] values = super.getParameterValues(name); - if (values != null) - { + if (values != null) { int length = values.length; String[] escapseValues = new String[length]; - for (int i = 0; i < length; i++) - { + for (int i = 0; i < length; i++) { // 防xss攻击和过滤前后空格 escapseValues[i] = EscapeUtil.clean(values[i]).trim(); } @@ -46,46 +42,38 @@ public class XssHttpServletRequestWrapper extends HttpServletRequestWrapper } @Override - public ServletInputStream getInputStream() throws IOException - { + public ServletInputStream getInputStream() throws IOException { // 非json类型，直接返回 - if (!isJsonRequest()) - { + if (!isJsonRequest()) { return super.getInputStream(); } // 为空，直接返回 String json = IOUtils.toString(super.getInputStream(), "utf-8"); - if (StringUtils.isEmpty(json)) - { + if (StringUtils.isEmpty(json)) { return super.getInputStream(); } // xss过滤 json = EscapeUtil.clean(json).trim(); final ByteArrayInputStream bis = new ByteArrayInputStream(json.getBytes("utf-8")); - return new ServletInputStream() - { + return new ServletInputStream() { @Override - public boolean isFinished() - { + public boolean isFinished() { return true; } @Override - public boolean isReady() - { + public boolean isReady() { return true; } @Override - public void setReadListener(ReadListener readListener) - { + public void setReadListener(ReadListener readListener) { } @Override - public int read() throws IOException - { + public int read() throws IOException { return bis.read(); } }; @@ -93,11 +81,10 @@ public class XssHttpServletRequestWrapper extends HttpServletRequestWrapper /** * 是否是Json请求 - * + * * @param request */ - public boolean isJsonRequest() - { + public boolean isJsonRequest() { String header = super.getHeader(HttpHeaders.CONTENT_TYPE); return MediaType.APPLICATION_JSON_VALUE.equalsIgnoreCase(header); } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Arith.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Arith.java index 48a650e8..e8abc25e 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Arith.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Arith.java @@ -5,28 +5,30 @@ import java.math.RoundingMode; /** * 精确的浮点数运算 - * + * * @author ruoyi */ -public class Arith -{ +public class Arith { - /** 默认除法运算精度 */ + /** + * 默认除法运算精度 + */ private static final int DEF_DIV_SCALE = 10; - /** 这个类不能实例化 */ - private Arith() - { + /** + * 这个类不能实例化 + */ + private Arith() { } /** * 提供精确的加法运算。 + * * @param v1 被加数 * @param v2 加数 * @return 两个参数的和 */ - public static double add(double v1, double v2) - { + public static double add(double v1, double v2) { BigDecimal b1 = new BigDecimal(Double.toString(v1)); BigDecimal b2 = new BigDecimal(Double.toString(v2)); return b1.add(b2).doubleValue(); @@ -34,12 +36,12 @@ public class Arith /** * 提供精确的减法运算。 + * * @param v1 被减数 * @param v2 减数 * @return 两个参数的差 */ - public static double sub(double v1, double v2) - { + public static double sub(double v1, double v2) { BigDecimal b1 = new BigDecimal(Double.toString(v1)); BigDecimal b2 = new BigDecimal(Double.toString(v2)); return b1.subtract(b2).doubleValue(); @@ -47,12 +49,12 @@ public class Arith /** * 提供精确的乘法运算。 + * * @param v1 被乘数 * @param v2 乘数 * @return 两个参数的积 */ - public static double mul(double v1, double v2) - { + public static double mul(double v1, double v2) { BigDecimal b1 = new BigDecimal(Double.toString(v1)); BigDecimal b2 = new BigDecimal(Double.toString(v2)); return b1.multiply(b2).doubleValue(); @@ -61,34 +63,32 @@ public class Arith /** * 提供（相对）精确的除法运算，当发生除不尽的情况时，精确到 * 小数点以后10位，以后的数字四舍五入。 + * * @param v1 被除数 * @param v2 除数 * @return 两个参数的商 */ - public static double div(double v1, double v2) - { + public static double div(double v1, double v2) { return div(v1, v2, DEF_DIV_SCALE); } /** * 提供（相对）精确的除法运算。当发生除不尽的情况时，由scale参数指 * 定精度，以后的数字四舍五入。 - * @param v1 被除数 - * @param v2 除数 + * + * @param v1 被除数 + * @param v2 除数 * @param scale 表示表示需要精确到小数点以后几位。 * @return 两个参数的商 */ - public static double div(double v1, double v2, int scale) - { - if (scale < 0) - { + public static double div(double v1, double v2, int scale) { + if (scale < 0) { throw new IllegalArgumentException( "The scale must be a positive integer or zero"); } BigDecimal b1 = new BigDecimal(Double.toString(v1)); BigDecimal b2 = new BigDecimal(Double.toString(v2)); - if (b1.compareTo(BigDecimal.ZERO) == 0) - { + if (b1.compareTo(BigDecimal.ZERO) == 0) { return BigDecimal.ZERO.doubleValue(); } return b1.divide(b2, scale, RoundingMode.HALF_UP).doubleValue(); @@ -96,14 +96,13 @@ public class Arith /** * 提供精确的小数位四舍五入处理。 - * @param v 需要四舍五入的数字 + * + * @param v 需要四舍五入的数字 * @param scale 小数点后保留几位 * @return 四舍五入后的结果 */ - public static double round(double v, int scale) - { - if (scale < 0) - { + public static double round(double v, int scale) { + if (scale < 0) { throw new IllegalArgumentException( "The scale must be a positive integer or zero"); } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DateUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DateUtils.java index 536cb3cf..0ecacf32 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DateUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DateUtils.java @@ -4,15 +4,15 @@ import java.lang.management.ManagementFactory; import java.text.ParseException; import java.text.SimpleDateFormat; import java.util.Date; + import org.apache.commons.lang3.time.DateFormatUtils; /** * 时间工具类 - * + * * @author ruoyi */ -public class DateUtils extends org.apache.commons.lang3.time.DateUtils -{ +public class DateUtils extends org.apache.commons.lang3.time.DateUtils { public static String YYYY = "yyyy"; public static String YYYY_MM = "yyyy-MM"; @@ -22,65 +22,54 @@ public class DateUtils extends org.apache.commons.lang3.time.DateUtils public static String YYYYMMDDHHMMSS = "yyyyMMddHHmmss"; public static String YYYY_MM_DD_HH_MM_SS = "yyyy-MM-dd HH:mm:ss"; - + private static String[] parsePatterns = { - "yyyy-MM-dd", "yyyy-MM-dd HH:mm:ss", "yyyy-MM-dd HH:mm", "yyyy-MM", + "yyyy-MM-dd", "yyyy-MM-dd HH:mm:ss", "yyyy-MM-dd HH:mm", "yyyy-MM", "yyyy/MM/dd", "yyyy/MM/dd HH:mm:ss", "yyyy/MM/dd HH:mm", "yyyy/MM", "yyyy.MM.dd", "yyyy.MM.dd HH:mm:ss", "yyyy.MM.dd HH:mm", "yyyy.MM"}; /** * 获取当前Date型日期 - * + * * @return Date() 当前日期 */ - public static Date getNowDate() - { + public static Date getNowDate() { return new Date(); } /** * 获取当前日期, 默认格式为yyyy-MM-dd - * + * * @return String */ - public static String getDate() - { + public static String getDate() { return dateTimeNow(YYYY_MM_DD); } - public static final String getTime() - { + public static final String getTime() { return dateTimeNow(YYYY_MM_DD_HH_MM_SS); } - public static final String dateTimeNow() - { + public static final String dateTimeNow() { return dateTimeNow(YYYYMMDDHHMMSS); } - public static final String dateTimeNow(final String format) - { + public static final String dateTimeNow(final String format) { return parseDateToStr(format, new Date()); } - public static final String dateTime(final Date date) - { + public static final String dateTime(final Date date) { return parseDateToStr(YYYY_MM_DD, date); } - public static final String parseDateToStr(final String format, final Date date) - { + public static final String parseDateToStr(final String format, final Date date) { return new SimpleDateFormat(format).format(date); } - public static final Date dateTime(final String format, final String ts) - { - try - { + public static final Date dateTime(final String format, final String ts) { + try { return new SimpleDateFormat(format).parse(ts); - } - catch (ParseException e) - { + } catch (ParseException e) { throw new RuntimeException(e); } } @@ -88,8 +77,7 @@ public class DateUtils extends org.apache.commons.lang3.time.DateUtils /** * 日期路径 即年/月/日 如2018/08/08 */ - public static final String datePath() - { + public static final String datePath() { Date now = new Date(); return DateFormatUtils.format(now, "yyyy/MM/dd"); } @@ -97,8 +85,7 @@ public class DateUtils extends org.apache.commons.lang3.time.DateUtils /** * 日期路径 即年/月/日 如20180808 */ - public static final String dateTime() - { + public static final String dateTime() { Date now = new Date(); return DateFormatUtils.format(now, "yyyyMMdd"); } @@ -106,27 +93,21 @@ public class DateUtils extends org.apache.commons.lang3.time.DateUtils /** * 日期型字符串转化为日期 格式 */ - public static Date parseDate(Object str) - { - if (str == null) - { + public static Date parseDate(Object str) { + if (str == null) { return null; } - try - { + try { return parseDate(str.toString(), parsePatterns); - } - catch (ParseException e) - { + } catch (ParseException e) { return null; } } - + /** * 获取服务器启动时间 */ - public static Date getServerStartDate() - { + public static Date getServerStartDate() { long time = ManagementFactory.getRuntimeMXBean().getStartTime(); return new Date(time); } @@ -134,8 +115,7 @@ public class DateUtils extends org.apache.commons.lang3.time.DateUtils /** * 计算两个时间差 */ - public static String getDatePoor(Date endDate, Date nowDate) - { + public static String getDatePoor(Date endDate, Date nowDate) { long nd = 1000 * 24 * 60 * 60; long nh = 1000 * 60 * 60; long nm = 1000 * 60; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DictUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DictUtils.java index 0a2ef1fb..5d7e838c 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DictUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/DictUtils.java @@ -2,6 +2,7 @@ package com.ruoyi.common.utils; import java.util.Collection; import java.util.List; + import com.ruoyi.common.constant.Constants; import com.ruoyi.common.core.domain.entity.SysDictData; import com.ruoyi.common.core.redis.RedisCache; @@ -9,11 +10,10 @@ import com.ruoyi.common.utils.spring.SpringUtils; /** * 字典工具类 - * + * * @author ruoyi */ -public class DictUtils -{ +public class DictUtils { /** * 分隔符 */ @@ -21,26 +21,23 @@ public class DictUtils /** * 设置字典缓存 - * - * @param key 参数键 + * + * @param key 参数键 * @param dictDatas 字典数据列表 */ - public static void setDictCache(String key, List dictDatas) - { + public static void setDictCache(String key, List dictDatas) { SpringUtils.getBean(RedisCache.class).setCacheObject(getCacheKey(key), dictDatas); } /** * 获取字典缓存 - * + * * @param key 参数键 * @return dictDatas 字典数据列表 */ - public static List getDictCache(String key) - { + public static List getDictCache(String key) { Object cacheObj = SpringUtils.getBean(RedisCache.class).getCacheObject(getCacheKey(key)); - if (StringUtils.isNotNull(cacheObj)) - { + if (StringUtils.isNotNull(cacheObj)) { List dictDatas = StringUtils.cast(cacheObj); return dictDatas; } @@ -49,61 +46,50 @@ public class DictUtils /** * 根据字典类型和字典值获取字典标签 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictValue 字典值 * @return 字典标签 */ - public static String getDictLabel(String dictType, String dictValue) - { + public static String getDictLabel(String dictType, String dictValue) { return getDictLabel(dictType, dictValue, SEPARATOR); } /** * 根据字典类型和字典标签获取字典值 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictLabel 字典标签 * @return 字典值 */ - public static String getDictValue(String dictType, String dictLabel) - { + public static String getDictValue(String dictType, String dictLabel) { return getDictValue(dictType, dictLabel, SEPARATOR); } /** * 根据字典类型和字典值获取字典标签 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictValue 字典值 * @param separator 分隔符 * @return 字典标签 */ - public static String getDictLabel(String dictType, String dictValue, String separator) - { + public static String getDictLabel(String dictType, String dictValue, String separator) { StringBuilder propertyString = new StringBuilder(); List datas = getDictCache(dictType); - if (StringUtils.containsAny(separator, dictValue) && StringUtils.isNotEmpty(datas)) - { - for (SysDictData dict : datas) - { - for (String value : dictValue.split(separator)) - { - if (value.equals(dict.getDictValue())) - { + if (StringUtils.containsAny(separator, dictValue) && StringUtils.isNotEmpty(datas)) { + for (SysDictData dict : datas) { + for (String value : dictValue.split(separator)) { + if (value.equals(dict.getDictValue())) { propertyString.append(dict.getDictLabel() + separator); break; } } } - } - else - { - for (SysDictData dict : datas) - { - if (dictValue.equals(dict.getDictValue())) - { + } else { + for (SysDictData dict : datas) { + if (dictValue.equals(dict.getDictValue())) { return dict.getDictLabel(); } } @@ -113,37 +99,28 @@ public class DictUtils /** * 根据字典类型和字典标签获取字典值 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictLabel 字典标签 * @param separator 分隔符 * @return 字典值 */ - public static String getDictValue(String dictType, String dictLabel, String separator) - { + public static String getDictValue(String dictType, String dictLabel, String separator) { StringBuilder propertyString = new StringBuilder(); List datas = getDictCache(dictType); - if (StringUtils.containsAny(separator, dictLabel) && StringUtils.isNotEmpty(datas)) - { - for (SysDictData dict : datas) - { - for (String label : dictLabel.split(separator)) - { - if (label.equals(dict.getDictLabel())) - { + if (StringUtils.containsAny(separator, dictLabel) && StringUtils.isNotEmpty(datas)) { + for (SysDictData dict : datas) { + for (String label : dictLabel.split(separator)) { + if (label.equals(dict.getDictLabel())) { propertyString.append(dict.getDictValue() + separator); break; } } } - } - else - { - for (SysDictData dict : datas) - { - if (dictLabel.equals(dict.getDictLabel())) - { + } else { + for (SysDictData dict : datas) { + if (dictLabel.equals(dict.getDictLabel())) { return dict.getDictValue(); } } @@ -154,20 +131,18 @@ public class DictUtils /** * 清空字典缓存 */ - public static void clearDictCache() - { + public static void clearDictCache() { Collection keys = SpringUtils.getBean(RedisCache.class).keys(Constants.SYS_DICT_KEY + "*"); SpringUtils.getBean(RedisCache.class).deleteObject(keys); } /** * 设置cache key - * + * * @param configKey 参数键 * @return 缓存键key */ - public static String getCacheKey(String configKey) - { + public static String getCacheKey(String configKey) { return Constants.SYS_DICT_KEY + configKey; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ExceptionUtil.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ExceptionUtil.java index ad57439b..56406fdf 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ExceptionUtil.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ExceptionUtil.java @@ -2,6 +2,7 @@ package com.ruoyi.common.utils; import java.io.PrintWriter; import java.io.StringWriter; + import org.apache.commons.lang3.exception.ExceptionUtils; /** @@ -9,30 +10,25 @@ import org.apache.commons.lang3.exception.ExceptionUtils; * * @author ruoyi */ -public class ExceptionUtil -{ +public class ExceptionUtil { /** * 获取exception的详细错误信息。 */ - public static String getExceptionMessage(Throwable e) - { + public static String getExceptionMessage(Throwable e) { StringWriter sw = new StringWriter(); e.printStackTrace(new PrintWriter(sw, true)); String str = sw.toString(); return str; } - public static String getRootErrorMseeage(Exception e) - { + public static String getRootErrorMseeage(Exception e) { Throwable root = ExceptionUtils.getRootCause(e); root = (root == null ? e : root); - if (root == null) - { + if (root == null) { return ""; } String msg = root.getMessage(); - if (msg == null) - { + if (msg == null) { return "null"; } return StringUtils.defaultString(msg); diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/LogUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/LogUtils.java index 0de30c6b..a0d5c9f6 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/LogUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/LogUtils.java @@ -2,15 +2,12 @@ package com.ruoyi.common.utils; /** * 处理并记录日志文件 - * + * * @author ruoyi */ -public class LogUtils -{ - public static String getBlock(Object msg) - { - if (msg == null) - { +public class LogUtils { + public static String getBlock(Object msg) { + if (msg == null) { msg = ""; } return "[" + msg.toString() + "]"; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/MessageUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/MessageUtils.java index 7dac75a3..d9eb4b97 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/MessageUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/MessageUtils.java @@ -6,11 +6,10 @@ import com.ruoyi.common.utils.spring.SpringUtils; /** * 获取i18n资源文件 - * + * * @author ruoyi */ -public class MessageUtils -{ +public class MessageUtils { /** * 根据消息键和参数 获取消息 委托给spring messageSource * @@ -18,8 +17,7 @@ public class MessageUtils * @param args 参数 * @return 获取国际化翻译值 */ - public static String message(String code, Object... args) - { + public static String message(String code, Object... args) { MessageSource messageSource = SpringUtils.getBean(MessageSource.class); return messageSource.getMessage(code, args, LocaleContextHolder.getLocale()); } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/SecurityUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/SecurityUtils.java index aec57768..bef342f2 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/SecurityUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/SecurityUtils.java @@ -9,22 +9,18 @@ import com.ruoyi.common.exception.CustomException; /** * 安全服务工具类 - * + * * @author ruoyi */ -public class SecurityUtils -{ +public class SecurityUtils { /** * 获取用户账户 **/ - public static String getUsername() - { - try - { + public static String getUsername() { + try { return getLoginUser().getUsername(); - } - catch (Exception e) - { + } catch (Exception e) { + e.printStackTrace(); throw new CustomException("获取用户账户异常", HttpStatus.UNAUTHORIZED); } } @@ -32,14 +28,10 @@ public class SecurityUtils /** * 获取用户 **/ - public static LoginUser getLoginUser() - { - try - { + public static LoginUser getLoginUser() { + try { return (LoginUser) getAuthentication().getPrincipal(); - } - catch (Exception e) - { + } catch (Exception e) { throw new CustomException("获取用户信息异常", HttpStatus.UNAUTHORIZED); } } @@ -47,8 +39,7 @@ public class SecurityUtils /** * 获取Authentication */ - public static Authentication getAuthentication() - { + public static Authentication getAuthentication() { return SecurityContextHolder.getContext().getAuthentication(); } @@ -58,8 +49,7 @@ public class SecurityUtils * @param password 密码 * @return 加密字符串 */ - public static String encryptPassword(String password) - { + public static String encryptPassword(String password) { BCryptPasswordEncoder passwordEncoder = new BCryptPasswordEncoder(); return passwordEncoder.encode(password); } @@ -67,24 +57,22 @@ public class SecurityUtils /** * 判断密码是否相同 * - * @param rawPassword 真实密码 + * @param rawPassword 真实密码 * @param encodedPassword 加密后字符 * @return 结果 */ - public static boolean matchesPassword(String rawPassword, String encodedPassword) - { + public static boolean matchesPassword(String rawPassword, String encodedPassword) { BCryptPasswordEncoder passwordEncoder = new BCryptPasswordEncoder(); return passwordEncoder.matches(rawPassword, encodedPassword); } /** * 是否为管理员 - * + * * @param userId 用户ID * @return 结果 */ - public static boolean isAdmin(Long userId) - { + public static boolean isAdmin(Long userId) { return userId != null && 1L == userId; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ServletUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ServletUtils.java index ab9ebcfc..cc245797 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ServletUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ServletUtils.java @@ -4,6 +4,7 @@ import java.io.IOException; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; import javax.servlet.http.HttpSession; + import org.springframework.web.context.request.RequestAttributes; import org.springframework.web.context.request.RequestContextHolder; import org.springframework.web.context.request.ServletRequestAttributes; @@ -11,91 +12,78 @@ import com.ruoyi.common.core.text.Convert; /** * 客户端工具类 - * + * * @author ruoyi */ -public class ServletUtils -{ +public class ServletUtils { /** * 获取String参数 */ - public static String getParameter(String name) - { + public static String getParameter(String name) { return getRequest().getParameter(name); } /** * 获取String参数 */ - public static String getParameter(String name, String defaultValue) - { + public static String getParameter(String name, String defaultValue) { return Convert.toStr(getRequest().getParameter(name), defaultValue); } /** * 获取Integer参数 */ - public static Integer getParameterToInt(String name) - { + public static Integer getParameterToInt(String name) { return Convert.toInt(getRequest().getParameter(name)); } /** * 获取Integer参数 */ - public static Integer getParameterToInt(String name, Integer defaultValue) - { + public static Integer getParameterToInt(String name, Integer defaultValue) { return Convert.toInt(getRequest().getParameter(name), defaultValue); } /** * 获取request */ - public static HttpServletRequest getRequest() - { + public static HttpServletRequest getRequest() { return getRequestAttributes().getRequest(); } /** * 获取response */ - public static HttpServletResponse getResponse() - { + public static HttpServletResponse getResponse() { return getRequestAttributes().getResponse(); } /** * 获取session */ - public static HttpSession getSession() - { + public static HttpSession getSession() { return getRequest().getSession(); } - public static ServletRequestAttributes getRequestAttributes() - { + public static ServletRequestAttributes getRequestAttributes() { RequestAttributes attributes = RequestContextHolder.getRequestAttributes(); return (ServletRequestAttributes) attributes; } /** * 将字符串渲染到客户端 - * + * * @param response 渲染对象 - * @param string 待渲染的字符串 + * @param string 待渲染的字符串 * @return null */ - public static String renderString(HttpServletResponse response, String string) - { - try - { + public static String renderString(HttpServletResponse response, String string) { + try { response.setStatus(200); response.setContentType("application/json"); response.setCharacterEncoding("utf-8"); response.getWriter().print(string); - } - catch (IOException e) - { + } catch (IOException e) { e.printStackTrace(); } return null; @@ -103,32 +91,27 @@ public class ServletUtils /** * 是否是Ajax异步请求 - * + * * @param request */ - public static boolean isAjaxRequest(HttpServletRequest request) - { + public static boolean isAjaxRequest(HttpServletRequest request) { String accept = request.getHeader("accept"); - if (accept != null && accept.indexOf("application/json") != -1) - { + if (accept != null && accept.indexOf("application/json") != -1) { return true; } String xRequestedWith = request.getHeader("X-Requested-With"); - if (xRequestedWith != null && xRequestedWith.indexOf("XMLHttpRequest") != -1) - { + if (xRequestedWith != null && xRequestedWith.indexOf("XMLHttpRequest") != -1) { return true; } String uri = request.getRequestURI(); - if (StringUtils.inStringIgnoreCase(uri, ".json", ".xml")) - { + if (StringUtils.inStringIgnoreCase(uri, ".json", ".xml")) { return true; } String ajax = request.getParameter("__ajax"); - if (StringUtils.inStringIgnoreCase(ajax, "json", "xml")) - { + if (StringUtils.inStringIgnoreCase(ajax, "json", "xml")) { return true; } return false; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/StringUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/StringUtils.java index 7e3969f1..4802bc94 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/StringUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/StringUtils.java @@ -6,186 +6,172 @@ import java.util.HashSet; import java.util.List; import java.util.Map; import java.util.Set; + import com.ruoyi.common.core.text.StrFormatter; /** * 字符串工具类 - * + * * @author ruoyi */ -public class StringUtils extends org.apache.commons.lang3.StringUtils -{ - /** 空字符串 */ +public class StringUtils extends org.apache.commons.lang3.StringUtils { + /** + * 空字符串 + */ private static final String NULLSTR = ""; - /** 下划线 */ + /** + * 下划线 + */ private static final char SEPARATOR = '_'; /** * 获取参数不为空值 - * + * * @param value defaultValue 要判断的value * @return value 返回值 */ - public static T nvl(T value, T defaultValue) - { + public static T nvl(T value, T defaultValue) { return value != null ? value : defaultValue; } /** * * 判断一个Collection是否为空， 包含List，Set，Queue - * + * * @param coll 要判断的Collection * @return true：为空 false：非空 */ - public static boolean isEmpty(Collection coll) - { + public static boolean isEmpty(Collection coll) { return isNull(coll) || coll.isEmpty(); } /** * * 判断一个Collection是否非空，包含List，Set，Queue - * + * * @param coll 要判断的Collection * @return true：非空 false：空 */ - public static boolean isNotEmpty(Collection coll) - { + public static boolean isNotEmpty(Collection coll) { return !isEmpty(coll); } /** * * 判断一个对象数组是否为空 - * + * * @param objects 要判断的对象数组 - ** @return true：为空 false：非空 + * * @return true：为空 false：非空 */ - public static boolean isEmpty(Object[] objects) - { + public static boolean isEmpty(Object[] objects) { return isNull(objects) || (objects.length == 0); } /** * * 判断一个对象数组是否非空 - * + * * @param objects 要判断的对象数组 * @return true：非空 false：空 */ - public static boolean isNotEmpty(Object[] objects) - { + public static boolean isNotEmpty(Object[] objects) { return !isEmpty(objects); } /** * * 判断一个Map是否为空 - * + * * @param map 要判断的Map * @return true：为空 false：非空 */ - public static boolean isEmpty(Map map) - { + public static boolean isEmpty(Map map) { return isNull(map) || map.isEmpty(); } /** * * 判断一个Map是否为空 - * + * * @param map 要判断的Map * @return true：非空 false：空 */ - public static boolean isNotEmpty(Map map) - { + public static boolean isNotEmpty(Map map) { return !isEmpty(map); } /** * * 判断一个字符串是否为空串 - * + * * @param str String * @return true：为空 false：非空 */ - public static boolean isEmpty(String str) - { + public static boolean isEmpty(String str) { return isNull(str) || NULLSTR.equals(str.trim()); } /** * * 判断一个字符串是否为非空串 - * + * * @param str String * @return true：非空串 false：空串 */ - public static boolean isNotEmpty(String str) - { + public static boolean isNotEmpty(String str) { return !isEmpty(str); } /** * * 判断一个对象是否为空 - * + * * @param object Object * @return true：为空 false：非空 */ - public static boolean isNull(Object object) - { + public static boolean isNull(Object object) { return object == null; } /** * * 判断一个对象是否非空 - * + * * @param object Object * @return true：非空 false：空 */ - public static boolean isNotNull(Object object) - { + public static boolean isNotNull(Object object) { return !isNull(object); } /** * * 判断一个对象是否是数组类型（Java基本型别的数组） - * + * * @param object 对象 * @return true：是数组 false：不是数组 */ - public static boolean isArray(Object object) - { + public static boolean isArray(Object object) { return isNotNull(object) && object.getClass().isArray(); } /** * 去空格 */ - public static String trim(String str) - { + public static String trim(String str) { return (str == null ? "" : str.trim()); } /** * 截取字符串 - * - * @param str 字符串 + * + * @param str 字符串 * @param start 开始 * @return 结果 */ - public static String substring(final String str, int start) - { - if (str == null) - { + public static String substring(final String str, int start) { + if (str == null) { return NULLSTR; } - if (start < 0) - { + if (start < 0) { start = str.length() + start; } - if (start < 0) - { + if (start < 0) { start = 0; } - if (start > str.length()) - { + if (start > str.length()) { return NULLSTR; } @@ -194,44 +180,36 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils /** * 截取字符串 - * - * @param str 字符串 + * + * @param str 字符串 * @param start 开始 - * @param end 结束 + * @param end 结束 * @return 结果 */ - public static String substring(final String str, int start, int end) - { - if (str == null) - { + public static String substring(final String str, int start, int end) { + if (str == null) { return NULLSTR; } - if (end < 0) - { + if (end < 0) { end = str.length() + end; } - if (start < 0) - { + if (start < 0) { start = str.length() + start; } - if (end > str.length()) - { + if (end > str.length()) { end = str.length(); } - if (start > end) - { + if (start > end) { return NULLSTR; } - if (start < 0) - { + if (start < 0) { start = 0; } - if (end < 0) - { + if (end < 0) { end = 0; } @@ -246,15 +224,13 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils * 通常使用：format("this is {} for {}", "a", "b") -> this is a for b
* 转义{}： format("this is \\{} for {}", "a", "b") -> this is \{} for a
* 转义\： format("this is \\\\{} for {}", "a", "b") -> this is \a for b
- * + * * @param template 文本模板，被替换的部分用 {} 表示 - * @param params 参数值 + * @param params 参数值 * @return 格式化后的文本 */ - public static String format(String template, Object... params) - { - if (isEmpty(params) || isEmpty(template)) - { + public static String format(String template, Object... params) { + if (isEmpty(params) || isEmpty(template)) { return template; } return StrFormatter.format(template, params); @@ -262,47 +238,40 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils /** * 字符串转set - * + * * @param str 字符串 * @param sep 分隔符 * @return set集合 */ - public static final Set str2Set(String str, String sep) - { + public static final Set str2Set(String str, String sep) { return new HashSet(str2List(str, sep, true, false)); } /** * 字符串转list - * - * @param str 字符串 - * @param sep 分隔符 + * + * @param str 字符串 + * @param sep 分隔符 * @param filterBlank 过滤纯空白 - * @param trim 去掉首尾空白 + * @param trim 去掉首尾空白 * @return list集合 */ - public static final List str2List(String str, String sep, boolean filterBlank, boolean trim) - { + public static final List str2List(String str, String sep, boolean filterBlank, boolean trim) { List list = new ArrayList(); - if (StringUtils.isEmpty(str)) - { + if (StringUtils.isEmpty(str)) { return list; } // 过滤空白字符串 - if (filterBlank && StringUtils.isBlank(str)) - { + if (filterBlank && StringUtils.isBlank(str)) { return list; } String[] split = str.split(sep); - for (String string : split) - { - if (filterBlank && StringUtils.isBlank(string)) - { + for (String string : split) { + if (filterBlank && StringUtils.isBlank(string)) { continue; } - if (trim) - { + if (trim) { string = string.trim(); } list.add(string); @@ -314,10 +283,8 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils /** * 下划线转驼峰命名 */ - public static String toUnderScoreCase(String str) - { - if (str == null) - { + public static String toUnderScoreCase(String str) { + if (str == null) { return null; } StringBuilder sb = new StringBuilder(); @@ -327,31 +294,23 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils boolean curreCharIsUpperCase = true; // 下一字符是否大写 boolean nexteCharIsUpperCase = true; - for (int i = 0; i < str.length(); i++) - { + for (int i = 0; i < str.length(); i++) { char c = str.charAt(i); - if (i > 0) - { + if (i > 0) { preCharIsUpperCase = Character.isUpperCase(str.charAt(i - 1)); - } - else - { + } else { preCharIsUpperCase = false; } curreCharIsUpperCase = Character.isUpperCase(c); - if (i < (str.length() - 1)) - { + if (i < (str.length() - 1)) { nexteCharIsUpperCase = Character.isUpperCase(str.charAt(i + 1)); } - if (preCharIsUpperCase && curreCharIsUpperCase && !nexteCharIsUpperCase) - { + if (preCharIsUpperCase && curreCharIsUpperCase && !nexteCharIsUpperCase) { sb.append(SEPARATOR); - } - else if ((i != 0 && !preCharIsUpperCase) && curreCharIsUpperCase) - { + } else if ((i != 0 && !preCharIsUpperCase) && curreCharIsUpperCase) { sb.append(SEPARATOR); } sb.append(Character.toLowerCase(c)); @@ -362,19 +321,15 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils /** * 是否包含字符串 - * - * @param str 验证字符串 + * + * @param str 验证字符串 * @param strs 字符串组 * @return 包含返回true */ - public static boolean inStringIgnoreCase(String str, String... strs) - { - if (str != null && strs != null) - { - for (String s : strs) - { - if (str.equalsIgnoreCase(trim(s))) - { + public static boolean inStringIgnoreCase(String str, String... strs) { + if (str != null && strs != null) { + for (String s : strs) { + if (str.equalsIgnoreCase(trim(s))) { return true; } } @@ -384,31 +339,25 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils /** * 将下划线大写方式命名的字符串转换为驼峰式。如果转换前的下划线大写方式命名的字符串为空，则返回空字符串。 例如：HELLO_WORLD->HelloWorld - * + * * @param name 转换前的下划线大写方式命名的字符串 * @return 转换后的驼峰式命名的字符串 */ - public static String convertToCamelCase(String name) - { + public static String convertToCamelCase(String name) { StringBuilder result = new StringBuilder(); // 快速检查 - if (name == null || name.isEmpty()) - { + if (name == null || name.isEmpty()) { // 没必要转换 return ""; - } - else if (!name.contains("_")) - { + } else if (!name.contains("_")) { // 不含下划线，仅将首字母大写 return name.substring(0, 1).toUpperCase() + name.substring(1); } // 用下划线将原始字符串分割 String[] camels = name.split("_"); - for (String camel : camels) - { + for (String camel : camels) { // 跳过原始字符串中开头、结尾的下换线或双重下划线 - if (camel.isEmpty()) - { + if (camel.isEmpty()) { continue; } // 首字母大写 @@ -421,30 +370,22 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils /** * 驼峰式命名法 例如：user_name->userName */ - public static String toCamelCase(String s) - { - if (s == null) - { + public static String toCamelCase(String s) { + if (s == null) { return null; } s = s.toLowerCase(); StringBuilder sb = new StringBuilder(s.length()); boolean upperCase = false; - for (int i = 0; i < s.length(); i++) - { + for (int i = 0; i < s.length(); i++) { char c = s.charAt(i); - if (c == SEPARATOR) - { + if (c == SEPARATOR) { upperCase = true; - } - else if (upperCase) - { + } else if (upperCase) { sb.append(Character.toUpperCase(c)); upperCase = false; - } - else - { + } else { sb.append(c); } } @@ -452,8 +393,7 @@ public class StringUtils extends org.apache.commons.lang3.StringUtils } @SuppressWarnings("unchecked") - public static T cast(Object obj) - { + public static T cast(Object obj) { return (T) obj; } } \ No newline at end of file diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Threads.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Threads.java index 19341950..f427c314 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Threads.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/Threads.java @@ -5,29 +5,25 @@ import java.util.concurrent.ExecutionException; import java.util.concurrent.ExecutorService; import java.util.concurrent.Future; import java.util.concurrent.TimeUnit; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; /** * 线程相关工具类. - * + * * @author ruoyi */ -public class Threads -{ +public class Threads { private static final Logger logger = LoggerFactory.getLogger(Threads.class); /** * sleep等待,单位为毫秒 */ - public static void sleep(long milliseconds) - { - try - { + public static void sleep(long milliseconds) { + try { Thread.sleep(milliseconds); - } - catch (InterruptedException e) - { + } catch (InterruptedException e) { return; } } @@ -39,24 +35,17 @@ public class Threads * 如果仍人超時，則強制退出. * 另对在shutdown时线程本身被调用中断做了处理. */ - public static void shutdownAndAwaitTermination(ExecutorService pool) - { - if (pool != null && !pool.isShutdown()) - { + public static void shutdownAndAwaitTermination(ExecutorService pool) { + if (pool != null && !pool.isShutdown()) { pool.shutdown(); - try - { - if (!pool.awaitTermination(120, TimeUnit.SECONDS)) - { + try { + if (!pool.awaitTermination(120, TimeUnit.SECONDS)) { pool.shutdownNow(); - if (!pool.awaitTermination(120, TimeUnit.SECONDS)) - { + if (!pool.awaitTermination(120, TimeUnit.SECONDS)) { logger.info("Pool did not terminate"); } } - } - catch (InterruptedException ie) - { + } catch (InterruptedException ie) { pool.shutdownNow(); Thread.currentThread().interrupt(); } @@ -66,33 +55,22 @@ public class Threads /** * 打印线程异常信息 */ - public static void printException(Runnable r, Throwable t) - { - if (t == null && r instanceof Future) - { - try - { + public static void printException(Runnable r, Throwable t) { + if (t == null && r instanceof Future) { + try { Future future = (Future) r; - if (future.isDone()) - { + if (future.isDone()) { future.get(); } - } - catch (CancellationException ce) - { + } catch (CancellationException ce) { t = ce; - } - catch (ExecutionException ee) - { + } catch (ExecutionException ee) { t = ee.getCause(); - } - catch (InterruptedException ie) - { + } catch (InterruptedException ie) { Thread.currentThread().interrupt(); } } - if (t != null) - { + if (t != null) { logger.error(t.getMessage(), t); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/VerifyCodeUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/VerifyCodeUtils.java index 5fdf3a9d..12e2d465 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/VerifyCodeUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/VerifyCodeUtils.java @@ -16,11 +16,10 @@ import javax.imageio.ImageIO; /** * 验证码工具类 - * + * * @author ruoyi */ -public class VerifyCodeUtils -{ +public class VerifyCodeUtils { // 使用到Algerian字体，系统里没有的话需要安装字体，字体只显示大写，去掉了1,0,i,o几个容易混淆的字符 public static final String VERIFY_CODES = "123456789ABCDEFGHJKLMNPQRSTUVWXYZ"; @@ -28,33 +27,29 @@ public class VerifyCodeUtils /** * 使用系统默认字符源生成验证码 - * + * * @param verifySize 验证码长度 * @return */ - public static String generateVerifyCode(int verifySize) - { + public static String generateVerifyCode(int verifySize) { return generateVerifyCode(verifySize, VERIFY_CODES); } /** * 使用指定源生成验证码 - * + * * @param verifySize 验证码长度 - * @param sources 验证码字符源 + * @param sources 验证码字符源 * @return */ - public static String generateVerifyCode(int verifySize, String sources) - { - if (sources == null || sources.length() == 0) - { + public static String generateVerifyCode(int verifySize, String sources) { + if (sources == null || sources.length() == 0) { sources = VERIFY_CODES; } int codesLen = sources.length(); Random rand = new Random(System.currentTimeMillis()); StringBuilder verifyCode = new StringBuilder(verifySize); - for (int i = 0; i < verifySize; i++) - { + for (int i = 0; i < verifySize; i++) { verifyCode.append(sources.charAt(rand.nextInt(codesLen - 1))); } return verifyCode.toString(); @@ -62,26 +57,24 @@ public class VerifyCodeUtils /** * 输出指定验证码图片流 - * + * * @param w * @param h * @param os * @param code * @throws IOException */ - public static void outputImage(int w, int h, OutputStream os, String code) throws IOException - { + public static void outputImage(int w, int h, OutputStream os, String code) throws IOException { int verifySize = code.length(); BufferedImage image = new BufferedImage(w, h, BufferedImage.TYPE_INT_RGB); Random rand = new Random(); Graphics2D g2 = image.createGraphics(); g2.setRenderingHint(RenderingHints.KEY_ANTIALIASING, RenderingHints.VALUE_ANTIALIAS_ON); Color[] colors = new Color[5]; - Color[] colorSpaces = new Color[] { Color.WHITE, Color.CYAN, Color.GRAY, Color.LIGHT_GRAY, Color.MAGENTA, - Color.ORANGE, Color.PINK, Color.YELLOW }; + Color[] colorSpaces = new Color[]{Color.WHITE, Color.CYAN, Color.GRAY, Color.LIGHT_GRAY, Color.MAGENTA, + Color.ORANGE, Color.PINK, Color.YELLOW}; float[] fractions = new float[colors.length]; - for (int i = 0; i < colors.length; i++) - { + for (int i = 0; i < colors.length; i++) { colors[i] = colorSpaces[rand.nextInt(colorSpaces.length)]; fractions[i] = rand.nextFloat(); } @@ -97,8 +90,7 @@ public class VerifyCodeUtils // 绘制干扰线 Random random = new Random(); g2.setColor(getRandColor(160, 200));// 设置线条的颜色 - for (int i = 0; i < 20; i++) - { + for (int i = 0; i < 20; i++) { int x = random.nextInt(w - 1); int y = random.nextInt(h - 1); int xl = random.nextInt(6) + 1; @@ -109,8 +101,7 @@ public class VerifyCodeUtils // 添加噪点 float yawpRate = 0.05f;// 噪声率 int area = (int) (yawpRate * w * h); - for (int i = 0; i < area; i++) - { + for (int i = 0; i < area; i++) { int x = random.nextInt(w); int y = random.nextInt(h); int rgb = getRandomIntColor(); @@ -124,8 +115,7 @@ public class VerifyCodeUtils Font font = new Font("Algerian", Font.ITALIC, fontSize); g2.setFont(font); char[] chars = code.toCharArray(); - for (int i = 0; i < verifySize; i++) - { + for (int i = 0; i < verifySize; i++) { AffineTransform affine = new AffineTransform(); affine.setToRotation(Math.PI / 4 * rand.nextDouble() * (rand.nextBoolean() ? 1 : -1), (w / verifySize) * i + fontSize / 2, h / 2); @@ -137,8 +127,7 @@ public class VerifyCodeUtils ImageIO.write(image, "jpg", os); } - private static Color getRandColor(int fc, int bc) - { + private static Color getRandColor(int fc, int bc) { if (fc > 255) { fc = 255; } @@ -151,36 +140,30 @@ public class VerifyCodeUtils return new Color(r, g, b); } - private static int getRandomIntColor() - { + private static int getRandomIntColor() { int[] rgb = getRandomRgb(); int color = 0; - for (int c : rgb) - { + for (int c : rgb) { color = color << 8; color = color | c; } return color; } - private static int[] getRandomRgb() - { + private static int[] getRandomRgb() { int[] rgb = new int[3]; - for (int i = 0; i < 3; i++) - { + for (int i = 0; i < 3; i++) { rgb[i] = random.nextInt(255); } return rgb; } - private static void shear(Graphics g, int w1, int h1, Color color) - { + private static void shear(Graphics g, int w1, int h1, Color color) { shearX(g, w1, h1, color); shearY(g, w1, h1, color); } - private static void shearX(Graphics g, int w1, int h1, Color color) - { + private static void shearX(Graphics g, int w1, int h1, Color color) { int period = random.nextInt(2); @@ -188,13 +171,11 @@ public class VerifyCodeUtils int frames = 1; int phase = random.nextInt(2); - for (int i = 0; i < h1; i++) - { + for (int i = 0; i < h1; i++) { double d = (double) (period >> 1) * Math.sin((double) i / (double) period + (6.2831853071795862D * (double) phase) / (double) frames); g.copyArea(0, i, w1, 1, (int) d, 0); - if (borderGap) - { + if (borderGap) { g.setColor(color); g.drawLine((int) d, i, 0, i); g.drawLine((int) d + w1, i, w1, i); @@ -203,21 +184,18 @@ public class VerifyCodeUtils } - private static void shearY(Graphics g, int w1, int h1, Color color) - { + private static void shearY(Graphics g, int w1, int h1, Color color) { int period = random.nextInt(40) + 10; // 50; boolean borderGap = true; int frames = 20; int phase = 7; - for (int i = 0; i < w1; i++) - { + for (int i = 0; i < w1; i++) { double d = (double) (period >> 1) * Math.sin((double) i / (double) period + (6.2831853071795862D * (double) phase) / (double) frames); g.copyArea(i, 0, 1, h1, 0, (int) d); - if (borderGap) - { + if (borderGap) { g.setColor(color); g.drawLine(i, (int) d, i, 0); g.drawLine(i, (int) d + h1, i, h1); diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/bean/BeanUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/bean/BeanUtils.java index 4463662d..43114b30 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/bean/BeanUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/bean/BeanUtils.java @@ -8,46 +8,46 @@ import java.util.regex.Pattern; /** * Bean 工具类 - * + * * @author ruoyi */ -public class BeanUtils extends org.springframework.beans.BeanUtils -{ - /** Bean方法名中属性名开始的下标 */ +public class BeanUtils extends org.springframework.beans.BeanUtils { + /** + * Bean方法名中属性名开始的下标 + */ private static final int BEAN_METHOD_PROP_INDEX = 3; - /** * 匹配getter方法的正则表达式 */ + /** + * 匹配getter方法的正则表达式 + */ private static final Pattern GET_PATTERN = Pattern.compile("get(\\p{javaUpperCase}\\w*)"); - /** * 匹配setter方法的正则表达式 */ + /** + * 匹配setter方法的正则表达式 + */ private static final Pattern SET_PATTERN = Pattern.compile("set(\\p{javaUpperCase}\\w*)"); /** * Bean属性复制工具方法。 - * + * * @param dest 目标对象 - * @param src 源对象 + * @param src 源对象 */ - public static void copyBeanProp(Object dest, Object src) - { - try - { + public static void copyBeanProp(Object dest, Object src) { + try { copyProperties(src, dest); - } - catch (Exception e) - { + } catch (Exception e) { e.printStackTrace(); } } /** * 获取对象的setter方法。 - * + * * @param obj 对象 * @return 对象的setter方法列表 */ - public static List getSetterMethods(Object obj) - { + public static List getSetterMethods(Object obj) { // setter方法列表 List setterMethods = new ArrayList(); @@ -56,11 +56,9 @@ public class BeanUtils extends org.springframework.beans.BeanUtils // 查找setter方法 - for (Method method : methods) - { + for (Method method : methods) { Matcher m = SET_PATTERN.matcher(method.getName()); - if (m.matches() && (method.getParameterTypes().length == 1)) - { + if (m.matches() && (method.getParameterTypes().length == 1)) { setterMethods.add(method); } } @@ -70,23 +68,20 @@ public class BeanUtils extends org.springframework.beans.BeanUtils /** * 获取对象的getter方法。 - * + * * @param obj 对象 * @return 对象的getter方法列表 */ - public static List getGetterMethods(Object obj) - { + public static List getGetterMethods(Object obj) { // getter方法列表 List getterMethods = new ArrayList(); // 获取所有方法 Method[] methods = obj.getClass().getMethods(); // 查找getter方法 - for (Method method : methods) - { + for (Method method : methods) { Matcher m = GET_PATTERN.matcher(method.getName()); - if (m.matches() && (method.getParameterTypes().length == 0)) - { + if (m.matches() && (method.getParameterTypes().length == 0)) { getterMethods.add(method); } } @@ -97,14 +92,13 @@ public class BeanUtils extends org.springframework.beans.BeanUtils /** * 检查Bean方法名中的属性名是否相等。
* 如getName()和setName()属性名一样，getName()和setAge()属性名不一样。 - * + * * @param m1 方法名1 * @param m2 方法名2 * @return 属性名一样返回true，否则返回false */ - public static boolean isMethodPropEquals(String m1, String m2) - { + public static boolean isMethodPropEquals(String m1, String m2) { return m1.substring(BEAN_METHOD_PROP_INDEX).equals(m2.substring(BEAN_METHOD_PROP_INDEX)); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileTypeUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileTypeUtils.java index 68130b9c..23155448 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileTypeUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileTypeUtils.java @@ -1,6 +1,7 @@ package com.ruoyi.common.utils.file; import java.io.File; + import org.apache.commons.lang3.StringUtils; /** @@ -8,20 +9,17 @@ import org.apache.commons.lang3.StringUtils; * * @author ruoyi */ -public class FileTypeUtils -{ +public class FileTypeUtils { /** * 获取文件类型 *

* 例如: ruoyi.txt, 返回: txt - * + * * @param file 文件名 * @return 后缀（不含".") */ - public static String getFileType(File file) - { - if (null == file) - { + public static String getFileType(File file) { + if (null == file) { return StringUtils.EMPTY; } return getFileType(file.getName()); @@ -35,11 +33,9 @@ public class FileTypeUtils * @param fileName 文件名 * @return 后缀（不含".") */ - public static String getFileType(String fileName) - { + public static String getFileType(String fileName) { int separatorIndex = fileName.lastIndexOf("."); - if (separatorIndex < 0) - { + if (separatorIndex < 0) { return ""; } return fileName.substring(separatorIndex + 1).toLowerCase(); @@ -47,28 +43,20 @@ public class FileTypeUtils /** * 获取文件类型 - * + * * @param photoByte 文件字节码 * @return 后缀（不含".") */ - public static String getFileExtendName(byte[] photoByte) - { + public static String getFileExtendName(byte[] photoByte) { String strFileExtendName = "JPG"; if ((photoByte[0] == 71) && (photoByte[1] == 73) && (photoByte[2] == 70) && (photoByte[3] == 56) - && ((photoByte[4] == 55) || (photoByte[4] == 57)) && (photoByte[5] == 97)) - { + && ((photoByte[4] == 55) || (photoByte[4] == 57)) && (photoByte[5] == 97)) { strFileExtendName = "GIF"; - } - else if ((photoByte[6] == 74) && (photoByte[7] == 70) && (photoByte[8] == 73) && (photoByte[9] == 70)) - { + } else if ((photoByte[6] == 74) && (photoByte[7] == 70) && (photoByte[8] == 73) && (photoByte[9] == 70)) { strFileExtendName = "JPG"; - } - else if ((photoByte[0] == 66) && (photoByte[1] == 77)) - { + } else if ((photoByte[0] == 66) && (photoByte[1] == 77)) { strFileExtendName = "BMP"; - } - else if ((photoByte[1] == 80) && (photoByte[2] == 78) && (photoByte[3] == 71)) - { + } else if ((photoByte[1] == 80) && (photoByte[2] == 78) && (photoByte[3] == 71)) { strFileExtendName = "PNG"; } return strFileExtendName; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUploadUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUploadUtils.java index 3ccbcb5a..bd0b0160 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUploadUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUploadUtils.java @@ -2,6 +2,7 @@ package com.ruoyi.common.utils.file; import java.io.File; import java.io.IOException; + import org.apache.commons.io.FilenameUtils; import org.springframework.web.multipart.MultipartFile; import com.ruoyi.common.config.RuoYiConfig; @@ -18,8 +19,7 @@ import com.ruoyi.common.utils.uuid.IdUtils; * * @author ruoyi */ -public class FileUploadUtils -{ +public class FileUploadUtils { /** * 默认大小 50M */ @@ -35,13 +35,11 @@ public class FileUploadUtils */ private static String defaultBaseDir = RuoYiConfig.getProfile(); - public static void setDefaultBaseDir(String defaultBaseDir) - { + public static void setDefaultBaseDir(String defaultBaseDir) { FileUploadUtils.defaultBaseDir = defaultBaseDir; } - public static String getDefaultBaseDir() - { + public static String getDefaultBaseDir() { return defaultBaseDir; } @@ -52,14 +50,10 @@ public class FileUploadUtils * @return 文件名称 * @throws Exception */ - public static final String upload(MultipartFile file) throws IOException - { - try - { + public static final String upload(MultipartFile file) throws IOException { + try { return upload(getDefaultBaseDir(), file, MimeTypeUtils.DEFAULT_ALLOWED_EXTENSION); - } - catch (Exception e) - { + } catch (Exception e) { throw new IOException(e.getMessage(), e); } } @@ -68,18 +62,14 @@ public class FileUploadUtils * 根据文件路径上传 * * @param baseDir 相对应用的基目录 - * @param file 上传的文件 + * @param file 上传的文件 * @return 文件名称 * @throws IOException */ - public static final String upload(String baseDir, MultipartFile file) throws IOException - { - try - { + public static final String upload(String baseDir, MultipartFile file) throws IOException { + try { return upload(baseDir, file, MimeTypeUtils.DEFAULT_ALLOWED_EXTENSION); - } - catch (Exception e) - { + } catch (Exception e) { throw new IOException(e.getMessage(), e); } } @@ -87,22 +77,20 @@ public class FileUploadUtils /** * 文件上传 * - * @param baseDir 相对应用的基目录 - * @param file 上传的文件 + * @param baseDir 相对应用的基目录 + * @param file 上传的文件 * @param allowedExtension 上传文件类型 * @return 返回上传成功的文件名 - * @throws FileSizeLimitExceededException 如果超出最大大小 + * @throws FileSizeLimitExceededException 如果超出最大大小 * @throws FileNameLengthLimitExceededException 文件名太长 - * @throws IOException 比如读写文件出错时 - * @throws InvalidExtensionException 文件校验异常 + * @throws IOException 比如读写文件出错时 + * @throws InvalidExtensionException 文件校验异常 */ public static final String upload(String baseDir, MultipartFile file, String[] allowedExtension) throws FileSizeLimitExceededException, IOException, FileNameLengthLimitExceededException, - InvalidExtensionException - { + InvalidExtensionException { int fileNamelength = file.getOriginalFilename().length(); - if (fileNamelength > FileUploadUtils.DEFAULT_FILE_NAME_LENGTH) - { + if (fileNamelength > FileUploadUtils.DEFAULT_FILE_NAME_LENGTH) { throw new FileNameLengthLimitExceededException(FileUploadUtils.DEFAULT_FILE_NAME_LENGTH); } @@ -119,31 +107,26 @@ public class FileUploadUtils /** * 编码文件名 */ - public static final String extractFilename(MultipartFile file) - { + public static final String extractFilename(MultipartFile file) { String fileName = file.getOriginalFilename(); String extension = getExtension(file); fileName = DateUtils.datePath() + "/" + IdUtils.fastUUID() + "." + extension; return fileName; } - private static final File getAbsoluteFile(String uploadDir, String fileName) throws IOException - { + private static final File getAbsoluteFile(String uploadDir, String fileName) throws IOException { File desc = new File(uploadDir + File.separator + fileName); - if (!desc.getParentFile().exists()) - { + if (!desc.getParentFile().exists()) { desc.getParentFile().mkdirs(); } - if (!desc.exists()) - { + if (!desc.exists()) { desc.createNewFile(); } return desc; } - private static final String getPathFileName(String uploadDir, String fileName) throws IOException - { + private static final String getPathFileName(String uploadDir, String fileName) throws IOException { int dirLastIndex = RuoYiConfig.getProfile().length() + 1; String currentDir = StringUtils.substring(uploadDir, dirLastIndex); String pathFileName = Constants.RESOURCE_PREFIX + "/" + currentDir + "/" + fileName; @@ -159,35 +142,25 @@ public class FileUploadUtils * @throws InvalidExtensionException */ public static final void assertAllowed(MultipartFile file, String[] allowedExtension) - throws FileSizeLimitExceededException, InvalidExtensionException - { + throws FileSizeLimitExceededException, InvalidExtensionException { long size = file.getSize(); - if (DEFAULT_MAX_SIZE != -1 && size > DEFAULT_MAX_SIZE) - { + if (DEFAULT_MAX_SIZE != -1 && size > DEFAULT_MAX_SIZE) { throw new FileSizeLimitExceededException(DEFAULT_MAX_SIZE / 1024 / 1024); } String fileName = file.getOriginalFilename(); String extension = getExtension(file); - if (allowedExtension != null && !isAllowedExtension(extension, allowedExtension)) - { - if (allowedExtension == MimeTypeUtils.IMAGE_EXTENSION) - { + if (allowedExtension != null && !isAllowedExtension(extension, allowedExtension)) { + if (allowedExtension == MimeTypeUtils.IMAGE_EXTENSION) { throw new InvalidExtensionException.InvalidImageExtensionException(allowedExtension, extension, fileName); - } - else if (allowedExtension == MimeTypeUtils.FLASH_EXTENSION) - { + } else if (allowedExtension == MimeTypeUtils.FLASH_EXTENSION) { throw new InvalidExtensionException.InvalidFlashExtensionException(allowedExtension, extension, fileName); - } - else if (allowedExtension == MimeTypeUtils.MEDIA_EXTENSION) - { + } else if (allowedExtension == MimeTypeUtils.MEDIA_EXTENSION) { throw new InvalidExtensionException.InvalidMediaExtensionException(allowedExtension, extension, fileName); - } - else - { + } else { throw new InvalidExtensionException(allowedExtension, extension, fileName); } } @@ -201,12 +174,9 @@ public class FileUploadUtils * @param allowedExtension * @return */ - public static final boolean isAllowedExtension(String extension, String[] allowedExtension) - { - for (String str : allowedExtension) - { - if (str.equalsIgnoreCase(extension)) - { + public static final boolean isAllowedExtension(String extension, String[] allowedExtension) { + for (String str : allowedExtension) { + if (str.equalsIgnoreCase(extension)) { return true; } } @@ -219,11 +189,9 @@ public class FileUploadUtils * @param file 表单文件 * @return 后缀名 */ - public static final String getExtension(MultipartFile file) - { + public static final String getExtension(MultipartFile file) { String extension = FilenameUtils.getExtension(file.getOriginalFilename()); - if (StringUtils.isEmpty(extension)) - { + if (StringUtils.isEmpty(extension)) { extension = MimeTypeUtils.getExtension(file.getContentType()); } return extension; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUtils.java index f6aa1afc..adabd6f4 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/FileUtils.java @@ -10,68 +10,52 @@ import java.net.URLEncoder; import java.nio.charset.StandardCharsets; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.apache.commons.lang3.ArrayUtils; import com.ruoyi.common.utils.StringUtils; /** * 文件处理工具类 - * + * * @author ruoyi */ -public class FileUtils extends org.apache.commons.io.FileUtils -{ +public class FileUtils extends org.apache.commons.io.FileUtils { public static String FILENAME_PATTERN = "[a-zA-Z0-9_\\-\\|\\.\\u4e00-\\u9fa5]+"; /** * 输出指定文件的byte数组 - * + * * @param filePath 文件路径 - * @param os 输出流 + * @param os 输出流 * @return */ - public static void writeBytes(String filePath, OutputStream os) throws IOException - { + public static void writeBytes(String filePath, OutputStream os) throws IOException { FileInputStream fis = null; - try - { + try { File file = new File(filePath); - if (!file.exists()) - { + if (!file.exists()) { throw new FileNotFoundException(filePath); } fis = new FileInputStream(file); byte[] b = new byte[1024]; int length; - while ((length = fis.read(b)) > 0) - { + while ((length = fis.read(b)) > 0) { os.write(b, 0, length); } - } - catch (IOException e) - { + } catch (IOException e) { throw e; - } - finally - { - if (os != null) - { - try - { + } finally { + if (os != null) { + try { os.close(); - } - catch (IOException e1) - { + } catch (IOException e1) { e1.printStackTrace(); } } - if (fis != null) - { - try - { + if (fis != null) { + try { fis.close(); - } - catch (IOException e1) - { + } catch (IOException e1) { e1.printStackTrace(); } } @@ -80,17 +64,15 @@ public class FileUtils extends org.apache.commons.io.FileUtils /** * 删除文件 - * + * * @param filePath 文件 * @return */ - public static boolean deleteFile(String filePath) - { + public static boolean deleteFile(String filePath) { boolean flag = false; File file = new File(filePath); // 路径为文件且不为空则进行删除 - if (file.isFile() && file.exists()) - { + if (file.isFile() && file.exists()) { file.delete(); flag = true; } @@ -99,32 +81,28 @@ public class FileUtils extends org.apache.commons.io.FileUtils /** * 文件名称验证 - * + * * @param filename 文件名称 * @return true 正常 false 非法 */ - public static boolean isValidFilename(String filename) - { + public static boolean isValidFilename(String filename) { return filename.matches(FILENAME_PATTERN); } /** * 检查文件是否可下载 - * + * * @param resource 需要下载的文件 * @return true 正常 false 非法 */ - public static boolean checkAllowDownload(String resource) - { + public static boolean checkAllowDownload(String resource) { // 禁止目录上跳级别 - if (StringUtils.contains(resource, "..")) - { + if (StringUtils.contains(resource, "..")) { return false; } // 检查允许下载的文件规则 - if (ArrayUtils.contains(MimeTypeUtils.DEFAULT_ALLOWED_EXTENSION, FileTypeUtils.getFileType(resource))) - { + if (ArrayUtils.contains(MimeTypeUtils.DEFAULT_ALLOWED_EXTENSION, FileTypeUtils.getFileType(resource))) { return true; } @@ -134,33 +112,25 @@ public class FileUtils extends org.apache.commons.io.FileUtils /** * 下载文件名重新编码 - * - * @param request 请求对象 + * + * @param request 请求对象 * @param fileName 文件名 * @return 编码后的文件名 */ - public static String setFileDownloadHeader(HttpServletRequest request, String fileName) throws UnsupportedEncodingException - { + public static String setFileDownloadHeader(HttpServletRequest request, String fileName) throws UnsupportedEncodingException { final String agent = request.getHeader("USER-AGENT"); String filename = fileName; - if (agent.contains("MSIE")) - { + if (agent.contains("MSIE")) { // IE浏览器 filename = URLEncoder.encode(filename, "utf-8"); filename = filename.replace("+", " "); - } - else if (agent.contains("Firefox")) - { + } else if (agent.contains("Firefox")) { // 火狐浏览器 filename = new String(fileName.getBytes(), "ISO8859-1"); - } - else if (agent.contains("Chrome")) - { + } else if (agent.contains("Chrome")) { // google浏览器 filename = URLEncoder.encode(filename, "utf-8"); - } - else - { + } else { // 其它浏览器 filename = URLEncoder.encode(filename, "utf-8"); } @@ -170,12 +140,11 @@ public class FileUtils extends org.apache.commons.io.FileUtils /** * 下载文件名重新编码 * - * @param response 响应对象 + * @param response 响应对象 * @param realFileName 真实文件名 * @return */ - public static void setAttachmentResponseHeader(HttpServletResponse response, String realFileName) throws UnsupportedEncodingException - { + public static void setAttachmentResponseHeader(HttpServletResponse response, String realFileName) throws UnsupportedEncodingException { String percentEncodedFileName = percentEncode(realFileName); StringBuilder contentDispositionValue = new StringBuilder(); @@ -195,8 +164,7 @@ public class FileUtils extends org.apache.commons.io.FileUtils * @param s 需要百分号编码的字符串 * @return 百分号编码后的字符串 */ - public static String percentEncode(String s) throws UnsupportedEncodingException - { + public static String percentEncode(String s) throws UnsupportedEncodingException { String encode = URLEncoder.encode(s, StandardCharsets.UTF_8.toString()); return encode.replaceAll("\\+", "%20"); } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/ImageUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/ImageUtils.java index 07fd5389..4744eaff 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/ImageUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/ImageUtils.java @@ -7,6 +7,7 @@ import java.io.InputStream; import java.net.URL; import java.net.URLConnection; import java.util.Arrays; + import org.apache.poi.util.IOUtils; import org.slf4j.Logger; import org.slf4j.LoggerFactory; @@ -19,38 +20,27 @@ import com.ruoyi.common.utils.StringUtils; * * @author ruoyi */ -public class ImageUtils -{ +public class ImageUtils { private static final Logger log = LoggerFactory.getLogger(ImageUtils.class); - public static byte[] getImage(String imagePath) - { + public static byte[] getImage(String imagePath) { InputStream is = getFile(imagePath); - try - { + try { return IOUtils.toByteArray(is); - } - catch (Exception e) - { + } catch (Exception e) { log.error("图片加载异常 {}", e); return null; - } - finally - { + } finally { IOUtils.closeQuietly(is); } } - public static InputStream getFile(String imagePath) - { - try - { + public static InputStream getFile(String imagePath) { + try { byte[] result = readFile(imagePath); result = Arrays.copyOf(result, result.length); return new ByteArrayInputStream(result); - } - catch (Exception e) - { + } catch (Exception e) { log.error("获取图片异常 {}", e); } return null; @@ -58,18 +48,15 @@ public class ImageUtils /** * 读取文件为字节数据 - * + * * @param key 地址 * @return 字节数据 */ - public static byte[] readFile(String url) - { + public static byte[] readFile(String url) { InputStream in = null; ByteArrayOutputStream baos = null; - try - { - if (url.startsWith("http")) - { + try { + if (url.startsWith("http")) { // 网络地址 URL urlObj = new URL(url); URLConnection urlConnection = urlObj.openConnection(); @@ -77,23 +64,17 @@ public class ImageUtils urlConnection.setReadTimeout(60 * 1000); urlConnection.setDoInput(true); in = urlConnection.getInputStream(); - } - else - { + } else { // 本机地址 String localPath = RuoYiConfig.getProfile(); String downloadPath = localPath + StringUtils.substringAfter(url, Constants.RESOURCE_PREFIX); in = new FileInputStream(downloadPath); } return IOUtils.toByteArray(in); - } - catch (Exception e) - { + } catch (Exception e) { log.error("获取文件路径异常 {}", e); return null; - } - finally - { + } finally { IOUtils.closeQuietly(baos); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/MimeTypeUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/MimeTypeUtils.java index 69846412..4369fc65 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/MimeTypeUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/file/MimeTypeUtils.java @@ -2,11 +2,10 @@ package com.ruoyi.common.utils.file; /** * 媒体类型工具类 - * + * * @author ruoyi */ -public class MimeTypeUtils -{ +public class MimeTypeUtils { public static final String IMAGE_PNG = "image/png"; public static final String IMAGE_JPG = "image/jpg"; @@ -16,13 +15,13 @@ public class MimeTypeUtils public static final String IMAGE_BMP = "image/bmp"; public static final String IMAGE_GIF = "image/gif"; - - public static final String[] IMAGE_EXTENSION = { "bmp", "gif", "jpg", "jpeg", "png" }; - public static final String[] FLASH_EXTENSION = { "swf", "flv" }; + public static final String[] IMAGE_EXTENSION = {"bmp", "gif", "jpg", "jpeg", "png"}; - public static final String[] MEDIA_EXTENSION = { "swf", "flv", "mp3", "wav", "wma", "wmv", "mid", "avi", "mpg", - "asf", "rm", "rmvb" }; + public static final String[] FLASH_EXTENSION = {"swf", "flv"}; + + public static final String[] MEDIA_EXTENSION = {"swf", "flv", "mp3", "wav", "wma", "wmv", "mid", "avi", "mpg", + "asf", "rm", "rmvb"}; public static final String[] DEFAULT_ALLOWED_EXTENSION = { // 图片 @@ -32,12 +31,10 @@ public class MimeTypeUtils // 压缩文件 "rar", "zip", "gz", "bz2", // pdf - "pdf" }; + "pdf"}; - public static String getExtension(String prefix) - { - switch (prefix) - { + public static String getExtension(String prefix) { + switch (prefix) { case IMAGE_PNG: return "png"; case IMAGE_JPG: diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/EscapeUtil.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/EscapeUtil.java index bf9980a3..f2e81f2c 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/EscapeUtil.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/EscapeUtil.java @@ -4,20 +4,17 @@ import com.ruoyi.common.utils.StringUtils; /** * 转义和反转义工具类 - * + * * @author ruoyi */ -public class EscapeUtil -{ +public class EscapeUtil { public static final String RE_HTML_MARK = "(<[^<]*?>)|(<[\\s]*?/[^<]*?>)|(<[^<]*?/[\\s]*?>)"; private static final char[][] TEXT = new char[64][]; - static - { - for (int i = 0; i < 64; i++) - { - TEXT[i] = new char[] { (char) i }; + static { + for (int i = 0; i < 64; i++) { + TEXT[i] = new char[]{(char) i}; } // special HTML characters @@ -30,61 +27,52 @@ public class EscapeUtil /** * 转义文本中的HTML字符为安全的字符 - * + * * @param text 被转义的文本 * @return 转义后的文本 */ - public static String escape(String text) - { + public static String escape(String text) { return encode(text); } /** * 还原被转义的HTML特殊字符 - * + * * @param content 包含转义符的HTML内容 * @return 转换后的字符串 */ - public static String unescape(String content) - { + public static String unescape(String content) { return decode(content); } /** * 清除所有HTML标签，但是不删除标签内的内容 - * + * * @param content 文本 * @return 清除标签后的文本 */ - public static String clean(String content) - { + public static String clean(String content) { return new HTMLFilter().filter(content); } /** * Escape编码 - * + * * @param text 被编码的文本 * @return 编码后的字符 */ - private static String encode(String text) - { + private static String encode(String text) { int len; - if ((text == null) || ((len = text.length()) == 0)) - { + if ((text == null) || ((len = text.length()) == 0)) { return StringUtils.EMPTY; } StringBuilder buffer = new StringBuilder(len + (len >> 2)); char c; - for (int i = 0; i < len; i++) - { + for (int i = 0; i < len; i++) { c = text.charAt(i); - if (c < 64) - { + if (c < 64) { buffer.append(TEXT[c]); - } - else - { + } else { buffer.append(c); } } @@ -93,47 +81,35 @@ public class EscapeUtil /** * Escape解码 - * + * * @param content 被转义的内容 * @return 解码后的字符串 */ - public static String decode(String content) - { - if (StringUtils.isEmpty(content)) - { + public static String decode(String content) { + if (StringUtils.isEmpty(content)) { return content; } StringBuilder tmp = new StringBuilder(content.length()); int lastPos = 0, pos = 0; char ch; - while (lastPos < content.length()) - { + while (lastPos < content.length()) { pos = content.indexOf("%", lastPos); - if (pos == lastPos) - { - if (content.charAt(pos + 1) == 'u') - { + if (pos == lastPos) { + if (content.charAt(pos + 1) == 'u') { ch = (char) Integer.parseInt(content.substring(pos + 2, pos + 6), 16); tmp.append(ch); lastPos = pos + 6; - } - else - { + } else { ch = (char) Integer.parseInt(content.substring(pos + 1, pos + 3), 16); tmp.append(ch); lastPos = pos + 3; } - } - else - { - if (pos == -1) - { + } else { + if (pos == -1) { tmp.append(content.substring(lastPos)); lastPos = content.length(); - } - else - { + } else { tmp.append(content.substring(lastPos, pos)); lastPos = pos; } @@ -142,8 +118,7 @@ public class EscapeUtil return tmp.toString(); } - public static void main(String[] args) - { + public static void main(String[] args) { String html = ""; // String html = "ipt>alert(\"XSS\")ipt>"; // String html = "<123"; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/HTMLFilter.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/HTMLFilter.java index cd8cd4ff..12375b1b 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/HTMLFilter.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/html/HTMLFilter.java @@ -15,8 +15,7 @@ import java.util.regex.Pattern; * * @author ruoyi */ -public final class HTMLFilter -{ +public final class HTMLFilter { /** * regex flag union representing /si modifiers in php **/ @@ -100,8 +99,7 @@ public final class HTMLFilter /** * Default constructor. */ - public HTMLFilter() - { + public HTMLFilter() { vAllowed = new HashMap<>(); final ArrayList a_atts = new ArrayList<>(); @@ -122,13 +120,13 @@ public final class HTMLFilter vAllowed.put("i", no_atts); vAllowed.put("em", no_atts); - vSelfClosingTags = new String[] { "img" }; - vNeedClosingTags = new String[] { "a", "b", "strong", "i", "em" }; - vDisallowed = new String[] {}; - vAllowedProtocols = new String[] { "http", "mailto", "https" }; // no ftp. - vProtocolAtts = new String[] { "src", "href" }; - vRemoveBlanks = new String[] { "a", "b", "strong", "i", "em" }; - vAllowedEntities = new String[] { "amp", "gt", "lt", "quot" }; + vSelfClosingTags = new String[]{"img"}; + vNeedClosingTags = new String[]{"a", "b", "strong", "i", "em"}; + vDisallowed = new String[]{}; + vAllowedProtocols = new String[]{"http", "mailto", "https"}; // no ftp. + vProtocolAtts = new String[]{"src", "href"}; + vRemoveBlanks = new String[]{"a", "b", "strong", "i", "em"}; + vAllowedEntities = new String[]{"amp", "gt", "lt", "quot"}; stripComment = true; encodeQuotes = true; alwaysMakeTags = false; @@ -140,8 +138,7 @@ public final class HTMLFilter * @param conf map containing configuration. keys match field names. */ @SuppressWarnings("unchecked") - public HTMLFilter(final Map conf) - { + public HTMLFilter(final Map conf) { assert conf.containsKey("vAllowed") : "configuration requires vAllowed"; assert conf.containsKey("vSelfClosingTags") : "configuration requires vSelfClosingTags"; @@ -165,20 +162,17 @@ public final class HTMLFilter alwaysMakeTags = conf.containsKey("alwaysMakeTags") ? (Boolean) conf.get("alwaysMakeTags") : true; } - private void reset() - { + private void reset() { vTagCounts.clear(); } // --------------------------------------------------------------- // my versions of some PHP library functions - public static String chr(final int decimal) - { + public static String chr(final int decimal) { return String.valueOf((char) decimal); } - public static String htmlSpecialChars(final String s) - { + public static String htmlSpecialChars(final String s) { String result = s; result = regexReplace(P_AMP, "&", result); result = regexReplace(P_QUOTE, """, result); @@ -195,8 +189,7 @@ public final class HTMLFilter * @param input text (i.e. submitted by a user) than may contain html * @return "clean" version of input, with only valid, whitelisted html elements allowed */ - public String filter(final String input) - { + public String filter(final String input) { reset(); String s = input; @@ -213,22 +206,18 @@ public final class HTMLFilter return s; } - public boolean isAlwaysMakeTags() - { + public boolean isAlwaysMakeTags() { return alwaysMakeTags; } - public boolean isStripComments() - { + public boolean isStripComments() { return stripComment; } - private String escapeComments(final String s) - { + private String escapeComments(final String s) { final Matcher m = P_COMMENTS.matcher(s); final StringBuffer buf = new StringBuffer(); - if (m.find()) - { + if (m.find()) { final String match = m.group(1); // (.*?) m.appendReplacement(buf, Matcher.quoteReplacement("")); } @@ -237,10 +226,8 @@ public final class HTMLFilter return buf.toString(); } - private String balanceHTML(String s) - { - if (alwaysMakeTags) - { + private String balanceHTML(String s) { + if (alwaysMakeTags) { // // try and form html // @@ -249,9 +236,7 @@ public final class HTMLFilter s = regexReplace(P_BODY_TO_END, "<$1>", s); s = regexReplace(P_XML_CONTENT, "$1<$2", s); - } - else - { + } else { // // escape stray brackets // @@ -269,13 +254,11 @@ public final class HTMLFilter return s; } - private String checkTags(String s) - { + private String checkTags(String s) { Matcher m = P_TAGS.matcher(s); final StringBuffer buf = new StringBuffer(); - while (m.find()) - { + while (m.find()) { String replaceStr = m.group(1); replaceStr = processTag(replaceStr); m.appendReplacement(buf, Matcher.quoteReplacement(replaceStr)); @@ -285,10 +268,8 @@ public final class HTMLFilter // these get tallied in processTag // (remember to reset before subsequent calls to filter method) final StringBuilder sBuilder = new StringBuilder(buf.toString()); - for (String key : vTagCounts.keySet()) - { - for (int ii = 0; ii < vTagCounts.get(key); ii++) - { + for (String key : vTagCounts.keySet()) { + for (int ii = 0; ii < vTagCounts.get(key); ii++) { sBuilder.append(""); } } @@ -297,18 +278,14 @@ public final class HTMLFilter return s; } - private String processRemoveBlanks(final String s) - { + private String processRemoveBlanks(final String s) { String result = s; - for (String tag : vRemoveBlanks) - { - if (!P_REMOVE_PAIR_BLANKS.containsKey(tag)) - { + for (String tag : vRemoveBlanks) { + if (!P_REMOVE_PAIR_BLANKS.containsKey(tag)) { P_REMOVE_PAIR_BLANKS.putIfAbsent(tag, Pattern.compile("<" + tag + "(\\s[^>]*)?>")); } result = regexReplace(P_REMOVE_PAIR_BLANKS.get(tag), "", result); - if (!P_REMOVE_SELF_BLANKS.containsKey(tag)) - { + if (!P_REMOVE_SELF_BLANKS.containsKey(tag)) { P_REMOVE_SELF_BLANKS.putIfAbsent(tag, Pattern.compile("<" + tag + "(\\s[^>]*)?/>")); } result = regexReplace(P_REMOVE_SELF_BLANKS.get(tag), "", result); @@ -317,25 +294,19 @@ public final class HTMLFilter return result; } - private static String regexReplace(final Pattern regex_pattern, final String replacement, final String s) - { + private static String regexReplace(final Pattern regex_pattern, final String replacement, final String s) { Matcher m = regex_pattern.matcher(s); return m.replaceAll(replacement); } - private String processTag(final String s) - { + private String processTag(final String s) { // ending tags Matcher m = P_END_TAG.matcher(s); - if (m.find()) - { + if (m.find()) { final String name = m.group(1).toLowerCase(); - if (allowed(name)) - { - if (false == inArray(name, vSelfClosingTags)) - { - if (vTagCounts.containsKey(name)) - { + if (allowed(name)) { + if (false == inArray(name, vSelfClosingTags)) { + if (vTagCounts.containsKey(name)) { vTagCounts.put(name, vTagCounts.get(name) - 1); return ""; } @@ -345,35 +316,30 @@ public final class HTMLFilter // starting tags m = P_START_TAG.matcher(s); - if (m.find()) - { + if (m.find()) { final String name = m.group(1).toLowerCase(); final String body = m.group(2); String ending = m.group(3); // debug( "in a starting tag, name='" + name + "'; body='" + body + "'; ending='" + ending + "'" ); - if (allowed(name)) - { + if (allowed(name)) { final StringBuilder params = new StringBuilder(); final Matcher m2 = P_QUOTED_ATTRIBUTES.matcher(body); final Matcher m3 = P_UNQUOTED_ATTRIBUTES.matcher(body); final List paramNames = new ArrayList<>(); final List paramValues = new ArrayList<>(); - while (m2.find()) - { + while (m2.find()) { paramNames.add(m2.group(1)); // ([a-z0-9]+) paramValues.add(m2.group(3)); // (.*?) } - while (m3.find()) - { + while (m3.find()) { paramNames.add(m3.group(1)); // ([a-z0-9]+) paramValues.add(m3.group(3)); // ([^\"\\s']+) } String paramName, paramValue; - for (int ii = 0; ii < paramNames.size(); ii++) - { + for (int ii = 0; ii < paramNames.size(); ii++) { paramName = paramNames.get(ii).toLowerCase(); paramValue = paramValues.get(ii); @@ -381,72 +347,55 @@ public final class HTMLFilter // debug( "paramValue='" + paramValue + "'" ); // debug( "allowed? " + vAllowed.get( name ).contains( paramName ) ); - if (allowedAttribute(name, paramName)) - { - if (inArray(paramName, vProtocolAtts)) - { + if (allowedAttribute(name, paramName)) { + if (inArray(paramName, vProtocolAtts)) { paramValue = processParamProtocol(paramValue); } params.append(' ').append(paramName).append("=\"").append(paramValue).append("\""); } } - if (inArray(name, vSelfClosingTags)) - { + if (inArray(name, vSelfClosingTags)) { ending = " /"; } - if (inArray(name, vNeedClosingTags)) - { + if (inArray(name, vNeedClosingTags)) { ending = ""; } - if (ending == null || ending.length() < 1) - { - if (vTagCounts.containsKey(name)) - { + if (ending == null || ending.length() < 1) { + if (vTagCounts.containsKey(name)) { vTagCounts.put(name, vTagCounts.get(name) + 1); - } - else - { + } else { vTagCounts.put(name, 1); } - } - else - { + } else { ending = " /"; } return "<" + name + params + ending + ">"; - } - else - { + } else { return ""; } } // comments m = P_COMMENT.matcher(s); - if (!stripComment && m.find()) - { + if (!stripComment && m.find()) { return "<" + m.group() + ">"; } return ""; } - private String processParamProtocol(String s) - { + private String processParamProtocol(String s) { s = decodeEntities(s); final Matcher m = P_PROTOCOL.matcher(s); - if (m.find()) - { + if (m.find()) { final String protocol = m.group(1); - if (!inArray(protocol, vAllowedProtocols)) - { + if (!inArray(protocol, vAllowedProtocols)) { // bad protocol, turn into local anchor link instead s = "#" + s.substring(protocol.length() + 1); - if (s.startsWith("#//")) - { + if (s.startsWith("#//")) { s = "#" + s.substring(3); } } @@ -455,13 +404,11 @@ public final class HTMLFilter return s; } - private String decodeEntities(String s) - { + private String decodeEntities(String s) { StringBuffer buf = new StringBuffer(); Matcher m = P_ENTITY.matcher(s); - while (m.find()) - { + while (m.find()) { final String match = m.group(1); final int decimal = Integer.decode(match).intValue(); m.appendReplacement(buf, Matcher.quoteReplacement(chr(decimal))); @@ -471,8 +418,7 @@ public final class HTMLFilter buf = new StringBuffer(); m = P_ENTITY_UNICODE.matcher(s); - while (m.find()) - { + while (m.find()) { final String match = m.group(1); final int decimal = Integer.valueOf(match, 16).intValue(); m.appendReplacement(buf, Matcher.quoteReplacement(chr(decimal))); @@ -482,8 +428,7 @@ public final class HTMLFilter buf = new StringBuffer(); m = P_ENCODE.matcher(s); - while (m.find()) - { + while (m.find()) { final String match = m.group(1); final int decimal = Integer.valueOf(match, 16).intValue(); m.appendReplacement(buf, Matcher.quoteReplacement(chr(decimal))); @@ -495,14 +440,12 @@ public final class HTMLFilter return s; } - private String validateEntities(final String s) - { + private String validateEntities(final String s) { StringBuffer buf = new StringBuffer(); // validate entities throughout the string Matcher m = P_VALID_ENTITIES.matcher(s); - while (m.find()) - { + while (m.find()) { final String one = m.group(1); // ([^&;]*) final String two = m.group(2); // (?=(;|&|$)) m.appendReplacement(buf, Matcher.quoteReplacement(checkEntity(one, two))); @@ -512,14 +455,11 @@ public final class HTMLFilter return encodeQuotes(buf.toString()); } - private String encodeQuotes(final String s) - { - if (encodeQuotes) - { + private String encodeQuotes(final String s) { + if (encodeQuotes) { StringBuffer buf = new StringBuffer(); Matcher m = P_VALID_QUOTES.matcher(s); - while (m.find()) - { + while (m.find()) { final String one = m.group(1); // (>|^) final String two = m.group(2); // ([^<]+?) final String three = m.group(3); // (<|$) @@ -528,43 +468,34 @@ public final class HTMLFilter } m.appendTail(buf); return buf.toString(); - } - else - { + } else { return s; } } - private String checkEntity(final String preamble, final String term) - { + private String checkEntity(final String preamble, final String term) { return ";".equals(term) && isValidEntity(preamble) ? '&' + preamble : "&" + preamble; } - private boolean isValidEntity(final String entity) - { + private boolean isValidEntity(final String entity) { return inArray(entity, vAllowedEntities); } - private static boolean inArray(final String s, final String[] array) - { - for (String item : array) - { - if (item != null && item.equals(s)) - { + private static boolean inArray(final String s, final String[] array) { + for (String item : array) { + if (item != null && item.equals(s)) { return true; } } return false; } - private boolean allowed(final String name) - { + private boolean allowed(final String name) { return (vAllowed.isEmpty() || vAllowed.containsKey(name)) && !inArray(name, vDisallowed); } - private boolean allowedAttribute(final String name, final String paramName) - { + private boolean allowedAttribute(final String name, final String paramName) { return allowed(name) && (vAllowed.isEmpty() || vAllowed.get(name).contains(paramName)); } } \ No newline at end of file diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpHelper.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpHelper.java index dac60ad0..dcb8e4ce 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpHelper.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpHelper.java @@ -6,46 +6,35 @@ import java.io.InputStream; import java.io.InputStreamReader; import java.nio.charset.Charset; import javax.servlet.ServletRequest; + import org.apache.commons.lang3.exception.ExceptionUtils; import org.slf4j.Logger; import org.slf4j.LoggerFactory; /** * 通用http工具封装 - * + * * @author ruoyi */ -public class HttpHelper -{ +public class HttpHelper { private static final Logger LOGGER = LoggerFactory.getLogger(HttpHelper.class); - public static String getBodyString(ServletRequest request) - { + public static String getBodyString(ServletRequest request) { StringBuilder sb = new StringBuilder(); BufferedReader reader = null; - try (InputStream inputStream = request.getInputStream()) - { + try (InputStream inputStream = request.getInputStream()) { reader = new BufferedReader(new InputStreamReader(inputStream, Charset.forName("UTF-8"))); String line = ""; - while ((line = reader.readLine()) != null) - { + while ((line = reader.readLine()) != null) { sb.append(line); } - } - catch (IOException e) - { + } catch (IOException e) { LOGGER.warn("getBodyString出现问题！"); - } - finally - { - if (reader != null) - { - try - { + } finally { + if (reader != null) { + try { reader.close(); - } - catch (IOException e) - { + } catch (IOException e) { LOGGER.error(ExceptionUtils.getMessage(e)); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpUtils.java index 9aee92ef..8213c6f3 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/http/HttpUtils.java @@ -16,45 +16,42 @@ import javax.net.ssl.SSLContext; import javax.net.ssl.SSLSession; import javax.net.ssl.TrustManager; import javax.net.ssl.X509TrustManager; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; import com.ruoyi.common.constant.Constants; /** * 通用http发送方法 - * + * * @author ruoyi */ -public class HttpUtils -{ +public class HttpUtils { private static final Logger log = LoggerFactory.getLogger(HttpUtils.class); /** * 向指定 URL 发送GET方法的请求 * - * @param url 发送请求的 URL + * @param url 发送请求的 URL * @param param 请求参数，请求参数应该是 name1=value1&name2=value2 的形式。 * @return 所代表远程资源的响应结果 */ - public static String sendGet(String url, String param) - { + public static String sendGet(String url, String param) { return sendGet(url, param, Constants.UTF8); } /** * 向指定 URL 发送GET方法的请求 * - * @param url 发送请求的 URL - * @param param 请求参数，请求参数应该是 name1=value1&name2=value2 的形式。 + * @param url 发送请求的 URL + * @param param 请求参数，请求参数应该是 name1=value1&name2=value2 的形式。 * @param contentType 编码类型 * @return 所代表远程资源的响应结果 */ - public static String sendGet(String url, String param, String contentType) - { + public static String sendGet(String url, String param, String contentType) { StringBuilder result = new StringBuilder(); BufferedReader in = null; - try - { + try { String urlNameString = url + "?" + param; log.info("sendGet - {}", urlNameString); URL realUrl = new URL(urlNameString); @@ -65,39 +62,24 @@ public class HttpUtils connection.connect(); in = new BufferedReader(new InputStreamReader(connection.getInputStream(), contentType)); String line; - while ((line = in.readLine()) != null) - { + while ((line = in.readLine()) != null) { result.append(line); } log.info("recv - {}", result); - } - catch (ConnectException e) - { + } catch (ConnectException e) { log.error("调用HttpUtils.sendGet ConnectException, url=" + url + ",param=" + param, e); - } - catch (SocketTimeoutException e) - { + } catch (SocketTimeoutException e) { log.error("调用HttpUtils.sendGet SocketTimeoutException, url=" + url + ",param=" + param, e); - } - catch (IOException e) - { + } catch (IOException e) { log.error("调用HttpUtils.sendGet IOException, url=" + url + ",param=" + param, e); - } - catch (Exception e) - { + } catch (Exception e) { log.error("调用HttpsUtil.sendGet Exception, url=" + url + ",param=" + param, e); - } - finally - { - try - { - if (in != null) - { + } finally { + try { + if (in != null) { in.close(); } - } - catch (Exception ex) - { + } catch (Exception ex) { log.error("调用in.close Exception, url=" + url + ",param=" + param, ex); } } @@ -107,17 +89,15 @@ public class HttpUtils /** * 向指定 URL 发送POST方法的请求 * - * @param url 发送请求的 URL + * @param url 发送请求的 URL * @param param 请求参数，请求参数应该是 name1=value1&name2=value2 的形式。 * @return 所代表远程资源的响应结果 */ - public static String sendPost(String url, String param) - { + public static String sendPost(String url, String param) { PrintWriter out = null; BufferedReader in = null; StringBuilder result = new StringBuilder(); - try - { + try { String urlNameString = url; log.info("sendPost - {}", urlNameString); URL realUrl = new URL(urlNameString); @@ -134,58 +114,40 @@ public class HttpUtils out.flush(); in = new BufferedReader(new InputStreamReader(conn.getInputStream(), "utf-8")); String line; - while ((line = in.readLine()) != null) - { + while ((line = in.readLine()) != null) { result.append(line); } log.info("recv - {}", result); - } - catch (ConnectException e) - { + } catch (ConnectException e) { log.error("调用HttpUtils.sendPost ConnectException, url=" + url + ",param=" + param, e); - } - catch (SocketTimeoutException e) - { + } catch (SocketTimeoutException e) { log.error("调用HttpUtils.sendPost SocketTimeoutException, url=" + url + ",param=" + param, e); - } - catch (IOException e) - { + } catch (IOException e) { log.error("调用HttpUtils.sendPost IOException, url=" + url + ",param=" + param, e); - } - catch (Exception e) - { + } catch (Exception e) { log.error("调用HttpsUtil.sendPost Exception, url=" + url + ",param=" + param, e); - } - finally - { - try - { - if (out != null) - { + } finally { + try { + if (out != null) { out.close(); } - if (in != null) - { + if (in != null) { in.close(); } - } - catch (IOException ex) - { + } catch (IOException ex) { log.error("调用in.close Exception, url=" + url + ",param=" + param, ex); } } return result.toString(); } - public static String sendSSLPost(String url, String param) - { + public static String sendSSLPost(String url, String param) { StringBuilder result = new StringBuilder(); String urlNameString = url + "?" + param; - try - { + try { log.info("sendSSLPost - {}", urlNameString); SSLContext sc = SSLContext.getInstance("SSL"); - sc.init(null, new TrustManager[] { new TrustAnyTrustManager() }, new java.security.SecureRandom()); + sc.init(null, new TrustManager[]{new TrustAnyTrustManager()}, new java.security.SecureRandom()); URL console = new URL(urlNameString); HttpsURLConnection conn = (HttpsURLConnection) console.openConnection(); conn.setRequestProperty("accept", "*/*"); @@ -202,60 +164,44 @@ public class HttpUtils InputStream is = conn.getInputStream(); BufferedReader br = new BufferedReader(new InputStreamReader(is)); String ret = ""; - while ((ret = br.readLine()) != null) - { - if (ret != null && !"".equals(ret.trim())) - { + while ((ret = br.readLine()) != null) { + if (ret != null && !"".equals(ret.trim())) { result.append(new String(ret.getBytes("ISO-8859-1"), "utf-8")); } } log.info("recv - {}", result); conn.disconnect(); br.close(); - } - catch (ConnectException e) - { + } catch (ConnectException e) { log.error("调用HttpUtils.sendSSLPost ConnectException, url=" + url + ",param=" + param, e); - } - catch (SocketTimeoutException e) - { + } catch (SocketTimeoutException e) { log.error("调用HttpUtils.sendSSLPost SocketTimeoutException, url=" + url + ",param=" + param, e); - } - catch (IOException e) - { + } catch (IOException e) { log.error("调用HttpUtils.sendSSLPost IOException, url=" + url + ",param=" + param, e); - } - catch (Exception e) - { + } catch (Exception e) { log.error("调用HttpsUtil.sendSSLPost Exception, url=" + url + ",param=" + param, e); } return result.toString(); } - private static class TrustAnyTrustManager implements X509TrustManager - { + private static class TrustAnyTrustManager implements X509TrustManager { @Override - public void checkClientTrusted(X509Certificate[] chain, String authType) - { + public void checkClientTrusted(X509Certificate[] chain, String authType) { } @Override - public void checkServerTrusted(X509Certificate[] chain, String authType) - { + public void checkServerTrusted(X509Certificate[] chain, String authType) { } @Override - public X509Certificate[] getAcceptedIssuers() - { - return new X509Certificate[] {}; + public X509Certificate[] getAcceptedIssuers() { + return new X509Certificate[]{}; } } - private static class TrustAnyHostnameVerifier implements HostnameVerifier - { + private static class TrustAnyHostnameVerifier implements HostnameVerifier { @Override - public boolean verify(String hostname, SSLSession session) - { + public boolean verify(String hostname, SSLSession session) { return true; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/AddressUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/AddressUtils.java index 01c24fc7..ce391a88 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/AddressUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/AddressUtils.java @@ -10,11 +10,10 @@ import com.ruoyi.common.utils.http.HttpUtils; /** * 获取地址类 - * + * * @author ruoyi */ -public class AddressUtils -{ +public class AddressUtils { private static final Logger log = LoggerFactory.getLogger(AddressUtils.class); // IP地址查询 @@ -23,21 +22,16 @@ public class AddressUtils // 未知地址 public static final String UNKNOWN = "XX XX"; - public static String getRealAddressByIP(String ip) - { + public static String getRealAddressByIP(String ip) { String address = UNKNOWN; // 内网不查询 - if (IpUtils.internalIp(ip)) - { + if (IpUtils.internalIp(ip)) { return "内网IP"; } - if (RuoYiConfig.isAddressEnabled()) - { - try - { + if (RuoYiConfig.isAddressEnabled()) { + try { String rspStr = HttpUtils.sendGet(IP_URL, "ip=" + ip + "&json=true", Constants.GBK); - if (StringUtils.isEmpty(rspStr)) - { + if (StringUtils.isEmpty(rspStr)) { log.error("获取地理位置异常 {}", ip); return UNKNOWN; } @@ -45,9 +39,7 @@ public class AddressUtils String region = obj.getString("pro"); String city = obj.getString("city"); return String.format("%s %s", region, city); - } - catch (Exception e) - { + } catch (Exception e) { log.error("获取地理位置异常 {}", ip); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/IpUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/IpUtils.java index 1b3f42ba..4fa9eb89 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/IpUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/ip/IpUtils.java @@ -3,57 +3,47 @@ package com.ruoyi.common.utils.ip; import java.net.InetAddress; import java.net.UnknownHostException; import javax.servlet.http.HttpServletRequest; + import com.ruoyi.common.utils.StringUtils; import com.ruoyi.common.utils.html.EscapeUtil; /** * 获取IP方法 - * + * * @author ruoyi */ -public class IpUtils -{ - public static String getIpAddr(HttpServletRequest request) - { - if (request == null) - { +public class IpUtils { + public static String getIpAddr(HttpServletRequest request) { + if (request == null) { return "unknown"; } String ip = request.getHeader("x-forwarded-for"); - if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) - { + if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) { ip = request.getHeader("Proxy-Client-IP"); } - if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) - { + if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) { ip = request.getHeader("X-Forwarded-For"); } - if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) - { + if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) { ip = request.getHeader("WL-Proxy-Client-IP"); } - if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) - { + if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) { ip = request.getHeader("X-Real-IP"); } - if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) - { + if (ip == null || ip.length() == 0 || "unknown".equalsIgnoreCase(ip)) { ip = request.getRemoteAddr(); } return "0:0:0:0:0:0:0:1".equals(ip) ? "127.0.0.1" : EscapeUtil.clean(ip); } - public static boolean internalIp(String ip) - { + public static boolean internalIp(String ip) { byte[] addr = textToNumericFormatV4(ip); return internalIp(addr) || "127.0.0.1".equals(ip); } - private static boolean internalIp(byte[] addr) - { - if (StringUtils.isNull(addr) || addr.length < 2) - { + private static boolean internalIp(byte[] addr) { + if (StringUtils.isNull(addr) || addr.length < 2) { return true; } final byte b0 = addr[0]; @@ -67,18 +57,15 @@ public class IpUtils // 192.168.x.x/16 final byte SECTION_5 = (byte) 0xC0; final byte SECTION_6 = (byte) 0xA8; - switch (b0) - { + switch (b0) { case SECTION_1: return true; case SECTION_2: - if (b1 >= SECTION_3 && b1 <= SECTION_4) - { + if (b1 >= SECTION_3 && b1 <= SECTION_4) { return true; } case SECTION_5: - switch (b1) - { + switch (b1) { case SECTION_6: return true; } @@ -89,25 +76,21 @@ public class IpUtils /** * 将IPv4地址转换成字节 - * + * * @param text IPv4地址 * @return byte 字节 */ - public static byte[] textToNumericFormatV4(String text) - { - if (text.length() == 0) - { + public static byte[] textToNumericFormatV4(String text) { + if (text.length() == 0) { return null; } byte[] bytes = new byte[4]; String[] elements = text.split("\\.", -1); - try - { + try { long l; int i; - switch (elements.length) - { + switch (elements.length) { case 1: l = Long.parseLong(elements[0]); if ((l < 0L) || (l > 4294967295L)) { @@ -133,8 +116,7 @@ public class IpUtils bytes[3] = (byte) (int) (l & 0xFF); break; case 3: - for (i = 0; i < 2; ++i) - { + for (i = 0; i < 2; ++i) { l = Integer.parseInt(elements[i]); if ((l < 0L) || (l > 255L)) { return null; @@ -149,8 +131,7 @@ public class IpUtils bytes[3] = (byte) (int) (l & 0xFF); break; case 4: - for (i = 0; i < 4; ++i) - { + for (i = 0; i < 4; ++i) { l = Integer.parseInt(elements[i]); if ((l < 0L) || (l > 255L)) { return null; @@ -161,34 +142,24 @@ public class IpUtils default: return null; } - } - catch (NumberFormatException e) - { + } catch (NumberFormatException e) { return null; } return bytes; } - public static String getHostIp() - { - try - { + public static String getHostIp() { + try { return InetAddress.getLocalHost().getHostAddress(); - } - catch (UnknownHostException e) - { + } catch (UnknownHostException e) { } return "127.0.0.1"; } - public static String getHostName() - { - try - { + public static String getHostName() { + try { return InetAddress.getLocalHost().getHostName(); - } - catch (UnknownHostException e) - { + } catch (UnknownHostException e) { } return "未知"; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/poi/ExcelUtil.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/poi/ExcelUtil.java index 495370b3..9bb72174 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/poi/ExcelUtil.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/poi/ExcelUtil.java @@ -18,6 +18,7 @@ import java.util.Map; import java.util.Set; import java.util.UUID; import java.util.stream.Collectors; + import org.apache.poi.ss.usermodel.BorderStyle; import org.apache.poi.ss.usermodel.Cell; import org.apache.poi.ss.usermodel.CellStyle; @@ -60,11 +61,10 @@ import com.ruoyi.common.utils.reflect.ReflectUtils; /** * Excel相关处理 - * + * * @author ruoyi */ -public class ExcelUtil -{ +public class ExcelUtil { private static final Logger log = LoggerFactory.getLogger(ExcelUtil.class); /** @@ -116,26 +116,23 @@ public class ExcelUtil * 统计列表 */ private Map statistics = new HashMap(); - + /** * 数字格式 */ private static final DecimalFormat DOUBLE_FORMAT = new DecimalFormat("######0.00"); - + /** * 实体对象 */ public Class clazz; - public ExcelUtil(Class clazz) - { + public ExcelUtil(Class clazz) { this.clazz = clazz; } - public void init(List list, String sheetName, Type type) - { - if (list == null) - { + public void init(List list, String sheetName, Type type) { + if (list == null) { list = new ArrayList(); } this.list = list; @@ -147,62 +144,51 @@ public class ExcelUtil /** * 对excel表单默认第一个索引名转换成list - * + * * @param is 输入流 * @return 转换后集合 */ - public List importExcel(InputStream is) throws Exception - { + public List importExcel(InputStream is) throws Exception { return importExcel(StringUtils.EMPTY, is); } /** * 对excel表单指定表格索引名转换成list - * + * * @param sheetName 表格索引名 - * @param is 输入流 + * @param is 输入流 * @return 转换后集合 */ - public List importExcel(String sheetName, InputStream is) throws Exception - { + public List importExcel(String sheetName, InputStream is) throws Exception { this.type = Type.IMPORT; this.wb = WorkbookFactory.create(is); List list = new ArrayList(); Sheet sheet = null; - if (StringUtils.isNotEmpty(sheetName)) - { + if (StringUtils.isNotEmpty(sheetName)) { // 如果指定sheet名,则取指定sheet中的内容. sheet = wb.getSheet(sheetName); - } - else - { + } else { // 如果传入的sheet名不存在则默认指向第1个sheet. sheet = wb.getSheetAt(0); } - if (sheet == null) - { + if (sheet == null) { throw new IOException("文件sheet不存在"); } int rows = sheet.getPhysicalNumberOfRows(); - if (rows > 0) - { + if (rows > 0) { // 定义一个map用于存放excel列的序号和field. Map cellMap = new HashMap(); // 获取表头 Row heard = sheet.getRow(0); - for (int i = 0; i < heard.getPhysicalNumberOfCells(); i++) - { + for (int i = 0; i < heard.getPhysicalNumberOfCells(); i++) { Cell cell = heard.getCell(i); - if (StringUtils.isNotNull(cell)) - { + if (StringUtils.isNotNull(cell)) { String value = this.getCellValue(heard, i).toString(); cellMap.put(value, i); - } - else - { + } else { cellMap.put(null, i); } } @@ -210,28 +196,23 @@ public class ExcelUtil Field[] allFields = clazz.getDeclaredFields(); // 定义一个map用于存放列的序号和field. Map fieldsMap = new HashMap(); - for (int col = 0; col < allFields.length; col++) - { + for (int col = 0; col < allFields.length; col++) { Field field = allFields[col]; Excel attr = field.getAnnotation(Excel.class); - if (attr != null && (attr.type() == Type.ALL || attr.type() == type)) - { + if (attr != null && (attr.type() == Type.ALL || attr.type() == type)) { // 设置类的私有字段属性可访问. field.setAccessible(true); Integer column = cellMap.get(attr.name()); - if (column != null) - { + if (column != null) { fieldsMap.put(column, field); } } } - for (int i = 1; i < rows; i++) - { + for (int i = 1; i < rows; i++) { // 从第2行开始取数据,默认第一行是表头. Row row = sheet.getRow(i); T entity = null; - for (Map.Entry entry : fieldsMap.entrySet()) - { + for (Map.Entry entry : fieldsMap.entrySet()) { Object val = this.getCellValue(row, entry.getKey()); // 如果不存在实例则新建. @@ -240,75 +221,45 @@ public class ExcelUtil Field field = fieldsMap.get(entry.getKey()); // 取得类型,并根据对象类型设置值. Class fieldType = field.getType(); - if (String.class == fieldType) - { + if (String.class == fieldType) { String s = Convert.toStr(val); - if (StringUtils.endsWith(s, ".0")) - { + if (StringUtils.endsWith(s, ".0")) { val = StringUtils.substringBefore(s, ".0"); - } - else - { + } else { String dateFormat = field.getAnnotation(Excel.class).dateFormat(); - if (StringUtils.isNotEmpty(dateFormat)) - { + if (StringUtils.isNotEmpty(dateFormat)) { val = DateUtils.parseDateToStr(dateFormat, (Date) val); - } - else - { + } else { val = Convert.toStr(val); } } - } - else if ((Integer.TYPE == fieldType || Integer.class == fieldType) && StringUtils.isNumeric(Convert.toStr(val))) - { + } else if ((Integer.TYPE == fieldType || Integer.class == fieldType) && StringUtils.isNumeric(Convert.toStr(val))) { val = Convert.toInt(val); - } - else if (Long.TYPE == fieldType || Long.class == fieldType) - { + } else if (Long.TYPE == fieldType || Long.class == fieldType) { val = Convert.toLong(val); - } - else if (Double.TYPE == fieldType || Double.class == fieldType) - { + } else if (Double.TYPE == fieldType || Double.class == fieldType) { val = Convert.toDouble(val); - } - else if (Float.TYPE == fieldType || Float.class == fieldType) - { + } else if (Float.TYPE == fieldType || Float.class == fieldType) { val = Convert.toFloat(val); - } - else if (BigDecimal.class == fieldType) - { + } else if (BigDecimal.class == fieldType) { val = Convert.toBigDecimal(val); - } - else if (Date.class == fieldType) - { - if (val instanceof String) - { + } else if (Date.class == fieldType) { + if (val instanceof String) { val = DateUtils.parseDate(val); - } - else if (val instanceof Double) - { + } else if (val instanceof Double) { val = DateUtil.getJavaDate((Double) val); } - } - else if (Boolean.TYPE == fieldType || Boolean.class == fieldType) - { + } else if (Boolean.TYPE == fieldType || Boolean.class == fieldType) { val = Convert.toBool(val, false); } - if (StringUtils.isNotNull(fieldType)) - { + if (StringUtils.isNotNull(fieldType)) { Excel attr = field.getAnnotation(Excel.class); String propertyName = field.getName(); - if (StringUtils.isNotEmpty(attr.targetAttr())) - { + if (StringUtils.isNotEmpty(attr.targetAttr())) { propertyName = field.getName() + "." + attr.targetAttr(); - } - else if (StringUtils.isNotEmpty(attr.readConverterExp())) - { + } else if (StringUtils.isNotEmpty(attr.readConverterExp())) { val = reverseByExp(Convert.toStr(val), attr.readConverterExp(), attr.separator()); - } - else if (StringUtils.isNotEmpty(attr.dictType())) - { + } else if (StringUtils.isNotEmpty(attr.dictType())) { val = reverseDictByExp(Convert.toStr(val), attr.dictType(), attr.separator()); } ReflectUtils.invokeSetter(entity, propertyName, val); @@ -322,56 +273,49 @@ public class ExcelUtil /** * 对list数据源将其里面的数据导入到excel表单 - * - * @param list 导出数据集合 + * + * @param list 导出数据集合 * @param sheetName 工作表的名称 * @return 结果 */ - public AjaxResult exportExcel(List list, String sheetName) - { + public AjaxResult exportExcel(List list, String sheetName) { this.init(list, sheetName, Type.EXPORT); return exportExcel(); } /** * 对list数据源将其里面的数据导入到excel表单 - * + * * @param sheetName 工作表的名称 * @return 结果 */ - public AjaxResult importTemplateExcel(String sheetName) - { + public AjaxResult importTemplateExcel(String sheetName) { this.init(null, sheetName, Type.IMPORT); return exportExcel(); } /** * 对list数据源将其里面的数据导入到excel表单 - * + * * @return 结果 */ - public AjaxResult exportExcel() - { + public AjaxResult exportExcel() { OutputStream out = null; - try - { + try { // 取出一共有多少个sheet. double sheetNo = Math.ceil(list.size() / sheetSize); - for (int index = 0; index <= sheetNo; index++) - { + for (int index = 0; index <= sheetNo; index++) { createSheet(sheetNo, index); // 产生一行 Row row = sheet.createRow(0); int column = 0; // 写入各个字段的列头名称 - for (Object[] os : fields) - { + for (Object[] os : fields) { Excel excel = (Excel) os[1]; this.createCell(excel, row, column++); } - if (Type.EXPORT.equals(type)) - { + if (Type.EXPORT.equals(type)) { fillExcelData(index, row); addStatisticsRow(); } @@ -380,33 +324,21 @@ public class ExcelUtil out = new FileOutputStream(getAbsoluteFile(filename)); wb.write(out); return AjaxResult.success(filename); - } - catch (Exception e) - { + } catch (Exception e) { log.error("导出Excel异常{}", e.getMessage()); throw new CustomException("导出Excel失败，请联系网站管理员！"); - } - finally - { - if (wb != null) - { - try - { + } finally { + if (wb != null) { + try { wb.close(); - } - catch (IOException e1) - { + } catch (IOException e1) { e1.printStackTrace(); } } - if (out != null) - { - try - { + if (out != null) { + try { out.close(); - } - catch (IOException e1) - { + } catch (IOException e1) { e1.printStackTrace(); } } @@ -415,22 +347,19 @@ public class ExcelUtil /** * 填充excel数据 - * + * * @param index 序号 - * @param row 单元格行 + * @param row 单元格行 */ - public void fillExcelData(int index, Row row) - { + public void fillExcelData(int index, Row row) { int startNo = index * sheetSize; int endNo = Math.min(startNo + sheetSize, list.size()); - for (int i = startNo; i < endNo; i++) - { + for (int i = startNo; i < endNo; i++) { row = sheet.createRow(i + 1 - startNo); // 得到导出对象. T vo = (T) list.get(i); int column = 0; - for (Object[] os : fields) - { + for (Object[] os : fields) { Field field = (Field) os[0]; Excel excel = (Excel) os[1]; // 设置实体类私有属性可访问 @@ -442,12 +371,11 @@ public class ExcelUtil /** * 创建表格样式 - * + * * @param wb 工作薄对象 * @return 样式列表 */ - private Map createStyles(Workbook wb) - { + private Map createStyles(Workbook wb) { // 写入各条记录,每条记录对应excel表中的一行 Map styles = new HashMap(); CellStyle style = wb.createCellStyle(); @@ -480,7 +408,7 @@ public class ExcelUtil headerFont.setColor(IndexedColors.WHITE.getIndex()); style.setFont(headerFont); styles.put("header", style); - + style = wb.createCellStyle(); style.setAlignment(HorizontalAlignment.CENTER); style.setVerticalAlignment(VerticalAlignment.CENTER); @@ -511,8 +439,7 @@ public class ExcelUtil /** * 创建单元格 */ - public Cell createCell(Excel attr, Row row, int column) - { + public Cell createCell(Excel attr, Row row, int column) { // 创建列 Cell cell = row.createCell(column); // 写入列信息 @@ -524,42 +451,33 @@ public class ExcelUtil /** * 设置单元格信息 - * + * * @param value 单元格值 - * @param attr 注解相关 - * @param cell 单元格信息 + * @param attr 注解相关 + * @param cell 单元格信息 */ - public void setCellVo(Object value, Excel attr, Cell cell) - { - if (ColumnType.STRING == attr.cellType()) - { + public void setCellVo(Object value, Excel attr, Cell cell) { + if (ColumnType.STRING == attr.cellType()) { cell.setCellValue(StringUtils.isNull(value) ? attr.defaultValue() : value + attr.suffix()); - } - else if (ColumnType.NUMERIC == attr.cellType()) - { + } else if (ColumnType.NUMERIC == attr.cellType()) { cell.setCellValue(StringUtils.contains(Convert.toStr(value), ".") ? Convert.toDouble(value) : Convert.toInt(value)); - } - else if (ColumnType.IMAGE == attr.cellType()) - { + } else if (ColumnType.IMAGE == attr.cellType()) { ClientAnchor anchor = new XSSFClientAnchor(0, 0, 0, 0, (short) cell.getColumnIndex(), cell.getRow().getRowNum(), (short) (cell.getColumnIndex() + 1), cell.getRow().getRowNum() + 1); String imagePath = Convert.toStr(value); - if (StringUtils.isNotEmpty(imagePath)) - { + if (StringUtils.isNotEmpty(imagePath)) { byte[] data = ImageUtils.getImage(imagePath); getDrawingPatriarch(cell.getSheet()).createPicture(anchor, cell.getSheet().getWorkbook().addPicture(data, getImageType(data))); } } } - + /** * 获取画布 */ - public static Drawing getDrawingPatriarch(Sheet sheet) - { - if (sheet.getDrawingPatriarch() == null) - { + public static Drawing getDrawingPatriarch(Sheet sheet) { + if (sheet.getDrawingPatriarch() == null) { sheet.createDrawingPatriarch(); } return sheet.getDrawingPatriarch(); @@ -568,15 +486,11 @@ public class ExcelUtil /** * 获取图片类型,设置图片插入类型 */ - public int getImageType(byte[] value) - { + public int getImageType(byte[] value) { String type = FileTypeUtils.getFileExtendName(value); - if ("JPG".equalsIgnoreCase(type)) - { + if ("JPG".equalsIgnoreCase(type)) { return Workbook.PICTURE_TYPE_JPEG; - } - else if ("PNG".equalsIgnoreCase(type)) - { + } else if ("PNG".equalsIgnoreCase(type)) { return Workbook.PICTURE_TYPE_PNG; } return Workbook.PICTURE_TYPE_JPEG; @@ -585,26 +499,20 @@ public class ExcelUtil /** * 创建表格样式 */ - public void setDataValidation(Excel attr, Row row, int column) - { - if (attr.name().indexOf("注：") >= 0) - { + public void setDataValidation(Excel attr, Row row, int column) { + if (attr.name().indexOf("注：") >= 0) { sheet.setColumnWidth(column, 6000); - } - else - { + } else { // 设置列宽 sheet.setColumnWidth(column, (int) ((attr.width() + 0.72) * 256)); } // 如果设置了提示信息则鼠标放上去提示. - if (StringUtils.isNotEmpty(attr.prompt())) - { + if (StringUtils.isNotEmpty(attr.prompt())) { // 这里默认设了2-101列提示. setXSSFPrompt(sheet, "", attr.prompt(), 1, 100, column, column); } // 如果设置了combo属性则本列只能选择不能输入 - if (attr.combo().length > 0) - { + if (attr.combo().length > 0) { // 这里默认设了2-101列只能选择不能输入. setXSSFValidation(sheet, attr.combo(), 1, 100, column, column); } @@ -613,16 +521,13 @@ public class ExcelUtil /** * 添加单元格 */ - public Cell addCell(Excel attr, Row row, T vo, Field field, int column) - { + public Cell addCell(Excel attr, Row row, T vo, Field field, int column) { Cell cell = null; - try - { + try { // 设置行高 row.setHeight(maxHeight); // 根据Excel中设置情况决定是否导出,有些情况需要保持为空,希望用户填写这一列. - if (attr.isExport()) - { + if (attr.isExport()) { // 创建cell cell = row.createCell(column); int align = attr.align().value(); @@ -634,32 +539,21 @@ public class ExcelUtil String readConverterExp = attr.readConverterExp(); String separator = attr.separator(); String dictType = attr.dictType(); - if (StringUtils.isNotEmpty(dateFormat) && StringUtils.isNotNull(value)) - { + if (StringUtils.isNotEmpty(dateFormat) && StringUtils.isNotNull(value)) { cell.setCellValue(DateUtils.parseDateToStr(dateFormat, (Date) value)); - } - else if (StringUtils.isNotEmpty(readConverterExp) && StringUtils.isNotNull(value)) - { + } else if (StringUtils.isNotEmpty(readConverterExp) && StringUtils.isNotNull(value)) { cell.setCellValue(convertByExp(Convert.toStr(value), readConverterExp, separator)); - } - else if (StringUtils.isNotEmpty(dictType) && StringUtils.isNotNull(value)) - { + } else if (StringUtils.isNotEmpty(dictType) && StringUtils.isNotNull(value)) { cell.setCellValue(convertDictByExp(Convert.toStr(value), dictType, separator)); - } - else if (value instanceof BigDecimal && -1 != attr.scale()) - { + } else if (value instanceof BigDecimal && -1 != attr.scale()) { cell.setCellValue((((BigDecimal) value).setScale(attr.scale(), attr.roundingMode())).toString()); - } - else - { + } else { // 设置列类型 setCellVo(value, attr, cell); } addStatisticsData(column, Convert.toStr(value), attr); } - } - catch (Exception e) - { + } catch (Exception e) { log.error("导出Excel失败{}", e); } return cell; @@ -667,18 +561,17 @@ public class ExcelUtil /** * 设置 POI XSSFSheet 单元格提示 - * - * @param sheet 表单 - * @param promptTitle 提示标题 + * + * @param sheet 表单 + * @param promptTitle 提示标题 * @param promptContent 提示内容 - * @param firstRow 开始行 - * @param endRow 结束行 - * @param firstCol 开始列 - * @param endCol 结束列 + * @param firstRow 开始行 + * @param endRow 结束行 + * @param firstCol 开始列 + * @param endCol 结束列 */ public void setXSSFPrompt(Sheet sheet, String promptTitle, String promptContent, int firstRow, int endRow, - int firstCol, int endCol) - { + int firstCol, int endCol) { DataValidationHelper helper = sheet.getDataValidationHelper(); DataValidationConstraint constraint = helper.createCustomConstraint("DD1"); CellRangeAddressList regions = new CellRangeAddressList(firstRow, endRow, firstCol, endCol); @@ -690,17 +583,16 @@ public class ExcelUtil /** * 设置某些列的值只能输入预制的数据,显示下拉框. - * - * @param sheet 要设置的sheet. + * + * @param sheet 要设置的sheet. * @param textlist 下拉框显示的内容 * @param firstRow 开始行 - * @param endRow 结束行 + * @param endRow 结束行 * @param firstCol 开始列 - * @param endCol 结束列 + * @param endCol 结束列 * @return 设置好的sheet. */ - public void setXSSFValidation(Sheet sheet, String[] textlist, int firstRow, int endRow, int firstCol, int endCol) - { + public void setXSSFValidation(Sheet sheet, String[] textlist, int firstRow, int endRow, int firstCol, int endCol) { DataValidationHelper helper = sheet.getDataValidationHelper(); // 加载下拉列表内容 DataValidationConstraint constraint = helper.createExplicitListConstraint(textlist); @@ -709,13 +601,10 @@ public class ExcelUtil // 数据有效性对象 DataValidation dataValidation = helper.createValidation(constraint, regions); // 处理Excel兼容性问题 - if (dataValidation instanceof XSSFDataValidation) - { + if (dataValidation instanceof XSSFDataValidation) { dataValidation.setSuppressDropDownArrow(true); dataValidation.setShowErrorBox(true); - } - else - { + } else { dataValidation.setSuppressDropDownArrow(false); } @@ -724,34 +613,26 @@ public class ExcelUtil /** * 解析导出值 0=男,1=女,2=未知 - * + * * @param propertyValue 参数值 - * @param converterExp 翻译注解 - * @param separator 分隔符 + * @param converterExp 翻译注解 + * @param separator 分隔符 * @return 解析后值 */ - public static String convertByExp(String propertyValue, String converterExp, String separator) - { + public static String convertByExp(String propertyValue, String converterExp, String separator) { StringBuilder propertyString = new StringBuilder(); String[] convertSource = converterExp.split(","); - for (String item : convertSource) - { + for (String item : convertSource) { String[] itemArray = item.split("="); - if (StringUtils.containsAny(separator, propertyValue)) - { - for (String value : propertyValue.split(separator)) - { - if (itemArray[0].equals(value)) - { + if (StringUtils.containsAny(separator, propertyValue)) { + for (String value : propertyValue.split(separator)) { + if (itemArray[0].equals(value)) { propertyString.append(itemArray[1] + separator); break; } } - } - else - { - if (itemArray[0].equals(propertyValue)) - { + } else { + if (itemArray[0].equals(propertyValue)) { return itemArray[1]; } } @@ -761,85 +642,69 @@ public class ExcelUtil /** * 反向解析值 男=0,女=1,未知=2 - * + * * @param propertyValue 参数值 - * @param converterExp 翻译注解 - * @param separator 分隔符 + * @param converterExp 翻译注解 + * @param separator 分隔符 * @return 解析后值 */ - public static String reverseByExp(String propertyValue, String converterExp, String separator) - { + public static String reverseByExp(String propertyValue, String converterExp, String separator) { StringBuilder propertyString = new StringBuilder(); String[] convertSource = converterExp.split(","); - for (String item : convertSource) - { + for (String item : convertSource) { String[] itemArray = item.split("="); - if (StringUtils.containsAny(separator, propertyValue)) - { - for (String value : propertyValue.split(separator)) - { - if (itemArray[1].equals(value)) - { + if (StringUtils.containsAny(separator, propertyValue)) { + for (String value : propertyValue.split(separator)) { + if (itemArray[1].equals(value)) { propertyString.append(itemArray[0] + separator); break; } } - } - else - { - if (itemArray[1].equals(propertyValue)) - { + } else { + if (itemArray[1].equals(propertyValue)) { return itemArray[0]; } } } return StringUtils.stripEnd(propertyString.toString(), separator); } - + /** * 解析字典值 - * + * * @param dictValue 字典值 - * @param dictType 字典类型 + * @param dictType 字典类型 * @param separator 分隔符 * @return 字典标签 */ - public static String convertDictByExp(String dictValue, String dictType, String separator) - { + public static String convertDictByExp(String dictValue, String dictType, String separator) { return DictUtils.getDictLabel(dictType, dictValue, separator); } /** * 反向解析值字典值 - * + * * @param dictLabel 字典标签 - * @param dictType 字典类型 + * @param dictType 字典类型 * @param separator 分隔符 * @return 字典值 */ - public static String reverseDictByExp(String dictLabel, String dictType, String separator) - { + public static String reverseDictByExp(String dictLabel, String dictType, String separator) { return DictUtils.getDictValue(dictType, dictLabel, separator); } - + /** * 合计统计信息 */ - private void addStatisticsData(Integer index, String text, Excel entity) - { - if (entity != null && entity.isStatistics()) - { + private void addStatisticsData(Integer index, String text, Excel entity) { + if (entity != null && entity.isStatistics()) { Double temp = 0D; - if (!statistics.containsKey(index)) - { + if (!statistics.containsKey(index)) { statistics.put(index, temp); } - try - { + try { temp = Double.valueOf(text); - } - catch (NumberFormatException e) - { + } catch (NumberFormatException e) { } statistics.put(index, statistics.get(index) + temp); } @@ -848,19 +713,16 @@ public class ExcelUtil /** * 创建统计行 */ - public void addStatisticsRow() - { - if (statistics.size() > 0) - { + public void addStatisticsRow() { + if (statistics.size() > 0) { Cell cell = null; Row row = sheet.createRow(sheet.getLastRowNum() + 1); Set keys = statistics.keySet(); cell = row.createCell(0); cell.setCellStyle(styles.get("total")); cell.setCellValue("合计"); - - for (Integer key : keys) - { + + for (Integer key : keys) { cell = row.createCell(key); cell.setCellStyle(styles.get("total")); cell.setCellValue(DOUBLE_FORMAT.format(statistics.get(key))); @@ -872,23 +734,20 @@ public class ExcelUtil /** * 编码文件名 */ - public String encodingFilename(String filename) - { + public String encodingFilename(String filename) { filename = UUID.randomUUID().toString() + "_" + filename + ".xlsx"; return filename; } /** * 获取下载路径 - * + * * @param filename 文件名称 */ - public String getAbsoluteFile(String filename) - { + public String getAbsoluteFile(String filename) { String downloadPath = RuoYiConfig.getDownloadPath() + filename; File desc = new File(downloadPath); - if (!desc.getParentFile().exists()) - { + if (!desc.getParentFile().exists()) { desc.getParentFile().mkdirs(); } return downloadPath; @@ -896,29 +755,23 @@ public class ExcelUtil /** * 获取bean中的属性值 - * - * @param vo 实体对象 + * + * @param vo 实体对象 * @param field 字段 * @param excel 注解 * @return 最终的属性值 * @throws Exception */ - private Object getTargetValue(T vo, Field field, Excel excel) throws Exception - { + private Object getTargetValue(T vo, Field field, Excel excel) throws Exception { Object o = field.get(vo); - if (StringUtils.isNotEmpty(excel.targetAttr())) - { + if (StringUtils.isNotEmpty(excel.targetAttr())) { String target = excel.targetAttr(); - if (target.indexOf(".") > -1) - { + if (target.indexOf(".") > -1) { String[] targets = target.split("[.]"); - for (String name : targets) - { + for (String name : targets) { o = getValue(o, name); } - } - else - { + } else { o = getValue(o, target); } } @@ -927,16 +780,14 @@ public class ExcelUtil /** * 以类的属性的get方法方法形式获取值 - * + * * @param o * @param name * @return value * @throws Exception */ - private Object getValue(Object o, String name) throws Exception - { - if (StringUtils.isNotNull(o) && StringUtils.isNotEmpty(name)) - { + private Object getValue(Object o, String name) throws Exception { + if (StringUtils.isNotNull(o) && StringUtils.isNotEmpty(name)) { Class clazz = o.getClass(); Field field = clazz.getDeclaredField(name); field.setAccessible(true); @@ -948,27 +799,22 @@ public class ExcelUtil /** * 得到所有定义字段 */ - private void createExcelField() - { + private void createExcelField() { this.fields = new ArrayList(); List tempFields = new ArrayList<>(); tempFields.addAll(Arrays.asList(clazz.getSuperclass().getDeclaredFields())); tempFields.addAll(Arrays.asList(clazz.getDeclaredFields())); - for (Field field : tempFields) - { + for (Field field : tempFields) { // 单注解 - if (field.isAnnotationPresent(Excel.class)) - { + if (field.isAnnotationPresent(Excel.class)) { putToField(field, field.getAnnotation(Excel.class)); } // 多注解 - if (field.isAnnotationPresent(Excels.class)) - { + if (field.isAnnotationPresent(Excels.class)) { Excels attrs = field.getAnnotation(Excels.class); Excel[] excels = attrs.value(); - for (Excel excel : excels) - { + for (Excel excel : excels) { putToField(field, excel); } } @@ -976,15 +822,13 @@ public class ExcelUtil this.fields = this.fields.stream().sorted(Comparator.comparing(objects -> ((Excel) objects[1]).sort())).collect(Collectors.toList()); this.maxHeight = getRowHeight(); } - + /** * 根据注解获取最大行高 */ - public short getRowHeight() - { + public short getRowHeight() { double maxHeight = 0; - for (Object[] os : this.fields) - { + for (Object[] os : this.fields) { Excel excel = (Excel) os[1]; maxHeight = maxHeight > excel.height() ? maxHeight : excel.height(); } @@ -994,98 +838,72 @@ public class ExcelUtil /** * 放到字段集合中 */ - private void putToField(Field field, Excel attr) - { - if (attr != null && (attr.type() == Type.ALL || attr.type() == type)) - { - this.fields.add(new Object[] { field, attr }); + private void putToField(Field field, Excel attr) { + if (attr != null && (attr.type() == Type.ALL || attr.type() == type)) { + this.fields.add(new Object[]{field, attr}); } } /** * 创建一个工作簿 */ - public void createWorkbook() - { + public void createWorkbook() { this.wb = new SXSSFWorkbook(500); } /** * 创建工作表 - * + * * @param sheetNo sheet数量 - * @param index 序号 + * @param index 序号 */ - public void createSheet(double sheetNo, int index) - { + public void createSheet(double sheetNo, int index) { this.sheet = wb.createSheet(); this.styles = createStyles(wb); // 设置工作表的名称. - if (sheetNo == 0) - { + if (sheetNo == 0) { wb.setSheetName(index, sheetName); - } - else - { + } else { wb.setSheetName(index, sheetName + index); } } /** * 获取单元格值 - * - * @param row 获取的行 + * + * @param row 获取的行 * @param column 获取单元格列号 * @return 单元格值 */ - public Object getCellValue(Row row, int column) - { - if (row == null) - { + public Object getCellValue(Row row, int column) { + if (row == null) { return row; } Object val = ""; - try - { + try { Cell cell = row.getCell(column); - if (StringUtils.isNotNull(cell)) - { - if (cell.getCellType() == CellType.NUMERIC || cell.getCellType() == CellType.FORMULA) - { + if (StringUtils.isNotNull(cell)) { + if (cell.getCellType() == CellType.NUMERIC || cell.getCellType() == CellType.FORMULA) { val = cell.getNumericCellValue(); - if (DateUtil.isCellDateFormatted(cell)) - { + if (DateUtil.isCellDateFormatted(cell)) { val = DateUtil.getJavaDate((Double) val); // POI Excel 日期格式转换 - } - else - { - if ((Double) val % 1 != 0) - { + } else { + if ((Double) val % 1 != 0) { val = new BigDecimal(val.toString()); - } - else - { + } else { val = new DecimalFormat("0").format(val); } } - } - else if (cell.getCellType() == CellType.STRING) - { + } else if (cell.getCellType() == CellType.STRING) { val = cell.getStringCellValue(); - } - else if (cell.getCellType() == CellType.BOOLEAN) - { + } else if (cell.getCellType() == CellType.BOOLEAN) { val = cell.getBooleanCellValue(); - } - else if (cell.getCellType() == CellType.ERROR) - { + } else if (cell.getCellType() == CellType.ERROR) { val = cell.getErrorCellValue(); } } - } - catch (Exception e) - { + } catch (Exception e) { return val; } return val; diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/reflect/ReflectUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/reflect/ReflectUtils.java index b19953e0..da362e3b 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/reflect/ReflectUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/reflect/ReflectUtils.java @@ -7,6 +7,7 @@ import java.lang.reflect.Modifier; import java.lang.reflect.ParameterizedType; import java.lang.reflect.Type; import java.util.Date; + import org.apache.commons.lang3.StringUtils; import org.apache.commons.lang3.Validate; import org.apache.poi.ss.usermodel.DateUtil; @@ -17,12 +18,11 @@ import com.ruoyi.common.utils.DateUtils; /** * 反射工具类. 提供调用getter/setter方法, 访问私有变量, 调用私有方法, 获取泛型类型Class, 被AOP过的真实类等工具函数. - * + * * @author ruoyi */ @SuppressWarnings("rawtypes") -public class ReflectUtils -{ +public class ReflectUtils { private static final String SETTER_PREFIX = "set"; private static final String GETTER_PREFIX = "get"; @@ -36,13 +36,11 @@ public class ReflectUtils * 支持多级，如：对象名.对象名.方法 */ @SuppressWarnings("unchecked") - public static E invokeGetter(Object obj, String propertyName) - { + public static E invokeGetter(Object obj, String propertyName) { Object object = obj; - for (String name : StringUtils.split(propertyName, ".")) - { + for (String name : StringUtils.split(propertyName, ".")) { String getterMethodName = GETTER_PREFIX + StringUtils.capitalize(name); - object = invokeMethod(object, getterMethodName, new Class[] {}, new Object[] {}); + object = invokeMethod(object, getterMethodName, new Class[]{}, new Object[]{}); } return (E) object; } @@ -51,21 +49,16 @@ public class ReflectUtils * 调用Setter方法, 仅匹配方法名。 * 支持多级，如：对象名.对象名.方法 */ - public static void invokeSetter(Object obj, String propertyName, E value) - { + public static void invokeSetter(Object obj, String propertyName, E value) { Object object = obj; String[] names = StringUtils.split(propertyName, "."); - for (int i = 0; i < names.length; i++) - { - if (i < names.length - 1) - { + for (int i = 0; i < names.length; i++) { + if (i < names.length - 1) { String getterMethodName = GETTER_PREFIX + StringUtils.capitalize(names[i]); - object = invokeMethod(object, getterMethodName, new Class[] {}, new Object[] {}); - } - else - { + object = invokeMethod(object, getterMethodName, new Class[]{}, new Object[]{}); + } else { String setterMethodName = SETTER_PREFIX + StringUtils.capitalize(names[i]); - invokeMethodByName(object, setterMethodName, new Object[] { value }); + invokeMethodByName(object, setterMethodName, new Object[]{value}); } } } @@ -74,21 +67,16 @@ public class ReflectUtils * 直接读取对象属性值, 无视private/protected修饰符, 不经过getter函数. */ @SuppressWarnings("unchecked") - public static E getFieldValue(final Object obj, final String fieldName) - { + public static E getFieldValue(final Object obj, final String fieldName) { Field field = getAccessibleField(obj, fieldName); - if (field == null) - { + if (field == null) { logger.debug("在 [" + obj.getClass() + "] 中，没有找到 [" + fieldName + "] 字段 "); return null; } E result = null; - try - { + try { result = (E) field.get(obj); - } - catch (IllegalAccessException e) - { + } catch (IllegalAccessException e) { logger.error("不可能抛出的异常{}", e.getMessage()); } return result; @@ -97,21 +85,16 @@ public class ReflectUtils /** * 直接设置对象属性值, 无视private/protected修饰符, 不经过setter函数. */ - public static void setFieldValue(final Object obj, final String fieldName, final E value) - { + public static void setFieldValue(final Object obj, final String fieldName, final E value) { Field field = getAccessibleField(obj, fieldName); - if (field == null) - { + if (field == null) { // throw new IllegalArgumentException("在 [" + obj.getClass() + "] 中，没有找到 [" + fieldName + "] 字段 "); logger.debug("在 [" + obj.getClass() + "] 中，没有找到 [" + fieldName + "] 字段 "); return; } - try - { + try { field.set(obj, value); - } - catch (IllegalAccessException e) - { + } catch (IllegalAccessException e) { logger.error("不可能抛出的异常: {}", e.getMessage()); } } @@ -123,24 +106,18 @@ public class ReflectUtils */ @SuppressWarnings("unchecked") public static E invokeMethod(final Object obj, final String methodName, final Class[] parameterTypes, - final Object[] args) - { - if (obj == null || methodName == null) - { + final Object[] args) { + if (obj == null || methodName == null) { return null; } Method method = getAccessibleMethod(obj, methodName, parameterTypes); - if (method == null) - { + if (method == null) { logger.debug("在 [" + obj.getClass() + "] 中，没有找到 [" + methodName + "] 方法 "); return null; } - try - { + try { return (E) method.invoke(obj, args); - } - catch (Exception e) - { + } catch (Exception e) { String msg = "method: " + method + ", obj: " + obj + ", args: " + args + ""; throw convertReflectionExceptionToUnchecked(msg, e); } @@ -152,68 +129,44 @@ public class ReflectUtils * 只匹配函数名，如果有多个同名函数调用第一个。 */ @SuppressWarnings("unchecked") - public static E invokeMethodByName(final Object obj, final String methodName, final Object[] args) - { + public static E invokeMethodByName(final Object obj, final String methodName, final Object[] args) { Method method = getAccessibleMethodByName(obj, methodName, args.length); - if (method == null) - { + if (method == null) { // 如果为空不报错，直接返回空。 logger.debug("在 [" + obj.getClass() + "] 中，没有找到 [" + methodName + "] 方法 "); return null; } - try - { + try { // 类型转换（将参数数据类型转换为目标方法参数类型） Class[] cs = method.getParameterTypes(); - for (int i = 0; i < cs.length; i++) - { - if (args[i] != null && !args[i].getClass().equals(cs[i])) - { - if (cs[i] == String.class) - { + for (int i = 0; i < cs.length; i++) { + if (args[i] != null && !args[i].getClass().equals(cs[i])) { + if (cs[i] == String.class) { args[i] = Convert.toStr(args[i]); - if (StringUtils.endsWith((String) args[i], ".0")) - { + if (StringUtils.endsWith((String) args[i], ".0")) { args[i] = StringUtils.substringBefore((String) args[i], ".0"); } - } - else if (cs[i] == Integer.class) - { + } else if (cs[i] == Integer.class) { args[i] = Convert.toInt(args[i]); - } - else if (cs[i] == Long.class) - { + } else if (cs[i] == Long.class) { args[i] = Convert.toLong(args[i]); - } - else if (cs[i] == Double.class) - { + } else if (cs[i] == Double.class) { args[i] = Convert.toDouble(args[i]); - } - else if (cs[i] == Float.class) - { + } else if (cs[i] == Float.class) { args[i] = Convert.toFloat(args[i]); - } - else if (cs[i] == Date.class) - { - if (args[i] instanceof String) - { + } else if (cs[i] == Date.class) { + if (args[i] instanceof String) { args[i] = DateUtils.parseDate(args[i]); - } - else - { + } else { args[i] = DateUtil.getJavaDate((Double) args[i]); } - } - else if (cs[i] == boolean.class || cs[i] == Boolean.class) - { + } else if (cs[i] == boolean.class || cs[i] == Boolean.class) { args[i] = Convert.toBool(args[i]); } } } return (E) method.invoke(obj, args); - } - catch (Exception e) - { + } catch (Exception e) { String msg = "method: " + method + ", obj: " + obj + ", args: " + args + ""; throw convertReflectionExceptionToUnchecked(msg, e); } @@ -223,24 +176,18 @@ public class ReflectUtils * 循环向上转型, 获取对象的DeclaredField, 并强制设置为可访问. * 如向上转型到Object仍无法找到, 返回null. */ - public static Field getAccessibleField(final Object obj, final String fieldName) - { + public static Field getAccessibleField(final Object obj, final String fieldName) { // 为空不报错。直接返回 null - if (obj == null) - { + if (obj == null) { return null; } Validate.notBlank(fieldName, "fieldName can't be blank"); - for (Class superClass = obj.getClass(); superClass != Object.class; superClass = superClass.getSuperclass()) - { - try - { + for (Class superClass = obj.getClass(); superClass != Object.class; superClass = superClass.getSuperclass()) { + try { Field field = superClass.getDeclaredField(fieldName); makeAccessible(field); return field; - } - catch (NoSuchFieldException e) - { + } catch (NoSuchFieldException e) { continue; } } @@ -254,24 +201,18 @@ public class ReflectUtils * 用于方法需要被多次调用的情况. 先使用本函数先取得Method,然后调用Method.invoke(Object obj, Object... args) */ public static Method getAccessibleMethod(final Object obj, final String methodName, - final Class... parameterTypes) - { + final Class... parameterTypes) { // 为空不报错。直接返回 null - if (obj == null) - { + if (obj == null) { return null; } Validate.notBlank(methodName, "methodName can't be blank"); - for (Class searchType = obj.getClass(); searchType != Object.class; searchType = searchType.getSuperclass()) - { - try - { + for (Class searchType = obj.getClass(); searchType != Object.class; searchType = searchType.getSuperclass()) { + try { Method method = searchType.getDeclaredMethod(methodName, parameterTypes); makeAccessible(method); return method; - } - catch (NoSuchMethodException e) - { + } catch (NoSuchMethodException e) { continue; } } @@ -284,21 +225,16 @@ public class ReflectUtils * 只匹配函数名。 * 用于方法需要被多次调用的情况. 先使用本函数先取得Method,然后调用Method.invoke(Object obj, Object... args) */ - public static Method getAccessibleMethodByName(final Object obj, final String methodName, int argsNum) - { + public static Method getAccessibleMethodByName(final Object obj, final String methodName, int argsNum) { // 为空不报错。直接返回 null - if (obj == null) - { + if (obj == null) { return null; } Validate.notBlank(methodName, "methodName can't be blank"); - for (Class searchType = obj.getClass(); searchType != Object.class; searchType = searchType.getSuperclass()) - { + for (Class searchType = obj.getClass(); searchType != Object.class; searchType = searchType.getSuperclass()) { Method[] methods = searchType.getDeclaredMethods(); - for (Method method : methods) - { - if (method.getName().equals(methodName) && method.getParameterTypes().length == argsNum) - { + for (Method method : methods) { + if (method.getName().equals(methodName) && method.getParameterTypes().length == argsNum) { makeAccessible(method); return method; } @@ -310,11 +246,9 @@ public class ReflectUtils /** * 改变private/protected的方法为public，尽量不调用实际改动的语句，避免JDK的SecurityManager抱怨。 */ - public static void makeAccessible(Method method) - { + public static void makeAccessible(Method method) { if ((!Modifier.isPublic(method.getModifiers()) || !Modifier.isPublic(method.getDeclaringClass().getModifiers())) - && !method.isAccessible()) - { + && !method.isAccessible()) { method.setAccessible(true); } } @@ -322,11 +256,9 @@ public class ReflectUtils /** * 改变private/protected的成员变量为public，尽量不调用实际改动的语句，避免JDK的SecurityManager抱怨。 */ - public static void makeAccessible(Field field) - { + public static void makeAccessible(Field field) { if ((!Modifier.isPublic(field.getModifiers()) || !Modifier.isPublic(field.getDeclaringClass().getModifiers()) - || Modifier.isFinal(field.getModifiers())) && !field.isAccessible()) - { + || Modifier.isFinal(field.getModifiers())) && !field.isAccessible()) { field.setAccessible(true); } } @@ -336,8 +268,7 @@ public class ReflectUtils * 如无法找到, 返回Object.class. */ @SuppressWarnings("unchecked") - public static Class getClassGenricType(final Class clazz) - { + public static Class getClassGenricType(final Class clazz) { return getClassGenricType(clazz, 0); } @@ -345,26 +276,22 @@ public class ReflectUtils * 通过反射, 获得Class定义中声明的父类的泛型参数的类型. * 如无法找到, 返回Object.class. */ - public static Class getClassGenricType(final Class clazz, final int index) - { + public static Class getClassGenricType(final Class clazz, final int index) { Type genType = clazz.getGenericSuperclass(); - if (!(genType instanceof ParameterizedType)) - { + if (!(genType instanceof ParameterizedType)) { logger.debug(clazz.getSimpleName() + "'s superclass not ParameterizedType"); return Object.class; } Type[] params = ((ParameterizedType) genType).getActualTypeArguments(); - if (index >= params.length || index < 0) - { + if (index >= params.length || index < 0) { logger.debug("Index: " + index + ", Size of " + clazz.getSimpleName() + "'s Parameterized Type: " + params.length); return Object.class; } - if (!(params[index] instanceof Class)) - { + if (!(params[index] instanceof Class)) { logger.debug(clazz.getSimpleName() + " not set the actual class on superclass generic parameter"); return Object.class; } @@ -372,18 +299,14 @@ public class ReflectUtils return (Class) params[index]; } - public static Class getUserClass(Object instance) - { - if (instance == null) - { + public static Class getUserClass(Object instance) { + if (instance == null) { throw new RuntimeException("Instance must not be null"); } Class clazz = instance.getClass(); - if (clazz != null && clazz.getName().contains(CGLIB_CLASS_SEPARATOR)) - { + if (clazz != null && clazz.getName().contains(CGLIB_CLASS_SEPARATOR)) { Class superClass = clazz.getSuperclass(); - if (superClass != null && !Object.class.equals(superClass)) - { + if (superClass != null && !Object.class.equals(superClass)) { return superClass; } } @@ -394,15 +317,11 @@ public class ReflectUtils /** * 将反射时的checked exception转换为unchecked exception. */ - public static RuntimeException convertReflectionExceptionToUnchecked(String msg, Exception e) - { + public static RuntimeException convertReflectionExceptionToUnchecked(String msg, Exception e) { if (e instanceof IllegalAccessException || e instanceof IllegalArgumentException - || e instanceof NoSuchMethodException) - { + || e instanceof NoSuchMethodException) { return new IllegalArgumentException(msg, e); - } - else if (e instanceof InvocationTargetException) - { + } else if (e instanceof InvocationTargetException) { return new RuntimeException(msg, ((InvocationTargetException) e).getTargetException()); } return new RuntimeException(msg, e); diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Base64.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Base64.java index ca1cd924..55659bcf 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Base64.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Base64.java @@ -2,75 +2,63 @@ package com.ruoyi.common.utils.sign; /** * Base64工具类 - * + * * @author ruoyi */ -public final class Base64 -{ - static private final int BASELENGTH = 128; - static private final int LOOKUPLENGTH = 64; - static private final int TWENTYFOURBITGROUP = 24; - static private final int EIGHTBIT = 8; - static private final int SIXTEENBIT = 16; - static private final int FOURBYTE = 4; - static private final int SIGN = -128; - static private final char PAD = '='; - static final private byte[] base64Alphabet = new byte[BASELENGTH]; - static final private char[] lookUpBase64Alphabet = new char[LOOKUPLENGTH]; +public final class Base64 { + static private final int BASELENGTH = 128; + static private final int LOOKUPLENGTH = 64; + static private final int TWENTYFOURBITGROUP = 24; + static private final int EIGHTBIT = 8; + static private final int SIXTEENBIT = 16; + static private final int FOURBYTE = 4; + static private final int SIGN = -128; + static private final char PAD = '='; + static final private byte[] base64Alphabet = new byte[BASELENGTH]; + static final private char[] lookUpBase64Alphabet = new char[LOOKUPLENGTH]; - static - { - for (int i = 0; i < BASELENGTH; ++i) - { + static { + for (int i = 0; i < BASELENGTH; ++i) { base64Alphabet[i] = -1; } - for (int i = 'Z'; i >= 'A'; i--) - { + for (int i = 'Z'; i >= 'A'; i--) { base64Alphabet[i] = (byte) (i - 'A'); } - for (int i = 'z'; i >= 'a'; i--) - { + for (int i = 'z'; i >= 'a'; i--) { base64Alphabet[i] = (byte) (i - 'a' + 26); } - for (int i = '9'; i >= '0'; i--) - { + for (int i = '9'; i >= '0'; i--) { base64Alphabet[i] = (byte) (i - '0' + 52); } base64Alphabet['+'] = 62; base64Alphabet['/'] = 63; - for (int i = 0; i <= 25; i++) - { + for (int i = 0; i <= 25; i++) { lookUpBase64Alphabet[i] = (char) ('A' + i); } - for (int i = 26, j = 0; i <= 51; i++, j++) - { + for (int i = 26, j = 0; i <= 51; i++, j++) { lookUpBase64Alphabet[i] = (char) ('a' + j); } - for (int i = 52, j = 0; i <= 61; i++, j++) - { + for (int i = 52, j = 0; i <= 61; i++, j++) { lookUpBase64Alphabet[i] = (char) ('0' + j); } lookUpBase64Alphabet[62] = (char) '+'; lookUpBase64Alphabet[63] = (char) '/'; } - private static boolean isWhiteSpace(char octect) - { + private static boolean isWhiteSpace(char octect) { return (octect == 0x20 || octect == 0xd || octect == 0xa || octect == 0x9); } - private static boolean isPad(char octect) - { + private static boolean isPad(char octect) { return (octect == PAD); } - private static boolean isData(char octect) - { + private static boolean isData(char octect) { return (octect < BASELENGTH && base64Alphabet[octect] != -1); } @@ -80,16 +68,13 @@ public final class Base64 * @param binaryData Array containing binaryData * @return Encoded Base64 array */ - public static String encode(byte[] binaryData) - { - if (binaryData == null) - { + public static String encode(byte[] binaryData) { + if (binaryData == null) { return null; } int lengthDataBits = binaryData.length * EIGHTBIT; - if (lengthDataBits == 0) - { + if (lengthDataBits == 0) { return ""; } @@ -105,8 +90,7 @@ public final class Base64 int encodedIndex = 0; int dataIndex = 0; - for (int i = 0; i < numberTriplets; i++) - { + for (int i = 0; i < numberTriplets; i++) { b1 = binaryData[dataIndex++]; b2 = binaryData[dataIndex++]; b3 = binaryData[dataIndex++]; @@ -125,8 +109,7 @@ public final class Base64 } // form integral number of 6-bit groups - if (fewerThan24bits == EIGHTBIT) - { + if (fewerThan24bits == EIGHTBIT) { b1 = binaryData[dataIndex]; k = (byte) (b1 & 0x03); byte val1 = ((b1 & SIGN) == 0) ? (byte) (b1 >> 2) : (byte) ((b1) >> 2 ^ 0xc0); @@ -134,9 +117,7 @@ public final class Base64 encodedData[encodedIndex++] = lookUpBase64Alphabet[k << 4]; encodedData[encodedIndex++] = PAD; encodedData[encodedIndex++] = PAD; - } - else if (fewerThan24bits == SIXTEENBIT) - { + } else if (fewerThan24bits == SIXTEENBIT) { b1 = binaryData[dataIndex]; b2 = binaryData[dataIndex + 1]; l = (byte) (b2 & 0x0f); @@ -159,10 +140,8 @@ public final class Base64 * @param encoded string containing Base64 data * @return Array containind decoded data. */ - public static byte[] decode(String encoded) - { - if (encoded == null) - { + public static byte[] decode(String encoded) { + if (encoded == null) { return null; } @@ -170,15 +149,13 @@ public final class Base64 // remove white spaces int len = removeWhiteSpace(base64Data); - if (len % FOURBYTE != 0) - { + if (len % FOURBYTE != 0) { return null;// should be divisible by four } int numberQuadruple = (len / FOURBYTE); - if (numberQuadruple == 0) - { + if (numberQuadruple == 0) { return new byte[0]; } @@ -191,12 +168,10 @@ public final class Base64 int dataIndex = 0; decodedData = new byte[(numberQuadruple) * 3]; - for (; i < numberQuadruple - 1; i++) - { + for (; i < numberQuadruple - 1; i++) { if (!isData((d1 = base64Data[dataIndex++])) || !isData((d2 = base64Data[dataIndex++])) - || !isData((d3 = base64Data[dataIndex++])) || !isData((d4 = base64Data[dataIndex++]))) - { + || !isData((d3 = base64Data[dataIndex++])) || !isData((d4 = base64Data[dataIndex++]))) { return null; } // if found "no data" just return null @@ -210,8 +185,7 @@ public final class Base64 decodedData[encodedIndex++] = (byte) (b3 << 6 | b4); } - if (!isData((d1 = base64Data[dataIndex++])) || !isData((d2 = base64Data[dataIndex++]))) - { + if (!isData((d1 = base64Data[dataIndex++])) || !isData((d2 = base64Data[dataIndex++]))) { return null;// if found "no data" just return null } @@ -220,10 +194,8 @@ public final class Base64 d3 = base64Data[dataIndex++]; d4 = base64Data[dataIndex++]; - if (!isData((d3)) || !isData((d4))) - {// Check if they are PAD characters - if (isPad(d3) && isPad(d4)) - { + if (!isData((d3)) || !isData((d4))) {// Check if they are PAD characters + if (isPad(d3) && isPad(d4)) { if ((b2 & 0xf) != 0)// last 4 bits should be zero { return null; @@ -232,9 +204,7 @@ public final class Base64 System.arraycopy(decodedData, 0, tmp, 0, i * 3); tmp[encodedIndex] = (byte) (b1 << 2 | b2 >> 4); return tmp; - } - else if (!isPad(d3) && isPad(d4)) - { + } else if (!isPad(d3) && isPad(d4)) { b3 = base64Alphabet[d3]; if ((b3 & 0x3) != 0)// last 2 bits should be zero { @@ -245,14 +215,10 @@ public final class Base64 tmp[encodedIndex++] = (byte) (b1 << 2 | b2 >> 4); tmp[encodedIndex] = (byte) (((b2 & 0xf) << 4) | ((b3 >> 2) & 0xf)); return tmp; - } - else - { + } else { return null; } - } - else - { // No PAD e.g 3cQl + } else { // No PAD e.g 3cQl b3 = base64Alphabet[d3]; b4 = base64Alphabet[d4]; decodedData[encodedIndex++] = (byte) (b1 << 2 | b2 >> 4); @@ -269,20 +235,16 @@ public final class Base64 * @param data the byte array of base64 data (with WS) * @return the new length */ - private static int removeWhiteSpace(char[] data) - { - if (data == null) - { + private static int removeWhiteSpace(char[] data) { + if (data == null) { return 0; } // count characters that's not whitespace int newSize = 0; int len = data.length; - for (int i = 0; i < len; i++) - { - if (!isWhiteSpace(data[i])) - { + for (int i = 0; i < len; i++) { + if (!isWhiteSpace(data[i])) { data[newSize++] = data[i]; } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Md5Utils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Md5Utils.java index de77ee82..70bdcb0d 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Md5Utils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sign/Md5Utils.java @@ -1,49 +1,41 @@ package com.ruoyi.common.utils.sign; import java.security.MessageDigest; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; /** * Md5加密方法 - * + * * @author ruoyi */ -public class Md5Utils -{ +public class Md5Utils { private static final Logger log = LoggerFactory.getLogger(Md5Utils.class); - private static byte[] md5(String s) - { + private static byte[] md5(String s) { MessageDigest algorithm; - try - { + try { algorithm = MessageDigest.getInstance("MD5"); algorithm.reset(); algorithm.update(s.getBytes("UTF-8")); byte[] messageDigest = algorithm.digest(); return messageDigest; - } - catch (Exception e) - { + } catch (Exception e) { log.error("MD5 Error...", e); } return null; } - private static final String toHex(byte hash[]) - { - if (hash == null) - { + private static final String toHex(byte hash[]) { + if (hash == null) { return null; } StringBuffer buf = new StringBuffer(hash.length * 2); int i; - for (i = 0; i < hash.length; i++) - { - if ((hash[i] & 0xff) < 0x10) - { + for (i = 0; i < hash.length; i++) { + if ((hash[i] & 0xff) < 0x10) { buf.append("0"); } buf.append(Long.toString(hash[i] & 0xff, 16)); @@ -51,14 +43,10 @@ public class Md5Utils return buf.toString(); } - public static String hash(String s) - { - try - { + public static String hash(String s) { + try { return new String(toHex(md5(s)).getBytes("UTF-8"), "UTF-8"); - } - catch (Exception e) - { + } catch (Exception e) { log.error("not supported charset...{}", e); return s; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/spring/SpringUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/spring/SpringUtils.java index 9993b98f..8fd4951b 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/spring/SpringUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/spring/SpringUtils.java @@ -12,26 +12,25 @@ import com.ruoyi.common.utils.StringUtils; /** * spring工具类 方便在非spring管理环境中获取bean - * + * * @author ruoyi */ @Component -public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationContextAware -{ - /** Spring应用上下文环境 */ +public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationContextAware { + /** + * Spring应用上下文环境 + */ private static ConfigurableListableBeanFactory beanFactory; private static ApplicationContext applicationContext; @Override - public void postProcessBeanFactory(ConfigurableListableBeanFactory beanFactory) throws BeansException - { + public void postProcessBeanFactory(ConfigurableListableBeanFactory beanFactory) throws BeansException { SpringUtils.beanFactory = beanFactory; } @Override - public void setApplicationContext(ApplicationContext applicationContext) throws BeansException - { + public void setApplicationContext(ApplicationContext applicationContext) throws BeansException { SpringUtils.applicationContext = applicationContext; } @@ -41,11 +40,9 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * @param name * @return Object 一个以所给名字注册的bean的实例 * @throws org.springframework.beans.BeansException - * */ @SuppressWarnings("unchecked") - public static T getBean(String name) throws BeansException - { + public static T getBean(String name) throws BeansException { return (T) beanFactory.getBean(name); } @@ -55,10 +52,8 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * @param clz * @return * @throws org.springframework.beans.BeansException - * */ - public static T getBean(Class clz) throws BeansException - { + public static T getBean(Class clz) throws BeansException { T result = (T) beanFactory.getBean(clz); return result; } @@ -69,8 +64,7 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * @param name * @return boolean */ - public static boolean containsBean(String name) - { + public static boolean containsBean(String name) { return beanFactory.containsBean(name); } @@ -80,10 +74,8 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * @param name * @return boolean * @throws org.springframework.beans.factory.NoSuchBeanDefinitionException - * */ - public static boolean isSingleton(String name) throws NoSuchBeanDefinitionException - { + public static boolean isSingleton(String name) throws NoSuchBeanDefinitionException { return beanFactory.isSingleton(name); } @@ -91,10 +83,8 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * @param name * @return Class 注册对象的类型 * @throws org.springframework.beans.factory.NoSuchBeanDefinitionException - * */ - public static Class getType(String name) throws NoSuchBeanDefinitionException - { + public static Class getType(String name) throws NoSuchBeanDefinitionException { return beanFactory.getType(name); } @@ -104,22 +94,19 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * @param name * @return * @throws org.springframework.beans.factory.NoSuchBeanDefinitionException - * */ - public static String[] getAliases(String name) throws NoSuchBeanDefinitionException - { + public static String[] getAliases(String name) throws NoSuchBeanDefinitionException { return beanFactory.getAliases(name); } /** * 获取aop代理对象 - * + * * @param invoker * @return */ @SuppressWarnings("unchecked") - public static T getAopProxy(T invoker) - { + public static T getAopProxy(T invoker) { return (T) AopContext.currentProxy(); } @@ -128,8 +115,7 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * * @return 当前的环境配置 */ - public static String[] getActiveProfiles() - { + public static String[] getActiveProfiles() { return applicationContext.getEnvironment().getActiveProfiles(); } @@ -138,8 +124,7 @@ public final class SpringUtils implements BeanFactoryPostProcessor, ApplicationC * * @return 当前的环境配置 */ - public static String getActiveProfile() - { + public static String getActiveProfile() { final String[] activeProfiles = getActiveProfiles(); return StringUtils.isNotEmpty(activeProfiles) ? activeProfiles[0] : null; } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sql/SqlUtil.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sql/SqlUtil.java index 0b06dd96..2e6d36a5 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sql/SqlUtil.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/sql/SqlUtil.java @@ -5,11 +5,10 @@ import com.ruoyi.common.utils.StringUtils; /** * sql操作工具类 - * + * * @author ruoyi */ -public class SqlUtil -{ +public class SqlUtil { /** * 仅支持字母、数字、下划线、空格、逗号、小数点（支持多个字段排序） */ @@ -18,10 +17,8 @@ public class SqlUtil /** * 检查字符，防止注入绕过 */ - public static String escapeOrderBySql(String value) - { - if (StringUtils.isNotEmpty(value) && !isValidOrderBySql(value)) - { + public static String escapeOrderBySql(String value) { + if (StringUtils.isNotEmpty(value) && !isValidOrderBySql(value)) { throw new BaseException("参数不符合规范，不能进行查询"); } return value; @@ -30,8 +27,7 @@ public class SqlUtil /** * 验证 order by 语法是否符合规范 */ - public static boolean isValidOrderBySql(String value) - { + public static boolean isValidOrderBySql(String value) { return value.matches(SQL_PATTERN); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/IdUtils.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/IdUtils.java index 0d14f57d..11ef56e4 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/IdUtils.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/IdUtils.java @@ -4,48 +4,43 @@ import com.ruoyi.common.utils.uuid.UUID; /** * ID生成器工具类 - * + * * @author ruoyi */ -public class IdUtils -{ +public class IdUtils { /** * 获取随机UUID - * + * * @return 随机UUID */ - public static String randomUUID() - { + public static String randomUUID() { return UUID.randomUUID().toString(); } /** * 简化的UUID，去掉了横线 - * + * * @return 简化的UUID，去掉了横线 */ - public static String simpleUUID() - { + public static String simpleUUID() { return UUID.randomUUID().toString(true); } /** * 获取随机UUID，使用性能更好的ThreadLocalRandom生成UUID - * + * * @return 随机UUID */ - public static String fastUUID() - { + public static String fastUUID() { return UUID.fastUUID().toString(); } /** * 简化的UUID，去掉了横线，使用性能更好的ThreadLocalRandom生成UUID - * + * * @return 简化的UUID，去掉了横线 */ - public static String fastSimpleUUID() - { + public static String fastSimpleUUID() { return UUID.fastUUID().toString(true); } } diff --git a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/UUID.java b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/UUID.java index 062d6336..d87e4988 100644 --- a/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/UUID.java +++ b/spring-boot/ruoyi-common/src/main/java/com/ruoyi/common/utils/uuid/UUID.java @@ -5,6 +5,7 @@ import java.security.NoSuchAlgorithmException; import java.security.SecureRandom; import java.util.Random; import java.util.concurrent.ThreadLocalRandom; + import com.ruoyi.common.exception.UtilException; /** @@ -12,41 +13,39 @@ import com.ruoyi.common.exception.UtilException; * * @author ruoyi */ -public final class UUID implements java.io.Serializable, Comparable -{ +public final class UUID implements java.io.Serializable, Comparable { private static final long serialVersionUID = -1185015143654744140L; /** * SecureRandom 的单例 - * */ - private static class Holder - { + private static class Holder { static final SecureRandom numberGenerator = getSecureRandom(); } - /** 此UUID的最高64有效位 */ + /** + * 此UUID的最高64有效位 + */ private final long mostSigBits; - /** 此UUID的最低64有效位 */ + /** + * 此UUID的最低64有效位 + */ private final long leastSigBits; /** * 私有构造 - * + * * @param data 数据 */ - private UUID(byte[] data) - { + private UUID(byte[] data) { long msb = 0; long lsb = 0; assert data.length == 16 : "data must be 16 bytes in length"; - for (int i = 0; i < 8; i++) - { + for (int i = 0; i < 8; i++) { msb = (msb << 8) | (data[i] & 0xff); } - for (int i = 8; i < 16; i++) - { + for (int i = 8; i < 16; i++) { lsb = (lsb << 8) | (data[i] & 0xff); } this.mostSigBits = msb; @@ -56,43 +55,39 @@ public final class UUID implements java.io.Serializable, Comparable /** * 使用指定的数据构造新的 UUID。 * - * @param mostSigBits 用于 {@code UUID} 的最高有效 64 位 + * @param mostSigBits 用于 {@code UUID} 的最高有效 64 位 * @param leastSigBits 用于 {@code UUID} 的最低有效 64 位 */ - public UUID(long mostSigBits, long leastSigBits) - { + public UUID(long mostSigBits, long leastSigBits) { this.mostSigBits = mostSigBits; this.leastSigBits = leastSigBits; } /** * 获取类型 4（伪随机生成的）UUID 的静态工厂。 使用加密的本地线程伪随机数生成器生成该 UUID。 - * + * * @return 随机生成的 {@code UUID} */ - public static UUID fastUUID() - { + public static UUID fastUUID() { return randomUUID(false); } /** * 获取类型 4（伪随机生成的）UUID 的静态工厂。 使用加密的强伪随机数生成器生成该 UUID。 - * + * * @return 随机生成的 {@code UUID} */ - public static UUID randomUUID() - { + public static UUID randomUUID() { return randomUUID(true); } /** * 获取类型 4（伪随机生成的）UUID 的静态工厂。 使用加密的强伪随机数生成器生成该 UUID。 - * + * * @param isSecure 是否使用{@link SecureRandom}如果是可以获得更安全的随机码，否则可以得到更好的性能 * @return 随机生成的 {@code UUID} */ - public static UUID randomUUID(boolean isSecure) - { + public static UUID randomUUID(boolean isSecure) { final Random ng = isSecure ? Holder.numberGenerator : getRandom(); byte[] randomBytes = new byte[16]; @@ -108,18 +103,13 @@ public final class UUID implements java.io.Serializable, Comparable * 根据指定的字节数组获取类型 3（基于名称的）UUID 的静态工厂。 * * @param name 用于构造 UUID 的字节数组。 - * * @return 根据指定数组生成的 {@code UUID} */ - public static UUID nameUUIDFromBytes(byte[] name) - { + public static UUID nameUUIDFromBytes(byte[] name) { MessageDigest md; - try - { + try { md = MessageDigest.getInstance("MD5"); - } - catch (NoSuchAlgorithmException nsae) - { + } catch (NoSuchAlgorithmException nsae) { throw new InternalError("MD5 not supported"); } byte[] md5Bytes = md.digest(name); @@ -136,17 +126,13 @@ public final class UUID implements java.io.Serializable, Comparable * @param name 指定 {@code UUID} 字符串 * @return 具有指定值的 {@code UUID} * @throws IllegalArgumentException 如果 name 与 {@link #toString} 中描述的字符串表示形式不符抛出此异常 - * */ - public static UUID fromString(String name) - { + public static UUID fromString(String name) { String[] components = name.split("-"); - if (components.length != 5) - { + if (components.length != 5) { throw new IllegalArgumentException("Invalid UUID string: " + name); } - for (int i = 0; i < 5; i++) - { + for (int i = 0; i < 5; i++) { components[i] = "0x" + components[i]; } @@ -168,8 +154,7 @@ public final class UUID implements java.io.Serializable, Comparable * * @return 此 UUID 的 128 位值中的最低有效 64 位。 */ - public long getLeastSignificantBits() - { + public long getLeastSignificantBits() { return leastSigBits; } @@ -178,8 +163,7 @@ public final class UUID implements java.io.Serializable, Comparable * * @return 此 UUID 的 128 位值中最高有效 64 位。 */ - public long getMostSignificantBits() - { + public long getMostSignificantBits() { return mostSigBits; } @@ -196,8 +180,7 @@ public final class UUID implements java.io.Serializable, Comparable * * @return 此 {@code UUID} 的版本号 */ - public int version() - { + public int version() { // Version is bits masked by 0x000000000000F000 in MS long return (int) ((mostSigBits >> 12) & 0x0f); } @@ -215,8 +198,7 @@ public final class UUID implements java.io.Serializable, Comparable * * @return 此 {@code UUID} 相关联的变体号 */ - public int variant() - { + public int variant() { // This field is composed of a varying number of bits. // 0 - - Reserved for NCS backward compatibility // 1 0 - The IETF aka Leach-Salz variant (used by this class) @@ -238,8 +220,7 @@ public final class UUID implements java.io.Serializable, Comparable * * @throws UnsupportedOperationException 如果此 {@code UUID} 不是 version 为 1 的 UUID。 */ - public long timestamp() throws UnsupportedOperationException - { + public long timestamp() throws UnsupportedOperationException { checkTimeBase(); return (mostSigBits & 0x0FFFL) << 48// | ((mostSigBits >> 16) & 0x0FFFFL) << 32// @@ -256,11 +237,9 @@ public final class UUID implements java.io.Serializable, Comparable * UnsupportedOperationException。 * * @return 此 {@code UUID} 的时钟序列 - * * @throws UnsupportedOperationException 如果此 UUID 的 version 不为 1 */ - public int clockSequence() throws UnsupportedOperationException - { + public int clockSequence() throws UnsupportedOperationException { checkTimeBase(); return (int) ((leastSigBits & 0x3FFF000000000000L) >>> 48); } @@ -275,11 +254,9 @@ public final class UUID implements java.io.Serializable, Comparable * 如果此 UUID 不是基于时间的 UUID，则此方法抛出 UnsupportedOperationException。 * * @return 此 {@code UUID} 的节点值 - * * @throws UnsupportedOperationException 如果此 UUID 的 version 不为 1 */ - public long node() throws UnsupportedOperationException - { + public long node() throws UnsupportedOperationException { checkTimeBase(); return leastSigBits & 0x0000FFFFFFFFFFFFL; } @@ -289,7 +266,7 @@ public final class UUID implements java.io.Serializable, Comparable * *

* UUID 的字符串表示形式由此 BNF 描述： - * + * * 

      * {@code
      * UUID                   = ----
@@ -302,15 +279,14 @@ public final class UUID implements java.io.Serializable, Comparable
      * hexDigit               = [0-9a-fA-F]
      * }
      *
- * + * * * * @return 此{@code UUID} 的字符串表现形式 * @see #toString(boolean) */ @Override - public String toString() - { + public String toString() { return toString(false); } @@ -319,7 +295,7 @@ public final class UUID implements java.io.Serializable, Comparable * *

* UUID 的字符串表示形式由此 BNF 描述： - * + * * 

      * {@code
      * UUID                   = ----
@@ -332,37 +308,32 @@ public final class UUID implements java.io.Serializable, Comparable
      * hexDigit               = [0-9a-fA-F]
      * }
      *
- * + * * * * @param isSimple 是否简单模式，简单模式为不带'-'的UUID字符串 * @return 此{@code UUID} 的字符串表现形式 */ - public String toString(boolean isSimple) - { + public String toString(boolean isSimple) { final StringBuilder builder = new StringBuilder(isSimple ? 32 : 36); // time_low builder.append(digits(mostSigBits >> 32, 8)); - if (false == isSimple) - { + if (false == isSimple) { builder.append('-'); } // time_mid builder.append(digits(mostSigBits >> 16, 4)); - if (false == isSimple) - { + if (false == isSimple) { builder.append('-'); } // time_high_and_version builder.append(digits(mostSigBits, 4)); - if (false == isSimple) - { + if (false == isSimple) { builder.append('-'); } // variant_and_sequence builder.append(digits(leastSigBits >> 48, 4)); - if (false == isSimple) - { + if (false == isSimple) { builder.append('-'); } // node @@ -377,8 +348,7 @@ public final class UUID implements java.io.Serializable, Comparable * @return UUID 的哈希码值。 */ @Override - public int hashCode() - { + public int hashCode() { long hilo = mostSigBits ^ leastSigBits; return ((int) (hilo >> 32)) ^ (int) hilo; } @@ -389,14 +359,11 @@ public final class UUID implements java.io.Serializable, Comparable * 当且仅当参数不为 {@code null}、而是一个 UUID 对象、具有与此 UUID 相同的 varriant、包含相同的值（每一位均相同）时，结果才为 {@code true}。 * * @param obj 要与之比较的对象 - * * @return 如果对象相同，则返回 {@code true}；否则返回 {@code false} */ @Override - public boolean equals(Object obj) - { - if ((null == obj) || (obj.getClass() != UUID.class)) - { + public boolean equals(Object obj) { + if ((null == obj) || (obj.getClass() != UUID.class)) { return false; } UUID id = (UUID) obj; @@ -412,13 +379,10 @@ public final class UUID implements java.io.Serializable, Comparable * 如果两个 UUID 不同，且第一个 UUID 的最高有效字段大于第二个 UUID 的对应字段，则第一个 UUID 大于第二个 UUID。 * * @param val 与此 UUID 比较的 UUID - * * @return 在此 UUID 小于、等于或大于 val 时，分别返回 -1、0 或 1。 - * */ @Override - public int compareTo(UUID val) - { + public int compareTo(UUID val) { // The ordering is intentionally set up so that the UUIDs // can simply be numerically compared as two numbers return (this.mostSigBits < val.mostSigBits ? -1 : // @@ -430,15 +394,15 @@ public final class UUID implements java.io.Serializable, Comparable // ------------------------------------------------------------------------------------------------------------------- // Private method start + /** * 返回指定数字对应的hex值 - * - * @param val 值 + * + * @param val 值 * @param digits 位 * @return 值 */ - private static String digits(long val, int digits) - { + private static String digits(long val, int digits) { long hi = 1L << (digits * 4); return Long.toHexString(hi | (val & (hi - 1))).substring(1); } @@ -446,27 +410,21 @@ public final class UUID implements java.io.Serializable, Comparable /** * 检查是否为time-based版本UUID */ - private void checkTimeBase() - { - if (version() != 1) - { + private void checkTimeBase() { + if (version() != 1) { throw new UnsupportedOperationException("Not a time-based UUID"); } } /** * 获取{@link SecureRandom}，类提供加密的强随机数生成器 (RNG) - * + * * @return {@link SecureRandom} */ - public static SecureRandom getSecureRandom() - { - try - { + public static SecureRandom getSecureRandom() { + try { return SecureRandom.getInstance("SHA1PRNG"); - } - catch (NoSuchAlgorithmException e) - { + } catch (NoSuchAlgorithmException e) { throw new UtilException(e); } } @@ -474,11 +432,10 @@ public final class UUID implements java.io.Serializable, Comparable /** * 获取随机数生成器对象
* ThreadLocalRandom是JDK 7之后提供并发产生随机数，能够解决多个线程发生的竞争争夺。 - * + * * @return {@link ThreadLocalRandom} */ - public static ThreadLocalRandom getRandom() - { + public static ThreadLocalRandom getRandom() { return ThreadLocalRandom.current(); } } diff --git a/spring-boot/ruoyi-framework/pom.xml b/spring-boot/ruoyi-framework/pom.xml index 8e0a73fc..982c8993 100644 --- a/spring-boot/ruoyi-framework/pom.xml +++ b/spring-boot/ruoyi-framework/pom.xml @@ -18,7 +18,7 @@ - + org.springframework.boot spring-boot-starter-web @@ -58,6 +58,12 @@ com.ruoyi ruoyi-system + + com.github.binarywang + weixin-java-miniapp + 4.0.0 + + diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataScopeAspect.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataScopeAspect.java index 45d939bb..cc01b942 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataScopeAspect.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataScopeAspect.java @@ -1,6 +1,7 @@ package com.ruoyi.framework.aspectj; import java.lang.reflect.Method; + import org.aspectj.lang.JoinPoint; import org.aspectj.lang.Signature; import org.aspectj.lang.annotation.Aspect; @@ -25,8 +26,7 @@ import com.ruoyi.framework.web.service.TokenService; */ @Aspect @Component -public class DataScopeAspect -{ +public class DataScopeAspect { /** * 全部数据权限 */ @@ -59,32 +59,26 @@ public class DataScopeAspect // 配置织入点 @Pointcut("@annotation(com.ruoyi.common.annotation.DataScope)") - public void dataScopePointCut() - { + public void dataScopePointCut() { } @Before("dataScopePointCut()") - public void doBefore(JoinPoint point) throws Throwable - { + public void doBefore(JoinPoint point) throws Throwable { handleDataScope(point); } - protected void handleDataScope(final JoinPoint joinPoint) - { + protected void handleDataScope(final JoinPoint joinPoint) { // 获得注解 DataScope controllerDataScope = getAnnotationLog(joinPoint); - if (controllerDataScope == null) - { + if (controllerDataScope == null) { return; } // 获取当前的用户 LoginUser loginUser = SpringUtils.getBean(TokenService.class).getLoginUser(ServletUtils.getRequest()); - if (StringUtils.isNotNull(loginUser)) - { + if (StringUtils.isNotNull(loginUser)) { SysUser currentUser = loginUser.getUser(); // 如果是超级管理员，则不过滤数据 - if (StringUtils.isNotNull(currentUser) && !currentUser.isAdmin()) - { + if (StringUtils.isNotNull(currentUser) && !currentUser.isAdmin()) { dataScopeFilter(joinPoint, currentUser, controllerDataScope.deptAlias(), controllerDataScope.userAlias()); } @@ -95,56 +89,40 @@ public class DataScopeAspect * 数据范围过滤 * * @param joinPoint 切点 - * @param user 用户 + * @param user 用户 * @param userAlias 别名 */ - public static void dataScopeFilter(JoinPoint joinPoint, SysUser user, String deptAlias, String userAlias) - { + public static void dataScopeFilter(JoinPoint joinPoint, SysUser user, String deptAlias, String userAlias) { StringBuilder sqlString = new StringBuilder(); - for (SysRole role : user.getRoles()) - { + for (SysRole role : user.getRoles()) { String dataScope = role.getDataScope(); - if (DATA_SCOPE_ALL.equals(dataScope)) - { + if (DATA_SCOPE_ALL.equals(dataScope)) { sqlString = new StringBuilder(); break; - } - else if (DATA_SCOPE_CUSTOM.equals(dataScope)) - { + } else if (DATA_SCOPE_CUSTOM.equals(dataScope)) { sqlString.append(StringUtils.format( " OR {}.dept_id IN ( SELECT dept_id FROM sys_role_dept WHERE role_id = {} ) ", deptAlias, role.getRoleId())); - } - else if (DATA_SCOPE_DEPT.equals(dataScope)) - { + } else if (DATA_SCOPE_DEPT.equals(dataScope)) { sqlString.append(StringUtils.format(" OR {}.dept_id = {} ", deptAlias, user.getDeptId())); - } - else if (DATA_SCOPE_DEPT_AND_CHILD.equals(dataScope)) - { + } else if (DATA_SCOPE_DEPT_AND_CHILD.equals(dataScope)) { sqlString.append(StringUtils.format( " OR {}.dept_id IN ( SELECT dept_id FROM sys_dept WHERE dept_id = {} or find_in_set( {} , ancestors ) )", deptAlias, user.getDeptId(), user.getDeptId())); - } - else if (DATA_SCOPE_SELF.equals(dataScope)) - { - if (StringUtils.isNotBlank(userAlias)) - { + } else if (DATA_SCOPE_SELF.equals(dataScope)) { + if (StringUtils.isNotBlank(userAlias)) { sqlString.append(StringUtils.format(" OR {}.user_id = {} ", userAlias, user.getUserId())); - } - else - { + } else { // 数据权限为仅本人且没有userAlias别名不查询任何数据 sqlString.append(" OR 1=0 "); } } } - if (StringUtils.isNotBlank(sqlString.toString())) - { + if (StringUtils.isNotBlank(sqlString.toString())) { Object params = joinPoint.getArgs()[0]; - if (StringUtils.isNotNull(params) && params instanceof BaseEntity) - { + if (StringUtils.isNotNull(params) && params instanceof BaseEntity) { BaseEntity baseEntity = (BaseEntity) params; baseEntity.getParams().put(DATA_SCOPE, " AND (" + sqlString.substring(4) + ")"); } @@ -154,14 +132,12 @@ public class DataScopeAspect /** * 是否存在注解，如果存在就获取 */ - private DataScope getAnnotationLog(JoinPoint joinPoint) - { + private DataScope getAnnotationLog(JoinPoint joinPoint) { Signature signature = joinPoint.getSignature(); MethodSignature methodSignature = (MethodSignature) signature; Method method = methodSignature.getMethod(); - if (method != null) - { + if (method != null) { return method.getAnnotation(DataScope.class); } return null; diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataSourceAspect.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataSourceAspect.java index 8c2c9f43..020493d2 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataSourceAspect.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/DataSourceAspect.java @@ -1,6 +1,7 @@ package com.ruoyi.framework.aspectj; import java.util.Objects; + import org.aspectj.lang.ProceedingJoinPoint; import org.aspectj.lang.annotation.Around; import org.aspectj.lang.annotation.Aspect; @@ -17,39 +18,32 @@ import com.ruoyi.framework.datasource.DynamicDataSourceContextHolder; /** * 多数据源处理 - * + * * @author ruoyi */ @Aspect @Order(1) @Component -public class DataSourceAspect -{ +public class DataSourceAspect { protected Logger logger = LoggerFactory.getLogger(getClass()); @Pointcut("@annotation(com.ruoyi.common.annotation.DataSource)" + "|| @within(com.ruoyi.common.annotation.DataSource)") - public void dsPointCut() - { + public void dsPointCut() { } @Around("dsPointCut()") - public Object around(ProceedingJoinPoint point) throws Throwable - { + public Object around(ProceedingJoinPoint point) throws Throwable { DataSource dataSource = getDataSource(point); - if (StringUtils.isNotNull(dataSource)) - { + if (StringUtils.isNotNull(dataSource)) { DynamicDataSourceContextHolder.setDataSourceType(dataSource.value().name()); } - try - { + try { return point.proceed(); - } - finally - { + } finally { // 销毁数据源 在执行方法之后 DynamicDataSourceContextHolder.clearDataSourceType(); } @@ -58,12 +52,10 @@ public class DataSourceAspect /** * 获取需要切换的数据源 */ - public DataSource getDataSource(ProceedingJoinPoint point) - { + public DataSource getDataSource(ProceedingJoinPoint point) { MethodSignature signature = (MethodSignature) point.getSignature(); DataSource dataSource = AnnotationUtils.findAnnotation(signature.getMethod(), DataSource.class); - if (Objects.nonNull(dataSource)) - { + if (Objects.nonNull(dataSource)) { return dataSource; } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/LogAspect.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/LogAspect.java index 7e180ab7..7c53fc23 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/LogAspect.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/aspectj/LogAspect.java @@ -6,6 +6,7 @@ import java.util.Iterator; import java.util.Map; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.aspectj.lang.JoinPoint; import org.aspectj.lang.Signature; import org.aspectj.lang.annotation.AfterReturning; @@ -34,19 +35,17 @@ import com.ruoyi.system.domain.SysOperLog; /** * 操作日志记录处理 - * + * * @author ruoyi */ @Aspect @Component -public class LogAspect -{ +public class LogAspect { private static final Logger log = LoggerFactory.getLogger(LogAspect.class); // 配置织入点 @Pointcut("@annotation(com.ruoyi.common.annotation.Log)") - public void logPointCut() - { + public void logPointCut() { } /** @@ -55,31 +54,26 @@ public class LogAspect * @param joinPoint 切点 */ @AfterReturning(pointcut = "logPointCut()", returning = "jsonResult") - public void doAfterReturning(JoinPoint joinPoint, Object jsonResult) - { + public void doAfterReturning(JoinPoint joinPoint, Object jsonResult) { handleLog(joinPoint, null, jsonResult); } /** * 拦截异常操作 - * + * * @param joinPoint 切点 - * @param e 异常 + * @param e 异常 */ @AfterThrowing(value = "logPointCut()", throwing = "e") - public void doAfterThrowing(JoinPoint joinPoint, Exception e) - { + public void doAfterThrowing(JoinPoint joinPoint, Exception e) { handleLog(joinPoint, e, null); } - protected void handleLog(final JoinPoint joinPoint, final Exception e, Object jsonResult) - { - try - { + protected void handleLog(final JoinPoint joinPoint, final Exception e, Object jsonResult) { + try { // 获得注解 Log controllerLog = getAnnotationLog(joinPoint); - if (controllerLog == null) - { + if (controllerLog == null) { return; } @@ -96,13 +90,11 @@ public class LogAspect operLog.setJsonResult(JSON.toJSONString(jsonResult)); operLog.setOperUrl(ServletUtils.getRequest().getRequestURI()); - if (loginUser != null) - { + if (loginUser != null) { operLog.setOperName(loginUser.getUsername()); } - if (e != null) - { + if (e != null) { operLog.setStatus(BusinessStatus.FAIL.ordinal()); operLog.setErrorMsg(StringUtils.substring(e.getMessage(), 0, 2000)); } @@ -116,9 +108,7 @@ public class LogAspect getControllerMethodDescription(joinPoint, controllerLog, operLog); // 保存数据库 AsyncManager.me().execute(AsyncFactory.recordOper(operLog)); - } - catch (Exception exp) - { + } catch (Exception exp) { // 记录本地异常日志 log.error("==前置通知异常=="); log.error("异常信息:{}", exp.getMessage()); @@ -128,13 +118,12 @@ public class LogAspect /** * 获取注解中对方法的描述信息 用于Controller层注解 - * - * @param log 日志 + * + * @param log 日志 * @param operLog 操作日志 * @throws Exception */ - public void getControllerMethodDescription(JoinPoint joinPoint, Log log, SysOperLog operLog) throws Exception - { + public void getControllerMethodDescription(JoinPoint joinPoint, Log log, SysOperLog operLog) throws Exception { // 设置action动作 operLog.setBusinessType(log.businessType().ordinal()); // 设置标题 @@ -142,8 +131,7 @@ public class LogAspect // 设置操作人类别 operLog.setOperatorType(log.operatorType().ordinal()); // 是否需要保存request，参数和值 - if (log.isSaveRequestData()) - { + if (log.isSaveRequestData()) { // 获取参数的信息，传入到数据库中。 setRequestValue(joinPoint, operLog); } @@ -151,20 +139,16 @@ public class LogAspect /** * 获取请求的参数，放到log中 - * + * * @param operLog 操作日志 * @throws Exception 异常 */ - private void setRequestValue(JoinPoint joinPoint, SysOperLog operLog) throws Exception - { + private void setRequestValue(JoinPoint joinPoint, SysOperLog operLog) throws Exception { String requestMethod = operLog.getRequestMethod(); - if (HttpMethod.PUT.name().equals(requestMethod) || HttpMethod.POST.name().equals(requestMethod)) - { + if (HttpMethod.PUT.name().equals(requestMethod) || HttpMethod.POST.name().equals(requestMethod)) { String params = argsArrayToString(joinPoint.getArgs()); operLog.setOperParam(StringUtils.substring(params, 0, 2000)); - } - else - { + } else { Map paramsMap = (Map) ServletUtils.getRequest().getAttribute(HandlerMapping.URI_TEMPLATE_VARIABLES_ATTRIBUTE); operLog.setOperParam(StringUtils.substring(paramsMap.toString(), 0, 2000)); } @@ -173,14 +157,12 @@ public class LogAspect /** * 是否存在注解，如果存在就获取 */ - private Log getAnnotationLog(JoinPoint joinPoint) throws Exception - { + private Log getAnnotationLog(JoinPoint joinPoint) throws Exception { Signature signature = joinPoint.getSignature(); MethodSignature methodSignature = (MethodSignature) signature; Method method = methodSignature.getMethod(); - if (method != null) - { + if (method != null) { return method.getAnnotation(Log.class); } return null; @@ -189,15 +171,11 @@ public class LogAspect /** * 参数拼装 */ - private String argsArrayToString(Object[] paramsArray) - { + private String argsArrayToString(Object[] paramsArray) { String params = ""; - if (paramsArray != null && paramsArray.length > 0) - { - for (int i = 0; i < paramsArray.length; i++) - { - if (!isFilterObject(paramsArray[i])) - { + if (paramsArray != null && paramsArray.length > 0) { + for (int i = 0; i < paramsArray.length; i++) { + if (!isFilterObject(paramsArray[i])) { Object jsonObj = JSON.toJSON(paramsArray[i]); params += jsonObj.toString() + " "; } @@ -208,31 +186,23 @@ public class LogAspect /** * 判断是否需要过滤的对象。 - * + * * @param o 对象信息。 * @return 如果是需要过滤的对象，则返回true；否则返回false。 */ @SuppressWarnings("rawtypes") - public boolean isFilterObject(final Object o) - { + public boolean isFilterObject(final Object o) { Class clazz = o.getClass(); - if (clazz.isArray()) - { + if (clazz.isArray()) { return clazz.getComponentType().isAssignableFrom(MultipartFile.class); - } - else if (Collection.class.isAssignableFrom(clazz)) - { + } else if (Collection.class.isAssignableFrom(clazz)) { Collection collection = (Collection) o; - for (Iterator iter = collection.iterator(); iter.hasNext();) - { + for (Iterator iter = collection.iterator(); iter.hasNext(); ) { return iter.next() instanceof MultipartFile; } - } - else if (Map.class.isAssignableFrom(clazz)) - { + } else if (Map.class.isAssignableFrom(clazz)) { Map map = (Map) o; - for (Iterator iter = map.entrySet().iterator(); iter.hasNext();) - { + for (Iterator iter = map.entrySet().iterator(); iter.hasNext(); ) { Map.Entry entry = (Map.Entry) iter.next(); return entry.getValue() instanceof MultipartFile; } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ApplicationConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ApplicationConfig.java index 1d4dc1f7..dbc30d90 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ApplicationConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ApplicationConfig.java @@ -1,6 +1,7 @@ package com.ruoyi.framework.config; import java.util.TimeZone; + import org.mybatis.spring.annotation.MapperScan; import org.springframework.boot.autoconfigure.jackson.Jackson2ObjectMapperBuilderCustomizer; import org.springframework.context.annotation.Bean; @@ -17,14 +18,12 @@ import org.springframework.context.annotation.EnableAspectJAutoProxy; @EnableAspectJAutoProxy(exposeProxy = true) // 指定要扫描的Mapper类的包的路径 @MapperScan("com.ruoyi.**.mapper") -public class ApplicationConfig -{ +public class ApplicationConfig { /** * 时区配置 */ @Bean - public Jackson2ObjectMapperBuilderCustomizer jacksonObjectMapperCustomization() - { + public Jackson2ObjectMapperBuilderCustomizer jacksonObjectMapperCustomization() { return jacksonObjectMapperBuilder -> jacksonObjectMapperBuilder.timeZone(TimeZone.getDefault()); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/CaptchaConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/CaptchaConfig.java index 43e78aeb..be2a6e34 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/CaptchaConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/CaptchaConfig.java @@ -1,23 +1,23 @@ package com.ruoyi.framework.config; import java.util.Properties; + import org.springframework.context.annotation.Bean; import org.springframework.context.annotation.Configuration; import com.google.code.kaptcha.impl.DefaultKaptcha; import com.google.code.kaptcha.util.Config; + import static com.google.code.kaptcha.Constants.*; /** * 验证码配置 - * + * * @author ruoyi */ @Configuration -public class CaptchaConfig -{ +public class CaptchaConfig { @Bean(name = "captchaProducer") - public DefaultKaptcha getKaptchaBean() - { + public DefaultKaptcha getKaptchaBean() { DefaultKaptcha defaultKaptcha = new DefaultKaptcha(); Properties properties = new Properties(); // 是否有边框 默认为true 我们可以自己设置yes，no @@ -44,8 +44,7 @@ public class CaptchaConfig } @Bean(name = "captchaProducerMath") - public DefaultKaptcha getKaptchaBeanMath() - { + public DefaultKaptcha getKaptchaBeanMath() { DefaultKaptcha defaultKaptcha = new DefaultKaptcha(); Properties properties = new Properties(); // 是否有边框 默认为true 我们可以自己设置yes，no diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/DruidConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/DruidConfig.java index f6abac13..7e9f4b03 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/DruidConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/DruidConfig.java @@ -9,6 +9,7 @@ import javax.servlet.ServletException; import javax.servlet.ServletRequest; import javax.servlet.ServletResponse; import javax.sql.DataSource; + import org.springframework.boot.autoconfigure.condition.ConditionalOnProperty; import org.springframework.boot.context.properties.ConfigurationProperties; import org.springframework.boot.web.servlet.FilterRegistrationBean; @@ -26,16 +27,14 @@ import com.ruoyi.framework.datasource.DynamicDataSource; /** * druid 配置多数据源 - * + * * @author ruoyi */ @Configuration -public class DruidConfig -{ +public class DruidConfig { @Bean @ConfigurationProperties("spring.datasource.druid.master") - public DataSource masterDataSource(DruidProperties druidProperties) - { + public DataSource masterDataSource(DruidProperties druidProperties) { DruidDataSource dataSource = DruidDataSourceBuilder.create().build(); return druidProperties.dataSource(dataSource); } @@ -43,49 +42,42 @@ public class DruidConfig @Bean @ConfigurationProperties("spring.datasource.druid.slave") @ConditionalOnProperty(prefix = "spring.datasource.druid.slave", name = "enabled", havingValue = "true") - public DataSource slaveDataSource(DruidProperties druidProperties) - { + public DataSource slaveDataSource(DruidProperties druidProperties) { DruidDataSource dataSource = DruidDataSourceBuilder.create().build(); return druidProperties.dataSource(dataSource); } @Bean(name = "dynamicDataSource") @Primary - public DynamicDataSource dataSource(DataSource masterDataSource) - { + public DynamicDataSource dataSource(DataSource masterDataSource) { Map targetDataSources = new HashMap<>(); targetDataSources.put(DataSourceType.MASTER.name(), masterDataSource); setDataSource(targetDataSources, DataSourceType.SLAVE.name(), "slaveDataSource"); return new DynamicDataSource(masterDataSource, targetDataSources); } - + /** * 设置数据源 - * + * * @param targetDataSources 备选数据源集合 - * @param sourceName 数据源名称 - * @param beanName bean名称 + * @param sourceName 数据源名称 + * @param beanName bean名称 */ - public void setDataSource(Map targetDataSources, String sourceName, String beanName) - { - try - { + public void setDataSource(Map targetDataSources, String sourceName, String beanName) { + try { DataSource dataSource = SpringUtils.getBean(beanName); targetDataSources.put(sourceName, dataSource); - } - catch (Exception e) - { + } catch (Exception e) { } } /** * 去除监控页面底部的广告 */ - @SuppressWarnings({ "rawtypes", "unchecked" }) + @SuppressWarnings({"rawtypes", "unchecked"}) @Bean @ConditionalOnProperty(name = "spring.datasource.druid.statViewServlet.enabled", havingValue = "true") - public FilterRegistrationBean removeDruidFilterRegistrationBean(DruidStatProperties properties) - { + public FilterRegistrationBean removeDruidFilterRegistrationBean(DruidStatProperties properties) { // 获取web监控页面的参数 DruidStatProperties.StatViewServlet config = properties.getStatViewServlet(); // 提取common.js的配置路径 @@ -93,16 +85,14 @@ public class DruidConfig String commonJsPattern = pattern.replaceAll("\\*", "js/common.js"); final String filePath = "support/http/resources/js/common.js"; // 创建filter进行过滤 - Filter filter = new Filter() - { + Filter filter = new Filter() { @Override - public void init(javax.servlet.FilterConfig filterConfig) throws ServletException - { + public void init(javax.servlet.FilterConfig filterConfig) throws ServletException { } + @Override public void doFilter(ServletRequest request, ServletResponse response, FilterChain chain) - throws IOException, ServletException - { + throws IOException, ServletException { chain.doFilter(request, response); // 重置缓冲区，响应头不会被重置 response.resetBuffer(); @@ -113,9 +103,9 @@ public class DruidConfig text = text.replaceAll("powered.*?shrek.wang", ""); response.getWriter().write(text); } + @Override - public void destroy() - { + public void destroy() { } }; FilterRegistrationBean registrationBean = new FilterRegistrationBean(); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FastJson2JsonRedisSerializer.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FastJson2JsonRedisSerializer.java index 59812ea5..a7c29f3f 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FastJson2JsonRedisSerializer.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FastJson2JsonRedisSerializer.java @@ -9,15 +9,15 @@ import org.springframework.data.redis.serializer.RedisSerializer; import org.springframework.data.redis.serializer.SerializationException; import com.alibaba.fastjson.parser.ParserConfig; import org.springframework.util.Assert; + import java.nio.charset.Charset; /** * Redis使用FastJson序列化 - * + * * @author ruoyi */ -public class FastJson2JsonRedisSerializer implements RedisSerializer -{ +public class FastJson2JsonRedisSerializer implements RedisSerializer { @SuppressWarnings("unused") private ObjectMapper objectMapper = new ObjectMapper(); @@ -25,32 +25,26 @@ public class FastJson2JsonRedisSerializer implements RedisSerializer private Class clazz; - static - { + static { ParserConfig.getGlobalInstance().setAutoTypeSupport(true); } - public FastJson2JsonRedisSerializer(Class clazz) - { + public FastJson2JsonRedisSerializer(Class clazz) { super(); this.clazz = clazz; } @Override - public byte[] serialize(T t) throws SerializationException - { - if (t == null) - { + public byte[] serialize(T t) throws SerializationException { + if (t == null) { return new byte[0]; } return JSON.toJSONString(t, SerializerFeature.WriteClassName).getBytes(DEFAULT_CHARSET); } @Override - public T deserialize(byte[] bytes) throws SerializationException - { - if (bytes == null || bytes.length <= 0) - { + public T deserialize(byte[] bytes) throws SerializationException { + if (bytes == null || bytes.length <= 0) { return null; } String str = new String(bytes, DEFAULT_CHARSET); @@ -58,14 +52,12 @@ public class FastJson2JsonRedisSerializer implements RedisSerializer return JSON.parseObject(str, clazz); } - public void setObjectMapper(ObjectMapper objectMapper) - { + public void setObjectMapper(ObjectMapper objectMapper) { Assert.notNull(objectMapper, "'objectMapper' must not be null"); this.objectMapper = objectMapper; } - protected JavaType getJavaType(Class clazz) - { + protected JavaType getJavaType(Class clazz) { return TypeFactory.defaultInstance().constructType(clazz); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FilterConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FilterConfig.java index b5f03ec8..4feef0d0 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FilterConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/FilterConfig.java @@ -3,6 +3,7 @@ package com.ruoyi.framework.config; import java.util.HashMap; import java.util.Map; import javax.servlet.DispatcherType; + import org.springframework.beans.factory.annotation.Value; import org.springframework.boot.web.servlet.FilterRegistrationBean; import org.springframework.context.annotation.Bean; @@ -17,8 +18,7 @@ import com.ruoyi.common.utils.StringUtils; * @author ruoyi */ @Configuration -public class FilterConfig -{ +public class FilterConfig { @Value("${xss.enabled}") private String enabled; @@ -28,10 +28,9 @@ public class FilterConfig @Value("${xss.urlPatterns}") private String urlPatterns; - @SuppressWarnings({ "rawtypes", "unchecked" }) + @SuppressWarnings({"rawtypes", "unchecked"}) @Bean - public FilterRegistrationBean xssFilterRegistration() - { + public FilterRegistrationBean xssFilterRegistration() { FilterRegistrationBean registration = new FilterRegistrationBean(); registration.setDispatcherTypes(DispatcherType.REQUEST); registration.setFilter(new XssFilter()); @@ -45,10 +44,9 @@ public class FilterConfig return registration; } - @SuppressWarnings({ "rawtypes", "unchecked" }) + @SuppressWarnings({"rawtypes", "unchecked"}) @Bean - public FilterRegistrationBean someFilterRegistration() - { + public FilterRegistrationBean someFilterRegistration() { FilterRegistrationBean registration = new FilterRegistrationBean(); registration.setFilter(new RepeatableFilter()); registration.addUrlPatterns("/*"); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/KaptchaTextCreator.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/KaptchaTextCreator.java index 3e745800..4f028959 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/KaptchaTextCreator.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/KaptchaTextCreator.java @@ -1,69 +1,55 @@ package com.ruoyi.framework.config; import java.util.Random; + import com.google.code.kaptcha.text.impl.DefaultTextCreator; /** * 验证码文本生成器 - * + * * @author ruoyi */ -public class KaptchaTextCreator extends DefaultTextCreator -{ +public class KaptchaTextCreator extends DefaultTextCreator { private static final String[] CNUMBERS = "0,1,2,3,4,5,6,7,8,9,10".split(","); @Override - public String getText() - { + public String getText() { Integer result = 0; Random random = new Random(); int x = random.nextInt(10); int y = random.nextInt(10); StringBuilder suChinese = new StringBuilder(); int randomoperands = (int) Math.round(Math.random() * 2); - if (randomoperands == 0) - { + if (randomoperands == 0) { result = x * y; suChinese.append(CNUMBERS[x]); suChinese.append("*"); suChinese.append(CNUMBERS[y]); - } - else if (randomoperands == 1) - { - if (!(x == 0) && y % x == 0) - { + } else if (randomoperands == 1) { + if (!(x == 0) && y % x == 0) { result = y / x; suChinese.append(CNUMBERS[y]); suChinese.append("/"); suChinese.append(CNUMBERS[x]); - } - else - { + } else { result = x + y; suChinese.append(CNUMBERS[x]); suChinese.append("+"); suChinese.append(CNUMBERS[y]); } - } - else if (randomoperands == 2) - { - if (x >= y) - { + } else if (randomoperands == 2) { + if (x >= y) { result = x - y; suChinese.append(CNUMBERS[x]); suChinese.append("-"); suChinese.append(CNUMBERS[y]); - } - else - { + } else { result = y - x; suChinese.append(CNUMBERS[y]); suChinese.append("-"); suChinese.append(CNUMBERS[x]); } - } - else - { + } else { result = x + y; suChinese.append(CNUMBERS[x]); suChinese.append("+"); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/MyBatisConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/MyBatisConfig.java index 057c9419..31387ee6 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/MyBatisConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/MyBatisConfig.java @@ -6,6 +6,7 @@ import java.util.Arrays; import java.util.HashSet; import java.util.List; import javax.sql.DataSource; + import org.apache.ibatis.io.VFS; import org.apache.ibatis.session.SqlSessionFactory; import org.mybatis.spring.SqlSessionFactoryBean; @@ -26,86 +27,64 @@ import com.ruoyi.common.utils.StringUtils; /** * Mybatis支持*匹配扫描包 - * + * * @author ruoyi */ @Configuration -public class MyBatisConfig -{ +public class MyBatisConfig { @Autowired private Environment env; static final String DEFAULT_RESOURCE_PATTERN = "**/*.class"; - public static String setTypeAliasesPackage(String typeAliasesPackage) - { + public static String setTypeAliasesPackage(String typeAliasesPackage) { ResourcePatternResolver resolver = (ResourcePatternResolver) new PathMatchingResourcePatternResolver(); MetadataReaderFactory metadataReaderFactory = new CachingMetadataReaderFactory(resolver); List allResult = new ArrayList(); - try - { - for (String aliasesPackage : typeAliasesPackage.split(",")) - { + try { + for (String aliasesPackage : typeAliasesPackage.split(",")) { List result = new ArrayList(); aliasesPackage = ResourcePatternResolver.CLASSPATH_ALL_URL_PREFIX + ClassUtils.convertClassNameToResourcePath(aliasesPackage.trim()) + "/" + DEFAULT_RESOURCE_PATTERN; Resource[] resources = resolver.getResources(aliasesPackage); - if (resources != null && resources.length > 0) - { + if (resources != null && resources.length > 0) { MetadataReader metadataReader = null; - for (Resource resource : resources) - { - if (resource.isReadable()) - { + for (Resource resource : resources) { + if (resource.isReadable()) { metadataReader = metadataReaderFactory.getMetadataReader(resource); - try - { + try { result.add(Class.forName(metadataReader.getClassMetadata().getClassName()).getPackage().getName()); - } - catch (ClassNotFoundException e) - { + } catch (ClassNotFoundException e) { e.printStackTrace(); } } } } - if (result.size() > 0) - { + if (result.size() > 0) { HashSet hashResult = new HashSet(result); allResult.addAll(hashResult); } } - if (allResult.size() > 0) - { + if (allResult.size() > 0) { typeAliasesPackage = String.join(",", (String[]) allResult.toArray(new String[0])); - } - else - { + } else { throw new RuntimeException("mybatis typeAliasesPackage 路径扫描错误,参数typeAliasesPackage:" + typeAliasesPackage + "未找到任何包"); } - } - catch (IOException e) - { + } catch (IOException e) { e.printStackTrace(); } return typeAliasesPackage; } - public Resource[] resolveMapperLocations(String[] mapperLocations) - { + public Resource[] resolveMapperLocations(String[] mapperLocations) { ResourcePatternResolver resourceResolver = new PathMatchingResourcePatternResolver(); List resources = new ArrayList(); - if (mapperLocations != null) - { - for (String mapperLocation : mapperLocations) - { - try - { + if (mapperLocations != null) { + for (String mapperLocation : mapperLocations) { + try { Resource[] mappers = resourceResolver.getResources(mapperLocation); resources.addAll(Arrays.asList(mappers)); - } - catch (IOException e) - { + } catch (IOException e) { // ignore } } @@ -114,8 +93,7 @@ public class MyBatisConfig } @Bean - public SqlSessionFactory sqlSessionFactory(DataSource dataSource) throws Exception - { + public SqlSessionFactory sqlSessionFactory(DataSource dataSource) throws Exception { String typeAliasesPackage = env.getProperty("mybatis.typeAliasesPackage"); String mapperLocations = env.getProperty("mybatis.mapperLocations"); String configLocation = env.getProperty("mybatis.configLocation"); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/RedisConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/RedisConfig.java index a65626aa..a55670e9 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/RedisConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/RedisConfig.java @@ -15,17 +15,15 @@ import com.fasterxml.jackson.databind.jsontype.impl.LaissezFaireSubTypeValidator /** * redis配置 - * + * * @author ruoyi */ @Configuration @EnableCaching -public class RedisConfig extends CachingConfigurerSupport -{ +public class RedisConfig extends CachingConfigurerSupport { @Bean - @SuppressWarnings(value = { "unchecked", "rawtypes" }) - public RedisTemplate redisTemplate(RedisConnectionFactory connectionFactory) - { + @SuppressWarnings(value = {"unchecked", "rawtypes"}) + public RedisTemplate redisTemplate(RedisConnectionFactory connectionFactory) { RedisTemplate template = new RedisTemplate<>(); template.setConnectionFactory(connectionFactory); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ResourcesConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ResourcesConfig.java index 7f0a629b..80b91dce 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ResourcesConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ResourcesConfig.java @@ -15,18 +15,16 @@ import com.ruoyi.framework.interceptor.RepeatSubmitInterceptor; /** * 通用配置 - * + * * @author ruoyi */ @Configuration -public class ResourcesConfig implements WebMvcConfigurer -{ +public class ResourcesConfig implements WebMvcConfigurer { @Autowired private RepeatSubmitInterceptor repeatSubmitInterceptor; @Override - public void addResourceHandlers(ResourceHandlerRegistry registry) - { + public void addResourceHandlers(ResourceHandlerRegistry registry) { /** 本地文件上传路径 */ registry.addResourceHandler(Constants.RESOURCE_PREFIX + "/**").addResourceLocations("file:" + RuoYiConfig.getProfile() + "/"); @@ -39,8 +37,7 @@ public class ResourcesConfig implements WebMvcConfigurer * 自定义拦截规则 */ @Override - public void addInterceptors(InterceptorRegistry registry) - { + public void addInterceptors(InterceptorRegistry registry) { registry.addInterceptor(repeatSubmitInterceptor).addPathPatterns("/**"); } @@ -48,8 +45,7 @@ public class ResourcesConfig implements WebMvcConfigurer * 跨域配置 */ @Bean - public CorsFilter corsFilter() - { + public CorsFilter corsFilter() { UrlBasedCorsConfigurationSource source = new UrlBasedCorsConfigurationSource(); CorsConfiguration config = new CorsConfiguration(); config.setAllowCredentials(true); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/SecurityConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/SecurityConfig.java index e71fccb2..64c1a5d8 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/SecurityConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/SecurityConfig.java @@ -20,18 +20,17 @@ import com.ruoyi.framework.security.handle.LogoutSuccessHandlerImpl; /** * spring security配置 - * + * * @author ruoyi */ @EnableGlobalMethodSecurity(prePostEnabled = true, securedEnabled = true) -public class SecurityConfig extends WebSecurityConfigurerAdapter -{ +public class SecurityConfig extends WebSecurityConfigurerAdapter { /** * 自定义用户认证逻辑 */ @Autowired private UserDetailsService userDetailsService; - + /** * 认证失败处理类 */ @@ -55,7 +54,7 @@ public class SecurityConfig extends WebSecurityConfigurerAdapter */ @Autowired private CorsFilter corsFilter; - + /** * 解决 无法直接注入 AuthenticationManager * @@ -64,8 +63,7 @@ public class SecurityConfig extends WebSecurityConfigurerAdapter */ @Bean @Override - public AuthenticationManager authenticationManagerBean() throws Exception - { + public AuthenticationManager authenticationManagerBean() throws Exception { return super.authenticationManagerBean(); } @@ -85,8 +83,7 @@ public class SecurityConfig extends WebSecurityConfigurerAdapter * authenticated | 用户登录后可访问 */ @Override - protected void configure(HttpSecurity httpSecurity) throws Exception - { + protected void configure(HttpSecurity httpSecurity) throws Exception { httpSecurity // CSRF禁用，因为不使用session .csrf().disable() @@ -97,7 +94,7 @@ public class SecurityConfig extends WebSecurityConfigurerAdapter // 过滤请求 .authorizeRequests() // 对于登录login 验证码captchaImage 允许匿名访问 - .antMatchers("/login", "/captchaImage","/system/user/register").anonymous() + .antMatchers("/wxLogin", "/login", "/captchaImage", "/system/user/register").anonymous() .antMatchers( HttpMethod.GET, "/*.html", @@ -125,13 +122,12 @@ public class SecurityConfig extends WebSecurityConfigurerAdapter httpSecurity.addFilterBefore(corsFilter, LogoutFilter.class); } - + /** * 强散列哈希加密实现 */ @Bean - public BCryptPasswordEncoder bCryptPasswordEncoder() - { + public BCryptPasswordEncoder bCryptPasswordEncoder() { return new BCryptPasswordEncoder(); } @@ -139,8 +135,7 @@ public class SecurityConfig extends WebSecurityConfigurerAdapter * 身份认证接口 */ @Override - protected void configure(AuthenticationManagerBuilder auth) throws Exception - { + protected void configure(AuthenticationManagerBuilder auth) throws Exception { auth.userDetailsService(userDetailsService).passwordEncoder(bCryptPasswordEncoder()); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ServerConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ServerConfig.java index b5b7de31..d50be60a 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ServerConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ServerConfig.java @@ -1,30 +1,28 @@ package com.ruoyi.framework.config; import javax.servlet.http.HttpServletRequest; + import org.springframework.stereotype.Component; import com.ruoyi.common.utils.ServletUtils; /** * 服务相关配置 - * + * * @author ruoyi */ @Component -public class ServerConfig -{ +public class ServerConfig { /** * 获取完整的请求路径，包括：域名，端口，上下文访问路径 - * + * * @return 服务地址 */ - public String getUrl() - { + public String getUrl() { HttpServletRequest request = ServletUtils.getRequest(); return getDomain(request); } - public static String getDomain(HttpServletRequest request) - { + public static String getDomain(HttpServletRequest request) { StringBuffer url = request.getRequestURL(); String contextPath = request.getServletContext().getContextPath(); return url.delete(url.length() - request.getRequestURI().length(), url.length()).append(contextPath).toString(); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ThreadPoolConfig.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ThreadPoolConfig.java index 0d67c224..dac6f6e8 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ThreadPoolConfig.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/ThreadPoolConfig.java @@ -3,6 +3,7 @@ package com.ruoyi.framework.config; import java.util.concurrent.ScheduledExecutorService; import java.util.concurrent.ScheduledThreadPoolExecutor; import java.util.concurrent.ThreadPoolExecutor; + import org.apache.commons.lang3.concurrent.BasicThreadFactory; import org.springframework.context.annotation.Bean; import org.springframework.context.annotation.Configuration; @@ -15,8 +16,7 @@ import com.ruoyi.common.utils.Threads; * @author ruoyi **/ @Configuration -public class ThreadPoolConfig -{ +public class ThreadPoolConfig { // 核心线程池大小 private int corePoolSize = 50; @@ -30,8 +30,7 @@ public class ThreadPoolConfig private int keepAliveSeconds = 300; @Bean(name = "threadPoolTaskExecutor") - public ThreadPoolTaskExecutor threadPoolTaskExecutor() - { + public ThreadPoolTaskExecutor threadPoolTaskExecutor() { ThreadPoolTaskExecutor executor = new ThreadPoolTaskExecutor(); executor.setMaxPoolSize(maxPoolSize); executor.setCorePoolSize(corePoolSize); @@ -46,14 +45,11 @@ public class ThreadPoolConfig * 执行周期性或定时任务 */ @Bean(name = "scheduledExecutorService") - protected ScheduledExecutorService scheduledExecutorService() - { + protected ScheduledExecutorService scheduledExecutorService() { return new ScheduledThreadPoolExecutor(corePoolSize, - new BasicThreadFactory.Builder().namingPattern("schedule-pool-%d").daemon(true).build()) - { + new BasicThreadFactory.Builder().namingPattern("schedule-pool-%d").daemon(true).build()) { @Override - protected void afterExecute(Runnable r, Throwable t) - { + protected void afterExecute(Runnable r, Throwable t) { super.afterExecute(r, t); Threads.printException(r, t); } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/properties/DruidProperties.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/properties/DruidProperties.java index 84f7e009..33983900 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/properties/DruidProperties.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/config/properties/DruidProperties.java @@ -6,12 +6,11 @@ import com.alibaba.druid.pool.DruidDataSource; /** * druid 配置属性 - * + * * @author ruoyi */ @Configuration -public class DruidProperties -{ +public class DruidProperties { @Value("${spring.datasource.druid.initialSize}") private int initialSize; @@ -45,8 +44,7 @@ public class DruidProperties @Value("${spring.datasource.druid.testOnReturn}") private boolean testOnReturn; - public DruidDataSource dataSource(DruidDataSource datasource) - { + public DruidDataSource dataSource(DruidDataSource datasource) { /** 配置初始化大小、最小、最大 */ datasource.setInitialSize(initialSize); datasource.setMaxActive(maxActive); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSource.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSource.java index e70b8cfa..8bd0f04a 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSource.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSource.java @@ -2,25 +2,23 @@ package com.ruoyi.framework.datasource; import java.util.Map; import javax.sql.DataSource; + import org.springframework.jdbc.datasource.lookup.AbstractRoutingDataSource; /** * 动态数据源 - * + * * @author ruoyi */ -public class DynamicDataSource extends AbstractRoutingDataSource -{ - public DynamicDataSource(DataSource defaultTargetDataSource, Map targetDataSources) - { +public class DynamicDataSource extends AbstractRoutingDataSource { + public DynamicDataSource(DataSource defaultTargetDataSource, Map targetDataSources) { super.setDefaultTargetDataSource(defaultTargetDataSource); super.setTargetDataSources(targetDataSources); super.afterPropertiesSet(); } @Override - protected Object determineCurrentLookupKey() - { + protected Object determineCurrentLookupKey() { return DynamicDataSourceContextHolder.getDataSourceType(); } } \ No newline at end of file diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSourceContextHolder.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSourceContextHolder.java index 3572db91..37a5f8e5 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSourceContextHolder.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/datasource/DynamicDataSourceContextHolder.java @@ -5,24 +5,22 @@ import org.slf4j.LoggerFactory; /** * 数据源切换处理 - * + * * @author ruoyi */ -public class DynamicDataSourceContextHolder -{ +public class DynamicDataSourceContextHolder { public static final Logger log = LoggerFactory.getLogger(DynamicDataSourceContextHolder.class); /** * 使用ThreadLocal维护变量，ThreadLocal为每个使用该变量的线程提供独立的变量副本， - * 所以每一个线程都可以独立地改变自己的副本，而不会影响其它线程所对应的副本。 + * 所以每一个线程都可以独立地改变自己的副本，而不会影响其它线程所对应的副本。 */ private static final ThreadLocal CONTEXT_HOLDER = new ThreadLocal<>(); /** * 设置数据源的变量 */ - public static void setDataSourceType(String dsType) - { + public static void setDataSourceType(String dsType) { log.info("切换到{}数据源", dsType); CONTEXT_HOLDER.set(dsType); } @@ -30,16 +28,14 @@ public class DynamicDataSourceContextHolder /** * 获得数据源的变量 */ - public static String getDataSourceType() - { + public static String getDataSourceType() { return CONTEXT_HOLDER.get(); } /** * 清空数据源变量 */ - public static void clearDataSourceType() - { + public static void clearDataSourceType() { CONTEXT_HOLDER.remove(); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/RepeatSubmitInterceptor.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/RepeatSubmitInterceptor.java index 17d607fd..e07e6de6 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/RepeatSubmitInterceptor.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/RepeatSubmitInterceptor.java @@ -3,6 +3,7 @@ package com.ruoyi.framework.interceptor; import java.lang.reflect.Method; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.springframework.stereotype.Component; import org.springframework.web.method.HandlerMethod; import org.springframework.web.servlet.handler.HandlerInterceptorAdapter; @@ -17,29 +18,22 @@ import com.ruoyi.common.utils.ServletUtils; * @author ruoyi */ @Component -public abstract class RepeatSubmitInterceptor extends HandlerInterceptorAdapter -{ +public abstract class RepeatSubmitInterceptor extends HandlerInterceptorAdapter { @Override - public boolean preHandle(HttpServletRequest request, HttpServletResponse response, Object handler) throws Exception - { - if (handler instanceof HandlerMethod) - { + public boolean preHandle(HttpServletRequest request, HttpServletResponse response, Object handler) throws Exception { + if (handler instanceof HandlerMethod) { HandlerMethod handlerMethod = (HandlerMethod) handler; Method method = handlerMethod.getMethod(); RepeatSubmit annotation = method.getAnnotation(RepeatSubmit.class); - if (annotation != null) - { - if (this.isRepeatSubmit(request)) - { + if (annotation != null) { + if (this.isRepeatSubmit(request)) { AjaxResult ajaxResult = AjaxResult.error("不允许重复提交，请稍后再试"); ServletUtils.renderString(response, JSONObject.toJSONString(ajaxResult)); return false; } } return true; - } - else - { + } else { return super.preHandle(request, response, handler); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/impl/SameUrlDataInterceptor.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/impl/SameUrlDataInterceptor.java index a9d0a542..3386b411 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/impl/SameUrlDataInterceptor.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/interceptor/impl/SameUrlDataInterceptor.java @@ -4,6 +4,7 @@ import java.util.HashMap; import java.util.Map; import java.util.concurrent.TimeUnit; import javax.servlet.http.HttpServletRequest; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.beans.factory.annotation.Value; import org.springframework.stereotype.Component; @@ -18,12 +19,11 @@ import com.ruoyi.framework.interceptor.RepeatSubmitInterceptor; /** * 判断请求url和数据是否和上一次相同， * 如果和上次相同，则是重复提交表单。 有效时间为10秒内。 - * + * * @author ruoyi */ @Component -public class SameUrlDataInterceptor extends RepeatSubmitInterceptor -{ +public class SameUrlDataInterceptor extends RepeatSubmitInterceptor { public final String REPEAT_PARAMS = "repeatParams"; public final String REPEAT_TIME = "repeatTime"; @@ -37,30 +37,26 @@ public class SameUrlDataInterceptor extends RepeatSubmitInterceptor /** * 间隔时间，单位:秒 默认10秒 - * + *

* 两次相同参数的请求，如果间隔时间大于该参数，系统不会认定为重复提交的数据 */ private int intervalTime = 10; - public void setIntervalTime(int intervalTime) - { + public void setIntervalTime(int intervalTime) { this.intervalTime = intervalTime; } @SuppressWarnings("unchecked") @Override - public boolean isRepeatSubmit(HttpServletRequest request) - { + public boolean isRepeatSubmit(HttpServletRequest request) { String nowParams = ""; - if (request instanceof RepeatedlyRequestWrapper) - { + if (request instanceof RepeatedlyRequestWrapper) { RepeatedlyRequestWrapper repeatedlyRequest = (RepeatedlyRequestWrapper) request; nowParams = HttpHelper.getBodyString(repeatedlyRequest); } // body参数为空，获取Parameter的数据 - if (StringUtils.isEmpty(nowParams)) - { + if (StringUtils.isEmpty(nowParams)) { nowParams = JSONObject.toJSONString(request.getParameterMap()); } Map nowDataMap = new HashMap(); @@ -72,8 +68,7 @@ public class SameUrlDataInterceptor extends RepeatSubmitInterceptor // 唯一值（没有消息头则使用请求地址） String submitKey = request.getHeader(header); - if (StringUtils.isEmpty(submitKey)) - { + if (StringUtils.isEmpty(submitKey)) { submitKey = url; } @@ -81,14 +76,11 @@ public class SameUrlDataInterceptor extends RepeatSubmitInterceptor String cache_repeat_key = Constants.REPEAT_SUBMIT_KEY + submitKey; Object sessionObj = redisCache.getCacheObject(cache_repeat_key); - if (sessionObj != null) - { + if (sessionObj != null) { Map sessionMap = (Map) sessionObj; - if (sessionMap.containsKey(url)) - { + if (sessionMap.containsKey(url)) { Map preDataMap = (Map) sessionMap.get(url); - if (compareParams(nowDataMap, preDataMap) && compareTime(nowDataMap, preDataMap)) - { + if (compareParams(nowDataMap, preDataMap) && compareTime(nowDataMap, preDataMap)) { return true; } } @@ -102,8 +94,7 @@ public class SameUrlDataInterceptor extends RepeatSubmitInterceptor /** * 判断参数是否相同 */ - private boolean compareParams(Map nowMap, Map preMap) - { + private boolean compareParams(Map nowMap, Map preMap) { String nowParams = (String) nowMap.get(REPEAT_PARAMS); String preParams = (String) preMap.get(REPEAT_PARAMS); return nowParams.equals(preParams); @@ -112,12 +103,10 @@ public class SameUrlDataInterceptor extends RepeatSubmitInterceptor /** * 判断两次间隔时间 */ - private boolean compareTime(Map nowMap, Map preMap) - { + private boolean compareTime(Map nowMap, Map preMap) { long time1 = (Long) nowMap.get(REPEAT_TIME); long time2 = (Long) preMap.get(REPEAT_TIME); - if ((time1 - time2) < (this.intervalTime * 1000)) - { + if ((time1 - time2) < (this.intervalTime * 1000)) { return true; } return false; diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/AsyncManager.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/AsyncManager.java index 7387a02c..e8a8e84c 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/AsyncManager.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/AsyncManager.java @@ -3,16 +3,16 @@ package com.ruoyi.framework.manager; import java.util.TimerTask; import java.util.concurrent.ScheduledExecutorService; import java.util.concurrent.TimeUnit; + import com.ruoyi.common.utils.Threads; import com.ruoyi.common.utils.spring.SpringUtils; /** * 异步任务管理器 - * + * * @author ruoyi */ -public class AsyncManager -{ +public class AsyncManager { /** * 操作延迟10毫秒 */ @@ -26,30 +26,28 @@ public class AsyncManager /** * 单例模式 */ - private AsyncManager(){} + private AsyncManager() { + } private static AsyncManager me = new AsyncManager(); - public static AsyncManager me() - { + public static AsyncManager me() { return me; } /** * 执行任务 - * + * * @param task 任务 */ - public void execute(TimerTask task) - { + public void execute(TimerTask task) { executor.schedule(task, OPERATE_DELAY_TIME, TimeUnit.MILLISECONDS); } /** * 停止任务线程池 */ - public void shutdown() - { + public void shutdown() { Threads.shutdownAndAwaitTermination(executor); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/ShutdownManager.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/ShutdownManager.java index e36ca3c5..0d6a67b1 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/ShutdownManager.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/ShutdownManager.java @@ -3,6 +3,7 @@ package com.ruoyi.framework.manager; import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.stereotype.Component; + import javax.annotation.PreDestroy; /** @@ -11,28 +12,22 @@ import javax.annotation.PreDestroy; * @author ruoyi */ @Component -public class ShutdownManager -{ +public class ShutdownManager { private static final Logger logger = LoggerFactory.getLogger("sys-user"); @PreDestroy - public void destroy() - { + public void destroy() { shutdownAsyncManager(); } /** * 停止异步执行任务 */ - private void shutdownAsyncManager() - { - try - { + private void shutdownAsyncManager() { + try { logger.info("====关闭后台任务任务线程池===="); AsyncManager.me().shutdown(); - } - catch (Exception e) - { + } catch (Exception e) { logger.error(e.getMessage(), e); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/factory/AsyncFactory.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/factory/AsyncFactory.java index 17a8f40f..a94953b9 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/factory/AsyncFactory.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/manager/factory/AsyncFactory.java @@ -1,6 +1,7 @@ package com.ruoyi.framework.manager.factory; import java.util.TimerTask; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; import com.ruoyi.common.constant.Constants; @@ -17,32 +18,28 @@ import eu.bitwalker.useragentutils.UserAgent; /** * 异步工厂（产生任务用） - * + * * @author ruoyi */ -public class AsyncFactory -{ +public class AsyncFactory { private static final Logger sys_user_logger = LoggerFactory.getLogger("sys-user"); /** * 记录登录信息 - * + * * @param username 用户名 - * @param status 状态 - * @param message 消息 - * @param args 列表 + * @param status 状态 + * @param message 消息 + * @param args 列表 * @return 任务task */ public static TimerTask recordLogininfor(final String username, final String status, final String message, - final Object... args) - { + final Object... args) { final UserAgent userAgent = UserAgent.parseUserAgentString(ServletUtils.getRequest().getHeader("User-Agent")); final String ip = IpUtils.getIpAddr(ServletUtils.getRequest()); - return new TimerTask() - { + return new TimerTask() { @Override - public void run() - { + public void run() { String address = AddressUtils.getRealAddressByIP(ip); StringBuilder s = new StringBuilder(); s.append(LogUtils.getBlock(ip)); @@ -65,12 +62,9 @@ public class AsyncFactory logininfor.setOs(os); logininfor.setMsg(message); // 日志状态 - if (Constants.LOGIN_SUCCESS.equals(status) || Constants.LOGOUT.equals(status)) - { + if (Constants.LOGIN_SUCCESS.equals(status) || Constants.LOGOUT.equals(status)) { logininfor.setStatus(Constants.SUCCESS); - } - else if (Constants.LOGIN_FAIL.equals(status)) - { + } else if (Constants.LOGIN_FAIL.equals(status)) { logininfor.setStatus(Constants.FAIL); } // 插入数据 @@ -81,17 +75,14 @@ public class AsyncFactory /** * 操作日志记录 - * + * * @param operLog 操作日志信息 * @return 任务task */ - public static TimerTask recordOper(final SysOperLog operLog) - { - return new TimerTask() - { + public static TimerTask recordOper(final SysOperLog operLog) { + return new TimerTask() { @Override - public void run() - { + public void run() { // 远程查询操作地点 operLog.setOperLocation(AddressUtils.getRealAddressByIP(operLog.getOperIp())); SpringUtils.getBean(ISysOperLogService.class).insertOperlog(operLog); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/filter/JwtAuthenticationTokenFilter.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/filter/JwtAuthenticationTokenFilter.java index 3eb24954..58f480b2 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/filter/JwtAuthenticationTokenFilter.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/filter/JwtAuthenticationTokenFilter.java @@ -5,6 +5,7 @@ import javax.servlet.FilterChain; import javax.servlet.ServletException; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.authentication.UsernamePasswordAuthenticationToken; import org.springframework.security.core.context.SecurityContextHolder; @@ -18,22 +19,19 @@ import com.ruoyi.framework.web.service.TokenService; /** * token过滤器 验证token有效性 - * + * * @author ruoyi */ @Component -public class JwtAuthenticationTokenFilter extends OncePerRequestFilter -{ +public class JwtAuthenticationTokenFilter extends OncePerRequestFilter { @Autowired private TokenService tokenService; @Override protected void doFilterInternal(HttpServletRequest request, HttpServletResponse response, FilterChain chain) - throws ServletException, IOException - { + throws ServletException, IOException { LoginUser loginUser = tokenService.getLoginUser(request); - if (StringUtils.isNotNull(loginUser) && StringUtils.isNull(SecurityUtils.getAuthentication())) - { + if (StringUtils.isNotNull(loginUser) && StringUtils.isNull(SecurityUtils.getAuthentication())) { tokenService.verifyToken(loginUser); UsernamePasswordAuthenticationToken authenticationToken = new UsernamePasswordAuthenticationToken(loginUser, null, loginUser.getAuthorities()); authenticationToken.setDetails(new WebAuthenticationDetailsSource().buildDetails(request)); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/AuthenticationEntryPointImpl.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/AuthenticationEntryPointImpl.java index c22dd324..a506100c 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/AuthenticationEntryPointImpl.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/AuthenticationEntryPointImpl.java @@ -4,6 +4,7 @@ import java.io.IOException; import java.io.Serializable; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.springframework.security.core.AuthenticationException; import org.springframework.security.web.AuthenticationEntryPoint; import org.springframework.stereotype.Component; @@ -15,18 +16,16 @@ import com.ruoyi.common.utils.StringUtils; /** * 认证失败处理类 返回未授权 - * + * * @author ruoyi */ @Component -public class AuthenticationEntryPointImpl implements AuthenticationEntryPoint, Serializable -{ +public class AuthenticationEntryPointImpl implements AuthenticationEntryPoint, Serializable { private static final long serialVersionUID = -8970718410437077606L; @Override public void commence(HttpServletRequest request, HttpServletResponse response, AuthenticationException e) - throws IOException - { + throws IOException { int code = HttpStatus.UNAUTHORIZED; String msg = StringUtils.format("请求访问：{}，认证失败，无法访问系统资源", request.getRequestURI()); ServletUtils.renderString(response, JSON.toJSONString(AjaxResult.error(code, msg))); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/LogoutSuccessHandlerImpl.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/LogoutSuccessHandlerImpl.java index e5fc11d0..6df16a6b 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/LogoutSuccessHandlerImpl.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/security/handle/LogoutSuccessHandlerImpl.java @@ -4,6 +4,7 @@ import java.io.IOException; import javax.servlet.ServletException; import javax.servlet.http.HttpServletRequest; import javax.servlet.http.HttpServletResponse; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.context.annotation.Configuration; import org.springframework.security.core.Authentication; @@ -21,27 +22,24 @@ import com.ruoyi.framework.web.service.TokenService; /** * 自定义退出处理类 返回成功 - * + * * @author ruoyi */ @Configuration -public class LogoutSuccessHandlerImpl implements LogoutSuccessHandler -{ +public class LogoutSuccessHandlerImpl implements LogoutSuccessHandler { @Autowired private TokenService tokenService; /** * 退出处理 - * + * * @return */ @Override public void onLogoutSuccess(HttpServletRequest request, HttpServletResponse response, Authentication authentication) - throws IOException, ServletException - { + throws IOException, ServletException { LoginUser loginUser = tokenService.getLoginUser(request); - if (StringUtils.isNotNull(loginUser)) - { + if (StringUtils.isNotNull(loginUser)) { String userName = loginUser.getUsername(); // 删除用户缓存记录 tokenService.delLoginUser(loginUser.getToken()); diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/Server.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/Server.java index 63b03da7..b2fc3d95 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/Server.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/Server.java @@ -4,6 +4,7 @@ import java.net.UnknownHostException; import java.util.LinkedList; import java.util.List; import java.util.Properties; + import com.ruoyi.common.utils.Arith; import com.ruoyi.common.utils.ip.IpUtils; import com.ruoyi.framework.web.domain.server.Cpu; @@ -23,13 +24,12 @@ import oshi.util.Util; /** * 服务器相关信息 - * + * * @author ruoyi */ -public class Server -{ +public class Server { private static final int OSHI_WAIT_SECOND = 1000; - + /** * CPU相关信息 */ @@ -55,58 +55,47 @@ public class Server */ private List sysFiles = new LinkedList(); - public Cpu getCpu() - { + public Cpu getCpu() { return cpu; } - public void setCpu(Cpu cpu) - { + public void setCpu(Cpu cpu) { this.cpu = cpu; } - public Mem getMem() - { + public Mem getMem() { return mem; } - public void setMem(Mem mem) - { + public void setMem(Mem mem) { this.mem = mem; } - public Jvm getJvm() - { + public Jvm getJvm() { return jvm; } - public void setJvm(Jvm jvm) - { + public void setJvm(Jvm jvm) { this.jvm = jvm; } - public Sys getSys() - { + public Sys getSys() { return sys; } - public void setSys(Sys sys) - { + public void setSys(Sys sys) { this.sys = sys; } - public List getSysFiles() - { + public List getSysFiles() { return sysFiles; } - public void setSysFiles(List sysFiles) - { + public void setSysFiles(List sysFiles) { this.sysFiles = sysFiles; } - public void copyTo() throws Exception - { + public void copyTo() throws Exception { SystemInfo si = new SystemInfo(); HardwareAbstractionLayer hal = si.getHardware(); @@ -124,8 +113,7 @@ public class Server /** * 设置CPU信息 */ - private void setCpuInfo(CentralProcessor processor) - { + private void setCpuInfo(CentralProcessor processor) { // CPU信息 long[] prevTicks = processor.getSystemCpuLoadTicks(); Util.sleep(OSHI_WAIT_SECOND); @@ -150,8 +138,7 @@ public class Server /** * 设置内存信息 */ - private void setMemInfo(GlobalMemory memory) - { + private void setMemInfo(GlobalMemory memory) { mem.setTotal(memory.getTotal()); mem.setUsed(memory.getTotal() - memory.getAvailable()); mem.setFree(memory.getAvailable()); @@ -160,8 +147,7 @@ public class Server /** * 设置服务器信息 */ - private void setSysInfo() - { + private void setSysInfo() { Properties props = System.getProperties(); sys.setComputerName(IpUtils.getHostName()); sys.setComputerIp(IpUtils.getHostIp()); @@ -173,8 +159,7 @@ public class Server /** * 设置Java虚拟机 */ - private void setJvmInfo() throws UnknownHostException - { + private void setJvmInfo() throws UnknownHostException { Properties props = System.getProperties(); jvm.setTotal(Runtime.getRuntime().totalMemory()); jvm.setMax(Runtime.getRuntime().maxMemory()); @@ -186,12 +171,10 @@ public class Server /** * 设置磁盘信息 */ - private void setSysFiles(OperatingSystem os) - { + private void setSysFiles(OperatingSystem os) { FileSystem fileSystem = os.getFileSystem(); List fsArray = fileSystem.getFileStores(); - for (OSFileStore fs : fsArray) - { + for (OSFileStore fs : fsArray) { long free = fs.getUsableSpace(); long total = fs.getTotalSpace(); long used = total - free; @@ -209,31 +192,23 @@ public class Server /** * 字节转换 - * + * * @param size 字节大小 * @return 转换后值 */ - public String convertFileSize(long size) - { + public String convertFileSize(long size) { long kb = 1024; long mb = kb * 1024; long gb = mb * 1024; - if (size >= gb) - { + if (size >= gb) { return String.format("%.1f GB", (float) size / gb); - } - else if (size >= mb) - { + } else if (size >= mb) { float f = (float) size / mb; return String.format(f > 100 ? "%.0f MB" : "%.1f MB", f); - } - else if (size >= kb) - { + } else if (size >= kb) { float f = (float) size / kb; return String.format(f > 100 ? "%.0f KB" : "%.1f KB", f); - } - else - { + } else { return String.format("%d B", size); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Cpu.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Cpu.java index a13a66cf..4878bbd3 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Cpu.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Cpu.java @@ -4,11 +4,10 @@ import com.ruoyi.common.utils.Arith; /** * CPU相关信息 - * + * * @author ruoyi */ -public class Cpu -{ +public class Cpu { /** * 核心数 */ @@ -39,63 +38,51 @@ public class Cpu */ private double free; - public int getCpuNum() - { + public int getCpuNum() { return cpuNum; } - public void setCpuNum(int cpuNum) - { + public void setCpuNum(int cpuNum) { this.cpuNum = cpuNum; } - public double getTotal() - { + public double getTotal() { return Arith.round(Arith.mul(total, 100), 2); } - public void setTotal(double total) - { + public void setTotal(double total) { this.total = total; } - public double getSys() - { + public double getSys() { return Arith.round(Arith.mul(sys / total, 100), 2); } - public void setSys(double sys) - { + public void setSys(double sys) { this.sys = sys; } - public double getUsed() - { + public double getUsed() { return Arith.round(Arith.mul(used / total, 100), 2); } - public void setUsed(double used) - { + public void setUsed(double used) { this.used = used; } - public double getWait() - { + public double getWait() { return Arith.round(Arith.mul(wait / total, 100), 2); } - public void setWait(double wait) - { + public void setWait(double wait) { this.wait = wait; } - public double getFree() - { + public double getFree() { return Arith.round(Arith.mul(free / total, 100), 2); } - public void setFree(double free) - { + public void setFree(double free) { this.free = free; } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Jvm.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Jvm.java index 485d201d..62d043b1 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Jvm.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Jvm.java @@ -1,16 +1,16 @@ package com.ruoyi.framework.web.domain.server; import java.lang.management.ManagementFactory; + import com.ruoyi.common.utils.Arith; import com.ruoyi.common.utils.DateUtils; /** * JVM相关信息 - * + * * @author ruoyi */ -public class Jvm -{ +public class Jvm { /** * 当前JVM占用的内存总数(M) */ @@ -36,87 +36,72 @@ public class Jvm */ private String home; - public double getTotal() - { + public double getTotal() { return Arith.div(total, (1024 * 1024), 2); } - public void setTotal(double total) - { + public void setTotal(double total) { this.total = total; } - public double getMax() - { + public double getMax() { return Arith.div(max, (1024 * 1024), 2); } - public void setMax(double max) - { + public void setMax(double max) { this.max = max; } - public double getFree() - { + public double getFree() { return Arith.div(free, (1024 * 1024), 2); } - public void setFree(double free) - { + public void setFree(double free) { this.free = free; } - public double getUsed() - { + public double getUsed() { return Arith.div(total - free, (1024 * 1024), 2); } - public double getUsage() - { + public double getUsage() { return Arith.mul(Arith.div(total - free, total, 4), 100); } /** * 获取JDK名称 */ - public String getName() - { + public String getName() { return ManagementFactory.getRuntimeMXBean().getVmName(); } - public String getVersion() - { + public String getVersion() { return version; } - public void setVersion(String version) - { + public void setVersion(String version) { this.version = version; } - public String getHome() - { + public String getHome() { return home; } - public void setHome(String home) - { + public void setHome(String home) { this.home = home; } /** * JDK启动时间 */ - public String getStartTime() - { + public String getStartTime() { return DateUtils.parseDateToStr(DateUtils.YYYY_MM_DD_HH_MM_SS, DateUtils.getServerStartDate()); } /** * JDK运行时间 */ - public String getRunTime() - { + public String getRunTime() { return DateUtils.getDatePoor(DateUtils.getNowDate(), DateUtils.getServerStartDate()); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Mem.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Mem.java index 13eec521..f065d819 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Mem.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Mem.java @@ -4,11 +4,10 @@ import com.ruoyi.common.utils.Arith; /** * 內存相关信息 - * + * * @author ruoyi */ -public class Mem -{ +public class Mem { /** * 内存总量 */ @@ -24,38 +23,31 @@ public class Mem */ private double free; - public double getTotal() - { + public double getTotal() { return Arith.div(total, (1024 * 1024 * 1024), 2); } - public void setTotal(long total) - { + public void setTotal(long total) { this.total = total; } - public double getUsed() - { + public double getUsed() { return Arith.div(used, (1024 * 1024 * 1024), 2); } - public void setUsed(long used) - { + public void setUsed(long used) { this.used = used; } - public double getFree() - { + public double getFree() { return Arith.div(free, (1024 * 1024 * 1024), 2); } - public void setFree(long free) - { + public void setFree(long free) { this.free = free; } - public double getUsage() - { + public double getUsage() { return Arith.mul(Arith.div(used, total, 4), 100); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Sys.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Sys.java index 45d64d9c..7c3857ee 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Sys.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/Sys.java @@ -2,11 +2,10 @@ package com.ruoyi.framework.web.domain.server; /** * 系统相关信息 - * + * * @author ruoyi */ -public class Sys -{ +public class Sys { /** * 服务器名称 */ @@ -32,53 +31,43 @@ public class Sys */ private String osArch; - public String getComputerName() - { + public String getComputerName() { return computerName; } - public void setComputerName(String computerName) - { + public void setComputerName(String computerName) { this.computerName = computerName; } - public String getComputerIp() - { + public String getComputerIp() { return computerIp; } - public void setComputerIp(String computerIp) - { + public void setComputerIp(String computerIp) { this.computerIp = computerIp; } - public String getUserDir() - { + public String getUserDir() { return userDir; } - public void setUserDir(String userDir) - { + public void setUserDir(String userDir) { this.userDir = userDir; } - public String getOsName() - { + public String getOsName() { return osName; } - public void setOsName(String osName) - { + public void setOsName(String osName) { this.osName = osName; } - public String getOsArch() - { + public String getOsArch() { return osArch; } - public void setOsArch(String osArch) - { + public void setOsArch(String osArch) { this.osArch = osArch; } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/SysFile.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/SysFile.java index 1320cde6..0c4710a6 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/SysFile.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/domain/server/SysFile.java @@ -2,11 +2,10 @@ package com.ruoyi.framework.web.domain.server; /** * 系统文件相关信息 - * + * * @author ruoyi */ -public class SysFile -{ +public class SysFile { /** * 盘符路径 */ @@ -42,73 +41,59 @@ public class SysFile */ private double usage; - public String getDirName() - { + public String getDirName() { return dirName; } - public void setDirName(String dirName) - { + public void setDirName(String dirName) { this.dirName = dirName; } - public String getSysTypeName() - { + public String getSysTypeName() { return sysTypeName; } - public void setSysTypeName(String sysTypeName) - { + public void setSysTypeName(String sysTypeName) { this.sysTypeName = sysTypeName; } - public String getTypeName() - { + public String getTypeName() { return typeName; } - public void setTypeName(String typeName) - { + public void setTypeName(String typeName) { this.typeName = typeName; } - public String getTotal() - { + public String getTotal() { return total; } - public void setTotal(String total) - { + public void setTotal(String total) { this.total = total; } - public String getFree() - { + public String getFree() { return free; } - public void setFree(String free) - { + public void setFree(String free) { this.free = free; } - public String getUsed() - { + public String getUsed() { return used; } - public void setUsed(String used) - { + public void setUsed(String used) { this.used = used; } - public double getUsage() - { + public double getUsage() { return usage; } - public void setUsage(double usage) - { + public void setUsage(double usage) { this.usage = usage; } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/exception/GlobalExceptionHandler.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/exception/GlobalExceptionHandler.java index 845c6f25..44d5222d 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/exception/GlobalExceptionHandler.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/exception/GlobalExceptionHandler.java @@ -19,20 +19,18 @@ import com.ruoyi.common.utils.StringUtils; /** * 全局异常处理器 - * + * * @author ruoyi */ @RestControllerAdvice -public class GlobalExceptionHandler -{ +public class GlobalExceptionHandler { private static final Logger log = LoggerFactory.getLogger(GlobalExceptionHandler.class); /** * 基础异常 */ @ExceptionHandler(BaseException.class) - public AjaxResult baseException(BaseException e) - { + public AjaxResult baseException(BaseException e) { return AjaxResult.error(e.getMessage()); } @@ -40,46 +38,39 @@ public class GlobalExceptionHandler * 业务异常 */ @ExceptionHandler(CustomException.class) - public AjaxResult businessException(CustomException e) - { - if (StringUtils.isNull(e.getCode())) - { + public AjaxResult businessException(CustomException e) { + if (StringUtils.isNull(e.getCode())) { return AjaxResult.error(e.getMessage()); } return AjaxResult.error(e.getCode(), e.getMessage()); } @ExceptionHandler(NoHandlerFoundException.class) - public AjaxResult handlerNoFoundException(Exception e) - { + public AjaxResult handlerNoFoundException(Exception e) { log.error(e.getMessage(), e); return AjaxResult.error(HttpStatus.NOT_FOUND, "路径不存在，请检查路径是否正确"); } @ExceptionHandler(AccessDeniedException.class) - public AjaxResult handleAuthorizationException(AccessDeniedException e) - { + public AjaxResult handleAuthorizationException(AccessDeniedException e) { log.error(e.getMessage()); return AjaxResult.error(HttpStatus.FORBIDDEN, "没有权限，请联系管理员授权"); } @ExceptionHandler(AccountExpiredException.class) - public AjaxResult handleAccountExpiredException(AccountExpiredException e) - { + public AjaxResult handleAccountExpiredException(AccountExpiredException e) { log.error(e.getMessage(), e); return AjaxResult.error(e.getMessage()); } @ExceptionHandler(UsernameNotFoundException.class) - public AjaxResult handleUsernameNotFoundException(UsernameNotFoundException e) - { + public AjaxResult handleUsernameNotFoundException(UsernameNotFoundException e) { log.error(e.getMessage(), e); return AjaxResult.error(e.getMessage()); } @ExceptionHandler(Exception.class) - public AjaxResult handleException(Exception e) - { + public AjaxResult handleException(Exception e) { log.error(e.getMessage(), e); return AjaxResult.error(e.getMessage()); } @@ -88,8 +79,7 @@ public class GlobalExceptionHandler * 自定义验证异常 */ @ExceptionHandler(BindException.class) - public AjaxResult validatedBindException(BindException e) - { + public AjaxResult validatedBindException(BindException e) { log.error(e.getMessage(), e); String message = e.getAllErrors().get(0).getDefaultMessage(); return AjaxResult.error(message); @@ -99,8 +89,7 @@ public class GlobalExceptionHandler * 自定义验证异常 */ @ExceptionHandler(MethodArgumentNotValidException.class) - public Object validExceptionHandler(MethodArgumentNotValidException e) - { + public Object validExceptionHandler(MethodArgumentNotValidException e) { log.error(e.getMessage(), e); String message = e.getBindingResult().getFieldError().getDefaultMessage(); return AjaxResult.error(message); @@ -110,8 +99,7 @@ public class GlobalExceptionHandler * 演示模式异常 */ @ExceptionHandler(DemoModeException.class) - public AjaxResult demoModeException(DemoModeException e) - { + public AjaxResult demoModeException(DemoModeException e) { return AjaxResult.error("演示模式，不允许操作"); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/AuthService.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/AuthService.java new file mode 100644 index 00000000..e90b554c --- /dev/null +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/AuthService.java @@ -0,0 +1,106 @@ +package com.ruoyi.framework.web.service; + + +import com.ruoyi.common.constant.Constants; +import com.ruoyi.common.core.domain.entity.SysUser; +import com.ruoyi.common.core.domain.model.LoginUser; +import com.ruoyi.common.exception.CustomException; +import com.ruoyi.common.exception.user.UserPasswordNotMatchException; +import com.ruoyi.common.utils.MessageUtils; +import com.ruoyi.common.utils.SecurityUtils; +import com.ruoyi.common.utils.sign.Md5Utils; +import com.ruoyi.framework.manager.AsyncManager; +import com.ruoyi.framework.manager.factory.AsyncFactory; +import com.ruoyi.system.domain.TUserAccountInfo; +import com.ruoyi.system.domain.TUserLoginLog; +import com.ruoyi.system.mapper.TUserAccountInfoMapper; +import com.ruoyi.system.mapper.TUserLoginLogMapper; +import com.ruoyi.system.service.ISysUserService; +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.security.authentication.AuthenticationManager; +import org.springframework.security.authentication.BadCredentialsException; +import org.springframework.security.authentication.UsernamePasswordAuthenticationToken; +import org.springframework.security.core.Authentication; +import org.springframework.security.core.userdetails.UserDetails; +import org.springframework.stereotype.Service; +import org.springframework.transaction.annotation.Transactional; + +import javax.annotation.Resource; +import java.util.Date; +import java.util.HashSet; +import java.util.List; +import java.util.Set; + +/** + * 类名: AuthServiceImpl + * 描述: TODO + * 时间: 2021-08-11,0011 12:34 + * 开发人: admin + */ +@Service +public class AuthService { + + @Autowired + private TUserAccountInfoMapper userAccountInfoMapper; + + @Autowired + private TUserLoginLogMapper userLoginLogMapper; + + @Autowired + private TokenService tokenService; + + @Resource + private AuthenticationManager authenticationManager; + @Autowired + private ISysUserService sysUserService; + + + @Transactional + public String mpLogin(String code, String openId, String sessionKey, String accessToken) { + //查询用户是否存在，不存在创建 + SysUser sysUser = sysUserService.selectUserByOpenId(openId); + if(sysUser==null) + { + //创建用户 + sysUser=new SysUser(); + sysUser.setOpenId(openId); + sysUser.setNickName("微信注册用户"); + sysUser.setPassword("123456"); + sysUser.setUserName(Md5Utils.hash(openId).toUpperCase().substring(20)); + sysUser.setCreateBy("微信小程序"); + sysUser.setPassword(SecurityUtils.encryptPassword(sysUser.getPassword())); + sysUserService.insertUser(sysUser); + } +// Authentication authentication = null; +// try { +// +// // 该方法会去调用 UserDetailsServiceImpl.loadUserByUsername +// authentication = authenticationManager +// .authenticate(new UsernamePasswordAuthenticationToken(openId, sysUser.getPassword())); +// }catch (Exception e){ +// e.printStackTrace(); +// } +// LoginUser loginUser = (LoginUser) authentication.getPrincipal(); + Set permissions=new HashSet<>(); + permissions.add("*:*:*"); + LoginUser loginUser = new LoginUser(sysUser,permissions); + + // 生成token + String token= tokenService.createToken(loginUser); + return token; + + } + +// public UserDetails loadUserByOpenId(String openId) { +// TUserAccountInfoExample tUserAccountInfoExample = new TUserAccountInfoExample(); +// TUserAccountInfoExample.Criteria criteria = tUserAccountInfoExample.createCriteria(); +// criteria.andOpenIdEqualTo(openId); +// TUserAccountInfo tUserAccountInfo = userAccountInfoMapper.selectOneByExample(tUserAccountInfoExample); +// if (tUserAccountInfo == null) { +// return null; +// } else { +// UserInfoDetails userInfoDetails = new UserInfoDetails(tUserAccountInfo); +// return userInfoDetails; +// } +// } +} diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/PermissionService.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/PermissionService.java index 277e4b99..d91532e5 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/PermissionService.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/PermissionService.java @@ -1,6 +1,7 @@ package com.ruoyi.framework.web.service; import java.util.Set; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import org.springframework.util.CollectionUtils; @@ -11,16 +12,19 @@ import com.ruoyi.common.utils.StringUtils; /** * RuoYi首创 自定义权限实现，ss取自SpringSecurity首字母 - * + * * @author ruoyi */ @Service("ss") -public class PermissionService -{ - /** 所有权限标识 */ +public class PermissionService { + /** + * 所有权限标识 + */ private static final String ALL_PERMISSION = "*:*:*"; - /** 管理员角色权限标识 */ + /** + * 管理员角色权限标识 + */ private static final String SUPER_ADMIN = "admin"; private static final String ROLE_DELIMETER = ","; @@ -32,19 +36,16 @@ public class PermissionService /** * 验证用户是否具备某权限 - * + * * @param permission 权限字符串 * @return 用户是否具备某权限 */ - public boolean hasPermi(String permission) - { - if (StringUtils.isEmpty(permission)) - { + public boolean hasPermi(String permission) { + if (StringUtils.isEmpty(permission)) { return false; } LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); - if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getPermissions())) - { + if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getPermissions())) { return false; } return hasPermissions(loginUser.getPermissions(), permission); @@ -56,8 +57,7 @@ public class PermissionService * @param permission 权限字符串 * @return 用户是否不具备某权限 */ - public boolean lacksPermi(String permission) - { + public boolean lacksPermi(String permission) { return hasPermi(permission) != true; } @@ -67,22 +67,17 @@ public class PermissionService * @param permissions 以 PERMISSION_NAMES_DELIMETER 为分隔符的权限列表 * @return 用户是否具有以下任意一个权限 */ - public boolean hasAnyPermi(String permissions) - { - if (StringUtils.isEmpty(permissions)) - { + public boolean hasAnyPermi(String permissions) { + if (StringUtils.isEmpty(permissions)) { return false; } LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); - if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getPermissions())) - { + if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getPermissions())) { return false; } Set authorities = loginUser.getPermissions(); - for (String permission : permissions.split(PERMISSION_DELIMETER)) - { - if (permission != null && hasPermissions(authorities, permission)) - { + for (String permission : permissions.split(PERMISSION_DELIMETER)) { + if (permission != null && hasPermissions(authorities, permission)) { return true; } } @@ -91,26 +86,21 @@ public class PermissionService /** * 判断用户是否拥有某个角色 - * + * * @param role 角色字符串 * @return 用户是否具备某角色 */ - public boolean hasRole(String role) - { - if (StringUtils.isEmpty(role)) - { + public boolean hasRole(String role) { + if (StringUtils.isEmpty(role)) { return false; } LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); - if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getUser().getRoles())) - { + if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getUser().getRoles())) { return false; } - for (SysRole sysRole : loginUser.getUser().getRoles()) - { + for (SysRole sysRole : loginUser.getUser().getRoles()) { String roleKey = sysRole.getRoleKey(); - if (SUPER_ADMIN.equals(roleKey) || roleKey.equals(StringUtils.trim(role))) - { + if (SUPER_ADMIN.equals(roleKey) || roleKey.equals(StringUtils.trim(role))) { return true; } } @@ -123,8 +113,7 @@ public class PermissionService * @param role 角色名称 * @return 用户是否不具备某角色 */ - public boolean lacksRole(String role) - { + public boolean lacksRole(String role) { return hasRole(role) != true; } @@ -134,21 +123,16 @@ public class PermissionService * @param roles 以 ROLE_NAMES_DELIMETER 为分隔符的角色列表 * @return 用户是否具有以下任意一个角色 */ - public boolean hasAnyRoles(String roles) - { - if (StringUtils.isEmpty(roles)) - { + public boolean hasAnyRoles(String roles) { + if (StringUtils.isEmpty(roles)) { return false; } LoginUser loginUser = tokenService.getLoginUser(ServletUtils.getRequest()); - if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getUser().getRoles())) - { + if (StringUtils.isNull(loginUser) || CollectionUtils.isEmpty(loginUser.getUser().getRoles())) { return false; } - for (String role : roles.split(ROLE_DELIMETER)) - { - if (hasRole(role)) - { + for (String role : roles.split(ROLE_DELIMETER)) { + if (hasRole(role)) { return true; } } @@ -157,13 +141,12 @@ public class PermissionService /** * 判断是否包含权限 - * + * * @param permissions 权限列表 - * @param permission 权限字符串 + * @param permission 权限字符串 * @return 用户是否具备某权限 */ - private boolean hasPermissions(Set permissions, String permission) - { + private boolean hasPermissions(Set permissions, String permission) { return permissions.contains(ALL_PERMISSION) || permissions.contains(StringUtils.trim(permission)); } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysLoginService.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysLoginService.java index b56b4370..528461ca 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysLoginService.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysLoginService.java @@ -1,6 +1,19 @@ package com.ruoyi.framework.web.service; import javax.annotation.Resource; + +import cn.binarywang.wx.miniapp.api.WxMaService; +import cn.binarywang.wx.miniapp.bean.WxMaJscode2SessionResult; +import cn.binarywang.wx.miniapp.config.WxMaConfig; +import com.google.gson.Gson; +import com.ruoyi.common.core.domain.entity.SysUser; +import com.ruoyi.common.core.domain.model.MpLoginBody; +import com.ruoyi.common.utils.SecurityUtils; +import com.ruoyi.common.utils.StringUtils; +import com.ruoyi.common.utils.sign.Md5Utils; +import com.ruoyi.common.utils.uuid.UUID; +import com.ruoyi.system.service.ISysUserService; +import com.ruoyi.system.service.impl.SysUserServiceImpl; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.authentication.AuthenticationManager; import org.springframework.security.authentication.BadCredentialsException; @@ -17,15 +30,18 @@ import com.ruoyi.common.exception.user.UserPasswordNotMatchException; import com.ruoyi.common.utils.MessageUtils; import com.ruoyi.framework.manager.AsyncManager; import com.ruoyi.framework.manager.factory.AsyncFactory; +import org.springframework.transaction.annotation.Transactional; + +import java.util.HashMap; +import java.util.Map; /** * 登录校验方法 - * + * * @author ruoyi */ @Component -public class SysLoginService -{ +public class SysLoginService { @Autowired private TokenService tokenService; @@ -35,47 +51,47 @@ public class SysLoginService @Autowired private RedisCache redisCache; + @Autowired + private WxMaService wxMaService; + + @Autowired + private AuthService authService; + + @Autowired + private ISysUserService sysUserService; + /** * 登录验证 - * + * * @param username 用户名 * @param password 密码 - * @param code 验证码 - * @param uuid 唯一标识 + * @param code 验证码 + * @param uuid 唯一标识 * @return 结果 */ - public String login(String username, String password, String code, String uuid) - { + public String login(String username, String password, String code, String uuid) { String verifyKey = Constants.CAPTCHA_CODE_KEY + uuid; String captcha = redisCache.getCacheObject(verifyKey); redisCache.deleteObject(verifyKey); - if (captcha == null) - { + if (captcha == null) { AsyncManager.me().execute(AsyncFactory.recordLogininfor(username, Constants.LOGIN_FAIL, MessageUtils.message("user.jcaptcha.expire"))); throw new CaptchaExpireException(); } - if (!code.equalsIgnoreCase(captcha)) - { + if (!code.equalsIgnoreCase(captcha)) { AsyncManager.me().execute(AsyncFactory.recordLogininfor(username, Constants.LOGIN_FAIL, MessageUtils.message("user.jcaptcha.error"))); throw new CaptchaException(); } // 用户验证 Authentication authentication = null; - try - { + try { // 该方法会去调用UserDetailsServiceImpl.loadUserByUsername authentication = authenticationManager .authenticate(new UsernamePasswordAuthenticationToken(username, password)); - } - catch (Exception e) - { - if (e instanceof BadCredentialsException) - { + } catch (Exception e) { + if (e instanceof BadCredentialsException) { AsyncManager.me().execute(AsyncFactory.recordLogininfor(username, Constants.LOGIN_FAIL, MessageUtils.message("user.password.not.match"))); throw new UserPasswordNotMatchException(); - } - else - { + } else { AsyncManager.me().execute(AsyncFactory.recordLogininfor(username, Constants.LOGIN_FAIL, e.getMessage())); throw new CustomException(e.getMessage()); } @@ -85,4 +101,64 @@ public class SysLoginService // 生成token return tokenService.createToken(loginUser); } + + public String mpLlogin(MpLoginBody loginBody) { + + System.out.println(loginBody); + String code = loginBody.getCode(); + if (StringUtils.isEmpty(code)) { + throw new CustomException("无效的code"); + + } else { + //存在有效的 code + System.out.println("这里请求了一次code==========" + code); + WxMaJscode2SessionResult session = null; + try { + session = wxMaService.getUserService().getSessionInfo(code); + } catch (Exception e) { + e.printStackTrace(); + throw new CustomException(e.getMessage()); + } + WxMaConfig wxMaConfig = wxMaService.getWxMaConfig(); + System.out.println(wxMaConfig); + System.out.println(new Gson().toJson(wxMaConfig)); + String sessionKey = session.getSessionKey(); + String openid = session.getOpenid(); + String unionid = session.getUnionid(); + System.out.println("sessionKey= " + sessionKey); + System.out.println("openid= " + openid); + System.out.println("unionid= " + unionid); + //通过openId sessionKey 生成3rd session 返回给客户端小程序 + String accessToken = UUID.fastUUID().toString().replace("-", ""); + + String token = authService.mpLogin(code, openid, sessionKey, accessToken); + +// TUserAccountInfo userInfo = userAccoutInfoSevice.getUserInfo(openid); +// Integer userType = userInfo.getUserType(); + + Map data = new HashMap<>(); + data.put("token", token); +// data.put("userInfo", userInfo); +// data.put("userType", userType); + + +// if (userType.intValue() == 0)//新用户 +// { +//// HashMap supplierInfo = supplierInfoSevice.getSupplierInfo(userInfo.getId()); +//// data.put("userInfo", userInfo); +//// data.put("supplyInfo", supplierInfo); +// +// //已授权用户 +// } else if (userType.intValue() == 1)//注册老用户 +// { +//// data.put("userInfo", userInfo); +// } else if (userType.intValue() == 2) { //注册商家 +//// data.put("userInfo", userInfo); +//// data.put("userType", userType); +// } + + System.out.println("jwtToken : " + token); + return token; + } + } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysPermissionService.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysPermissionService.java index feb80387..f1dfd2b6 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysPermissionService.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/SysPermissionService.java @@ -2,6 +2,7 @@ package com.ruoyi.framework.web.service; import java.util.HashSet; import java.util.Set; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Component; import com.ruoyi.common.core.domain.entity.SysUser; @@ -10,12 +11,11 @@ import com.ruoyi.system.service.ISysRoleService; /** * 用户权限处理 - * + * * @author ruoyi */ @Component -public class SysPermissionService -{ +public class SysPermissionService { @Autowired private ISysRoleService roleService; @@ -24,20 +24,16 @@ public class SysPermissionService /** * 获取角色数据权限 - * + * * @param user 用户信息 * @return 角色权限信息 */ - public Set getRolePermission(SysUser user) - { + public Set getRolePermission(SysUser user) { Set roles = new HashSet(); // 管理员拥有所有权限 - if (user.isAdmin()) - { + if (user.isAdmin()) { roles.add("admin"); - } - else - { + } else { roles.addAll(roleService.selectRolePermissionByUserId(user.getUserId())); } return roles; @@ -45,20 +41,16 @@ public class SysPermissionService /** * 获取菜单数据权限 - * + * * @param user 用户信息 * @return 菜单权限信息 */ - public Set getMenuPermission(SysUser user) - { + public Set getMenuPermission(SysUser user) { Set perms = new HashSet(); // 管理员拥有所有权限 - if (user.isAdmin()) - { + if (user.isAdmin()) { perms.add("*:*:*"); - } - else - { + } else { perms.addAll(menuService.selectMenuPermsByUserId(user.getUserId())); } return perms; diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/TokenService.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/TokenService.java index 00238559..ff9ede00 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/TokenService.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/TokenService.java @@ -4,6 +4,7 @@ import java.util.HashMap; import java.util.Map; import java.util.concurrent.TimeUnit; import javax.servlet.http.HttpServletRequest; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.beans.factory.annotation.Value; import org.springframework.stereotype.Component; @@ -26,8 +27,7 @@ import io.jsonwebtoken.SignatureAlgorithm; * @author ruoyi */ @Component -public class TokenService -{ +public class TokenService { // 令牌自定义标识 @Value("${token.header}") private String header; @@ -54,12 +54,16 @@ public class TokenService * * @return 用户信息 */ - public LoginUser getLoginUser(HttpServletRequest request) - { + public LoginUser getLoginUser(HttpServletRequest request) { // 获取请求携带的令牌 String token = getToken(request); - if (StringUtils.isNotEmpty(token)) + String requestURI = request.getRequestURI(); + StringBuffer requestURL = request.getRequestURL(); + if(requestURI.contains( "wxLogin")) { + return null; + } + if (StringUtils.isNotEmpty(token) ) { Claims claims = parseToken(token); // 解析对应的权限以及用户信息 String uuid = (String) claims.get(Constants.LOGIN_USER_KEY); @@ -73,10 +77,8 @@ public class TokenService /** * 设置用户身份信息 */ - public void setLoginUser(LoginUser loginUser) - { - if (StringUtils.isNotNull(loginUser) && StringUtils.isNotEmpty(loginUser.getToken())) - { + public void setLoginUser(LoginUser loginUser) { + if (StringUtils.isNotNull(loginUser) && StringUtils.isNotEmpty(loginUser.getToken())) { refreshToken(loginUser); } } @@ -84,10 +86,8 @@ public class TokenService /** * 删除用户身份信息 */ - public void delLoginUser(String token) - { - if (StringUtils.isNotEmpty(token)) - { + public void delLoginUser(String token) { + if (StringUtils.isNotEmpty(token)) { String userKey = getTokenKey(token); redisCache.deleteObject(userKey); } @@ -99,8 +99,7 @@ public class TokenService * @param loginUser 用户信息 * @return 令牌 */ - public String createToken(LoginUser loginUser) - { + public String createToken(LoginUser loginUser) { String token = IdUtils.fastUUID(); loginUser.setToken(token); setUserAgent(loginUser); @@ -117,12 +116,10 @@ public class TokenService * @param loginUser * @return 令牌 */ - public void verifyToken(LoginUser loginUser) - { + public void verifyToken(LoginUser loginUser) { long expireTime = loginUser.getExpireTime(); long currentTime = System.currentTimeMillis(); - if (expireTime - currentTime <= MILLIS_MINUTE_TEN) - { + if (expireTime - currentTime <= MILLIS_MINUTE_TEN) { refreshToken(loginUser); } } @@ -132,8 +129,7 @@ public class TokenService * * @param loginUser 登录信息 */ - public void refreshToken(LoginUser loginUser) - { + public void refreshToken(LoginUser loginUser) { loginUser.setLoginTime(System.currentTimeMillis()); loginUser.setExpireTime(loginUser.getLoginTime() + expireTime * MILLIS_MINUTE); // 根据uuid将loginUser缓存 @@ -146,8 +142,7 @@ public class TokenService * * @param loginUser 登录信息 */ - public void setUserAgent(LoginUser loginUser) - { + public void setUserAgent(LoginUser loginUser) { UserAgent userAgent = UserAgent.parseUserAgentString(ServletUtils.getRequest().getHeader("User-Agent")); String ip = IpUtils.getIpAddr(ServletUtils.getRequest()); loginUser.setIpaddr(ip); @@ -162,8 +157,7 @@ public class TokenService * @param claims 数据声明 * @return 令牌 */ - private String createToken(Map claims) - { + private String createToken(Map claims) { String token = Jwts.builder() .setClaims(claims) .signWith(SignatureAlgorithm.HS512, secret).compact(); @@ -176,8 +170,7 @@ public class TokenService * @param token 令牌 * @return 数据声明 */ - private Claims parseToken(String token) - { + private Claims parseToken(String token) { return Jwts.parser() .setSigningKey(secret) .parseClaimsJws(token) @@ -190,8 +183,7 @@ public class TokenService * @param token 令牌 * @return 用户名 */ - public String getUsernameFromToken(String token) - { + public String getUsernameFromToken(String token) { Claims claims = parseToken(token); return claims.getSubject(); } @@ -202,18 +194,15 @@ public class TokenService * @param request * @return token */ - private String getToken(HttpServletRequest request) - { + private String getToken(HttpServletRequest request) { String token = request.getHeader(header); - if (StringUtils.isNotEmpty(token) && token.startsWith(Constants.TOKEN_PREFIX)) - { + if (StringUtils.isNotEmpty(token) && token.startsWith(Constants.TOKEN_PREFIX)) { token = token.replace(Constants.TOKEN_PREFIX, ""); } return token; } - private String getTokenKey(String uuid) - { + private String getTokenKey(String uuid) { return Constants.LOGIN_TOKEN_KEY + uuid; } } diff --git a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/UserDetailsServiceImpl.java b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/UserDetailsServiceImpl.java index 35fd05e2..9b60dedb 100644 --- a/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/UserDetailsServiceImpl.java +++ b/spring-boot/ruoyi-framework/src/main/java/com/ruoyi/framework/web/service/UserDetailsServiceImpl.java @@ -1,5 +1,7 @@ package com.ruoyi.framework.web.service; +import com.ruoyi.system.domain.TUserAccountInfo; +import com.ruoyi.system.service.impl.TUserAccountInfoServiceImpl; import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.beans.factory.annotation.Autowired; @@ -14,14 +16,16 @@ import com.ruoyi.common.exception.BaseException; import com.ruoyi.common.utils.StringUtils; import com.ruoyi.system.service.ISysUserService; +import java.util.HashSet; +import java.util.List; + /** * 用户验证处理 * * @author ruoyi */ @Service -public class UserDetailsServiceImpl implements UserDetailsService -{ +public class UserDetailsServiceImpl implements UserDetailsService { private static final Logger log = LoggerFactory.getLogger(UserDetailsServiceImpl.class); @Autowired @@ -30,22 +34,27 @@ public class UserDetailsServiceImpl implements UserDetailsService @Autowired private SysPermissionService permissionService; + @Autowired + private TUserAccountInfoServiceImpl userAccountInfoService; + @Override - public UserDetails loadUserByUsername(String username) throws UsernameNotFoundException - { + public UserDetails loadUserByUsername(String username) throws UsernameNotFoundException { SysUser user = userService.selectUserByUserName(username); - if (StringUtils.isNull(user)) - { + if (user == null) { + //微信小程序登陆 + user = userService.selectUserByOpenId(username); + if (user == null ) { + log.info("新用户登录：{} ", username); + } + return createLoginUser(user); + } + if (StringUtils.isNull(user)) { log.info("登录用户：{} 不存在.", username); throw new UsernameNotFoundException("登录用户：" + username + " 不存在"); - } - else if (UserStatus.DELETED.getCode().equals(user.getDelFlag())) - { + } else if (UserStatus.DELETED.getCode().equals(user.getDelFlag())) { log.info("登录用户：{} 已被删除.", username); throw new BaseException("对不起，您的账号：" + username + " 已被删除"); - } - else if (UserStatus.DISABLE.getCode().equals(user.getStatus())) - { + } else if (UserStatus.DISABLE.getCode().equals(user.getStatus())) { log.info("登录用户：{} 已被停用.", username); throw new BaseException("对不起，您的账号：" + username + " 已停用"); } @@ -53,8 +62,13 @@ public class UserDetailsServiceImpl implements UserDetailsService return createLoginUser(user); } - public UserDetails createLoginUser(SysUser user) - { + public UserDetails createLoginUser(SysUser user) { return new LoginUser(user, permissionService.getMenuPermission(user)); } + + public UserDetails createWxLoginUser(SysUser user) { + HashSet permissions = new HashSet<>(); + permissions.add("*:*:*"); + return new LoginUser(user, permissions); + } } diff --git a/spring-boot/ruoyi-generator/pom.xml b/spring-boot/ruoyi-generator/pom.xml index 6e9802b9..62bd419b 100644 --- a/spring-boot/ruoyi-generator/pom.xml +++ b/spring-boot/ruoyi-generator/pom.xml @@ -28,6 +28,15 @@ com.ruoyi ruoyi-common + + com.baomidou + mybatis-plus-generator + 3.3.2 + + + mysql + mysql-connector-java + diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/SggCodeGenerator.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/SggCodeGenerator.java new file mode 100644 index 00000000..4cc8e9ae --- /dev/null +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/SggCodeGenerator.java @@ -0,0 +1,70 @@ +package com.ruoyi.generator; + +import com.baomidou.mybatisplus.annotation.DbType; +import com.baomidou.mybatisplus.annotation.IdType; +import com.baomidou.mybatisplus.generator.AutoGenerator; +import com.baomidou.mybatisplus.generator.config.DataSourceConfig; +import com.baomidou.mybatisplus.generator.config.GlobalConfig; +import com.baomidou.mybatisplus.generator.config.PackageConfig; +import com.baomidou.mybatisplus.generator.config.StrategyConfig; +import com.baomidou.mybatisplus.generator.config.rules.DateType; +import com.baomidou.mybatisplus.generator.config.rules.NamingStrategy; + +public class SggCodeGenerator { + + public static void main(String[] args) { + + // 1、创建代码生成器 + AutoGenerator mpg = new AutoGenerator(); + + // 2、全局配置 + GlobalConfig gc = new GlobalConfig(); + String projectPath = System.getProperty("user.dir"); + gc.setOutputDir(projectPath + "/ruoyi-system/src/main/java"); + gc.setAuthor("wxy"); + gc.setOpen(false); //生成后是否打开资源管理器 + gc.setFileOverride(false); //重新生成时文件是否覆盖 + gc.setServiceName("%sService"); //去掉Service接口的首字母I + gc.setIdType(IdType.ID_WORKER_STR); //主键策略 + gc.setDateType(DateType.ONLY_DATE);//定义生成的实体类中日期类型 + gc.setSwagger2(false);//开启Swagger2模式 + + mpg.setGlobalConfig(gc); + + // 3、数据源配置 + DataSourceConfig dsc = new DataSourceConfig(); + dsc.setUrl("jdbc:mysql://51xy.xyz:3316/develop_xiaoyi_wumei?useUnicode=true&characterEncoding=utf8&zeroDateTimeBehavior=convertToNull&useSSL=true&serverTimezone=GMT%2B8"); + dsc.setDriverName("com.mysql.cj.jdbc.Driver"); + dsc.setUsername("xiaoyi"); + dsc.setPassword("123456"); + dsc.setDbType(DbType.MYSQL); + mpg.setDataSource(dsc); + + // 4、包配置 + PackageConfig pc = new PackageConfig(); + pc.setModuleName(null); //模块名 + pc.setParent("com.ruoyi.common.core"); + pc.setController("controller"); + pc.setEntity("entity"); + pc.setService("service"); + pc.setMapper("mapper"); + mpg.setPackageInfo(pc); + + // 5、策略配置 + StrategyConfig strategy = new StrategyConfig(); + strategy.setTablePrefix("t_%");//对那一张表生成代码 + strategy.setNaming(NamingStrategy.underline_to_camel);//数据库表映射到实体的命名策略 + strategy.setTablePrefix(pc.getModuleName() + "_"); //生成实体时去掉表前缀 + + strategy.setColumnNaming(NamingStrategy.underline_to_camel);//数据库表字段映射到实体的命名策略 + strategy.setEntityLombokModel(true); // lombok 模型 @Accessors(chain = true) setter链式操作 + + strategy.setRestControllerStyle(true); //restful api风格控制器 + strategy.setControllerMappingHyphenStyle(true); //url中驼峰转连字符 + + mpg.setStrategy(strategy); + + // 6、执行 + mpg.execute(); + } +} \ No newline at end of file diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/config/GenConfig.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/config/GenConfig.java index cc4cd14c..7baa6cd5 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/config/GenConfig.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/config/GenConfig.java @@ -7,67 +7,66 @@ import org.springframework.stereotype.Component; /** * 读取代码生成相关配置 - * + * * @author ruoyi */ @Component @ConfigurationProperties(prefix = "gen") -@PropertySource(value = { "classpath:generator.yml" }) -public class GenConfig -{ - /** 作者 */ +@PropertySource(value = {"classpath:generator.yml"}) +public class GenConfig { + /** + * 作者 + */ public static String author; - /** 生成包路径 */ + /** + * 生成包路径 + */ public static String packageName; - /** 自动去除表前缀，默认是false */ + /** + * 自动去除表前缀，默认是false + */ public static boolean autoRemovePre; - /** 表前缀(类名不会包含表前缀) */ + /** + * 表前缀(类名不会包含表前缀) + */ public static String tablePrefix; - public static String getAuthor() - { + public static String getAuthor() { return author; } @Value("${author}") - public void setAuthor(String author) - { + public void setAuthor(String author) { GenConfig.author = author; } - public static String getPackageName() - { + public static String getPackageName() { return packageName; } @Value("${packageName}") - public void setPackageName(String packageName) - { + public void setPackageName(String packageName) { GenConfig.packageName = packageName; } - public static boolean getAutoRemovePre() - { + public static boolean getAutoRemovePre() { return autoRemovePre; } @Value("${autoRemovePre}") - public void setAutoRemovePre(boolean autoRemovePre) - { + public void setAutoRemovePre(boolean autoRemovePre) { GenConfig.autoRemovePre = autoRemovePre; } - public static String getTablePrefix() - { + public static String getTablePrefix() { return tablePrefix; } @Value("${tablePrefix}") - public void setTablePrefix(String tablePrefix) - { + public void setTablePrefix(String tablePrefix) { GenConfig.tablePrefix = tablePrefix; } } diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/controller/GenController.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/controller/GenController.java index 8195206f..52759edf 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/controller/GenController.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/controller/GenController.java @@ -5,6 +5,7 @@ import java.util.HashMap; import java.util.List; import java.util.Map; import javax.servlet.http.HttpServletResponse; + import org.apache.commons.io.IOUtils; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; @@ -30,13 +31,12 @@ import com.ruoyi.generator.service.IGenTableService; /** * 代码生成 操作处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/tool/gen") -public class GenController extends BaseController -{ +public class GenController extends BaseController { @Autowired private IGenTableService genTableService; @@ -48,8 +48,7 @@ public class GenController extends BaseController */ @PreAuthorize("@ss.hasPermi('tool:gen:list')") @GetMapping("/list") - public TableDataInfo genList(GenTable genTable) - { + public TableDataInfo genList(GenTable genTable) { startPage(); List list = genTableService.selectGenTableList(genTable); return getDataTable(list); @@ -60,8 +59,7 @@ public class GenController extends BaseController */ @PreAuthorize("@ss.hasPermi('tool:gen:query')") @GetMapping(value = "/{talbleId}") - public AjaxResult getInfo(@PathVariable Long talbleId) - { + public AjaxResult getInfo(@PathVariable Long talbleId) { GenTable table = genTableService.selectGenTableById(talbleId); List tables = genTableService.selectGenTableAll(); List list = genTableColumnService.selectGenTableColumnListByTableId(talbleId); @@ -77,8 +75,7 @@ public class GenController extends BaseController */ @PreAuthorize("@ss.hasPermi('tool:gen:list')") @GetMapping("/db/list") - public TableDataInfo dataList(GenTable genTable) - { + public TableDataInfo dataList(GenTable genTable) { startPage(); List list = genTableService.selectDbTableList(genTable); return getDataTable(list); @@ -89,8 +86,7 @@ public class GenController extends BaseController */ @PreAuthorize("@ss.hasPermi('tool:gen:list')") @GetMapping(value = "/column/{talbleId}") - public TableDataInfo columnList(Long tableId) - { + public TableDataInfo columnList(Long tableId) { TableDataInfo dataInfo = new TableDataInfo(); List list = genTableColumnService.selectGenTableColumnListByTableId(tableId); dataInfo.setRows(list); @@ -104,8 +100,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:list')") @Log(title = "代码生成", businessType = BusinessType.IMPORT) @PostMapping("/importTable") - public AjaxResult importTableSave(String tables) - { + public AjaxResult importTableSave(String tables) { String[] tableNames = Convert.toStrArray(tables); // 查询表信息 List tableList = genTableService.selectDbTableListByNames(tableNames); @@ -119,8 +114,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:edit')") @Log(title = "代码生成", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult editSave(@Validated @RequestBody GenTable genTable) - { + public AjaxResult editSave(@Validated @RequestBody GenTable genTable) { genTableService.validateEdit(genTable); genTableService.updateGenTable(genTable); return AjaxResult.success(); @@ -132,8 +126,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:remove')") @Log(title = "代码生成", businessType = BusinessType.DELETE) @DeleteMapping("/{tableIds}") - public AjaxResult remove(@PathVariable Long[] tableIds) - { + public AjaxResult remove(@PathVariable Long[] tableIds) { genTableService.deleteGenTableByIds(tableIds); return AjaxResult.success(); } @@ -143,8 +136,7 @@ public class GenController extends BaseController */ @PreAuthorize("@ss.hasPermi('tool:gen:preview')") @GetMapping("/preview/{tableId}") - public AjaxResult preview(@PathVariable("tableId") Long tableId) throws IOException - { + public AjaxResult preview(@PathVariable("tableId") Long tableId) throws IOException { Map dataMap = genTableService.previewCode(tableId); return AjaxResult.success(dataMap); } @@ -155,8 +147,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:code')") @Log(title = "代码生成", businessType = BusinessType.GENCODE) @GetMapping("/download/{tableName}") - public void download(HttpServletResponse response, @PathVariable("tableName") String tableName) throws IOException - { + public void download(HttpServletResponse response, @PathVariable("tableName") String tableName) throws IOException { byte[] data = genTableService.downloadCode(tableName); genCode(response, data); } @@ -167,8 +158,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:code')") @Log(title = "代码生成", businessType = BusinessType.GENCODE) @GetMapping("/genCode/{tableName}") - public AjaxResult genCode(@PathVariable("tableName") String tableName) - { + public AjaxResult genCode(@PathVariable("tableName") String tableName) { genTableService.generatorCode(tableName); return AjaxResult.success(); } @@ -179,8 +169,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:edit')") @Log(title = "代码生成", businessType = BusinessType.UPDATE) @GetMapping("/synchDb/{tableName}") - public AjaxResult synchDb(@PathVariable("tableName") String tableName) - { + public AjaxResult synchDb(@PathVariable("tableName") String tableName) { genTableService.synchDb(tableName); return AjaxResult.success(); } @@ -191,8 +180,7 @@ public class GenController extends BaseController @PreAuthorize("@ss.hasPermi('tool:gen:code')") @Log(title = "代码生成", businessType = BusinessType.GENCODE) @GetMapping("/batchGenCode") - public void batchGenCode(HttpServletResponse response, String tables) throws IOException - { + public void batchGenCode(HttpServletResponse response, String tables) throws IOException { String[] tableNames = Convert.toStrArray(tables); byte[] data = genTableService.downloadCode(tableNames); genCode(response, data); @@ -201,8 +189,7 @@ public class GenController extends BaseController /** * 生成zip文件 */ - private void genCode(HttpServletResponse response, byte[] data) throws IOException - { + private void genCode(HttpServletResponse response, byte[] data) throws IOException { response.reset(); response.addHeader("Access-Control-Allow-Origin", "*"); response.addHeader("Access-Control-Expose-Headers", "Content-Disposition"); diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTable.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTable.java index 269779cf..eaa01081 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTable.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTable.java @@ -3,6 +3,7 @@ package com.ruoyi.generator.domain; import java.util.List; import javax.validation.Valid; import javax.validation.constraints.NotBlank; + import org.apache.commons.lang3.ArrayUtils; import com.ruoyi.common.constant.GenConstants; import com.ruoyi.common.core.domain.BaseEntity; @@ -10,360 +11,350 @@ import com.ruoyi.common.utils.StringUtils; /** * 业务表 gen_table - * + * * @author ruoyi */ -public class GenTable extends BaseEntity -{ +public class GenTable extends BaseEntity { private static final long serialVersionUID = 1L; - /** 编号 */ + /** + * 编号 + */ private Long tableId; - /** 表名称 */ + /** + * 表名称 + */ @NotBlank(message = "表名称不能为空") private String tableName; - /** 表描述 */ + /** + * 表描述 + */ @NotBlank(message = "表描述不能为空") private String tableComment; - /** 关联父表的表名 */ + /** + * 关联父表的表名 + */ private String subTableName; - /** 本表关联父表的外键名 */ + /** + * 本表关联父表的外键名 + */ private String subTableFkName; - /** 实体类名称(首字母大写) */ + /** + * 实体类名称(首字母大写) + */ @NotBlank(message = "实体类名称不能为空") private String className; - /** 使用的模板（crud单表操作 tree树表操作 sub主子表操作） */ + /** + * 使用的模板（crud单表操作 tree树表操作 sub主子表操作） + */ private String tplCategory; - /** 生成包路径 */ + /** + * 生成包路径 + */ @NotBlank(message = "生成包路径不能为空") private String packageName; - /** 生成模块名 */ + /** + * 生成模块名 + */ @NotBlank(message = "生成模块名不能为空") private String moduleName; - /** 生成业务名 */ + /** + * 生成业务名 + */ @NotBlank(message = "生成业务名不能为空") private String businessName; - /** 生成功能名 */ + /** + * 生成功能名 + */ @NotBlank(message = "生成功能名不能为空") private String functionName; - /** 生成作者 */ + /** + * 生成作者 + */ @NotBlank(message = "作者不能为空") private String functionAuthor; - /** 生成代码方式（0zip压缩包 1自定义路径） */ + /** + * 生成代码方式（0zip压缩包 1自定义路径） + */ private String genType; - /** 生成路径（不填默认项目路径） */ + /** + * 生成路径（不填默认项目路径） + */ private String genPath; - /** 主键信息 */ + /** + * 主键信息 + */ private GenTableColumn pkColumn; - /** 子表信息 */ + /** + * 子表信息 + */ private GenTable subTable; - /** 表列信息 */ + /** + * 表列信息 + */ @Valid private List columns; - /** 其它生成选项 */ + /** + * 其它生成选项 + */ private String options; - /** 树编码字段 */ + /** + * 树编码字段 + */ private String treeCode; - /** 树父编码字段 */ + /** + * 树父编码字段 + */ private String treeParentCode; - /** 树名称字段 */ + /** + * 树名称字段 + */ private String treeName; - /** 上级菜单ID字段 */ + /** + * 上级菜单ID字段 + */ private String parentMenuId; - /** 上级菜单名称字段 */ + /** + * 上级菜单名称字段 + */ private String parentMenuName; - public Long getTableId() - { + public Long getTableId() { return tableId; } - public void setTableId(Long tableId) - { + public void setTableId(Long tableId) { this.tableId = tableId; } - public String getTableName() - { + public String getTableName() { return tableName; } - public void setTableName(String tableName) - { + public void setTableName(String tableName) { this.tableName = tableName; } - public String getTableComment() - { + public String getTableComment() { return tableComment; } - public void setTableComment(String tableComment) - { + public void setTableComment(String tableComment) { this.tableComment = tableComment; } - public String getSubTableName() - { + public String getSubTableName() { return subTableName; } - public void setSubTableName(String subTableName) - { + public void setSubTableName(String subTableName) { this.subTableName = subTableName; } - public String getSubTableFkName() - { + public String getSubTableFkName() { return subTableFkName; } - public void setSubTableFkName(String subTableFkName) - { + public void setSubTableFkName(String subTableFkName) { this.subTableFkName = subTableFkName; } - public String getClassName() - { + public String getClassName() { return className; } - public void setClassName(String className) - { + public void setClassName(String className) { this.className = className; } - public String getTplCategory() - { + public String getTplCategory() { return tplCategory; } - public void setTplCategory(String tplCategory) - { + public void setTplCategory(String tplCategory) { this.tplCategory = tplCategory; } - public String getPackageName() - { + public String getPackageName() { return packageName; } - public void setPackageName(String packageName) - { + public void setPackageName(String packageName) { this.packageName = packageName; } - public String getModuleName() - { + public String getModuleName() { return moduleName; } - public void setModuleName(String moduleName) - { + public void setModuleName(String moduleName) { this.moduleName = moduleName; } - public String getBusinessName() - { + public String getBusinessName() { return businessName; } - public void setBusinessName(String businessName) - { + public void setBusinessName(String businessName) { this.businessName = businessName; } - public String getFunctionName() - { + public String getFunctionName() { return functionName; } - public void setFunctionName(String functionName) - { + public void setFunctionName(String functionName) { this.functionName = functionName; } - public String getFunctionAuthor() - { + public String getFunctionAuthor() { return functionAuthor; } - public void setFunctionAuthor(String functionAuthor) - { + public void setFunctionAuthor(String functionAuthor) { this.functionAuthor = functionAuthor; } - public String getGenType() - { + public String getGenType() { return genType; } - public void setGenType(String genType) - { + public void setGenType(String genType) { this.genType = genType; } - public String getGenPath() - { + public String getGenPath() { return genPath; } - public void setGenPath(String genPath) - { + public void setGenPath(String genPath) { this.genPath = genPath; } - public GenTableColumn getPkColumn() - { + public GenTableColumn getPkColumn() { return pkColumn; } - public void setPkColumn(GenTableColumn pkColumn) - { + public void setPkColumn(GenTableColumn pkColumn) { this.pkColumn = pkColumn; } - public GenTable getSubTable() - { + public GenTable getSubTable() { return subTable; } - public void setSubTable(GenTable subTable) - { + public void setSubTable(GenTable subTable) { this.subTable = subTable; } - public List getColumns() - { + public List getColumns() { return columns; } - public void setColumns(List columns) - { + public void setColumns(List columns) { this.columns = columns; } - public String getOptions() - { + public String getOptions() { return options; } - public void setOptions(String options) - { + public void setOptions(String options) { this.options = options; } - public String getTreeCode() - { + public String getTreeCode() { return treeCode; } - public void setTreeCode(String treeCode) - { + public void setTreeCode(String treeCode) { this.treeCode = treeCode; } - public String getTreeParentCode() - { + public String getTreeParentCode() { return treeParentCode; } - public void setTreeParentCode(String treeParentCode) - { + public void setTreeParentCode(String treeParentCode) { this.treeParentCode = treeParentCode; } - public String getTreeName() - { + public String getTreeName() { return treeName; } - public void setTreeName(String treeName) - { + public void setTreeName(String treeName) { this.treeName = treeName; } - public String getParentMenuId() - { + public String getParentMenuId() { return parentMenuId; } - public void setParentMenuId(String parentMenuId) - { + public void setParentMenuId(String parentMenuId) { this.parentMenuId = parentMenuId; } - public String getParentMenuName() - { + public String getParentMenuName() { return parentMenuName; } - public void setParentMenuName(String parentMenuName) - { + public void setParentMenuName(String parentMenuName) { this.parentMenuName = parentMenuName; } - public boolean isSub() - { + public boolean isSub() { return isSub(this.tplCategory); } - public static boolean isSub(String tplCategory) - { + public static boolean isSub(String tplCategory) { return tplCategory != null && StringUtils.equals(GenConstants.TPL_SUB, tplCategory); } - public boolean isTree() - { + public boolean isTree() { return isTree(this.tplCategory); } - public static boolean isTree(String tplCategory) - { + public static boolean isTree(String tplCategory) { return tplCategory != null && StringUtils.equals(GenConstants.TPL_TREE, tplCategory); } - public boolean isCrud() - { + public boolean isCrud() { return isCrud(this.tplCategory); } - public static boolean isCrud(String tplCategory) - { + public static boolean isCrud(String tplCategory) { return tplCategory != null && StringUtils.equals(GenConstants.TPL_CRUD, tplCategory); } - public boolean isSuperColumn(String javaField) - { + public boolean isSuperColumn(String javaField) { return isSuperColumn(this.tplCategory, javaField); } - public static boolean isSuperColumn(String tplCategory, String javaField) - { - if (isTree(tplCategory)) - { + public static boolean isSuperColumn(String tplCategory, String javaField) { + if (isTree(tplCategory)) { return StringUtils.equalsAnyIgnoreCase(javaField, ArrayUtils.addAll(GenConstants.TREE_ENTITY, GenConstants.BASE_ENTITY)); } diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTableColumn.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTableColumn.java index d1733b64..cb65d2a0 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTableColumn.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/domain/GenTableColumn.java @@ -1,335 +1,318 @@ package com.ruoyi.generator.domain; import javax.validation.constraints.NotBlank; + import com.ruoyi.common.core.domain.BaseEntity; import com.ruoyi.common.utils.StringUtils; /** * 代码生成业务字段表 gen_table_column - * + * * @author ruoyi */ -public class GenTableColumn extends BaseEntity -{ +public class GenTableColumn extends BaseEntity { private static final long serialVersionUID = 1L; - /** 编号 */ + /** + * 编号 + */ private Long columnId; - /** 归属表编号 */ + /** + * 归属表编号 + */ private Long tableId; - /** 列名称 */ + /** + * 列名称 + */ private String columnName; - /** 列描述 */ + /** + * 列描述 + */ private String columnComment; - /** 列类型 */ + /** + * 列类型 + */ private String columnType; - /** JAVA类型 */ + /** + * JAVA类型 + */ private String javaType; - /** JAVA字段名 */ + /** + * JAVA字段名 + */ @NotBlank(message = "Java属性不能为空") private String javaField; - /** 是否主键（1是） */ + /** + * 是否主键（1是） + */ private String isPk; - /** 是否自增（1是） */ + /** + * 是否自增（1是） + */ private String isIncrement; - /** 是否必填（1是） */ + /** + * 是否必填（1是） + */ private String isRequired; - /** 是否为插入字段（1是） */ + /** + * 是否为插入字段（1是） + */ private String isInsert; - /** 是否编辑字段（1是） */ + /** + * 是否编辑字段（1是） + */ private String isEdit; - /** 是否列表字段（1是） */ + /** + * 是否列表字段（1是） + */ private String isList; - /** 是否查询字段（1是） */ + /** + * 是否查询字段（1是） + */ private String isQuery; - /** 查询方式（EQ等于、NE不等于、GT大于、LT小于、LIKE模糊、BETWEEN范围） */ + /** + * 查询方式（EQ等于、NE不等于、GT大于、LT小于、LIKE模糊、BETWEEN范围） + */ private String queryType; - /** 显示类型（input文本框、textarea文本域、select下拉框、checkbox复选框、radio单选框、datetime日期控件、image图片上传控件、upload文件上传控件、editor富文本控件） */ + /** + * 显示类型（input文本框、textarea文本域、select下拉框、checkbox复选框、radio单选框、datetime日期控件、image图片上传控件、upload文件上传控件、editor富文本控件） + */ private String htmlType; - /** 字典类型 */ + /** + * 字典类型 + */ private String dictType; - /** 排序 */ + /** + * 排序 + */ private Integer sort; - public void setColumnId(Long columnId) - { + public void setColumnId(Long columnId) { this.columnId = columnId; } - public Long getColumnId() - { + public Long getColumnId() { return columnId; } - public void setTableId(Long tableId) - { + public void setTableId(Long tableId) { this.tableId = tableId; } - public Long getTableId() - { + public Long getTableId() { return tableId; } - public void setColumnName(String columnName) - { + public void setColumnName(String columnName) { this.columnName = columnName; } - public String getColumnName() - { + public String getColumnName() { return columnName; } - public void setColumnComment(String columnComment) - { + public void setColumnComment(String columnComment) { this.columnComment = columnComment; } - public String getColumnComment() - { + public String getColumnComment() { return columnComment; } - public void setColumnType(String columnType) - { + public void setColumnType(String columnType) { this.columnType = columnType; } - public String getColumnType() - { + public String getColumnType() { return columnType; } - public void setJavaType(String javaType) - { + public void setJavaType(String javaType) { this.javaType = javaType; } - public String getJavaType() - { + public String getJavaType() { return javaType; } - public void setJavaField(String javaField) - { + public void setJavaField(String javaField) { this.javaField = javaField; } - public String getJavaField() - { + public String getJavaField() { return javaField; } - public String getCapJavaField() - { + public String getCapJavaField() { return StringUtils.capitalize(javaField); } - public void setIsPk(String isPk) - { + public void setIsPk(String isPk) { this.isPk = isPk; } - public String getIsPk() - { + public String getIsPk() { return isPk; } - public boolean isPk() - { + public boolean isPk() { return isPk(this.isPk); } - public boolean isPk(String isPk) - { + public boolean isPk(String isPk) { return isPk != null && StringUtils.equals("1", isPk); } - public String getIsIncrement() - { + public String getIsIncrement() { return isIncrement; } - public void setIsIncrement(String isIncrement) - { + public void setIsIncrement(String isIncrement) { this.isIncrement = isIncrement; } - public boolean isIncrement() - { + public boolean isIncrement() { return isIncrement(this.isIncrement); } - public boolean isIncrement(String isIncrement) - { + public boolean isIncrement(String isIncrement) { return isIncrement != null && StringUtils.equals("1", isIncrement); } - public void setIsRequired(String isRequired) - { + public void setIsRequired(String isRequired) { this.isRequired = isRequired; } - public String getIsRequired() - { + public String getIsRequired() { return isRequired; } - public boolean isRequired() - { + public boolean isRequired() { return isRequired(this.isRequired); } - public boolean isRequired(String isRequired) - { + public boolean isRequired(String isRequired) { return isRequired != null && StringUtils.equals("1", isRequired); } - public void setIsInsert(String isInsert) - { + public void setIsInsert(String isInsert) { this.isInsert = isInsert; } - public String getIsInsert() - { + public String getIsInsert() { return isInsert; } - public boolean isInsert() - { + public boolean isInsert() { return isInsert(this.isInsert); } - public boolean isInsert(String isInsert) - { + public boolean isInsert(String isInsert) { return isInsert != null && StringUtils.equals("1", isInsert); } - public void setIsEdit(String isEdit) - { + public void setIsEdit(String isEdit) { this.isEdit = isEdit; } - public String getIsEdit() - { + public String getIsEdit() { return isEdit; } - public boolean isEdit() - { + public boolean isEdit() { return isInsert(this.isEdit); } - public boolean isEdit(String isEdit) - { + public boolean isEdit(String isEdit) { return isEdit != null && StringUtils.equals("1", isEdit); } - public void setIsList(String isList) - { + public void setIsList(String isList) { this.isList = isList; } - public String getIsList() - { + public String getIsList() { return isList; } - public boolean isList() - { + public boolean isList() { return isList(this.isList); } - public boolean isList(String isList) - { + public boolean isList(String isList) { return isList != null && StringUtils.equals("1", isList); } - public void setIsQuery(String isQuery) - { + public void setIsQuery(String isQuery) { this.isQuery = isQuery; } - public String getIsQuery() - { + public String getIsQuery() { return isQuery; } - public boolean isQuery() - { + public boolean isQuery() { return isQuery(this.isQuery); } - public boolean isQuery(String isQuery) - { + public boolean isQuery(String isQuery) { return isQuery != null && StringUtils.equals("1", isQuery); } - public void setQueryType(String queryType) - { + public void setQueryType(String queryType) { this.queryType = queryType; } - public String getQueryType() - { + public String getQueryType() { return queryType; } - public String getHtmlType() - { + public String getHtmlType() { return htmlType; } - public void setHtmlType(String htmlType) - { + public void setHtmlType(String htmlType) { this.htmlType = htmlType; } - public void setDictType(String dictType) - { + public void setDictType(String dictType) { this.dictType = dictType; } - public String getDictType() - { + public String getDictType() { return dictType; } - public void setSort(Integer sort) - { + public void setSort(Integer sort) { this.sort = sort; } - public Integer getSort() - { + public Integer getSort() { return sort; } - public boolean isSuperColumn() - { + public boolean isSuperColumn() { return isSuperColumn(this.javaField); } - public static boolean isSuperColumn(String javaField) - { + public static boolean isSuperColumn(String javaField) { return StringUtils.equalsAnyIgnoreCase(javaField, // BaseEntity "createBy", "createTime", "updateBy", "updateTime", "remark", @@ -337,36 +320,28 @@ public class GenTableColumn extends BaseEntity "parentName", "parentId", "orderNum", "ancestors"); } - public boolean isUsableColumn() - { + public boolean isUsableColumn() { return isUsableColumn(javaField); } - public static boolean isUsableColumn(String javaField) - { + public static boolean isUsableColumn(String javaField) { // isSuperColumn()中的名单用于避免生成多余Domain属性，若某些属性在生成页面时需要用到不能忽略，则放在此处白名单 return StringUtils.equalsAnyIgnoreCase(javaField, "parentId", "orderNum", "remark"); } - public String readConverterExp() - { + public String readConverterExp() { String remarks = StringUtils.substringBetween(this.columnComment, "（", "）"); StringBuffer sb = new StringBuffer(); - if (StringUtils.isNotEmpty(remarks)) - { - for (String value : remarks.split(" ")) - { - if (StringUtils.isNotEmpty(value)) - { + if (StringUtils.isNotEmpty(remarks)) { + for (String value : remarks.split(" ")) { + if (StringUtils.isNotEmpty(value)) { Object startStr = value.subSequence(0, 1); String endStr = value.substring(1); sb.append("").append(startStr).append("=").append(endStr).append(","); } } return sb.deleteCharAt(sb.length() - 1).toString(); - } - else - { + } else { return this.columnComment; } } diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableColumnMapper.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableColumnMapper.java index 951e1667..ffbb6ca4 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableColumnMapper.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableColumnMapper.java @@ -1,18 +1,18 @@ package com.ruoyi.generator.mapper; import java.util.List; + import com.ruoyi.generator.domain.GenTableColumn; /** * 业务字段 数据层 - * + * * @author ruoyi */ -public interface GenTableColumnMapper -{ +public interface GenTableColumnMapper { /** * 根据表名称查询列信息 - * + * * @param tableName 表名称 * @return 列信息 */ @@ -20,7 +20,7 @@ public interface GenTableColumnMapper /** * 查询业务字段列表 - * + * * @param tableId 业务字段编号 * @return 业务字段集合 */ @@ -28,7 +28,7 @@ public interface GenTableColumnMapper /** * 新增业务字段 - * + * * @param genTableColumn 业务字段信息 * @return 结果 */ @@ -36,7 +36,7 @@ public interface GenTableColumnMapper /** * 修改业务字段 - * + * * @param genTableColumn 业务字段信息 * @return 结果 */ @@ -44,7 +44,7 @@ public interface GenTableColumnMapper /** * 删除业务字段 - * + * * @param genTableColumns 列数据 * @return 结果 */ @@ -52,7 +52,7 @@ public interface GenTableColumnMapper /** * 批量删除业务字段 - * + * * @param ids 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableMapper.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableMapper.java index 9b330df8..7ea272e0 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableMapper.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/mapper/GenTableMapper.java @@ -1,18 +1,18 @@ package com.ruoyi.generator.mapper; import java.util.List; + import com.ruoyi.generator.domain.GenTable; /** * 业务 数据层 - * + * * @author ruoyi */ -public interface GenTableMapper -{ +public interface GenTableMapper { /** * 查询业务列表 - * + * * @param genTable 业务信息 * @return 业务集合 */ @@ -20,7 +20,7 @@ public interface GenTableMapper /** * 查询据库列表 - * + * * @param genTable 业务信息 * @return 数据库表集合 */ @@ -28,7 +28,7 @@ public interface GenTableMapper /** * 查询据库列表 - * + * * @param tableNames 表名称组 * @return 数据库表集合 */ @@ -36,14 +36,14 @@ public interface GenTableMapper /** * 查询所有表信息 - * + * * @return 表信息集合 */ public List selectGenTableAll(); /** * 查询表ID业务信息 - * + * * @param id 业务ID * @return 业务信息 */ @@ -51,7 +51,7 @@ public interface GenTableMapper /** * 查询表名称业务信息 - * + * * @param tableName 表名称 * @return 业务信息 */ @@ -59,7 +59,7 @@ public interface GenTableMapper /** * 新增业务 - * + * * @param genTable 业务信息 * @return 结果 */ @@ -67,7 +67,7 @@ public interface GenTableMapper /** * 修改业务 - * + * * @param genTable 业务信息 * @return 结果 */ @@ -75,7 +75,7 @@ public interface GenTableMapper /** * 批量删除业务 - * + * * @param ids 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableColumnServiceImpl.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableColumnServiceImpl.java index 0679689d..9f57c46a 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableColumnServiceImpl.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableColumnServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.generator.service; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.common.core.text.Convert; @@ -9,60 +10,55 @@ import com.ruoyi.generator.mapper.GenTableColumnMapper; /** * 业务字段 服务层实现 - * + * * @author ruoyi */ @Service -public class GenTableColumnServiceImpl implements IGenTableColumnService -{ - @Autowired - private GenTableColumnMapper genTableColumnMapper; +public class GenTableColumnServiceImpl implements IGenTableColumnService { + @Autowired + private GenTableColumnMapper genTableColumnMapper; - /** + /** * 查询业务字段列表 - * + * * @param tableId 业务字段编号 * @return 业务字段集合 */ - @Override - public List selectGenTableColumnListByTableId(Long tableId) - { - return genTableColumnMapper.selectGenTableColumnListByTableId(tableId); - } - + @Override + public List selectGenTableColumnListByTableId(Long tableId) { + return genTableColumnMapper.selectGenTableColumnListByTableId(tableId); + } + /** * 新增业务字段 - * + * * @param genTableColumn 业务字段信息 * @return 结果 */ - @Override - public int insertGenTableColumn(GenTableColumn genTableColumn) - { - return genTableColumnMapper.insertGenTableColumn(genTableColumn); - } - - /** - * 修改业务字段 - * - * @param genTableColumn 业务字段信息 - * @return 结果 - */ - @Override - public int updateGenTableColumn(GenTableColumn genTableColumn) - { - return genTableColumnMapper.updateGenTableColumn(genTableColumn); - } + @Override + public int insertGenTableColumn(GenTableColumn genTableColumn) { + return genTableColumnMapper.insertGenTableColumn(genTableColumn); + } - /** + /** + * 修改业务字段 + * + * @param genTableColumn 业务字段信息 + * @return 结果 + */ + @Override + public int updateGenTableColumn(GenTableColumn genTableColumn) { + return genTableColumnMapper.updateGenTableColumn(genTableColumn); + } + + /** * 删除业务字段对象 - * + * * @param ids 需要删除的数据ID * @return 结果 */ - @Override - public int deleteGenTableColumnByIds(String ids) - { - return genTableColumnMapper.deleteGenTableColumnByIds(Convert.toLongArray(ids)); - } + @Override + public int deleteGenTableColumnByIds(String ids) { + return genTableColumnMapper.deleteGenTableColumnByIds(Convert.toLongArray(ids)); + } } diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableServiceImpl.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableServiceImpl.java index 5d968084..f14d1680 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableServiceImpl.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/GenTableServiceImpl.java @@ -10,6 +10,7 @@ import java.util.Map; import java.util.stream.Collectors; import java.util.zip.ZipEntry; import java.util.zip.ZipOutputStream; + import org.apache.commons.io.IOUtils; import org.apache.velocity.Template; import org.apache.velocity.VelocityContext; @@ -38,12 +39,11 @@ import com.ruoyi.generator.util.VelocityUtils; /** * 业务 服务层实现 - * + * * @author ruoyi */ @Service -public class GenTableServiceImpl implements IGenTableService -{ +public class GenTableServiceImpl implements IGenTableService { private static final Logger log = LoggerFactory.getLogger(GenTableServiceImpl.class); @Autowired @@ -54,13 +54,12 @@ public class GenTableServiceImpl implements IGenTableService /** * 查询业务信息 - * + * * @param id 业务ID * @return 业务信息 */ @Override - public GenTable selectGenTableById(Long id) - { + public GenTable selectGenTableById(Long id) { GenTable genTable = genTableMapper.selectGenTableById(id); setTableFromOptions(genTable); return genTable; @@ -68,68 +67,61 @@ public class GenTableServiceImpl implements IGenTableService /** * 查询业务列表 - * + * * @param genTable 业务信息 * @return 业务集合 */ @Override - public List selectGenTableList(GenTable genTable) - { + public List selectGenTableList(GenTable genTable) { return genTableMapper.selectGenTableList(genTable); } /** * 查询据库列表 - * + * * @param genTable 业务信息 * @return 数据库表集合 */ @Override - public List selectDbTableList(GenTable genTable) - { + public List selectDbTableList(GenTable genTable) { return genTableMapper.selectDbTableList(genTable); } /** * 查询据库列表 - * + * * @param tableNames 表名称组 * @return 数据库表集合 */ @Override - public List selectDbTableListByNames(String[] tableNames) - { + public List selectDbTableListByNames(String[] tableNames) { return genTableMapper.selectDbTableListByNames(tableNames); } /** * 查询所有表信息 - * + * * @return 表信息集合 */ @Override - public List selectGenTableAll() - { + public List selectGenTableAll() { return genTableMapper.selectGenTableAll(); } /** * 修改业务 - * + * * @param genTable 业务信息 * @return 结果 */ @Override @Transactional - public void updateGenTable(GenTable genTable) - { + public void updateGenTable(GenTable genTable) { String options = JSON.toJSONString(genTable.getParams()); genTable.setOptions(options); int row = genTableMapper.updateGenTable(genTable); - if (row > 0) - { - for (GenTableColumn cenTableColumn : genTable.getColumns()) - { + if (row > 0) { + for (GenTableColumn cenTableColumn : genTable.getColumns()) { genTableColumnMapper.updateGenTableColumn(cenTableColumn); } } @@ -137,62 +129,53 @@ public class GenTableServiceImpl implements IGenTableService /** * 删除业务对象 - * + * * @param tableIds 需要删除的数据ID * @return 结果 */ @Override @Transactional - public void deleteGenTableByIds(Long[] tableIds) - { + public void deleteGenTableByIds(Long[] tableIds) { genTableMapper.deleteGenTableByIds(tableIds); genTableColumnMapper.deleteGenTableColumnByIds(tableIds); } /** * 导入表结构 - * + * * @param tableList 导入表列表 */ @Override @Transactional - public void importGenTable(List tableList) - { + public void importGenTable(List tableList) { String operName = SecurityUtils.getUsername(); - try - { - for (GenTable table : tableList) - { + try { + for (GenTable table : tableList) { String tableName = table.getTableName(); GenUtils.initTable(table, operName); int row = genTableMapper.insertGenTable(table); - if (row > 0) - { + if (row > 0) { // 保存列信息 List genTableColumns = genTableColumnMapper.selectDbTableColumnsByName(tableName); - for (GenTableColumn column : genTableColumns) - { + for (GenTableColumn column : genTableColumns) { GenUtils.initColumnField(column, table); genTableColumnMapper.insertGenTableColumn(column); } } } - } - catch (Exception e) - { + } catch (Exception e) { throw new CustomException("导入失败：" + e.getMessage()); } } /** * 预览代码 - * + * * @param tableId 表编号 * @return 预览数据列表 */ @Override - public Map previewCode(Long tableId) - { + public Map previewCode(Long tableId) { Map dataMap = new LinkedHashMap<>(); // 查询表信息 GenTable table = genTableMapper.selectGenTableById(tableId); @@ -206,8 +189,7 @@ public class GenTableServiceImpl implements IGenTableService // 获取模板列表 List templates = VelocityUtils.getTemplateList(table.getTplCategory()); - for (String template : templates) - { + for (String template : templates) { // 渲染模板 StringWriter sw = new StringWriter(); Template tpl = Velocity.getTemplate(template, Constants.UTF8); @@ -219,13 +201,12 @@ public class GenTableServiceImpl implements IGenTableService /** * 生成代码（下载方式） - * + * * @param tableName 表名称 * @return 数据 */ @Override - public byte[] downloadCode(String tableName) - { + public byte[] downloadCode(String tableName) { ByteArrayOutputStream outputStream = new ByteArrayOutputStream(); ZipOutputStream zip = new ZipOutputStream(outputStream); generatorCode(tableName, zip); @@ -235,12 +216,11 @@ public class GenTableServiceImpl implements IGenTableService /** * 生成代码（自定义路径） - * + * * @param tableName 表名称 */ @Override - public void generatorCode(String tableName) - { + public void generatorCode(String tableName) { // 查询表信息 GenTable table = genTableMapper.selectGenTableByName(tableName); // 设置主子表信息 @@ -254,21 +234,16 @@ public class GenTableServiceImpl implements IGenTableService // 获取模板列表 List templates = VelocityUtils.getTemplateList(table.getTplCategory()); - for (String template : templates) - { - if (!StringUtils.containsAny(template, "sql.vm", "api.js.vm", "index.vue.vm", "index-tree.vue.vm")) - { + for (String template : templates) { + if (!StringUtils.containsAny(template, "sql.vm", "api.js.vm", "index.vue.vm", "index-tree.vue.vm")) { // 渲染模板 StringWriter sw = new StringWriter(); Template tpl = Velocity.getTemplate(template, Constants.UTF8); tpl.merge(context, sw); - try - { + try { String path = getGenPath(table, template); FileUtils.writeStringToFile(new File(path), sw.toString(), CharsetKit.UTF_8); - } - catch (IOException e) - { + } catch (IOException e) { throw new CustomException("渲染模板失败，表名：" + table.getTableName()); } } @@ -277,52 +252,46 @@ public class GenTableServiceImpl implements IGenTableService /** * 同步数据库 - * + * * @param tableName 表名称 */ @Override @Transactional - public void synchDb(String tableName) - { + public void synchDb(String tableName) { GenTable table = genTableMapper.selectGenTableByName(tableName); List tableColumns = table.getColumns(); List tableColumnNames = tableColumns.stream().map(GenTableColumn::getColumnName).collect(Collectors.toList()); List dbTableColumns = genTableColumnMapper.selectDbTableColumnsByName(tableName); - if (StringUtils.isEmpty(dbTableColumns)) - { + if (StringUtils.isEmpty(dbTableColumns)) { throw new CustomException("同步数据失败，原表结构不存在"); } List dbTableColumnNames = dbTableColumns.stream().map(GenTableColumn::getColumnName).collect(Collectors.toList()); dbTableColumns.forEach(column -> { - if (!tableColumnNames.contains(column.getColumnName())) - { + if (!tableColumnNames.contains(column.getColumnName())) { GenUtils.initColumnField(column, table); genTableColumnMapper.insertGenTableColumn(column); } }); List delColumns = tableColumns.stream().filter(column -> !dbTableColumnNames.contains(column.getColumnName())).collect(Collectors.toList()); - if (StringUtils.isNotEmpty(delColumns)) - { + if (StringUtils.isNotEmpty(delColumns)) { genTableColumnMapper.deleteGenTableColumns(delColumns); } } /** * 批量生成代码（下载方式） - * + * * @param tableNames 表数组 * @return 数据 */ @Override - public byte[] downloadCode(String[] tableNames) - { + public byte[] downloadCode(String[] tableNames) { ByteArrayOutputStream outputStream = new ByteArrayOutputStream(); ZipOutputStream zip = new ZipOutputStream(outputStream); - for (String tableName : tableNames) - { + for (String tableName : tableNames) { generatorCode(tableName, zip); } IOUtils.closeQuietly(zip); @@ -332,8 +301,7 @@ public class GenTableServiceImpl implements IGenTableService /** * 查询表信息并生成代码 */ - private void generatorCode(String tableName, ZipOutputStream zip) - { + private void generatorCode(String tableName, ZipOutputStream zip) { // 查询表信息 GenTable table = genTableMapper.selectGenTableByName(tableName); // 设置主子表信息 @@ -347,23 +315,19 @@ public class GenTableServiceImpl implements IGenTableService // 获取模板列表 List templates = VelocityUtils.getTemplateList(table.getTplCategory()); - for (String template : templates) - { + for (String template : templates) { // 渲染模板 StringWriter sw = new StringWriter(); Template tpl = Velocity.getTemplate(template, Constants.UTF8); tpl.merge(context, sw); - try - { + try { // 添加到zip zip.putNextEntry(new ZipEntry(VelocityUtils.getFileName(template, table))); IOUtils.write(sw.toString(), zip, Constants.UTF8); IOUtils.closeQuietly(sw); - zip.flush(); + zip.flush(); zip.closeEntry(); - } - catch (IOException e) - { + } catch (IOException e) { log.error("渲染模板失败，表名：" + table.getTableName(), e); } } @@ -371,36 +335,24 @@ public class GenTableServiceImpl implements IGenTableService /** * 修改保存参数校验 - * + * * @param genTable 业务信息 */ @Override - public void validateEdit(GenTable genTable) - { - if (GenConstants.TPL_TREE.equals(genTable.getTplCategory())) - { + public void validateEdit(GenTable genTable) { + if (GenConstants.TPL_TREE.equals(genTable.getTplCategory())) { String options = JSON.toJSONString(genTable.getParams()); JSONObject paramsObj = JSONObject.parseObject(options); - if (StringUtils.isEmpty(paramsObj.getString(GenConstants.TREE_CODE))) - { + if (StringUtils.isEmpty(paramsObj.getString(GenConstants.TREE_CODE))) { throw new CustomException("树编码字段不能为空"); - } - else if (StringUtils.isEmpty(paramsObj.getString(GenConstants.TREE_PARENT_CODE))) - { + } else if (StringUtils.isEmpty(paramsObj.getString(GenConstants.TREE_PARENT_CODE))) { throw new CustomException("树父编码字段不能为空"); - } - else if (StringUtils.isEmpty(paramsObj.getString(GenConstants.TREE_NAME))) - { + } else if (StringUtils.isEmpty(paramsObj.getString(GenConstants.TREE_NAME))) { throw new CustomException("树名称字段不能为空"); - } - else if (GenConstants.TPL_SUB.equals(genTable.getTplCategory())) - { - if (StringUtils.isEmpty(genTable.getSubTableName())) - { + } else if (GenConstants.TPL_SUB.equals(genTable.getTplCategory())) { + if (StringUtils.isEmpty(genTable.getSubTableName())) { throw new CustomException("关联子表的表名不能为空"); - } - else if (StringUtils.isEmpty(genTable.getSubTableFkName())) - { + } else if (StringUtils.isEmpty(genTable.getSubTableFkName())) { throw new CustomException("子表关联的外键名不能为空"); } } @@ -409,35 +361,27 @@ public class GenTableServiceImpl implements IGenTableService /** * 设置主键列信息 - * + * * @param table 业务表信息 */ - public void setPkColumn(GenTable table) - { - for (GenTableColumn column : table.getColumns()) - { - if (column.isPk()) - { + public void setPkColumn(GenTable table) { + for (GenTableColumn column : table.getColumns()) { + if (column.isPk()) { table.setPkColumn(column); break; } } - if (StringUtils.isNull(table.getPkColumn())) - { + if (StringUtils.isNull(table.getPkColumn())) { table.setPkColumn(table.getColumns().get(0)); } - if (GenConstants.TPL_SUB.equals(table.getTplCategory())) - { - for (GenTableColumn column : table.getSubTable().getColumns()) - { - if (column.isPk()) - { + if (GenConstants.TPL_SUB.equals(table.getTplCategory())) { + for (GenTableColumn column : table.getSubTable().getColumns()) { + if (column.isPk()) { table.getSubTable().setPkColumn(column); break; } } - if (StringUtils.isNull(table.getSubTable().getPkColumn())) - { + if (StringUtils.isNull(table.getSubTable().getPkColumn())) { table.getSubTable().setPkColumn(table.getSubTable().getColumns().get(0)); } } @@ -445,34 +389,30 @@ public class GenTableServiceImpl implements IGenTableService /** * 设置主子表信息 - * + * * @param table 业务表信息 */ - public void setSubTable(GenTable table) - { + public void setSubTable(GenTable table) { String subTableName = table.getSubTableName(); - if (StringUtils.isNotEmpty(subTableName)) - { + if (StringUtils.isNotEmpty(subTableName)) { table.setSubTable(genTableMapper.selectGenTableByName(subTableName)); } } /** * 设置代码生成其他选项值 - * + * * @param genTable 设置后的生成对象 */ - public void setTableFromOptions(GenTable genTable) - { + public void setTableFromOptions(GenTable genTable) { JSONObject paramsObj = JSONObject.parseObject(genTable.getOptions()); - if (StringUtils.isNotNull(paramsObj)) - { + if (StringUtils.isNotNull(paramsObj)) { String treeCode = paramsObj.getString(GenConstants.TREE_CODE); String treeParentCode = paramsObj.getString(GenConstants.TREE_PARENT_CODE); String treeName = paramsObj.getString(GenConstants.TREE_NAME); String parentMenuId = paramsObj.getString(GenConstants.PARENT_MENU_ID); String parentMenuName = paramsObj.getString(GenConstants.PARENT_MENU_NAME); - + genTable.setTreeCode(treeCode); genTable.setTreeParentCode(treeParentCode); genTable.setTreeName(treeName); @@ -483,16 +423,14 @@ public class GenTableServiceImpl implements IGenTableService /** * 获取代码生成地址 - * - * @param table 业务表信息 + * + * @param table 业务表信息 * @param template 模板文件路径 * @return 生成地址 */ - public static String getGenPath(GenTable table, String template) - { + public static String getGenPath(GenTable table, String template) { String genPath = table.getGenPath(); - if (StringUtils.equals(genPath, "/")) - { + if (StringUtils.equals(genPath, "/")) { return System.getProperty("user.dir") + File.separator + "src" + File.separator + VelocityUtils.getFileName(template, table); } return genPath + File.separator + VelocityUtils.getFileName(template, table); diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableColumnService.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableColumnService.java index 3037f707..417453af 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableColumnService.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableColumnService.java @@ -1,18 +1,18 @@ package com.ruoyi.generator.service; import java.util.List; + import com.ruoyi.generator.domain.GenTableColumn; /** * 业务字段 服务层 - * + * * @author ruoyi */ -public interface IGenTableColumnService -{ +public interface IGenTableColumnService { /** * 查询业务字段列表 - * + * * @param tableId 业务字段编号 * @return 业务字段集合 */ @@ -20,7 +20,7 @@ public interface IGenTableColumnService /** * 新增业务字段 - * + * * @param genTableColumn 业务字段信息 * @return 结果 */ @@ -28,7 +28,7 @@ public interface IGenTableColumnService /** * 修改业务字段 - * + * * @param genTableColumn 业务字段信息 * @return 结果 */ @@ -36,7 +36,7 @@ public interface IGenTableColumnService /** * 删除业务字段信息 - * + * * @param ids 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableService.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableService.java index 9d53f95f..e7419d07 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableService.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/service/IGenTableService.java @@ -2,18 +2,18 @@ package com.ruoyi.generator.service; import java.util.List; import java.util.Map; + import com.ruoyi.generator.domain.GenTable; /** * 业务 服务层 - * + * * @author ruoyi */ -public interface IGenTableService -{ +public interface IGenTableService { /** * 查询业务列表 - * + * * @param genTable 业务信息 * @return 业务集合 */ @@ -21,7 +21,7 @@ public interface IGenTableService /** * 查询据库列表 - * + * * @param genTable 业务信息 * @return 数据库表集合 */ @@ -29,7 +29,7 @@ public interface IGenTableService /** * 查询据库列表 - * + * * @param tableNames 表名称组 * @return 数据库表集合 */ @@ -37,14 +37,14 @@ public interface IGenTableService /** * 查询所有表信息 - * + * * @return 表信息集合 */ public List selectGenTableAll(); /** * 查询业务信息 - * + * * @param id 业务ID * @return 业务信息 */ @@ -52,7 +52,7 @@ public interface IGenTableService /** * 修改业务 - * + * * @param genTable 业务信息 * @return 结果 */ @@ -60,7 +60,7 @@ public interface IGenTableService /** * 删除业务信息 - * + * * @param tableIds 需要删除的表数据ID * @return 结果 */ @@ -68,14 +68,14 @@ public interface IGenTableService /** * 导入表结构 - * + * * @param tableList 导入表列表 */ public void importGenTable(List tableList); /** * 预览代码 - * + * * @param tableId 表编号 * @return 预览数据列表 */ @@ -83,7 +83,7 @@ public interface IGenTableService /** * 生成代码（下载方式） - * + * * @param tableName 表名称 * @return 数据 */ @@ -91,7 +91,7 @@ public interface IGenTableService /** * 生成代码（自定义路径） - * + * * @param tableName 表名称 * @return 数据 */ @@ -99,14 +99,14 @@ public interface IGenTableService /** * 同步数据库 - * + * * @param tableName 表名称 */ public void synchDb(String tableName); /** * 批量生成代码（下载方式） - * + * * @param tableNames 表数组 * @return 数据 */ @@ -114,7 +114,7 @@ public interface IGenTableService /** * 修改保存参数校验 - * + * * @param genTable 业务信息 */ public void validateEdit(GenTable genTable); diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/GenUtils.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/GenUtils.java index 06c68214..395cdc87 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/GenUtils.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/GenUtils.java @@ -1,6 +1,7 @@ package com.ruoyi.generator.util; import java.util.Arrays; + import org.apache.commons.lang3.RegExUtils; import com.ruoyi.common.constant.GenConstants; import com.ruoyi.common.utils.StringUtils; @@ -10,16 +11,14 @@ import com.ruoyi.generator.domain.GenTableColumn; /** * 代码生成器 工具类 - * + * * @author ruoyi */ -public class GenUtils -{ +public class GenUtils { /** * 初始化表信息 */ - public static void initTable(GenTable genTable, String operName) - { + public static void initTable(GenTable genTable, String operName) { genTable.setClassName(convertClassName(genTable.getTableName())); genTable.setPackageName(GenConfig.getPackageName()); genTable.setModuleName(getModuleName(GenConfig.getPackageName())); @@ -32,8 +31,7 @@ public class GenUtils /** * 初始化列属性字段 */ - public static void initColumnField(GenTableColumn column, GenTable table) - { + public static void initColumnField(GenTableColumn column, GenTable table) { String dataType = getDbType(column.getColumnType()); String columnName = column.getColumnName(); column.setTableId(table.getTableId()); @@ -43,36 +41,28 @@ public class GenUtils // 设置默认类型 column.setJavaType(GenConstants.TYPE_STRING); - if (arraysContains(GenConstants.COLUMNTYPE_STR, dataType) || arraysContains(GenConstants.COLUMNTYPE_TEXT, dataType)) - { + if (arraysContains(GenConstants.COLUMNTYPE_STR, dataType) || arraysContains(GenConstants.COLUMNTYPE_TEXT, dataType)) { // 字符串长度超过500设置为文本域 Integer columnLength = getColumnLength(column.getColumnType()); String htmlType = columnLength >= 500 || arraysContains(GenConstants.COLUMNTYPE_TEXT, dataType) ? GenConstants.HTML_TEXTAREA : GenConstants.HTML_INPUT; column.setHtmlType(htmlType); - } - else if (arraysContains(GenConstants.COLUMNTYPE_TIME, dataType)) - { + } else if (arraysContains(GenConstants.COLUMNTYPE_TIME, dataType)) { column.setJavaType(GenConstants.TYPE_DATE); column.setHtmlType(GenConstants.HTML_DATETIME); - } - else if (arraysContains(GenConstants.COLUMNTYPE_NUMBER, dataType)) - { + } else if (arraysContains(GenConstants.COLUMNTYPE_NUMBER, dataType)) { column.setHtmlType(GenConstants.HTML_INPUT); // 如果是浮点型 统一用BigDecimal String[] str = StringUtils.split(StringUtils.substringBetween(column.getColumnType(), "(", ")"), ","); - if (str != null && str.length == 2 && Integer.parseInt(str[1]) > 0) - { + if (str != null && str.length == 2 && Integer.parseInt(str[1]) > 0) { column.setJavaType(GenConstants.TYPE_BIGDECIMAL); } // 如果是整形 - else if (str != null && str.length == 1 && Integer.parseInt(str[0]) <= 10) - { + else if (str != null && str.length == 1 && Integer.parseInt(str[0]) <= 10) { column.setJavaType(GenConstants.TYPE_INTEGER); } // 长整形 - else - { + else { column.setJavaType(GenConstants.TYPE_LONG); } } @@ -81,74 +71,63 @@ public class GenUtils column.setIsInsert(GenConstants.REQUIRE); // 编辑字段 - if (!arraysContains(GenConstants.COLUMNNAME_NOT_EDIT, columnName) && !column.isPk()) - { + if (!arraysContains(GenConstants.COLUMNNAME_NOT_EDIT, columnName) && !column.isPk()) { column.setIsEdit(GenConstants.REQUIRE); } // 列表字段 - if (!arraysContains(GenConstants.COLUMNNAME_NOT_LIST, columnName) && !column.isPk()) - { + if (!arraysContains(GenConstants.COLUMNNAME_NOT_LIST, columnName) && !column.isPk()) { column.setIsList(GenConstants.REQUIRE); } // 查询字段 - if (!arraysContains(GenConstants.COLUMNNAME_NOT_QUERY, columnName) && !column.isPk()) - { + if (!arraysContains(GenConstants.COLUMNNAME_NOT_QUERY, columnName) && !column.isPk()) { column.setIsQuery(GenConstants.REQUIRE); } // 查询字段类型 - if (StringUtils.endsWithIgnoreCase(columnName, "name")) - { + if (StringUtils.endsWithIgnoreCase(columnName, "name")) { column.setQueryType(GenConstants.QUERY_LIKE); } // 状态字段设置单选框 - if (StringUtils.endsWithIgnoreCase(columnName, "status")) - { + if (StringUtils.endsWithIgnoreCase(columnName, "status")) { column.setHtmlType(GenConstants.HTML_RADIO); } // 类型&性别字段设置下拉框 else if (StringUtils.endsWithIgnoreCase(columnName, "type") - || StringUtils.endsWithIgnoreCase(columnName, "sex")) - { + || StringUtils.endsWithIgnoreCase(columnName, "sex")) { column.setHtmlType(GenConstants.HTML_SELECT); } // 图片字段设置图片上传控件 - else if (StringUtils.endsWithIgnoreCase(columnName, "image")) - { + else if (StringUtils.endsWithIgnoreCase(columnName, "image")) { column.setHtmlType(GenConstants.HTML_IMAGE_UPLOAD); } // 文件字段设置文件上传控件 - else if (StringUtils.endsWithIgnoreCase(columnName, "file")) - { + else if (StringUtils.endsWithIgnoreCase(columnName, "file")) { column.setHtmlType(GenConstants.HTML_FILE_UPLOAD); } // 内容字段设置富文本控件 - else if (StringUtils.endsWithIgnoreCase(columnName, "content")) - { + else if (StringUtils.endsWithIgnoreCase(columnName, "content")) { column.setHtmlType(GenConstants.HTML_EDITOR); } } /** * 校验数组是否包含指定值 - * - * @param arr 数组 + * + * @param arr 数组 * @param targetValue 值 * @return 是否包含 */ - public static boolean arraysContains(String[] arr, String targetValue) - { + public static boolean arraysContains(String[] arr, String targetValue) { return Arrays.asList(arr).contains(targetValue); } /** * 获取模块名 - * + * * @param packageName 包名 * @return 模块名 */ - public static String getModuleName(String packageName) - { + public static String getModuleName(String packageName) { int lastIndex = packageName.lastIndexOf("."); int nameLength = packageName.length(); String moduleName = StringUtils.substring(packageName, lastIndex + 1, nameLength); @@ -157,12 +136,11 @@ public class GenUtils /** * 获取业务名 - * + * * @param tableName 表名 * @return 业务名 */ - public static String getBusinessName(String tableName) - { + public static String getBusinessName(String tableName) { int lastIndex = tableName.lastIndexOf("_"); int nameLength = tableName.length(); String businessName = StringUtils.substring(tableName, lastIndex + 1, nameLength); @@ -171,16 +149,14 @@ public class GenUtils /** * 表名转换成Java类名 - * + * * @param tableName 表名称 * @return 类名 */ - public static String convertClassName(String tableName) - { + public static String convertClassName(String tableName) { boolean autoRemovePre = GenConfig.getAutoRemovePre(); String tablePrefix = GenConfig.getTablePrefix(); - if (autoRemovePre && StringUtils.isNotEmpty(tablePrefix)) - { + if (autoRemovePre && StringUtils.isNotEmpty(tablePrefix)) { String[] searchList = StringUtils.split(tablePrefix, ","); tableName = replaceFirst(tableName, searchList); } @@ -189,18 +165,15 @@ public class GenUtils /** * 批量替换前缀 - * + * * @param replacementm 替换值 - * @param searchList 替换列表 + * @param searchList 替换列表 * @return */ - public static String replaceFirst(String replacementm, String[] searchList) - { + public static String replaceFirst(String replacementm, String[] searchList) { String text = replacementm; - for (String searchString : searchList) - { - if (replacementm.startsWith(searchString)) - { + for (String searchString : searchList) { + if (replacementm.startsWith(searchString)) { text = replacementm.replaceFirst(searchString, ""); break; } @@ -210,48 +183,39 @@ public class GenUtils /** * 关键字替换 - * + * * @param text 需要被替换的名字 * @return 替换后的名字 */ - public static String replaceText(String text) - { + public static String replaceText(String text) { return RegExUtils.replaceAll(text, "(?:表|若依)", ""); } /** * 获取数据库类型字段 - * + * * @param columnType 列类型 * @return 截取后的列类型 */ - public static String getDbType(String columnType) - { - if (StringUtils.indexOf(columnType, "(") > 0) - { + public static String getDbType(String columnType) { + if (StringUtils.indexOf(columnType, "(") > 0) { return StringUtils.substringBefore(columnType, "("); - } - else - { + } else { return columnType; } } /** * 获取字段长度 - * + * * @param columnType 列类型 * @return 截取后的列类型 */ - public static Integer getColumnLength(String columnType) - { - if (StringUtils.indexOf(columnType, "(") > 0) - { + public static Integer getColumnLength(String columnType) { + if (StringUtils.indexOf(columnType, "(") > 0) { String length = StringUtils.substringBetween(columnType, "(", ")"); return Integer.valueOf(length); - } - else - { + } else { return 0; } } diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityInitializer.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityInitializer.java index 3b7b3a10..06f8c8fc 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityInitializer.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityInitializer.java @@ -1,24 +1,22 @@ package com.ruoyi.generator.util; import java.util.Properties; + import org.apache.velocity.app.Velocity; import com.ruoyi.common.constant.Constants; /** * VelocityEngine工厂 - * + * * @author ruoyi */ -public class VelocityInitializer -{ +public class VelocityInitializer { /** * 初始化vm方法 */ - public static void initVelocity() - { + public static void initVelocity() { Properties p = new Properties(); - try - { + try { // 加载classpath目录下的vm文件 p.setProperty("file.resource.loader.class", "org.apache.velocity.runtime.resource.loader.ClasspathResourceLoader"); // 定义字符集 @@ -26,9 +24,7 @@ public class VelocityInitializer p.setProperty(Velocity.OUTPUT_ENCODING, Constants.UTF8); // 初始化Velocity引擎，指定配置Properties Velocity.init(p); - } - catch (Exception e) - { + } catch (Exception e) { throw new RuntimeException(e); } } diff --git a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityUtils.java b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityUtils.java index 1f8d8f18..ead5f928 100644 --- a/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityUtils.java +++ b/spring-boot/ruoyi-generator/src/main/java/com/ruoyi/generator/util/VelocityUtils.java @@ -3,6 +3,7 @@ package com.ruoyi.generator.util; import java.util.ArrayList; import java.util.HashSet; import java.util.List; + import org.apache.velocity.VelocityContext; import com.alibaba.fastjson.JSONObject; import com.ruoyi.common.constant.GenConstants; @@ -13,18 +14,23 @@ import com.ruoyi.generator.domain.GenTableColumn; /** * 模板处理工具类 - * + * * @author ruoyi */ -public class VelocityUtils -{ - /** 项目空间路径 */ +public class VelocityUtils { + /** + * 项目空间路径 + */ private static final String PROJECT_PATH = "main/java"; - /** mybatis空间路径 */ + /** + * mybatis空间路径 + */ private static final String MYBATIS_PATH = "main/resources/mapper"; - /** 默认上级菜单，系统工具 */ + /** + * 默认上级菜单，系统工具 + */ private static final String DEFAULT_PARENT_MENU_ID = "3"; /** @@ -32,8 +38,7 @@ public class VelocityUtils * * @return 模板列表 */ - public static VelocityContext prepareContext(GenTable genTable) - { + public static VelocityContext prepareContext(GenTable genTable) { String moduleName = genTable.getModuleName(); String businessName = genTable.getBusinessName(); String packageName = genTable.getPackageName(); @@ -59,27 +64,23 @@ public class VelocityUtils velocityContext.put("columns", genTable.getColumns()); velocityContext.put("table", genTable); setMenuVelocityContext(velocityContext, genTable); - if (GenConstants.TPL_TREE.equals(tplCategory)) - { + if (GenConstants.TPL_TREE.equals(tplCategory)) { setTreeVelocityContext(velocityContext, genTable); } - if (GenConstants.TPL_SUB.equals(tplCategory)) - { + if (GenConstants.TPL_SUB.equals(tplCategory)) { setSubVelocityContext(velocityContext, genTable); } return velocityContext; } - public static void setMenuVelocityContext(VelocityContext context, GenTable genTable) - { + public static void setMenuVelocityContext(VelocityContext context, GenTable genTable) { String options = genTable.getOptions(); JSONObject paramsObj = JSONObject.parseObject(options); String parentMenuId = getParentMenuId(paramsObj); context.put("parentMenuId", parentMenuId); } - public static void setTreeVelocityContext(VelocityContext context, GenTable genTable) - { + public static void setTreeVelocityContext(VelocityContext context, GenTable genTable) { String options = genTable.getOptions(); JSONObject paramsObj = JSONObject.parseObject(options); String treeCode = getTreecode(paramsObj); @@ -90,18 +91,15 @@ public class VelocityUtils context.put("treeParentCode", treeParentCode); context.put("treeName", treeName); context.put("expandColumn", getExpandColumn(genTable)); - if (paramsObj.containsKey(GenConstants.TREE_PARENT_CODE)) - { + if (paramsObj.containsKey(GenConstants.TREE_PARENT_CODE)) { context.put("tree_parent_code", paramsObj.getString(GenConstants.TREE_PARENT_CODE)); } - if (paramsObj.containsKey(GenConstants.TREE_NAME)) - { + if (paramsObj.containsKey(GenConstants.TREE_NAME)) { context.put("tree_name", paramsObj.getString(GenConstants.TREE_NAME)); } } - public static void setSubVelocityContext(VelocityContext context, GenTable genTable) - { + public static void setSubVelocityContext(VelocityContext context, GenTable genTable) { GenTable subTable = genTable.getSubTable(); String subTableName = genTable.getSubTableName(); String subTableFkName = genTable.getSubTableFkName(); @@ -123,8 +121,7 @@ public class VelocityUtils * * @return 模板列表 */ - public static List getTemplateList(String tplCategory) - { + public static List getTemplateList(String tplCategory) { List templates = new ArrayList(); templates.add("vm/java/domain.java.vm"); templates.add("vm/java/mapper.java.vm"); @@ -134,16 +131,11 @@ public class VelocityUtils templates.add("vm/xml/mapper.xml.vm"); templates.add("vm/sql/sql.vm"); templates.add("vm/js/api.js.vm"); - if (GenConstants.TPL_CRUD.equals(tplCategory)) - { + if (GenConstants.TPL_CRUD.equals(tplCategory)) { templates.add("vm/vue/index.vue.vm"); - } - else if (GenConstants.TPL_TREE.equals(tplCategory)) - { + } else if (GenConstants.TPL_TREE.equals(tplCategory)) { templates.add("vm/vue/index-tree.vue.vm"); - } - else if (GenConstants.TPL_SUB.equals(tplCategory)) - { + } else if (GenConstants.TPL_SUB.equals(tplCategory)) { templates.add("vm/vue/index.vue.vm"); templates.add("vm/java/sub-domain.java.vm"); } @@ -153,8 +145,7 @@ public class VelocityUtils /** * 获取文件名 */ - public static String getFileName(String template, GenTable genTable) - { + public static String getFileName(String template, GenTable genTable) { // 文件名称 String fileName = ""; // 包路径 @@ -170,48 +161,28 @@ public class VelocityUtils String mybatisPath = MYBATIS_PATH + "/" + moduleName; String vuePath = "vue"; - if (template.contains("domain.java.vm")) - { + if (template.contains("domain.java.vm")) { fileName = StringUtils.format("{}/domain/{}.java", javaPath, className); } - if (template.contains("sub-domain.java.vm") && StringUtils.equals(GenConstants.TPL_SUB, genTable.getTplCategory())) - { + if (template.contains("sub-domain.java.vm") && StringUtils.equals(GenConstants.TPL_SUB, genTable.getTplCategory())) { fileName = StringUtils.format("{}/domain/{}.java", javaPath, genTable.getSubTable().getClassName()); - } - else if (template.contains("mapper.java.vm")) - { + } else if (template.contains("mapper.java.vm")) { fileName = StringUtils.format("{}/mapper/{}Mapper.java", javaPath, className); - } - else if (template.contains("service.java.vm")) - { + } else if (template.contains("service.java.vm")) { fileName = StringUtils.format("{}/service/I{}Service.java", javaPath, className); - } - else if (template.contains("serviceImpl.java.vm")) - { + } else if (template.contains("serviceImpl.java.vm")) { fileName = StringUtils.format("{}/service/impl/{}ServiceImpl.java", javaPath, className); - } - else if (template.contains("controller.java.vm")) - { + } else if (template.contains("controller.java.vm")) { fileName = StringUtils.format("{}/controller/{}Controller.java", javaPath, className); - } - else if (template.contains("mapper.xml.vm")) - { + } else if (template.contains("mapper.xml.vm")) { fileName = StringUtils.format("{}/{}Mapper.xml", mybatisPath, className); - } - else if (template.contains("sql.vm")) - { + } else if (template.contains("sql.vm")) { fileName = businessName + "Menu.sql"; - } - else if (template.contains("api.js.vm")) - { + } else if (template.contains("api.js.vm")) { fileName = StringUtils.format("{}/api/{}/{}.js", vuePath, moduleName, businessName); - } - else if (template.contains("index.vue.vm")) - { + } else if (template.contains("index.vue.vm")) { fileName = StringUtils.format("{}/views/{}/{}/index.vue", vuePath, moduleName, businessName); - } - else if (template.contains("index-tree.vue.vm")) - { + } else if (template.contains("index-tree.vue.vm")) { fileName = StringUtils.format("{}/views/{}/{}/index.vue", vuePath, moduleName, businessName); } return fileName; @@ -223,8 +194,7 @@ public class VelocityUtils * @param packageName 包名称 * @return 包前缀名称 */ - public static String getPackagePrefix(String packageName) - { + public static String getPackagePrefix(String packageName) { int lastIndex = packageName.lastIndexOf("."); String basePackage = StringUtils.substring(packageName, 0, lastIndex); return basePackage; @@ -232,28 +202,22 @@ public class VelocityUtils /** * 根据列类型获取导入包 - * + * * @param genTable 业务表对象 * @return 返回需要导入的包列表 */ - public static HashSet getImportList(GenTable genTable) - { + public static HashSet getImportList(GenTable genTable) { List columns = genTable.getColumns(); GenTable subGenTable = genTable.getSubTable(); HashSet importList = new HashSet(); - if (StringUtils.isNotNull(subGenTable)) - { + if (StringUtils.isNotNull(subGenTable)) { importList.add("java.util.List"); } - for (GenTableColumn column : columns) - { - if (!column.isSuperColumn() && GenConstants.TYPE_DATE.equals(column.getJavaType())) - { + for (GenTableColumn column : columns) { + if (!column.isSuperColumn() && GenConstants.TYPE_DATE.equals(column.getJavaType())) { importList.add("java.util.Date"); importList.add("com.fasterxml.jackson.annotation.JsonFormat"); - } - else if (!column.isSuperColumn() && GenConstants.TYPE_BIGDECIMAL.equals(column.getJavaType())) - { + } else if (!column.isSuperColumn() && GenConstants.TYPE_BIGDECIMAL.equals(column.getJavaType())) { importList.add("java.math.BigDecimal"); } } @@ -263,12 +227,11 @@ public class VelocityUtils /** * 获取权限前缀 * - * @param moduleName 模块名称 + * @param moduleName 模块名称 * @param businessName 业务名称 * @return 返回权限前缀 */ - public static String getPermissionPrefix(String moduleName, String businessName) - { + public static String getPermissionPrefix(String moduleName, String businessName) { return StringUtils.format("{}:{}", moduleName, businessName); } @@ -278,10 +241,8 @@ public class VelocityUtils * @param paramsObj 生成其他选项 * @return 上级菜单ID字段 */ - public static String getParentMenuId(JSONObject paramsObj) - { - if (StringUtils.isNotEmpty(paramsObj) && paramsObj.containsKey(GenConstants.PARENT_MENU_ID)) - { + public static String getParentMenuId(JSONObject paramsObj) { + if (StringUtils.isNotEmpty(paramsObj) && paramsObj.containsKey(GenConstants.PARENT_MENU_ID)) { return paramsObj.getString(GenConstants.PARENT_MENU_ID); } return DEFAULT_PARENT_MENU_ID; @@ -293,10 +254,8 @@ public class VelocityUtils * @param paramsObj 生成其他选项 * @return 树编码 */ - public static String getTreecode(JSONObject paramsObj) - { - if (paramsObj.containsKey(GenConstants.TREE_CODE)) - { + public static String getTreecode(JSONObject paramsObj) { + if (paramsObj.containsKey(GenConstants.TREE_CODE)) { return StringUtils.toCamelCase(paramsObj.getString(GenConstants.TREE_CODE)); } return StringUtils.EMPTY; @@ -308,10 +267,8 @@ public class VelocityUtils * @param paramsObj 生成其他选项 * @return 树父编码 */ - public static String getTreeParentCode(JSONObject paramsObj) - { - if (paramsObj.containsKey(GenConstants.TREE_PARENT_CODE)) - { + public static String getTreeParentCode(JSONObject paramsObj) { + if (paramsObj.containsKey(GenConstants.TREE_PARENT_CODE)) { return StringUtils.toCamelCase(paramsObj.getString(GenConstants.TREE_PARENT_CODE)); } return StringUtils.EMPTY; @@ -323,10 +280,8 @@ public class VelocityUtils * @param paramsObj 生成其他选项 * @return 树名称 */ - public static String getTreeName(JSONObject paramsObj) - { - if (paramsObj.containsKey(GenConstants.TREE_NAME)) - { + public static String getTreeName(JSONObject paramsObj) { + if (paramsObj.containsKey(GenConstants.TREE_NAME)) { return StringUtils.toCamelCase(paramsObj.getString(GenConstants.TREE_NAME)); } return StringUtils.EMPTY; @@ -338,20 +293,16 @@ public class VelocityUtils * @param genTable 业务表对象 * @return 展开按钮列序号 */ - public static int getExpandColumn(GenTable genTable) - { + public static int getExpandColumn(GenTable genTable) { String options = genTable.getOptions(); JSONObject paramsObj = JSONObject.parseObject(options); String treeName = paramsObj.getString(GenConstants.TREE_NAME); int num = 0; - for (GenTableColumn column : genTable.getColumns()) - { - if (column.isList()) - { + for (GenTableColumn column : genTable.getColumns()) { + if (column.isList()) { num++; String columnName = column.getColumnName(); - if (columnName.equals(treeName)) - { + if (columnName.equals(treeName)) { break; } } diff --git a/spring-boot/ruoyi-generator/src/main/resources/generator.yml b/spring-boot/ruoyi-generator/src/main/resources/generator.yml index 5bd3dd67..55db2bd7 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/generator.yml +++ b/spring-boot/ruoyi-generator/src/main/resources/generator.yml @@ -1,7 +1,7 @@ # 代码生成 -gen: +gen: # 作者 - author: ruoyi + author: wxy # 默认生成包路径 system 需改成自己的模块名称 如 system monitor tool packageName: com.ruoyi.system # 自动去除表前缀，默认是false diff --git a/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableColumnMapper.xml b/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableColumnMapper.xml index 5fa790f5..27e3f654 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableColumnMapper.xml +++ b/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableColumnMapper.xml @@ -1,94 +1,98 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + - - - select column_id, table_id, column_name, column_comment, column_type, java_type, java_field, is_pk, is_increment, is_required, is_insert, is_edit, is_list, is_query, query_type, html_type, dict_type, sort, create_by, create_time, update_by, update_time from gen_table_column + + + select column_id, table_id, column_name, column_comment, column_type, java_type, java_field, is_pk, + is_increment, is_required, is_insert, is_edit, is_list, is_query, query_type, html_type, dict_type, sort, + create_by, create_time, update_by, update_time from gen_table_column - + - + - + select column_name, (case when (is_nullable = 'no' column_key != 'PRI') then '1' else null end) + as is_required, (case when column_key = 'PRI' then '1' else '0' end) as is_pk, ordinal_position as sort, + column_comment, (case when extra = 'auto_increment' then '1' else '0' end) as is_increment, column_type + from information_schema.columns where table_schema = (select database()) and table_name = (#{tableName}) + order by ordinal_position + + insert into gen_table_column ( - table_id, - column_name, - column_comment, - column_type, - java_type, - java_field, - is_pk, - is_increment, - is_required, - is_insert, - is_edit, - is_list, - is_query, - query_type, - html_type, - dict_type, - sort, - create_by, - create_time - )values( - #{tableId}, - #{columnName}, - #{columnComment}, - #{columnType}, - #{javaType}, - #{javaField}, - #{isPk}, - #{isIncrement}, - #{isRequired}, - #{isInsert}, - #{isEdit}, - #{isList}, - #{isQuery}, - #{queryType}, - #{htmlType}, - #{dictType}, - #{sort}, - #{createBy}, - sysdate() - ) + table_id, + column_name, + column_comment, + column_type, + java_type, + java_field, + is_pk, + is_increment, + is_required, + is_insert, + is_edit, + is_list, + is_query, + query_type, + html_type, + dict_type, + sort, + create_by, + create_time + )values( + #{tableId}, + #{columnName}, + #{columnComment}, + #{columnType}, + #{javaType}, + #{javaField}, + #{isPk}, + #{isIncrement}, + #{isRequired}, + #{isInsert}, + #{isEdit}, + #{isList}, + #{isQuery}, + #{queryType}, + #{htmlType}, + #{dictType}, + #{sort}, + #{createBy}, + sysdate() + ) - + update gen_table_column @@ -111,14 +115,14 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" - delete from gen_table_column where table_id in + delete from gen_table_column where table_id in #{tableId} - + - delete from gen_table_column where column_id in + delete from gen_table_column where column_id in #{item.columnId} diff --git a/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableMapper.xml b/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableMapper.xml index 3162379b..089192d4 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableMapper.xml +++ b/spring-boot/ruoyi-generator/src/main/resources/mapper/generator/GenTableMapper.xml @@ -1,172 +1,183 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + - - - select table_id, table_name, table_comment, sub_table_name, sub_table_fk_name, class_name, tpl_category, package_name, module_name, business_name, function_name, function_author, gen_type, gen_path, options, create_by, create_time, update_by, update_time, remark from gen_table - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + select table_id, table_name, table_comment, sub_table_name, sub_table_fk_name, class_name, tpl_category, + package_name, module_name, business_name, function_name, function_author, gen_type, gen_path, options, + create_by, create_time, update_by, update_time, remark from gen_table + + + + + + + + + + + + + + + + + insert into gen_table ( - table_name, - table_comment, - class_name, - tpl_category, - package_name, - module_name, - business_name, - function_name, - function_author, - gen_type, - gen_path, - remark, - create_by, - create_time - )values( - #{tableName}, - #{tableComment}, - #{className}, - #{tplCategory}, - #{packageName}, - #{moduleName}, - #{businessName}, - #{functionName}, - #{functionAuthor}, - #{genType}, - #{genPath}, - #{remark}, - #{createBy}, - sysdate() - ) + table_name, + table_comment, + class_name, + tpl_category, + package_name, + module_name, + business_name, + function_name, + function_author, + gen_type, + gen_path, + remark, + create_by, + create_time + )values( + #{tableName}, + #{tableComment}, + #{className}, + #{tplCategory}, + #{packageName}, + #{moduleName}, + #{businessName}, + #{functionName}, + #{functionAuthor}, + #{genType}, + #{genPath}, + #{remark}, + #{createBy}, + sysdate() + ) - + update gen_table @@ -190,9 +201,9 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" where table_id = #{tableId} - + - delete from gen_table where table_id in + delete from gen_table where table_id in #{tableId} diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/java/controller.java.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/java/controller.java.vm index d41edd92..a66cdab0 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/java/controller.java.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/java/controller.java.vm @@ -1,6 +1,7 @@ package ${packageName}.controller; import java.util.List; + import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.web.bind.annotation.GetMapping; @@ -25,36 +26,33 @@ import com.ruoyi.common.core.page.TableDataInfo; /** * ${functionName}Controller - * + * * @author ${author} * @date ${datetime} */ @RestController @RequestMapping("/${moduleName}/${businessName}") -public class ${ClassName}Controller extends BaseController -{ +public class ${ClassName}Controller extends BaseController { @Autowired private I${ClassName}Service ${className}Service; - /** - * 查询${functionName}列表 - */ - @PreAuthorize("@ss.hasPermi('${permissionPrefix}:list')") - @GetMapping("/list") -#if($table.crud || $table.sub) - public TableDataInfo list(${ClassName} ${className}) - { +/** + * 查询${functionName}列表 + */ +@PreAuthorize("@ss.hasPermi('${permissionPrefix}:list')") +@GetMapping("/list") + #if($table.crud || $table.sub) + public TableDataInfo list(${ClassName} ${className}) { startPage(); List<${ClassName}> list = ${className}Service.select${ClassName}List(${className}); return getDataTable(list); } -#elseif($table.tree) - public AjaxResult list(${ClassName} ${className}) - { - List<${ClassName}> list = ${className}Service.select${ClassName}List(${className}); - return AjaxResult.success(list); - } -#end + #elseif($table.tree) + public AjaxResult list(${ClassName} ${className}) { + List<${ClassName}> list = ${className}Service.select${ClassName}List(${className}); + return AjaxResult.success(list); + } + #end /** * 导出${functionName}列表 @@ -62,10 +60,9 @@ public class ${ClassName}Controller extends BaseController @PreAuthorize("@ss.hasPermi('${permissionPrefix}:export')") @Log(title = "${functionName}", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(${ClassName} ${className}) - { + public AjaxResult export(${ClassName} ${className}) { List<${ClassName}> list = ${className}Service.select${ClassName}List(${className}); - ExcelUtil<${ClassName}> util = new ExcelUtil<${ClassName}>(${ClassName}.class); + ExcelUtil<${ClassName}> util = new ExcelUtil<${ClassName}>(${ClassName}. class); return util.exportExcel(list, "${businessName}"); } @@ -74,8 +71,7 @@ public class ${ClassName}Controller extends BaseController */ @PreAuthorize("@ss.hasPermi('${permissionPrefix}:query')") @GetMapping(value = "/{${pkColumn.javaField}}") - public AjaxResult getInfo(@PathVariable("${pkColumn.javaField}") ${pkColumn.javaType} ${pkColumn.javaField}) - { + public AjaxResult getInfo(@PathVariable("${pkColumn.javaField}") ${pkColumn.javaType} ${pkColumn.javaField}) { return AjaxResult.success(${className}Service.select${ClassName}ById(${pkColumn.javaField})); } @@ -85,8 +81,7 @@ public class ${ClassName}Controller extends BaseController @PreAuthorize("@ss.hasPermi('${permissionPrefix}:add')") @Log(title = "${functionName}", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody ${ClassName} ${className}) - { + public AjaxResult add(@RequestBody ${ClassName} ${className}) { return toAjax(${className}Service.insert${ClassName}(${className})); } @@ -96,8 +91,7 @@ public class ${ClassName}Controller extends BaseController @PreAuthorize("@ss.hasPermi('${permissionPrefix}:edit')") @Log(title = "${functionName}", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody ${ClassName} ${className}) - { + public AjaxResult edit(@RequestBody ${ClassName} ${className}) { return toAjax(${className}Service.update${ClassName}(${className})); } @@ -106,9 +100,8 @@ public class ${ClassName}Controller extends BaseController */ @PreAuthorize("@ss.hasPermi('${permissionPrefix}:remove')") @Log(title = "${functionName}", businessType = BusinessType.DELETE) - @DeleteMapping("/{${pkColumn.javaField}s}") - public AjaxResult remove(@PathVariable ${pkColumn.javaType}[] ${pkColumn.javaField}s) - { + @DeleteMapping("/{${pkColumn.javaField}s}") + public AjaxResult remove(@PathVariable ${pkColumn.javaType}[] ${pkColumn.javaField}s) { return toAjax(${className}Service.delete${ClassName}ByIds(${pkColumn.javaField}s)); } } diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/java/domain.java.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/java/domain.java.vm index bd51c177..ea9d7aa2 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/java/domain.java.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/java/domain.java.vm @@ -14,92 +14,92 @@ import com.ruoyi.common.core.domain.TreeEntity; /** * ${functionName}对象 ${tableName} - * + * * @author ${author} * @date ${datetime} */ #if($table.crud || $table.sub) -#set($Entity="BaseEntity") + #set($Entity="BaseEntity") #elseif($table.tree) -#set($Entity="TreeEntity") + #set($Entity="TreeEntity") #end public class ${ClassName} extends ${Entity} -{ - private static final long serialVersionUID = 1L; + { +private static final long serialVersionUID=1L; #foreach ($column in $columns) -#if(!$table.isSuperColumn($column.javaField)) + #if(!$table.isSuperColumn($column.javaField)) /** $column.columnComment */ -#if($column.list) -#set($parentheseIndex=$column.columnComment.indexOf("（")) -#if($parentheseIndex != -1) -#set($comment=$column.columnComment.substring(0, $parentheseIndex)) -#else -#set($comment=$column.columnComment) -#end -#if($parentheseIndex != -1) - @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") -#elseif($column.javaType == 'Date') - @JsonFormat(pattern = "yyyy-MM-dd") - @Excel(name = "${comment}", width = 30, dateFormat = "yyyy-MM-dd") -#else - @Excel(name = "${comment}") -#end -#end + #if($column.list) + #set($parentheseIndex=$column.columnComment.indexOf("（")) + #if($parentheseIndex != -1) + #set($comment=$column.columnComment.substring(0, $parentheseIndex)) + #else + #set($comment=$column.columnComment) + #end + #if($parentheseIndex != -1) + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + #elseif($column.javaType == 'Date') + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "${comment}", width = 30, dateFormat = "yyyy-MM-dd") + #else + @Excel(name = "${comment}") + #end + #end private $column.javaType $column.javaField; -#end + #end #end #if($table.sub) - /** $table.subTable.functionName信息 */ - private List<${subClassName}> ${subclassName}List; +/** $table.subTable.functionName信息 */ +private List<${subClassName}> ${subclassName}List; #end #foreach ($column in $columns) -#if(!$table.isSuperColumn($column.javaField)) -#if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) -#set($AttrName=$column.javaField) -#else -#set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) -#end - public void set${AttrName}($column.javaType $column.javaField) - { - this.$column.javaField = $column.javaField; - } + #if(!$table.isSuperColumn($column.javaField)) + #if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) + #set($AttrName=$column.javaField) + #else + #set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) + #end + public void set${AttrName}($column.javaType $column.javaField) + { + this.$column.javaField = $column.javaField; + } - public $column.javaType get${AttrName}() - { - return $column.javaField; - } -#end + public $column.javaType get${AttrName}() + { + return $column.javaField; + } + #end #end #if($table.sub) - public List<${subClassName}> get${subClassName}List() - { +public List<${subClassName}> get${subClassName}List() + { return ${subclassName}List; - } + } - public void set${subClassName}List(List<${subClassName}> ${subclassName}List) - { - this.${subclassName}List = ${subclassName}List; - } +public void set${subClassName}List(List<${subClassName}> ${subclassName}List) + { + this.${subclassName}List= ${subclassName}List; + } #end - @Override - public String toString() { +@Override +public String toString(){ return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) -#foreach ($column in $columns) -#if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) -#set($AttrName=$column.javaField) -#else -#set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) -#end - .append("${column.javaField}", get${AttrName}()) -#end -#if($table.sub) - .append("${subclassName}List", get${subClassName}List()) -#end - .toString(); - } -} + #foreach ($column in $columns) + #if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) + #set($AttrName=$column.javaField) + #else + #set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) + #end + .append("${column.javaField}",get${AttrName}()) + #end + #if($table.sub) + .append("${subclassName}List",get${subClassName}List()) + #end + .toString(); + } + } diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/java/mapper.java.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/java/mapper.java.vm index 1bb36d61..16d7807c 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/java/mapper.java.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/java/mapper.java.vm @@ -1,6 +1,7 @@ package ${packageName}.mapper; import java.util.List; + import ${packageName}.domain.${ClassName}; #if($table.sub) import ${packageName}.domain.${subClassName}; @@ -8,15 +9,14 @@ import ${packageName}.domain.${subClassName}; /** * ${functionName}Mapper接口 - * + * * @author ${author} * @date ${datetime} */ -public interface ${ClassName}Mapper -{ +public interface ${ClassName}Mapper { /** * 查询${functionName} - * + * * @param ${pkColumn.javaField} ${functionName}ID * @return ${functionName} */ @@ -24,7 +24,7 @@ public interface ${ClassName}Mapper /** * 查询${functionName}列表 - * + * * @param ${className} ${functionName} * @return ${functionName}集合 */ @@ -32,7 +32,7 @@ public interface ${ClassName}Mapper /** * 新增${functionName} - * + * * @param ${className} ${functionName} * @return 结果 */ @@ -40,7 +40,7 @@ public interface ${ClassName}Mapper /** * 修改${functionName} - * + * * @param ${className} ${functionName} * @return 结果 */ @@ -48,7 +48,7 @@ public interface ${ClassName}Mapper /** * 删除${functionName} - * + * * @param ${pkColumn.javaField} ${functionName}ID * @return 结果 */ @@ -56,36 +56,36 @@ public interface ${ClassName}Mapper /** * 批量删除${functionName} - * + * * @param ${pkColumn.javaField}s 需要删除的数据ID * @return 结果 */ public int delete${ClassName}ByIds(${pkColumn.javaType}[] ${pkColumn.javaField}s); -#if($table.sub) + #if($table.sub) - /** - * 批量删除${subTable.functionName} - * - * @param customerIds 需要删除的数据ID - * @return 结果 - */ - public int delete${subClassName}By${subTableFkClassName}s(${pkColumn.javaType}[] ${pkColumn.javaField}s); - - /** - * 批量新增${subTable.functionName} - * - * @param ${subclassName}List ${subTable.functionName}列表 - * @return 结果 - */ - public int batch${subClassName}(List<${subClassName}> ${subclassName}List); - + /** + * 批量删除${subTable.functionName} + * + * @param customerIds 需要删除的数据ID + * @return 结果 + */ + public int delete${subClassName}By${subTableFkClassName}s(${pkColumn.javaType}[] ${pkColumn.javaField}s); - /** - * 通过${functionName}ID删除${subTable.functionName}信息 - * - * @param roleId 角色ID - * @return 结果 - */ - public int delete${subClassName}By${subTableFkClassName}(${pkColumn.javaType} ${pkColumn.javaField}); -#end + /** + * 批量新增${subTable.functionName} + * + * @param ${subclassName}List ${subTable.functionName}列表 + * @return 结果 + */ + public int batch${subClassName}(List<${subClassName}> ${subclassName}List); + + + /** + * 通过${functionName}ID删除${subTable.functionName}信息 + * + * @param roleId 角色ID + * @return 结果 + */ + public int delete${subClassName}By${subTableFkClassName}(${pkColumn.javaType} ${pkColumn.javaField}); + #end } diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/java/service.java.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/java/service.java.vm index 1217d53c..ac08ba9b 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/java/service.java.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/java/service.java.vm @@ -1,19 +1,19 @@ package ${packageName}.service; import java.util.List; + import ${packageName}.domain.${ClassName}; /** * ${functionName}Service接口 - * + * * @author ${author} * @date ${datetime} */ -public interface I${ClassName}Service -{ +public interface I${ClassName}Service { /** * 查询${functionName} - * + * * @param ${pkColumn.javaField} ${functionName}ID * @return ${functionName} */ @@ -21,7 +21,7 @@ public interface I${ClassName}Service /** * 查询${functionName}列表 - * + * * @param ${className} ${functionName} * @return ${functionName}集合 */ @@ -29,7 +29,7 @@ public interface I${ClassName}Service /** * 新增${functionName} - * + * * @param ${className} ${functionName} * @return 结果 */ @@ -37,7 +37,7 @@ public interface I${ClassName}Service /** * 修改${functionName} - * + * * @param ${className} ${functionName} * @return 结果 */ @@ -45,7 +45,7 @@ public interface I${ClassName}Service /** * 批量删除${functionName} - * + * * @param ${pkColumn.javaField}s 需要删除的${functionName}ID * @return 结果 */ @@ -53,7 +53,7 @@ public interface I${ClassName}Service /** * 删除${functionName}信息 - * + * * @param ${pkColumn.javaField} ${functionName}ID * @return 结果 */ diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/java/serviceImpl.java.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/java/serviceImpl.java.vm index 13517384..fa0b6ee6 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/java/serviceImpl.java.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/java/serviceImpl.java.vm @@ -1,166 +1,158 @@ package ${packageName}.service.impl; import java.util.List; -#foreach ($column in $columns) -#if($column.javaField == 'createTime' || $column.javaField == 'updateTime') -import com.ruoyi.common.utils.DateUtils; -#break -#end -#end + #foreach ($column in $columns) + #if($column.javaField == 'createTime' || $column.javaField == 'updateTime') + import com.ruoyi.common.utils.DateUtils; + #break + #end + #end import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; -#if($table.sub) -import java.util.ArrayList; -import com.ruoyi.common.utils.StringUtils; -import org.springframework.transaction.annotation.Transactional; -import ${packageName}.domain.${subClassName}; -#end + #if($table.sub) + import java.util.ArrayList; + + import com.ruoyi.common.utils.StringUtils; + import org.springframework.transaction.annotation.Transactional; + import ${packageName}.domain.${subClassName}; + #end import ${packageName}.mapper.${ClassName}Mapper; import ${packageName}.domain.${ClassName}; import ${packageName}.service.I${ClassName}Service; /** * ${functionName}Service业务层处理 - * + * * @author ${author} * @date ${datetime} */ @Service -public class ${ClassName}ServiceImpl implements I${ClassName}Service -{ +public class ${ClassName}ServiceImpl implements I${ClassName}Service { @Autowired private ${ClassName}Mapper ${className}Mapper; /** * 查询${functionName} - * + * * @param ${pkColumn.javaField} ${functionName}ID * @return ${functionName} */ @Override - public ${ClassName} select${ClassName}ById(${pkColumn.javaType} ${pkColumn.javaField}) - { + public ${ClassName} select${ClassName}ById(${pkColumn.javaType} ${pkColumn.javaField}) { return ${className}Mapper.select${ClassName}ById(${pkColumn.javaField}); } /** * 查询${functionName}列表 - * + * * @param ${className} ${functionName} * @return ${functionName} */ @Override - public List<${ClassName}> select${ClassName}List(${ClassName} ${className}) - { + public List<${ClassName}> select${ClassName}List(${ClassName} ${className}) { return ${className}Mapper.select${ClassName}List(${className}); } /** * 新增${functionName} - * + * * @param ${className} ${functionName} * @return 结果 */ -#if($table.sub) - @Transactional -#end + #if($table.sub) + @Transactional + #end @Override - public int insert${ClassName}(${ClassName} ${className}) - { -#foreach ($column in $columns) -#if($column.javaField == 'createTime') - ${className}.setCreateTime(DateUtils.getNowDate()); -#end -#end -#if($table.sub) - int rows = ${className}Mapper.insert${ClassName}(${className}); - insert${subClassName}(${className}); - return rows; -#else - return ${className}Mapper.insert${ClassName}(${className}); -#end + public int insert${ClassName}(${ClassName} ${className}) { + #foreach ($column in $columns) + #if($column.javaField == 'createTime') + ${className}.setCreateTime(DateUtils.getNowDate()); + #end + #end + #if($table.sub) + int rows = ${className}Mapper.insert${ClassName}(${className}); + insert${subClassName}(${className}); + return rows; + #else + return ${className}Mapper.insert${ClassName}(${className}); + #end } /** * 修改${functionName} - * + * * @param ${className} ${functionName} * @return 结果 */ -#if($table.sub) - @Transactional -#end + #if($table.sub) + @Transactional + #end @Override - public int update${ClassName}(${ClassName} ${className}) - { -#foreach ($column in $columns) -#if($column.javaField == 'updateTime') - ${className}.setUpdateTime(DateUtils.getNowDate()); -#end -#end -#if($table.sub) - ${className}Mapper.delete${subClassName}By${subTableFkClassName}(${className}.get${pkColumn.capJavaField}()); - insert${subClassName}(${className}); -#end + public int update${ClassName}(${ClassName} ${className}) { + #foreach ($column in $columns) + #if($column.javaField == 'updateTime') + ${className}.setUpdateTime(DateUtils.getNowDate()); + #end + #end + #if($table.sub) + ${className}Mapper.delete${subClassName}By${subTableFkClassName}(${className}.get${pkColumn.capJavaField}()) + ; + insert${subClassName}(${className}); + #end return ${className}Mapper.update${ClassName}(${className}); } /** * 批量删除${functionName} - * + * * @param ${pkColumn.javaField}s 需要删除的${functionName}ID * @return 结果 */ -#if($table.sub) - @Transactional -#end + #if($table.sub) + @Transactional + #end @Override - public int delete${ClassName}ByIds(${pkColumn.javaType}[] ${pkColumn.javaField}s) - { -#if($table.sub) - ${className}Mapper.delete${subClassName}By${subTableFkClassName}s(${pkColumn.javaField}s); -#end + public int delete${ClassName}ByIds(${pkColumn.javaType}[] ${pkColumn.javaField}s) { + #if($table.sub) + ${className}Mapper.delete${subClassName}By${subTableFkClassName}s(${pkColumn.javaField}s); + #end return ${className}Mapper.delete${ClassName}ByIds(${pkColumn.javaField}s); } /** * 删除${functionName}信息 - * + * * @param ${pkColumn.javaField} ${functionName}ID * @return 结果 */ @Override - public int delete${ClassName}ById(${pkColumn.javaType} ${pkColumn.javaField}) - { -#if($table.sub) - ${className}Mapper.delete${subClassName}By${subTableFkClassName}(${pkColumn.javaField}); -#end + public int delete${ClassName}ById(${pkColumn.javaType} ${pkColumn.javaField}) { + #if($table.sub) + ${className}Mapper.delete${subClassName}By${subTableFkClassName}(${pkColumn.javaField}); + #end return ${className}Mapper.delete${ClassName}ById(${pkColumn.javaField}); } -#if($table.sub) + #if($table.sub) - /** - * 新增${subTable.functionName}信息 - * - * @param ${className} ${functionName}对象 - */ - public void insert${subClassName}(${ClassName} ${className}) - { - List<${subClassName}> ${subclassName}List = ${className}.get${subClassName}List(); - Long ${pkColumn.javaField} = ${className}.get${pkColumn.capJavaField}(); - if (StringUtils.isNotNull(${subclassName}List)) - { - List<${subClassName}> list = new ArrayList<${subClassName}>(); - for (${subClassName} ${subclassName} : ${subclassName}List) - { - ${subclassName}.set${subTableFkClassName}(${pkColumn.javaField}); - list.add(${subclassName}); - } - if (list.size() > 0) - { - ${className}Mapper.batch${subClassName}(list); + /** + * 新增${subTable.functionName}信息 + * + * @param ${className} ${functionName}对象 + */ + public void insert${subClassName}(${ClassName} ${className}) { + List<${subClassName}> ${subclassName}List = ${className}.get${subClassName}List(); + Long ${pkColumn.javaField} = ${className}.get${pkColumn.capJavaField}(); + if (StringUtils.isNotNull(${subclassName}List)) { + List<${subClassName}> list = new ArrayList<${subClassName}>(); + for (${subClassName} ${subclassName} :${subclassName}List) + { + ${subclassName}.set${subTableFkClassName}(${pkColumn.javaField}); + list.add(${subclassName}); + } + if (list.size() > 0) { + ${className}Mapper.batch${subClassName}(list); + } } } - } -#end + #end } diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/java/sub-domain.java.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/java/sub-domain.java.vm index a3f53eba..ad3890a0 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/java/sub-domain.java.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/java/sub-domain.java.vm @@ -1,8 +1,8 @@ package ${packageName}.domain; -#foreach ($import in $subImportList) -import ${import}; -#end + #foreach ($import in $subImportList) + import ${import}; + #end import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -10,67 +10,67 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * ${subTable.functionName}对象 ${subTableName} - * + * * @author ${author} * @date ${datetime} */ public class ${subClassName} extends BaseEntity -{ - private static final long serialVersionUID = 1L; + { +private static final long serialVersionUID=1L; #foreach ($column in $subTable.columns) -#if(!$table.isSuperColumn($column.javaField)) + #if(!$table.isSuperColumn($column.javaField)) /** $column.columnComment */ -#if($column.list) -#set($parentheseIndex=$column.columnComment.indexOf("（")) -#if($parentheseIndex != -1) -#set($comment=$column.columnComment.substring(0, $parentheseIndex)) -#else -#set($comment=$column.columnComment) -#end -#if($parentheseIndex != -1) - @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") -#elseif($column.javaType == 'Date') - @JsonFormat(pattern = "yyyy-MM-dd") - @Excel(name = "${comment}", width = 30, dateFormat = "yyyy-MM-dd") -#else - @Excel(name = "${comment}") -#end -#end + #if($column.list) + #set($parentheseIndex=$column.columnComment.indexOf("（")) + #if($parentheseIndex != -1) + #set($comment=$column.columnComment.substring(0, $parentheseIndex)) + #else + #set($comment=$column.columnComment) + #end + #if($parentheseIndex != -1) + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + #elseif($column.javaType == 'Date') + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "${comment}", width = 30, dateFormat = "yyyy-MM-dd") + #else + @Excel(name = "${comment}") + #end + #end private $column.javaType $column.javaField; -#end + #end #end #foreach ($column in $subTable.columns) -#if(!$table.isSuperColumn($column.javaField)) -#if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) -#set($AttrName=$column.javaField) -#else -#set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) -#end - public void set${AttrName}($column.javaType $column.javaField) - { - this.$column.javaField = $column.javaField; - } + #if(!$table.isSuperColumn($column.javaField)) + #if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) + #set($AttrName=$column.javaField) + #else + #set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) + #end + public void set${AttrName}($column.javaType $column.javaField) + { + this.$column.javaField = $column.javaField; + } - public $column.javaType get${AttrName}() - { - return $column.javaField; - } -#end + public $column.javaType get${AttrName}() + { + return $column.javaField; + } + #end #end - @Override - public String toString() { +@Override +public String toString(){ return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) -#foreach ($column in $subTable.columns) -#if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) -#set($AttrName=$column.javaField) -#else -#set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) -#end - .append("${column.javaField}", get${AttrName}()) -#end - .toString(); - } -} + #foreach ($column in $subTable.columns) + #if($column.javaField.length() > 2 && $column.javaField.substring(1,2).matches("[A-Z]")) + #set($AttrName=$column.javaField) + #else + #set($AttrName=$column.javaField.substring(0,1).toUpperCase() + ${column.javaField.substring(1)}) + #end + .append("${column.javaField}",get${AttrName}()) + #end + .toString(); + } + } diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/js/api.js.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/js/api.js.vm index 296d41ae..2947d623 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/js/api.js.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/js/api.js.vm @@ -2,52 +2,52 @@ import request from '@/utils/request' // 查询${functionName}列表 export function list${BusinessName}(query) { - return request({ - url: '/${moduleName}/${businessName}/list', - method: 'get', - params: query - }) + return request({ + url: '/${moduleName}/${businessName}/list', + method: 'get', + params: query + }) } // 查询${functionName}详细 export function get${BusinessName}(${pkColumn.javaField}) { - return request({ - url: '/${moduleName}/${businessName}/' + ${pkColumn.javaField}, - method: 'get' - }) + return request({ + url: '/${moduleName}/${businessName}/' + ${pkColumn.javaField}, + method: 'get' + }) } // 新增${functionName} export function add${BusinessName}(data) { - return request({ - url: '/${moduleName}/${businessName}', - method: 'post', - data: data - }) + return request({ + url: '/${moduleName}/${businessName}', + method: 'post', + data: data + }) } // 修改${functionName} export function update${BusinessName}(data) { - return request({ - url: '/${moduleName}/${businessName}', - method: 'put', - data: data - }) + return request({ + url: '/${moduleName}/${businessName}', + method: 'put', + data: data + }) } // 删除${functionName} export function del${BusinessName}(${pkColumn.javaField}) { - return request({ - url: '/${moduleName}/${businessName}/' + ${pkColumn.javaField}, - method: 'delete' - }) + return request({ + url: '/${moduleName}/${businessName}/' + ${pkColumn.javaField}, + method: 'delete' + }) } // 导出${functionName} export function export${BusinessName}(query) { - return request({ - url: '/${moduleName}/${businessName}/export', - method: 'get', - params: query - }) + return request({ + url: '/${moduleName}/${businessName}/export', + method: 'get', + params: query + }) } \ No newline at end of file diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index-tree.vue.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index-tree.vue.vm index 46e65cf4..3e23b928 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index-tree.vue.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index-tree.vue.vm @@ -1,523 +1,568 @@ diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index.vue.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index.vue.vm index a8f9d144..9f6bfad7 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index.vue.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/vue/index.vue.vm @@ -1,641 +1,689 @@ diff --git a/spring-boot/ruoyi-generator/src/main/resources/vm/xml/mapper.xml.vm b/spring-boot/ruoyi-generator/src/main/resources/vm/xml/mapper.xml.vm index 1cc07954..53c3e50e 100644 --- a/spring-boot/ruoyi-generator/src/main/resources/vm/xml/mapper.xml.vm +++ b/spring-boot/ruoyi-generator/src/main/resources/vm/xml/mapper.xml.vm @@ -1,103 +1,131 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + -#foreach ($column in $columns) - -#end + #foreach ($column in $columns) + + #end -#if($table.sub) + #if($table.sub) - - - + + + - -#foreach ($column in $subTable.columns) - -#end - -#end + + #foreach ($column in $subTable.columns) + + #end + + #end - select#foreach($column in $columns) $column.columnName#if($velocityCount != $columns.size()),#end#end from ${tableName} + select#foreach($column in $columns) $column.columnName#if($velocityCount != $columns.size()),#end#end + from ${tableName} - - + #if($table.crud || $table.tree) + + where ${pkColumn.columnName} = #{${pkColumn.javaField}} + #elseif($table.sub) + select#foreach($column in $columns) a.$column.columnName#if($velocityCount != $columns.size()),#end#end, + #foreach($column in $subTable.columns) b.$column.columnName#if($velocityCount != $subTable.columns.size()) + ,#end#end + + from ${tableName} a + left join ${subTableName} b on b.${subTableFkName} = a.${pkColumn.columnName} + where a.${pkColumn.columnName} = #{${pkColumn.javaField}} + #end - - + + insert into ${tableName} -#foreach($column in $columns) -#if($column.columnName != $pkColumn.columnName || !$pkColumn.increment) - $column.columnName, -#end -#end - + #foreach($column in $columns) + #if($column.columnName != $pkColumn.columnName || !$pkColumn.increment) + $column.columnName, + + #end + #end + -#foreach($column in $columns) -#if($column.columnName != $pkColumn.columnName || !$pkColumn.increment) - #{$column.javaField}, -#end -#end - + #foreach($column in $columns) + #if($column.columnName != $pkColumn.columnName || !$pkColumn.increment) + #{$column.javaField}, + + #end + #end + update ${tableName} -#foreach($column in $columns) -#if($column.columnName != $pkColumn.columnName) - $column.columnName = #{$column.javaField}, -#end -#end + #foreach($column in $columns) + #if($column.columnName != $pkColumn.columnName) + $column.columnName = + #{$column.javaField}, + + #end + #end where ${pkColumn.columnName} = #{${pkColumn.javaField}} @@ -107,29 +135,32 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" - delete from ${tableName} where ${pkColumn.columnName} in + delete from ${tableName} where ${pkColumn.columnName} in #{${pkColumn.javaField}} -#if($table.sub) - - - delete from ${subTableName} where ${subTableFkName} in - - #{${subTableFkclassName}} - - + #if($table.sub) - - delete from ${subTableName} where ${subTableFkName} = #{${subTableFkclassName}} - + + delete from ${subTableName} where ${subTableFkName} in + + #{${subTableFkclassName}} + + - - insert into ${subTableName}(#foreach($column in $subTable.columns) $column.columnName#if($velocityCount != $subTable.columns.size()),#end#end) values - - (#foreach($column in $subTable.columns) #{item.$column.javaField}#if($velocityCount != $subTable.columns.size()),#end#end) - - -#end + + delete from ${subTableName} where ${subTableFkName} = #{${subTableFkclassName}} + + + + insert into ${subTableName} + (#foreach($column in $subTable.columns) $column.columnName#if($velocityCount != $subTable.columns.size()) + ,#end#end) values + + (#foreach($column in $subTable.columns) #{item.$column.javaField + }#if($velocityCount != $subTable.columns.size()),#end#end) + + + #end \ No newline at end of file diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/config/ScheduleConfig.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/config/ScheduleConfig.java index 58c69bc3..98b5bbb1 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/config/ScheduleConfig.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/config/ScheduleConfig.java @@ -3,20 +3,19 @@ package com.ruoyi.quartz.config; import org.springframework.context.annotation.Bean; import org.springframework.context.annotation.Configuration; import org.springframework.scheduling.quartz.SchedulerFactoryBean; + import javax.sql.DataSource; import java.util.Properties; /** * 定时任务配置 - * + * * @author ruoyi */ @Configuration -public class ScheduleConfig -{ +public class ScheduleConfig { @Bean - public SchedulerFactoryBean schedulerFactoryBean(DataSource dataSource) - { + public SchedulerFactoryBean schedulerFactoryBean(DataSource dataSource) { SchedulerFactoryBean factory = new SchedulerFactoryBean(); factory.setDataSource(dataSource); diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobController.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobController.java index fc7614c9..ec35b03a 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobController.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobController.java @@ -1,6 +1,7 @@ package com.ruoyi.quartz.controller; import java.util.List; + import org.quartz.SchedulerException; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; @@ -26,13 +27,12 @@ import com.ruoyi.quartz.util.CronUtils; /** * 调度任务信息操作处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/job") -public class SysJobController extends BaseController -{ +public class SysJobController extends BaseController { @Autowired private ISysJobService jobService; @@ -41,8 +41,7 @@ public class SysJobController extends BaseController */ @PreAuthorize("@ss.hasPermi('monitor:job:list')") @GetMapping("/list") - public TableDataInfo list(SysJob sysJob) - { + public TableDataInfo list(SysJob sysJob) { startPage(); List list = jobService.selectJobList(sysJob); return getDataTable(list); @@ -54,8 +53,7 @@ public class SysJobController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:export')") @Log(title = "定时任务", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(SysJob sysJob) - { + public AjaxResult export(SysJob sysJob) { List list = jobService.selectJobList(sysJob); ExcelUtil util = new ExcelUtil(SysJob.class); return util.exportExcel(list, "定时任务"); @@ -66,8 +64,7 @@ public class SysJobController extends BaseController */ @PreAuthorize("@ss.hasPermi('monitor:job:query')") @GetMapping(value = "/{jobId}") - public AjaxResult getInfo(@PathVariable("jobId") Long jobId) - { + public AjaxResult getInfo(@PathVariable("jobId") Long jobId) { return AjaxResult.success(jobService.selectJobById(jobId)); } @@ -77,10 +74,8 @@ public class SysJobController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:add')") @Log(title = "定时任务", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody SysJob sysJob) throws SchedulerException, TaskException - { - if (!CronUtils.isValid(sysJob.getCronExpression())) - { + public AjaxResult add(@RequestBody SysJob sysJob) throws SchedulerException, TaskException { + if (!CronUtils.isValid(sysJob.getCronExpression())) { return AjaxResult.error("cron表达式不正确"); } sysJob.setCreateBy(SecurityUtils.getUsername()); @@ -93,10 +88,8 @@ public class SysJobController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:edit')") @Log(title = "定时任务", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody SysJob sysJob) throws SchedulerException, TaskException - { - if (!CronUtils.isValid(sysJob.getCronExpression())) - { + public AjaxResult edit(@RequestBody SysJob sysJob) throws SchedulerException, TaskException { + if (!CronUtils.isValid(sysJob.getCronExpression())) { return AjaxResult.error("cron表达式不正确"); } sysJob.setUpdateBy(SecurityUtils.getUsername()); @@ -109,8 +102,7 @@ public class SysJobController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:changeStatus')") @Log(title = "定时任务", businessType = BusinessType.UPDATE) @PutMapping("/changeStatus") - public AjaxResult changeStatus(@RequestBody SysJob job) throws SchedulerException - { + public AjaxResult changeStatus(@RequestBody SysJob job) throws SchedulerException { SysJob newJob = jobService.selectJobById(job.getJobId()); newJob.setStatus(job.getStatus()); return toAjax(jobService.changeStatus(newJob)); @@ -122,8 +114,7 @@ public class SysJobController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:changeStatus')") @Log(title = "定时任务", businessType = BusinessType.UPDATE) @PutMapping("/run") - public AjaxResult run(@RequestBody SysJob job) throws SchedulerException - { + public AjaxResult run(@RequestBody SysJob job) throws SchedulerException { jobService.run(job); return AjaxResult.success(); } @@ -134,8 +125,7 @@ public class SysJobController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:remove')") @Log(title = "定时任务", businessType = BusinessType.DELETE) @DeleteMapping("/{jobIds}") - public AjaxResult remove(@PathVariable Long[] jobIds) throws SchedulerException, TaskException - { + public AjaxResult remove(@PathVariable Long[] jobIds) throws SchedulerException, TaskException { jobService.deleteJobByIds(jobIds); return AjaxResult.success(); } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobLogController.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobLogController.java index b1f8204e..52fc973a 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobLogController.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/controller/SysJobLogController.java @@ -1,6 +1,7 @@ package com.ruoyi.quartz.controller; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.web.bind.annotation.DeleteMapping; @@ -19,13 +20,12 @@ import com.ruoyi.quartz.service.ISysJobLogService; /** * 调度日志操作处理 - * + * * @author ruoyi */ @RestController @RequestMapping("/monitor/jobLog") -public class SysJobLogController extends BaseController -{ +public class SysJobLogController extends BaseController { @Autowired private ISysJobLogService jobLogService; @@ -34,8 +34,7 @@ public class SysJobLogController extends BaseController */ @PreAuthorize("@ss.hasPermi('monitor:job:list')") @GetMapping("/list") - public TableDataInfo list(SysJobLog sysJobLog) - { + public TableDataInfo list(SysJobLog sysJobLog) { startPage(); List list = jobLogService.selectJobLogList(sysJobLog); return getDataTable(list); @@ -47,20 +46,18 @@ public class SysJobLogController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:export')") @Log(title = "任务调度日志", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(SysJobLog sysJobLog) - { + public AjaxResult export(SysJobLog sysJobLog) { List list = jobLogService.selectJobLogList(sysJobLog); ExcelUtil util = new ExcelUtil(SysJobLog.class); return util.exportExcel(list, "调度日志"); } - + /** * 根据调度编号获取详细信息 */ @PreAuthorize("@ss.hasPermi('monitor:job:query')") @GetMapping(value = "/{configId}") - public AjaxResult getInfo(@PathVariable Long jobLogId) - { + public AjaxResult getInfo(@PathVariable Long jobLogId) { return AjaxResult.success(jobLogService.selectJobLogById(jobLogId)); } @@ -71,8 +68,7 @@ public class SysJobLogController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:remove')") @Log(title = "定时任务调度日志", businessType = BusinessType.DELETE) @DeleteMapping("/{jobLogIds}") - public AjaxResult remove(@PathVariable Long[] jobLogIds) - { + public AjaxResult remove(@PathVariable Long[] jobLogIds) { return toAjax(jobLogService.deleteJobLogByIds(jobLogIds)); } @@ -82,8 +78,7 @@ public class SysJobLogController extends BaseController @PreAuthorize("@ss.hasPermi('monitor:job:remove')") @Log(title = "调度日志", businessType = BusinessType.CLEAN) @DeleteMapping("/clean") - public AjaxResult clean() - { + public AjaxResult clean() { jobLogService.cleanJobLog(); return AjaxResult.success(); } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJob.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJob.java index abe5b5d3..77b66e3a 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJob.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJob.java @@ -4,6 +4,7 @@ import java.io.Serializable; import java.util.Date; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.fasterxml.jackson.annotation.JsonFormat; @@ -16,157 +17,154 @@ import com.ruoyi.quartz.util.CronUtils; /** * 定时任务调度表 sys_job - * + * * @author ruoyi */ -public class SysJob extends BaseEntity implements Serializable -{ +public class SysJob extends BaseEntity implements Serializable { private static final long serialVersionUID = 1L; - /** 任务ID */ + /** + * 任务ID + */ @Excel(name = "任务序号", cellType = ColumnType.NUMERIC) private Long jobId; - /** 任务名称 */ + /** + * 任务名称 + */ @Excel(name = "任务名称") private String jobName; - /** 任务组名 */ + /** + * 任务组名 + */ @Excel(name = "任务组名") private String jobGroup; - /** 调用目标字符串 */ + /** + * 调用目标字符串 + */ @Excel(name = "调用目标字符串") private String invokeTarget; - /** cron执行表达式 */ + /** + * cron执行表达式 + */ @Excel(name = "执行表达式 ") private String cronExpression; - /** cron计划策略 */ + /** + * cron计划策略 + */ @Excel(name = "计划策略 ", readConverterExp = "0=默认,1=立即触发执行,2=触发一次执行,3=不触发立即执行") private String misfirePolicy = ScheduleConstants.MISFIRE_DEFAULT; - /** 是否并发执行（0允许 1禁止） */ + /** + * 是否并发执行（0允许 1禁止） + */ @Excel(name = "并发执行", readConverterExp = "0=允许,1=禁止") private String concurrent; - /** 任务状态（0正常 1暂停） */ + /** + * 任务状态（0正常 1暂停） + */ @Excel(name = "任务状态", readConverterExp = "0=正常,1=暂停") private String status; - public Long getJobId() - { + public Long getJobId() { return jobId; } - public void setJobId(Long jobId) - { + public void setJobId(Long jobId) { this.jobId = jobId; } @NotBlank(message = "任务名称不能为空") @Size(min = 0, max = 64, message = "任务名称不能超过64个字符") - public String getJobName() - { + public String getJobName() { return jobName; } - public void setJobName(String jobName) - { + public void setJobName(String jobName) { this.jobName = jobName; } - public String getJobGroup() - { + public String getJobGroup() { return jobGroup; } - public void setJobGroup(String jobGroup) - { + public void setJobGroup(String jobGroup) { this.jobGroup = jobGroup; } @NotBlank(message = "调用目标字符串不能为空") @Size(min = 0, max = 500, message = "调用目标字符串长度不能超过500个字符") - public String getInvokeTarget() - { + public String getInvokeTarget() { return invokeTarget; } - public void setInvokeTarget(String invokeTarget) - { + public void setInvokeTarget(String invokeTarget) { this.invokeTarget = invokeTarget; } @NotBlank(message = "Cron执行表达式不能为空") @Size(min = 0, max = 255, message = "Cron执行表达式不能超过255个字符") - public String getCronExpression() - { + public String getCronExpression() { return cronExpression; } - public void setCronExpression(String cronExpression) - { + public void setCronExpression(String cronExpression) { this.cronExpression = cronExpression; } @JsonFormat(pattern = "yyyy-MM-dd HH:mm:ss") - public Date getNextValidTime() - { - if (StringUtils.isNotEmpty(cronExpression)) - { + public Date getNextValidTime() { + if (StringUtils.isNotEmpty(cronExpression)) { return CronUtils.getNextExecution(cronExpression); } return null; } - public String getMisfirePolicy() - { + public String getMisfirePolicy() { return misfirePolicy; } - public void setMisfirePolicy(String misfirePolicy) - { + public void setMisfirePolicy(String misfirePolicy) { this.misfirePolicy = misfirePolicy; } - public String getConcurrent() - { + public String getConcurrent() { return concurrent; } - public void setConcurrent(String concurrent) - { + public void setConcurrent(String concurrent) { this.concurrent = concurrent; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("jobId", getJobId()) - .append("jobName", getJobName()) - .append("jobGroup", getJobGroup()) - .append("cronExpression", getCronExpression()) - .append("nextValidTime", getNextValidTime()) - .append("misfirePolicy", getMisfirePolicy()) - .append("concurrent", getConcurrent()) - .append("status", getStatus()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("jobId", getJobId()) + .append("jobName", getJobName()) + .append("jobGroup", getJobGroup()) + .append("cronExpression", getCronExpression()) + .append("nextValidTime", getNextValidTime()) + .append("misfirePolicy", getMisfirePolicy()) + .append("concurrent", getConcurrent()) + .append("status", getStatus()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJobLog.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJobLog.java index 121c0359..3f36a43c 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJobLog.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/domain/SysJobLog.java @@ -1,6 +1,7 @@ package com.ruoyi.quartz.domain; import java.util.Date; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -8,148 +9,147 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 定时任务调度日志表 sys_job_log - * + * * @author ruoyi */ -public class SysJobLog extends BaseEntity -{ +public class SysJobLog extends BaseEntity { private static final long serialVersionUID = 1L; - /** ID */ + /** + * ID + */ @Excel(name = "日志序号") private Long jobLogId; - /** 任务名称 */ + /** + * 任务名称 + */ @Excel(name = "任务名称") private String jobName; - /** 任务组名 */ + /** + * 任务组名 + */ @Excel(name = "任务组名") private String jobGroup; - /** 调用目标字符串 */ + /** + * 调用目标字符串 + */ @Excel(name = "调用目标字符串") private String invokeTarget; - /** 日志信息 */ + /** + * 日志信息 + */ @Excel(name = "日志信息") private String jobMessage; - /** 执行状态（0正常 1失败） */ + /** + * 执行状态（0正常 1失败） + */ @Excel(name = "执行状态", readConverterExp = "0=正常,1=失败") private String status; - /** 异常信息 */ + /** + * 异常信息 + */ @Excel(name = "异常信息") private String exceptionInfo; - /** 开始时间 */ + /** + * 开始时间 + */ private Date startTime; - /** 停止时间 */ + /** + * 停止时间 + */ private Date stopTime; - public Long getJobLogId() - { + public Long getJobLogId() { return jobLogId; } - public void setJobLogId(Long jobLogId) - { + public void setJobLogId(Long jobLogId) { this.jobLogId = jobLogId; } - public String getJobName() - { + public String getJobName() { return jobName; } - public void setJobName(String jobName) - { + public void setJobName(String jobName) { this.jobName = jobName; } - public String getJobGroup() - { + public String getJobGroup() { return jobGroup; } - public void setJobGroup(String jobGroup) - { + public void setJobGroup(String jobGroup) { this.jobGroup = jobGroup; } - public String getInvokeTarget() - { + public String getInvokeTarget() { return invokeTarget; } - public void setInvokeTarget(String invokeTarget) - { + public void setInvokeTarget(String invokeTarget) { this.invokeTarget = invokeTarget; } - public String getJobMessage() - { + public String getJobMessage() { return jobMessage; } - public void setJobMessage(String jobMessage) - { + public void setJobMessage(String jobMessage) { this.jobMessage = jobMessage; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public String getExceptionInfo() - { + public String getExceptionInfo() { return exceptionInfo; } - public void setExceptionInfo(String exceptionInfo) - { + public void setExceptionInfo(String exceptionInfo) { this.exceptionInfo = exceptionInfo; } - public Date getStartTime() - { + public Date getStartTime() { return startTime; } - public void setStartTime(Date startTime) - { + public void setStartTime(Date startTime) { this.startTime = startTime; } - - public Date getStopTime() - { + + public Date getStopTime() { return stopTime; } - public void setStopTime(Date stopTime) - { + public void setStopTime(Date stopTime) { this.stopTime = stopTime; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("jobLogId", getJobLogId()) - .append("jobName", getJobName()) - .append("jobGroup", getJobGroup()) - .append("jobMessage", getJobMessage()) - .append("status", getStatus()) - .append("exceptionInfo", getExceptionInfo()) - .append("startTime", getStartTime()) - .append("stopTime", getStopTime()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("jobLogId", getJobLogId()) + .append("jobName", getJobName()) + .append("jobGroup", getJobGroup()) + .append("jobMessage", getJobMessage()) + .append("status", getStatus()) + .append("exceptionInfo", getExceptionInfo()) + .append("startTime", getStartTime()) + .append("stopTime", getStopTime()) + .toString(); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobLogMapper.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobLogMapper.java index 727d9169..8fb2a851 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobLogMapper.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobLogMapper.java @@ -1,18 +1,18 @@ package com.ruoyi.quartz.mapper; import java.util.List; + import com.ruoyi.quartz.domain.SysJobLog; /** * 调度任务日志信息 数据层 - * + * * @author ruoyi */ -public interface SysJobLogMapper -{ +public interface SysJobLogMapper { /** * 获取quartz调度器日志的计划任务 - * + * * @param jobLog 调度日志信息 * @return 调度任务日志集合 */ @@ -27,7 +27,7 @@ public interface SysJobLogMapper /** * 通过调度任务日志ID查询调度信息 - * + * * @param jobLogId 调度任务日志ID * @return 调度任务日志对象信息 */ @@ -35,7 +35,7 @@ public interface SysJobLogMapper /** * 新增任务日志 - * + * * @param jobLog 调度日志信息 * @return 结果 */ @@ -43,7 +43,7 @@ public interface SysJobLogMapper /** * 批量删除调度日志信息 - * + * * @param logIds 需要删除的数据ID * @return 结果 */ @@ -51,7 +51,7 @@ public interface SysJobLogMapper /** * 删除任务日志 - * + * * @param jobId 调度日志ID * @return 结果 */ diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobMapper.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobMapper.java index 20f45dbb..7650d484 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobMapper.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/mapper/SysJobMapper.java @@ -1,18 +1,18 @@ package com.ruoyi.quartz.mapper; import java.util.List; + import com.ruoyi.quartz.domain.SysJob; /** * 调度任务信息 数据层 - * + * * @author ruoyi */ -public interface SysJobMapper -{ +public interface SysJobMapper { /** * 查询调度任务日志集合 - * + * * @param job 调度信息 * @return 操作日志集合 */ @@ -20,14 +20,14 @@ public interface SysJobMapper /** * 查询所有调度任务 - * + * * @return 调度任务列表 */ public List selectJobAll(); /** * 通过调度ID查询调度任务信息 - * + * * @param jobId 调度ID * @return 角色对象信息 */ @@ -35,7 +35,7 @@ public interface SysJobMapper /** * 通过调度ID删除调度任务信息 - * + * * @param jobId 调度ID * @return 结果 */ @@ -43,7 +43,7 @@ public interface SysJobMapper /** * 批量删除调度任务信息 - * + * * @param ids 需要删除的数据ID * @return 结果 */ @@ -51,7 +51,7 @@ public interface SysJobMapper /** * 修改调度任务信息 - * + * * @param job 调度任务信息 * @return 结果 */ @@ -59,7 +59,7 @@ public interface SysJobMapper /** * 新增调度任务信息 - * + * * @param job 调度任务信息 * @return 结果 */ diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobLogService.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobLogService.java index 8546792a..41171f3b 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobLogService.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobLogService.java @@ -1,18 +1,18 @@ package com.ruoyi.quartz.service; import java.util.List; + import com.ruoyi.quartz.domain.SysJobLog; /** * 定时任务调度日志信息信息 服务层 - * + * * @author ruoyi */ -public interface ISysJobLogService -{ +public interface ISysJobLogService { /** * 获取quartz调度器日志的计划任务 - * + * * @param jobLog 调度日志信息 * @return 调度任务日志集合 */ @@ -20,7 +20,7 @@ public interface ISysJobLogService /** * 通过调度任务日志ID查询调度信息 - * + * * @param jobLogId 调度任务日志ID * @return 调度任务日志对象信息 */ @@ -28,14 +28,14 @@ public interface ISysJobLogService /** * 新增任务日志 - * + * * @param jobLog 调度日志信息 */ public void addJobLog(SysJobLog jobLog); /** * 批量删除调度日志信息 - * + * * @param logIds 需要删除的日志ID * @return 结果 */ @@ -43,7 +43,7 @@ public interface ISysJobLogService /** * 删除任务日志 - * + * * @param jobId 调度日志ID * @return 结果 */ diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobService.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobService.java index 6d62661c..f4d38586 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobService.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/ISysJobService.java @@ -1,20 +1,20 @@ package com.ruoyi.quartz.service; import java.util.List; + import org.quartz.SchedulerException; import com.ruoyi.common.exception.job.TaskException; import com.ruoyi.quartz.domain.SysJob; /** * 定时任务调度信息信息 服务层 - * + * * @author ruoyi */ -public interface ISysJobService -{ +public interface ISysJobService { /** * 获取quartz调度器的计划任务 - * + * * @param job 调度信息 * @return 调度任务集合 */ @@ -22,7 +22,7 @@ public interface ISysJobService /** * 通过调度任务ID查询调度信息 - * + * * @param jobId 调度任务ID * @return 调度任务对象信息 */ @@ -30,7 +30,7 @@ public interface ISysJobService /** * 暂停任务 - * + * * @param job 调度信息 * @return 结果 */ @@ -38,7 +38,7 @@ public interface ISysJobService /** * 恢复任务 - * + * * @param job 调度信息 * @return 结果 */ @@ -46,7 +46,7 @@ public interface ISysJobService /** * 删除任务后，所对应的trigger也将被删除 - * + * * @param job 调度信息 * @return 结果 */ @@ -54,7 +54,7 @@ public interface ISysJobService /** * 批量删除调度信息 - * + * * @param jobIds 需要删除的任务ID * @return 结果 */ @@ -62,7 +62,7 @@ public interface ISysJobService /** * 任务调度状态修改 - * + * * @param job 调度信息 * @return 结果 */ @@ -70,7 +70,7 @@ public interface ISysJobService /** * 立即运行任务 - * + * * @param job 调度信息 * @return 结果 */ @@ -78,7 +78,7 @@ public interface ISysJobService /** * 新增任务 - * + * * @param job 调度信息 * @return 结果 */ @@ -86,7 +86,7 @@ public interface ISysJobService /** * 更新任务 - * + * * @param job 调度信息 * @return 结果 */ @@ -94,7 +94,7 @@ public interface ISysJobService /** * 校验cron表达式是否有效 - * + * * @param cronExpression 表达式 * @return 结果 */ diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobLogServiceImpl.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobLogServiceImpl.java index 812eed77..48d07073 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobLogServiceImpl.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobLogServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.quartz.service.impl; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.quartz.domain.SysJobLog; @@ -9,70 +10,64 @@ import com.ruoyi.quartz.service.ISysJobLogService; /** * 定时任务调度日志信息 服务层 - * + * * @author ruoyi */ @Service -public class SysJobLogServiceImpl implements ISysJobLogService -{ +public class SysJobLogServiceImpl implements ISysJobLogService { @Autowired private SysJobLogMapper jobLogMapper; /** * 获取quartz调度器日志的计划任务 - * + * * @param jobLog 调度日志信息 * @return 调度任务日志集合 */ @Override - public List selectJobLogList(SysJobLog jobLog) - { + public List selectJobLogList(SysJobLog jobLog) { return jobLogMapper.selectJobLogList(jobLog); } /** * 通过调度任务日志ID查询调度信息 - * + * * @param jobLogId 调度任务日志ID * @return 调度任务日志对象信息 */ @Override - public SysJobLog selectJobLogById(Long jobLogId) - { + public SysJobLog selectJobLogById(Long jobLogId) { return jobLogMapper.selectJobLogById(jobLogId); } /** * 新增任务日志 - * + * * @param jobLog 调度日志信息 */ @Override - public void addJobLog(SysJobLog jobLog) - { + public void addJobLog(SysJobLog jobLog) { jobLogMapper.insertJobLog(jobLog); } /** * 批量删除调度日志信息 - * + * * @param logIds 需要删除的数据ID * @return 结果 */ @Override - public int deleteJobLogByIds(Long[] logIds) - { + public int deleteJobLogByIds(Long[] logIds) { return jobLogMapper.deleteJobLogByIds(logIds); } /** * 删除任务日志 - * + * * @param jobId 调度日志ID */ @Override - public int deleteJobLogById(Long jobId) - { + public int deleteJobLogById(Long jobId) { return jobLogMapper.deleteJobLogById(jobId); } @@ -80,8 +75,7 @@ public class SysJobLogServiceImpl implements ISysJobLogService * 清空任务日志 */ @Override - public void cleanJobLog() - { + public void cleanJobLog() { jobLogMapper.cleanJobLog(); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobServiceImpl.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobServiceImpl.java index 57a52438..46e0eadb 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobServiceImpl.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/service/impl/SysJobServiceImpl.java @@ -2,6 +2,7 @@ package com.ruoyi.quartz.service.impl; import java.util.List; import javax.annotation.PostConstruct; + import org.quartz.JobDataMap; import org.quartz.JobKey; import org.quartz.Scheduler; @@ -19,12 +20,11 @@ import com.ruoyi.quartz.util.ScheduleUtils; /** * 定时任务调度信息 服务层 - * + * * @author ruoyi */ @Service -public class SysJobServiceImpl implements ISysJobService -{ +public class SysJobServiceImpl implements ISysJobService { @Autowired private Scheduler scheduler; @@ -35,55 +35,49 @@ public class SysJobServiceImpl implements ISysJobService * 项目启动时，初始化定时器 主要是防止手动修改数据库导致未同步到定时任务处理（注：不能手动修改数据库ID和任务组名，否则会导致脏数据） */ @PostConstruct - public void init() throws SchedulerException, TaskException - { + public void init() throws SchedulerException, TaskException { scheduler.clear(); List jobList = jobMapper.selectJobAll(); - for (SysJob job : jobList) - { + for (SysJob job : jobList) { ScheduleUtils.createScheduleJob(scheduler, job); } } /** * 获取quartz调度器的计划任务列表 - * + * * @param job 调度信息 * @return */ @Override - public List selectJobList(SysJob job) - { + public List selectJobList(SysJob job) { return jobMapper.selectJobList(job); } /** * 通过调度任务ID查询调度信息 - * + * * @param jobId 调度任务ID * @return 调度任务对象信息 */ @Override - public SysJob selectJobById(Long jobId) - { + public SysJob selectJobById(Long jobId) { return jobMapper.selectJobById(jobId); } /** * 暂停任务 - * + * * @param job 调度信息 */ @Override @Transactional - public int pauseJob(SysJob job) throws SchedulerException - { + public int pauseJob(SysJob job) throws SchedulerException { Long jobId = job.getJobId(); String jobGroup = job.getJobGroup(); job.setStatus(ScheduleConstants.Status.PAUSE.getValue()); int rows = jobMapper.updateJob(job); - if (rows > 0) - { + if (rows > 0) { scheduler.pauseJob(ScheduleUtils.getJobKey(jobId, jobGroup)); } return rows; @@ -91,19 +85,17 @@ public class SysJobServiceImpl implements ISysJobService /** * 恢复任务 - * + * * @param job 调度信息 */ @Override @Transactional - public int resumeJob(SysJob job) throws SchedulerException - { + public int resumeJob(SysJob job) throws SchedulerException { Long jobId = job.getJobId(); String jobGroup = job.getJobGroup(); job.setStatus(ScheduleConstants.Status.NORMAL.getValue()); int rows = jobMapper.updateJob(job); - if (rows > 0) - { + if (rows > 0) { scheduler.resumeJob(ScheduleUtils.getJobKey(jobId, jobGroup)); } return rows; @@ -111,18 +103,16 @@ public class SysJobServiceImpl implements ISysJobService /** * 删除任务后，所对应的trigger也将被删除 - * + * * @param job 调度信息 */ @Override @Transactional - public int deleteJob(SysJob job) throws SchedulerException - { + public int deleteJob(SysJob job) throws SchedulerException { Long jobId = job.getJobId(); String jobGroup = job.getJobGroup(); int rows = jobMapper.deleteJobById(jobId); - if (rows > 0) - { + if (rows > 0) { scheduler.deleteJob(ScheduleUtils.getJobKey(jobId, jobGroup)); } return rows; @@ -130,16 +120,14 @@ public class SysJobServiceImpl implements ISysJobService /** * 批量删除调度信息 - * + * * @param jobIds 需要删除的任务ID * @return 结果 */ @Override @Transactional - public void deleteJobByIds(Long[] jobIds) throws SchedulerException - { - for (Long jobId : jobIds) - { + public void deleteJobByIds(Long[] jobIds) throws SchedulerException { + for (Long jobId : jobIds) { SysJob job = jobMapper.selectJobById(jobId); deleteJob(job); } @@ -147,21 +135,17 @@ public class SysJobServiceImpl implements ISysJobService /** * 任务调度状态修改 - * + * * @param job 调度信息 */ @Override @Transactional - public int changeStatus(SysJob job) throws SchedulerException - { + public int changeStatus(SysJob job) throws SchedulerException { int rows = 0; String status = job.getStatus(); - if (ScheduleConstants.Status.NORMAL.getValue().equals(status)) - { + if (ScheduleConstants.Status.NORMAL.getValue().equals(status)) { rows = resumeJob(job); - } - else if (ScheduleConstants.Status.PAUSE.getValue().equals(status)) - { + } else if (ScheduleConstants.Status.PAUSE.getValue().equals(status)) { rows = pauseJob(job); } return rows; @@ -169,13 +153,12 @@ public class SysJobServiceImpl implements ISysJobService /** * 立即运行任务 - * + * * @param job 调度信息 */ @Override @Transactional - public void run(SysJob job) throws SchedulerException - { + public void run(SysJob job) throws SchedulerException { Long jobId = job.getJobId(); String jobGroup = job.getJobGroup(); SysJob properties = selectJobById(job.getJobId()); @@ -187,17 +170,15 @@ public class SysJobServiceImpl implements ISysJobService /** * 新增任务 - * + * * @param job 调度信息 调度信息 */ @Override @Transactional - public int insertJob(SysJob job) throws SchedulerException, TaskException - { + public int insertJob(SysJob job) throws SchedulerException, TaskException { job.setStatus(ScheduleConstants.Status.PAUSE.getValue()); int rows = jobMapper.insertJob(job); - if (rows > 0) - { + if (rows > 0) { ScheduleUtils.createScheduleJob(scheduler, job); } return rows; @@ -205,17 +186,15 @@ public class SysJobServiceImpl implements ISysJobService /** * 更新任务的时间表达式 - * + * * @param job 调度信息 */ @Override @Transactional - public int updateJob(SysJob job) throws SchedulerException, TaskException - { + public int updateJob(SysJob job) throws SchedulerException, TaskException { SysJob properties = selectJobById(job.getJobId()); int rows = jobMapper.updateJob(job); - if (rows > 0) - { + if (rows > 0) { updateSchedulerJob(job, properties.getJobGroup()); } return rows; @@ -223,17 +202,15 @@ public class SysJobServiceImpl implements ISysJobService /** * 更新任务 - * - * @param job 任务对象 + * + * @param job 任务对象 * @param jobGroup 任务组名 */ - public void updateSchedulerJob(SysJob job, String jobGroup) throws SchedulerException, TaskException - { + public void updateSchedulerJob(SysJob job, String jobGroup) throws SchedulerException, TaskException { Long jobId = job.getJobId(); // 判断是否存在 JobKey jobKey = ScheduleUtils.getJobKey(jobId, jobGroup); - if (scheduler.checkExists(jobKey)) - { + if (scheduler.checkExists(jobKey)) { // 防止创建时存在数据问题 先移除，然后在执行创建操作 scheduler.deleteJob(jobKey); } @@ -242,13 +219,12 @@ public class SysJobServiceImpl implements ISysJobService /** * 校验cron表达式是否有效 - * + * * @param cronExpression 表达式 * @return 结果 */ @Override - public boolean checkCronExpressionIsValid(String cronExpression) - { + public boolean checkCronExpressionIsValid(String cronExpression) { return CronUtils.isValid(cronExpression); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/task/RyTask.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/task/RyTask.java index 853243ba..b4b94c89 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/task/RyTask.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/task/RyTask.java @@ -5,24 +5,20 @@ import com.ruoyi.common.utils.StringUtils; /** * 定时任务调度测试 - * + * * @author ruoyi */ @Component("ryTask") -public class RyTask -{ - public void ryMultipleParams(String s, Boolean b, Long l, Double d, Integer i) - { +public class RyTask { + public void ryMultipleParams(String s, Boolean b, Long l, Double d, Integer i) { System.out.println(StringUtils.format("执行多参方法： 字符串类型{}，布尔类型{}，长整型{}，浮点型{}，整形{}", s, b, l, d, i)); } - public void ryParams(String params) - { + public void ryParams(String params) { System.out.println("执行有参方法：" + params); } - public void ryNoParams() - { + public void ryNoParams() { System.out.println("执行无参方法"); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/AbstractQuartzJob.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/AbstractQuartzJob.java index 731a5eb5..f3db6aa1 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/AbstractQuartzJob.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/AbstractQuartzJob.java @@ -1,6 +1,7 @@ package com.ruoyi.quartz.util; import java.util.Date; + import org.quartz.Job; import org.quartz.JobExecutionContext; import org.quartz.JobExecutionException; @@ -21,8 +22,7 @@ import com.ruoyi.quartz.service.ISysJobLogService; * * @author ruoyi */ -public abstract class AbstractQuartzJob implements Job -{ +public abstract class AbstractQuartzJob implements Job { private static final Logger log = LoggerFactory.getLogger(AbstractQuartzJob.class); /** @@ -31,21 +31,16 @@ public abstract class AbstractQuartzJob implements Job private static ThreadLocal threadLocal = new ThreadLocal<>(); @Override - public void execute(JobExecutionContext context) throws JobExecutionException - { + public void execute(JobExecutionContext context) throws JobExecutionException { SysJob sysJob = new SysJob(); BeanUtils.copyBeanProp(sysJob, context.getMergedJobDataMap().get(ScheduleConstants.TASK_PROPERTIES)); - try - { + try { before(context, sysJob); - if (sysJob != null) - { + if (sysJob != null) { doExecute(context, sysJob); } after(context, sysJob, null); - } - catch (Exception e) - { + } catch (Exception e) { log.error("任务执行异常 - ：", e); after(context, sysJob, e); } @@ -55,10 +50,9 @@ public abstract class AbstractQuartzJob implements Job * 执行前 * * @param context 工作执行上下文对象 - * @param sysJob 系统计划任务 + * @param sysJob 系统计划任务 */ - protected void before(JobExecutionContext context, SysJob sysJob) - { + protected void before(JobExecutionContext context, SysJob sysJob) { threadLocal.set(new Date()); } @@ -66,10 +60,9 @@ public abstract class AbstractQuartzJob implements Job * 执行后 * * @param context 工作执行上下文对象 - * @param sysJob 系统计划任务 + * @param sysJob 系统计划任务 */ - protected void after(JobExecutionContext context, SysJob sysJob, Exception e) - { + protected void after(JobExecutionContext context, SysJob sysJob, Exception e) { Date startTime = threadLocal.get(); threadLocal.remove(); @@ -81,14 +74,11 @@ public abstract class AbstractQuartzJob implements Job sysJobLog.setStopTime(new Date()); long runMs = sysJobLog.getStopTime().getTime() - sysJobLog.getStartTime().getTime(); sysJobLog.setJobMessage(sysJobLog.getJobName() + " 总共耗时：" + runMs + "毫秒"); - if (e != null) - { + if (e != null) { sysJobLog.setStatus(Constants.FAIL); String errorMsg = StringUtils.substring(ExceptionUtil.getExceptionMessage(e), 0, 2000); sysJobLog.setExceptionInfo(errorMsg); - } - else - { + } else { sysJobLog.setStatus(Constants.SUCCESS); } @@ -100,7 +90,7 @@ public abstract class AbstractQuartzJob implements Job * 执行方法，由子类重载 * * @param context 工作执行上下文对象 - * @param sysJob 系统计划任务 + * @param sysJob 系统计划任务 * @throws Exception 执行过程中的异常 */ protected abstract void doExecute(JobExecutionContext context, SysJob sysJob) throws Exception; diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/CronUtils.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/CronUtils.java index dd538397..a91e2505 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/CronUtils.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/CronUtils.java @@ -2,24 +2,22 @@ package com.ruoyi.quartz.util; import java.text.ParseException; import java.util.Date; + import org.quartz.CronExpression; /** * cron表达式工具类 - * - * @author ruoyi * + * @author ruoyi */ -public class CronUtils -{ +public class CronUtils { /** * 返回一个布尔值代表一个给定的Cron表达式的有效性 * * @param cronExpression Cron表达式 * @return boolean 表达式是否有效 */ - public static boolean isValid(String cronExpression) - { + public static boolean isValid(String cronExpression) { return CronExpression.isValidExpression(cronExpression); } @@ -29,15 +27,11 @@ public class CronUtils * @param cronExpression Cron表达式 * @return String 无效时返回表达式错误描述,如果有效返回null */ - public static String getInvalidMessage(String cronExpression) - { - try - { + public static String getInvalidMessage(String cronExpression) { + try { new CronExpression(cronExpression); return null; - } - catch (ParseException pe) - { + } catch (ParseException pe) { return pe.getMessage(); } } @@ -48,15 +42,11 @@ public class CronUtils * @param cronExpression Cron表达式 * @return Date 下次Cron表达式执行时间 */ - public static Date getNextExecution(String cronExpression) - { - try - { + public static Date getNextExecution(String cronExpression) { + try { CronExpression cron = new CronExpression(cronExpression); return cron.getNextValidTimeAfter(new Date(System.currentTimeMillis())); - } - catch (ParseException e) - { + } catch (ParseException e) { throw new IllegalArgumentException(e.getMessage()); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/JobInvokeUtil.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/JobInvokeUtil.java index 40a19bde..7e5661a1 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/JobInvokeUtil.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/JobInvokeUtil.java @@ -4,6 +4,7 @@ import java.lang.reflect.InvocationTargetException; import java.lang.reflect.Method; import java.util.LinkedList; import java.util.List; + import com.ruoyi.common.utils.StringUtils; import com.ruoyi.common.utils.spring.SpringUtils; import com.ruoyi.quartz.domain.SysJob; @@ -13,27 +14,22 @@ import com.ruoyi.quartz.domain.SysJob; * * @author ruoyi */ -public class JobInvokeUtil -{ +public class JobInvokeUtil { /** * 执行方法 * * @param sysJob 系统任务 */ - public static void invokeMethod(SysJob sysJob) throws Exception - { + public static void invokeMethod(SysJob sysJob) throws Exception { String invokeTarget = sysJob.getInvokeTarget(); String beanName = getBeanName(invokeTarget); String methodName = getMethodName(invokeTarget); List methodParams = getMethodParams(invokeTarget); - if (!isValidClassName(beanName)) - { + if (!isValidClassName(beanName)) { Object bean = SpringUtils.getBean(beanName); invokeMethod(bean, methodName, methodParams); - } - else - { + } else { Object bean = Class.forName(beanName).newInstance(); invokeMethod(bean, methodName, methodParams); } @@ -42,21 +38,17 @@ public class JobInvokeUtil /** * 调用任务方法 * - * @param bean 目标对象 - * @param methodName 方法名称 + * @param bean 目标对象 + * @param methodName 方法名称 * @param methodParams 方法参数 */ private static void invokeMethod(Object bean, String methodName, List methodParams) throws NoSuchMethodException, SecurityException, IllegalAccessException, IllegalArgumentException, - InvocationTargetException - { - if (StringUtils.isNotNull(methodParams) && methodParams.size() > 0) - { + InvocationTargetException { + if (StringUtils.isNotNull(methodParams) && methodParams.size() > 0) { Method method = bean.getClass().getDeclaredMethod(methodName, getMethodParamsType(methodParams)); method.invoke(bean, getMethodParamsValue(methodParams)); - } - else - { + } else { Method method = bean.getClass().getDeclaredMethod(methodName); method.invoke(bean); } @@ -64,81 +56,70 @@ public class JobInvokeUtil /** * 校验是否为为class包名 - * + * * @param str 名称 * @return true是 false否 */ - public static boolean isValidClassName(String invokeTarget) - { + public static boolean isValidClassName(String invokeTarget) { return StringUtils.countMatches(invokeTarget, ".") > 1; } /** * 获取bean名称 - * + * * @param invokeTarget 目标字符串 * @return bean名称 */ - public static String getBeanName(String invokeTarget) - { + public static String getBeanName(String invokeTarget) { String beanName = StringUtils.substringBefore(invokeTarget, "("); return StringUtils.substringBeforeLast(beanName, "."); } /** * 获取bean方法 - * + * * @param invokeTarget 目标字符串 * @return method方法 */ - public static String getMethodName(String invokeTarget) - { + public static String getMethodName(String invokeTarget) { String methodName = StringUtils.substringBefore(invokeTarget, "("); return StringUtils.substringAfterLast(methodName, "."); } /** * 获取method方法参数相关列表 - * + * * @param invokeTarget 目标字符串 * @return method方法相关参数列表 */ - public static List getMethodParams(String invokeTarget) - { + public static List getMethodParams(String invokeTarget) { String methodStr = StringUtils.substringBetween(invokeTarget, "(", ")"); - if (StringUtils.isEmpty(methodStr)) - { + if (StringUtils.isEmpty(methodStr)) { return null; } String[] methodParams = methodStr.split(","); List classs = new LinkedList<>(); - for (int i = 0; i < methodParams.length; i++) - { + for (int i = 0; i < methodParams.length; i++) { String str = StringUtils.trimToEmpty(methodParams[i]); // String字符串类型，包含' - if (StringUtils.contains(str, "'")) - { - classs.add(new Object[] { StringUtils.replace(str, "'", ""), String.class }); + if (StringUtils.contains(str, "'")) { + classs.add(new Object[]{StringUtils.replace(str, "'", ""), String.class}); } // boolean布尔类型，等于true或者false - else if (StringUtils.equals(str, "true") || StringUtils.equalsIgnoreCase(str, "false")) - { - classs.add(new Object[] { Boolean.valueOf(str), Boolean.class }); + else if (StringUtils.equals(str, "true") || StringUtils.equalsIgnoreCase(str, "false")) { + classs.add(new Object[]{Boolean.valueOf(str), Boolean.class}); } // long长整形，包含L - else if (StringUtils.containsIgnoreCase(str, "L")) - { - classs.add(new Object[] { Long.valueOf(StringUtils.replaceIgnoreCase(str, "L", "")), Long.class }); + else if (StringUtils.containsIgnoreCase(str, "L")) { + classs.add(new Object[]{Long.valueOf(StringUtils.replaceIgnoreCase(str, "L", "")), Long.class}); } // double浮点类型，包含D - else if (StringUtils.containsIgnoreCase(str, "D")) - { - classs.add(new Object[] { Double.valueOf(StringUtils.replaceIgnoreCase(str, "D", "")), Double.class }); + else if (StringUtils.containsIgnoreCase(str, "D")) { + classs.add(new Object[]{Double.valueOf(StringUtils.replaceIgnoreCase(str, "D", "")), Double.class}); } // 其他类型归类为整形 - else - { - classs.add(new Object[] { Integer.valueOf(str), Integer.class }); + else { + classs.add(new Object[]{Integer.valueOf(str), Integer.class}); } } return classs; @@ -146,16 +127,14 @@ public class JobInvokeUtil /** * 获取参数类型 - * + * * @param methodParams 参数相关列表 * @return 参数类型列表 */ - public static Class[] getMethodParamsType(List methodParams) - { + public static Class[] getMethodParamsType(List methodParams) { Class[] classs = new Class[methodParams.size()]; int index = 0; - for (Object[] os : methodParams) - { + for (Object[] os : methodParams) { classs[index] = (Class) os[1]; index++; } @@ -164,16 +143,14 @@ public class JobInvokeUtil /** * 获取参数值 - * + * * @param methodParams 参数相关列表 * @return 参数值列表 */ - public static Object[] getMethodParamsValue(List methodParams) - { + public static Object[] getMethodParamsValue(List methodParams) { Object[] classs = new Object[methodParams.size()]; int index = 0; - for (Object[] os : methodParams) - { + for (Object[] os : methodParams) { classs[index] = (Object) os[0]; index++; } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzDisallowConcurrentExecution.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzDisallowConcurrentExecution.java index 5e135580..6d9c550d 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzDisallowConcurrentExecution.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzDisallowConcurrentExecution.java @@ -6,16 +6,13 @@ import com.ruoyi.quartz.domain.SysJob; /** * 定时任务处理（禁止并发执行） - * - * @author ruoyi * + * @author ruoyi */ @DisallowConcurrentExecution -public class QuartzDisallowConcurrentExecution extends AbstractQuartzJob -{ +public class QuartzDisallowConcurrentExecution extends AbstractQuartzJob { @Override - protected void doExecute(JobExecutionContext context, SysJob sysJob) throws Exception - { + protected void doExecute(JobExecutionContext context, SysJob sysJob) throws Exception { JobInvokeUtil.invokeMethod(sysJob); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzJobExecution.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzJobExecution.java index e9753261..733f03e2 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzJobExecution.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/QuartzJobExecution.java @@ -5,15 +5,12 @@ import com.ruoyi.quartz.domain.SysJob; /** * 定时任务处理（允许并发执行） - * - * @author ruoyi * + * @author ruoyi */ -public class QuartzJobExecution extends AbstractQuartzJob -{ +public class QuartzJobExecution extends AbstractQuartzJob { @Override - protected void doExecute(JobExecutionContext context, SysJob sysJob) throws Exception - { + protected void doExecute(JobExecutionContext context, SysJob sysJob) throws Exception { JobInvokeUtil.invokeMethod(sysJob); } } diff --git a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/ScheduleUtils.java b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/ScheduleUtils.java index 7f4213f1..ec6dba39 100644 --- a/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/ScheduleUtils.java +++ b/spring-boot/ruoyi-quartz/src/main/java/com/ruoyi/quartz/util/ScheduleUtils.java @@ -17,20 +17,17 @@ import com.ruoyi.quartz.domain.SysJob; /** * 定时任务工具类 - * - * @author ruoyi * + * @author ruoyi */ -public class ScheduleUtils -{ +public class ScheduleUtils { /** * 得到quartz任务类 * * @param sysJob 执行计划 * @return 具体执行任务类 */ - private static Class getQuartzJobClass(SysJob sysJob) - { + private static Class getQuartzJobClass(SysJob sysJob) { boolean isConcurrent = "0".equals(sysJob.getConcurrent()); return isConcurrent ? QuartzJobExecution.class : QuartzDisallowConcurrentExecution.class; } @@ -38,24 +35,21 @@ public class ScheduleUtils /** * 构建任务触发对象 */ - public static TriggerKey getTriggerKey(Long jobId, String jobGroup) - { + public static TriggerKey getTriggerKey(Long jobId, String jobGroup) { return TriggerKey.triggerKey(ScheduleConstants.TASK_CLASS_NAME + jobId, jobGroup); } /** * 构建任务键对象 */ - public static JobKey getJobKey(Long jobId, String jobGroup) - { + public static JobKey getJobKey(Long jobId, String jobGroup) { return JobKey.jobKey(ScheduleConstants.TASK_CLASS_NAME + jobId, jobGroup); } /** * 创建定时任务 */ - public static void createScheduleJob(Scheduler scheduler, SysJob job) throws SchedulerException, TaskException - { + public static void createScheduleJob(Scheduler scheduler, SysJob job) throws SchedulerException, TaskException { Class jobClass = getQuartzJobClass(job); // 构建job信息 Long jobId = job.getJobId(); @@ -74,8 +68,7 @@ public class ScheduleUtils jobDetail.getJobDataMap().put(ScheduleConstants.TASK_PROPERTIES, job); // 判断是否存在 - if (scheduler.checkExists(getJobKey(jobId, jobGroup))) - { + if (scheduler.checkExists(getJobKey(jobId, jobGroup))) { // 防止创建时存在数据问题 先移除，然后在执行创建操作 scheduler.deleteJob(getJobKey(jobId, jobGroup)); } @@ -83,8 +76,7 @@ public class ScheduleUtils scheduler.scheduleJob(jobDetail, trigger); // 暂停任务 - if (job.getStatus().equals(ScheduleConstants.Status.PAUSE.getValue())) - { + if (job.getStatus().equals(ScheduleConstants.Status.PAUSE.getValue())) { scheduler.pauseJob(ScheduleUtils.getJobKey(jobId, jobGroup)); } } @@ -93,10 +85,8 @@ public class ScheduleUtils * 设置定时任务策略 */ public static CronScheduleBuilder handleCronScheduleMisfirePolicy(SysJob job, CronScheduleBuilder cb) - throws TaskException - { - switch (job.getMisfirePolicy()) - { + throws TaskException { + switch (job.getMisfirePolicy()) { case ScheduleConstants.MISFIRE_DEFAULT: return cb; case ScheduleConstants.MISFIRE_IGNORE_MISFIRES: diff --git a/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobLogMapper.xml b/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobLogMapper.xml index e608e428..09ff5f2e 100644 --- a/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobLogMapper.xml +++ b/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobLogMapper.xml @@ -1,93 +1,93 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - select job_log_id, job_name, job_group, invoke_target, job_message, status, exception_info, create_time - from sys_job_log + + + + + + + + + + + + + select job_log_id, job_name, job_group, invoke_target, job_message, status, exception_info, create_time + from sys_job_log - - - - - - - - - delete from sys_job_log where job_log_id = #{jobLogId} - - - - delete from sys_job_log where job_log_id in - - #{jobLogId} - - - - + + + + + + + + + delete from sys_job_log where job_log_id = #{jobLogId} + + + + delete from sys_job_log where job_log_id in + + #{jobLogId} + + + + truncate table sys_job_log - - - insert into sys_job_log( - job_log_id, - job_name, - job_group, - invoke_target, - job_message, - status, - exception_info, - create_time - )values( - #{jobLogId}, - #{jobName}, - #{jobGroup}, - #{invokeTarget}, - #{jobMessage}, - #{status}, - #{exceptionInfo}, - sysdate() - ) - + + + insert into sys_job_log( + job_log_id, + job_name, + job_group, + invoke_target, + job_message, + status, + exception_info, + create_time + )values( + #{jobLogId}, + #{jobName}, + #{jobGroup}, + #{invokeTarget}, + #{jobMessage}, + #{status}, + #{exceptionInfo}, + sysdate() + ) + \ No newline at end of file diff --git a/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobMapper.xml b/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobMapper.xml index 5605c444..225b82fb 100644 --- a/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobMapper.xml +++ b/spring-boot/ruoyi-quartz/src/main/resources/mapper/quartz/SysJobMapper.xml @@ -1,111 +1,112 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - select job_id, job_name, job_group, invoke_target, cron_expression, misfire_policy, concurrent, status, create_by, create_time, remark - from sys_job + + + + + + + + + + + + + + + + + + select job_id, job_name, job_group, invoke_target, cron_expression, misfire_policy, concurrent, status, + create_by, create_time, remark + from sys_job - - - - - - - - - delete from sys_job where job_id = #{jobId} - - - - delete from sys_job where job_id in - - #{jobId} - - - - - update sys_job - - job_name = #{jobName}, - job_group = #{jobGroup}, - invoke_target = #{invokeTarget}, - cron_expression = #{cronExpression}, - misfire_policy = #{misfirePolicy}, - concurrent = #{concurrent}, - status = #{status}, - remark = #{remark}, - update_by = #{updateBy}, - update_time = sysdate() - - where job_id = #{jobId} - - - - insert into sys_job( - job_id, - job_name, - job_group, - invoke_target, - cron_expression, - misfire_policy, - concurrent, - status, - remark, - create_by, - create_time - )values( - #{jobId}, - #{jobName}, - #{jobGroup}, - #{invokeTarget}, - #{cronExpression}, - #{misfirePolicy}, - #{concurrent}, - #{status}, - #{remark}, - #{createBy}, - sysdate() - ) - + + + + + + + + + delete from sys_job where job_id = #{jobId} + + + + delete from sys_job where job_id in + + #{jobId} + + + + + update sys_job + + job_name = #{jobName}, + job_group = #{jobGroup}, + invoke_target = #{invokeTarget}, + cron_expression = #{cronExpression}, + misfire_policy = #{misfirePolicy}, + concurrent = #{concurrent}, + status = #{status}, + remark = #{remark}, + update_by = #{updateBy}, + update_time = sysdate() + + where job_id = #{jobId} + + + + insert into sys_job( + job_id, + job_name, + job_group, + invoke_target, + cron_expression, + misfire_policy, + concurrent, + status, + remark, + create_by, + create_time + )values( + #{jobId}, + #{jobName}, + #{jobGroup}, + #{invokeTarget}, + #{cronExpression}, + #{misfirePolicy}, + #{concurrent}, + #{status}, + #{remark}, + #{createBy}, + sysdate() + ) + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/pom.xml b/spring-boot/ruoyi-system/pom.xml index 5c27adc7..64215f92 100644 --- a/spring-boot/ruoyi-system/pom.xml +++ b/spring-boot/ruoyi-system/pom.xml @@ -48,7 +48,29 @@ 1.5.21 compile - + + org.springframework.boot + spring-boot-test + 2.5.4 + test + + + junit + junit + 4.13.1 + test + + + com.alibaba + druid + 1.2.6 + + + + com.zaxxer + HikariCP + 3.2.0 + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotCategoryController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotCategoryController.java index d2d7062a..bfdf5b7b 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotCategoryController.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotCategoryController.java @@ -35,15 +35,14 @@ import com.ruoyi.common.core.page.TableDataInfo; /** * 设备分类Controller - * + * * @author kerwincui * @date 2021-05-07 */ -@Api(value="设备分类",tags="设备分类") +@Api(value = "设备分类", tags = "设备分类") @RestController @RequestMapping("/system/category") -public class IotCategoryController extends BaseController -{ +public class IotCategoryController extends BaseController { @Autowired private IIotCategoryService iotCategoryService; @@ -53,8 +52,7 @@ public class IotCategoryController extends BaseController @ApiOperation(value = "分类列表", notes = "分类列表") @PreAuthorize("@ss.hasPermi('system:category:list')") @GetMapping("/list") - public TableDataInfo list(IotCategory iotCategory) - { + public TableDataInfo list(IotCategory iotCategory) { startPage(); List list = iotCategoryService.selectIotCategoryList(iotCategory); return getDataTable(list); @@ -67,8 +65,7 @@ public class IotCategoryController extends BaseController @PreAuthorize("@ss.hasPermi('system:category:export')") @Log(title = "设备分类", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(IotCategory iotCategory) - { + public AjaxResult export(IotCategory iotCategory) { List list = iotCategoryService.selectIotCategoryList(iotCategory); ExcelUtil util = new ExcelUtil(IotCategory.class); return util.exportExcel(list, "category"); @@ -80,8 +77,7 @@ public class IotCategoryController extends BaseController @ApiOperation(value = "获取分类详情", notes = "获取分类详情") @PreAuthorize("@ss.hasPermi('system:category:query')") @GetMapping(value = "/{categoryId}") - public AjaxResult getInfo(@PathVariable("categoryId") Long categoryId) - { + public AjaxResult getInfo(@PathVariable("categoryId") Long categoryId) { return AjaxResult.success(iotCategoryService.selectIotCategoryById(categoryId)); } @@ -92,8 +88,7 @@ public class IotCategoryController extends BaseController @PreAuthorize("@ss.hasPermi('system:category:add')") @Log(title = "设备分类", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody IotCategory iotCategory) - { + public AjaxResult add(@RequestBody IotCategory iotCategory) { return toAjax(iotCategoryService.insertIotCategory(iotCategory)); } @@ -104,8 +99,7 @@ public class IotCategoryController extends BaseController @PreAuthorize("@ss.hasPermi('system:category:edit')") @Log(title = "设备分类", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody IotCategory iotCategory) - { + public AjaxResult edit(@RequestBody IotCategory iotCategory) { return toAjax(iotCategoryService.updateIotCategory(iotCategory)); } @@ -115,9 +109,8 @@ public class IotCategoryController extends BaseController @ApiOperation(value = "删除分类", notes = "删除分类") @PreAuthorize("@ss.hasPermi('system:category:remove')") @Log(title = "设备分类", businessType = BusinessType.DELETE) - @DeleteMapping("/{categoryIds}") - public AjaxResult remove(@PathVariable Long[] categoryIds) - { + @DeleteMapping("/{categoryIds}") + public AjaxResult remove(@PathVariable Long[] categoryIds) { return toAjax(iotCategoryService.deleteIotCategoryByIds(categoryIds)); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceController.java index 44d643a4..49866cc7 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceController.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceController.java @@ -14,7 +14,10 @@ import java.math.BigDecimal; import java.util.List; import com.ruoyi.common.core.domain.model.LoginUser; +import com.ruoyi.common.exception.CustomException; import com.ruoyi.common.utils.ServletUtils; +import com.ruoyi.common.utils.StringUtils; +import com.ruoyi.system.domain.vo.DeviceControlCMD; import com.ruoyi.system.domain.vo.IotDeviceListDto; import io.swagger.annotations.Api; import io.swagger.annotations.ApiOperation; @@ -22,14 +25,7 @@ import org.springframework.security.access.prepost.PreAuthorize; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.security.core.context.SecurityContextHolder; import org.springframework.security.core.token.TokenService; -import org.springframework.web.bind.annotation.GetMapping; -import org.springframework.web.bind.annotation.PostMapping; -import org.springframework.web.bind.annotation.PutMapping; -import org.springframework.web.bind.annotation.DeleteMapping; -import org.springframework.web.bind.annotation.PathVariable; -import org.springframework.web.bind.annotation.RequestBody; -import org.springframework.web.bind.annotation.RequestMapping; -import org.springframework.web.bind.annotation.RestController; +import org.springframework.web.bind.annotation.*; import com.ruoyi.common.annotation.Log; import com.ruoyi.common.core.controller.BaseController; import com.ruoyi.common.core.domain.AjaxResult; @@ -39,17 +35,18 @@ import com.ruoyi.system.service.IIotDeviceService; import com.ruoyi.common.utils.poi.ExcelUtil; import com.ruoyi.common.core.page.TableDataInfo; +import javax.validation.constraints.Size; + /** * 设备Controller - * + * * @author kerwincui * @date 2021-05-06 */ -@Api(value="设备",tags="设备") +@Api(value = "设备", tags = "设备") @RestController @RequestMapping("/system/device") -public class IotDeviceController extends BaseController -{ +public class IotDeviceController extends BaseController { @Autowired private IIotDeviceService iotDeviceService; @@ -59,15 +56,16 @@ public class IotDeviceController extends BaseController @ApiOperation(value = "设备列表", notes = "设备列表") @PreAuthorize("@ss.hasPermi('system:device:list')") @GetMapping("/list") - public TableDataInfo list(IotDevice iotDevice) - { + public TableDataInfo list(IotDevice iotDevice) { startPage(); - LoginUser user=(LoginUser)SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); iotDevice.setOwnerId(user.getUser().getUserId().toString()); List list = iotDeviceService.selectIotDeviceList(iotDevice); return getDataTable(list); } + + /** * 导出设备列表 */ @@ -75,8 +73,7 @@ public class IotDeviceController extends BaseController @PreAuthorize("@ss.hasPermi('system:device:export')") @Log(title = "设备", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(IotDevice iotDevice) - { + public AjaxResult export(IotDevice iotDevice) { List list = iotDeviceService.selectIotDeviceList(iotDevice); ExcelUtil util = new ExcelUtil(IotDeviceListDto.class); return util.exportExcel(list, "device"); @@ -88,8 +85,7 @@ public class IotDeviceController extends BaseController @ApiOperation(value = "获取设备详情", notes = "获取设备详情") @PreAuthorize("@ss.hasPermi('system:device:query')") @GetMapping(value = "/{deviceId}") - public AjaxResult getInfo(@PathVariable("deviceId") Long deviceId) - { + public AjaxResult getInfo(@PathVariable("deviceId") Long deviceId) { return AjaxResult.success(iotDeviceService.selectIotDeviceById(deviceId)); } @@ -99,8 +95,7 @@ public class IotDeviceController extends BaseController @ApiOperation(value = "根据设备编号获取设备详情", notes = "根据设备编号获取设备详情") @PreAuthorize("@ss.hasPermi('system:device:query')") @GetMapping(value = "/getByNum/{deviceNum}") - public AjaxResult getInfoByNum(@PathVariable("deviceNum") String deviceNum) - { + public AjaxResult getInfoByNum(@PathVariable("deviceNum") String deviceNum) { return AjaxResult.success(iotDeviceService.selectIotDeviceByNum(deviceNum)); } @@ -111,12 +106,11 @@ public class IotDeviceController extends BaseController @PreAuthorize("@ss.hasPermi('system:device:add')") @Log(title = "设备", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody IotDevice iotDevice) - { - LoginUser user=(LoginUser)SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + public AjaxResult add(@RequestBody IotDevice iotDevice) { + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); iotDevice.setOwnerId(user.getUser().getUserId().toString()); - IotDevice device=iotDeviceService.selectIotDeviceByNum(iotDevice.getDeviceNum()); - if(device!=null){ + IotDevice device = iotDeviceService.selectIotDeviceByNum(iotDevice.getDeviceNum()); + if (device != null) { return AjaxResult.error("设备编号已存在，请重新填写"); } return toAjax(iotDeviceService.insertIotDevice(iotDevice)); @@ -129,8 +123,7 @@ public class IotDeviceController extends BaseController @PreAuthorize("@ss.hasPermi('system:device:edit')") @Log(title = "设备", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody IotDevice iotDevice) - { + public AjaxResult edit(@RequestBody IotDevice iotDevice) { return toAjax(iotDeviceService.updateIotDevice(iotDevice)); } @@ -140,9 +133,103 @@ public class IotDeviceController extends BaseController @ApiOperation(value = "删除设备", notes = "删除设备") @PreAuthorize("@ss.hasPermi('system:device:remove')") @Log(title = "设备", businessType = BusinessType.DELETE) - @DeleteMapping("/{deviceIds}") - public AjaxResult remove(@PathVariable Long[] deviceIds) - { + @DeleteMapping("/{deviceIds}") + public AjaxResult remove(@PathVariable Long[] deviceIds) { return toAjax(iotDeviceService.deleteIotDeviceByIds(deviceIds)); } + + + @ApiOperation(value = "绑定设备", notes = "绑定设备") + @Log(title = "设备", businessType = BusinessType.UPDATE) + @PostMapping("/bindDevice") + public AjaxResult bindDevice(@RequestBody IotDevice iotDevice) { + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + Long userId = user.getUser().getUserId(); + String username = user.getUsername(); + String deviceNum = iotDevice.getDeviceNum(); + String deviceName = iotDevice.getDeviceName(); + Long categoryId = iotDevice.getCategoryId(); + String remark = iotDevice.getRemark(); + return AjaxResult.success(iotDeviceService.bindDevice(userId,username,deviceNum,deviceName,categoryId, remark)); + } + + @ApiOperation(value = "控制设备", notes = "控制设备") + @PreAuthorize("@ss.hasPermi('system:device:control')") + @Log(title = "设备", businessType = BusinessType.UPDATE) + @PostMapping("/control") + public AjaxResult control(@RequestBody DeviceControlCMD deviceControlCMD) { + String deviceNum = deviceControlCMD.getDeviceNum(); + String cmd = deviceControlCMD.getCmd(); + if(StringUtils.isBlank(deviceNum)) { + throw new CustomException("设备编号不能为空"); + } + if(StringUtils.isBlank(cmd)) { + throw new CustomException("控制指令不能为空"); + } + return toAjax(iotDeviceService.controlDeviceByNum(deviceNum,cmd)); + } + + @ApiOperation(value = "小程序设备列表", notes = "小程序设备列表") + @PreAuthorize("@ss.hasPermi('system:device:list')") + @GetMapping("/listDevice") + public TableDataInfo listDevice(IotDevice iotDevice) { + startPage(); + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + iotDevice.setOwnerId(user.getUser().getUserId().toString()); + List list = iotDeviceService.selectMpIotDeviceList(iotDevice); + return getDataTable(list); + } + + @ApiOperation(value = "修改设备名称和备注", notes = "修改设备名称和备注") + @Log(title = "设备", businessType = BusinessType.UPDATE) + @PostMapping("/updateDeviceInfo") + public AjaxResult updateDeviceInfo(@RequestBody IotDevice iotDevice) { + Long deviceId = iotDevice.getDeviceId(); + String deviceName = iotDevice.getDeviceName(); + String remark = iotDevice.getRemark(); + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + Long userId = user.getUser().getUserId(); + String nickName = user.getUser().getNickName(); + return AjaxResult.success(iotDeviceService.updateDeviceInfo( userId, nickName, deviceId, deviceName, remark)); + } + + @ApiOperation(value = "根据用户设备编号获取设备详情", notes = "根据设备编号获取设备详情") + @GetMapping(value = "/getByUserAndNum/{deviceNum}") + public AjaxResult getInfoByUserAndNum(@PathVariable("deviceNum") String deviceNum) { + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + Long userId = user.getUser().getUserId(); + return AjaxResult.success(iotDeviceService.selectIotDeviceByUserAndNum(userId,deviceNum)); + } + + @ApiOperation(value = "解除绑定设备", notes = "解除绑定设备") + @Log(title = "设备", businessType = BusinessType.UPDATE) + @PostMapping("/unBindDevice") + public AjaxResult unBindDevice(@RequestBody IotDevice iotDevice) { + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + Long userId = user.getUser().getUserId(); + String username = user.getUsername(); + Long deviceId = iotDevice.getDeviceId(); + return AjaxResult.success(iotDeviceService.unBindDevice(userId,username,deviceId)); + } + + @ApiOperation(value = "根据设备编号查询设备信息", notes = "根据设备编号查询设备信息") + @Log(title = "设备", businessType = BusinessType.UPDATE) + @GetMapping("/getDeviceInfoByDeviceNum") + public AjaxResult getDeviceInfoByDeviceNum(@RequestParam String deviceNum ) { + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + Long userId = user.getUser().getUserId(); + String username = user.getUsername(); + return AjaxResult.success(iotDeviceService.getDeviceInfoByDeviceNum(userId,username,deviceNum)); + } + + @ApiOperation(value = "根据设备编号查询设备信息", notes = "根据设备编号查询设备信息") + @Log(title = "设备", businessType = BusinessType.UPDATE) + @GetMapping("/getDeviceInfoByDeviceId") + public AjaxResult getDeviceInfoByDeviceId(@RequestParam Long deviceId ) { + LoginUser user = (LoginUser) SecurityContextHolder.getContext().getAuthentication().getPrincipal(); + Long userId = user.getUser().getUserId(); + String username = user.getUsername(); + return AjaxResult.success(iotDeviceService.getDeviceInfoByDeviceId(userId,username,deviceId)); + } + } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceSetController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceSetController.java index a1b83594..68827ffc 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceSetController.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceSetController.java @@ -41,15 +41,14 @@ import com.ruoyi.common.core.page.TableDataInfo; /** * 设备配置Controller - * + * * @author kerwincui * @date 2021-05-06 */ -@Api(value="设备配置",tags="设备配置") +@Api(value = "设备配置", tags = "设备配置") @RestController @RequestMapping("/system/set") -public class IotDeviceSetController extends BaseController -{ +public class IotDeviceSetController extends BaseController { @Autowired private IIotDeviceSetService iotDeviceSetService; @Autowired @@ -66,8 +65,7 @@ public class IotDeviceSetController extends BaseController @ApiOperation(value = "查询设备配置列表", notes = "查询设备配置列表") @PreAuthorize("@ss.hasPermi('system:set:list')") @GetMapping("/list") - public TableDataInfo list(IotDeviceSet iotDeviceSet) - { + public TableDataInfo list(IotDeviceSet iotDeviceSet) { startPage(); List list = iotDeviceSetService.selectIotDeviceSetList(iotDeviceSet); return getDataTable(list); @@ -80,8 +78,7 @@ public class IotDeviceSetController extends BaseController @PreAuthorize("@ss.hasPermi('system:set:export')") @Log(title = "设备配置", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(IotDeviceSet iotDeviceSet) - { + public AjaxResult export(IotDeviceSet iotDeviceSet) { List list = iotDeviceSetService.selectIotDeviceSetList(iotDeviceSet); ExcelUtil util = new ExcelUtil(IotDeviceSet.class); return util.exportExcel(list, "set"); @@ -93,8 +90,7 @@ public class IotDeviceSetController extends BaseController @ApiOperation(value = "获取设备配置详情", notes = "获取设备配置详情") @PreAuthorize("@ss.hasPermi('system:set:query')") @GetMapping(value = "/{deviceSetId}") - public AjaxResult getInfo(@PathVariable("deviceSetId") Long deviceSetId) - { + public AjaxResult getInfo(@PathVariable("deviceSetId") Long deviceSetId) { return AjaxResult.success(iotDeviceSetService.selectIotDeviceSetById(deviceSetId)); } @@ -104,14 +100,13 @@ public class IotDeviceSetController extends BaseController @ApiOperation(value = "获取最新设备配置详情", notes = "获取最新设备配置详情") @PreAuthorize("@ss.hasPermi('system:set:query')") @GetMapping(value = "/new/{deviceId}") - public AjaxResult getNewInfo(@PathVariable("deviceId") Long deviceId) - { - IotDeviceSet set=iotDeviceSetService.selectIotDeviceSetByDeviceId(deviceId); - if(set==null){ + public AjaxResult getNewInfo(@PathVariable("deviceId") Long deviceId) { + IotDeviceSet set = iotDeviceSetService.selectIotDeviceSetByDeviceId(deviceId); + if (set == null) { // 构建默认数据 - IotDevice device=iotDeviceService.selectIotDeviceById(deviceId); - if(device!=null) { - set=new IotDeviceSet(); + IotDevice device = iotDeviceService.selectIotDeviceById(deviceId); + if (device != null) { + set = new IotDeviceSet(); set.setDeviceId(device.getDeviceId()); set.setDeviceNum(device.getDeviceNum()); set.setOwnerId(device.getOwnerId()); @@ -139,8 +134,7 @@ public class IotDeviceSetController extends BaseController @PreAuthorize("@ss.hasPermi('system:set:add')") @Log(title = "设备配置", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody IotDeviceSet iotDeviceSet) - { + public AjaxResult add(@RequestBody IotDeviceSet iotDeviceSet) { return toAjax(iotDeviceSetService.insertIotDeviceSet(iotDeviceSet)); } @@ -151,62 +145,67 @@ public class IotDeviceSetController extends BaseController @PreAuthorize("@ss.hasPermi('system:set:edit')") @Log(title = "设备配置", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody IotDeviceSet iotDeviceSet) - { - IotDeviceStatus status=iotDeviceStatusService.selectIotDeviceStatusByDeviceId(iotDeviceSet.getDeviceId()); - if(status==null || status.getIsOnline()==0){return AjaxResult.error("设备已离线，不能更新状态。");} + public AjaxResult edit(@RequestBody IotDeviceSet iotDeviceSet) { + IotDeviceStatus status = iotDeviceStatusService.selectIotDeviceStatusByDeviceId(iotDeviceSet.getDeviceId()); + if (status == null || status.getIsOnline() == 0) { + return AjaxResult.error("设备已离线，不能更新状态。"); + } // 存储 iotDeviceSetService.updateIotDeviceSet(iotDeviceSet); //mqtt发布 - IotDeviceSet set=iotDeviceSetService.selectIotDeviceSetByDeviceId(iotDeviceSet.getDeviceId()); - if(iotDeviceSet.getIsRadar()!=null){ + IotDeviceSet set = iotDeviceSetService.selectIotDeviceSetByDeviceId(iotDeviceSet.getDeviceId()); + if (iotDeviceSet.getIsRadar() != null) { set.setIsRadar(iotDeviceSet.getIsRadar()); } - if(iotDeviceSet.getIsAlarm()!=null){ + if (iotDeviceSet.getIsAlarm() != null) { set.setIsAlarm(iotDeviceSet.getIsAlarm()); } - if(iotDeviceSet.getRadarInterval()!=null){ + if (iotDeviceSet.getRadarInterval() != null) { set.setRadarInterval(iotDeviceSet.getRadarInterval()); } - if(iotDeviceSet.getIsRfControl()!=null){ + if (iotDeviceSet.getIsRfControl() != null) { set.setIsRfControl(iotDeviceSet.getIsRfControl()); } - if(iotDeviceSet.getRfOneFunc()!=null){ + if (iotDeviceSet.getRfOneFunc() != null) { set.setRfOneFunc(iotDeviceSet.getRfOneFunc()); } - if(iotDeviceSet.getRfTwoFunc()!=null){ + if (iotDeviceSet.getRfTwoFunc() != null) { set.setRfTwoFunc(iotDeviceSet.getRfTwoFunc()); } - if(iotDeviceSet.getRfThreeFunc()!=null){ + if (iotDeviceSet.getRfThreeFunc() != null) { set.setRfThreeFunc(iotDeviceSet.getRfThreeFunc()); } - if(iotDeviceSet.getRfFourFunc()!=null){ + if (iotDeviceSet.getRfFourFunc() != null) { set.setRfFourFunc(iotDeviceSet.getRfFourFunc()); } - if(iotDeviceSet.getIsRfLearn()!=null){ + if (iotDeviceSet.getIsRfLearn() != null) { set.setIsRfLearn(iotDeviceSet.getIsRfLearn()); } - if(iotDeviceSet.getIsRfClear()!=null){ + if (iotDeviceSet.getIsRfClear() != null) { set.setIsRfClear(iotDeviceSet.getIsRfClear()); } - if(iotDeviceSet.getIsAp()!=null){ + if (iotDeviceSet.getIsAp() != null) { set.setIsAp(iotDeviceSet.getIsAp()); } - if(iotDeviceSet.getIsReset()!=null){ + if (iotDeviceSet.getIsReset() != null) { set.setIsReset(iotDeviceSet.getIsReset()); } String content = JSON.toJSONString(set); - boolean isSuccess=mqttPushClient.publish(0,true,"setting/set/"+set.getDeviceNum(),content); - if(isSuccess){return AjaxResult.success("mqtt 发布成功");} + boolean isSuccess = mqttPushClient.publish(0, true, "setting/set/" + set.getDeviceNum(), content); + if (isSuccess) { + return AjaxResult.success("mqtt 发布成功"); + } return AjaxResult.error("mqtt 发布失败。"); } @ApiOperation(value = "mqtt获取设备配置", notes = "mqtt获取设备配置") @GetMapping(value = "/getSetting/{deviceNum}") - public AjaxResult getSetting(@PathVariable("deviceNum") String deviceNum){ - boolean isSuccess=mqttPushClient.publish(0,true,"setting/get/"+deviceNum,"wumei.live"); - if(isSuccess){return AjaxResult.success("mqtt 发布成功");} + public AjaxResult getSetting(@PathVariable("deviceNum") String deviceNum) { + boolean isSuccess = mqttPushClient.publish(0, true, "setting/get/" + deviceNum, "wumei.live"); + if (isSuccess) { + return AjaxResult.success("mqtt 发布成功"); + } return AjaxResult.error("mqtt 发布失败。"); } @@ -216,9 +215,8 @@ public class IotDeviceSetController extends BaseController @ApiOperation(value = "删除设备配置", notes = "删除设备配置") @PreAuthorize("@ss.hasPermi('system:set:remove')") @Log(title = "设备配置", businessType = BusinessType.DELETE) - @DeleteMapping("/{deviceSetIds}") - public AjaxResult remove(@PathVariable Long[] deviceSetIds) - { + @DeleteMapping("/{deviceSetIds}") + public AjaxResult remove(@PathVariable Long[] deviceSetIds) { return toAjax(iotDeviceSetService.deleteIotDeviceSetByIds(deviceSetIds)); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceStatusController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceStatusController.java index 56998555..6a0fe27b 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceStatusController.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceStatusController.java @@ -40,15 +40,14 @@ import com.ruoyi.common.core.page.TableDataInfo; /** * 设备状态Controller - * + * * @author kerwincui * @date 2021-05-06 */ -@Api(value="设备状态",tags="设备状态") +@Api(value = "设备状态", tags = "设备状态") @RestController @RequestMapping("/system/status") -public class IotDeviceStatusController extends BaseController -{ +public class IotDeviceStatusController extends BaseController { @Autowired private IIotDeviceStatusService iotDeviceStatusService; @Autowired @@ -63,8 +62,7 @@ public class IotDeviceStatusController extends BaseController @ApiOperation(value = "查询设备状态列表", notes = "查询设备状态列表") @PreAuthorize("@ss.hasPermi('system:status:list')") @GetMapping("/list") - public TableDataInfo list(IotDeviceStatus iotDeviceStatus) - { + public TableDataInfo list(IotDeviceStatus iotDeviceStatus) { startPage(); List list = iotDeviceStatusService.selectIotDeviceStatusList(iotDeviceStatus); return getDataTable(list); @@ -77,8 +75,7 @@ public class IotDeviceStatusController extends BaseController @PreAuthorize("@ss.hasPermi('system:status:export')") @Log(title = "设备状态", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(IotDeviceStatus iotDeviceStatus) - { + public AjaxResult export(IotDeviceStatus iotDeviceStatus) { List list = iotDeviceStatusService.selectIotDeviceStatusList(iotDeviceStatus); ExcelUtil util = new ExcelUtil(IotDeviceStatus.class); return util.exportExcel(list, "status"); @@ -90,8 +87,7 @@ public class IotDeviceStatusController extends BaseController @ApiOperation(value = "获取设备状态详情", notes = "获取设备状态详情") @PreAuthorize("@ss.hasPermi('system:status:query')") @GetMapping(value = "/{deviceStatusId}") - public AjaxResult getInfo(@PathVariable("deviceStatusId") Long deviceStatusId) - { + public AjaxResult getInfo(@PathVariable("deviceStatusId") Long deviceStatusId) { return AjaxResult.success(iotDeviceStatusService.selectIotDeviceStatusById(deviceStatusId)); } @@ -101,8 +97,7 @@ public class IotDeviceStatusController extends BaseController @ApiOperation(value = "根据设备编号获取最新设备状态", notes = "根据设备编号获取最新设备状态") @PreAuthorize("@ss.hasPermi('system:status:query')") @GetMapping(value = "/newByNum/{deviceNum}") - public AjaxResult getNewStatus(@PathVariable("deviceNum") String deviceNum) - { + public AjaxResult getNewStatus(@PathVariable("deviceNum") String deviceNum) { return AjaxResult.success(iotDeviceStatusService.selectIotDeviceStatusByDeviceNum(deviceNum)); } @@ -112,14 +107,13 @@ public class IotDeviceStatusController extends BaseController @ApiOperation(value = "获取最新设备状态详情", notes = "获取最新设备状态详情") @PreAuthorize("@ss.hasPermi('system:status:query')") @GetMapping(value = "/new/{deviceId}") - public AjaxResult getNewInfo(@PathVariable("deviceId") Long deviceId) - { - IotDeviceStatus status=iotDeviceStatusService.selectIotDeviceStatusByDeviceId(deviceId); - if(status==null){ + public AjaxResult getNewInfo(@PathVariable("deviceId") Long deviceId) { + IotDeviceStatus status = iotDeviceStatusService.selectIotDeviceStatusByDeviceId(deviceId); + if (status == null) { // 构建默认数据 - IotDevice device=iotDeviceService.selectIotDeviceById(deviceId); - if(device!=null) { - status=new IotDeviceStatus(); + IotDevice device = iotDeviceService.selectIotDeviceById(deviceId); + if (device != null) { + status = new IotDeviceStatus(); status.setDeviceId(device.getDeviceId()); status.setDeviceNum(device.getDeviceNum()); status.setRelayStatus(0); @@ -146,8 +140,7 @@ public class IotDeviceStatusController extends BaseController @PreAuthorize("@ss.hasPermi('system:status:add')") @Log(title = "设备状态", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody IotDeviceStatus iotDeviceStatus) - { + public AjaxResult add(@RequestBody IotDeviceStatus iotDeviceStatus) { return toAjax(iotDeviceStatusService.insertIotDeviceStatus(iotDeviceStatus)); } @@ -158,53 +151,58 @@ public class IotDeviceStatusController extends BaseController @PreAuthorize("@ss.hasPermi('system:status:edit')") @Log(title = "设备状态", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody IotDeviceStatus iotDeviceStatus) - { - IotDeviceStatus status=iotDeviceStatusService.selectIotDeviceStatusByDeviceId(iotDeviceStatus.getDeviceId()); - if(status==null || status.getIsOnline()==0){return AjaxResult.error("设备已离线，不能更新状态。");} + public AjaxResult edit(@RequestBody IotDeviceStatus iotDeviceStatus) { + IotDeviceStatus status = iotDeviceStatusService.selectIotDeviceStatusByDeviceId(iotDeviceStatus.getDeviceId()); + if (status == null || status.getIsOnline() == 0) { + return AjaxResult.error("设备已离线，不能更新状态。"); + } // 存储 iotDeviceStatusService.updateIotDeviceStatus(iotDeviceStatus); // mqtt发布 - if(iotDeviceStatus.getRelayStatus()!=null){ + if (iotDeviceStatus.getRelayStatus() != null) { status.setRelayStatus(iotDeviceStatus.getRelayStatus()); } - if(iotDeviceStatus.getLightStatus()!=null){ + if (iotDeviceStatus.getLightStatus() != null) { status.setLightStatus(iotDeviceStatus.getLightStatus()); } - if(iotDeviceStatus.getLightMode()!=null){ + if (iotDeviceStatus.getLightMode() != null) { status.setLightMode(iotDeviceStatus.getLightMode()); } - if(iotDeviceStatus.getLightInterval()!=null){ + if (iotDeviceStatus.getLightInterval() != null) { status.setLightInterval(iotDeviceStatus.getLightInterval()); } - if(iotDeviceStatus.getFadeTime()!=null){ + if (iotDeviceStatus.getFadeTime() != null) { status.setFadeTime(iotDeviceStatus.getFadeTime()); } - if(iotDeviceStatus.getBrightness()!=null){ + if (iotDeviceStatus.getBrightness() != null) { status.setBrightness(iotDeviceStatus.getBrightness()); } - if(iotDeviceStatus.getRed()!=null){ + if (iotDeviceStatus.getRed() != null) { status.setRed(iotDeviceStatus.getRed()); } - if(iotDeviceStatus.getGreen()!=null){ + if (iotDeviceStatus.getGreen() != null) { status.setGreen(iotDeviceStatus.getGreen()); } - if(iotDeviceStatus.getBlue()!=null){ + if (iotDeviceStatus.getBlue() != null) { status.setBlue(iotDeviceStatus.getBlue()); } String content = JSON.toJSONString(status); - boolean isSuccess=mqttPushClient.publish(1,true,"status/set/"+status.getDeviceNum(),content); - if(isSuccess){return AjaxResult.success("mqtt 发布成功");} + boolean isSuccess = mqttPushClient.publish(1, true, "status/set/" + status.getDeviceNum(), content); + if (isSuccess) { + return AjaxResult.success("mqtt 发布成功"); + } return AjaxResult.error("mqtt 发布失败。"); } @ApiOperation(value = "mqtt获取设备状态", notes = "mqtt获取设备状态") @GetMapping(value = "/getStatus/{deviceNum}") - public AjaxResult getStatus(@PathVariable("deviceNum") String deviceNum){ - boolean isSuccess=mqttPushClient.publish(0,true,"status/get/"+deviceNum,"wumei.live"); - if(isSuccess){return AjaxResult.success("mqtt 发布成功");} + public AjaxResult getStatus(@PathVariable("deviceNum") String deviceNum) { + boolean isSuccess = mqttPushClient.publish(0, true, "status/get/" + deviceNum, "wumei.live"); + if (isSuccess) { + return AjaxResult.success("mqtt 发布成功"); + } return AjaxResult.error("mqtt 发布失败。"); } @@ -214,9 +212,8 @@ public class IotDeviceStatusController extends BaseController @ApiOperation(value = "删除设备状态", notes = "删除设备状态") @PreAuthorize("@ss.hasPermi('system:status:remove')") @Log(title = "设备状态", businessType = BusinessType.DELETE) - @DeleteMapping("/{deviceStatusIds}") - public AjaxResult remove(@PathVariable Long[] deviceStatusIds) - { + @DeleteMapping("/{deviceStatusIds}") + public AjaxResult remove(@PathVariable Long[] deviceStatusIds) { return toAjax(iotDeviceStatusService.deleteIotDeviceStatusByIds(deviceStatusIds)); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceUserRelationController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceUserRelationController.java new file mode 100644 index 00000000..816cec51 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotDeviceUserRelationController.java @@ -0,0 +1,97 @@ +package com.ruoyi.system.controller; + +import java.util.List; + +import org.springframework.security.access.prepost.PreAuthorize; +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.web.bind.annotation.GetMapping; +import org.springframework.web.bind.annotation.PostMapping; +import org.springframework.web.bind.annotation.PutMapping; +import org.springframework.web.bind.annotation.DeleteMapping; +import org.springframework.web.bind.annotation.PathVariable; +import org.springframework.web.bind.annotation.RequestBody; +import org.springframework.web.bind.annotation.RequestMapping; +import org.springframework.web.bind.annotation.RestController; +import com.ruoyi.common.annotation.Log; +import com.ruoyi.common.core.controller.BaseController; +import com.ruoyi.common.core.domain.AjaxResult; +import com.ruoyi.common.enums.BusinessType; +import com.ruoyi.system.domain.IotDeviceUserRelation; +import com.ruoyi.system.service.IIotDeviceUserRelationService; +import com.ruoyi.common.utils.poi.ExcelUtil; +import com.ruoyi.common.core.page.TableDataInfo; + +/** + * 【请填写功能名称】Controller + * + * @author wxy + * @date 2021-08-27 + */ +@RestController +@RequestMapping("/system/relation") +public class IotDeviceUserRelationController extends BaseController { + @Autowired + private IIotDeviceUserRelationService iotDeviceUserRelationService; + +/** + * 查询【请填写功能名称】列表 + */ +@PreAuthorize("@ss.hasPermi('system:relation:list')") +@GetMapping("/list") + public TableDataInfo list(IotDeviceUserRelation iotDeviceUserRelation) { + startPage(); + List list = iotDeviceUserRelationService.selectIotDeviceUserRelationList(iotDeviceUserRelation); + return getDataTable(list); + } + + /** + * 导出【请填写功能名称】列表 + */ + @PreAuthorize("@ss.hasPermi('system:relation:export')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.EXPORT) + @GetMapping("/export") + public AjaxResult export(IotDeviceUserRelation iotDeviceUserRelation) { + List list = iotDeviceUserRelationService.selectIotDeviceUserRelationList(iotDeviceUserRelation); + ExcelUtil util = new ExcelUtil(IotDeviceUserRelation. class); + return util.exportExcel(list, "relation"); + } + + /** + * 获取【请填写功能名称】详细信息 + */ + @PreAuthorize("@ss.hasPermi('system:relation:query')") + @GetMapping(value = "/{id}") + public AjaxResult getInfo(@PathVariable("id") Long id) { + return AjaxResult.success(iotDeviceUserRelationService.selectIotDeviceUserRelationById(id)); + } + + /** + * 新增【请填写功能名称】 + */ + @PreAuthorize("@ss.hasPermi('system:relation:add')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.INSERT) + @PostMapping + public AjaxResult add(@RequestBody IotDeviceUserRelation iotDeviceUserRelation) { + return toAjax(iotDeviceUserRelationService.insertIotDeviceUserRelation(iotDeviceUserRelation)); + } + + /** + * 修改【请填写功能名称】 + */ + @PreAuthorize("@ss.hasPermi('system:relation:edit')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.UPDATE) + @PutMapping + public AjaxResult edit(@RequestBody IotDeviceUserRelation iotDeviceUserRelation) { + return toAjax(iotDeviceUserRelationService.updateIotDeviceUserRelation(iotDeviceUserRelation)); + } + + /** + * 删除【请填写功能名称】 + */ + @PreAuthorize("@ss.hasPermi('system:relation:remove')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.DELETE) + @DeleteMapping("/{ids}") + public AjaxResult remove(@PathVariable Long[] ids) { + return toAjax(iotDeviceUserRelationService.deleteIotDeviceUserRelationByIds(ids)); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotGroupController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotGroupController.java index 61a43c5a..3afdaf8b 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotGroupController.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/IotGroupController.java @@ -35,15 +35,14 @@ import com.ruoyi.common.core.page.TableDataInfo; /** * 分组Controller - * + * * @author kerwincui * @date 2021-05-18 */ -@Api(value="设备分组",tags="设备分组") +@Api(value = "设备分组", tags = "设备分组") @RestController @RequestMapping("/system/group") -public class IotGroupController extends BaseController -{ +public class IotGroupController extends BaseController { @Autowired private IIotGroupService iotGroupService; @@ -53,8 +52,7 @@ public class IotGroupController extends BaseController @ApiOperation(value = "分组列表", notes = "分组列表") @PreAuthorize("@ss.hasPermi('system:group:list')") @GetMapping("/list") - public TableDataInfo list(IotGroup iotGroup) - { + public TableDataInfo list(IotGroup iotGroup) { startPage(); List list = iotGroupService.selectIotGroupList(iotGroup); return getDataTable(list); @@ -67,8 +65,7 @@ public class IotGroupController extends BaseController @PreAuthorize("@ss.hasPermi('system:group:export')") @Log(title = "分组", businessType = BusinessType.EXPORT) @GetMapping("/export") - public AjaxResult export(IotGroup iotGroup) - { + public AjaxResult export(IotGroup iotGroup) { List list = iotGroupService.selectIotGroupList(iotGroup); ExcelUtil util = new ExcelUtil(IotGroup.class); return util.exportExcel(list, "group"); @@ -80,8 +77,7 @@ public class IotGroupController extends BaseController @ApiOperation(value = "获取分组详情", notes = "获取分组详情") @PreAuthorize("@ss.hasPermi('system:group:query')") @GetMapping(value = "/{groupId}") - public AjaxResult getInfo(@PathVariable("groupId") Long groupId) - { + public AjaxResult getInfo(@PathVariable("groupId") Long groupId) { return AjaxResult.success(iotGroupService.selectIotGroupById(groupId)); } @@ -92,8 +88,7 @@ public class IotGroupController extends BaseController @PreAuthorize("@ss.hasPermi('system:group:add')") @Log(title = "分组", businessType = BusinessType.INSERT) @PostMapping - public AjaxResult add(@RequestBody IotGroup iotGroup) - { + public AjaxResult add(@RequestBody IotGroup iotGroup) { return toAjax(iotGroupService.insertIotGroup(iotGroup)); } @@ -104,8 +99,7 @@ public class IotGroupController extends BaseController @PreAuthorize("@ss.hasPermi('system:group:edit')") @Log(title = "分组", businessType = BusinessType.UPDATE) @PutMapping - public AjaxResult edit(@RequestBody IotGroup iotGroup) - { + public AjaxResult edit(@RequestBody IotGroup iotGroup) { return toAjax(iotGroupService.updateIotGroup(iotGroup)); } @@ -115,9 +109,8 @@ public class IotGroupController extends BaseController @ApiOperation(value = "删除分组", notes = "删除分组") @PreAuthorize("@ss.hasPermi('system:group:remove')") @Log(title = "分组", businessType = BusinessType.DELETE) - @DeleteMapping("/{groupIds}") - public AjaxResult remove(@PathVariable Long[] groupIds) - { + @DeleteMapping("/{groupIds}") + public AjaxResult remove(@PathVariable Long[] groupIds) { return toAjax(iotGroupService.deleteIotGroupByIds(groupIds)); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/MqttController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/MqttController.java index ae6416f1..4c9e6bf3 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/MqttController.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/MqttController.java @@ -22,16 +22,13 @@ import org.springframework.web.bind.annotation.*; import org.springframework.beans.factory.annotation.Autowired; - /** * mqtt接口 - * */ -@Api(value="mqtt消息发布",tags="mqtt消息发布") +@Api(value = "mqtt消息发布", tags = "mqtt消息发布") @RestController @RequestMapping("/system/mqtt") -public class MqttController extends BaseController -{ +public class MqttController extends BaseController { // @Autowired // private MqttPushClient mqttPushClient; // diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserAccountInfoController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserAccountInfoController.java new file mode 100644 index 00000000..6589adcc --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserAccountInfoController.java @@ -0,0 +1,97 @@ +package com.ruoyi.system.controller; + +import java.util.List; + +import org.springframework.security.access.prepost.PreAuthorize; +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.web.bind.annotation.GetMapping; +import org.springframework.web.bind.annotation.PostMapping; +import org.springframework.web.bind.annotation.PutMapping; +import org.springframework.web.bind.annotation.DeleteMapping; +import org.springframework.web.bind.annotation.PathVariable; +import org.springframework.web.bind.annotation.RequestBody; +import org.springframework.web.bind.annotation.RequestMapping; +import org.springframework.web.bind.annotation.RestController; +import com.ruoyi.common.annotation.Log; +import com.ruoyi.common.core.controller.BaseController; +import com.ruoyi.common.core.domain.AjaxResult; +import com.ruoyi.common.enums.BusinessType; +import com.ruoyi.system.domain.TUserAccountInfo; +import com.ruoyi.system.service.ITUserAccountInfoService; +import com.ruoyi.common.utils.poi.ExcelUtil; +import com.ruoyi.common.core.page.TableDataInfo; + +/** + * 小程序用户Controller + * + * @author wxy + * @date 2021-08-26 + */ +@RestController +@RequestMapping("/system/info") +public class TUserAccountInfoController extends BaseController { + @Autowired + private ITUserAccountInfoService tUserAccountInfoService; + + /** + * 查询小程序用户列表 + */ + @PreAuthorize("@ss.hasPermi('system:info:list')") + @GetMapping("/list") + public TableDataInfo list(TUserAccountInfo tUserAccountInfo) { + startPage(); + List list = tUserAccountInfoService.selectTUserAccountInfoList(tUserAccountInfo); + return getDataTable(list); + } + + /** + * 导出小程序用户列表 + */ + @PreAuthorize("@ss.hasPermi('system:info:export')") + @Log(title = "小程序用户", businessType = BusinessType.EXPORT) + @GetMapping("/export") + public AjaxResult export(TUserAccountInfo tUserAccountInfo) { + List list = tUserAccountInfoService.selectTUserAccountInfoList(tUserAccountInfo); + ExcelUtil util = new ExcelUtil(TUserAccountInfo.class); + return util.exportExcel(list, "info"); + } + + /** + * 获取小程序用户详细信息 + */ + @PreAuthorize("@ss.hasPermi('system:info:query')") + @GetMapping(value = "/{id}") + public AjaxResult getInfo(@PathVariable("id") Long id) { + return AjaxResult.success(tUserAccountInfoService.selectTUserAccountInfoById(id)); + } + + /** + * 新增小程序用户 + */ + @PreAuthorize("@ss.hasPermi('system:info:add')") + @Log(title = "小程序用户", businessType = BusinessType.INSERT) + @PostMapping + public AjaxResult add(@RequestBody TUserAccountInfo tUserAccountInfo) { + return toAjax(tUserAccountInfoService.insertTUserAccountInfo(tUserAccountInfo)); + } + + /** + * 修改小程序用户 + */ + @PreAuthorize("@ss.hasPermi('system:info:edit')") + @Log(title = "小程序用户", businessType = BusinessType.UPDATE) + @PutMapping + public AjaxResult edit(@RequestBody TUserAccountInfo tUserAccountInfo) { + return toAjax(tUserAccountInfoService.updateTUserAccountInfo(tUserAccountInfo)); + } + + /** + * 删除小程序用户 + */ + @PreAuthorize("@ss.hasPermi('system:info:remove')") + @Log(title = "小程序用户", businessType = BusinessType.DELETE) + @DeleteMapping("/{ids}") + public AjaxResult remove(@PathVariable Long[] ids) { + return toAjax(tUserAccountInfoService.deleteTUserAccountInfoByIds(ids)); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserLoginLogController.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserLoginLogController.java new file mode 100644 index 00000000..0aa8868f --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/controller/TUserLoginLogController.java @@ -0,0 +1,97 @@ +package com.ruoyi.system.controller; + +import java.util.List; + +import org.springframework.security.access.prepost.PreAuthorize; +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.web.bind.annotation.GetMapping; +import org.springframework.web.bind.annotation.PostMapping; +import org.springframework.web.bind.annotation.PutMapping; +import org.springframework.web.bind.annotation.DeleteMapping; +import org.springframework.web.bind.annotation.PathVariable; +import org.springframework.web.bind.annotation.RequestBody; +import org.springframework.web.bind.annotation.RequestMapping; +import org.springframework.web.bind.annotation.RestController; +import com.ruoyi.common.annotation.Log; +import com.ruoyi.common.core.controller.BaseController; +import com.ruoyi.common.core.domain.AjaxResult; +import com.ruoyi.common.enums.BusinessType; +import com.ruoyi.system.domain.TUserLoginLog; +import com.ruoyi.system.service.ITUserLoginLogService; +import com.ruoyi.common.utils.poi.ExcelUtil; +import com.ruoyi.common.core.page.TableDataInfo; + +/** + * 【请填写功能名称】Controller + * + * @author wxy + * @date 2021-08-26 + */ +@RestController +@RequestMapping("/system/log") +public class TUserLoginLogController extends BaseController { + @Autowired + private ITUserLoginLogService tUserLoginLogService; + + /** + * 查询【请填写功能名称】列表 + */ + @PreAuthorize("@ss.hasPermi('system:log:list')") + @GetMapping("/list") + public TableDataInfo list(TUserLoginLog tUserLoginLog) { + startPage(); + List list = tUserLoginLogService.selectTUserLoginLogList(tUserLoginLog); + return getDataTable(list); + } + + /** + * 导出【请填写功能名称】列表 + */ + @PreAuthorize("@ss.hasPermi('system:log:export')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.EXPORT) + @GetMapping("/export") + public AjaxResult export(TUserLoginLog tUserLoginLog) { + List list = tUserLoginLogService.selectTUserLoginLogList(tUserLoginLog); + ExcelUtil util = new ExcelUtil(TUserLoginLog.class); + return util.exportExcel(list, "log"); + } + + /** + * 获取【请填写功能名称】详细信息 + */ + @PreAuthorize("@ss.hasPermi('system:log:query')") + @GetMapping(value = "/{id}") + public AjaxResult getInfo(@PathVariable("id") Long id) { + return AjaxResult.success(tUserLoginLogService.selectTUserLoginLogById(id)); + } + + /** + * 新增【请填写功能名称】 + */ + @PreAuthorize("@ss.hasPermi('system:log:add')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.INSERT) + @PostMapping + public AjaxResult add(@RequestBody TUserLoginLog tUserLoginLog) { + return toAjax(tUserLoginLogService.insertTUserLoginLog(tUserLoginLog)); + } + + /** + * 修改【请填写功能名称】 + */ + @PreAuthorize("@ss.hasPermi('system:log:edit')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.UPDATE) + @PutMapping + public AjaxResult edit(@RequestBody TUserLoginLog tUserLoginLog) { + return toAjax(tUserLoginLogService.updateTUserLoginLog(tUserLoginLog)); + } + + /** + * 删除【请填写功能名称】 + */ + @PreAuthorize("@ss.hasPermi('system:log:remove')") + @Log(title = "【请填写功能名称】", businessType = BusinessType.DELETE) + @DeleteMapping("/{ids}") + public AjaxResult remove(@PathVariable Long[] ids) { + return toAjax(tUserLoginLogService.deleteTUserLoginLogByIds(ids)); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotCategory.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotCategory.java index e54fb226..458644c9 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotCategory.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotCategory.java @@ -17,63 +17,64 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 设备分类对象 iot_category - * + * * @author kerwincui * @date 2021-05-07 */ -public class IotCategory extends BaseEntity -{ +public class IotCategory extends BaseEntity { private static final long serialVersionUID = 1L; - /** 序号 */ + /** + * 序号 + */ private Long categoryId; - /** 分类名称 */ + /** + * 分类名称 + */ @Excel(name = "分类名称") private String categoryName; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - public void setCategoryId(Long categoryId) - { + public void setCategoryId(Long categoryId) { this.categoryId = categoryId; } - public Long getCategoryId() - { + public Long getCategoryId() { return categoryId; } - public void setCategoryName(String categoryName) - { + + public void setCategoryName(String categoryName) { this.categoryName = categoryName; } - public String getCategoryName() - { + public String getCategoryName() { return categoryName; } - public void setDelFlag(String delFlag) - { + + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("categoryId", getCategoryId()) - .append("categoryName", getCategoryName()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("categoryId", getCategoryId()) + .append("categoryName", getCategoryName()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDevice.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDevice.java index 096196ab..c010fd97 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDevice.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDevice.java @@ -19,150 +19,178 @@ import java.math.BigDecimal; /** * 设备对象 iot_device - * + * * @author kerwincui * @date 2021-05-06 */ -public class IotDevice extends BaseEntity -{ +public class IotDevice extends BaseEntity { private static final long serialVersionUID = 1L; - /** 序号 */ + /** + * 序号 + */ private Long deviceId; - /** 编号 */ + /** + * 编号 + */ @Excel(name = "编号") private String deviceNum; - /** 分类 */ + /** + * 分类 + */ @Excel(name = "分类") private Long categoryId; - /** 分类名称 */ + /** + * 分类名称 + */ @Excel(name = "分类名称") private String categoryName; - /** 分类名称 */ + /** + * 分类名称 + */ @Excel(name = "分类名称") private BigDecimal deviceTemp; - /** 名称 */ + /** + * 名称 + */ @Excel(name = "名称") private String deviceName; - /** 固件版本 */ + /** + * 固件版本 + */ @Excel(name = "固件版本") private String firmwareVersion; - /** 用户 */ + /** 设备状态：未激活，未绑定，已绑定 */ + @Excel(name = "设备状态：未激活，未绑定，已绑定") + private String status; + + /** + * 用户 + */ @Excel(name = "用户") private String ownerId; - /** 分组ID */ + /** + * 分组ID + */ private Long groupId; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - public void setDeviceId(Long deviceId) - { + public void setDeviceId(Long deviceId) { this.deviceId = deviceId; } - public Long getDeviceId() - { + + public Long getDeviceId() { return deviceId; } - public void setDeviceNum(String deviceNum) - { + + public void setDeviceNum(String deviceNum) { this.deviceNum = deviceNum; } - public String getDeviceNum() - { + + public String getDeviceNum() { return deviceNum; } - public void setCategoryId(Long categoryId) - { + + public void setCategoryId(Long categoryId) { this.categoryId = categoryId; } - public Long getCategoryId() - { + + public Long getCategoryId() { return categoryId; } - public void setDeviceName(String deviceName) - { + + public void setDeviceName(String deviceName) { this.deviceName = deviceName; } - public String getDeviceName() - { + + public String getDeviceName() { return deviceName; } - public void setFirmwareVersion(String firmwareVersion) - { + + public void setFirmwareVersion(String firmwareVersion) { this.firmwareVersion = firmwareVersion; } - public String getFirmwareVersion() - { + + public String getFirmwareVersion() { return firmwareVersion; } - public void setOwnerId(String ownerId) - { + + public void setOwnerId(String ownerId) { this.ownerId = ownerId; } - public String getOwnerId() - { + + public String getOwnerId() { return ownerId; } - public void setDelFlag(String delFlag) - { + + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public String getDelFlag() - { + public void setStatus(String status) { + this.status = status; + } + + public String getStatus() { + return status; + } + public String getDelFlag() { return delFlag; } - public Long getGroupId() - { + + public Long getGroupId() { return groupId; } - public void setGroupId(Long groupId) - { + + public void setGroupId(Long groupId) { this.groupId = groupId; } - public void setDeviceTemp(BigDecimal deviceTemp) - { + + public void setDeviceTemp(BigDecimal deviceTemp) { this.deviceTemp = deviceTemp; } - public BigDecimal getDeviceTemp() - { + + public BigDecimal getDeviceTemp() { return deviceTemp; } - public void setCategoryName(String categoryName) - { + + public void setCategoryName(String categoryName) { this.categoryName = categoryName; } - public String getCategoryName() - { + + public String getCategoryName() { return categoryName; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("deviceId", getDeviceId()) - .append("deviceNum", getDeviceNum()) - .append("categoryName", getCategoryName()) - .append("deviceTemp", getDeviceTemp()) - .append("categoryId", getCategoryId()) - .append("groupId", getGroupId()) - .append("deviceName", getDeviceName()) - .append("firmwareVersion", getFirmwareVersion()) - .append("ownerId", getOwnerId()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("deviceId", getDeviceId()) + .append("deviceNum", getDeviceNum()) + .append("categoryName", getCategoryName()) + .append("deviceTemp", getDeviceTemp()) + .append("categoryId", getCategoryId()) + .append("groupId", getGroupId()) + .append("deviceName", getDeviceName()) + .append("firmwareVersion", getFirmwareVersion()) + .append("ownerId", getOwnerId()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceSet.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceSet.java index 43315aef..1527531e 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceSet.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceSet.java @@ -17,343 +17,362 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 设备配置对象 iot_device_set - * + * * @author kerwincui * @date 2021-05-06 */ -public class IotDeviceSet extends BaseEntity -{ +public class IotDeviceSet extends BaseEntity { private static final long serialVersionUID = 1L; - /** 序号 */ + /** + * 序号 + */ private Long deviceSetId; - /** 设备 */ + /** + * 设备 + */ @Excel(name = "设备") private Long deviceId; - /** 设备编号 */ + /** + * 设备编号 + */ @Excel(name = "设备编号") private String deviceNum; - /** 报警 */ + /** + * 报警 + */ @Excel(name = "报警") private Integer isAlarm; - /** 雷达感应 */ + /** + * 雷达感应 + */ @Excel(name = "雷达感应") private Integer isRadar; - /** 托管 */ + /** + * 托管 + */ @Excel(name = "托管") private Integer isHost; - /** 重启 */ + /** + * 重启 + */ @Excel(name = "重启") private Integer isReset; - /** 打开AP */ + /** + * 打开AP + */ @Excel(name = "打开AP") private Integer isAp; - /** 是否离线使用 */ + /** + * 是否离线使用 + */ @Excel(name = "是否离线使用") private Integer isWifiOffline; - /** 是否使用证书 */ + /** + * 是否使用证书 + */ @Excel(name = "是否使用证书") private Integer isOpenCertifi; - /** 智能配网 */ + /** + * 智能配网 + */ @Excel(name = "智能配网") private Integer isSmartConfig; - /** 射频遥控 */ + /** + * 射频遥控 + */ @Excel(name = "射频遥控") private Integer isRfControl; - /** 遥控配对 */ + /** + * 遥控配对 + */ @Excel(name = "遥控配对") private Integer isRfLearn; - /** 遥控清码 */ + /** + * 遥控清码 + */ @Excel(name = "遥控清码") private Integer isRfClear; - /** 按键一 */ + /** + * 按键一 + */ @Excel(name = "按键一") private Integer rfOneFunc; - /** 按键二 */ + /** + * 按键二 + */ @Excel(name = "按键二") private Integer rfTwoFunc; - /** 按键三 */ + /** + * 按键三 + */ @Excel(name = "按键三") private Integer rfThreeFunc; - /** 按键四 */ + /** + * 按键四 + */ @Excel(name = "按键四") private Integer rfFourFunc; - /** 用户 */ + /** + * 用户 + */ @Excel(name = "用户") private String ownerId; - /** 配网地址 */ + /** + * 配网地址 + */ @Excel(name = "配网地址") private String networkAddress; - /** 配网IP */ + /** + * 配网IP + */ @Excel(name = "配网IP") private String networkIp; - /** 雷达感应间隔 */ + /** + * 雷达感应间隔 + */ @Excel(name = "雷达感应间隔") private Integer radarInterval; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - public void setDeviceSetId(Long deviceSetId) - { + public void setDeviceSetId(Long deviceSetId) { this.deviceSetId = deviceSetId; } - public Long getDeviceSetId() - { + public Long getDeviceSetId() { return deviceSetId; } - public void setDeviceId(Long deviceId) - { + + public void setDeviceId(Long deviceId) { this.deviceId = deviceId; } - public Long getDeviceId() - { + public Long getDeviceId() { return deviceId; } - public void setDeviceNum(String deviceNum) - { + + public void setDeviceNum(String deviceNum) { this.deviceNum = deviceNum; } - public String getDeviceNum() - { + public String getDeviceNum() { return deviceNum; } - public void setIsAlarm(Integer isAlarm) - { + + public void setIsAlarm(Integer isAlarm) { this.isAlarm = isAlarm; } - public Integer getIsAlarm() - { + public Integer getIsAlarm() { return isAlarm; } - public void setIsRadar(Integer isRadar) - { + + public void setIsRadar(Integer isRadar) { this.isRadar = isRadar; } - public Integer getIsRadar() - { + public Integer getIsRadar() { return isRadar; } - public void setIsHost(Integer isHost) - { + + public void setIsHost(Integer isHost) { this.isHost = isHost; } - public Integer getIsHost() - { + public Integer getIsHost() { return isHost; } - public void setIsReset(Integer isReset) - { + + public void setIsReset(Integer isReset) { this.isReset = isReset; } - public Integer getIsReset() - { + public Integer getIsReset() { return isReset; } - public void setIsAp(Integer isAp) - { + public void setIsAp(Integer isAp) { this.isAp = isAp; } - public Integer getIsAp() - { + + public Integer getIsAp() { return isAp; } - public void setIsWifiOffline(Integer isWifiOffline) - { + public void setIsWifiOffline(Integer isWifiOffline) { this.isWifiOffline = isWifiOffline; } - public Integer getIsWifiOffline() - { + + public Integer getIsWifiOffline() { return isWifiOffline; } - public void setIsOpenCertifi(Integer isOpenCertifi) - { + public void setIsOpenCertifi(Integer isOpenCertifi) { this.isOpenCertifi = isOpenCertifi; } - public Integer getIsOpenCertifi() - { + + public Integer getIsOpenCertifi() { return isOpenCertifi; } - public void setIsSmartConfig(Integer isSmartConfig) - { + public void setIsSmartConfig(Integer isSmartConfig) { this.isSmartConfig = isSmartConfig; } - public Integer getIsSmartConfig() - { + public Integer getIsSmartConfig() { return isSmartConfig; } - public void setIsRfControl(Integer isRfControl) - { + + public void setIsRfControl(Integer isRfControl) { this.isRfControl = isRfControl; } - public Integer getIsRfControl() - { + public Integer getIsRfControl() { return isRfControl; } - public void setIsRfLearn(Integer isRfLearn) - { + + public void setIsRfLearn(Integer isRfLearn) { this.isRfLearn = isRfLearn; } - public Integer getIsRfLearn() - { + public Integer getIsRfLearn() { return isRfLearn; } - public void setIsRfClear(Integer isRfClear) - { + + public void setIsRfClear(Integer isRfClear) { this.isRfClear = isRfClear; } - public Integer getIsRfClear() - { + public Integer getIsRfClear() { return isRfClear; } - public void setRfOneFunc(Integer rfOneFunc) - { + + public void setRfOneFunc(Integer rfOneFunc) { this.rfOneFunc = rfOneFunc; } - public Integer getRfOneFunc() - { + public Integer getRfOneFunc() { return rfOneFunc; } - public void setRfTwoFunc(Integer rfTwoFunc) - { + + public void setRfTwoFunc(Integer rfTwoFunc) { this.rfTwoFunc = rfTwoFunc; } - public Integer getRfTwoFunc() - { + public Integer getRfTwoFunc() { return rfTwoFunc; } - public void setRfThreeFunc(Integer rfThreeFunc) - { + + public void setRfThreeFunc(Integer rfThreeFunc) { this.rfThreeFunc = rfThreeFunc; } - public Integer getRfThreeFunc() - { + public Integer getRfThreeFunc() { return rfThreeFunc; } - public void setRfFourFunc(Integer rfFourFunc) - { + + public void setRfFourFunc(Integer rfFourFunc) { this.rfFourFunc = rfFourFunc; } - public Integer getRfFourFunc() - { + public Integer getRfFourFunc() { return rfFourFunc; } - public void setOwnerId(String ownerId) - { + + public void setOwnerId(String ownerId) { this.ownerId = ownerId; } - public String getOwnerId() - { + public String getOwnerId() { return ownerId; } - public void setNetworkAddress(String networkAddress) - { + + public void setNetworkAddress(String networkAddress) { this.networkAddress = networkAddress; } - public String getNetworkAddress() - { + public String getNetworkAddress() { return networkAddress; } - public void setNetworkIp(String networkIp) - { + + public void setNetworkIp(String networkIp) { this.networkIp = networkIp; } - public String getNetworkIp() - { + public String getNetworkIp() { return networkIp; } - public void setDelFlag(String delFlag) - { + + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public void setRadarInterval(Integer radarInterval) - { + public void setRadarInterval(Integer radarInterval) { this.radarInterval = radarInterval; } - public Integer getRadarInterval() - { + public Integer getRadarInterval() { return radarInterval; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("deviceSetId", getDeviceSetId()) - .append("deviceId", getDeviceId()) - .append("deviceNum", getDeviceNum()) - .append("isAlarm", getIsAlarm()) - .append("isRadar", getIsRadar()) - .append("isHost", getIsHost()) - .append("isReset", getIsReset()) - .append("isAp", getIsAp()) - .append("isSmartConfig", getIsSmartConfig()) - .append("isRfControl", getIsRfControl()) - .append("isRfLearn", getIsRfLearn()) - .append("isRfClear", getIsRfClear()) - .append("rfOneFunc", getRfOneFunc()) - .append("rfTwoFunc", getRfTwoFunc()) - .append("rfThreeFunc", getRfThreeFunc()) - .append("rfFourFunc", getRfFourFunc()) - .append("ownerId", getOwnerId()) - .append("networkAddress", getNetworkAddress()) - .append("networkIp", getNetworkIp()) - .append("radarInterval", getRadarInterval()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("deviceSetId", getDeviceSetId()) + .append("deviceId", getDeviceId()) + .append("deviceNum", getDeviceNum()) + .append("isAlarm", getIsAlarm()) + .append("isRadar", getIsRadar()) + .append("isHost", getIsHost()) + .append("isReset", getIsReset()) + .append("isAp", getIsAp()) + .append("isSmartConfig", getIsSmartConfig()) + .append("isRfControl", getIsRfControl()) + .append("isRfLearn", getIsRfLearn()) + .append("isRfClear", getIsRfClear()) + .append("rfOneFunc", getRfOneFunc()) + .append("rfTwoFunc", getRfTwoFunc()) + .append("rfThreeFunc", getRfThreeFunc()) + .append("rfFourFunc", getRfFourFunc()) + .append("ownerId", getOwnerId()) + .append("networkAddress", getNetworkAddress()) + .append("networkIp", getNetworkIp()) + .append("radarInterval", getRadarInterval()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceStatus.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceStatus.java index 8e1261a7..b3839e23 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceStatus.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceStatus.java @@ -11,6 +11,7 @@ package com.ruoyi.system.domain; import java.math.BigDecimal; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -18,287 +19,304 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 设备状态对象 iot_device_status - * + * * @author kerwincui * @date 2021-05-06 */ -public class IotDeviceStatus extends BaseEntity -{ +public class IotDeviceStatus extends BaseEntity { private static final long serialVersionUID = 1L; - /** 序号 */ + /** + * 序号 + */ private Long deviceStatusId; - /** 设备 */ + /** + * 设备 + */ @Excel(name = "设备") private Long deviceId; - /** 设备编号 */ + /** + * 设备编号 + */ @Excel(name = "设备编号") private String deviceNum; - /** 继电器 */ + /** + * 继电器 + */ @Excel(name = "继电器") private Integer relayStatus; - /** 灯状态 */ + /** + * 灯状态 + */ @Excel(name = "灯状态") private Integer lightStatus; - /** 在线 */ + /** + * 在线 + */ @Excel(name = "在线") private Integer isOnline; - /** 设备温度 */ + /** + * 设备温度 + */ @Excel(name = "设备温度") private BigDecimal deviceTemperature; - /** 设备湿度 */ + /** + * 设备湿度 + */ @Excel(name = "信号") private Integer rssi; - /** 空气温度 */ + /** + * 空气温度 + */ @Excel(name = "空气温度") private BigDecimal airTemperature; - /** 空气湿度 */ + /** + * 空气湿度 + */ @Excel(name = "空气湿度") private BigDecimal airHumidity; - /** 触发源 */ + /** + * 触发源 + */ @Excel(name = "触发源") private Integer triggerSource; - /** 彩灯亮度 */ + /** + * 彩灯亮度 + */ @Excel(name = "彩灯亮度") private Integer brightness; - /** 渐变间隔 */ + /** + * 渐变间隔 + */ @Excel(name = "渐变间隔") private Integer lightInterval; - /** 彩灯模式 */ + /** + * 彩灯模式 + */ @Excel(name = "彩灯模式") private Integer lightMode; - /** 灯渐变时间 */ + /** + * 灯渐变时间 + */ @Excel(name = "渐变时间") private Integer fadeTime; - /** 红灯 */ + /** + * 红灯 + */ @Excel(name = "红灯") private Long red; - /** 绿灯 */ + /** + * 绿灯 + */ @Excel(name = "绿灯") private Long green; - /** 蓝灯 */ + /** + * 蓝灯 + */ @Excel(name = "蓝灯") private Long blue; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - public void setDeviceStatusId(Long deviceStatusId) - { + public void setDeviceStatusId(Long deviceStatusId) { this.deviceStatusId = deviceStatusId; } - public Long getDeviceStatusId() - { + public Long getDeviceStatusId() { return deviceStatusId; } - public void setDeviceId(Long deviceId) - { + + public void setDeviceId(Long deviceId) { this.deviceId = deviceId; } - public Long getDeviceId() - { + public Long getDeviceId() { return deviceId; } - public void setDeviceNum(String deviceNum) - { + + public void setDeviceNum(String deviceNum) { this.deviceNum = deviceNum; } - public String getDeviceNum() - { + public String getDeviceNum() { return deviceNum; } - public void setRelayStatus(Integer relayStatus) - { + + public void setRelayStatus(Integer relayStatus) { this.relayStatus = relayStatus; } - public Integer getRelayStatus() - { + public Integer getRelayStatus() { return relayStatus; } - public void setLightStatus(Integer lightStatus) - { + + public void setLightStatus(Integer lightStatus) { this.lightStatus = lightStatus; } - public Integer getLightStatus() - { + public Integer getLightStatus() { return lightStatus; } - public void setIsOnline(Integer isOnline) - { + + public void setIsOnline(Integer isOnline) { this.isOnline = isOnline; } - public Integer getIsOnline() - { + public Integer getIsOnline() { return isOnline; } - public void setDeviceTemperature(BigDecimal deviceTemperature) - { + + public void setDeviceTemperature(BigDecimal deviceTemperature) { this.deviceTemperature = deviceTemperature; } - public BigDecimal getDeviceTemperature() - { + public BigDecimal getDeviceTemperature() { return deviceTemperature; } - public void setRssi(Integer rssi) - { + + public void setRssi(Integer rssi) { this.rssi = rssi; } - public Integer getRssi() - { + public Integer getRssi() { return rssi; } - public void setAirTemperature(BigDecimal airTemperature) - { + + public void setAirTemperature(BigDecimal airTemperature) { this.airTemperature = airTemperature; } - public BigDecimal getAirTemperature() - { + public BigDecimal getAirTemperature() { return airTemperature; } - public void setAirHumidity(BigDecimal airHumidity) - { + + public void setAirHumidity(BigDecimal airHumidity) { this.airHumidity = airHumidity; } - public BigDecimal getAirHumidity() - { + public BigDecimal getAirHumidity() { return airHumidity; } - public void setTriggerSource(Integer triggerSource) - { + + public void setTriggerSource(Integer triggerSource) { this.triggerSource = triggerSource; } - public Integer getTriggerSource() - { + public Integer getTriggerSource() { return triggerSource; } - public void setBrightness(Integer brightness) - { + + public void setBrightness(Integer brightness) { this.brightness = brightness; } - public Integer getBrightness() - { + public Integer getBrightness() { return brightness; } - public void setLightInterval(Integer lightInterval) - { + + public void setLightInterval(Integer lightInterval) { this.lightInterval = lightInterval; } - public Integer getLightInterval() - { + public Integer getLightInterval() { return lightInterval; } - public void setLightMode(Integer lightMode) - { + + public void setLightMode(Integer lightMode) { this.lightMode = lightMode; } - public Integer getLightMode() - { + public Integer getLightMode() { return lightMode; } - public void setRed(Long red) - { + + public void setRed(Long red) { this.red = red; } - public Long getRed() - { + public Long getRed() { return red; } - public void setGreen(Long green) - { + + public void setGreen(Long green) { this.green = green; } - public Long getGreen() - { + public Long getGreen() { return green; } - public void setBlue(Long blue) - { + + public void setBlue(Long blue) { this.blue = blue; } - public Long getBlue() - { + public Long getBlue() { return blue; } - public void setDelFlag(String delFlag) - { + + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public void setFadeTime(Integer fadeTime) - { + public void setFadeTime(Integer fadeTime) { this.fadeTime = fadeTime; } - public Integer getFadeTime() - { + + public Integer getFadeTime() { return fadeTime; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("deviceStatusId", getDeviceStatusId()) - .append("deviceId", getDeviceId()) - .append("deviceNum", getDeviceNum()) - .append("relayStatus", getRelayStatus()) - .append("lightStatus", getLightStatus()) - .append("isOnline", getIsOnline()) - .append("deviceTemperature", getDeviceTemperature()) - .append("rssid", getRssi()) - .append("airTemperature", getAirTemperature()) - .append("airHumidity", getAirHumidity()) - .append("triggerSource", getTriggerSource()) - .append("brightness", getBrightness()) - .append("lightInterval", getLightInterval()) - .append("lightMode", getLightMode()) - .append("fadeTime", getFadeTime()) - .append("red", getRed()) - .append("green", getGreen()) - .append("blue", getBlue()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("deviceStatusId", getDeviceStatusId()) + .append("deviceId", getDeviceId()) + .append("deviceNum", getDeviceNum()) + .append("relayStatus", getRelayStatus()) + .append("lightStatus", getLightStatus()) + .append("isOnline", getIsOnline()) + .append("deviceTemperature", getDeviceTemperature()) + .append("rssid", getRssi()) + .append("airTemperature", getAirTemperature()) + .append("airHumidity", getAirHumidity()) + .append("triggerSource", getTriggerSource()) + .append("brightness", getBrightness()) + .append("lightInterval", getLightInterval()) + .append("lightMode", getLightMode()) + .append("fadeTime", getFadeTime()) + .append("red", getRed()) + .append("green", getGreen()) + .append("blue", getBlue()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceUserRelation.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceUserRelation.java new file mode 100644 index 00000000..ad182195 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotDeviceUserRelation.java @@ -0,0 +1,136 @@ +package com.ruoyi.system.domain; + +import java.util.Date; + +import com.fasterxml.jackson.annotation.JsonFormat; +import org.apache.commons.lang3.builder.ToStringBuilder; +import org.apache.commons.lang3.builder.ToStringStyle; +import com.ruoyi.common.annotation.Excel; +import com.ruoyi.common.core.domain.BaseEntity; + +/** + * 【请填写功能名称】对象 iot_device_user_relation + * + * @author wxy + * @date 2021-08-27 + */ +public class IotDeviceUserRelation extends BaseEntity { + private static final long serialVersionUID = 1L; + + /** + * $column.columnComment + */ + private Long id; + + /** + * $column.columnComment + */ + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private Long userId; + + /** + * $column.columnComment + */ + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private Long deviceId; + + /** + * $column.columnComment + */ + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private String deviceNum; + + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private String deviceName; + + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private String remark; + + /** + * $column.columnComment + */ + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private Date gmtTime; + + /** + * $column.columnComment + */ + @Excel(name = "${comment}", readConverterExp = "$column.readConverterExp()") + private Date gmtUpdate; + + public void setId(Long id) { + this.id = id; + } + + public Long getId() { + return id; + } + + public void setUserId(Long userId) { + this.userId = userId; + } + + public Long getUserId() { + return userId; + } + + public void setDeviceId(Long deviceId) { + this.deviceId = deviceId; + } + + public Long getDeviceId() { + return deviceId; + } + + public void setDeviceName(String deviceName) { + this.deviceName = deviceName; + } + + public String getDeviceName() { + return deviceName; + } + + public String getRemark() { + return remark; + } + + public void setRemark(String remark) { + this.remark = remark; + } + + public void setDeviceNum(String deviceNum) { + this.deviceNum = deviceNum; + } + + public String getDeviceNum() { + return deviceNum; + } + + public void setGmtTime(Date gmtTime) { + this.gmtTime = gmtTime; + } + + public Date getGmtTime() { + return gmtTime; + } + + public void setGmtUpdate(Date gmtUpdate) { + this.gmtUpdate = gmtUpdate; + } + + public Date getGmtUpdate() { + return gmtUpdate; + } + + @Override + public String toString() { + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("id", getId()) + .append("userId", getUserId()) + .append("deviceId", getDeviceId()) + .append("deviceNum", getDeviceNum()) + .append("gmtTime", getGmtTime()) + .append("gmtUpdate", getGmtUpdate()) + .toString(); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotGroup.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotGroup.java index c9ab4d1a..015abf9b 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotGroup.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/IotGroup.java @@ -17,91 +17,94 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 分组对象 iot_group - * + * * @author kerwincui * @date 2021-05-18 */ -public class IotGroup extends BaseEntity -{ +public class IotGroup extends BaseEntity { private static final long serialVersionUID = 1L; - /** 设备分组 */ + /** + * 设备分组 + */ private Long groupId; - /** 用户 */ + /** + * 用户 + */ @Excel(name = "用户") private Long userId; - /** 分组名称 */ + /** + * 分组名称 + */ @Excel(name = "分组名称") private String groupName; - /** 排序 */ + /** + * 排序 + */ @Excel(name = "排序") private Integer groupOrder; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - public void setGroupId(Long groupId) - { + public void setGroupId(Long groupId) { this.groupId = groupId; } - public Long getGroupId() - { + public Long getGroupId() { return groupId; } - public void setUserId(Long userId) - { + + public void setUserId(Long userId) { this.userId = userId; } - public Long getUserId() - { + public Long getUserId() { return userId; } - public void setGroupName(String groupName) - { + + public void setGroupName(String groupName) { this.groupName = groupName; } - public String getGroupName() - { + public String getGroupName() { return groupName; } - public void setGroupOrder(Integer groupOrder) - { + + public void setGroupOrder(Integer groupOrder) { this.groupOrder = groupOrder; } - public Integer getGroupOrder() - { + public Integer getGroupOrder() { return groupOrder; } - public void setDelFlag(String delFlag) - { + + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public String getDelFlag() - { + public String getDelFlag() { return delFlag; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("groupId", getGroupId()) - .append("userId", getUserId()) - .append("groupName", getGroupName()) - .append("groupOrder", getGroupOrder()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("groupId", getGroupId()) + .append("userId", getUserId()) + .append("groupName", getGroupName()) + .append("groupOrder", getGroupOrder()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysConfig.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysConfig.java index 52e18988..d57786ba 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysConfig.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysConfig.java @@ -12,6 +12,7 @@ package com.ruoyi.system.domain; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -20,102 +21,101 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 参数配置表 sys_config - * + * * @author ruoyi */ -public class SysConfig extends BaseEntity -{ +public class SysConfig extends BaseEntity { private static final long serialVersionUID = 1L; - /** 参数主键 */ + /** + * 参数主键 + */ @Excel(name = "参数主键", cellType = ColumnType.NUMERIC) private Long configId; - /** 参数名称 */ + /** + * 参数名称 + */ @Excel(name = "参数名称") private String configName; - /** 参数键名 */ + /** + * 参数键名 + */ @Excel(name = "参数键名") private String configKey; - /** 参数键值 */ + /** + * 参数键值 + */ @Excel(name = "参数键值") private String configValue; - /** 系统内置（Y是 N否） */ + /** + * 系统内置（Y是 N否） + */ @Excel(name = "系统内置", readConverterExp = "Y=是,N=否") private String configType; - public Long getConfigId() - { + public Long getConfigId() { return configId; } - public void setConfigId(Long configId) - { + public void setConfigId(Long configId) { this.configId = configId; } @NotBlank(message = "参数名称不能为空") @Size(min = 0, max = 100, message = "参数名称不能超过100个字符") - public String getConfigName() - { + public String getConfigName() { return configName; } - public void setConfigName(String configName) - { + public void setConfigName(String configName) { this.configName = configName; } @NotBlank(message = "参数键名长度不能为空") @Size(min = 0, max = 100, message = "参数键名长度不能超过100个字符") - public String getConfigKey() - { + public String getConfigKey() { return configKey; } - public void setConfigKey(String configKey) - { + public void setConfigKey(String configKey) { this.configKey = configKey; } @NotBlank(message = "参数键值不能为空") @Size(min = 0, max = 500, message = "参数键值长度不能超过500个字符") - public String getConfigValue() - { + public String getConfigValue() { return configValue; } - public void setConfigValue(String configValue) - { + public void setConfigValue(String configValue) { this.configValue = configValue; } - public String getConfigType() - { + public String getConfigType() { return configType; } - public void setConfigType(String configType) - { + public void setConfigType(String configType) { this.configType = configType; } - + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("configId", getConfigId()) - .append("configName", getConfigName()) - .append("configKey", getConfigKey()) - .append("configValue", getConfigValue()) - .append("configType", getConfigType()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("configId", getConfigId()) + .append("configName", getConfigName()) + .append("configKey", getConfigKey()) + .append("configValue", getConfigValue()) + .append("configType", getConfigType()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysLogininfor.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysLogininfor.java index 34c42ba2..de1f8edb 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysLogininfor.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysLogininfor.java @@ -11,6 +11,7 @@ package com.ruoyi.system.domain; import java.util.Date; + import com.fasterxml.jackson.annotation.JsonFormat; import com.ruoyi.common.annotation.Excel; import com.ruoyi.common.annotation.Excel.ColumnType; @@ -18,137 +19,136 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 系统访问记录表 sys_logininfor - * + * * @author ruoyi */ -public class SysLogininfor extends BaseEntity -{ +public class SysLogininfor extends BaseEntity { private static final long serialVersionUID = 1L; - /** ID */ + /** + * ID + */ @Excel(name = "序号", cellType = ColumnType.NUMERIC) private Long infoId; - /** 用户账号 */ + /** + * 用户账号 + */ @Excel(name = "用户账号") private String userName; - /** 登录状态 0成功 1失败 */ + /** + * 登录状态 0成功 1失败 + */ @Excel(name = "登录状态", readConverterExp = "0=成功,1=失败") private String status; - /** 登录IP地址 */ + /** + * 登录IP地址 + */ @Excel(name = "登录地址") private String ipaddr; - /** 登录地点 */ + /** + * 登录地点 + */ @Excel(name = "登录地点") private String loginLocation; - /** 浏览器类型 */ + /** + * 浏览器类型 + */ @Excel(name = "浏览器") private String browser; - /** 操作系统 */ + /** + * 操作系统 + */ @Excel(name = "操作系统") private String os; - /** 提示消息 */ + /** + * 提示消息 + */ @Excel(name = "提示消息") private String msg; - /** 访问时间 */ + /** + * 访问时间 + */ @JsonFormat(pattern = "yyyy-MM-dd HH:mm:ss") @Excel(name = "访问时间", width = 30, dateFormat = "yyyy-MM-dd HH:mm:ss") private Date loginTime; - public Long getInfoId() - { + public Long getInfoId() { return infoId; } - public void setInfoId(Long infoId) - { + public void setInfoId(Long infoId) { this.infoId = infoId; } - public String getUserName() - { + public String getUserName() { return userName; } - public void setUserName(String userName) - { + public void setUserName(String userName) { this.userName = userName; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public String getIpaddr() - { + public String getIpaddr() { return ipaddr; } - public void setIpaddr(String ipaddr) - { + public void setIpaddr(String ipaddr) { this.ipaddr = ipaddr; } - public String getLoginLocation() - { + public String getLoginLocation() { return loginLocation; } - public void setLoginLocation(String loginLocation) - { + public void setLoginLocation(String loginLocation) { this.loginLocation = loginLocation; } - public String getBrowser() - { + public String getBrowser() { return browser; } - public void setBrowser(String browser) - { + public void setBrowser(String browser) { this.browser = browser; } - public String getOs() - { + public String getOs() { return os; } - public void setOs(String os) - { + public void setOs(String os) { this.os = os; } - public String getMsg() - { + public String getMsg() { return msg; } - public void setMsg(String msg) - { + public void setMsg(String msg) { this.msg = msg; } - public Date getLoginTime() - { + public Date getLoginTime() { return loginTime; } - public void setLoginTime(Date loginTime) - { + public void setLoginTime(Date loginTime) { this.loginTime = loginTime; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysNotice.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysNotice.java index 457c2647..1007fb44 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysNotice.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysNotice.java @@ -12,99 +12,99 @@ package com.ruoyi.system.domain; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.core.domain.BaseEntity; /** * 通知公告表 sys_notice - * + * * @author ruoyi */ -public class SysNotice extends BaseEntity -{ +public class SysNotice extends BaseEntity { private static final long serialVersionUID = 1L; - /** 公告ID */ + /** + * 公告ID + */ private Long noticeId; - /** 公告标题 */ + /** + * 公告标题 + */ private String noticeTitle; - /** 公告类型（1通知 2公告） */ + /** + * 公告类型（1通知 2公告） + */ private String noticeType; - /** 公告内容 */ + /** + * 公告内容 + */ private String noticeContent; - /** 公告状态（0正常 1关闭） */ + /** + * 公告状态（0正常 1关闭） + */ private String status; - public Long getNoticeId() - { + public Long getNoticeId() { return noticeId; } - public void setNoticeId(Long noticeId) - { + public void setNoticeId(Long noticeId) { this.noticeId = noticeId; } - public void setNoticeTitle(String noticeTitle) - { + public void setNoticeTitle(String noticeTitle) { this.noticeTitle = noticeTitle; } @NotBlank(message = "公告标题不能为空") @Size(min = 0, max = 50, message = "公告标题不能超过50个字符") - public String getNoticeTitle() - { + public String getNoticeTitle() { return noticeTitle; } - public void setNoticeType(String noticeType) - { + public void setNoticeType(String noticeType) { this.noticeType = noticeType; } - public String getNoticeType() - { + public String getNoticeType() { return noticeType; } - public void setNoticeContent(String noticeContent) - { + public void setNoticeContent(String noticeContent) { this.noticeContent = noticeContent; } - public String getNoticeContent() - { + public String getNoticeContent() { return noticeContent; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public String getStatus() - { + public String getStatus() { return status; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("noticeId", getNoticeId()) - .append("noticeTitle", getNoticeTitle()) - .append("noticeType", getNoticeType()) - .append("noticeContent", getNoticeContent()) - .append("status", getStatus()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("noticeId", getNoticeId()) + .append("noticeTitle", getNoticeTitle()) + .append("noticeType", getNoticeType()) + .append("noticeContent", getNoticeContent()) + .append("status", getStatus()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysOperLog.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysOperLog.java index 175ee03f..b4fa4782 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysOperLog.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysOperLog.java @@ -1,6 +1,7 @@ package com.ruoyi.system.domain; import java.util.Date; + import com.fasterxml.jackson.annotation.JsonFormat; import com.ruoyi.common.annotation.Excel; import com.ruoyi.common.annotation.Excel.ColumnType; @@ -8,248 +9,247 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 操作日志记录表 oper_log - * + * * @author ruoyi */ -public class SysOperLog extends BaseEntity -{ +public class SysOperLog extends BaseEntity { private static final long serialVersionUID = 1L; - /** 日志主键 */ + /** + * 日志主键 + */ @Excel(name = "操作序号", cellType = ColumnType.NUMERIC) private Long operId; - /** 操作模块 */ + /** + * 操作模块 + */ @Excel(name = "操作模块") private String title; - /** 业务类型（0其它 1新增 2修改 3删除） */ + /** + * 业务类型（0其它 1新增 2修改 3删除） + */ @Excel(name = "业务类型", readConverterExp = "0=其它,1=新增,2=修改,3=删除,4=授权,5=导出,6=导入,7=强退,8=生成代码,9=清空数据") private Integer businessType; - /** 业务类型数组 */ + /** + * 业务类型数组 + */ private Integer[] businessTypes; - /** 请求方法 */ + /** + * 请求方法 + */ @Excel(name = "请求方法") private String method; - /** 请求方式 */ + /** + * 请求方式 + */ @Excel(name = "请求方式") private String requestMethod; - /** 操作类别（0其它 1后台用户 2手机端用户） */ + /** + * 操作类别（0其它 1后台用户 2手机端用户） + */ @Excel(name = "操作类别", readConverterExp = "0=其它,1=后台用户,2=手机端用户") private Integer operatorType; - /** 操作人员 */ + /** + * 操作人员 + */ @Excel(name = "操作人员") private String operName; - /** 部门名称 */ + /** + * 部门名称 + */ @Excel(name = "部门名称") private String deptName; - /** 请求url */ + /** + * 请求url + */ @Excel(name = "请求地址") private String operUrl; - /** 操作地址 */ + /** + * 操作地址 + */ @Excel(name = "操作地址") private String operIp; - /** 操作地点 */ + /** + * 操作地点 + */ @Excel(name = "操作地点") private String operLocation; - /** 请求参数 */ + /** + * 请求参数 + */ @Excel(name = "请求参数") private String operParam; - /** 返回参数 */ + /** + * 返回参数 + */ @Excel(name = "返回参数") private String jsonResult; - /** 操作状态（0正常 1异常） */ + /** + * 操作状态（0正常 1异常） + */ @Excel(name = "状态", readConverterExp = "0=正常,1=异常") private Integer status; - /** 错误消息 */ + /** + * 错误消息 + */ @Excel(name = "错误消息") private String errorMsg; - /** 操作时间 */ + /** + * 操作时间 + */ @JsonFormat(pattern = "yyyy-MM-dd HH:mm:ss") @Excel(name = "操作时间", width = 30, dateFormat = "yyyy-MM-dd HH:mm:ss") private Date operTime; - public Long getOperId() - { + public Long getOperId() { return operId; } - public void setOperId(Long operId) - { + public void setOperId(Long operId) { this.operId = operId; } - public String getTitle() - { + public String getTitle() { return title; } - public void setTitle(String title) - { + public void setTitle(String title) { this.title = title; } - public Integer getBusinessType() - { + public Integer getBusinessType() { return businessType; } - public void setBusinessType(Integer businessType) - { + public void setBusinessType(Integer businessType) { this.businessType = businessType; } - public Integer[] getBusinessTypes() - { + public Integer[] getBusinessTypes() { return businessTypes; } - public void setBusinessTypes(Integer[] businessTypes) - { + public void setBusinessTypes(Integer[] businessTypes) { this.businessTypes = businessTypes; } - public String getMethod() - { + public String getMethod() { return method; } - public void setMethod(String method) - { + public void setMethod(String method) { this.method = method; } - public String getRequestMethod() - { + public String getRequestMethod() { return requestMethod; } - public void setRequestMethod(String requestMethod) - { + public void setRequestMethod(String requestMethod) { this.requestMethod = requestMethod; } - public Integer getOperatorType() - { + public Integer getOperatorType() { return operatorType; } - public void setOperatorType(Integer operatorType) - { + public void setOperatorType(Integer operatorType) { this.operatorType = operatorType; } - public String getOperName() - { + public String getOperName() { return operName; } - public void setOperName(String operName) - { + public void setOperName(String operName) { this.operName = operName; } - public String getDeptName() - { + public String getDeptName() { return deptName; } - public void setDeptName(String deptName) - { + public void setDeptName(String deptName) { this.deptName = deptName; } - public String getOperUrl() - { + public String getOperUrl() { return operUrl; } - public void setOperUrl(String operUrl) - { + public void setOperUrl(String operUrl) { this.operUrl = operUrl; } - public String getOperIp() - { + public String getOperIp() { return operIp; } - public void setOperIp(String operIp) - { + public void setOperIp(String operIp) { this.operIp = operIp; } - public String getOperLocation() - { + public String getOperLocation() { return operLocation; } - public void setOperLocation(String operLocation) - { + public void setOperLocation(String operLocation) { this.operLocation = operLocation; } - public String getOperParam() - { + public String getOperParam() { return operParam; } - public void setOperParam(String operParam) - { + public void setOperParam(String operParam) { this.operParam = operParam; } - public String getJsonResult() - { + public String getJsonResult() { return jsonResult; } - public void setJsonResult(String jsonResult) - { + public void setJsonResult(String jsonResult) { this.jsonResult = jsonResult; } - public Integer getStatus() - { + public Integer getStatus() { return status; } - public void setStatus(Integer status) - { + public void setStatus(Integer status) { this.status = status; } - public String getErrorMsg() - { + public String getErrorMsg() { return errorMsg; } - public void setErrorMsg(String errorMsg) - { + public void setErrorMsg(String errorMsg) { this.errorMsg = errorMsg; } - public Date getOperTime() - { + public Date getOperTime() { return operTime; } - public void setOperTime(Date operTime) - { + public void setOperTime(Date operTime) { this.operTime = operTime; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysPost.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysPost.java index 1f1fcf4c..fcd24ed8 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysPost.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysPost.java @@ -2,6 +2,7 @@ package com.ruoyi.system.domain; import javax.validation.constraints.NotBlank; import javax.validation.constraints.Size; + import org.apache.commons.lang3.builder.ToStringBuilder; import org.apache.commons.lang3.builder.ToStringStyle; import com.ruoyi.common.annotation.Excel; @@ -10,114 +11,113 @@ import com.ruoyi.common.core.domain.BaseEntity; /** * 岗位表 sys_post - * + * * @author ruoyi */ -public class SysPost extends BaseEntity -{ +public class SysPost extends BaseEntity { private static final long serialVersionUID = 1L; - /** 岗位序号 */ + /** + * 岗位序号 + */ @Excel(name = "岗位序号", cellType = ColumnType.NUMERIC) private Long postId; - /** 岗位编码 */ + /** + * 岗位编码 + */ @Excel(name = "岗位编码") private String postCode; - /** 岗位名称 */ + /** + * 岗位名称 + */ @Excel(name = "岗位名称") private String postName; - /** 岗位排序 */ + /** + * 岗位排序 + */ @Excel(name = "岗位排序") private String postSort; - /** 状态（0正常 1停用） */ + /** + * 状态（0正常 1停用） + */ @Excel(name = "状态", readConverterExp = "0=正常,1=停用") private String status; - /** 用户是否存在此岗位标识 默认不存在 */ + /** + * 用户是否存在此岗位标识 默认不存在 + */ private boolean flag = false; - public Long getPostId() - { + public Long getPostId() { return postId; } - public void setPostId(Long postId) - { + public void setPostId(Long postId) { this.postId = postId; } @NotBlank(message = "岗位编码不能为空") @Size(min = 0, max = 64, message = "岗位编码长度不能超过64个字符") - public String getPostCode() - { + public String getPostCode() { return postCode; } - public void setPostCode(String postCode) - { + public void setPostCode(String postCode) { this.postCode = postCode; } @NotBlank(message = "岗位名称不能为空") @Size(min = 0, max = 50, message = "岗位名称长度不能超过50个字符") - public String getPostName() - { + public String getPostName() { return postName; } - public void setPostName(String postName) - { + public void setPostName(String postName) { this.postName = postName; } @NotBlank(message = "显示顺序不能为空") - public String getPostSort() - { + public String getPostSort() { return postSort; } - public void setPostSort(String postSort) - { + public void setPostSort(String postSort) { this.postSort = postSort; } - public String getStatus() - { + public String getStatus() { return status; } - public void setStatus(String status) - { + public void setStatus(String status) { this.status = status; } - public boolean isFlag() - { + public boolean isFlag() { return flag; } - public void setFlag(boolean flag) - { + public void setFlag(boolean flag) { this.flag = flag; } - + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("postId", getPostId()) - .append("postCode", getPostCode()) - .append("postName", getPostName()) - .append("postSort", getPostSort()) - .append("status", getStatus()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("postId", getPostId()) + .append("postCode", getPostCode()) + .append("postName", getPostName()) + .append("postSort", getPostSort()) + .append("status", getStatus()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleDept.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleDept.java index 47b21bf7..aaaa06e4 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleDept.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleDept.java @@ -5,42 +5,41 @@ import org.apache.commons.lang3.builder.ToStringStyle; /** * 角色和部门关联 sys_role_dept - * + * * @author ruoyi */ -public class SysRoleDept -{ - /** 角色ID */ +public class SysRoleDept { + /** + * 角色ID + */ private Long roleId; - - /** 部门ID */ + + /** + * 部门ID + */ private Long deptId; - public Long getRoleId() - { + public Long getRoleId() { return roleId; } - public void setRoleId(Long roleId) - { + public void setRoleId(Long roleId) { this.roleId = roleId; } - public Long getDeptId() - { + public Long getDeptId() { return deptId; } - public void setDeptId(Long deptId) - { + public void setDeptId(Long deptId) { this.deptId = deptId; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("roleId", getRoleId()) - .append("deptId", getDeptId()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("roleId", getRoleId()) + .append("deptId", getDeptId()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleMenu.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleMenu.java index de10a747..af6ac320 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleMenu.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysRoleMenu.java @@ -5,42 +5,41 @@ import org.apache.commons.lang3.builder.ToStringStyle; /** * 角色和菜单关联 sys_role_menu - * + * * @author ruoyi */ -public class SysRoleMenu -{ - /** 角色ID */ +public class SysRoleMenu { + /** + * 角色ID + */ private Long roleId; - - /** 菜单ID */ + + /** + * 菜单ID + */ private Long menuId; - public Long getRoleId() - { + public Long getRoleId() { return roleId; } - public void setRoleId(Long roleId) - { + public void setRoleId(Long roleId) { this.roleId = roleId; } - public Long getMenuId() - { + public Long getMenuId() { return menuId; } - public void setMenuId(Long menuId) - { + public void setMenuId(Long menuId) { this.menuId = menuId; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("roleId", getRoleId()) - .append("menuId", getMenuId()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("roleId", getRoleId()) + .append("menuId", getMenuId()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserOnline.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserOnline.java index 2bbd3188..d066cf8a 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserOnline.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserOnline.java @@ -2,112 +2,111 @@ package com.ruoyi.system.domain; /** * 当前在线会话 - * + * * @author ruoyi */ -public class SysUserOnline -{ - /** 会话编号 */ +public class SysUserOnline { + /** + * 会话编号 + */ private String tokenId; - /** 部门名称 */ + /** + * 部门名称 + */ private String deptName; - /** 用户名称 */ + /** + * 用户名称 + */ private String userName; - /** 登录IP地址 */ + /** + * 登录IP地址 + */ private String ipaddr; - /** 登录地址 */ + /** + * 登录地址 + */ private String loginLocation; - /** 浏览器类型 */ + /** + * 浏览器类型 + */ private String browser; - /** 操作系统 */ + /** + * 操作系统 + */ private String os; - /** 登录时间 */ + /** + * 登录时间 + */ private Long loginTime; - public String getTokenId() - { + public String getTokenId() { return tokenId; } - public void setTokenId(String tokenId) - { + public void setTokenId(String tokenId) { this.tokenId = tokenId; } - public String getDeptName() - { + public String getDeptName() { return deptName; } - public void setDeptName(String deptName) - { + public void setDeptName(String deptName) { this.deptName = deptName; } - public String getUserName() - { + public String getUserName() { return userName; } - public void setUserName(String userName) - { + public void setUserName(String userName) { this.userName = userName; } - public String getIpaddr() - { + public String getIpaddr() { return ipaddr; } - public void setIpaddr(String ipaddr) - { + public void setIpaddr(String ipaddr) { this.ipaddr = ipaddr; } - public String getLoginLocation() - { + public String getLoginLocation() { return loginLocation; } - public void setLoginLocation(String loginLocation) - { + public void setLoginLocation(String loginLocation) { this.loginLocation = loginLocation; } - public String getBrowser() - { + public String getBrowser() { return browser; } - public void setBrowser(String browser) - { + public void setBrowser(String browser) { this.browser = browser; } - public String getOs() - { + public String getOs() { return os; } - public void setOs(String os) - { + public void setOs(String os) { this.os = os; } - public Long getLoginTime() - { + public Long getLoginTime() { return loginTime; } - public void setLoginTime(Long loginTime) - { + public void setLoginTime(Long loginTime) { this.loginTime = loginTime; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserPost.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserPost.java index 6e8c416f..eb2ba7b1 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserPost.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserPost.java @@ -5,42 +5,41 @@ import org.apache.commons.lang3.builder.ToStringStyle; /** * 用户和岗位关联 sys_user_post - * + * * @author ruoyi */ -public class SysUserPost -{ - /** 用户ID */ +public class SysUserPost { + /** + * 用户ID + */ private Long userId; - - /** 岗位ID */ + + /** + * 岗位ID + */ private Long postId; - public Long getUserId() - { + public Long getUserId() { return userId; } - public void setUserId(Long userId) - { + public void setUserId(Long userId) { this.userId = userId; } - public Long getPostId() - { + public Long getPostId() { return postId; } - public void setPostId(Long postId) - { + public void setPostId(Long postId) { this.postId = postId; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("userId", getUserId()) - .append("postId", getPostId()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("userId", getUserId()) + .append("postId", getPostId()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserRole.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserRole.java index 4d158101..6e0073fa 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserRole.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/SysUserRole.java @@ -5,42 +5,41 @@ import org.apache.commons.lang3.builder.ToStringStyle; /** * 用户和角色关联 sys_user_role - * + * * @author ruoyi */ -public class SysUserRole -{ - /** 用户ID */ +public class SysUserRole { + /** + * 用户ID + */ private Long userId; - - /** 角色ID */ + + /** + * 角色ID + */ private Long roleId; - public Long getUserId() - { + public Long getUserId() { return userId; } - public void setUserId(Long userId) - { + public void setUserId(Long userId) { this.userId = userId; } - public Long getRoleId() - { + public Long getRoleId() { return roleId; } - public void setRoleId(Long roleId) - { + public void setRoleId(Long roleId) { this.roleId = roleId; } @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("userId", getUserId()) - .append("roleId", getRoleId()) - .toString(); + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("userId", getUserId()) + .append("roleId", getRoleId()) + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserAccountInfo.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserAccountInfo.java new file mode 100644 index 00000000..f1ee21fd --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserAccountInfo.java @@ -0,0 +1,327 @@ +package com.ruoyi.system.domain; + +import java.util.Date; + +import com.fasterxml.jackson.annotation.JsonFormat; +import org.apache.commons.lang3.builder.ToStringBuilder; +import org.apache.commons.lang3.builder.ToStringStyle; +import com.ruoyi.common.annotation.Excel; +import com.ruoyi.common.core.domain.BaseEntity; + +/** + * 小程序用户对象 t_user_account_info + * + * @author wxy + * @date 2021-08-26 + */ +public class TUserAccountInfo extends BaseEntity { + private static final long serialVersionUID = 1L; + + /** + * $column.columnComment + */ + private Long id; + + /** + * sessionKey + */ + @Excel(name = "sessionKey") + private String sessionkey; + + /** + * accessToken + */ + @Excel(name = "accessToken") + private String accessToken; + + /** + * $column.columnComment + */ + @Excel(name = "accessToken") + private String openId; + + /** + * $column.columnComment + */ + @Excel(name = "accessToken") + private String unionId; + + /** + * 昵称 + */ + @Excel(name = "昵称") + private String nickName; + + /** + * 头像 + */ + @Excel(name = "头像") + private String avatar; + + /** + * 手机号 + */ + @Excel(name = "手机号") + private String phone; + + /** + * 生日 + */ + @Excel(name = "生日") + private String birthday; + + /** + * 用户状态：0-冻结，1-正常 + */ + @Excel(name = "用户状态：0-冻结，1-正常") + private Long status; + + /** + * 国家 + */ + @Excel(name = "国家") + private String country; + + /** + * 省份 + */ + @Excel(name = "省份") + private String province; + + /** + * 城市 + */ + @Excel(name = "城市") + private String city; + + /** + * 地址 + */ + @Excel(name = "地址") + private String address; + + /** + * 用户类型：0-未授权用户，1-消费者，2-商家 + */ + @Excel(name = "用户类型：0-未授权用户，1-消费者，2-商家") + private Long userType; + + /** + * 绑定的管理员编号 + */ + @Excel(name = "绑定的管理员编号") + private Long adminId; + + /** + * $column.columnComment + */ + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "绑定的管理员编号", width = 30, dateFormat = "yyyy-MM-dd") + private Date lastLoginTime; + + /** + * $column.columnComment + */ + @Excel(name = "绑定的管理员编号") + private String lastLoginIp; + + /** + * $column.columnComment + */ + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "绑定的管理员编号", width = 30, dateFormat = "yyyy-MM-dd") + private Date gmtTime; + + /** + * $column.columnComment + */ + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "绑定的管理员编号", width = 30, dateFormat = "yyyy-MM-dd") + private Date gmtUpdate; + + public void setId(Long id) { + this.id = id; + } + + public Long getId() { + return id; + } + + public void setSessionkey(String sessionkey) { + this.sessionkey = sessionkey; + } + + public String getSessionkey() { + return sessionkey; + } + + public void setAccessToken(String accessToken) { + this.accessToken = accessToken; + } + + public String getAccessToken() { + return accessToken; + } + + public void setOpenId(String openId) { + this.openId = openId; + } + + public String getOpenId() { + return openId; + } + + public void setUnionId(String unionId) { + this.unionId = unionId; + } + + public String getUnionId() { + return unionId; + } + + public void setNickName(String nickName) { + this.nickName = nickName; + } + + public String getNickName() { + return nickName; + } + + public void setAvatar(String avatar) { + this.avatar = avatar; + } + + public String getAvatar() { + return avatar; + } + + public void setPhone(String phone) { + this.phone = phone; + } + + public String getPhone() { + return phone; + } + + public void setBirthday(String birthday) { + this.birthday = birthday; + } + + public String getBirthday() { + return birthday; + } + + public void setStatus(Long status) { + this.status = status; + } + + public Long getStatus() { + return status; + } + + public void setCountry(String country) { + this.country = country; + } + + public String getCountry() { + return country; + } + + public void setProvince(String province) { + this.province = province; + } + + public String getProvince() { + return province; + } + + public void setCity(String city) { + this.city = city; + } + + public String getCity() { + return city; + } + + public void setAddress(String address) { + this.address = address; + } + + public String getAddress() { + return address; + } + + public void setUserType(Long userType) { + this.userType = userType; + } + + public Long getUserType() { + return userType; + } + + public void setAdminId(Long adminId) { + this.adminId = adminId; + } + + public Long getAdminId() { + return adminId; + } + + public void setLastLoginTime(Date lastLoginTime) { + this.lastLoginTime = lastLoginTime; + } + + public Date getLastLoginTime() { + return lastLoginTime; + } + + public void setLastLoginIp(String lastLoginIp) { + this.lastLoginIp = lastLoginIp; + } + + public String getLastLoginIp() { + return lastLoginIp; + } + + public void setGmtTime(Date gmtTime) { + this.gmtTime = gmtTime; + } + + public Date getGmtTime() { + return gmtTime; + } + + public void setGmtUpdate(Date gmtUpdate) { + this.gmtUpdate = gmtUpdate; + } + + public Date getGmtUpdate() { + return gmtUpdate; + } + + @Override + public String toString() { + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("id", getId()) + .append("sessionkey", getSessionkey()) + .append("accessToken", getAccessToken()) + .append("openId", getOpenId()) + .append("unionId", getUnionId()) + .append("nickName", getNickName()) + .append("avatar", getAvatar()) + .append("phone", getPhone()) + .append("birthday", getBirthday()) + .append("status", getStatus()) + .append("country", getCountry()) + .append("province", getProvince()) + .append("city", getCity()) + .append("address", getAddress()) + .append("userType", getUserType()) + .append("adminId", getAdminId()) + .append("lastLoginTime", getLastLoginTime()) + .append("lastLoginIp", getLastLoginIp()) + .append("gmtTime", getGmtTime()) + .append("gmtUpdate", getGmtUpdate()) + .toString(); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserLoginLog.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserLoginLog.java new file mode 100644 index 00000000..cf6bb8f1 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/TUserLoginLog.java @@ -0,0 +1,146 @@ +package com.ruoyi.system.domain; + +import java.util.Date; + +import com.fasterxml.jackson.annotation.JsonFormat; +import org.apache.commons.lang3.builder.ToStringBuilder; +import org.apache.commons.lang3.builder.ToStringStyle; +import com.ruoyi.common.annotation.Excel; +import com.ruoyi.common.core.domain.BaseEntity; + +/** + * 【请填写功能名称】对象 t_user_login_log + * + * @author wxy + * @date 2021-08-26 + */ +public class TUserLoginLog extends BaseEntity { + private static final long serialVersionUID = 1L; + + /** + * $column.columnComment + */ + private Long id; + + /** + * 用户类型 + */ + @Excel(name = "用户类型") + private String userType; + + /** + * $column.columnComment + */ + @Excel(name = "用户类型") + private Long userId; + + /** + * $column.columnComment + */ + @Excel(name = "用户类型") + private String code; + + /** + * $column.columnComment + */ + @Excel(name = "用户类型") + private String openId; + + /** + * IP地址 + */ + @Excel(name = "IP地址") + private String ip; + + /** + * $column.columnComment + */ + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "IP地址", width = 30, dateFormat = "yyyy-MM-dd") + private Date gmtTime; + + /** + * $column.columnComment + */ + @JsonFormat(pattern = "yyyy-MM-dd") + @Excel(name = "IP地址", width = 30, dateFormat = "yyyy-MM-dd") + private Date gmtUpdate; + + public void setId(Long id) { + this.id = id; + } + + public Long getId() { + return id; + } + + public void setUserType(String userType) { + this.userType = userType; + } + + public String getUserType() { + return userType; + } + + public void setUserId(Long userId) { + this.userId = userId; + } + + public Long getUserId() { + return userId; + } + + public void setCode(String code) { + this.code = code; + } + + public String getCode() { + return code; + } + + public void setOpenId(String openId) { + this.openId = openId; + } + + public String getOpenId() { + return openId; + } + + public void setIp(String ip) { + this.ip = ip; + } + + public String getIp() { + return ip; + } + + public void setGmtTime(Date gmtTime) { + this.gmtTime = gmtTime; + } + + public Date getGmtTime() { + return gmtTime; + } + + public void setGmtUpdate(Date gmtUpdate) { + this.gmtUpdate = gmtUpdate; + } + + public Date getGmtUpdate() { + return gmtUpdate; + } + + @Override + public String toString() { + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("id", getId()) + .append("userType", getUserType()) + .append("userId", getUserId()) + .append("code", getCode()) + .append("openId", getOpenId()) + .append("ip", getIp()) + .append("gmtTime", getGmtTime()) + .append("gmtUpdate", getGmtUpdate()) + .toString(); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/DeviceControlCMD.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/DeviceControlCMD.java new file mode 100644 index 00000000..b0246e56 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/DeviceControlCMD.java @@ -0,0 +1,16 @@ +package com.ruoyi.system.domain.vo; + +import lombok.Data; + +/** + * 类名: DeviceControlCMD + * 描述: 设备控制指令参数 + * 时间: 2021-08-26,0026 18:54 + * 开发人: admin + */ +@Data +public class DeviceControlCMD { + private Long deviceId; + String deviceNum; + String cmd; +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/IotDeviceListDto.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/IotDeviceListDto.java index 146efb26..8e656937 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/IotDeviceListDto.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/IotDeviceListDto.java @@ -19,263 +19,316 @@ import java.math.BigDecimal; /** * 设备对象 iot_device - * + * * @author kerwincui * @date 2021-05-06 */ -public class IotDeviceListDto extends BaseEntity -{ +public class IotDeviceListDto extends BaseEntity { private static final long serialVersionUID = 1L; - /** 序号 */ + /** + * 序号 + */ private Long deviceId; - /** 编号 */ + /** + * 编号 + */ @Excel(name = "编号") private String deviceNum; - /** 分类 */ + /** + * 分类 + */ @Excel(name = "分类") private Long categoryId; - /** 分类名称 */ + /** + * 分类名称 + */ @Excel(name = "分类名称") private String categoryName; - /** 名称 */ + /** + * 名称 + */ @Excel(name = "名称") private String deviceName; - /** 固件版本 */ + /** + * 固件版本 + */ @Excel(name = "固件版本") private String firmwareVersion; - /** 用户 */ + /** + * 用户 + */ @Excel(name = "用户") private String ownerId; - @Excel(name="用户昵称") + @Excel(name = "设备状态") + private String status; + + @Excel(name = "用户昵称") private String nickName; - /** 删除标志（0代表存在 2代表删除） */ + /** + * 删除标志（0代表存在 2代表删除） + */ private String delFlag; - /** 报警 */ + /** + * 报警 + */ @Excel(name = "报警") private Integer isAlarm; - /** 雷达感应 */ + /** + * 雷达感应 + */ @Excel(name = "雷达感应") private Integer isRadar; - /** 射频遥控 */ + /** + * 射频遥控 + */ @Excel(name = "射频遥控") private Integer isRfControl; - /** 配网地址 */ + /** + * 配网地址 + */ @Excel(name = "配网地址") private String networkAddress; - /** 配网IP */ + /** + * 配网IP + */ @Excel(name = "配网IP") private String networkIp; - /** 继电器 */ + /** + * 继电器 + */ @Excel(name = "继电器") private Integer relayStatus; - /** 灯状态 */ + /** + * 灯状态 + */ @Excel(name = "灯状态") private Integer lightStatus; - /** 在线 */ + /** + * 在线 + */ @Excel(name = "在线") private Integer isOnline; - /** 设备温度 */ + /** + * 设备温度 + */ @Excel(name = "设备温度") private BigDecimal deviceTemperature; - /** 设备湿度 */ + /** + * 设备湿度 + */ @Excel(name = "信号") private Integer rssi; + @Excel(name = "备注") + private String remark; - public void setDeviceId(Long deviceId) - { + public void setDeviceId(Long deviceId) { this.deviceId = deviceId; } - public Long getDeviceId() - { + + public Long getDeviceId() { return deviceId; } - public void setDeviceNum(String deviceNum) - { + + public void setDeviceNum(String deviceNum) { this.deviceNum = deviceNum; } - public String getDeviceNum() - { + + public String getDeviceNum() { return deviceNum; } - public void setCategoryId(Long categoryId) - { + + public void setCategoryId(Long categoryId) { this.categoryId = categoryId; } - public Long getCategoryId() - { + + public Long getCategoryId() { return categoryId; } - public void setCategoryName(String categoryName) - { + + public void setCategoryName(String categoryName) { this.categoryName = categoryName; } - public String getCategoryName() - { + + public String getCategoryName() { return categoryName; } - public void setDeviceName(String deviceName) - { + + public void setDeviceName(String deviceName) { this.deviceName = deviceName; } - public String getDeviceName() - { + + public String getDeviceName() { return deviceName; } - public void setFirmwareVersion(String firmwareVersion) - { + + public void setStatus(String status) { + this.status = status; + } + + public String getStatus() { + return status; + } + + public void setFirmwareVersion(String firmwareVersion) { this.firmwareVersion = firmwareVersion; } - public String getFirmwareVersion() - { + + public String getFirmwareVersion() { return firmwareVersion; } - public void setOwnerId(String ownerId) - { + + public void setOwnerId(String ownerId) { this.ownerId = ownerId; } - public String getOwnerId() - { + + public String getOwnerId() { return ownerId; } - public void setNickName(String nickName) - { + + public void setNickName(String nickName) { this.nickName = nickName; } - public String getNickName() - { + + public String getNickName() { return nickName; } - public void setDelFlag(String delFlag) - { + + public void setDelFlag(String delFlag) { this.delFlag = delFlag; } - public String getDelFlag() - { + + public String getDelFlag() { return delFlag; } - public void setIsAlarm(Integer isAlarm) - { + public void setIsAlarm(Integer isAlarm) { this.isAlarm = isAlarm; } - public Integer getIsAlarm() - { + + public Integer getIsAlarm() { return isAlarm; } - public void setIsRadar(Integer isRadar) - { + + public void setIsRadar(Integer isRadar) { this.isRadar = isRadar; } - public Integer getIsRadar() - { + + public Integer getIsRadar() { return isRadar; } - public void setIsRfControl(Integer isRfControl) - { + + public void setIsRfControl(Integer isRfControl) { this.isRfControl = isRfControl; } - public Integer getIsRfControl() - { + + public Integer getIsRfControl() { return isRfControl; } - public void setNetworkAddress(String networkAddress) - { + + public void setNetworkAddress(String networkAddress) { this.networkAddress = networkAddress; } - public String getNetworkAddress() - { + + public String getNetworkAddress() { return networkAddress; } - public void setNetworkIp(String networkIp) - { + + public void setNetworkIp(String networkIp) { this.networkIp = networkIp; } - public String getNetworkIp() - { + + public String getNetworkIp() { return networkIp; } - public void setRelayStatus(Integer relayStatus) - { + public void setRelayStatus(Integer relayStatus) { this.relayStatus = relayStatus; } - public Integer getRelayStatus() - { + + public Integer getRelayStatus() { return relayStatus; } - public void setLightStatus(Integer lightStatus) - { + + public void setLightStatus(Integer lightStatus) { this.lightStatus = lightStatus; } - public Integer getLightStatus() - { + + public Integer getLightStatus() { return lightStatus; } - public void setIsOnline(Integer isOnline) - { + + public void setIsOnline(Integer isOnline) { this.isOnline = isOnline; } - public Integer getIsOnline() - { + + public Integer getIsOnline() { return isOnline; } - public void setDeviceTemperature(BigDecimal deviceTemperature) - { + + public void setDeviceTemperature(BigDecimal deviceTemperature) { this.deviceTemperature = deviceTemperature; } - public BigDecimal getDeviceTemperature() - { + + public BigDecimal getDeviceTemperature() { return deviceTemperature; } - public void setRssi(Integer rssi) - { + + public void setRssi(Integer rssi) { this.rssi = rssi; } - public Integer getRssi() - { + + public Integer getRssi() { return rssi; } + public void setRemark(String remark) { + this.remark = remark; + } + + public String getRemark() { + return remark; + } + @Override public String toString() { - return new ToStringBuilder(this,ToStringStyle.MULTI_LINE_STYLE) - .append("deviceId", getDeviceId()) - .append("deviceNum", getDeviceNum()) - .append("categoryId", getCategoryId()) - .append("categoryName", getCategoryName()) - .append("deviceName", getDeviceName()) - .append("firmwareVersion", getFirmwareVersion()) - .append("ownerId", getOwnerId()) - .append("nickName", getNickName()) - .append("delFlag", getDelFlag()) - .append("createBy", getCreateBy()) - .append("createTime", getCreateTime()) - .append("updateBy", getUpdateBy()) - .append("updateTime", getUpdateTime()) - .append("remark", getRemark()) + return new ToStringBuilder(this, ToStringStyle.MULTI_LINE_STYLE) + .append("deviceId", getDeviceId()) + .append("deviceNum", getDeviceNum()) + .append("categoryId", getCategoryId()) + .append("categoryName", getCategoryName()) + .append("deviceName", getDeviceName()) + .append("firmwareVersion", getFirmwareVersion()) + .append("ownerId", getOwnerId()) + .append("nickName", getNickName()) + .append("delFlag", getDelFlag()) + .append("createBy", getCreateBy()) + .append("createTime", getCreateTime()) + .append("updateBy", getUpdateBy()) + .append("updateTime", getUpdateTime()) + .append("remark", getRemark()) .append("isAlarm", getIsAlarm()) .append("isRadar", getIsRadar()) .append("isRfControl", getIsRfControl()) @@ -286,6 +339,6 @@ public class IotDeviceListDto extends BaseEntity .append("isOnline", getIsOnline()) .append("deviceTemperature", getDeviceTemperature()) .append("rssid", getRssi()) - .toString(); + .toString(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/MetaVo.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/MetaVo.java index af7234c1..908b5823 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/MetaVo.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/MetaVo.java @@ -2,11 +2,10 @@ package com.ruoyi.system.domain.vo; /** * 路由显示信息 - * + * * @author ruoyi */ -public class MetaVo -{ +public class MetaVo { /** * 设置该路由在侧边栏和面包屑中展示的名字 */ @@ -22,50 +21,41 @@ public class MetaVo */ private boolean noCache; - public MetaVo() - { + public MetaVo() { } - public MetaVo(String title, String icon) - { + public MetaVo(String title, String icon) { this.title = title; this.icon = icon; } - public MetaVo(String title, String icon, boolean noCache) - { + public MetaVo(String title, String icon, boolean noCache) { this.title = title; this.icon = icon; this.noCache = noCache; } - public boolean isNoCache() - { + public boolean isNoCache() { return noCache; } - public void setNoCache(boolean noCache) - { + public void setNoCache(boolean noCache) { this.noCache = noCache; } - public String getTitle() - { + public String getTitle() { return title; } - public void setTitle(String title) - { + public void setTitle(String title) { this.title = title; } - public String getIcon() - { + public String getIcon() { return icon; } - public void setIcon(String icon) - { + public void setIcon(String icon) { this.icon = icon; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/RouterVo.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/RouterVo.java index b5501b77..9538383f 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/RouterVo.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/domain/vo/RouterVo.java @@ -1,16 +1,16 @@ package com.ruoyi.system.domain.vo; import com.fasterxml.jackson.annotation.JsonInclude; + import java.util.List; /** * 路由配置信息 - * + * * @author ruoyi */ @JsonInclude(JsonInclude.Include.NON_EMPTY) -public class RouterVo -{ +public class RouterVo { /** * 路由名字 */ @@ -51,83 +51,67 @@ public class RouterVo */ private List children; - public String getName() - { + public String getName() { return name; } - public void setName(String name) - { + public void setName(String name) { this.name = name; } - public String getPath() - { + public String getPath() { return path; } - public void setPath(String path) - { + public void setPath(String path) { this.path = path; } - public boolean getHidden() - { + public boolean getHidden() { return hidden; } - public void setHidden(boolean hidden) - { + public void setHidden(boolean hidden) { this.hidden = hidden; } - public String getRedirect() - { + public String getRedirect() { return redirect; } - public void setRedirect(String redirect) - { + public void setRedirect(String redirect) { this.redirect = redirect; } - public String getComponent() - { + public String getComponent() { return component; } - public void setComponent(String component) - { + public void setComponent(String component) { this.component = component; } - public Boolean getAlwaysShow() - { + public Boolean getAlwaysShow() { return alwaysShow; } - public void setAlwaysShow(Boolean alwaysShow) - { + public void setAlwaysShow(Boolean alwaysShow) { this.alwaysShow = alwaysShow; } - public MetaVo getMeta() - { + public MetaVo getMeta() { return meta; } - public void setMeta(MetaVo meta) - { + public void setMeta(MetaVo meta) { this.meta = meta; } - public List getChildren() - { + public List getChildren() { return children; } - public void setChildren(List children) - { + public void setChildren(List children) { this.children = children; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotCategoryMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotCategoryMapper.java index 904cc738..b3d2708a 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotCategoryMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotCategoryMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.IotCategory; +import org.springframework.stereotype.Repository; /** * 设备分类Mapper接口 - * + * * @author kerwincui * @date 2021-05-07 */ -public interface IotCategoryMapper -{ +@Repository +public interface IotCategoryMapper { /** * 查询设备分类 - * + * * @param categoryId 设备分类ID * @return 设备分类 */ @@ -21,7 +23,7 @@ public interface IotCategoryMapper /** * 查询设备分类列表 - * + * * @param iotCategory 设备分类 * @return 设备分类集合 */ @@ -29,7 +31,7 @@ public interface IotCategoryMapper /** * 新增设备分类 - * + * * @param iotCategory 设备分类 * @return 结果 */ @@ -37,7 +39,7 @@ public interface IotCategoryMapper /** * 修改设备分类 - * + * * @param iotCategory 设备分类 * @return 结果 */ @@ -45,7 +47,7 @@ public interface IotCategoryMapper /** * 删除设备分类 - * + * * @param categoryId 设备分类ID * @return 结果 */ @@ -53,7 +55,7 @@ public interface IotCategoryMapper /** * 批量删除设备分类 - * + * * @param categoryIds 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceMapper.java index 84578dd8..81e58779 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceMapper.java @@ -1,20 +1,24 @@ package com.ruoyi.system.mapper; import java.util.List; + +import com.alibaba.fastjson.JSONObject; import com.ruoyi.system.domain.IotDevice; import com.ruoyi.system.domain.vo.IotDeviceListDto; +import org.apache.ibatis.annotations.Param; +import org.springframework.stereotype.Repository; /** * 设备Mapper接口 - * + * * @author kerwincui * @date 2021-05-06 */ -public interface IotDeviceMapper -{ +@Repository +public interface IotDeviceMapper { /** * 查询设备 - * + * * @param deviceId 设备ID * @return 设备 */ @@ -30,7 +34,7 @@ public interface IotDeviceMapper /** * 查询设备列表 - * + * * @param iotDevice 设备 * @return 设备集合 */ @@ -38,7 +42,7 @@ public interface IotDeviceMapper /** * 新增设备 - * + * * @param iotDevice 设备 * @return 结果 */ @@ -46,7 +50,7 @@ public interface IotDeviceMapper /** * 修改设备 - * + * * @param iotDevice 设备 * @return 结果 */ @@ -54,7 +58,7 @@ public interface IotDeviceMapper /** * 删除设备 - * + * * @param deviceId 设备ID * @return 结果 */ @@ -62,9 +66,15 @@ public interface IotDeviceMapper /** * 批量删除设备 - * + * * @param deviceIds 需要删除的数据ID * @return 结果 */ public int deleteIotDeviceByIds(Long[] deviceIds); + + List selectMpIotDeviceList(IotDevice iotDevice); + + JSONObject getDeviceInfoByDeviceNum(@Param("userId") Long userId,@Param("deviceNum") String deviceNum); + + JSONObject getDeviceInfoByDeviceId(@Param("userId") Long userId,@Param("deviceId") Long deviceId); } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceSetMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceSetMapper.java index 8f532bf7..c65ddcea 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceSetMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceSetMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.IotDeviceSet; +import org.springframework.stereotype.Repository; /** * 设备配置Mapper接口 - * + * * @author kerwincui * @date 2021-05-06 */ -public interface IotDeviceSetMapper -{ +@Repository +public interface IotDeviceSetMapper { /** * 查询设备配置 - * + * * @param deviceSetId 设备配置ID * @return 设备配置 */ @@ -29,7 +31,7 @@ public interface IotDeviceSetMapper /** * 查询设备配置列表 - * + * * @param iotDeviceSet 设备配置 * @return 设备配置集合 */ @@ -37,7 +39,7 @@ public interface IotDeviceSetMapper /** * 新增设备配置 - * + * * @param iotDeviceSet 设备配置 * @return 结果 */ @@ -45,7 +47,7 @@ public interface IotDeviceSetMapper /** * 修改设备配置 - * + * * @param iotDeviceSet 设备配置 * @return 结果 */ @@ -53,7 +55,7 @@ public interface IotDeviceSetMapper /** * 删除设备配置 - * + * * @param deviceConfigId 设备配置ID * @return 结果 */ @@ -61,7 +63,7 @@ public interface IotDeviceSetMapper /** * 批量删除设备配置 - * + * * @param deviceConfigIds 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceStatusMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceStatusMapper.java index e0a150df..439e30ed 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceStatusMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceStatusMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.IotDeviceStatus; +import org.springframework.stereotype.Repository; /** * 设备状态Mapper接口 - * + * * @author kerwincui * @date 2021-05-06 */ -public interface IotDeviceStatusMapper -{ +@Repository +public interface IotDeviceStatusMapper { /** * 查询设备状态 - * + * * @param deviceStatusId 设备状态ID * @return 设备状态 */ @@ -37,7 +39,7 @@ public interface IotDeviceStatusMapper /** * 查询设备状态列表 - * + * * @param iotDeviceStatus 设备状态 * @return 设备状态集合 */ @@ -45,7 +47,7 @@ public interface IotDeviceStatusMapper /** * 新增设备状态 - * + * * @param iotDeviceStatus 设备状态 * @return 结果 */ @@ -53,7 +55,7 @@ public interface IotDeviceStatusMapper /** * 修改设备状态 - * + * * @param iotDeviceStatus 设备状态 * @return 结果 */ @@ -61,7 +63,7 @@ public interface IotDeviceStatusMapper /** * 删除设备状态 - * + * * @param deviceStatusId 设备状态ID * @return 结果 */ @@ -69,7 +71,7 @@ public interface IotDeviceStatusMapper /** * 批量删除设备状态 - * + * * @param deviceStatusIds 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceUserRelationMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceUserRelationMapper.java new file mode 100644 index 00000000..7d70943b --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotDeviceUserRelationMapper.java @@ -0,0 +1,63 @@ +package com.ruoyi.system.mapper; + +import java.util.List; + +import com.ruoyi.system.domain.IotDeviceUserRelation; +import org.springframework.stereotype.Repository; + +/** + * 【请填写功能名称】Mapper接口 + * + * @author wxy + * @date 2021-08-27 + */ +@Repository +public interface IotDeviceUserRelationMapper { + /** + * 查询【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 【请填写功能名称】 + */ + public IotDeviceUserRelation selectIotDeviceUserRelationById(Long id); + + /** + * 查询【请填写功能名称】列表 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 【请填写功能名称】集合 + */ + public List selectIotDeviceUserRelationList(IotDeviceUserRelation iotDeviceUserRelation); + + /** + * 新增【请填写功能名称】 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 结果 + */ + public int insertIotDeviceUserRelation(IotDeviceUserRelation iotDeviceUserRelation); + + /** + * 修改【请填写功能名称】 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 结果 + */ + public int updateIotDeviceUserRelation(IotDeviceUserRelation iotDeviceUserRelation); + + /** + * 删除【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 结果 + */ + public int deleteIotDeviceUserRelationById(Long id); + + /** + * 批量删除【请填写功能名称】 + * + * @param ids 需要删除的数据ID + * @return 结果 + */ + public int deleteIotDeviceUserRelationByIds(Long[] ids); + } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotGroupMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotGroupMapper.java index 8c333667..3f72812f 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotGroupMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/IotGroupMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.IotGroup; +import org.springframework.stereotype.Repository; /** * 分组Mapper接口 - * + * * @author kerwincui * @date 2021-05-18 */ -public interface IotGroupMapper -{ +@Repository +public interface IotGroupMapper { /** * 查询分组 - * + * * @param groupId 分组ID * @return 分组 */ @@ -21,7 +23,7 @@ public interface IotGroupMapper /** * 查询分组列表 - * + * * @param iotGroup 分组 * @return 分组集合 */ @@ -29,7 +31,7 @@ public interface IotGroupMapper /** * 新增分组 - * + * * @param iotGroup 分组 * @return 结果 */ @@ -37,7 +39,7 @@ public interface IotGroupMapper /** * 修改分组 - * + * * @param iotGroup 分组 * @return 结果 */ @@ -45,7 +47,7 @@ public interface IotGroupMapper /** * 删除分组 - * + * * @param groupId 分组ID * @return 结果 */ @@ -53,7 +55,7 @@ public interface IotGroupMapper /** * 批量删除分组 - * + * * @param groupIds 需要删除的数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysConfigMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysConfigMapper.java index 0ed0c0af..0e9a2d8a 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysConfigMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysConfigMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysConfig; +import org.springframework.stereotype.Repository; /** * 参数配置 数据层 - * + * * @author ruoyi */ -public interface SysConfigMapper -{ +@Repository +public interface SysConfigMapper { /** * 查询参数配置信息 - * + * * @param config 参数配置信息 * @return 参数配置信息 */ @@ -20,7 +22,7 @@ public interface SysConfigMapper /** * 查询参数配置列表 - * + * * @param config 参数配置信息 * @return 参数配置集合 */ @@ -28,7 +30,7 @@ public interface SysConfigMapper /** * 根据键名查询参数配置信息 - * + * * @param configKey 参数键名 * @return 参数配置信息 */ @@ -36,7 +38,7 @@ public interface SysConfigMapper /** * 新增参数配置 - * + * * @param config 参数配置信息 * @return 结果 */ @@ -44,7 +46,7 @@ public interface SysConfigMapper /** * 修改参数配置 - * + * * @param config 参数配置信息 * @return 结果 */ @@ -52,7 +54,7 @@ public interface SysConfigMapper /** * 删除参数配置 - * + * * @param configId 参数ID * @return 结果 */ @@ -60,7 +62,7 @@ public interface SysConfigMapper /** * 批量删除参数信息 - * + * * @param configIds 需要删除的参数ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDeptMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDeptMapper.java index 000bf668..8837187d 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDeptMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDeptMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import org.apache.ibatis.annotations.Param; import com.ruoyi.common.core.domain.entity.SysDept; +import org.springframework.stereotype.Repository; /** * 部门管理 数据层 - * + * * @author ruoyi */ -public interface SysDeptMapper -{ +@Repository +public interface SysDeptMapper { /** * 查询部门管理数据 - * + * * @param dept 部门信息 * @return 部门信息集合 */ @@ -21,8 +23,8 @@ public interface SysDeptMapper /** * 根据角色ID查询部门树信息 - * - * @param roleId 角色ID + * + * @param roleId 角色ID * @param deptCheckStrictly 部门树选择项是否关联显示 * @return 选中部门列表 */ @@ -30,7 +32,7 @@ public interface SysDeptMapper /** * 根据部门ID查询信息 - * + * * @param deptId 部门ID * @return 部门信息 */ @@ -38,7 +40,7 @@ public interface SysDeptMapper /** * 根据ID查询所有子部门 - * + * * @param deptId 部门ID * @return 部门列表 */ @@ -46,7 +48,7 @@ public interface SysDeptMapper /** * 根据ID查询所有子部门（正常状态） - * + * * @param deptId 部门ID * @return 子部门数 */ @@ -54,7 +56,7 @@ public interface SysDeptMapper /** * 是否存在子节点 - * + * * @param deptId 部门ID * @return 结果 */ @@ -62,7 +64,7 @@ public interface SysDeptMapper /** * 查询部门是否存在用户 - * + * * @param deptId 部门ID * @return 结果 */ @@ -70,7 +72,7 @@ public interface SysDeptMapper /** * 校验部门名称是否唯一 - * + * * @param deptName 部门名称 * @param parentId 父部门ID * @return 结果 @@ -79,7 +81,7 @@ public interface SysDeptMapper /** * 新增部门信息 - * + * * @param dept 部门信息 * @return 结果 */ @@ -87,7 +89,7 @@ public interface SysDeptMapper /** * 修改部门信息 - * + * * @param dept 部门信息 * @return 结果 */ @@ -95,14 +97,14 @@ public interface SysDeptMapper /** * 修改所在部门的父级部门状态 - * + * * @param dept 部门 */ public void updateDeptStatus(SysDept dept); /** * 修改子元素关系 - * + * * @param depts 子元素 * @return 结果 */ @@ -110,7 +112,7 @@ public interface SysDeptMapper /** * 删除部门管理信息 - * + * * @param deptId 部门ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictDataMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictDataMapper.java index a341f1e3..72ef927b 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictDataMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictDataMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import org.apache.ibatis.annotations.Param; import com.ruoyi.common.core.domain.entity.SysDictData; +import org.springframework.stereotype.Repository; /** * 字典表 数据层 - * + * * @author ruoyi */ -public interface SysDictDataMapper -{ +@Repository +public interface SysDictDataMapper { /** * 根据条件分页查询字典数据 - * + * * @param dictData 字典数据信息 * @return 字典数据集合信息 */ @@ -21,7 +23,7 @@ public interface SysDictDataMapper /** * 根据字典类型查询字典数据 - * + * * @param dictType 字典类型 * @return 字典数据集合信息 */ @@ -29,8 +31,8 @@ public interface SysDictDataMapper /** * 根据字典类型和字典键值查询字典数据信息 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictValue 字典键值 * @return 字典标签 */ @@ -38,7 +40,7 @@ public interface SysDictDataMapper /** * 根据字典数据ID查询信息 - * + * * @param dictCode 字典数据ID * @return 字典数据 */ @@ -46,7 +48,7 @@ public interface SysDictDataMapper /** * 查询字典数据 - * + * * @param dictType 字典类型 * @return 字典数据 */ @@ -54,7 +56,7 @@ public interface SysDictDataMapper /** * 通过字典ID删除字典数据信息 - * + * * @param dictCode 字典数据ID * @return 结果 */ @@ -62,7 +64,7 @@ public interface SysDictDataMapper /** * 批量删除字典数据信息 - * + * * @param dictCodes 需要删除的字典数据ID * @return 结果 */ @@ -70,7 +72,7 @@ public interface SysDictDataMapper /** * 新增字典数据信息 - * + * * @param dictData 字典数据信息 * @return 结果 */ @@ -78,7 +80,7 @@ public interface SysDictDataMapper /** * 修改字典数据信息 - * + * * @param dictData 字典数据信息 * @return 结果 */ @@ -86,7 +88,7 @@ public interface SysDictDataMapper /** * 同步修改字典类型 - * + * * @param oldDictType 旧字典类型 * @param newDictType 新旧字典类型 * @return 结果 diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictTypeMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictTypeMapper.java index 17545cd9..2249832d 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictTypeMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysDictTypeMapper.java @@ -1,20 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import org.apache.ibatis.annotations.Mapper; import com.ruoyi.common.core.domain.entity.SysDictType; /** * 字典表 数据层 - * + * * @author ruoyi */ @Mapper -public interface SysDictTypeMapper -{ +public interface SysDictTypeMapper { /** * 根据条件分页查询字典类型 - * + * * @param dictType 字典类型信息 * @return 字典类型集合信息 */ @@ -22,14 +22,14 @@ public interface SysDictTypeMapper /** * 根据所有字典类型 - * + * * @return 字典类型集合信息 */ public List selectDictTypeAll(); /** * 根据字典类型ID查询信息 - * + * * @param dictId 字典类型ID * @return 字典类型 */ @@ -37,7 +37,7 @@ public interface SysDictTypeMapper /** * 根据字典类型查询信息 - * + * * @param dictType 字典类型 * @return 字典类型 */ @@ -45,7 +45,7 @@ public interface SysDictTypeMapper /** * 通过字典ID删除字典信息 - * + * * @param dictId 字典ID * @return 结果 */ @@ -53,7 +53,7 @@ public interface SysDictTypeMapper /** * 批量删除字典类型信息 - * + * * @param dictIds 需要删除的字典ID * @return 结果 */ @@ -61,7 +61,7 @@ public interface SysDictTypeMapper /** * 新增字典类型信息 - * + * * @param dictType 字典类型信息 * @return 结果 */ @@ -69,7 +69,7 @@ public interface SysDictTypeMapper /** * 修改字典类型信息 - * + * * @param dictType 字典类型信息 * @return 结果 */ @@ -77,7 +77,7 @@ public interface SysDictTypeMapper /** * 校验字典类型称是否唯一 - * + * * @param dictType 字典类型 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysLogininforMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysLogininforMapper.java index 629866f5..89305f20 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysLogininforMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysLogininforMapper.java @@ -1,25 +1,27 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysLogininfor; +import org.springframework.stereotype.Repository; /** * 系统访问日志情况信息 数据层 - * + * * @author ruoyi */ -public interface SysLogininforMapper -{ +@Repository +public interface SysLogininforMapper { /** * 新增系统登录日志 - * + * * @param logininfor 访问日志对象 */ public void insertLogininfor(SysLogininfor logininfor); /** * 查询系统登录日志集合 - * + * * @param logininfor 访问日志对象 * @return 登录记录集合 */ @@ -27,7 +29,7 @@ public interface SysLogininforMapper /** * 批量删除系统登录日志 - * + * * @param infoIds 需要删除的登录日志ID * @return 结果 */ @@ -35,7 +37,7 @@ public interface SysLogininforMapper /** * 清空系统登录日志 - * + * * @return 结果 */ public int cleanLogininfor(); diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysMenuMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysMenuMapper.java index 1c2e8530..e2d6ef02 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysMenuMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysMenuMapper.java @@ -1,16 +1,18 @@ package com.ruoyi.system.mapper; import java.util.List; + import org.apache.ibatis.annotations.Param; import com.ruoyi.common.core.domain.entity.SysMenu; +import org.springframework.stereotype.Repository; /** * 菜单表 数据层 * * @author ruoyi */ -public interface SysMenuMapper -{ +@Repository +public interface SysMenuMapper { /** * 查询系统菜单列表 * @@ -59,8 +61,8 @@ public interface SysMenuMapper /** * 根据角色ID查询菜单树信息 - * - * @param roleId 角色ID + * + * @param roleId 角色ID * @param menuCheckStrictly 菜单树选择项是否关联显示 * @return 选中菜单列表 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysNoticeMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysNoticeMapper.java index c34f0a27..689ff57c 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysNoticeMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysNoticeMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysNotice; +import org.springframework.stereotype.Repository; /** * 通知公告表 数据层 - * + * * @author ruoyi */ -public interface SysNoticeMapper -{ +@Repository +public interface SysNoticeMapper { /** * 查询公告信息 - * + * * @param noticeId 公告ID * @return 公告信息 */ @@ -20,7 +22,7 @@ public interface SysNoticeMapper /** * 查询公告列表 - * + * * @param notice 公告信息 * @return 公告集合 */ @@ -28,7 +30,7 @@ public interface SysNoticeMapper /** * 新增公告 - * + * * @param notice 公告信息 * @return 结果 */ @@ -36,7 +38,7 @@ public interface SysNoticeMapper /** * 修改公告 - * + * * @param notice 公告信息 * @return 结果 */ @@ -44,7 +46,7 @@ public interface SysNoticeMapper /** * 批量删除公告 - * + * * @param noticeId 公告ID * @return 结果 */ @@ -52,7 +54,7 @@ public interface SysNoticeMapper /** * 批量删除公告信息 - * + * * @param noticeIds 需要删除的公告ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysOperLogMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysOperLogMapper.java index 2ae6457f..90b74661 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysOperLogMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysOperLogMapper.java @@ -1,25 +1,27 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysOperLog; +import org.springframework.stereotype.Repository; /** * 操作日志 数据层 - * + * * @author ruoyi */ -public interface SysOperLogMapper -{ +@Repository +public interface SysOperLogMapper { /** * 新增操作日志 - * + * * @param operLog 操作日志对象 */ public void insertOperlog(SysOperLog operLog); /** * 查询系统操作日志集合 - * + * * @param operLog 操作日志对象 * @return 操作日志集合 */ @@ -27,7 +29,7 @@ public interface SysOperLogMapper /** * 批量删除系统操作日志 - * + * * @param operIds 需要删除的操作日志ID * @return 结果 */ @@ -35,7 +37,7 @@ public interface SysOperLogMapper /** * 查询操作日志详细 - * + * * @param operId 操作ID * @return 操作日志对象 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysPostMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysPostMapper.java index b4287479..5cce981e 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysPostMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysPostMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysPost; +import org.springframework.stereotype.Repository; /** * 岗位信息 数据层 - * + * * @author ruoyi */ -public interface SysPostMapper -{ +@Repository +public interface SysPostMapper { /** * 查询岗位数据集合 - * + * * @param post 岗位信息 * @return 岗位数据集合 */ @@ -20,14 +22,14 @@ public interface SysPostMapper /** * 查询所有岗位 - * + * * @return 岗位列表 */ public List selectPostAll(); /** * 通过岗位ID查询岗位信息 - * + * * @param postId 岗位ID * @return 角色对象信息 */ @@ -35,7 +37,7 @@ public interface SysPostMapper /** * 根据用户ID获取岗位选择框列表 - * + * * @param userId 用户ID * @return 选中岗位ID列表 */ @@ -43,7 +45,7 @@ public interface SysPostMapper /** * 查询用户所属岗位组 - * + * * @param userName 用户名 * @return 结果 */ @@ -51,7 +53,7 @@ public interface SysPostMapper /** * 删除岗位信息 - * + * * @param postId 岗位ID * @return 结果 */ @@ -59,7 +61,7 @@ public interface SysPostMapper /** * 批量删除岗位信息 - * + * * @param postIds 需要删除的岗位ID * @return 结果 */ @@ -67,7 +69,7 @@ public interface SysPostMapper /** * 修改岗位信息 - * + * * @param post 岗位信息 * @return 结果 */ @@ -75,7 +77,7 @@ public interface SysPostMapper /** * 新增岗位信息 - * + * * @param post 岗位信息 * @return 结果 */ @@ -83,7 +85,7 @@ public interface SysPostMapper /** * 校验岗位名称 - * + * * @param postName 岗位名称 * @return 结果 */ @@ -91,7 +93,7 @@ public interface SysPostMapper /** * 校验岗位编码 - * + * * @param postCode 岗位编码 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleDeptMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleDeptMapper.java index f9d3a2f3..a3b8b4a6 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleDeptMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleDeptMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysRoleDept; +import org.springframework.stereotype.Repository; /** * 角色与部门关联表 数据层 - * + * * @author ruoyi */ -public interface SysRoleDeptMapper -{ +@Repository +public interface SysRoleDeptMapper { /** * 通过角色ID删除角色和部门关联 - * + * * @param roleId 角色ID * @return 结果 */ @@ -20,7 +22,7 @@ public interface SysRoleDeptMapper /** * 批量删除角色部门关联信息 - * + * * @param ids 需要删除的数据ID * @return 结果 */ @@ -28,7 +30,7 @@ public interface SysRoleDeptMapper /** * 查询部门使用数量 - * + * * @param deptId 部门ID * @return 结果 */ @@ -36,7 +38,7 @@ public interface SysRoleDeptMapper /** * 批量新增角色部门信息 - * + * * @param roleDeptList 角色部门列表 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMapper.java index 16d55943..cbc2738f 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.common.core.domain.entity.SysRole; +import org.springframework.stereotype.Repository; /** * 角色表 数据层 - * + * * @author ruoyi */ -public interface SysRoleMapper -{ +@Repository +public interface SysRoleMapper { /** * 根据条件分页查询角色数据 - * + * * @param role 角色信息 * @return 角色数据集合信息 */ @@ -20,7 +22,7 @@ public interface SysRoleMapper /** * 根据用户ID查询角色 - * + * * @param userId 用户ID * @return 角色列表 */ @@ -28,14 +30,14 @@ public interface SysRoleMapper /** * 查询所有角色 - * + * * @return 角色列表 */ public List selectRoleAll(); /** * 根据用户ID获取角色选择框列表 - * + * * @param userId 用户ID * @return 选中角色ID列表 */ @@ -43,7 +45,7 @@ public interface SysRoleMapper /** * 通过角色ID查询角色 - * + * * @param roleId 角色ID * @return 角色对象信息 */ @@ -51,7 +53,7 @@ public interface SysRoleMapper /** * 根据用户ID查询角色 - * + * * @param userName 用户名 * @return 角色列表 */ @@ -59,7 +61,7 @@ public interface SysRoleMapper /** * 校验角色名称是否唯一 - * + * * @param roleName 角色名称 * @return 角色信息 */ @@ -67,7 +69,7 @@ public interface SysRoleMapper /** * 校验角色权限是否唯一 - * + * * @param roleKey 角色权限 * @return 角色信息 */ @@ -75,7 +77,7 @@ public interface SysRoleMapper /** * 修改角色信息 - * + * * @param role 角色信息 * @return 结果 */ @@ -83,7 +85,7 @@ public interface SysRoleMapper /** * 新增角色信息 - * + * * @param role 角色信息 * @return 结果 */ @@ -91,7 +93,7 @@ public interface SysRoleMapper /** * 通过角色ID删除角色 - * + * * @param roleId 角色ID * @return 结果 */ @@ -99,7 +101,7 @@ public interface SysRoleMapper /** * 批量删除角色信息 - * + * * @param roleIds 需要删除的角色ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMenuMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMenuMapper.java index 6602bee1..29170f75 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMenuMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysRoleMenuMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysRoleMenu; +import org.springframework.stereotype.Repository; /** * 角色与菜单关联表 数据层 - * + * * @author ruoyi */ -public interface SysRoleMenuMapper -{ +@Repository +public interface SysRoleMenuMapper { /** * 查询菜单使用数量 - * + * * @param menuId 菜单ID * @return 结果 */ @@ -20,7 +22,7 @@ public interface SysRoleMenuMapper /** * 通过角色ID删除角色和菜单关联 - * + * * @param roleId 角色ID * @return 结果 */ @@ -28,7 +30,7 @@ public interface SysRoleMenuMapper /** * 批量删除角色菜单关联信息 - * + * * @param ids 需要删除的数据ID * @return 结果 */ @@ -36,7 +38,7 @@ public interface SysRoleMenuMapper /** * 批量新增角色菜单信息 - * + * * @param roleMenuList 角色菜单列表 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserMapper.java index 39f62bc2..a111936e 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import org.apache.ibatis.annotations.Param; import com.ruoyi.common.core.domain.entity.SysUser; +import org.springframework.stereotype.Repository; /** * 用户表 数据层 - * + * * @author ruoyi */ -public interface SysUserMapper -{ +@Repository +public interface SysUserMapper { /** * 根据条件分页查询用户列表 - * + * * @param sysUser 用户信息 * @return 用户信息集合信息 */ @@ -21,15 +23,17 @@ public interface SysUserMapper /** * 通过用户名查询用户 - * + * * @param userName 用户名 * @return 用户对象信息 */ public SysUser selectUserByUserName(String userName); + public SysUser selectUserByOpenId(String openId); + /** * 通过用户ID查询用户 - * + * * @param userId 用户ID * @return 用户对象信息 */ @@ -37,7 +41,7 @@ public interface SysUserMapper /** * 新增用户信息 - * + * * @param user 用户信息 * @return 结果 */ @@ -45,7 +49,7 @@ public interface SysUserMapper /** * 修改用户信息 - * + * * @param user 用户信息 * @return 结果 */ @@ -53,16 +57,16 @@ public interface SysUserMapper /** * 修改用户头像 - * + * * @param userName 用户名 - * @param avatar 头像地址 + * @param avatar 头像地址 * @return 结果 */ public int updateUserAvatar(@Param("userName") String userName, @Param("avatar") String avatar); /** * 重置用户密码 - * + * * @param userName 用户名 * @param password 密码 * @return 结果 @@ -71,7 +75,7 @@ public interface SysUserMapper /** * 通过用户ID删除用户 - * + * * @param userId 用户ID * @return 结果 */ @@ -79,7 +83,7 @@ public interface SysUserMapper /** * 批量删除用户信息 - * + * * @param userIds 需要删除的用户ID * @return 结果 */ @@ -87,7 +91,7 @@ public interface SysUserMapper /** * 校验用户名称是否唯一 - * + * * @param userName 用户名称 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserPostMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserPostMapper.java index e08991de..58c7808f 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserPostMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserPostMapper.java @@ -1,18 +1,20 @@ package com.ruoyi.system.mapper; import java.util.List; + import com.ruoyi.system.domain.SysUserPost; +import org.springframework.stereotype.Repository; /** * 用户与岗位关联表 数据层 - * + * * @author ruoyi */ -public interface SysUserPostMapper -{ +@Repository +public interface SysUserPostMapper { /** * 通过用户ID删除用户和岗位关联 - * + * * @param userId 用户ID * @return 结果 */ @@ -20,7 +22,7 @@ public interface SysUserPostMapper /** * 通过岗位ID查询岗位使用数量 - * + * * @param postId 岗位ID * @return 结果 */ @@ -28,7 +30,7 @@ public interface SysUserPostMapper /** * 批量删除用户和岗位关联 - * + * * @param ids 需要删除的数据ID * @return 结果 */ @@ -36,7 +38,7 @@ public interface SysUserPostMapper /** * 批量新增用户岗位信息 - * + * * @param userPostList 用户角色列表 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserRoleMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserRoleMapper.java index 3143ec82..528878b6 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserRoleMapper.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/SysUserRoleMapper.java @@ -1,19 +1,21 @@ package com.ruoyi.system.mapper; import java.util.List; + import org.apache.ibatis.annotations.Param; import com.ruoyi.system.domain.SysUserRole; +import org.springframework.stereotype.Repository; /** * 用户与角色关联表 数据层 - * + * * @author ruoyi */ -public interface SysUserRoleMapper -{ +@Repository +public interface SysUserRoleMapper { /** * 通过用户ID删除用户和角色关联 - * + * * @param userId 用户ID * @return 结果 */ @@ -21,7 +23,7 @@ public interface SysUserRoleMapper /** * 批量删除用户和角色关联 - * + * * @param ids 需要删除的数据ID * @return 结果 */ @@ -29,7 +31,7 @@ public interface SysUserRoleMapper /** * 通过角色ID查询角色使用数量 - * + * * @param roleId 角色ID * @return 结果 */ @@ -37,7 +39,7 @@ public interface SysUserRoleMapper /** * 批量新增用户角色信息 - * + * * @param userRoleList 用户角色列表 * @return 结果 */ @@ -45,7 +47,7 @@ public interface SysUserRoleMapper /** * 删除用户和角色关联信息 - * + * * @param userRole 用户和角色关联信息 * @return 结果 */ @@ -53,8 +55,8 @@ public interface SysUserRoleMapper /** * 批量取消授权用户角色 - * - * @param roleId 角色ID + * + * @param roleId 角色ID * @param userIds 需要删除的用户数据ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserAccountInfoMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserAccountInfoMapper.java new file mode 100644 index 00000000..3076be70 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserAccountInfoMapper.java @@ -0,0 +1,63 @@ +package com.ruoyi.system.mapper; + +import java.util.List; + +import com.ruoyi.system.domain.TUserAccountInfo; +import org.springframework.stereotype.Repository; + +/** + * 小程序用户Mapper接口 + * + * @author wxy + * @date 2021-08-26 + */ +@Repository +public interface TUserAccountInfoMapper { + /** + * 查询小程序用户 + * + * @param id 小程序用户ID + * @return 小程序用户 + */ + public TUserAccountInfo selectTUserAccountInfoById(Long id); + + /** + * 查询小程序用户列表 + * + * @param tUserAccountInfo 小程序用户 + * @return 小程序用户集合 + */ + public List selectTUserAccountInfoList(TUserAccountInfo tUserAccountInfo); + + /** + * 新增小程序用户 + * + * @param tUserAccountInfo 小程序用户 + * @return 结果 + */ + public int insertTUserAccountInfo(TUserAccountInfo tUserAccountInfo); + + /** + * 修改小程序用户 + * + * @param tUserAccountInfo 小程序用户 + * @return 结果 + */ + public int updateTUserAccountInfo(TUserAccountInfo tUserAccountInfo); + + /** + * 删除小程序用户 + * + * @param id 小程序用户ID + * @return 结果 + */ + public int deleteTUserAccountInfoById(Long id); + + /** + * 批量删除小程序用户 + * + * @param ids 需要删除的数据ID + * @return 结果 + */ + public int deleteTUserAccountInfoByIds(Long[] ids); +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserLoginLogMapper.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserLoginLogMapper.java new file mode 100644 index 00000000..d293de0a --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mapper/TUserLoginLogMapper.java @@ -0,0 +1,63 @@ +package com.ruoyi.system.mapper; + +import java.util.List; + +import com.ruoyi.system.domain.TUserLoginLog; +import org.springframework.stereotype.Repository; + +/** + * 【请填写功能名称】Mapper接口 + * + * @author wxy + * @date 2021-08-26 + */ +@Repository +public interface TUserLoginLogMapper { + /** + * 查询【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 【请填写功能名称】 + */ + public TUserLoginLog selectTUserLoginLogById(Long id); + + /** + * 查询【请填写功能名称】列表 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 【请填写功能名称】集合 + */ + public List selectTUserLoginLogList(TUserLoginLog tUserLoginLog); + + /** + * 新增【请填写功能名称】 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 结果 + */ + public int insertTUserLoginLog(TUserLoginLog tUserLoginLog); + + /** + * 修改【请填写功能名称】 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 结果 + */ + public int updateTUserLoginLog(TUserLoginLog tUserLoginLog); + + /** + * 删除【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 结果 + */ + public int deleteTUserLoginLogById(Long id); + + /** + * 批量删除【请填写功能名称】 + * + * @param ids 需要删除的数据ID + * @return 结果 + */ + public int deleteTUserLoginLogByIds(Long[] ids); +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttConfig.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttConfig.java index 715ba163..a56873fb 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttConfig.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttConfig.java @@ -55,47 +55,61 @@ public class MqttConfig { private int keepalive; - public String getusername() - { + public String getusername() { return username; } - public void setusername(String username) {this.username = username;} - public String getpassword() - { + public void setusername(String username) { + this.username = username; + } + + public String getpassword() { return password; } - public void setpassword(String password) {this.password = password;} - public String gethostUrl() - { + public void setpassword(String password) { + this.password = password; + } + + public String gethostUrl() { return hostUrl; } - public void sethostUrl(String hostUrl) {this.hostUrl = hostUrl;} - public String getclientId() - { + public void sethostUrl(String hostUrl) { + this.hostUrl = hostUrl; + } + + public String getclientId() { return clientId; } - public void setclientId(String clientId) {this.clientId = clientId;} - public String getdefaultTopic() - { + public void setclientId(String clientId) { + this.clientId = clientId; + } + + public String getdefaultTopic() { return defaultTopic; } - public void setdefaultTopic(String defaultTopic) {this.defaultTopic = defaultTopic;} - public int gettimeout() - { + public void setdefaultTopic(String defaultTopic) { + this.defaultTopic = defaultTopic; + } + + public int gettimeout() { return timeout; } - public void settimeout(int timeout) {this.timeout = timeout;} - public int getkeepalive() - { + public void settimeout(int timeout) { + this.timeout = timeout; + } + + public int getkeepalive() { return keepalive; } - public void setkeepalive(int keepalive) {this.keepalive = keepalive;} + + public void setkeepalive(int keepalive) { + this.keepalive = keepalive; + } @Bean public MqttPushClient getMqttPushClient() { diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttPushClient.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttPushClient.java index 8c998ecb..be6dfc29 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttPushClient.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/MqttPushClient.java @@ -15,6 +15,7 @@ import org.eclipse.paho.client.mqttv3.persist.MemoryPersistence; import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.context.annotation.Primary; import org.springframework.stereotype.Component; /** @@ -22,6 +23,7 @@ import org.springframework.stereotype.Component; * @Description mqtt推送客户端 */ @Component +@Primary public class MqttPushClient { private static final Logger logger = LoggerFactory.getLogger(MqttPushClient.class); @@ -40,6 +42,7 @@ public class MqttPushClient { /** * 客户端连接 + * * @param host ip+端口 * @param clientID 客户端Id * @param username 用户名 @@ -61,6 +64,7 @@ public class MqttPushClient { try { client.setCallback(pushCallback); client.connect(options); + System.out.println("MQTT Server Connected ..."); } catch (Exception e) { e.printStackTrace(); } @@ -71,6 +75,7 @@ public class MqttPushClient { /** * 发布 + * * @param qos 连接方式 * @param retained 是否保留 * @param topic 主题 @@ -101,6 +106,7 @@ public class MqttPushClient { /** * 订阅某个主题 + * * @param topic 主题 * @param qos 连接方式 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/PushCallback.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/PushCallback.java index dfc3693b..e9387559 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/PushCallback.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/mqtt/config/PushCallback.java @@ -11,9 +11,11 @@ package com.ruoyi.system.mqtt.config; import com.alibaba.fastjson.JSON; +import com.alibaba.fastjson.JSONObject; import com.ruoyi.common.core.domain.AjaxResult; import com.ruoyi.common.utils.DateUtils; import com.ruoyi.common.utils.ServletUtils; +import com.ruoyi.common.utils.StringUtils; import com.ruoyi.common.utils.ip.AddressUtils; import com.ruoyi.common.utils.ip.IpUtils; import com.ruoyi.system.domain.IotCategory; @@ -32,6 +34,7 @@ import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Component; + import java.util.Random; /** @@ -72,40 +75,45 @@ public class PushCallback implements MqttCallback { logger.info("接收消息主题 : " + topic); logger.info("接收消息Qos : " + mqttMessage.getQos()); logger.info("接收消息内容 : " + new String(mqttMessage.getPayload())); - - if(topic.equals("device_info")){ + try { + JSONObject jsonObject = JSON.parseObject(new String(mqttMessage.getPayload())); + }catch (Exception e){ + System.err.println("===未知消息格式："+new String(mqttMessage.getPayload())); + return; + } + if (topic.equals("device_info")) { //添加设备信息 IotDevice device = JSON.parseObject(new String(mqttMessage.getPayload()), IotDevice.class); - IotDevice deviceEntity=iotDeviceService.selectIotDeviceByNum(device.getDeviceNum()); - if(deviceEntity!=null){ + IotDevice deviceEntity = iotDeviceService.selectIotDeviceByNum(device.getDeviceNum()); + if (deviceEntity != null) { device.setDeviceId(deviceEntity.getDeviceId()); iotDeviceService.updateIotDevice(device); - }else { - IotCategory categoryEntity=iotCategoryService.selectIotCategoryById(device.getCategoryId()); - if(device.getDeviceName()==null || device.getDeviceNum().length()==0) { + } else { + IotCategory categoryEntity = iotCategoryService.selectIotCategoryById(device.getCategoryId()); + if (device.getDeviceName() == null || device.getDeviceNum().length() == 0) { Random rand = new Random(); //随机生成两位数 - device.setDeviceName(categoryEntity.getCategoryName()+(rand.nextInt(90) + 10)); + device.setDeviceName(categoryEntity.getCategoryName() + (rand.nextInt(90) + 10)); } iotDeviceService.insertIotDevice(device); } //获取设备状态(消息内容不能为空，硬件获取不到数据报错) - mqttPushClient.publish(1,false,"status/get/"+device.getDeviceNum(),"wumei.live"); + mqttPushClient.publish(1, false, "status/get/" + device.getDeviceNum(), "wumei.live"); //获取设备配置 - mqttPushClient.publish(1,false,"setting/get/"+device.getDeviceNum(),"wumei.live"); - }else if(topic.equals("status")){ + mqttPushClient.publish(1, false, "setting/get/" + device.getDeviceNum(), "wumei.live"); + } else if (topic.equals("status")) { IotDeviceStatus deviceStatus = JSON.parseObject(new String(mqttMessage.getPayload()), IotDeviceStatus.class); - IotDevice device=iotDeviceService.selectIotDeviceByNum(deviceStatus.getDeviceNum()); + IotDevice device = iotDeviceService.selectIotDeviceByNum(deviceStatus.getDeviceNum()); //添加设备状态 deviceStatus.setDeviceId(device.getDeviceId()); iotDeviceStatusService.insertIotDeviceStatus(deviceStatus); - }else if(topic.equals("setting")){ + } else if (topic.equals("setting")) { IotDeviceSet deviceSet = JSON.parseObject(new String(mqttMessage.getPayload()), IotDeviceSet.class); // 智能配网时需要获取IP、地址和设备用户 - IotDevice device=iotDeviceService.selectIotDeviceByNum(deviceSet.getDeviceNum()); - if(deviceSet.getIsSmartConfig()==1){ + IotDevice device = iotDeviceService.selectIotDeviceByNum(deviceSet.getDeviceNum()); + if (deviceSet.getIsSmartConfig() == 1) { final String ip = IpUtils.getIpAddr(ServletUtils.getRequest()); deviceSet.setNetworkIp(ip); - deviceSet.setNetworkAddress( AddressUtils.getRealAddressByIP(ip)); + deviceSet.setNetworkAddress(AddressUtils.getRealAddressByIP(ip)); //更新设备用户 device.setOwnerId(deviceSet.getOwnerId()); iotDeviceService.updateIotDevice(device); @@ -113,12 +121,12 @@ public class PushCallback implements MqttCallback { //添加设备配置 deviceSet.setDeviceId(device.getDeviceId()); iotDeviceSetService.insertIotDeviceSet(deviceSet); - }else if(topic.equals("offline")){ + } else if (topic.equals("offline")) { //离线遗嘱 IotDeviceStatus deviceStatus = JSON.parseObject(new String(mqttMessage.getPayload()), IotDeviceStatus.class); - IotDeviceStatus deviceStatusEntity=iotDeviceStatusService.selectIotDeviceStatusByDeviceNum(deviceStatus.getDeviceNum()); + IotDeviceStatus deviceStatusEntity = iotDeviceStatusService.selectIotDeviceStatusByDeviceNum(deviceStatus.getDeviceNum()); //设备状态为离线 - if(deviceStatusEntity!=null) { + if (deviceStatusEntity != null) { deviceStatusEntity.setIsOnline(0); iotDeviceStatusService.insertIotDeviceStatus(deviceStatusEntity); } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotCategoryService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotCategoryService.java index e05ce15a..344041ec 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotCategoryService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotCategoryService.java @@ -1,19 +1,19 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.IotCategory; /** * 设备分类Service接口 - * + * * @author kerwincui * @date 2021-05-07 */ -public interface IIotCategoryService -{ +public interface IIotCategoryService { /** * 查询设备分类 - * + * * @param categoryId 设备分类ID * @return 设备分类 */ @@ -21,7 +21,7 @@ public interface IIotCategoryService /** * 查询设备分类列表 - * + * * @param iotCategory 设备分类 * @return 设备分类集合 */ @@ -29,7 +29,7 @@ public interface IIotCategoryService /** * 新增设备分类 - * + * * @param iotCategory 设备分类 * @return 结果 */ @@ -37,7 +37,7 @@ public interface IIotCategoryService /** * 修改设备分类 - * + * * @param iotCategory 设备分类 * @return 结果 */ @@ -45,7 +45,7 @@ public interface IIotCategoryService /** * 批量删除设备分类 - * + * * @param categoryIds 需要删除的设备分类ID * @return 结果 */ @@ -53,7 +53,7 @@ public interface IIotCategoryService /** * 删除设备分类信息 - * + * * @param categoryId 设备分类ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceService.java index a6ee191a..7aa0a4e9 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceService.java @@ -1,20 +1,22 @@ package com.ruoyi.system.service; import java.util.List; + +import com.alibaba.fastjson.JSONObject; import com.ruoyi.system.domain.IotDevice; import com.ruoyi.system.domain.vo.IotDeviceListDto; +import org.springframework.transaction.annotation.Transactional; /** * 设备Service接口 - * + * * @author kerwincui * @date 2021-05-06 */ -public interface IIotDeviceService -{ +public interface IIotDeviceService { /** * 查询设备 - * + * * @param deviceId 设备ID * @return 设备 */ @@ -27,7 +29,7 @@ public interface IIotDeviceService /** * 查询设备列表 - * + * * @param iotDevice 设备 * @return 设备集合 */ @@ -35,7 +37,7 @@ public interface IIotDeviceService /** * 新增设备 - * + * * @param iotDevice 设备 * @return 结果 */ @@ -43,7 +45,7 @@ public interface IIotDeviceService /** * 修改设备 - * + * * @param iotDevice 设备 * @return 结果 */ @@ -51,7 +53,7 @@ public interface IIotDeviceService /** * 批量删除设备 - * + * * @param deviceIds 需要删除的设备ID * @return 结果 */ @@ -59,9 +61,27 @@ public interface IIotDeviceService /** * 删除设备信息 - * + * * @param deviceId 设备ID * @return 结果 */ public int deleteIotDeviceById(Long deviceId); + + int controlDeviceByNum(String deviceNum, String cmd); + + int bindDevice(Long userId,String nickname,String deviceNum,String name,Long categoryId,String remark); + + List selectMpIotDeviceList(IotDevice iotDevice); + + @Transactional + int updateDeviceInfo(Long userId, String nickName, Long deviceId, String name, String remark); + + IotDevice selectIotDeviceByUserAndNum(Long userId, String deviceNum); + + int unBindDevice(Long userId,String username,Long deviceId); + + JSONObject getDeviceInfoByDeviceNum(Long userId,String nickName,String deviceNum); + + JSONObject getDeviceInfoByDeviceId(Long userId, String username, Long deviceId); } + diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceSetService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceSetService.java index 885ada12..4f2c8bef 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceSetService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceSetService.java @@ -1,19 +1,19 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.IotDeviceSet; /** * 设备配置Service接口 - * + * * @author kerwincui * @date 2021-05-06 */ -public interface IIotDeviceSetService -{ +public interface IIotDeviceSetService { /** * 查询设备配置 - * + * * @param deviceConfigId 设备配置ID * @return 设备配置 */ @@ -29,7 +29,7 @@ public interface IIotDeviceSetService /** * 查询设备配置列表 - * + * * @param iotDeviceSet 设备配置 * @return 设备配置集合 */ @@ -37,7 +37,7 @@ public interface IIotDeviceSetService /** * 新增设备配置 - * + * * @param iotDeviceSet 设备配置 * @return 结果 */ @@ -45,7 +45,7 @@ public interface IIotDeviceSetService /** * 修改设备配置 - * + * * @param iotDeviceSet 设备配置 * @return 结果 */ @@ -53,7 +53,7 @@ public interface IIotDeviceSetService /** * 批量删除设备配置 - * + * * @param deviceConfigIds 需要删除的设备配置ID * @return 结果 */ @@ -61,7 +61,7 @@ public interface IIotDeviceSetService /** * 删除设备配置信息 - * + * * @param deviceConfigId 设备配置ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceStatusService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceStatusService.java index 70169e8e..f19213a7 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceStatusService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceStatusService.java @@ -1,19 +1,19 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.IotDeviceStatus; /** * 设备状态Service接口 - * + * * @author kerwincui * @date 2021-05-06 */ -public interface IIotDeviceStatusService -{ +public interface IIotDeviceStatusService { /** * 查询设备状态 - * + * * @param deviceStatusId 设备状态ID * @return 设备状态 */ @@ -37,7 +37,7 @@ public interface IIotDeviceStatusService /** * 查询设备状态列表 - * + * * @param iotDeviceStatus 设备状态 * @return 设备状态集合 */ @@ -45,7 +45,7 @@ public interface IIotDeviceStatusService /** * 新增设备状态 - * + * * @param iotDeviceStatus 设备状态 * @return 结果 */ @@ -53,7 +53,7 @@ public interface IIotDeviceStatusService /** * 修改设备状态 - * + * * @param iotDeviceStatus 设备状态 * @return 结果 */ @@ -61,7 +61,7 @@ public interface IIotDeviceStatusService /** * 批量删除设备状态 - * + * * @param deviceStatusIds 需要删除的设备状态ID * @return 结果 */ @@ -69,7 +69,7 @@ public interface IIotDeviceStatusService /** * 删除设备状态信息 - * + * * @param deviceStatusId 设备状态ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceUserRelationService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceUserRelationService.java new file mode 100644 index 00000000..1bda7cf2 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotDeviceUserRelationService.java @@ -0,0 +1,68 @@ +package com.ruoyi.system.service; + +import java.util.List; + +import com.ruoyi.system.domain.IotDeviceUserRelation; + +/** + * 【请填写功能名称】Service接口 + * + * @author wxy + * @date 2021-08-27 + */ +public interface IIotDeviceUserRelationService { + /** + * 查询【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 【请填写功能名称】 + */ + public IotDeviceUserRelation selectIotDeviceUserRelationById(Long id); + + /** + * 查询【请填写功能名称】列表 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 【请填写功能名称】集合 + */ + public List selectIotDeviceUserRelationList(IotDeviceUserRelation iotDeviceUserRelation); + + /** + * 新增【请填写功能名称】 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 结果 + */ + public int insertIotDeviceUserRelation(IotDeviceUserRelation iotDeviceUserRelation); + + /** + * 修改【请填写功能名称】 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 结果 + */ + public int updateIotDeviceUserRelation(IotDeviceUserRelation iotDeviceUserRelation); + + /** + * 批量删除【请填写功能名称】 + * + * @param ids 需要删除的【请填写功能名称】ID + * @return 结果 + */ + public int deleteIotDeviceUserRelationByIds(Long[] ids); + + /** + * 删除【请填写功能名称】信息 + * + * @param id 【请填写功能名称】ID + * @return 结果 + */ + public int deleteIotDeviceUserRelationById(Long id); + + List selectIotDeviceUserRelationByDeviceId(Long deviceId); + + List selectIotDeviceUserRelationByUserId(Long userId); + + IotDeviceUserRelation selectIotDeviceUserRelationByDeviceIdAndUserId(Long deviceId,Long userId); + +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotGroupService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotGroupService.java index 6705b446..bb9ae4f8 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotGroupService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/IIotGroupService.java @@ -1,19 +1,19 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.IotGroup; /** * 分组Service接口 - * + * * @author kerwincui * @date 2021-05-18 */ -public interface IIotGroupService -{ +public interface IIotGroupService { /** * 查询分组 - * + * * @param groupId 分组ID * @return 分组 */ @@ -21,7 +21,7 @@ public interface IIotGroupService /** * 查询分组列表 - * + * * @param iotGroup 分组 * @return 分组集合 */ @@ -29,7 +29,7 @@ public interface IIotGroupService /** * 新增分组 - * + * * @param iotGroup 分组 * @return 结果 */ @@ -37,7 +37,7 @@ public interface IIotGroupService /** * 修改分组 - * + * * @param iotGroup 分组 * @return 结果 */ @@ -45,7 +45,7 @@ public interface IIotGroupService /** * 批量删除分组 - * + * * @param groupIds 需要删除的分组ID * @return 结果 */ @@ -53,7 +53,7 @@ public interface IIotGroupService /** * 删除分组信息 - * + * * @param groupId 分组ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysConfigService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysConfigService.java index 9bca585b..0f7d9ed5 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysConfigService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysConfigService.java @@ -1,18 +1,18 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.SysConfig; /** * 参数配置 服务层 - * + * * @author ruoyi */ -public interface ISysConfigService -{ +public interface ISysConfigService { /** * 查询参数配置信息 - * + * * @param configId 参数配置ID * @return 参数配置信息 */ @@ -20,7 +20,7 @@ public interface ISysConfigService /** * 根据键名查询参数配置信息 - * + * * @param configKey 参数键名 * @return 参数键值 */ @@ -28,7 +28,7 @@ public interface ISysConfigService /** * 查询参数配置列表 - * + * * @param config 参数配置信息 * @return 参数配置集合 */ @@ -36,7 +36,7 @@ public interface ISysConfigService /** * 新增参数配置 - * + * * @param config 参数配置信息 * @return 结果 */ @@ -44,7 +44,7 @@ public interface ISysConfigService /** * 修改参数配置 - * + * * @param config 参数配置信息 * @return 结果 */ @@ -52,7 +52,7 @@ public interface ISysConfigService /** * 批量删除参数信息 - * + * * @param configIds 需要删除的参数ID * @return 结果 */ @@ -65,7 +65,7 @@ public interface ISysConfigService /** * 校验参数键名是否唯一 - * + * * @param config 参数信息 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDeptService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDeptService.java index bf8ab3e8..44a7e107 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDeptService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDeptService.java @@ -1,19 +1,19 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.common.core.domain.TreeSelect; import com.ruoyi.common.core.domain.entity.SysDept; /** * 部门管理 服务层 - * + * * @author ruoyi */ -public interface ISysDeptService -{ +public interface ISysDeptService { /** * 查询部门管理数据 - * + * * @param dept 部门信息 * @return 部门信息集合 */ @@ -21,7 +21,7 @@ public interface ISysDeptService /** * 构建前端所需要树结构 - * + * * @param depts 部门列表 * @return 树结构列表 */ @@ -29,7 +29,7 @@ public interface ISysDeptService /** * 构建前端所需要下拉树结构 - * + * * @param depts 部门列表 * @return 下拉树结构列表 */ @@ -37,7 +37,7 @@ public interface ISysDeptService /** * 根据角色ID查询部门树信息 - * + * * @param roleId 角色ID * @return 选中部门列表 */ @@ -45,7 +45,7 @@ public interface ISysDeptService /** * 根据部门ID查询信息 - * + * * @param deptId 部门ID * @return 部门信息 */ @@ -53,7 +53,7 @@ public interface ISysDeptService /** * 根据ID查询所有子部门（正常状态） - * + * * @param deptId 部门ID * @return 子部门数 */ @@ -61,7 +61,7 @@ public interface ISysDeptService /** * 是否存在部门子节点 - * + * * @param deptId 部门ID * @return 结果 */ @@ -69,7 +69,7 @@ public interface ISysDeptService /** * 查询部门是否存在用户 - * + * * @param deptId 部门ID * @return 结果 true 存在 false 不存在 */ @@ -77,7 +77,7 @@ public interface ISysDeptService /** * 校验部门名称是否唯一 - * + * * @param dept 部门信息 * @return 结果 */ @@ -85,7 +85,7 @@ public interface ISysDeptService /** * 新增保存部门信息 - * + * * @param dept 部门信息 * @return 结果 */ @@ -93,7 +93,7 @@ public interface ISysDeptService /** * 修改保存部门信息 - * + * * @param dept 部门信息 * @return 结果 */ @@ -101,7 +101,7 @@ public interface ISysDeptService /** * 删除部门管理信息 - * + * * @param deptId 部门ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictDataService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictDataService.java index 6cebd695..849417ff 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictDataService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictDataService.java @@ -1,18 +1,18 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.common.core.domain.entity.SysDictData; /** * 字典 业务层 - * + * * @author ruoyi */ -public interface ISysDictDataService -{ +public interface ISysDictDataService { /** * 根据条件分页查询字典数据 - * + * * @param dictData 字典数据信息 * @return 字典数据集合信息 */ @@ -20,8 +20,8 @@ public interface ISysDictDataService /** * 根据字典类型和字典键值查询字典数据信息 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictValue 字典键值 * @return 字典标签 */ @@ -29,7 +29,7 @@ public interface ISysDictDataService /** * 根据字典数据ID查询信息 - * + * * @param dictCode 字典数据ID * @return 字典数据 */ @@ -37,7 +37,7 @@ public interface ISysDictDataService /** * 批量删除字典数据信息 - * + * * @param dictCodes 需要删除的字典数据ID * @return 结果 */ @@ -45,7 +45,7 @@ public interface ISysDictDataService /** * 新增保存字典数据信息 - * + * * @param dictData 字典数据信息 * @return 结果 */ @@ -53,7 +53,7 @@ public interface ISysDictDataService /** * 修改保存字典数据信息 - * + * * @param dictData 字典数据信息 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictTypeService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictTypeService.java index 310809e5..aaa899e6 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictTypeService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysDictTypeService.java @@ -1,19 +1,19 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.common.core.domain.entity.SysDictData; import com.ruoyi.common.core.domain.entity.SysDictType; /** * 字典 业务层 - * + * * @author ruoyi */ -public interface ISysDictTypeService -{ +public interface ISysDictTypeService { /** * 根据条件分页查询字典类型 - * + * * @param dictType 字典类型信息 * @return 字典类型集合信息 */ @@ -21,14 +21,14 @@ public interface ISysDictTypeService /** * 根据所有字典类型 - * + * * @return 字典类型集合信息 */ public List selectDictTypeAll(); /** * 根据字典类型查询字典数据 - * + * * @param dictType 字典类型 * @return 字典数据集合信息 */ @@ -36,7 +36,7 @@ public interface ISysDictTypeService /** * 根据字典类型ID查询信息 - * + * * @param dictId 字典类型ID * @return 字典类型 */ @@ -44,7 +44,7 @@ public interface ISysDictTypeService /** * 根据字典类型查询信息 - * + * * @param dictType 字典类型 * @return 字典类型 */ @@ -52,7 +52,7 @@ public interface ISysDictTypeService /** * 批量删除字典信息 - * + * * @param dictIds 需要删除的字典ID * @return 结果 */ @@ -65,7 +65,7 @@ public interface ISysDictTypeService /** * 新增保存字典类型信息 - * + * * @param dictType 字典类型信息 * @return 结果 */ @@ -73,7 +73,7 @@ public interface ISysDictTypeService /** * 修改保存字典类型信息 - * + * * @param dictType 字典类型信息 * @return 结果 */ @@ -81,7 +81,7 @@ public interface ISysDictTypeService /** * 校验字典类型称是否唯一 - * + * * @param dictType 字典类型 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysLogininforService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysLogininforService.java index 96c4d547..d36e2739 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysLogininforService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysLogininforService.java @@ -1,25 +1,25 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.SysLogininfor; /** * 系统访问日志情况信息 服务层 - * + * * @author ruoyi */ -public interface ISysLogininforService -{ +public interface ISysLogininforService { /** * 新增系统登录日志 - * + * * @param logininfor 访问日志对象 */ public void insertLogininfor(SysLogininfor logininfor); /** * 查询系统登录日志集合 - * + * * @param logininfor 访问日志对象 * @return 登录记录集合 */ @@ -27,7 +27,7 @@ public interface ISysLogininforService /** * 批量删除系统登录日志 - * + * * @param infoIds 需要删除的登录日志ID * @return */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysMenuService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysMenuService.java index f64bee11..6405c0dc 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysMenuService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysMenuService.java @@ -2,20 +2,20 @@ package com.ruoyi.system.service; import java.util.List; import java.util.Set; + import com.ruoyi.common.core.domain.TreeSelect; import com.ruoyi.common.core.domain.entity.SysMenu; import com.ruoyi.system.domain.vo.RouterVo; /** * 菜单 业务层 - * + * * @author ruoyi */ -public interface ISysMenuService -{ +public interface ISysMenuService { /** * 根据用户查询系统菜单列表 - * + * * @param userId 用户ID * @return 菜单列表 */ @@ -23,8 +23,8 @@ public interface ISysMenuService /** * 根据用户查询系统菜单列表 - * - * @param menu 菜单信息 + * + * @param menu 菜单信息 * @param userId 用户ID * @return 菜单列表 */ @@ -32,7 +32,7 @@ public interface ISysMenuService /** * 根据用户ID查询权限 - * + * * @param userId 用户ID * @return 权限列表 */ @@ -40,7 +40,7 @@ public interface ISysMenuService /** * 根据用户ID查询菜单树信息 - * + * * @param userId 用户ID * @return 菜单列表 */ @@ -48,7 +48,7 @@ public interface ISysMenuService /** * 根据角色ID查询菜单树信息 - * + * * @param roleId 角色ID * @return 选中菜单列表 */ @@ -56,7 +56,7 @@ public interface ISysMenuService /** * 构建前端路由所需要的菜单 - * + * * @param menus 菜单列表 * @return 路由列表 */ @@ -64,7 +64,7 @@ public interface ISysMenuService /** * 构建前端所需要树结构 - * + * * @param menus 菜单列表 * @return 树结构列表 */ @@ -72,7 +72,7 @@ public interface ISysMenuService /** * 构建前端所需要下拉树结构 - * + * * @param menus 菜单列表 * @return 下拉树结构列表 */ @@ -80,7 +80,7 @@ public interface ISysMenuService /** * 根据菜单ID查询信息 - * + * * @param menuId 菜单ID * @return 菜单信息 */ @@ -88,7 +88,7 @@ public interface ISysMenuService /** * 是否存在菜单子节点 - * + * * @param menuId 菜单ID * @return 结果 true 存在 false 不存在 */ @@ -96,7 +96,7 @@ public interface ISysMenuService /** * 查询菜单是否存在角色 - * + * * @param menuId 菜单ID * @return 结果 true 存在 false 不存在 */ @@ -104,7 +104,7 @@ public interface ISysMenuService /** * 新增保存菜单信息 - * + * * @param menu 菜单信息 * @return 结果 */ @@ -112,7 +112,7 @@ public interface ISysMenuService /** * 修改保存菜单信息 - * + * * @param menu 菜单信息 * @return 结果 */ @@ -120,7 +120,7 @@ public interface ISysMenuService /** * 删除菜单管理信息 - * + * * @param menuId 菜单ID * @return 结果 */ @@ -128,7 +128,7 @@ public interface ISysMenuService /** * 校验菜单名称是否唯一 - * + * * @param menu 菜单信息 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysNoticeService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysNoticeService.java index 47ce1b71..6ae35629 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysNoticeService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysNoticeService.java @@ -1,18 +1,18 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.SysNotice; /** * 公告 服务层 - * + * * @author ruoyi */ -public interface ISysNoticeService -{ +public interface ISysNoticeService { /** * 查询公告信息 - * + * * @param noticeId 公告ID * @return 公告信息 */ @@ -20,7 +20,7 @@ public interface ISysNoticeService /** * 查询公告列表 - * + * * @param notice 公告信息 * @return 公告集合 */ @@ -28,7 +28,7 @@ public interface ISysNoticeService /** * 新增公告 - * + * * @param notice 公告信息 * @return 结果 */ @@ -36,7 +36,7 @@ public interface ISysNoticeService /** * 修改公告 - * + * * @param notice 公告信息 * @return 结果 */ @@ -44,15 +44,15 @@ public interface ISysNoticeService /** * 删除公告信息 - * + * * @param noticeId 公告ID * @return 结果 */ public int deleteNoticeById(Long noticeId); - + /** * 批量删除公告信息 - * + * * @param noticeIds 需要删除的公告ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysOperLogService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysOperLogService.java index 4fd8e5a8..f9b55283 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysOperLogService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysOperLogService.java @@ -1,25 +1,25 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.SysOperLog; /** * 操作日志 服务层 - * + * * @author ruoyi */ -public interface ISysOperLogService -{ +public interface ISysOperLogService { /** * 新增操作日志 - * + * * @param operLog 操作日志对象 */ public void insertOperlog(SysOperLog operLog); /** * 查询系统操作日志集合 - * + * * @param operLog 操作日志对象 * @return 操作日志集合 */ @@ -27,7 +27,7 @@ public interface ISysOperLogService /** * 批量删除系统操作日志 - * + * * @param operIds 需要删除的操作日志ID * @return 结果 */ @@ -35,7 +35,7 @@ public interface ISysOperLogService /** * 查询操作日志详细 - * + * * @param operId 操作ID * @return 操作日志对象 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysPostService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysPostService.java index aab216d8..e251d503 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysPostService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysPostService.java @@ -1,18 +1,18 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.system.domain.SysPost; /** * 岗位信息 服务层 - * + * * @author ruoyi */ -public interface ISysPostService -{ +public interface ISysPostService { /** * 查询岗位信息集合 - * + * * @param post 岗位信息 * @return 岗位列表 */ @@ -20,14 +20,14 @@ public interface ISysPostService /** * 查询所有岗位 - * + * * @return 岗位列表 */ public List selectPostAll(); /** * 通过岗位ID查询岗位信息 - * + * * @param postId 岗位ID * @return 角色对象信息 */ @@ -35,7 +35,7 @@ public interface ISysPostService /** * 根据用户ID获取岗位选择框列表 - * + * * @param userId 用户ID * @return 选中岗位ID列表 */ @@ -43,7 +43,7 @@ public interface ISysPostService /** * 校验岗位名称 - * + * * @param post 岗位信息 * @return 结果 */ @@ -51,7 +51,7 @@ public interface ISysPostService /** * 校验岗位编码 - * + * * @param post 岗位信息 * @return 结果 */ @@ -59,7 +59,7 @@ public interface ISysPostService /** * 通过岗位ID查询岗位使用数量 - * + * * @param postId 岗位ID * @return 结果 */ @@ -67,7 +67,7 @@ public interface ISysPostService /** * 删除岗位信息 - * + * * @param postId 岗位ID * @return 结果 */ @@ -75,7 +75,7 @@ public interface ISysPostService /** * 批量删除岗位信息 - * + * * @param postIds 需要删除的岗位ID * @return 结果 * @throws Exception 异常 @@ -84,7 +84,7 @@ public interface ISysPostService /** * 新增保存岗位信息 - * + * * @param post 岗位信息 * @return 结果 */ @@ -92,7 +92,7 @@ public interface ISysPostService /** * 修改保存岗位信息 - * + * * @param post 岗位信息 * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysRoleService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysRoleService.java index 070a5cee..2cb3871c 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysRoleService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysRoleService.java @@ -2,18 +2,18 @@ package com.ruoyi.system.service; import java.util.List; import java.util.Set; + import com.ruoyi.common.core.domain.entity.SysRole; /** * 角色业务层 - * + * * @author ruoyi */ -public interface ISysRoleService -{ +public interface ISysRoleService { /** * 根据条件分页查询角色数据 - * + * * @param role 角色信息 * @return 角色数据集合信息 */ @@ -21,7 +21,7 @@ public interface ISysRoleService /** * 根据用户ID查询角色 - * + * * @param userId 用户ID * @return 权限列表 */ @@ -29,14 +29,14 @@ public interface ISysRoleService /** * 查询所有角色 - * + * * @return 角色列表 */ public List selectRoleAll(); /** * 根据用户ID获取角色选择框列表 - * + * * @param userId 用户ID * @return 选中角色ID列表 */ @@ -44,7 +44,7 @@ public interface ISysRoleService /** * 通过角色ID查询角色 - * + * * @param roleId 角色ID * @return 角色对象信息 */ @@ -52,7 +52,7 @@ public interface ISysRoleService /** * 校验角色名称是否唯一 - * + * * @param role 角色信息 * @return 结果 */ @@ -60,7 +60,7 @@ public interface ISysRoleService /** * 校验角色权限是否唯一 - * + * * @param role 角色信息 * @return 结果 */ @@ -68,14 +68,14 @@ public interface ISysRoleService /** * 校验角色是否允许操作 - * + * * @param role 角色信息 */ public void checkRoleAllowed(SysRole role); /** * 通过角色ID查询角色使用数量 - * + * * @param roleId 角色ID * @return 结果 */ @@ -83,7 +83,7 @@ public interface ISysRoleService /** * 新增保存角色信息 - * + * * @param role 角色信息 * @return 结果 */ @@ -91,7 +91,7 @@ public interface ISysRoleService /** * 修改保存角色信息 - * + * * @param role 角色信息 * @return 结果 */ @@ -99,7 +99,7 @@ public interface ISysRoleService /** * 修改角色状态 - * + * * @param role 角色信息 * @return 结果 */ @@ -107,7 +107,7 @@ public interface ISysRoleService /** * 修改数据权限信息 - * + * * @param role 角色信息 * @return 结果 */ @@ -115,7 +115,7 @@ public interface ISysRoleService /** * 通过角色ID删除角色 - * + * * @param roleId 角色ID * @return 结果 */ @@ -123,7 +123,7 @@ public interface ISysRoleService /** * 批量删除角色信息 - * + * * @param roleIds 需要删除的角色ID * @return 结果 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserOnlineService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserOnlineService.java index 8eb5448c..4e006497 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserOnlineService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserOnlineService.java @@ -5,42 +5,41 @@ import com.ruoyi.system.domain.SysUserOnline; /** * 在线用户 服务层 - * + * * @author ruoyi */ -public interface ISysUserOnlineService -{ +public interface ISysUserOnlineService { /** * 通过登录地址查询信息 - * + * * @param ipaddr 登录地址 - * @param user 用户信息 + * @param user 用户信息 * @return 在线用户信息 */ public SysUserOnline selectOnlineByIpaddr(String ipaddr, LoginUser user); /** * 通过用户名称查询信息 - * + * * @param userName 用户名称 - * @param user 用户信息 + * @param user 用户信息 * @return 在线用户信息 */ public SysUserOnline selectOnlineByUserName(String userName, LoginUser user); /** * 通过登录地址/用户名称查询信息 - * - * @param ipaddr 登录地址 + * + * @param ipaddr 登录地址 * @param userName 用户名称 - * @param user 用户信息 + * @param user 用户信息 * @return 在线用户信息 */ public SysUserOnline selectOnlineByInfo(String ipaddr, String userName, LoginUser user); /** * 设置在线用户信息 - * + * * @param user 用户信息 * @return 在线用户 */ diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserService.java index ea0333b5..c3643f56 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserService.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ISysUserService.java @@ -1,18 +1,18 @@ package com.ruoyi.system.service; import java.util.List; + import com.ruoyi.common.core.domain.entity.SysUser; /** * 用户 业务层 - * + * * @author ruoyi */ -public interface ISysUserService -{ +public interface ISysUserService { /** * 根据条件分页查询用户列表 - * + * * @param user 用户信息 * @return 用户信息集合信息 */ @@ -20,15 +20,17 @@ public interface ISysUserService /** * 通过用户名查询用户 - * + * * @param userName 用户名 * @return 用户对象信息 */ public SysUser selectUserByUserName(String userName); + public SysUser selectUserByOpenId(String openId); + /** * 通过用户ID查询用户 - * + * * @param userId 用户ID * @return 用户对象信息 */ @@ -36,7 +38,7 @@ public interface ISysUserService /** * 根据用户ID查询用户所属角色组 - * + * * @param userName 用户名 * @return 结果 */ @@ -44,7 +46,7 @@ public interface ISysUserService /** * 根据用户ID查询用户所属岗位组 - * + * * @param userName 用户名 * @return 结果 */ @@ -52,7 +54,7 @@ public interface ISysUserService /** * 校验用户名称是否唯一 - * + * * @param userName 用户名称 * @return 结果 */ @@ -76,14 +78,14 @@ public interface ISysUserService /** * 校验用户是否允许操作 - * + * * @param user 用户信息 */ public void checkUserAllowed(SysUser user); /** * 新增用户信息 - * + * * @param user 用户信息 * @return 结果 */ @@ -91,7 +93,7 @@ public interface ISysUserService /** * 修改用户信息 - * + * * @param user 用户信息 * @return 结果 */ @@ -99,7 +101,7 @@ public interface ISysUserService /** * 修改用户状态 - * + * * @param user 用户信息 * @return 结果 */ @@ -107,7 +109,7 @@ public interface ISysUserService /** * 修改用户基本信息 - * + * * @param user 用户信息 * @return 结果 */ @@ -115,16 +117,16 @@ public interface ISysUserService /** * 修改用户头像 - * + * * @param userName 用户名 - * @param avatar 头像地址 + * @param avatar 头像地址 * @return 结果 */ public boolean updateUserAvatar(String userName, String avatar); /** * 重置用户密码 - * + * * @param user 用户信息 * @return 结果 */ @@ -132,7 +134,7 @@ public interface ISysUserService /** * 重置用户密码 - * + * * @param userName 用户名 * @param password 密码 * @return 结果 @@ -141,7 +143,7 @@ public interface ISysUserService /** * 通过用户ID删除用户 - * + * * @param userId 用户ID * @return 结果 */ @@ -149,7 +151,7 @@ public interface ISysUserService /** * 批量删除用户信息 - * + * * @param userIds 需要删除的用户ID * @return 结果 */ @@ -157,10 +159,10 @@ public interface ISysUserService /** * 导入用户数据 - * - * @param userList 用户数据列表 + * + * @param userList 用户数据列表 * @param isUpdateSupport 是否更新支持，如果已存在，则进行更新数据 - * @param operName 操作用户 + * @param operName 操作用户 * @return 结果 */ public String importUser(List userList, Boolean isUpdateSupport, String operName); diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserAccountInfoService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserAccountInfoService.java new file mode 100644 index 00000000..d63efa1b --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserAccountInfoService.java @@ -0,0 +1,61 @@ +package com.ruoyi.system.service; + +import java.util.List; + +import com.ruoyi.system.domain.TUserAccountInfo; + +/** + * 小程序用户Service接口 + * + * @author wxy + * @date 2021-08-26 + */ +public interface ITUserAccountInfoService { + /** + * 查询小程序用户 + * + * @param id 小程序用户ID + * @return 小程序用户 + */ + public TUserAccountInfo selectTUserAccountInfoById(Long id); + + /** + * 查询小程序用户列表 + * + * @param tUserAccountInfo 小程序用户 + * @return 小程序用户集合 + */ + public List selectTUserAccountInfoList(TUserAccountInfo tUserAccountInfo); + + /** + * 新增小程序用户 + * + * @param tUserAccountInfo 小程序用户 + * @return 结果 + */ + public int insertTUserAccountInfo(TUserAccountInfo tUserAccountInfo); + + /** + * 修改小程序用户 + * + * @param tUserAccountInfo 小程序用户 + * @return 结果 + */ + public int updateTUserAccountInfo(TUserAccountInfo tUserAccountInfo); + + /** + * 批量删除小程序用户 + * + * @param ids 需要删除的小程序用户ID + * @return 结果 + */ + public int deleteTUserAccountInfoByIds(Long[] ids); + + /** + * 删除小程序用户信息 + * + * @param id 小程序用户ID + * @return 结果 + */ + public int deleteTUserAccountInfoById(Long id); +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserLoginLogService.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserLoginLogService.java new file mode 100644 index 00000000..8030a1ec --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/ITUserLoginLogService.java @@ -0,0 +1,61 @@ +package com.ruoyi.system.service; + +import java.util.List; + +import com.ruoyi.system.domain.TUserLoginLog; + +/** + * 【请填写功能名称】Service接口 + * + * @author wxy + * @date 2021-08-26 + */ +public interface ITUserLoginLogService { + /** + * 查询【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 【请填写功能名称】 + */ + public TUserLoginLog selectTUserLoginLogById(Long id); + + /** + * 查询【请填写功能名称】列表 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 【请填写功能名称】集合 + */ + public List selectTUserLoginLogList(TUserLoginLog tUserLoginLog); + + /** + * 新增【请填写功能名称】 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 结果 + */ + public int insertTUserLoginLog(TUserLoginLog tUserLoginLog); + + /** + * 修改【请填写功能名称】 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 结果 + */ + public int updateTUserLoginLog(TUserLoginLog tUserLoginLog); + + /** + * 批量删除【请填写功能名称】 + * + * @param ids 需要删除的【请填写功能名称】ID + * @return 结果 + */ + public int deleteTUserLoginLogByIds(Long[] ids); + + /** + * 删除【请填写功能名称】信息 + * + * @param id 【请填写功能名称】ID + * @return 结果 + */ + public int deleteTUserLoginLogById(Long id); +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotCategoryServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotCategoryServiceImpl.java index abc3f490..eb023664 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotCategoryServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotCategoryServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import com.ruoyi.common.utils.DateUtils; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; @@ -10,87 +11,80 @@ import com.ruoyi.system.service.IIotCategoryService; /** * 设备分类Service业务层处理 - * + * * @author kerwincui * @date 2021-05-07 */ @Service -public class IotCategoryServiceImpl implements IIotCategoryService -{ +public class IotCategoryServiceImpl implements IIotCategoryService { @Autowired private IotCategoryMapper iotCategoryMapper; /** * 查询设备分类 - * + * * @param categoryId 设备分类ID * @return 设备分类 */ @Override - public IotCategory selectIotCategoryById(Long categoryId) - { + public IotCategory selectIotCategoryById(Long categoryId) { return iotCategoryMapper.selectIotCategoryById(categoryId); } /** * 查询设备分类列表 - * + * * @param iotCategory 设备分类 * @return 设备分类 */ @Override - public List selectIotCategoryList(IotCategory iotCategory) - { + public List selectIotCategoryList(IotCategory iotCategory) { return iotCategoryMapper.selectIotCategoryList(iotCategory); } /** * 新增设备分类 - * + * * @param iotCategory 设备分类 * @return 结果 */ @Override - public int insertIotCategory(IotCategory iotCategory) - { + public int insertIotCategory(IotCategory iotCategory) { iotCategory.setCreateTime(DateUtils.getNowDate()); return iotCategoryMapper.insertIotCategory(iotCategory); } /** * 修改设备分类 - * + * * @param iotCategory 设备分类 * @return 结果 */ @Override - public int updateIotCategory(IotCategory iotCategory) - { + public int updateIotCategory(IotCategory iotCategory) { iotCategory.setUpdateTime(DateUtils.getNowDate()); return iotCategoryMapper.updateIotCategory(iotCategory); } /** * 批量删除设备分类 - * + * * @param categoryIds 需要删除的设备分类ID * @return 结果 */ @Override - public int deleteIotCategoryByIds(Long[] categoryIds) - { + public int deleteIotCategoryByIds(Long[] categoryIds) { return iotCategoryMapper.deleteIotCategoryByIds(categoryIds); } /** * 删除设备分类信息 - * + * * @param categoryId 设备分类ID * @return 结果 */ @Override - public int deleteIotCategoryById(Long categoryId) - { + public int deleteIotCategoryById(Long categoryId) { return iotCategoryMapper.deleteIotCategoryById(categoryId); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceServiceImpl.java index d565daa1..cf7c6a35 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceServiceImpl.java @@ -1,35 +1,56 @@ package com.ruoyi.system.service.impl; import java.util.List; + +import com.alibaba.fastjson.JSON; +import com.alibaba.fastjson.JSONObject; +import com.ruoyi.common.core.domain.AjaxResult; +import com.ruoyi.common.exception.CustomException; import com.ruoyi.common.utils.DateUtils; +import com.ruoyi.system.domain.*; import com.ruoyi.system.domain.vo.IotDeviceListDto; +import com.ruoyi.system.mqtt.config.MqttPushClient; +import com.ruoyi.system.service.*; +import lombok.extern.slf4j.Slf4j; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.system.mapper.IotDeviceMapper; -import com.ruoyi.system.domain.IotDevice; -import com.ruoyi.system.service.IIotDeviceService; +import org.springframework.transaction.annotation.Transactional; /** * 设备Service业务层处理 - * + * * @author kerwincui * @date 2021-05-06 */ @Service -public class IotDeviceServiceImpl implements IIotDeviceService -{ +@Slf4j +public class IotDeviceServiceImpl implements IIotDeviceService { @Autowired private IotDeviceMapper iotDeviceMapper; + @Autowired + private MqttPushClient pushClient; + + @Autowired + private ITUserAccountInfoService userAccountInfoService; + + @Autowired + private IIotDeviceUserRelationService deviceUserRelationService; + + @Autowired + private IIotDeviceSetService iotDeviceSetService; + @Autowired + private IIotDeviceStatusService iotDeviceStatusService; + /** * 查询设备 - * + * * @param deviceId 设备ID * @return 设备 */ @Override - public IotDevice selectIotDeviceById(Long deviceId) - { + public IotDevice selectIotDeviceById(Long deviceId) { return iotDeviceMapper.selectIotDeviceById(deviceId); } @@ -40,70 +61,276 @@ public class IotDeviceServiceImpl implements IIotDeviceService * @return 设备 */ @Override - public IotDevice selectIotDeviceByNum(String deviceNum) - { + public IotDevice selectIotDeviceByNum(String deviceNum) { return iotDeviceMapper.selectIotDeviceByNum(deviceNum); } /** * 查询设备列表 - * + * * @param iotDevice 设备 * @return 设备 */ @Override - public List selectIotDeviceList(IotDevice iotDevice) - { + public List selectIotDeviceList(IotDevice iotDevice) { return iotDeviceMapper.selectIotDeviceList(iotDevice); } /** * 新增设备 - * + * * @param iotDevice 设备 * @return 结果 */ @Override - public int insertIotDevice(IotDevice iotDevice) - { + public int insertIotDevice(IotDevice iotDevice) { iotDevice.setCreateTime(DateUtils.getNowDate()); return iotDeviceMapper.insertIotDevice(iotDevice); } /** * 修改设备 - * + * * @param iotDevice 设备 * @return 结果 */ @Override - public int updateIotDevice(IotDevice iotDevice) - { + public int updateIotDevice(IotDevice iotDevice) { iotDevice.setUpdateTime(DateUtils.getNowDate()); return iotDeviceMapper.updateIotDevice(iotDevice); } /** * 批量删除设备 - * + * * @param deviceIds 需要删除的设备ID * @return 结果 */ @Override - public int deleteIotDeviceByIds(Long[] deviceIds) - { + public int deleteIotDeviceByIds(Long[] deviceIds) { return iotDeviceMapper.deleteIotDeviceByIds(deviceIds); } /** * 删除设备信息 - * + * * @param deviceId 设备ID * @return 结果 */ @Override - public int deleteIotDeviceById(Long deviceId) - { + public int deleteIotDeviceById(Long deviceId) { return iotDeviceMapper.deleteIotDeviceById(deviceId); } + + @Override + public int controlDeviceByNum(String deviceNum, String cmd) { + IotDevice iotDevice = iotDeviceMapper.selectIotDeviceByNum(deviceNum); + if(iotDevice==null) + { + throw new CustomException("设备不存在"); + } + Long deviceId = iotDevice.getDeviceId(); + + + +// IotDeviceStatus status = iotDeviceStatusService.selectIotDeviceStatusByDeviceId(iotDeviceSet.getDeviceId()); +// if (status == null || status.getIsOnline() == 0) { +// return AjaxResult.error("设备已离线，不能更新状态。"); +// } +// // 存储 +// iotDeviceSetService.updateIotDeviceSet(iotDeviceSet); +// +// //mqtt发布 +// IotDeviceSet set = iotDeviceSetService.selectIotDeviceSetByDeviceId(iotDeviceSet.getDeviceId()); +// if (iotDeviceSet.getIsRadar() != null) { +// set.setIsRadar(iotDeviceSet.getIsRadar()); +// } +// if (iotDeviceSet.getIsAlarm() != null) { +// set.setIsAlarm(iotDeviceSet.getIsAlarm()); +// } +// if (iotDeviceSet.getRadarInterval() != null) { +// set.setRadarInterval(iotDeviceSet.getRadarInterval()); +// } +// if (iotDeviceSet.getIsRfControl() != null) { +// set.setIsRfControl(iotDeviceSet.getIsRfControl()); +// } +// if (iotDeviceSet.getRfOneFunc() != null) { +// set.setRfOneFunc(iotDeviceSet.getRfOneFunc()); +// } +// if (iotDeviceSet.getRfTwoFunc() != null) { +// set.setRfTwoFunc(iotDeviceSet.getRfTwoFunc()); +// } +// if (iotDeviceSet.getRfThreeFunc() != null) { +// set.setRfThreeFunc(iotDeviceSet.getRfThreeFunc()); +// } +// if (iotDeviceSet.getRfFourFunc() != null) { +// set.setRfFourFunc(iotDeviceSet.getRfFourFunc()); +// } +// if (iotDeviceSet.getIsRfLearn() != null) { +// set.setIsRfLearn(iotDeviceSet.getIsRfLearn()); +// } +// if (iotDeviceSet.getIsRfClear() != null) { +// set.setIsRfClear(iotDeviceSet.getIsRfClear()); +// } +// if (iotDeviceSet.getIsAp() != null) { +// set.setIsAp(iotDeviceSet.getIsAp()); +// } +// if (iotDeviceSet.getIsReset() != null) { +// set.setIsReset(iotDeviceSet.getIsReset()); +// } +// String content = JSON.toJSONString(set); + +// String topic = "xiaoyi/swtich/devices/"+deviceNum; + IotDeviceStatus iotDeviceStatus = new IotDeviceStatus(); + iotDeviceStatus.setDeviceId(deviceId); + if("on".equalsIgnoreCase(cmd)) + { + iotDeviceStatus.setRelayStatus(1); + }else{ + iotDeviceStatus.setRelayStatus(0); + } + + String topic = "status/set/" + deviceNum; + String content = JSON.toJSONString(iotDeviceStatus); +// content="{\"deviceId\":\"4\",\"params\":{},\"relayStatus\":\"1\"}"; + System.out.println("topic:"+topic); + System.out.println("content:"+content); + boolean publish = pushClient.publish(2, true, topic, content); + if(publish) + { + return 1; + }else{ + throw new CustomException("指令发送失败"); + } + } + + /** + * @Method + * @Description 用户添加设备 + * @Param null + * @return + * @date 2021-08-27,0027 11:33 + * @author admin + * + */ + @Override + @Transactional + public int bindDevice(Long userId,String nickName, String deviceNum, String name, Long categoryId, String remark) { + IotDevice iotDevice = iotDeviceMapper.selectIotDeviceByNum(deviceNum); + if(iotDevice==null) + { + throw new CustomException("设备【"+deviceNum+"】不存在"); + } + + Long deviceId = iotDevice.getDeviceId(); + IotDeviceUserRelation iotDeviceUserRelation = deviceUserRelationService.selectIotDeviceUserRelationByDeviceIdAndUserId(deviceId, userId); + + if(iotDeviceUserRelation!=null) + { + throw new CustomException("该设备已被绑定！"); +// throw new CustomException("设备【"+deviceNum+"】已经绑定，请换其他设备！"); + } + + log.info("用户: "+nickName+"，添加设备【"+deviceNum+"】,名称为："+name); +// iotDevice.setDeviceName(name); + iotDevice.setRemark(remark); + if("未激活".equals(iotDevice.getStatus())) + { + throw new CustomException("该设备未激活不能绑定！"); + } + iotDeviceMapper.updateIotDevice(iotDevice); + + //保存设备用户关联 + IotDeviceUserRelation iotDeviceUserRelation1 = new IotDeviceUserRelation(); + iotDeviceUserRelation1.setDeviceId(deviceId); + iotDeviceUserRelation1.setDeviceNum(deviceNum); + iotDeviceUserRelation1.setUserId(userId); + iotDeviceUserRelation1.setDeviceName(name); + return deviceUserRelationService.insertIotDeviceUserRelation(iotDeviceUserRelation1); + } + + @Override + public List selectMpIotDeviceList(IotDevice iotDevice) { + return iotDeviceMapper.selectMpIotDeviceList(iotDevice); + } + + @Override + @Transactional + public int updateDeviceInfo(Long userId, String nickName, Long deviceId, String name, String remark) { + IotDevice iotDevice = iotDeviceMapper.selectIotDeviceById(deviceId); + if(iotDevice==null) + { + throw new CustomException("设备不存在"); + } + + IotDeviceUserRelation iotDeviceUserRelation = deviceUserRelationService.selectIotDeviceUserRelationByDeviceIdAndUserId(deviceId, userId); + + if(iotDeviceUserRelation==null) + { + throw new CustomException("设备不存在！"); + } + String deviceNum=iotDevice.getDeviceNum(); + log.info("用户: "+nickName+"，修改设备【"+deviceNum+"】名称为："+name); + +// iotDeviceMapper.updateIotDevice(iotDevice); + + //保存设备用户关联 + IotDeviceUserRelation iotDeviceUserRelation1 = new IotDeviceUserRelation(); + iotDeviceUserRelation1.setId(iotDeviceUserRelation.getId()); + iotDeviceUserRelation1.setDeviceId(deviceId); + iotDeviceUserRelation1.setDeviceNum(deviceNum); + iotDeviceUserRelation1.setUserId(userId); + iotDeviceUserRelation1.setDeviceName(name); + iotDeviceUserRelation1.setRemark(remark); + return deviceUserRelationService.updateIotDeviceUserRelation(iotDeviceUserRelation1); + } + + @Override + public IotDevice selectIotDeviceByUserAndNum(Long userId, String deviceNum) { + IotDevice iotDevice = iotDeviceMapper.selectIotDeviceByNum(deviceNum); + if(iotDevice==null) + { + throw new CustomException("设备不存在"); + } + Long deviceId = iotDevice.getDeviceId(); + IotDeviceUserRelation iotDeviceUserRelation = deviceUserRelationService.selectIotDeviceUserRelationByDeviceIdAndUserId(deviceId, userId); + + if(iotDeviceUserRelation==null) + { + throw new CustomException("设备不存在！"); + } + iotDevice.setDeviceName(iotDeviceUserRelation.getDeviceName()); + iotDevice.setRemark(iotDeviceUserRelation.getRemark()); + return iotDevice; + } + + @Override + public int unBindDevice(Long userId, String nickName, Long deviceId) { + IotDevice iotDevice = iotDeviceMapper.selectIotDeviceById(deviceId); + if(iotDevice==null) + { + throw new CustomException("设备不存在"); + } + + IotDeviceUserRelation iotDeviceUserRelation = deviceUserRelationService.selectIotDeviceUserRelationByDeviceIdAndUserId(deviceId, userId); + + if(iotDeviceUserRelation==null) + { + throw new CustomException("设备不存在,或已解绑！"); + } + String deviceNum = iotDevice.getDeviceNum(); + log.info("用户: "+nickName+"，解绑设备【"+deviceNum+"】"); + + return deviceUserRelationService.deleteIotDeviceUserRelationById(iotDeviceUserRelation.getId()); + } + + @Override + public JSONObject getDeviceInfoByDeviceNum(Long userId, String nickname,String deviceNum) { + return iotDeviceMapper.getDeviceInfoByDeviceNum(userId,deviceNum); + } + + @Override + public JSONObject getDeviceInfoByDeviceId(Long userId, String nickname,Long deviceId) { + return iotDeviceMapper.getDeviceInfoByDeviceId(userId,deviceId); + } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceSetServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceSetServiceImpl.java index 391f9985..4b730a35 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceSetServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceSetServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import com.ruoyi.common.utils.DateUtils; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; @@ -10,25 +11,23 @@ import com.ruoyi.system.service.IIotDeviceSetService; /** * 设备配置Service业务层处理 - * + * * @author kerwincui * @date 2021-05-06 */ @Service -public class IotDeviceSetServiceImpl implements IIotDeviceSetService -{ +public class IotDeviceSetServiceImpl implements IIotDeviceSetService { @Autowired private IotDeviceSetMapper iotDeviceSetMapper; /** * 查询设备配置 - * + * * @param deviceConfigId 设备配置ID * @return 设备配置 */ @Override - public IotDeviceSet selectIotDeviceSetById(Long deviceSetId) - { + public IotDeviceSet selectIotDeviceSetById(Long deviceSetId) { return iotDeviceSetMapper.selectIotDeviceSetById(deviceSetId); } @@ -39,70 +38,64 @@ public class IotDeviceSetServiceImpl implements IIotDeviceSetService * @return 设备配置 */ @Override - public IotDeviceSet selectIotDeviceSetByDeviceId(Long deviceId) - { + public IotDeviceSet selectIotDeviceSetByDeviceId(Long deviceId) { return iotDeviceSetMapper.selectIotDeviceSetByDeviceId(deviceId); } /** * 查询设备配置列表 - * + * * @param iotDeviceSet 设备配置 * @return 设备配置 */ @Override - public List selectIotDeviceSetList(IotDeviceSet iotDeviceSet) - { + public List selectIotDeviceSetList(IotDeviceSet iotDeviceSet) { return iotDeviceSetMapper.selectIotDeviceSetList(iotDeviceSet); } /** * 新增设备配置 - * + * * @param iotDeviceSet 设备配置 * @return 结果 */ @Override - public int insertIotDeviceSet(IotDeviceSet iotDeviceSet) - { + public int insertIotDeviceSet(IotDeviceSet iotDeviceSet) { iotDeviceSet.setCreateTime(DateUtils.getNowDate()); return iotDeviceSetMapper.insertIotDeviceSet(iotDeviceSet); } /** * 修改设备配置 - * + * * @param iotDeviceSet 设备配置 * @return 结果 */ @Override - public int updateIotDeviceSet(IotDeviceSet iotDeviceSet) - { + public int updateIotDeviceSet(IotDeviceSet iotDeviceSet) { iotDeviceSet.setUpdateTime(DateUtils.getNowDate()); return iotDeviceSetMapper.updateIotDeviceSet(iotDeviceSet); } /** * 批量删除设备配置 - * + * * @param deviceConfigIds 需要删除的设备配置ID * @return 结果 */ @Override - public int deleteIotDeviceSetByIds(Long[] deviceConfigIds) - { + public int deleteIotDeviceSetByIds(Long[] deviceConfigIds) { return iotDeviceSetMapper.deleteIotDeviceSetByIds(deviceConfigIds); } /** * 删除设备配置信息 - * + * * @param deviceConfigId 设备配置ID * @return 结果 */ @Override - public int deleteIotDeviceSetById(Long deviceConfigId) - { + public int deleteIotDeviceSetById(Long deviceConfigId) { return iotDeviceSetMapper.deleteIotDeviceSetById(deviceConfigId); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceStatusServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceStatusServiceImpl.java index 1fb94517..38c46733 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceStatusServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceStatusServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import com.ruoyi.common.utils.DateUtils; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; @@ -10,25 +11,23 @@ import com.ruoyi.system.service.IIotDeviceStatusService; /** * 设备状态Service业务层处理 - * + * * @author kerwincui * @date 2021-05-06 */ @Service -public class IotDeviceStatusServiceImpl implements IIotDeviceStatusService -{ +public class IotDeviceStatusServiceImpl implements IIotDeviceStatusService { @Autowired private IotDeviceStatusMapper iotDeviceStatusMapper; /** * 查询设备状态 - * + * * @param deviceStatusId 设备状态ID * @return 设备状态 */ @Override - public IotDeviceStatus selectIotDeviceStatusById(Long deviceStatusId) - { + public IotDeviceStatus selectIotDeviceStatusById(Long deviceStatusId) { return iotDeviceStatusMapper.selectIotDeviceStatusById(deviceStatusId); } @@ -39,8 +38,7 @@ public class IotDeviceStatusServiceImpl implements IIotDeviceStatusService * @return 设备状态 */ @Override - public IotDeviceStatus selectIotDeviceStatusByDeviceId(Long deviceId) - { + public IotDeviceStatus selectIotDeviceStatusByDeviceId(Long deviceId) { return iotDeviceStatusMapper.selectIotDeviceStatusByDeviceId(deviceId); } @@ -51,70 +49,64 @@ public class IotDeviceStatusServiceImpl implements IIotDeviceStatusService * @return 设备状态 */ @Override - public IotDeviceStatus selectIotDeviceStatusByDeviceNum(String deviceNum) - { + public IotDeviceStatus selectIotDeviceStatusByDeviceNum(String deviceNum) { return iotDeviceStatusMapper.selectIotDeviceStatusByDeviceNum(deviceNum); } /** * 查询设备状态列表 - * + * * @param iotDeviceStatus 设备状态 * @return 设备状态 */ @Override - public List selectIotDeviceStatusList(IotDeviceStatus iotDeviceStatus) - { + public List selectIotDeviceStatusList(IotDeviceStatus iotDeviceStatus) { return iotDeviceStatusMapper.selectIotDeviceStatusList(iotDeviceStatus); } /** * 新增设备状态 - * + * * @param iotDeviceStatus 设备状态 * @return 结果 */ @Override - public int insertIotDeviceStatus(IotDeviceStatus iotDeviceStatus) - { + public int insertIotDeviceStatus(IotDeviceStatus iotDeviceStatus) { iotDeviceStatus.setCreateTime(DateUtils.getNowDate()); return iotDeviceStatusMapper.insertIotDeviceStatus(iotDeviceStatus); } /** * 修改设备状态 - * + * * @param iotDeviceStatus 设备状态 * @return 结果 */ @Override - public int updateIotDeviceStatus(IotDeviceStatus iotDeviceStatus) - { + public int updateIotDeviceStatus(IotDeviceStatus iotDeviceStatus) { iotDeviceStatus.setUpdateTime(DateUtils.getNowDate()); return iotDeviceStatusMapper.updateIotDeviceStatus(iotDeviceStatus); } /** * 批量删除设备状态 - * + * * @param deviceStatusIds 需要删除的设备状态ID * @return 结果 */ @Override - public int deleteIotDeviceStatusByIds(Long[] deviceStatusIds) - { + public int deleteIotDeviceStatusByIds(Long[] deviceStatusIds) { return iotDeviceStatusMapper.deleteIotDeviceStatusByIds(deviceStatusIds); } /** * 删除设备状态信息 - * + * * @param deviceStatusId 设备状态ID * @return 结果 */ @Override - public int deleteIotDeviceStatusById(Long deviceStatusId) - { + public int deleteIotDeviceStatusById(Long deviceStatusId) { return iotDeviceStatusMapper.deleteIotDeviceStatusById(deviceStatusId); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceUserRelationServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceUserRelationServiceImpl.java new file mode 100644 index 00000000..aa56076f --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotDeviceUserRelationServiceImpl.java @@ -0,0 +1,113 @@ +package com.ruoyi.system.service.impl; + +import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.stereotype.Service; + import com.ruoyi.system.mapper.IotDeviceUserRelationMapper; +import com.ruoyi.system.domain.IotDeviceUserRelation; +import com.ruoyi.system.service.IIotDeviceUserRelationService; + +/** + * 【请填写功能名称】Service业务层处理 + * + * @author wxy + * @date 2021-08-27 + */ +@Service +public class IotDeviceUserRelationServiceImpl implements IIotDeviceUserRelationService { + @Autowired + private IotDeviceUserRelationMapper iotDeviceUserRelationMapper; + + /** + * 查询【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 【请填写功能名称】 + */ + @Override + public IotDeviceUserRelation selectIotDeviceUserRelationById(Long id) { + return iotDeviceUserRelationMapper.selectIotDeviceUserRelationById(id); + } + + /** + * 查询【请填写功能名称】列表 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 【请填写功能名称】 + */ + @Override + public List selectIotDeviceUserRelationList(IotDeviceUserRelation iotDeviceUserRelation) { + return iotDeviceUserRelationMapper.selectIotDeviceUserRelationList(iotDeviceUserRelation); + } + + /** + * 新增【请填写功能名称】 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 结果 + */ + @Override + public int insertIotDeviceUserRelation(IotDeviceUserRelation iotDeviceUserRelation) { + return iotDeviceUserRelationMapper.insertIotDeviceUserRelation(iotDeviceUserRelation); + } + + /** + * 修改【请填写功能名称】 + * + * @param iotDeviceUserRelation 【请填写功能名称】 + * @return 结果 + */ + @Override + public int updateIotDeviceUserRelation(IotDeviceUserRelation iotDeviceUserRelation) { + return iotDeviceUserRelationMapper.updateIotDeviceUserRelation(iotDeviceUserRelation); + } + + /** + * 批量删除【请填写功能名称】 + * + * @param ids 需要删除的【请填写功能名称】ID + * @return 结果 + */ + @Override + public int deleteIotDeviceUserRelationByIds(Long[] ids) { + return iotDeviceUserRelationMapper.deleteIotDeviceUserRelationByIds(ids); + } + + /** + * 删除【请填写功能名称】信息 + * + * @param id 【请填写功能名称】ID + * @return 结果 + */ + @Override + public int deleteIotDeviceUserRelationById(Long id) { + return iotDeviceUserRelationMapper.deleteIotDeviceUserRelationById(id); + } + + @Override + public List selectIotDeviceUserRelationByDeviceId(Long deviceId) { + IotDeviceUserRelation iotDeviceUserRelation = new IotDeviceUserRelation(); + iotDeviceUserRelation.setDeviceId(deviceId); + return iotDeviceUserRelationMapper.selectIotDeviceUserRelationList(iotDeviceUserRelation); + } + + @Override + public List selectIotDeviceUserRelationByUserId(Long userId) { + IotDeviceUserRelation iotDeviceUserRelation = new IotDeviceUserRelation(); + iotDeviceUserRelation.setUserId(userId); + return iotDeviceUserRelationMapper.selectIotDeviceUserRelationList(iotDeviceUserRelation); + } + + @Override + public IotDeviceUserRelation selectIotDeviceUserRelationByDeviceIdAndUserId(Long deviceId, Long userId) { + IotDeviceUserRelation iotDeviceUserRelation = new IotDeviceUserRelation(); + iotDeviceUserRelation.setUserId(userId); + List iotDeviceUserRelations = iotDeviceUserRelationMapper.selectIotDeviceUserRelationList(iotDeviceUserRelation); + if(iotDeviceUserRelations==null || iotDeviceUserRelations.size()==0) + { + return null; + } + return iotDeviceUserRelations.get(0); + } + +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotGroupServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotGroupServiceImpl.java index 35c0cd93..53457361 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotGroupServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/IotGroupServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import com.ruoyi.common.utils.DateUtils; import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; @@ -10,87 +11,80 @@ import com.ruoyi.system.service.IIotGroupService; /** * 分组Service业务层处理 - * + * * @author kerwincui * @date 2021-05-18 */ @Service -public class IotGroupServiceImpl implements IIotGroupService -{ +public class IotGroupServiceImpl implements IIotGroupService { @Autowired private IotGroupMapper iotGroupMapper; /** * 查询分组 - * + * * @param groupId 分组ID * @return 分组 */ @Override - public IotGroup selectIotGroupById(Long groupId) - { + public IotGroup selectIotGroupById(Long groupId) { return iotGroupMapper.selectIotGroupById(groupId); } /** * 查询分组列表 - * + * * @param iotGroup 分组 * @return 分组 */ @Override - public List selectIotGroupList(IotGroup iotGroup) - { + public List selectIotGroupList(IotGroup iotGroup) { return iotGroupMapper.selectIotGroupList(iotGroup); } /** * 新增分组 - * + * * @param iotGroup 分组 * @return 结果 */ @Override - public int insertIotGroup(IotGroup iotGroup) - { + public int insertIotGroup(IotGroup iotGroup) { iotGroup.setCreateTime(DateUtils.getNowDate()); return iotGroupMapper.insertIotGroup(iotGroup); } /** * 修改分组 - * + * * @param iotGroup 分组 * @return 结果 */ @Override - public int updateIotGroup(IotGroup iotGroup) - { + public int updateIotGroup(IotGroup iotGroup) { iotGroup.setUpdateTime(DateUtils.getNowDate()); return iotGroupMapper.updateIotGroup(iotGroup); } /** * 批量删除分组 - * + * * @param groupIds 需要删除的分组ID * @return 结果 */ @Override - public int deleteIotGroupByIds(Long[] groupIds) - { + public int deleteIotGroupByIds(Long[] groupIds) { return iotGroupMapper.deleteIotGroupByIds(groupIds); } /** * 删除分组信息 - * + * * @param groupId 分组ID * @return 结果 */ @Override - public int deleteIotGroupById(Long groupId) - { + public int deleteIotGroupById(Long groupId) { return iotGroupMapper.deleteIotGroupById(groupId); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysConfigServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysConfigServiceImpl.java index 9cd51de0..ca88e985 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysConfigServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysConfigServiceImpl.java @@ -3,6 +3,7 @@ package com.ruoyi.system.service.impl; import java.util.Collection; import java.util.List; import javax.annotation.PostConstruct; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.common.annotation.DataSource; @@ -19,12 +20,11 @@ import com.ruoyi.system.service.ISysConfigService; /** * 参数配置 服务层实现 - * + * * @author ruoyi */ @Service -public class SysConfigServiceImpl implements ISysConfigService -{ +public class SysConfigServiceImpl implements ISysConfigService { @Autowired private SysConfigMapper configMapper; @@ -35,25 +35,22 @@ public class SysConfigServiceImpl implements ISysConfigService * 项目启动时，初始化参数到缓存 */ @PostConstruct - public void init() - { + public void init() { List configsList = configMapper.selectConfigList(new SysConfig()); - for (SysConfig config : configsList) - { + for (SysConfig config : configsList) { redisCache.setCacheObject(getCacheKey(config.getConfigKey()), config.getConfigValue()); } } /** * 查询参数配置信息 - * + * * @param configId 参数配置ID * @return 参数配置信息 */ @Override @DataSource(DataSourceType.MASTER) - public SysConfig selectConfigById(Long configId) - { + public SysConfig selectConfigById(Long configId) { SysConfig config = new SysConfig(); config.setConfigId(configId); return configMapper.selectConfig(config); @@ -61,23 +58,20 @@ public class SysConfigServiceImpl implements ISysConfigService /** * 根据键名查询参数配置信息 - * + * * @param configKey 参数key * @return 参数键值 */ @Override - public String selectConfigByKey(String configKey) - { + public String selectConfigByKey(String configKey) { String configValue = Convert.toStr(redisCache.getCacheObject(getCacheKey(configKey))); - if (StringUtils.isNotEmpty(configValue)) - { + if (StringUtils.isNotEmpty(configValue)) { return configValue; } SysConfig config = new SysConfig(); config.setConfigKey(configKey); SysConfig retConfig = configMapper.selectConfig(config); - if (StringUtils.isNotNull(retConfig)) - { + if (StringUtils.isNotNull(retConfig)) { redisCache.setCacheObject(getCacheKey(configKey), retConfig.getConfigValue()); return retConfig.getConfigValue(); } @@ -86,28 +80,25 @@ public class SysConfigServiceImpl implements ISysConfigService /** * 查询参数配置列表 - * + * * @param config 参数配置信息 * @return 参数配置集合 */ @Override - public List selectConfigList(SysConfig config) - { + public List selectConfigList(SysConfig config) { return configMapper.selectConfigList(config); } /** * 新增参数配置 - * + * * @param config 参数配置信息 * @return 结果 */ @Override - public int insertConfig(SysConfig config) - { + public int insertConfig(SysConfig config) { int row = configMapper.insertConfig(config); - if (row > 0) - { + if (row > 0) { redisCache.setCacheObject(getCacheKey(config.getConfigKey()), config.getConfigValue()); } return row; @@ -115,16 +106,14 @@ public class SysConfigServiceImpl implements ISysConfigService /** * 修改参数配置 - * + * * @param config 参数配置信息 * @return 结果 */ @Override - public int updateConfig(SysConfig config) - { + public int updateConfig(SysConfig config) { int row = configMapper.updateConfig(config); - if (row > 0) - { + if (row > 0) { redisCache.setCacheObject(getCacheKey(config.getConfigKey()), config.getConfigValue()); } return row; @@ -132,24 +121,20 @@ public class SysConfigServiceImpl implements ISysConfigService /** * 批量删除参数信息 - * + * * @param configIds 需要删除的参数ID * @return 结果 */ @Override - public int deleteConfigByIds(Long[] configIds) - { - for (Long configId : configIds) - { + public int deleteConfigByIds(Long[] configIds) { + for (Long configId : configIds) { SysConfig config = selectConfigById(configId); - if (StringUtils.equals(UserConstants.YES, config.getConfigType())) - { + if (StringUtils.equals(UserConstants.YES, config.getConfigType())) { throw new CustomException(String.format("内置参数【%1$s】不能删除 ", config.getConfigKey())); } } int count = configMapper.deleteConfigByIds(configIds); - if (count > 0) - { + if (count > 0) { Collection keys = redisCache.keys(Constants.SYS_CONFIG_KEY + "*"); redisCache.deleteObject(keys); } @@ -160,25 +145,22 @@ public class SysConfigServiceImpl implements ISysConfigService * 清空缓存数据 */ @Override - public void clearCache() - { + public void clearCache() { Collection keys = redisCache.keys(Constants.SYS_CONFIG_KEY + "*"); redisCache.deleteObject(keys); } /** * 校验参数键名是否唯一 - * + * * @param config 参数配置信息 * @return 结果 */ @Override - public String checkConfigKeyUnique(SysConfig config) - { + public String checkConfigKeyUnique(SysConfig config) { Long configId = StringUtils.isNull(config.getConfigId()) ? -1L : config.getConfigId(); SysConfig info = configMapper.checkConfigKeyUnique(config.getConfigKey()); - if (StringUtils.isNotNull(info) && info.getConfigId().longValue() != configId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getConfigId().longValue() != configId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -186,12 +168,11 @@ public class SysConfigServiceImpl implements ISysConfigService /** * 设置cache key - * + * * @param configKey 参数键 * @return 缓存键key */ - private String getCacheKey(String configKey) - { + private String getCacheKey(String configKey) { return Constants.SYS_CONFIG_KEY + configKey; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDeptServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDeptServiceImpl.java index 7d6984db..f18682a9 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDeptServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDeptServiceImpl.java @@ -4,6 +4,7 @@ import java.util.ArrayList; import java.util.Iterator; import java.util.List; import java.util.stream.Collectors; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.common.annotation.DataScope; @@ -19,12 +20,11 @@ import com.ruoyi.system.service.ISysDeptService; /** * 部门管理 服务实现 - * + * * @author ruoyi */ @Service -public class SysDeptServiceImpl implements ISysDeptService -{ +public class SysDeptServiceImpl implements ISysDeptService { @Autowired private SysDeptMapper deptMapper; @@ -33,44 +33,38 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 查询部门管理数据 - * + * * @param dept 部门信息 * @return 部门信息集合 */ @Override @DataScope(deptAlias = "d") - public List selectDeptList(SysDept dept) - { + public List selectDeptList(SysDept dept) { return deptMapper.selectDeptList(dept); } /** * 构建前端所需要树结构 - * + * * @param depts 部门列表 * @return 树结构列表 */ @Override - public List buildDeptTree(List depts) - { + public List buildDeptTree(List depts) { List returnList = new ArrayList(); List tempList = new ArrayList(); - for (SysDept dept : depts) - { + for (SysDept dept : depts) { tempList.add(dept.getDeptId()); } - for (Iterator iterator = depts.iterator(); iterator.hasNext();) - { + for (Iterator iterator = depts.iterator(); iterator.hasNext(); ) { SysDept dept = (SysDept) iterator.next(); // 如果是顶级节点, 遍历该父节点的所有子节点 - if (!tempList.contains(dept.getParentId())) - { + if (!tempList.contains(dept.getParentId())) { recursionFn(depts, dept); returnList.add(dept); } } - if (returnList.isEmpty()) - { + if (returnList.isEmpty()) { returnList = depts; } return returnList; @@ -78,93 +72,85 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 构建前端所需要下拉树结构 - * + * * @param depts 部门列表 * @return 下拉树结构列表 */ @Override - public List buildDeptTreeSelect(List depts) - { + public List buildDeptTreeSelect(List depts) { List deptTrees = buildDeptTree(depts); return deptTrees.stream().map(TreeSelect::new).collect(Collectors.toList()); } /** * 根据角色ID查询部门树信息 - * + * * @param roleId 角色ID * @return 选中部门列表 */ @Override - public List selectDeptListByRoleId(Long roleId) - { + public List selectDeptListByRoleId(Long roleId) { SysRole role = roleMapper.selectRoleById(roleId); return deptMapper.selectDeptListByRoleId(roleId, role.isDeptCheckStrictly()); } /** * 根据部门ID查询信息 - * + * * @param deptId 部门ID * @return 部门信息 */ @Override - public SysDept selectDeptById(Long deptId) - { + public SysDept selectDeptById(Long deptId) { return deptMapper.selectDeptById(deptId); } /** * 根据ID查询所有子部门（正常状态） - * + * * @param deptId 部门ID * @return 子部门数 */ @Override - public int selectNormalChildrenDeptById(Long deptId) - { + public int selectNormalChildrenDeptById(Long deptId) { return deptMapper.selectNormalChildrenDeptById(deptId); } /** * 是否存在子节点 - * + * * @param deptId 部门ID * @return 结果 */ @Override - public boolean hasChildByDeptId(Long deptId) - { + public boolean hasChildByDeptId(Long deptId) { int result = deptMapper.hasChildByDeptId(deptId); return result > 0 ? true : false; } /** * 查询部门是否存在用户 - * + * * @param deptId 部门ID * @return 结果 true 存在 false 不存在 */ @Override - public boolean checkDeptExistUser(Long deptId) - { + public boolean checkDeptExistUser(Long deptId) { int result = deptMapper.checkDeptExistUser(deptId); return result > 0 ? true : false; } /** * 校验部门名称是否唯一 - * + * * @param dept 部门信息 * @return 结果 */ @Override - public String checkDeptNameUnique(SysDept dept) - { + public String checkDeptNameUnique(SysDept dept) { Long deptId = StringUtils.isNull(dept.getDeptId()) ? -1L : dept.getDeptId(); SysDept info = deptMapper.checkDeptNameUnique(dept.getDeptName(), dept.getParentId()); - if (StringUtils.isNotNull(info) && info.getDeptId().longValue() != deptId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getDeptId().longValue() != deptId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -172,17 +158,15 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 新增保存部门信息 - * + * * @param dept 部门信息 * @return 结果 */ @Override - public int insertDept(SysDept dept) - { + public int insertDept(SysDept dept) { SysDept info = deptMapper.selectDeptById(dept.getParentId()); // 如果父节点不为正常状态,则不允许新增子节点 - if (!UserConstants.DEPT_NORMAL.equals(info.getStatus())) - { + if (!UserConstants.DEPT_NORMAL.equals(info.getStatus())) { throw new CustomException("部门停用，不允许新增"); } dept.setAncestors(info.getAncestors() + "," + dept.getParentId()); @@ -191,25 +175,22 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 修改保存部门信息 - * + * * @param dept 部门信息 * @return 结果 */ @Override - public int updateDept(SysDept dept) - { + public int updateDept(SysDept dept) { SysDept newParentDept = deptMapper.selectDeptById(dept.getParentId()); SysDept oldDept = deptMapper.selectDeptById(dept.getDeptId()); - if (StringUtils.isNotNull(newParentDept) && StringUtils.isNotNull(oldDept)) - { + if (StringUtils.isNotNull(newParentDept) && StringUtils.isNotNull(oldDept)) { String newAncestors = newParentDept.getAncestors() + "," + newParentDept.getDeptId(); String oldAncestors = oldDept.getAncestors(); dept.setAncestors(newAncestors); updateDeptChildren(dept.getDeptId(), newAncestors, oldAncestors); } int result = deptMapper.updateDept(dept); - if (UserConstants.DEPT_NORMAL.equals(dept.getStatus())) - { + if (UserConstants.DEPT_NORMAL.equals(dept.getStatus())) { // 如果该部门是启用状态，则启用该部门的所有上级部门 updateParentDeptStatus(dept); } @@ -218,11 +199,10 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 修改该部门的父级部门状态 - * + * * @param dept 当前部门 */ - private void updateParentDeptStatus(SysDept dept) - { + private void updateParentDeptStatus(SysDept dept) { String updateBy = dept.getUpdateBy(); dept = deptMapper.selectDeptById(dept.getDeptId()); dept.setUpdateBy(updateBy); @@ -231,48 +211,41 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 修改子元素关系 - * - * @param deptId 被修改的部门ID + * + * @param deptId 被修改的部门ID * @param newAncestors 新的父ID集合 * @param oldAncestors 旧的父ID集合 */ - public void updateDeptChildren(Long deptId, String newAncestors, String oldAncestors) - { + public void updateDeptChildren(Long deptId, String newAncestors, String oldAncestors) { List children = deptMapper.selectChildrenDeptById(deptId); - for (SysDept child : children) - { + for (SysDept child : children) { child.setAncestors(child.getAncestors().replace(oldAncestors, newAncestors)); } - if (children.size() > 0) - { + if (children.size() > 0) { deptMapper.updateDeptChildren(children); } } /** * 删除部门管理信息 - * + * * @param deptId 部门ID * @return 结果 */ @Override - public int deleteDeptById(Long deptId) - { + public int deleteDeptById(Long deptId) { return deptMapper.deleteDeptById(deptId); } /** * 递归列表 */ - private void recursionFn(List list, SysDept t) - { + private void recursionFn(List list, SysDept t) { // 得到子节点列表 List childList = getChildList(list, t); t.setChildren(childList); - for (SysDept tChild : childList) - { - if (hasChild(list, tChild)) - { + for (SysDept tChild : childList) { + if (hasChild(list, tChild)) { recursionFn(list, tChild); } } @@ -281,15 +254,12 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 得到子节点列表 */ - private List getChildList(List list, SysDept t) - { + private List getChildList(List list, SysDept t) { List tlist = new ArrayList(); Iterator it = list.iterator(); - while (it.hasNext()) - { + while (it.hasNext()) { SysDept n = (SysDept) it.next(); - if (StringUtils.isNotNull(n.getParentId()) && n.getParentId().longValue() == t.getDeptId().longValue()) - { + if (StringUtils.isNotNull(n.getParentId()) && n.getParentId().longValue() == t.getDeptId().longValue()) { tlist.add(n); } } @@ -299,8 +269,7 @@ public class SysDeptServiceImpl implements ISysDeptService /** * 判断是否有子节点 */ - private boolean hasChild(List list, SysDept t) - { + private boolean hasChild(List list, SysDept t) { return getChildList(list, t).size() > 0 ? true : false; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictDataServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictDataServiceImpl.java index 2ee7a6ce..f6dc8381 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictDataServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictDataServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.common.core.domain.entity.SysDictData; @@ -10,64 +11,58 @@ import com.ruoyi.system.service.ISysDictDataService; /** * 字典 业务层处理 - * + * * @author ruoyi */ @Service -public class SysDictDataServiceImpl implements ISysDictDataService -{ +public class SysDictDataServiceImpl implements ISysDictDataService { @Autowired private SysDictDataMapper dictDataMapper; /** * 根据条件分页查询字典数据 - * + * * @param dictData 字典数据信息 * @return 字典数据集合信息 */ @Override - public List selectDictDataList(SysDictData dictData) - { + public List selectDictDataList(SysDictData dictData) { return dictDataMapper.selectDictDataList(dictData); } /** * 根据字典类型和字典键值查询字典数据信息 - * - * @param dictType 字典类型 + * + * @param dictType 字典类型 * @param dictValue 字典键值 * @return 字典标签 */ @Override - public String selectDictLabel(String dictType, String dictValue) - { + public String selectDictLabel(String dictType, String dictValue) { return dictDataMapper.selectDictLabel(dictType, dictValue); } /** * 根据字典数据ID查询信息 - * + * * @param dictCode 字典数据ID * @return 字典数据 */ @Override - public SysDictData selectDictDataById(Long dictCode) - { + public SysDictData selectDictDataById(Long dictCode) { return dictDataMapper.selectDictDataById(dictCode); } /** * 批量删除字典数据信息 - * + * * @param dictCodes 需要删除的字典数据ID * @return 结果 */ @Override - public int deleteDictDataByIds(Long[] dictCodes) - { + public int deleteDictDataByIds(Long[] dictCodes) { int row = dictDataMapper.deleteDictDataByIds(dictCodes); - if (row > 0) - { + if (row > 0) { DictUtils.clearDictCache(); } return row; @@ -75,16 +70,14 @@ public class SysDictDataServiceImpl implements ISysDictDataService /** * 新增保存字典数据信息 - * + * * @param dictData 字典数据信息 * @return 结果 */ @Override - public int insertDictData(SysDictData dictData) - { + public int insertDictData(SysDictData dictData) { int row = dictDataMapper.insertDictData(dictData); - if (row > 0) - { + if (row > 0) { DictUtils.clearDictCache(); } return row; @@ -92,16 +85,14 @@ public class SysDictDataServiceImpl implements ISysDictDataService /** * 修改保存字典数据信息 - * + * * @param dictData 字典数据信息 * @return 结果 */ @Override - public int updateDictData(SysDictData dictData) - { + public int updateDictData(SysDictData dictData) { int row = dictDataMapper.updateDictData(dictData); - if (row > 0) - { + if (row > 0) { DictUtils.clearDictCache(); } return row; diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictTypeServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictTypeServiceImpl.java index 48ba3c62..3c54bf8d 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictTypeServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysDictTypeServiceImpl.java @@ -2,6 +2,7 @@ package com.ruoyi.system.service.impl; import java.util.List; import javax.annotation.PostConstruct; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import org.springframework.transaction.annotation.Transactional; @@ -17,12 +18,11 @@ import com.ruoyi.system.service.ISysDictTypeService; /** * 字典 业务层处理 - * + * * @author ruoyi */ @Service -public class SysDictTypeServiceImpl implements ISysDictTypeService -{ +public class SysDictTypeServiceImpl implements ISysDictTypeService { @Autowired private SysDictTypeMapper dictTypeMapper; @@ -33,11 +33,9 @@ public class SysDictTypeServiceImpl implements ISysDictTypeService * 项目启动时，初始化字典到缓存 */ @PostConstruct - public void init() - { + public void init() { List dictTypeList = dictTypeMapper.selectDictTypeAll(); - for (SysDictType dictType : dictTypeList) - { + for (SysDictType dictType : dictTypeList) { List dictDatas = dictDataMapper.selectDictDataByType(dictType.getDictType()); DictUtils.setDictCache(dictType.getDictType(), dictDatas); } @@ -45,44 +43,39 @@ public class SysDictTypeServiceImpl implements ISysDictTypeService /** * 根据条件分页查询字典类型 - * + * * @param dictType 字典类型信息 * @return 字典类型集合信息 */ @Override - public List selectDictTypeList(SysDictType dictType) - { + public List selectDictTypeList(SysDictType dictType) { return dictTypeMapper.selectDictTypeList(dictType); } /** * 根据所有字典类型 - * + * * @return 字典类型集合信息 */ @Override - public List selectDictTypeAll() - { + public List selectDictTypeAll() { return dictTypeMapper.selectDictTypeAll(); } /** * 根据字典类型查询字典数据 - * + * * @param dictType 字典类型 * @return 字典数据集合信息 */ @Override - public List selectDictDataByType(String dictType) - { + public List selectDictDataByType(String dictType) { List dictDatas = DictUtils.getDictCache(dictType); - if (StringUtils.isNotEmpty(dictDatas)) - { + if (StringUtils.isNotEmpty(dictDatas)) { return dictDatas; } dictDatas = dictDataMapper.selectDictDataByType(dictType); - if (StringUtils.isNotEmpty(dictDatas)) - { + if (StringUtils.isNotEmpty(dictDatas)) { DictUtils.setDictCache(dictType, dictDatas); return dictDatas; } @@ -91,48 +84,42 @@ public class SysDictTypeServiceImpl implements ISysDictTypeService /** * 根据字典类型ID查询信息 - * + * * @param dictId 字典类型ID * @return 字典类型 */ @Override - public SysDictType selectDictTypeById(Long dictId) - { + public SysDictType selectDictTypeById(Long dictId) { return dictTypeMapper.selectDictTypeById(dictId); } /** * 根据字典类型查询信息 - * + * * @param dictType 字典类型 * @return 字典类型 */ @Override - public SysDictType selectDictTypeByType(String dictType) - { + public SysDictType selectDictTypeByType(String dictType) { return dictTypeMapper.selectDictTypeByType(dictType); } /** * 批量删除字典类型信息 - * + * * @param dictIds 需要删除的字典ID * @return 结果 */ @Override - public int deleteDictTypeByIds(Long[] dictIds) - { - for (Long dictId : dictIds) - { + public int deleteDictTypeByIds(Long[] dictIds) { + for (Long dictId : dictIds) { SysDictType dictType = selectDictTypeById(dictId); - if (dictDataMapper.countDictDataByType(dictType.getDictType()) > 0) - { + if (dictDataMapper.countDictDataByType(dictType.getDictType()) > 0) { throw new CustomException(String.format("%1$s已分配,不能删除", dictType.getDictName())); } } int count = dictTypeMapper.deleteDictTypeByIds(dictIds); - if (count > 0) - { + if (count > 0) { DictUtils.clearDictCache(); } return count; @@ -142,23 +129,20 @@ public class SysDictTypeServiceImpl implements ISysDictTypeService * 清空缓存数据 */ @Override - public void clearCache() - { + public void clearCache() { DictUtils.clearDictCache(); } /** * 新增保存字典类型信息 - * + * * @param dictType 字典类型信息 * @return 结果 */ @Override - public int insertDictType(SysDictType dictType) - { + public int insertDictType(SysDictType dictType) { int row = dictTypeMapper.insertDictType(dictType); - if (row > 0) - { + if (row > 0) { DictUtils.clearDictCache(); } return row; @@ -166,19 +150,17 @@ public class SysDictTypeServiceImpl implements ISysDictTypeService /** * 修改保存字典类型信息 - * + * * @param dictType 字典类型信息 * @return 结果 */ @Override @Transactional - public int updateDictType(SysDictType dictType) - { + public int updateDictType(SysDictType dictType) { SysDictType oldDict = dictTypeMapper.selectDictTypeById(dictType.getDictId()); dictDataMapper.updateDictDataType(oldDict.getDictType(), dictType.getDictType()); int row = dictTypeMapper.updateDictType(dictType); - if (row > 0) - { + if (row > 0) { DictUtils.clearDictCache(); } return row; @@ -186,17 +168,15 @@ public class SysDictTypeServiceImpl implements ISysDictTypeService /** * 校验字典类型称是否唯一 - * + * * @param dict 字典类型 * @return 结果 */ @Override - public String checkDictTypeUnique(SysDictType dict) - { + public String checkDictTypeUnique(SysDictType dict) { Long dictId = StringUtils.isNull(dict.getDictId()) ? -1L : dict.getDictId(); SysDictType dictType = dictTypeMapper.checkDictTypeUnique(dict.getDictType()); - if (StringUtils.isNotNull(dictType) && dictType.getDictId().longValue() != dictId.longValue()) - { + if (StringUtils.isNotNull(dictType) && dictType.getDictId().longValue() != dictId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysLogininforServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysLogininforServiceImpl.java index a3b5257c..bddfd4aa 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysLogininforServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysLogininforServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.system.domain.SysLogininfor; @@ -9,48 +10,44 @@ import com.ruoyi.system.service.ISysLogininforService; /** * 系统访问日志情况信息 服务层处理 - * + * * @author ruoyi */ @Service -public class SysLogininforServiceImpl implements ISysLogininforService -{ +public class SysLogininforServiceImpl implements ISysLogininforService { @Autowired private SysLogininforMapper logininforMapper; /** * 新增系统登录日志 - * + * * @param logininfor 访问日志对象 */ @Override - public void insertLogininfor(SysLogininfor logininfor) - { + public void insertLogininfor(SysLogininfor logininfor) { logininforMapper.insertLogininfor(logininfor); } /** * 查询系统登录日志集合 - * + * * @param logininfor 访问日志对象 * @return 登录记录集合 */ @Override - public List selectLogininforList(SysLogininfor logininfor) - { + public List selectLogininforList(SysLogininfor logininfor) { return logininforMapper.selectLogininforList(logininfor); } /** * 批量删除系统登录日志 - * + * * @param infoIds 需要删除的登录日志ID * @return */ @Override - public int deleteLogininforByIds(Long[] infoIds) - { + public int deleteLogininforByIds(Long[] infoIds) { return logininforMapper.deleteLogininforByIds(infoIds); } @@ -58,8 +55,7 @@ public class SysLogininforServiceImpl implements ISysLogininforService * 清空系统登录日志 */ @Override - public void cleanLogininfor() - { + public void cleanLogininfor() { logininforMapper.cleanLogininfor(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysMenuServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysMenuServiceImpl.java index 7083d8d4..5bd219d3 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysMenuServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysMenuServiceImpl.java @@ -8,6 +8,7 @@ import java.util.LinkedList; import java.util.List; import java.util.Set; import java.util.stream.Collectors; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.common.constant.UserConstants; @@ -26,12 +27,11 @@ import com.ruoyi.system.service.ISysMenuService; /** * 菜单 业务层处理 - * + * * @author ruoyi */ @Service -public class SysMenuServiceImpl implements ISysMenuService -{ +public class SysMenuServiceImpl implements ISysMenuService { public static final String PREMISSION_STRING = "perms[\"{0}\"]"; @Autowired @@ -45,33 +45,28 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 根据用户查询系统菜单列表 - * + * * @param userId 用户ID * @return 菜单列表 */ @Override - public List selectMenuList(Long userId) - { + public List selectMenuList(Long userId) { return selectMenuList(new SysMenu(), userId); } /** * 查询系统菜单列表 - * + * * @param menu 菜单信息 * @return 菜单列表 */ @Override - public List selectMenuList(SysMenu menu, Long userId) - { + public List selectMenuList(SysMenu menu, Long userId) { List menuList = null; // 管理员显示所有菜单信息 - if (SysUser.isAdmin(userId)) - { + if (SysUser.isAdmin(userId)) { menuList = menuMapper.selectMenuList(menu); - } - else - { + } else { menu.getParams().put("userId", userId); menuList = menuMapper.selectMenuListByUserId(menu); } @@ -80,19 +75,16 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 根据用户ID查询权限 - * + * * @param userId 用户ID * @return 权限列表 */ @Override - public Set selectMenuPermsByUserId(Long userId) - { + public Set selectMenuPermsByUserId(Long userId) { List perms = menuMapper.selectMenuPermsByUserId(userId); Set permsSet = new HashSet<>(); - for (String perm : perms) - { - if (StringUtils.isNotEmpty(perm)) - { + for (String perm : perms) { + if (StringUtils.isNotEmpty(perm)) { permsSet.addAll(Arrays.asList(perm.trim().split(","))); } } @@ -101,20 +93,16 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 根据用户ID查询菜单 - * + * * @param userId 用户名称 * @return 菜单列表 */ @Override - public List selectMenuTreeByUserId(Long userId) - { + public List selectMenuTreeByUserId(Long userId) { List menus = null; - if (SecurityUtils.isAdmin(userId)) - { + if (SecurityUtils.isAdmin(userId)) { menus = menuMapper.selectMenuTreeAll(); - } - else - { + } else { menus = menuMapper.selectMenuTreeByUserId(userId); } return getChildPerms(menus, 0); @@ -122,29 +110,26 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 根据角色ID查询菜单树信息 - * + * * @param roleId 角色ID * @return 选中菜单列表 */ @Override - public List selectMenuListByRoleId(Long roleId) - { + public List selectMenuListByRoleId(Long roleId) { SysRole role = roleMapper.selectRoleById(roleId); return menuMapper.selectMenuListByRoleId(roleId, role.isMenuCheckStrictly()); } /** * 构建前端路由所需要的菜单 - * + * * @param menus 菜单列表 * @return 路由列表 */ @Override - public List buildMenus(List menus) - { + public List buildMenus(List menus) { List routers = new LinkedList(); - for (SysMenu menu : menus) - { + for (SysMenu menu : menus) { RouterVo router = new RouterVo(); router.setHidden("1".equals(menu.getVisible())); router.setName(getRouteName(menu)); @@ -152,14 +137,11 @@ public class SysMenuServiceImpl implements ISysMenuService router.setComponent(getComponent(menu)); router.setMeta(new MetaVo(menu.getMenuName(), menu.getIcon(), StringUtils.equals("1", menu.getIsCache()))); List cMenus = menu.getChildren(); - if (!cMenus.isEmpty() && cMenus.size() > 0 && UserConstants.TYPE_DIR.equals(menu.getMenuType())) - { + if (!cMenus.isEmpty() && cMenus.size() > 0 && UserConstants.TYPE_DIR.equals(menu.getMenuType())) { router.setAlwaysShow(true); router.setRedirect("noRedirect"); router.setChildren(buildMenus(cMenus)); - } - else if (isMeunFrame(menu)) - { + } else if (isMeunFrame(menu)) { List childrenList = new ArrayList(); RouterVo children = new RouterVo(); children.setPath(menu.getPath()); @@ -176,31 +158,26 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 构建前端所需要树结构 - * + * * @param menus 菜单列表 * @return 树结构列表 */ @Override - public List buildMenuTree(List menus) - { + public List buildMenuTree(List menus) { List returnList = new ArrayList(); List tempList = new ArrayList(); - for (SysMenu dept : menus) - { + for (SysMenu dept : menus) { tempList.add(dept.getMenuId()); } - for (Iterator iterator = menus.iterator(); iterator.hasNext();) - { + for (Iterator iterator = menus.iterator(); iterator.hasNext(); ) { SysMenu menu = (SysMenu) iterator.next(); // 如果是顶级节点, 遍历该父节点的所有子节点 - if (!tempList.contains(menu.getParentId())) - { + if (!tempList.contains(menu.getParentId())) { recursionFn(menus, menu); returnList.add(menu); } } - if (returnList.isEmpty()) - { + if (returnList.isEmpty()) { returnList = menus; } return returnList; @@ -208,104 +185,95 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 构建前端所需要下拉树结构 - * + * * @param menus 菜单列表 * @return 下拉树结构列表 */ @Override - public List buildMenuTreeSelect(List menus) - { + public List buildMenuTreeSelect(List menus) { List menuTrees = buildMenuTree(menus); return menuTrees.stream().map(TreeSelect::new).collect(Collectors.toList()); } /** * 根据菜单ID查询信息 - * + * * @param menuId 菜单ID * @return 菜单信息 */ @Override - public SysMenu selectMenuById(Long menuId) - { + public SysMenu selectMenuById(Long menuId) { return menuMapper.selectMenuById(menuId); } /** * 是否存在菜单子节点 - * + * * @param menuId 菜单ID * @return 结果 */ @Override - public boolean hasChildByMenuId(Long menuId) - { + public boolean hasChildByMenuId(Long menuId) { int result = menuMapper.hasChildByMenuId(menuId); return result > 0 ? true : false; } /** * 查询菜单使用数量 - * + * * @param menuId 菜单ID * @return 结果 */ @Override - public boolean checkMenuExistRole(Long menuId) - { + public boolean checkMenuExistRole(Long menuId) { int result = roleMenuMapper.checkMenuExistRole(menuId); return result > 0 ? true : false; } /** * 新增保存菜单信息 - * + * * @param menu 菜单信息 * @return 结果 */ @Override - public int insertMenu(SysMenu menu) - { + public int insertMenu(SysMenu menu) { return menuMapper.insertMenu(menu); } /** * 修改保存菜单信息 - * + * * @param menu 菜单信息 * @return 结果 */ @Override - public int updateMenu(SysMenu menu) - { + public int updateMenu(SysMenu menu) { return menuMapper.updateMenu(menu); } /** * 删除菜单管理信息 - * + * * @param menuId 菜单ID * @return 结果 */ @Override - public int deleteMenuById(Long menuId) - { + public int deleteMenuById(Long menuId) { return menuMapper.deleteMenuById(menuId); } /** * 校验菜单名称是否唯一 - * + * * @param menu 菜单信息 * @return 结果 */ @Override - public String checkMenuNameUnique(SysMenu menu) - { + public String checkMenuNameUnique(SysMenu menu) { Long menuId = StringUtils.isNull(menu.getMenuId()) ? -1L : menu.getMenuId(); SysMenu info = menuMapper.checkMenuNameUnique(menu.getMenuName(), menu.getParentId()); - if (StringUtils.isNotNull(info) && info.getMenuId().longValue() != menuId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getMenuId().longValue() != menuId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -313,16 +281,14 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 获取路由名称 - * + * * @param menu 菜单信息 * @return 路由名称 */ - public String getRouteName(SysMenu menu) - { + public String getRouteName(SysMenu menu) { String routerName = StringUtils.capitalize(menu.getPath()); // 非外链并且是一级目录（类型为目录） - if (isMeunFrame(menu)) - { + if (isMeunFrame(menu)) { routerName = StringUtils.EMPTY; } return routerName; @@ -330,22 +296,19 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 获取路由地址 - * + * * @param menu 菜单信息 * @return 路由地址 */ - public String getRouterPath(SysMenu menu) - { + public String getRouterPath(SysMenu menu) { String routerPath = menu.getPath(); // 非外链并且是一级目录（类型为目录） if (0 == menu.getParentId().intValue() && UserConstants.TYPE_DIR.equals(menu.getMenuType()) - && UserConstants.NO_FRAME.equals(menu.getIsFrame())) - { + && UserConstants.NO_FRAME.equals(menu.getIsFrame())) { routerPath = "/" + menu.getPath(); } // 非外链并且是一级目录（类型为菜单） - else if (isMeunFrame(menu)) - { + else if (isMeunFrame(menu)) { routerPath = "/"; } return routerPath; @@ -353,19 +316,15 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 获取组件信息 - * + * * @param menu 菜单信息 * @return 组件信息 */ - public String getComponent(SysMenu menu) - { + public String getComponent(SysMenu menu) { String component = UserConstants.LAYOUT; - if (StringUtils.isNotEmpty(menu.getComponent()) && !isMeunFrame(menu)) - { + if (StringUtils.isNotEmpty(menu.getComponent()) && !isMeunFrame(menu)) { component = menu.getComponent(); - } - else if (StringUtils.isEmpty(menu.getComponent()) && isParentView(menu)) - { + } else if (StringUtils.isEmpty(menu.getComponent()) && isParentView(menu)) { component = UserConstants.PARENT_VIEW; } return component; @@ -373,43 +332,38 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 是否为菜单内部跳转 - * + * * @param menu 菜单信息 * @return 结果 */ - public boolean isMeunFrame(SysMenu menu) - { + public boolean isMeunFrame(SysMenu menu) { return menu.getParentId().intValue() == 0 && UserConstants.TYPE_MENU.equals(menu.getMenuType()) && menu.getIsFrame().equals(UserConstants.NO_FRAME); } /** * 是否为parent_view组件 - * + * * @param menu 菜单信息 * @return 结果 */ - public boolean isParentView(SysMenu menu) - { + public boolean isParentView(SysMenu menu) { return menu.getParentId().intValue() != 0 && UserConstants.TYPE_DIR.equals(menu.getMenuType()); } /** * 根据父节点的ID获取所有子节点 - * - * @param list 分类表 + * + * @param list 分类表 * @param parentId 传入的父节点ID * @return String */ - public List getChildPerms(List list, int parentId) - { + public List getChildPerms(List list, int parentId) { List returnList = new ArrayList(); - for (Iterator iterator = list.iterator(); iterator.hasNext();) - { + for (Iterator iterator = list.iterator(); iterator.hasNext(); ) { SysMenu t = (SysMenu) iterator.next(); // 一、根据传入的某个父节点ID,遍历该父节点的所有子节点 - if (t.getParentId() == parentId) - { + if (t.getParentId() == parentId) { recursionFn(list, t); returnList.add(t); } @@ -419,19 +373,16 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 递归列表 - * + * * @param list * @param t */ - private void recursionFn(List list, SysMenu t) - { + private void recursionFn(List list, SysMenu t) { // 得到子节点列表 List childList = getChildList(list, t); t.setChildren(childList); - for (SysMenu tChild : childList) - { - if (hasChild(list, tChild)) - { + for (SysMenu tChild : childList) { + if (hasChild(list, tChild)) { recursionFn(list, tChild); } } @@ -440,15 +391,12 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 得到子节点列表 */ - private List getChildList(List list, SysMenu t) - { + private List getChildList(List list, SysMenu t) { List tlist = new ArrayList(); Iterator it = list.iterator(); - while (it.hasNext()) - { + while (it.hasNext()) { SysMenu n = (SysMenu) it.next(); - if (n.getParentId().longValue() == t.getMenuId().longValue()) - { + if (n.getParentId().longValue() == t.getMenuId().longValue()) { tlist.add(n); } } @@ -458,8 +406,7 @@ public class SysMenuServiceImpl implements ISysMenuService /** * 判断是否有子节点 */ - private boolean hasChild(List list, SysMenu t) - { + private boolean hasChild(List list, SysMenu t) { return getChildList(list, t).size() > 0 ? true : false; } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysNoticeServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysNoticeServiceImpl.java index 765438b8..bdd94ac3 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysNoticeServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysNoticeServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.system.domain.SysNotice; @@ -9,84 +10,77 @@ import com.ruoyi.system.service.ISysNoticeService; /** * 公告 服务层实现 - * + * * @author ruoyi */ @Service -public class SysNoticeServiceImpl implements ISysNoticeService -{ +public class SysNoticeServiceImpl implements ISysNoticeService { @Autowired private SysNoticeMapper noticeMapper; /** * 查询公告信息 - * + * * @param noticeId 公告ID * @return 公告信息 */ @Override - public SysNotice selectNoticeById(Long noticeId) - { + public SysNotice selectNoticeById(Long noticeId) { return noticeMapper.selectNoticeById(noticeId); } /** * 查询公告列表 - * + * * @param notice 公告信息 * @return 公告集合 */ @Override - public List selectNoticeList(SysNotice notice) - { + public List selectNoticeList(SysNotice notice) { return noticeMapper.selectNoticeList(notice); } /** * 新增公告 - * + * * @param notice 公告信息 * @return 结果 */ @Override - public int insertNotice(SysNotice notice) - { + public int insertNotice(SysNotice notice) { return noticeMapper.insertNotice(notice); } /** * 修改公告 - * + * * @param notice 公告信息 * @return 结果 */ @Override - public int updateNotice(SysNotice notice) - { + public int updateNotice(SysNotice notice) { return noticeMapper.updateNotice(notice); } /** * 删除公告对象 - * + * * @param noticeId 公告ID * @return 结果 */ @Override - public int deleteNoticeById(Long noticeId) - { + public int deleteNoticeById(Long noticeId) { return noticeMapper.deleteNoticeById(noticeId); } /** * 批量删除公告信息 - * + * * @param noticeIds 需要删除的公告ID * @return 结果 */ @Override - public int deleteNoticeByIds(Long[] noticeIds) - { + public int deleteNoticeByIds(Long[] noticeIds) { return noticeMapper.deleteNoticeByIds(noticeIds); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysOperLogServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysOperLogServiceImpl.java index 54898152..0dc2ec77 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysOperLogServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysOperLogServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.system.domain.SysOperLog; @@ -9,59 +10,54 @@ import com.ruoyi.system.service.ISysOperLogService; /** * 操作日志 服务层处理 - * + * * @author ruoyi */ @Service -public class SysOperLogServiceImpl implements ISysOperLogService -{ +public class SysOperLogServiceImpl implements ISysOperLogService { @Autowired private SysOperLogMapper operLogMapper; /** * 新增操作日志 - * + * * @param operLog 操作日志对象 */ @Override - public void insertOperlog(SysOperLog operLog) - { + public void insertOperlog(SysOperLog operLog) { operLogMapper.insertOperlog(operLog); } /** * 查询系统操作日志集合 - * + * * @param operLog 操作日志对象 * @return 操作日志集合 */ @Override - public List selectOperLogList(SysOperLog operLog) - { + public List selectOperLogList(SysOperLog operLog) { return operLogMapper.selectOperLogList(operLog); } /** * 批量删除系统操作日志 - * + * * @param operIds 需要删除的操作日志ID * @return 结果 */ @Override - public int deleteOperLogByIds(Long[] operIds) - { + public int deleteOperLogByIds(Long[] operIds) { return operLogMapper.deleteOperLogByIds(operIds); } /** * 查询操作日志详细 - * + * * @param operId 操作ID * @return 操作日志对象 */ @Override - public SysOperLog selectOperLogById(Long operId) - { + public SysOperLog selectOperLogById(Long operId) { return operLogMapper.selectOperLogById(operId); } @@ -69,8 +65,7 @@ public class SysOperLogServiceImpl implements ISysOperLogService * 清空操作日志 */ @Override - public void cleanOperLog() - { + public void cleanOperLog() { operLogMapper.cleanOperLog(); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysPostServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysPostServiceImpl.java index c0da6d4d..9e93a8f9 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysPostServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysPostServiceImpl.java @@ -1,6 +1,7 @@ package com.ruoyi.system.service.impl; import java.util.List; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import com.ruoyi.common.constant.UserConstants; @@ -13,12 +14,11 @@ import com.ruoyi.system.service.ISysPostService; /** * 岗位信息 服务层处理 - * + * * @author ruoyi */ @Service -public class SysPostServiceImpl implements ISysPostService -{ +public class SysPostServiceImpl implements ISysPostService { @Autowired private SysPostMapper postMapper; @@ -27,64 +27,58 @@ public class SysPostServiceImpl implements ISysPostService /** * 查询岗位信息集合 - * + * * @param post 岗位信息 * @return 岗位信息集合 */ @Override - public List selectPostList(SysPost post) - { + public List selectPostList(SysPost post) { return postMapper.selectPostList(post); } /** * 查询所有岗位 - * + * * @return 岗位列表 */ @Override - public List selectPostAll() - { + public List selectPostAll() { return postMapper.selectPostAll(); } /** * 通过岗位ID查询岗位信息 - * + * * @param postId 岗位ID * @return 角色对象信息 */ @Override - public SysPost selectPostById(Long postId) - { + public SysPost selectPostById(Long postId) { return postMapper.selectPostById(postId); } /** * 根据用户ID获取岗位选择框列表 - * + * * @param userId 用户ID * @return 选中岗位ID列表 */ @Override - public List selectPostListByUserId(Long userId) - { + public List selectPostListByUserId(Long userId) { return postMapper.selectPostListByUserId(userId); } /** * 校验岗位名称是否唯一 - * + * * @param post 岗位信息 * @return 结果 */ @Override - public String checkPostNameUnique(SysPost post) - { + public String checkPostNameUnique(SysPost post) { Long postId = StringUtils.isNull(post.getPostId()) ? -1L : post.getPostId(); SysPost info = postMapper.checkPostNameUnique(post.getPostName()); - if (StringUtils.isNotNull(info) && info.getPostId().longValue() != postId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getPostId().longValue() != postId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -92,17 +86,15 @@ public class SysPostServiceImpl implements ISysPostService /** * 校验岗位编码是否唯一 - * + * * @param post 岗位信息 * @return 结果 */ @Override - public String checkPostCodeUnique(SysPost post) - { + public String checkPostCodeUnique(SysPost post) { Long postId = StringUtils.isNull(post.getPostId()) ? -1L : post.getPostId(); SysPost info = postMapper.checkPostCodeUnique(post.getPostCode()); - if (StringUtils.isNotNull(info) && info.getPostId().longValue() != postId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getPostId().longValue() != postId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -110,43 +102,38 @@ public class SysPostServiceImpl implements ISysPostService /** * 通过岗位ID查询岗位使用数量 - * + * * @param postId 岗位ID * @return 结果 */ @Override - public int countUserPostById(Long postId) - { + public int countUserPostById(Long postId) { return userPostMapper.countUserPostById(postId); } /** * 删除岗位信息 - * + * * @param postId 岗位ID * @return 结果 */ @Override - public int deletePostById(Long postId) - { + public int deletePostById(Long postId) { return postMapper.deletePostById(postId); } /** * 批量删除岗位信息 - * + * * @param postIds 需要删除的岗位ID * @return 结果 * @throws Exception 异常 */ @Override - public int deletePostByIds(Long[] postIds) - { - for (Long postId : postIds) - { + public int deletePostByIds(Long[] postIds) { + for (Long postId : postIds) { SysPost post = selectPostById(postId); - if (countUserPostById(postId) > 0) - { + if (countUserPostById(postId) > 0) { throw new CustomException(String.format("%1$s已分配,不能删除", post.getPostName())); } } @@ -155,25 +142,23 @@ public class SysPostServiceImpl implements ISysPostService /** * 新增保存岗位信息 - * + * * @param post 岗位信息 * @return 结果 */ @Override - public int insertPost(SysPost post) - { + public int insertPost(SysPost post) { return postMapper.insertPost(post); } /** * 修改保存岗位信息 - * + * * @param post 岗位信息 * @return 结果 */ @Override - public int updatePost(SysPost post) - { + public int updatePost(SysPost post) { return postMapper.updatePost(post); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysRoleServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysRoleServiceImpl.java index 22714721..657d1829 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysRoleServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysRoleServiceImpl.java @@ -5,6 +5,7 @@ import java.util.Arrays; import java.util.HashSet; import java.util.List; import java.util.Set; + import org.springframework.beans.factory.annotation.Autowired; import org.springframework.stereotype.Service; import org.springframework.transaction.annotation.Transactional; @@ -24,12 +25,11 @@ import com.ruoyi.system.service.ISysRoleService; /** * 角色 业务层处理 - * + * * @author ruoyi */ @Service -public class SysRoleServiceImpl implements ISysRoleService -{ +public class SysRoleServiceImpl implements ISysRoleService { @Autowired private SysRoleMapper roleMapper; @@ -44,32 +44,28 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 根据条件分页查询角色数据 - * + * * @param role 角色信息 * @return 角色数据集合信息 */ @Override @DataScope(deptAlias = "d") - public List selectRoleList(SysRole role) - { + public List selectRoleList(SysRole role) { return roleMapper.selectRoleList(role); } /** * 根据用户ID查询权限 - * + * * @param userId 用户ID * @return 权限列表 */ @Override - public Set selectRolePermissionByUserId(Long userId) - { + public Set selectRolePermissionByUserId(Long userId) { List perms = roleMapper.selectRolePermissionByUserId(userId); Set permsSet = new HashSet<>(); - for (SysRole perm : perms) - { - if (StringUtils.isNotNull(perm)) - { + for (SysRole perm : perms) { + if (StringUtils.isNotNull(perm)) { permsSet.addAll(Arrays.asList(perm.getRoleKey().trim().split(","))); } } @@ -78,52 +74,47 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 查询所有角色 - * + * * @return 角色列表 */ @Override - public List selectRoleAll() - { + public List selectRoleAll() { return SpringUtils.getAopProxy(this).selectRoleList(new SysRole()); } /** * 根据用户ID获取角色选择框列表 - * + * * @param userId 用户ID * @return 选中角色ID列表 */ @Override - public List selectRoleListByUserId(Long userId) - { + public List selectRoleListByUserId(Long userId) { return roleMapper.selectRoleListByUserId(userId); } /** * 通过角色ID查询角色 - * + * * @param roleId 角色ID * @return 角色对象信息 */ @Override - public SysRole selectRoleById(Long roleId) - { + public SysRole selectRoleById(Long roleId) { return roleMapper.selectRoleById(roleId); } /** * 校验角色名称是否唯一 - * + * * @param role 角色信息 * @return 结果 */ @Override - public String checkRoleNameUnique(SysRole role) - { + public String checkRoleNameUnique(SysRole role) { Long roleId = StringUtils.isNull(role.getRoleId()) ? -1L : role.getRoleId(); SysRole info = roleMapper.checkRoleNameUnique(role.getRoleName()); - if (StringUtils.isNotNull(info) && info.getRoleId().longValue() != roleId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getRoleId().longValue() != roleId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -131,17 +122,15 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 校验角色权限是否唯一 - * + * * @param role 角色信息 * @return 结果 */ @Override - public String checkRoleKeyUnique(SysRole role) - { + public String checkRoleKeyUnique(SysRole role) { Long roleId = StringUtils.isNull(role.getRoleId()) ? -1L : role.getRoleId(); SysRole info = roleMapper.checkRoleKeyUnique(role.getRoleKey()); - if (StringUtils.isNotNull(info) && info.getRoleId().longValue() != roleId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getRoleId().longValue() != roleId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -149,40 +138,36 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 校验角色是否允许操作 - * + * * @param role 角色信息 */ @Override - public void checkRoleAllowed(SysRole role) - { - if (StringUtils.isNotNull(role.getRoleId()) && role.isAdmin()) - { + public void checkRoleAllowed(SysRole role) { + if (StringUtils.isNotNull(role.getRoleId()) && role.isAdmin()) { throw new CustomException("不允许操作超级管理员角色"); } } /** * 通过角色ID查询角色使用数量 - * + * * @param roleId 角色ID * @return 结果 */ @Override - public int countUserRoleByRoleId(Long roleId) - { + public int countUserRoleByRoleId(Long roleId) { return userRoleMapper.countUserRoleByRoleId(roleId); } /** * 新增保存角色信息 - * + * * @param role 角色信息 * @return 结果 */ @Override @Transactional - public int insertRole(SysRole role) - { + public int insertRole(SysRole role) { // 新增角色信息 roleMapper.insertRole(role); return insertRoleMenu(role); @@ -190,14 +175,13 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 修改保存角色信息 - * + * * @param role 角色信息 * @return 结果 */ @Override @Transactional - public int updateRole(SysRole role) - { + public int updateRole(SysRole role) { // 修改角色信息 roleMapper.updateRole(role); // 删除角色与菜单关联 @@ -207,26 +191,24 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 修改角色状态 - * + * * @param role 角色信息 * @return 结果 */ @Override - public int updateRoleStatus(SysRole role) - { + public int updateRoleStatus(SysRole role) { return roleMapper.updateRole(role); } /** * 修改数据权限信息 - * + * * @param role 角色信息 * @return 结果 */ @Override @Transactional - public int authDataScope(SysRole role) - { + public int authDataScope(SysRole role) { // 修改角色信息 roleMapper.updateRole(role); // 删除角色与部门关联 @@ -237,23 +219,20 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 新增角色菜单信息 - * + * * @param role 角色对象 */ - public int insertRoleMenu(SysRole role) - { + public int insertRoleMenu(SysRole role) { int rows = 1; // 新增用户与角色管理 List list = new ArrayList(); - for (Long menuId : role.getMenuIds()) - { + for (Long menuId : role.getMenuIds()) { SysRoleMenu rm = new SysRoleMenu(); rm.setRoleId(role.getRoleId()); rm.setMenuId(menuId); list.add(rm); } - if (list.size() > 0) - { + if (list.size() > 0) { rows = roleMenuMapper.batchRoleMenu(list); } return rows; @@ -264,20 +243,17 @@ public class SysRoleServiceImpl implements ISysRoleService * * @param role 角色对象 */ - public int insertRoleDept(SysRole role) - { + public int insertRoleDept(SysRole role) { int rows = 1; // 新增角色与部门（数据权限）管理 List list = new ArrayList(); - for (Long deptId : role.getDeptIds()) - { + for (Long deptId : role.getDeptIds()) { SysRoleDept rd = new SysRoleDept(); rd.setRoleId(role.getRoleId()); rd.setDeptId(deptId); list.add(rd); } - if (list.size() > 0) - { + if (list.size() > 0) { rows = roleDeptMapper.batchRoleDept(list); } return rows; @@ -285,14 +261,13 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 通过角色ID删除角色 - * + * * @param roleId 角色ID * @return 结果 */ @Override @Transactional - public int deleteRoleById(Long roleId) - { + public int deleteRoleById(Long roleId) { // 删除角色与菜单关联 roleMenuMapper.deleteRoleMenuByRoleId(roleId); // 删除角色与部门关联 @@ -302,20 +277,17 @@ public class SysRoleServiceImpl implements ISysRoleService /** * 批量删除角色信息 - * + * * @param roleIds 需要删除的角色ID * @return 结果 */ @Override @Transactional - public int deleteRoleByIds(Long[] roleIds) - { - for (Long roleId : roleIds) - { + public int deleteRoleByIds(Long[] roleIds) { + for (Long roleId : roleIds) { checkRoleAllowed(new SysRole(roleId)); SysRole role = selectRoleById(roleId); - if (countUserRoleByRoleId(roleId) > 0) - { + if (countUserRoleByRoleId(roleId) > 0) { throw new CustomException(String.format("%1$s已分配,不能删除", role.getRoleName())); } } diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserOnlineServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserOnlineServiceImpl.java index f80a8771..f0a29982 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserOnlineServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserOnlineServiceImpl.java @@ -8,24 +8,21 @@ import com.ruoyi.system.service.ISysUserOnlineService; /** * 在线用户 服务层处理 - * + * * @author ruoyi */ @Service -public class SysUserOnlineServiceImpl implements ISysUserOnlineService -{ +public class SysUserOnlineServiceImpl implements ISysUserOnlineService { /** * 通过登录地址查询信息 - * + * * @param ipaddr 登录地址 - * @param user 用户信息 + * @param user 用户信息 * @return 在线用户信息 */ @Override - public SysUserOnline selectOnlineByIpaddr(String ipaddr, LoginUser user) - { - if (StringUtils.equals(ipaddr, user.getIpaddr())) - { + public SysUserOnline selectOnlineByIpaddr(String ipaddr, LoginUser user) { + if (StringUtils.equals(ipaddr, user.getIpaddr())) { return loginUserToUserOnline(user); } return null; @@ -33,16 +30,14 @@ public class SysUserOnlineServiceImpl implements ISysUserOnlineService /** * 通过用户名称查询信息 - * + * * @param userName 用户名称 - * @param user 用户信息 + * @param user 用户信息 * @return 在线用户信息 */ @Override - public SysUserOnline selectOnlineByUserName(String userName, LoginUser user) - { - if (StringUtils.equals(userName, user.getUsername())) - { + public SysUserOnline selectOnlineByUserName(String userName, LoginUser user) { + if (StringUtils.equals(userName, user.getUsername())) { return loginUserToUserOnline(user); } return null; @@ -50,17 +45,15 @@ public class SysUserOnlineServiceImpl implements ISysUserOnlineService /** * 通过登录地址/用户名称查询信息 - * - * @param ipaddr 登录地址 + * + * @param ipaddr 登录地址 * @param userName 用户名称 - * @param user 用户信息 + * @param user 用户信息 * @return 在线用户信息 */ @Override - public SysUserOnline selectOnlineByInfo(String ipaddr, String userName, LoginUser user) - { - if (StringUtils.equals(ipaddr, user.getIpaddr()) && StringUtils.equals(userName, user.getUsername())) - { + public SysUserOnline selectOnlineByInfo(String ipaddr, String userName, LoginUser user) { + if (StringUtils.equals(ipaddr, user.getIpaddr()) && StringUtils.equals(userName, user.getUsername())) { return loginUserToUserOnline(user); } return null; @@ -68,15 +61,13 @@ public class SysUserOnlineServiceImpl implements ISysUserOnlineService /** * 设置在线用户信息 - * + * * @param user 用户信息 * @return 在线用户 */ @Override - public SysUserOnline loginUserToUserOnline(LoginUser user) - { - if (StringUtils.isNull(user) || StringUtils.isNull(user.getUser())) - { + public SysUserOnline loginUserToUserOnline(LoginUser user) { + if (StringUtils.isNull(user) || StringUtils.isNull(user.getUser())) { return null; } SysUserOnline sysUserOnline = new SysUserOnline(); @@ -87,8 +78,7 @@ public class SysUserOnlineServiceImpl implements ISysUserOnlineService sysUserOnline.setBrowser(user.getBrowser()); sysUserOnline.setOs(user.getOs()); sysUserOnline.setLoginTime(user.getLoginTime()); - if (StringUtils.isNotNull(user.getUser().getDept())) - { + if (StringUtils.isNotNull(user.getUser().getDept())) { sysUserOnline.setDeptName(user.getUser().getDept().getDeptName()); } return sysUserOnline; diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserServiceImpl.java index b48a7de0..9d9697df 100644 --- a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserServiceImpl.java +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/SysUserServiceImpl.java @@ -2,6 +2,7 @@ package com.ruoyi.system.service.impl; import java.util.ArrayList; import java.util.List; + import org.slf4j.Logger; import org.slf4j.LoggerFactory; import org.springframework.beans.factory.annotation.Autowired; @@ -27,12 +28,11 @@ import com.ruoyi.system.service.ISysUserService; /** * 用户 业务层处理 - * + * * @author ruoyi */ @Service -public class SysUserServiceImpl implements ISysUserService -{ +public class SysUserServiceImpl implements ISysUserService { private static final Logger log = LoggerFactory.getLogger(SysUserServiceImpl.class); @Autowired @@ -55,58 +55,57 @@ public class SysUserServiceImpl implements ISysUserService /** * 根据条件分页查询用户列表 - * + * * @param user 用户信息 * @return 用户信息集合信息 */ @Override @DataScope(deptAlias = "d", userAlias = "u") - public List selectUserList(SysUser user) - { + public List selectUserList(SysUser user) { return userMapper.selectUserList(user); } /** * 通过用户名查询用户 - * + * * @param userName 用户名 * @return 用户对象信息 */ @Override - public SysUser selectUserByUserName(String userName) - { + public SysUser selectUserByUserName(String userName) { return userMapper.selectUserByUserName(userName); } + @Override + public SysUser selectUserByOpenId(String openId) { + return userMapper.selectUserByOpenId(openId); + } + /** * 通过用户ID查询用户 - * + * * @param userId 用户ID * @return 用户对象信息 */ @Override - public SysUser selectUserById(Long userId) - { + public SysUser selectUserById(Long userId) { return userMapper.selectUserById(userId); } /** * 查询用户所属角色组 - * + * * @param userName 用户名 * @return 结果 */ @Override - public String selectUserRoleGroup(String userName) - { + public String selectUserRoleGroup(String userName) { List list = roleMapper.selectRolesByUserName(userName); StringBuffer idsStr = new StringBuffer(); - for (SysRole role : list) - { + for (SysRole role : list) { idsStr.append(role.getRoleName()).append(","); } - if (StringUtils.isNotEmpty(idsStr.toString())) - { + if (StringUtils.isNotEmpty(idsStr.toString())) { return idsStr.substring(0, idsStr.length() - 1); } return idsStr.toString(); @@ -114,21 +113,18 @@ public class SysUserServiceImpl implements ISysUserService /** * 查询用户所属岗位组 - * + * * @param userName 用户名 * @return 结果 */ @Override - public String selectUserPostGroup(String userName) - { + public String selectUserPostGroup(String userName) { List list = postMapper.selectPostsByUserName(userName); StringBuffer idsStr = new StringBuffer(); - for (SysPost post : list) - { + for (SysPost post : list) { idsStr.append(post.getPostName()).append(","); } - if (StringUtils.isNotEmpty(idsStr.toString())) - { + if (StringUtils.isNotEmpty(idsStr.toString())) { return idsStr.substring(0, idsStr.length() - 1); } return idsStr.toString(); @@ -136,16 +132,14 @@ public class SysUserServiceImpl implements ISysUserService /** * 校验用户名称是否唯一 - * + * * @param userName 用户名称 * @return 结果 */ @Override - public String checkUserNameUnique(String userName) - { + public String checkUserNameUnique(String userName) { int count = userMapper.checkUserNameUnique(userName); - if (count > 0) - { + if (count > 0) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -158,12 +152,10 @@ public class SysUserServiceImpl implements ISysUserService * @return */ @Override - public String checkPhoneUnique(SysUser user) - { + public String checkPhoneUnique(SysUser user) { Long userId = StringUtils.isNull(user.getUserId()) ? -1L : user.getUserId(); SysUser info = userMapper.checkPhoneUnique(user.getPhonenumber()); - if (StringUtils.isNotNull(info) && info.getUserId().longValue() != userId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getUserId().longValue() != userId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -176,12 +168,10 @@ public class SysUserServiceImpl implements ISysUserService * @return */ @Override - public String checkEmailUnique(SysUser user) - { + public String checkEmailUnique(SysUser user) { Long userId = StringUtils.isNull(user.getUserId()) ? -1L : user.getUserId(); SysUser info = userMapper.checkEmailUnique(user.getEmail()); - if (StringUtils.isNotNull(info) && info.getUserId().longValue() != userId.longValue()) - { + if (StringUtils.isNotNull(info) && info.getUserId().longValue() != userId.longValue()) { return UserConstants.NOT_UNIQUE; } return UserConstants.UNIQUE; @@ -189,28 +179,25 @@ public class SysUserServiceImpl implements ISysUserService /** * 校验用户是否允许操作 - * + * * @param user 用户信息 */ @Override - public void checkUserAllowed(SysUser user) - { - if (StringUtils.isNotNull(user.getUserId()) && user.isAdmin()) - { + public void checkUserAllowed(SysUser user) { + if (StringUtils.isNotNull(user.getUserId()) && user.isAdmin()) { throw new CustomException("不允许操作超级管理员用户"); } } /** * 新增保存用户信息 - * + * * @param user 用户信息 * @return 结果 */ @Override @Transactional - public int insertUser(SysUser user) - { + public int insertUser(SysUser user) { // 新增用户信息 int rows = userMapper.insertUser(user); // 新增用户岗位关联 @@ -222,14 +209,13 @@ public class SysUserServiceImpl implements ISysUserService /** * 修改保存用户信息 - * + * * @param user 用户信息 * @return 结果 */ @Override @Transactional - public int updateUser(SysUser user) - { + public int updateUser(SysUser user) { Long userId = user.getUserId(); // 删除用户与角色关联 userRoleMapper.deleteUserRoleByUserId(userId); @@ -244,87 +230,78 @@ public class SysUserServiceImpl implements ISysUserService /** * 修改用户状态 - * + * * @param user 用户信息 * @return 结果 */ @Override - public int updateUserStatus(SysUser user) - { + public int updateUserStatus(SysUser user) { return userMapper.updateUser(user); } /** * 修改用户基本信息 - * + * * @param user 用户信息 * @return 结果 */ @Override - public int updateUserProfile(SysUser user) - { + public int updateUserProfile(SysUser user) { return userMapper.updateUser(user); } /** * 修改用户头像 - * + * * @param userName 用户名 - * @param avatar 头像地址 + * @param avatar 头像地址 * @return 结果 */ @Override - public boolean updateUserAvatar(String userName, String avatar) - { + public boolean updateUserAvatar(String userName, String avatar) { return userMapper.updateUserAvatar(userName, avatar) > 0; } /** * 重置用户密码 - * + * * @param user 用户信息 * @return 结果 */ @Override - public int resetPwd(SysUser user) - { + public int resetPwd(SysUser user) { return userMapper.updateUser(user); } /** * 重置用户密码 - * + * * @param userName 用户名 * @param password 密码 * @return 结果 */ @Override - public int resetUserPwd(String userName, String password) - { + public int resetUserPwd(String userName, String password) { return userMapper.resetUserPwd(userName, password); } /** * 新增用户角色信息 - * + * * @param user 用户对象 */ - public void insertUserRole(SysUser user) - { + public void insertUserRole(SysUser user) { Long[] roles = user.getRoleIds(); - if (StringUtils.isNotNull(roles)) - { + if (StringUtils.isNotNull(roles)) { // 新增用户与角色管理 List list = new ArrayList(); - for (Long roleId : roles) - { + for (Long roleId : roles) { SysUserRole ur = new SysUserRole(); ur.setUserId(user.getUserId()); ur.setRoleId(roleId); list.add(ur); } - if (list.size() > 0) - { + if (list.size() > 0) { userRoleMapper.batchUserRole(list); } } @@ -332,25 +309,21 @@ public class SysUserServiceImpl implements ISysUserService /** * 新增用户岗位信息 - * + * * @param user 用户对象 */ - public void insertUserPost(SysUser user) - { + public void insertUserPost(SysUser user) { Long[] posts = user.getPostIds(); - if (StringUtils.isNotNull(posts)) - { + if (StringUtils.isNotNull(posts)) { // 新增用户与岗位管理 List list = new ArrayList(); - for (Long postId : posts) - { + for (Long postId : posts) { SysUserPost up = new SysUserPost(); up.setUserId(user.getUserId()); up.setPostId(postId); list.add(up); } - if (list.size() > 0) - { + if (list.size() > 0) { userPostMapper.batchUserPost(list); } } @@ -358,14 +331,13 @@ public class SysUserServiceImpl implements ISysUserService /** * 通过用户ID删除用户 - * + * * @param userId 用户ID * @return 结果 */ @Override @Transactional - public int deleteUserById(Long userId) - { + public int deleteUserById(Long userId) { // 删除用户与角色关联 userRoleMapper.deleteUserRoleByUserId(userId); // 删除用户与岗位表 @@ -375,16 +347,14 @@ public class SysUserServiceImpl implements ISysUserService /** * 批量删除用户信息 - * + * * @param userIds 需要删除的用户ID * @return 结果 */ @Override @Transactional - public int deleteUserByIds(Long[] userIds) - { - for (Long userId : userIds) - { + public int deleteUserByIds(Long[] userIds) { + for (Long userId : userIds) { checkUserAllowed(new SysUser(userId)); } // 删除用户与角色关联 @@ -396,17 +366,15 @@ public class SysUserServiceImpl implements ISysUserService /** * 导入用户数据 - * - * @param userList 用户数据列表 + * + * @param userList 用户数据列表 * @param isUpdateSupport 是否更新支持，如果已存在，则进行更新数据 - * @param operName 操作用户 + * @param operName 操作用户 * @return 结果 */ @Override - public String importUser(List userList, Boolean isUpdateSupport, String operName) - { - if (StringUtils.isNull(userList) || userList.size() == 0) - { + public String importUser(List userList, Boolean isUpdateSupport, String operName) { + if (StringUtils.isNull(userList) || userList.size() == 0) { throw new CustomException("导入用户数据不能为空！"); } int successNum = 0; @@ -414,48 +382,36 @@ public class SysUserServiceImpl implements ISysUserService StringBuilder successMsg = new StringBuilder(); StringBuilder failureMsg = new StringBuilder(); String password = configService.selectConfigByKey("sys.user.initPassword"); - for (SysUser user : userList) - { - try - { + for (SysUser user : userList) { + try { // 验证是否存在这个用户 SysUser u = userMapper.selectUserByUserName(user.getUserName()); - if (StringUtils.isNull(u)) - { + if (StringUtils.isNull(u)) { user.setPassword(SecurityUtils.encryptPassword(password)); user.setCreateBy(operName); this.insertUser(user); successNum++; successMsg.append("
" + successNum + "、账号 " + user.getUserName() + " 导入成功"); - } - else if (isUpdateSupport) - { + } else if (isUpdateSupport) { user.setUpdateBy(operName); this.updateUser(user); successNum++; successMsg.append("
" + successNum + "、账号 " + user.getUserName() + " 更新成功"); - } - else - { + } else { failureNum++; failureMsg.append("
" + failureNum + "、账号 " + user.getUserName() + " 已存在"); } - } - catch (Exception e) - { + } catch (Exception e) { failureNum++; String msg = "
" + failureNum + "、账号 " + user.getUserName() + " 导入失败："; failureMsg.append(msg + e.getMessage()); log.error(msg, e); } } - if (failureNum > 0) - { + if (failureNum > 0) { failureMsg.insert(0, "很抱歉，导入失败！共 " + failureNum + " 条数据格式不正确，错误如下："); throw new CustomException(failureMsg.toString()); - } - else - { + } else { successMsg.insert(0, "恭喜您，数据已全部导入成功！共 " + successNum + " 条，数据如下："); } return successMsg.toString(); diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserAccountInfoServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserAccountInfoServiceImpl.java new file mode 100644 index 00000000..ac820062 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserAccountInfoServiceImpl.java @@ -0,0 +1,87 @@ +package com.ruoyi.system.service.impl; + +import java.util.List; + +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.stereotype.Service; +import com.ruoyi.system.mapper.TUserAccountInfoMapper; +import com.ruoyi.system.domain.TUserAccountInfo; +import com.ruoyi.system.service.ITUserAccountInfoService; + +/** + * 小程序用户Service业务层处理 + * + * @author wxy + * @date 2021-08-26 + */ +@Service +public class TUserAccountInfoServiceImpl implements ITUserAccountInfoService { + @Autowired + private TUserAccountInfoMapper tUserAccountInfoMapper; + + /** + * 查询小程序用户 + * + * @param id 小程序用户ID + * @return 小程序用户 + */ + @Override + public TUserAccountInfo selectTUserAccountInfoById(Long id) { + return tUserAccountInfoMapper.selectTUserAccountInfoById(id); + } + + /** + * 查询小程序用户列表 + * + * @param tUserAccountInfo 小程序用户 + * @return 小程序用户 + */ + @Override + public List selectTUserAccountInfoList(TUserAccountInfo tUserAccountInfo) { + return tUserAccountInfoMapper.selectTUserAccountInfoList(tUserAccountInfo); + } + + /** + * 新增小程序用户 + * + * @param tUserAccountInfo 小程序用户 + * @return 结果 + */ + @Override + public int insertTUserAccountInfo(TUserAccountInfo tUserAccountInfo) { + return tUserAccountInfoMapper.insertTUserAccountInfo(tUserAccountInfo); + } + + /** + * 修改小程序用户 + * + * @param tUserAccountInfo 小程序用户 + * @return 结果 + */ + @Override + public int updateTUserAccountInfo(TUserAccountInfo tUserAccountInfo) { + return tUserAccountInfoMapper.updateTUserAccountInfo(tUserAccountInfo); + } + + /** + * 批量删除小程序用户 + * + * @param ids 需要删除的小程序用户ID + * @return 结果 + */ + @Override + public int deleteTUserAccountInfoByIds(Long[] ids) { + return tUserAccountInfoMapper.deleteTUserAccountInfoByIds(ids); + } + + /** + * 删除小程序用户信息 + * + * @param id 小程序用户ID + * @return 结果 + */ + @Override + public int deleteTUserAccountInfoById(Long id) { + return tUserAccountInfoMapper.deleteTUserAccountInfoById(id); + } +} diff --git a/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserLoginLogServiceImpl.java b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserLoginLogServiceImpl.java new file mode 100644 index 00000000..83e7c1e5 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/java/com/ruoyi/system/service/impl/TUserLoginLogServiceImpl.java @@ -0,0 +1,87 @@ +package com.ruoyi.system.service.impl; + +import java.util.List; + +import org.springframework.beans.factory.annotation.Autowired; +import org.springframework.stereotype.Service; +import com.ruoyi.system.mapper.TUserLoginLogMapper; +import com.ruoyi.system.domain.TUserLoginLog; +import com.ruoyi.system.service.ITUserLoginLogService; + +/** + * 【请填写功能名称】Service业务层处理 + * + * @author wxy + * @date 2021-08-26 + */ +@Service +public class TUserLoginLogServiceImpl implements ITUserLoginLogService { + @Autowired + private TUserLoginLogMapper tUserLoginLogMapper; + + /** + * 查询【请填写功能名称】 + * + * @param id 【请填写功能名称】ID + * @return 【请填写功能名称】 + */ + @Override + public TUserLoginLog selectTUserLoginLogById(Long id) { + return tUserLoginLogMapper.selectTUserLoginLogById(id); + } + + /** + * 查询【请填写功能名称】列表 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 【请填写功能名称】 + */ + @Override + public List selectTUserLoginLogList(TUserLoginLog tUserLoginLog) { + return tUserLoginLogMapper.selectTUserLoginLogList(tUserLoginLog); + } + + /** + * 新增【请填写功能名称】 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 结果 + */ + @Override + public int insertTUserLoginLog(TUserLoginLog tUserLoginLog) { + return tUserLoginLogMapper.insertTUserLoginLog(tUserLoginLog); + } + + /** + * 修改【请填写功能名称】 + * + * @param tUserLoginLog 【请填写功能名称】 + * @return 结果 + */ + @Override + public int updateTUserLoginLog(TUserLoginLog tUserLoginLog) { + return tUserLoginLogMapper.updateTUserLoginLog(tUserLoginLog); + } + + /** + * 批量删除【请填写功能名称】 + * + * @param ids 需要删除的【请填写功能名称】ID + * @return 结果 + */ + @Override + public int deleteTUserLoginLogByIds(Long[] ids) { + return tUserLoginLogMapper.deleteTUserLoginLogByIds(ids); + } + + /** + * 删除【请填写功能名称】信息 + * + * @param id 【请填写功能名称】ID + * @return 结果 + */ + @Override + public int deleteTUserLoginLogById(Long id) { + return tUserLoginLogMapper.deleteTUserLoginLogById(id); + } +} diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotCategoryMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotCategoryMapper.xml index b360e642..d7edf4d7 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotCategoryMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotCategoryMapper.xml @@ -1,17 +1,17 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - + + + + + + + @@ -22,15 +22,17 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" del_flag= '0' - and category_name like concat('%', #{categoryName}, '%') + and category_name like concat('%', #{categoryName}, + '%') + - + - + insert into iot_category @@ -40,7 +42,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" update_by, update_time, remark, - + #{categoryName}, #{createBy}, @@ -48,7 +50,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" #{updateBy}, #{updateTime}, #{remark}, - + diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceMapper.xml index 1ffe0124..907763e0 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceMapper.xml @@ -1,93 +1,154 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - - - - - + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + - select d.device_id, d.device_num, d.category_id, d.device_name, d.firmware_version, d.owner_id, d.create_by, d.create_time, d.update_by, d.update_time, d.remark, - c.category_name, - s.device_temperature as device_temp + select d.device_id, d.device_num, d.category_id, d.device_name, d.firmware_version, d.owner_id,d.status, d.create_by, + d.create_time, d.update_by, d.update_time, d.remark, + c.category_name, + s.device_temperature as device_temp from iot_device d - left join iot_category c on d.category_id=c.category_id - left join (select device_id,device_temperature from iot_device_status - right join (select max(device_status_id) as status_id from iot_device_status group by device_id) mt - on mt.status_id=device_status_id ) as s - on d.device_id=s.device_id + left join iot_category c on d.category_id=c.category_id + left join (select device_id,device_temperature from iot_device_status + right join (select max(device_status_id) as status_id from iot_device_status group by device_id) mt + on mt.status_id=device_status_id ) as s + on d.device_id=s.device_id - select d.device_id, d.device_num, d.category_id, d.device_name, d.firmware_version, d.owner_id, d.create_time, - s.relay_status,s.light_status,s.is_online,s.rssi,s.device_temperature, - t.network_address, t.network_ip,t.is_alarm, t.is_radar,t.is_rf_control, - u.nick_name, - c.category_name - ,g.group_id + select d.device_id,d.status, d.device_num, d.category_id, d.device_name, d.firmware_version, d.owner_id, d.create_time, + s.relay_status,s.light_status,s.is_online,s.rssi,s.device_temperature, + t.network_address, t.network_ip,t.is_alarm, t.is_radar,t.is_rf_control, + u.nick_name, + c.category_name + ,g.group_id from iot_device d - left join (select * from iot_device_set - right join (select max(device_set_id) as set_id from iot_device_set group by device_id) ms on ms.set_id=device_set_id ) as t - on d.device_id = t.device_id - left join (select * from iot_device_status - right join (select max(device_status_id) as status_id from iot_device_status group by device_id) mt on mt.status_id=device_status_id ) as s - on d.device_id=s.device_id - left join sys_user u on d.owner_id=u.user_id - left join iot_category c on d.category_id=c.category_id - left join iot_device_group g on d.device_id=g.device_id + left join (select * from iot_device_set + right join (select max(device_set_id) as set_id from iot_device_set group by device_id) ms on + ms.set_id=device_set_id ) as t + on d.device_id = t.device_id + left join (select * from iot_device_status + right join (select max(device_status_id) as status_id from iot_device_status group by device_id) mt on + mt.status_id=device_status_id ) as s + on d.device_id=s.device_id + left join sys_user u on d.owner_id=u.user_id + left join iot_category c on d.category_id=c.category_id + left join iot_device_group g on d.device_id=g.device_id + + SELECT + t2.device_id, + t2.status, + t2.device_num, + t2.category_id, + t1.device_name, + t2.firmware_version, + t2.owner_id, + t2.create_time, + s.relay_status, + s.light_status, + s.is_online, + s.rssi, + s.device_temperature, + t.network_address, + t.network_ip, + t.is_alarm, + t.is_radar, + t.is_rf_control, + t4.nick_name, + t3.category_name, + t1.remark + FROM + iot_device_user_relation t1 + LEFT JOIN iot_device t2 ON t1.device_id = t2.device_id + AND t1.user_id = #{ownerId} + LEFT JOIN sys_user t4 on t4.user_id = t1.user_id + LEFT JOIN iot_category t3 ON t3.category_id = t2.category_id + LEFT JOIN ( + SELECT + * + FROM + iot_device_set + RIGHT JOIN ( SELECT max( device_set_id ) AS set_id FROM iot_device_set GROUP BY device_id ) ms ON ms.set_id = device_set_id + ) AS t ON t2.device_id = t.device_id + LEFT JOIN ( + SELECT + * + FROM + iot_device_status + RIGHT JOIN ( SELECT max( device_status_id ) AS status_id FROM iot_device_status GROUP BY device_id ) mt ON mt.status_id = device_status_id + ) AS s ON t2.device_id = s.device_id + - + - + insert into iot_device @@ -106,24 +167,27 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" device_name, firmware_version, owner_id, + status, + create_by, create_time, update_by, update_time, remark, - + #{deviceNum}, #{categoryId}, #{deviceName}, #{firmwareVersion}, #{ownerId}, + #{status}, #{createBy}, #{createTime}, #{updateBy}, #{updateTime}, #{remark}, - + @@ -134,6 +198,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" device_name = #{deviceName}, firmware_version = #{firmwareVersion}, owner_id = #{ownerId}, + status = #{status}, create_by = #{createBy}, create_time = #{createTime}, update_by = #{updateBy}, @@ -153,4 +218,66 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" #{deviceId} + + + + + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceSetMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceSetMapper.xml index 285a1b15..33b96c00 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceSetMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceSetMapper.xml @@ -1,60 +1,67 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + - select device_set_id, device_id, device_num, is_alarm, is_radar, is_host, is_reset, is_ap, is_wifi_offline, is_open_certifi, is_smart_config, is_rf_control, is_rf_learn, is_rf_clear, rf_one_func, rf_two_func, rf_three_func, rf_four_func, owner_id, network_address, network_ip,radar_interval, create_by, create_time, update_by, update_time, remark from iot_device_set + select device_set_id, device_id, device_num, is_alarm, is_radar, is_host, is_reset, is_ap, is_wifi_offline, + is_open_certifi, is_smart_config, is_rf_control, is_rf_learn, is_rf_clear, rf_one_func, rf_two_func, + rf_three_func, rf_four_func, owner_id, network_address, network_ip,radar_interval, create_by, create_time, + update_by, update_time, remark from iot_device_set - + - + insert into iot_device_set @@ -97,7 +104,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" update_by, update_time, remark, - + #{deviceSetId}, #{deviceId}, @@ -126,7 +133,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" #{updateBy}, #{updateTime}, #{remark}, - + diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceStatusMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceStatusMapper.xml index e87232dc..49ae7adb 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceStatusMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceStatusMapper.xml @@ -1,54 +1,58 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + - select device_status_id, device_id, device_num, relay_status, light_status, is_online, device_temperature, rssi, air_temperature, air_humidity, trigger_source, brightness, light_interval, light_mode,fade_time, red, green, blue, create_by, create_time, update_by, update_time, remark from iot_device_status + select device_status_id, device_id, device_num, relay_status, light_status, is_online, device_temperature, rssi, + air_temperature, air_humidity, trigger_source, brightness, light_interval, light_mode,fade_time, red, green, + blue, create_by, create_time, update_by, update_time, remark from iot_device_status - + - - + + insert into iot_device_status device_id, @@ -93,7 +98,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" update_by, update_time, remark, - + #{deviceId}, #{deviceNum}, @@ -117,7 +122,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" #{updateBy}, #{updateTime}, #{remark}, - + diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceUserRelationMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceUserRelationMapper.xml new file mode 100644 index 00000000..81c00ede --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotDeviceUserRelationMapper.xml @@ -0,0 +1,126 @@ + + + + + + + + + + + + + + + + + select id, user_id, device_id, device_num,device_name,remark, gmt_time, gmt_update from iot_device_user_relation + + + + + + + + insert into iot_device_user_relation + + user_id, + + device_id, + + device_num, + + device_name, + + remark, + + gmt_time, + + gmt_update, + + + + #{userId}, + + #{deviceId}, + + #{deviceNum}, + + #{deviceName}, + + #{remark}, + + + #{gmtTime}, + + #{gmtUpdate}, + + + + + + update iot_device_user_relation + + user_id = + #{userId}, + + device_id = + #{deviceId}, + + device_num = + #{deviceNum}, + + device_name = + #{deviceName}, + + remark = + #{remark}, + + gmt_time = + #{gmtTime}, + + gmt_update = + #{gmtUpdate}, + + + where id = #{id} + + + + delete from iot_device_user_relation where id = #{id} + + + + delete from iot_device_user_relation where id in + + #{id} + + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotGroupMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotGroupMapper.xml index ec7a4b74..ba188a3f 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotGroupMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/IotGroupMapper.xml @@ -1,40 +1,43 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - - + + + + + + + + + + - select group_id, user_id, group_name, group_order, del_flag, create_by, create_time, update_by, update_time, remark from iot_group + select group_id, user_id, group_name, group_order, del_flag, create_by, create_time, update_by, update_time, + remark from iot_group - + - + insert into iot_group @@ -47,7 +50,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" update_by, update_time, remark, - + #{userId}, #{groupName}, @@ -58,7 +61,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" #{updateBy}, #{updateTime}, #{remark}, - + @@ -82,7 +85,7 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" - delete from iot_group where group_id in + delete from iot_group where group_id in #{groupId} diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysConfigMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysConfigMapper.xml index 8b979061..35f3e922 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysConfigMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysConfigMapper.xml @@ -1,91 +1,92 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - + + + + + + + + + - + - select config_id, config_name, config_key, config_value, config_type, create_by, create_time, update_by, update_time, remark - from sys_config + select config_id, config_name, config_key, config_value, config_type, create_by, create_time, update_by, + update_time, remark + from sys_config - + - - - - and config_id = #{configId} - - - and config_key = #{configKey} - - - - + + + + and config_id = #{configId} + + + and config_key = #{configKey} + + + + - + - + - + insert into sys_config ( - config_name, - config_key, - config_value, - config_type, - create_by, - remark, - create_time + config_name, + config_key, + config_value, + config_type, + create_by, + remark, + create_time )values( - #{configName}, - #{configKey}, - #{configValue}, - #{configType}, - #{createBy}, - #{remark}, - sysdate() - ) + #{configName}, + #{configKey}, + #{configValue}, + #{configType}, + #{createBy}, + #{remark}, + sysdate() + ) - + - update sys_config + update sys_config config_name = #{configName}, config_key = #{configKey}, @@ -93,20 +94,20 @@ PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" config_type = #{configType}, update_by = #{updateBy}, remark = #{remark}, - update_time = sysdate() + update_time = sysdate() where config_id = #{configId} - + delete from sys_config where config_id = #{configId} - + - delete from sys_config where config_id in + delete from sys_config where config_id in - #{configId} + #{configId} - + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDeptMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDeptMapper.xml index 8777b406..d7f454a0 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDeptMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDeptMapper.xml @@ -1,157 +1,159 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - - - select d.dept_id, d.parent_id, d.ancestors, d.dept_name, d.order_num, d.leader, d.phone, d.email, d.status, d.del_flag, d.create_by, d.create_time + + + + + + + + + + + + + + + + + + + + select d.dept_id, d.parent_id, d.ancestors, d.dept_name, d.order_num, d.leader, d.phone, d.email, d.status, + d.del_flag, d.create_by, d.create_time from sys_dept d - - where d.del_flag = '0' - AND parent_id = #{parentId} - - - AND dept_name like concat('%', #{deptName}, '%') - - - AND status = #{status} - - - ${params.dataScope} - order by d.parent_id, d.order_num + AND parent_id = #{parentId} + + + AND dept_name like concat('%', #{deptName}, '%') + + + AND status = #{status} + + + ${params.dataScope} + order by d.parent_id, d.order_num - + - + + and d.dept_id not in (select d.parent_id from sys_dept d inner join sys_role_dept rd on d.dept_id = + rd.dept_id and rd.role_id = #{roleId}) + + order by d.parent_id, d.order_num + + - + + where dept_id = #{deptId} + + - - - - - - - - - + select count(1) from sys_user where dept_id = #{deptId} and del_flag = '0' + + + + + + + + + + - insert into sys_dept( - dept_id, - parent_id, - dept_name, - ancestors, - order_num, - leader, - phone, - email, - status, - create_by, - create_time - )values( - #{deptId}, - #{parentId}, - #{deptName}, - #{ancestors}, - #{orderNum}, - #{leader}, - #{phone}, - #{email}, - #{status}, - #{createBy}, - sysdate() - ) - - - - update sys_dept - - parent_id = #{parentId}, - dept_name = #{deptName}, - ancestors = #{ancestors}, - order_num = #{orderNum}, - leader = #{leader}, - phone = #{phone}, - email = #{email}, - status = #{status}, - update_by = #{updateBy}, - update_time = sysdate() - - where dept_id = #{deptId} - - - - update sys_dept set ancestors = - - when #{item.deptId} then #{item.ancestors} - - where dept_id in - - #{item.deptId} - - - - - update sys_dept - - status = #{status}, - update_by = #{updateBy}, - update_time = sysdate() + insert into sys_dept( + dept_id, + parent_id, + dept_name, + ancestors, + order_num, + leader, + phone, + email, + status, + create_by, + create_time + )values( + #{deptId}, + #{parentId}, + #{deptName}, + #{ancestors}, + #{orderNum}, + #{leader}, + #{phone}, + #{email}, + #{status}, + #{createBy}, + sysdate() + ) + + + + update sys_dept + + parent_id = #{parentId}, + dept_name = #{deptName}, + ancestors = #{ancestors}, + order_num = #{orderNum}, + leader = #{leader}, + phone = #{phone}, + email = #{email}, + status = #{status}, + update_by = #{updateBy}, + update_time = sysdate() - where dept_id in (${ancestors}) - - - - update sys_dept set del_flag = '2' where dept_id = #{deptId} - + where dept_id = #{deptId} + + + + update sys_dept set ancestors = + + when #{item.deptId} then #{item.ancestors} + + where dept_id in + + #{item.deptId} + + + + + update sys_dept + + status = #{status}, + update_by = #{updateBy}, + update_time = sysdate() + + where dept_id in (${ancestors}) + + + + update sys_dept set del_flag = '2' where dept_id = #{deptId} + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictDataMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictDataMapper.xml index 8da9030b..814a4db4 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictDataMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictDataMapper.xml @@ -1,124 +1,125 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - - select dict_code, dict_sort, dict_label, dict_value, dict_type, css_class, list_class, is_default, status, create_by, create_time, remark - from sys_dict_data + + + + + + + + + + + + + + + + + + + select dict_code, dict_sort, dict_label, dict_value, dict_type, css_class, list_class, is_default, status, + create_by, create_time, remark + from sys_dict_data - - - - - - - - - - - - delete from sys_dict_data where dict_code = #{dictCode} - - - - delete from sys_dict_data where dict_code in - - #{dictCode} - - - - - update sys_dict_data - - dict_sort = #{dictSort}, - dict_label = #{dictLabel}, - dict_value = #{dictValue}, - dict_type = #{dictType}, - css_class = #{cssClass}, - list_class = #{listClass}, - is_default = #{isDefault}, - status = #{status}, - remark = #{remark}, - update_by = #{updateBy}, - update_time = sysdate() - - where dict_code = #{dictCode} - - - - update sys_dict_data set dict_type = #{newDictType} where dict_type = #{oldDictType} - - - - insert into sys_dict_data( - dict_sort, - dict_label, - dict_value, - dict_type, - css_class, - list_class, - is_default, - status, - remark, - create_by, - create_time - )values( - #{dictSort}, - #{dictLabel}, - #{dictValue}, - #{dictType}, - #{cssClass}, - #{listClass}, - #{isDefault}, - #{status}, - #{remark}, - #{createBy}, - sysdate() - ) - - + + + + + + + + + + + + delete from sys_dict_data where dict_code = #{dictCode} + + + + delete from sys_dict_data where dict_code in + + #{dictCode} + + + + + update sys_dict_data + + dict_sort = #{dictSort}, + dict_label = #{dictLabel}, + dict_value = #{dictValue}, + dict_type = #{dictType}, + css_class = #{cssClass}, + list_class = #{listClass}, + is_default = #{isDefault}, + status = #{status}, + remark = #{remark}, + update_by = #{updateBy}, + update_time = sysdate() + + where dict_code = #{dictCode} + + + + update sys_dict_data set dict_type = #{newDictType} where dict_type = #{oldDictType} + + + + insert into sys_dict_data( + dict_sort, + dict_label, + dict_value, + dict_type, + css_class, + list_class, + is_default, + status, + remark, + create_by, + create_time + )values( + #{dictSort}, + #{dictLabel}, + #{dictValue}, + #{dictType}, + #{cssClass}, + #{listClass}, + #{isDefault}, + #{status}, + #{remark}, + #{createBy}, + sysdate() + ) + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictTypeMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictTypeMapper.xml index 55b4075f..546afc54 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictTypeMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysDictTypeMapper.xml @@ -1,105 +1,105 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - select dict_id, dict_name, dict_type, status, create_by, create_time, remark - from sys_dict_type + + + + + + + + + + + + + select dict_id, dict_name, dict_type, status, create_by, create_time, remark + from sys_dict_type - - - - - - - - - - - - delete from sys_dict_type where dict_id = #{dictId} - - - - delete from sys_dict_type where dict_id in - - #{dictId} - - + + + + + + + + + + + + delete from sys_dict_type where dict_id = #{dictId} + + + + delete from sys_dict_type where dict_id in + + #{dictId} + + + + + update sys_dict_type + + dict_name = #{dictName}, + dict_type = #{dictType}, + status = #{status}, + remark = #{remark}, + update_by = #{updateBy}, + update_time = sysdate() + + where dict_id = #{dictId} + + + + insert into sys_dict_type( + dict_name, + dict_type, + status, + remark, + create_by, + create_time + )values( + #{dictName}, + #{dictType}, + #{status}, + #{remark}, + #{createBy}, + sysdate() + ) + - - update sys_dict_type - - dict_name = #{dictName}, - dict_type = #{dictType}, - status = #{status}, - remark = #{remark}, - update_by = #{updateBy}, - update_time = sysdate() - - where dict_id = #{dictId} - - - - insert into sys_dict_type( - dict_name, - dict_type, - status, - remark, - create_by, - create_time - )values( - #{dictName}, - #{dictType}, - #{status}, - #{remark}, - #{createBy}, - sysdate() - ) - - \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysLogininforMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysLogininforMapper.xml index b8178fa3..add7d539 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysLogininforMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysLogininforMapper.xml @@ -1,57 +1,57 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - + + + + + + + + + + + + + + insert into sys_logininfor (user_name, status, ipaddr, login_location, browser, os, msg, login_time) + values (#{userName}, #{status}, #{ipaddr}, #{loginLocation}, #{browser}, #{os}, #{msg}, sysdate()) + + + + + + delete from sys_logininfor where info_id in + + #{infoId} + + - - insert into sys_logininfor (user_name, status, ipaddr, login_location, browser, os, msg, login_time) - values (#{userName}, #{status}, #{ipaddr}, #{loginLocation}, #{browser}, #{os}, #{msg}, sysdate()) - - - - - - delete from sys_logininfor where info_id in - - #{infoId} - - - truncate table sys_logininfor - + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysMenuMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysMenuMapper.xml index 22a4cd10..f1ce3578 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysMenuMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysMenuMapper.xml @@ -1,191 +1,196 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + - - select menu_id, menu_name, parent_id, order_num, path, component, is_frame, is_cache, menu_type, visible, status, ifnull(perms,'') as perms, icon, create_time - from sys_menu + + select menu_id, menu_name, parent_id, order_num, path, component, is_frame, is_cache, menu_type, visible, + status, ifnull(perms,'') as perms, icon, create_time + from sys_menu - + - - - - - - - - - - + + AND visible = #{visible} + + + AND status = #{status} + + + order by parent_id, order_num + - - - - - - - - - - update sys_menu - - menu_name = #{menuName}, - parent_id = #{parentId}, - order_num = #{orderNum}, - path = #{path}, - component = #{component}, - is_frame = #{isFrame}, - is_cache = #{isCache}, - menu_type = #{menuType}, - visible = #{visible}, - status = #{status}, - perms = #{perms}, - icon = #{icon}, - remark = #{remark}, - update_by = #{updateBy}, - update_time = sysdate() - - where menu_id = #{menuId} - + - - insert into sys_menu( - menu_id, - parent_id, - menu_name, - order_num, - path, - component, - is_frame, - is_cache, - menu_type, - visible, - status, - perms, - icon, - remark, - create_by, - create_time - )values( - #{menuId}, - #{parentId}, - #{menuName}, - #{orderNum}, - #{path}, - #{component}, - #{isFrame}, - #{isCache}, - #{menuType}, - #{visible}, - #{status}, - #{perms}, - #{icon}, - #{remark}, - #{createBy}, - sysdate() - ) - - - - delete from sys_menu where menu_id = #{menuId} - + + + + + + + + + + + + + + + + + + update sys_menu + + menu_name = #{menuName}, + parent_id = #{parentId}, + order_num = #{orderNum}, + path = #{path}, + component = #{component}, + is_frame = #{isFrame}, + is_cache = #{isCache}, + menu_type = #{menuType}, + visible = #{visible}, + status = #{status}, + perms = #{perms}, + icon = #{icon}, + remark = #{remark}, + update_by = #{updateBy}, + update_time = sysdate() + + where menu_id = #{menuId} + + + + insert into sys_menu( + menu_id, + parent_id, + menu_name, + order_num, + path, + component, + is_frame, + is_cache, + menu_type, + visible, + status, + perms, + icon, + remark, + create_by, + create_time + )values( + #{menuId}, + #{parentId}, + #{menuName}, + #{orderNum}, + #{path}, + #{component}, + #{isFrame}, + #{isCache}, + #{menuType}, + #{visible}, + #{status}, + #{perms}, + #{icon}, + #{remark}, + #{createBy}, + sysdate() + ) + + + + delete from sys_menu where menu_id = #{menuId} + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysNoticeMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysNoticeMapper.xml index 65d30794..af674c37 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysNoticeMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysNoticeMapper.xml @@ -1,89 +1,90 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - + - - - - - - - - - - + + + + + + + + + + - + - select notice_id, notice_title, notice_type, cast(notice_content as char) as notice_content, status, create_by, create_time, update_by, update_time, remark - from sys_notice + select notice_id, notice_title, notice_type, cast(notice_content as char) as notice_content, status, create_by, + create_time, update_by, update_time, remark + from sys_notice - + - + - + insert into sys_notice ( - notice_title, - notice_type, - notice_content, - status, - remark, - create_by, - create_time - )values( - #{noticeTitle}, - #{noticeType}, - #{noticeContent}, - #{status}, - #{remark}, - #{createBy}, - sysdate() - ) + notice_title, + notice_type, + notice_content, + status, + remark, + create_by, + create_time + )values( + #{noticeTitle}, + #{noticeType}, + #{noticeContent}, + #{status}, + #{remark}, + #{createBy}, + sysdate() + ) - + - update sys_notice + update sys_notice - notice_title = #{noticeTitle}, - notice_type = #{noticeType}, - notice_content = #{noticeContent}, - status = #{status}, + notice_title = #{noticeTitle}, + notice_type = #{noticeType}, + notice_content = #{noticeContent}, + status = #{status}, update_by = #{updateBy}, - update_time = sysdate() + update_time = sysdate() where notice_id = #{noticeId} - + delete from sys_notice where notice_id = #{noticeId} - + - delete from sys_notice where notice_id in + delete from sys_notice where notice_id in #{noticeId} - + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysOperLogMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysOperLogMapper.xml index f017ef86..8a06ded7 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysOperLogMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysOperLogMapper.xml @@ -1,82 +1,85 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + - - select oper_id, title, business_type, method, request_method, operator_type, oper_name, dept_name, oper_url, oper_ip, oper_location, oper_param, json_result, status, error_msg, oper_time + + select oper_id, title, business_type, method, request_method, operator_type, oper_name, dept_name, oper_url, + oper_ip, oper_location, oper_param, json_result, status, error_msg, oper_time from sys_oper_log - - - insert into sys_oper_log(title, business_type, method, request_method, operator_type, oper_name, dept_name, oper_url, oper_ip, oper_location, oper_param, json_result, status, error_msg, oper_time) - values (#{title}, #{businessType}, #{method}, #{requestMethod}, #{operatorType}, #{operName}, #{deptName}, #{operUrl}, #{operIp}, #{operLocation}, #{operParam}, #{jsonResult}, #{status}, #{errorMsg}, sysdate()) - - - - - - delete from sys_oper_log where oper_id in - - #{operId} - - - - - - + + + insert into sys_oper_log(title, business_type, method, request_method, operator_type, oper_name, dept_name, + oper_url, oper_ip, oper_location, oper_param, json_result, status, error_msg, oper_time) + values (#{title}, #{businessType}, #{method}, #{requestMethod}, #{operatorType}, #{operName}, #{deptName}, + #{operUrl}, #{operIp}, #{operLocation}, #{operParam}, #{jsonResult}, #{status}, #{errorMsg}, sysdate()) + + + + + + delete from sys_oper_log where oper_id in + + #{operId} + + + + + + truncate table sys_oper_log diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysPostMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysPostMapper.xml index c82d808f..a4bd4c6e 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysPostMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysPostMapper.xml @@ -1,122 +1,122 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - select post_id, post_code, post_name, post_sort, status, create_by, create_time, remark - from sys_post + + + + + + + + + + + + + + + select post_id, post_code, post_name, post_sort, status, create_by, create_time, remark + from sys_post - - - - - - - - + + + + AND post_code like concat('%', #{postCode}, '%') + + + AND status = #{status} + + + AND post_name like concat('%', #{postName}, '%') + + + + + + + + + - - - - - - - - - update sys_post - - post_code = #{postCode}, - post_name = #{postName}, - post_sort = #{postSort}, - status = #{status}, - remark = #{remark}, - update_by = #{updateBy}, - update_time = sysdate() - - where post_id = #{postId} - - - - insert into sys_post( - post_id, - post_code, - post_name, - post_sort, - status, - remark, - create_by, - create_time - )values( - #{postId}, - #{postCode}, - #{postName}, - #{postSort}, - #{status}, - #{remark}, - #{createBy}, - sysdate() - ) - - - - delete from sys_post where post_id = #{postId} - - - - delete from sys_post where post_id in - - #{postId} - - + left join sys_user_post up on up.post_id = p.post_id + left join sys_user u on u.user_id = up.user_id + where u.user_id = #{userId} + + + + + + + + + + update sys_post + + post_code = #{postCode}, + post_name = #{postName}, + post_sort = #{postSort}, + status = #{status}, + remark = #{remark}, + update_by = #{updateBy}, + update_time = sysdate() + + where post_id = #{postId} + + + + insert into sys_post( + post_id, + post_code, + post_name, + post_sort, + status, + remark, + create_by, + create_time + )values( + #{postId}, + #{postCode}, + #{postName}, + #{postSort}, + #{status}, + #{remark}, + #{createBy}, + sysdate() + ) + + + + delete from sys_post where post_id = #{postId} + + + + delete from sys_post where post_id in + + #{postId} + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleDeptMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleDeptMapper.xml index 7c4139bc..fb2f449c 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleDeptMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleDeptMapper.xml @@ -1,34 +1,34 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - + + + + + + + delete from sys_role_dept where role_id=#{roleId} + + + + + + delete from sys_role_dept where role_id in + + #{roleId} + + + + + insert into sys_role_dept(role_id, dept_id) values + + (#{item.roleId},#{item.deptId}) + + - - delete from sys_role_dept where role_id=#{roleId} - - - - - - delete from sys_role_dept where role_id in - - #{roleId} - - - - - insert into sys_role_dept(role_id, dept_id) values - - (#{item.roleId},#{item.deptId}) - - - \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMapper.xml index 3506de8e..3caa3c40 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMapper.xml @@ -1,153 +1,154 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - - select distinct r.role_id, r.role_name, r.role_key, r.role_sort, r.data_scope, r.menu_check_strictly, r.dept_check_strictly, - r.status, r.del_flag, r.create_time, r.remark + + + + + + + + + + + + + + + + + + + select distinct r.role_id, r.role_name, r.role_key, r.role_sort, r.data_scope, r.menu_check_strictly, + r.dept_check_strictly, + r.status, r.del_flag, r.create_time, r.remark from sys_role r - left join sys_user_role ur on ur.role_id = r.role_id - left join sys_user u on u.user_id = ur.user_id - left join sys_dept d on u.dept_id = d.dept_id + left join sys_user_role ur on ur.role_id = r.role_id + left join sys_user u on u.user_id = ur.user_id + left join sys_dept d on u.dept_id = d.dept_id - + - - - - - - + + + + + + - - - - - - - - - - - insert into sys_role( - role_id, - role_name, - role_key, - role_sort, - data_scope, - menu_check_strictly, - dept_check_strictly, - status, - remark, - create_by, - create_time - )values( - #{roleId}, - #{roleName}, - #{roleKey}, - #{roleSort}, - #{dataScope}, - #{menuCheckStrictly}, - #{deptCheckStrictly}, - #{status}, - #{remark}, - #{createBy}, - sysdate() - ) - - - - update sys_role - - role_name = #{roleName}, - role_key = #{roleKey}, - role_sort = #{roleSort}, - data_scope = #{dataScope}, - menu_check_strictly = #{menuCheckStrictly}, - dept_check_strictly = #{deptCheckStrictly}, - status = #{status}, - remark = #{remark}, - update_by = #{updateBy}, - update_time = sysdate() - - where role_id = #{roleId} - - - - update sys_user set status = #{status} where user_id = #{userId} - - - - delete from sys_role where role_id = #{roleId} - - - - update sys_role set del_flag = '2' where role_id in - - #{roleId} - - - + left join sys_user_role ur on ur.role_id = r.role_id + left join sys_user u on u.user_id = ur.user_id + where u.user_id = #{userId} + + + + + + + + + + + + insert into sys_role( + role_id, + role_name, + role_key, + role_sort, + data_scope, + menu_check_strictly, + dept_check_strictly, + status, + remark, + create_by, + create_time + )values( + #{roleId}, + #{roleName}, + #{roleKey}, + #{roleSort}, + #{dataScope}, + #{menuCheckStrictly}, + #{deptCheckStrictly}, + #{status}, + #{remark}, + #{createBy}, + sysdate() + ) + + + + update sys_role + + role_name = #{roleName}, + role_key = #{roleKey}, + role_sort = #{roleSort}, + data_scope = #{dataScope}, + menu_check_strictly = #{menuCheckStrictly}, + dept_check_strictly = #{deptCheckStrictly}, + status = #{status}, + remark = #{remark}, + update_by = #{updateBy}, + update_time = sysdate() + + where role_id = #{roleId} + + + + update sys_user set status = #{status} where user_id = #{userId} + + + + delete from sys_role where role_id = #{roleId} + + + + update sys_role set del_flag = '2' where role_id in + + #{roleId} + + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMenuMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMenuMapper.xml index cb60a852..34f8f18c 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMenuMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysRoleMenuMapper.xml @@ -1,34 +1,34 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - + + + + + + + + + delete from sys_role_menu where role_id=#{roleId} + + + + delete from sys_role_menu where role_id in + + #{roleId} + + + + + insert into sys_role_menu(role_id, menu_id) values + + (#{item.roleId},#{item.menuId}) + + - - delete from sys_role_menu where role_id=#{roleId} - - - - delete from sys_role_menu where role_id in - - #{roleId} - - - - - insert into sys_role_menu(role_id, menu_id) values - - (#{item.roleId},#{item.menuId}) - - - \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserMapper.xml index 296912d2..09eef49c 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserMapper.xml @@ -1,182 +1,199 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - select u.user_id, u.dept_id, u.user_name, u.nick_name, u.email, u.avatar, u.phonenumber, u.password, u.sex, u.status, u.del_flag, u.login_ip, u.login_date, u.create_by, u.create_time, u.remark, + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + select u.user_id,open_id, u.dept_id, u.user_name, u.nick_name, u.email, u.avatar, u.phonenumber, u.password, u.sex, + u.status, u.del_flag, u.login_ip, u.login_date, u.create_by, u.create_time, u.remark, d.dept_id, d.parent_id, d.dept_name, d.order_num, d.leader, d.status as dept_status, r.role_id, r.role_name, r.role_key, r.role_sort, r.data_scope, r.status as role_status from sys_user u - left join sys_dept d on u.dept_id = d.dept_id - left join sys_user_role ur on u.user_id = ur.user_id - left join sys_role r on r.role_id = ur.role_id + left join sys_dept d on u.dept_id = d.dept_id + left join sys_user_role ur on u.user_id = ur.user_id + left join sys_role r on r.role_id = ur.role_id - + - - - - - - - - - - - - - insert into sys_user( - user_id, - dept_id, - user_name, - nick_name, - email, - avatar, - phonenumber, - sex, - password, - status, - create_by, - remark, - create_time - )values( - #{userId}, - #{deptId}, - #{userName}, - #{nickName}, - #{email}, - #{avatar}, - #{phonenumber}, - #{sex}, - #{password}, - #{status}, - #{createBy}, - #{remark}, - sysdate() - ) - - - - update sys_user - - dept_id = #{deptId}, - user_name = #{userName}, - nick_name = #{nickName}, - email = #{email}, - phonenumber = #{phonenumber}, - sex = #{sex}, - avatar = #{avatar}, - password = #{password}, - status = #{status}, - login_ip = #{loginIp}, - login_date = #{loginDate}, - update_by = #{updateBy}, - remark = #{remark}, - update_time = sysdate() - - where user_id = #{userId} - - - - update sys_user set status = #{status} where user_id = #{userId} - - - - update sys_user set avatar = #{avatar} where user_name = #{userName} - - - - update sys_user set password = #{password} where user_name = #{userName} - - - - delete from sys_user where user_id = #{userId} - - - - update sys_user set del_flag = '2' where user_id in - - #{userId} - - - - \ No newline at end of file + select u.user_id,open_id, u.dept_id, u.nick_name, u.user_name, u.email, u.avatar, u.phonenumber, u.password, u.sex, + u.status, u.del_flag, u.login_ip, u.login_date, u.create_by, u.create_time, u.remark, d.dept_name, d.leader from + sys_user u + left join sys_dept d on u.dept_id = d.dept_id + where u.del_flag = '0' + + AND u.user_name like concat('%', #{userName}, '%') + + + AND u.status = #{status} + + + AND u.open_id = #{openId} + + , + AND u.phonenumber like concat('%', #{phonenumber}, '%') + + + AND date_format(u.create_time,'%y%m%d') >= date_format(#{params.beginTime},'%y%m%d') + + + AND date_format(u.create_time,'%y%m%d') <= date_format(#{params.endTime},'%y%m%d') + + + AND (u.dept_id = #{deptId} OR u.dept_id IN ( SELECT t.dept_id FROM sys_dept t WHERE find_in_set(#{deptId}, + ancestors) )) + + + ${params.dataScope} + + + + + + + + + + + + + + + + insert into sys_user( + user_id, + dept_id, + user_name, + nick_name, + open_id, + email, + avatar, + phonenumber, + sex, + password, + status, + create_by, + remark, + create_time + )values( + #{userId}, + #{deptId}, + #{userName}, + #{nickName}, + #{openId}, + #{email}, + #{avatar}, + #{phonenumber}, + #{sex}, + #{password}, + #{status}, + #{createBy}, + #{remark}, + sysdate() + ) + + + + update sys_user + + dept_id = #{deptId}, + user_name = #{userName}, + nick_name = #{nickName}, + open_id = #{openId}, + email = #{email}, + phonenumber = #{phonenumber}, + sex = #{sex}, + avatar = #{avatar}, + password = #{password}, + status = #{status}, + login_ip = #{loginIp}, + login_date = #{loginDate}, + update_by = #{updateBy}, + remark = #{remark}, + update_time = sysdate() + + where user_id = #{userId} + + + + update sys_user set status = #{status} where user_id = #{userId} + + + + update sys_user set avatar = #{avatar} where user_name = #{userName} + + + + update sys_user set password = #{password} where user_name = #{userName} + + + + delete from sys_user where user_id = #{userId} + + + + update sys_user set del_flag = '2' where user_id in + + #{userId} + + + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserPostMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserPostMapper.xml index 2b90bc40..4e103d3b 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserPostMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserPostMapper.xml @@ -1,34 +1,34 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - + + + + + + + delete from sys_user_post where user_id=#{userId} + + + + + + delete from sys_user_post where user_id in + + #{userId} + + + + + insert into sys_user_post(user_id, post_id) values + + (#{item.userId},#{item.postId}) + + - - delete from sys_user_post where user_id=#{userId} - - - - - - delete from sys_user_post where user_id in - - #{userId} - - - - - insert into sys_user_post(user_id, post_id) values - - (#{item.userId},#{item.postId}) - - - \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserRoleMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserRoleMapper.xml index dd726891..3f696a53 100644 --- a/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserRoleMapper.xml +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/SysUserRoleMapper.xml @@ -1,44 +1,44 @@ + PUBLIC "-//mybatis.org//DTD Mapper 3.0//EN" + "http://mybatis.org/dtd/mybatis-3-mapper.dtd"> - - - - + + + + - - delete from sys_user_role where user_id=#{userId} - - - - - - delete from sys_user_role where user_id in - - #{userId} - - - - - insert into sys_user_role(user_id, role_id) values - - (#{item.userId},#{item.roleId}) - - - - - delete from sys_user_role where user_id=#{userId} and role_id=#{roleId} - - - - delete from sys_user_role where role_id=#{roleId} and user_id in - - #{userId} - - + + delete from sys_user_role where user_id=#{userId} + + + + + + delete from sys_user_role where user_id in + + #{userId} + + + + + insert into sys_user_role(user_id, role_id) values + + (#{item.userId},#{item.roleId}) + + + + + delete from sys_user_role where user_id=#{userId} and role_id=#{roleId} + + + + delete from sys_user_role where role_id=#{roleId} and user_id in + + #{userId} + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserAccountInfoMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserAccountInfoMapper.xml new file mode 100644 index 00000000..77362242 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserAccountInfoMapper.xml @@ -0,0 +1,148 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + select id, sessionKey, access_token, open_id, union_id, nick_name, avatar, phone, birthday, status, country, + province, city, address, user_type, admin_id, last_login_time, last_login_ip, gmt_time, gmt_update from + t_user_account_info + + + + + + + + insert into t_user_account_info + + sessionKey, + access_token, + open_id, + union_id, + nick_name, + avatar, + phone, + birthday, + status, + country, + province, + city, + address, + user_type, + admin_id, + last_login_time, + last_login_ip, + gmt_time, + gmt_update, + + + #{sessionkey}, + #{accessToken}, + #{openId}, + #{unionId}, + #{nickName}, + #{avatar}, + #{phone}, + #{birthday}, + #{status}, + #{country}, + #{province}, + #{city}, + #{address}, + #{userType}, + #{adminId}, + #{lastLoginTime}, + #{lastLoginIp}, + #{gmtTime}, + #{gmtUpdate}, + + + + + update t_user_account_info + + sessionKey = #{sessionkey}, + access_token = #{accessToken}, + open_id = #{openId}, + union_id = #{unionId}, + nick_name = #{nickName}, + avatar = #{avatar}, + phone = #{phone}, + birthday = #{birthday}, + status = #{status}, + country = #{country}, + province = #{province}, + city = #{city}, + address = #{address}, + user_type = #{userType}, + admin_id = #{adminId}, + last_login_time = #{lastLoginTime}, + last_login_ip = #{lastLoginIp}, + gmt_time = #{gmtTime}, + gmt_update = #{gmtUpdate}, + + where id = #{id} + + + + delete from t_user_account_info where id = #{id} + + + + delete from t_user_account_info where id in + + #{id} + + + \ No newline at end of file diff --git a/spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserLoginLogMapper.xml b/spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserLoginLogMapper.xml new file mode 100644 index 00000000..11a85bc3 --- /dev/null +++ b/spring-boot/ruoyi-system/src/main/resources/mapper/system/TUserLoginLogMapper.xml @@ -0,0 +1,86 @@ + + + + + + + + + + + + + + + + + select id, user_type, user_id, code, open_id, ip, gmt_time, gmt_update from t_user_login_log + + + + + + + + insert into t_user_login_log + + user_type, + user_id, + code, + open_id, + ip, + gmt_time, + gmt_update, + + + #{userType}, + #{userId}, + #{code}, + #{openId}, + #{ip}, + #{gmtTime}, + #{gmtUpdate}, + + + + + update t_user_login_log + + user_type = #{userType}, + user_id = #{userId}, + code = #{code}, + open_id = #{openId}, + ip = #{ip}, + gmt_time = #{gmtTime}, + gmt_update = #{gmtUpdate}, + + where id = #{id} + + + + delete from t_user_login_log where id = #{id} + + + + delete from t_user_login_log where id in + + #{id} + + + \ No newline at end of file diff --git a/spring-boot/sql/develop_xiaoyi_wumei.sql b/spring-boot/sql/develop_xiaoyi_wumei.sql new file mode 100644 index 00000000..feb86c2c --- /dev/null +++ b/spring-boot/sql/develop_xiaoyi_wumei.sql @@ -0,0 +1,2340 @@ +/* + Navicat Premium Data Transfer + + Source Server : 51xy.xyz8.0 + Source Server Type : MySQL + Source Server Version : 80025 + Source Host : 51xy.xyz:3316 + Source Schema : develop_xiaoyi_wumei + + Target Server Type : MySQL + Target Server Version : 80025 + File Encoding : 65001 + + Date: 02/09/2021 10:03:22 +*/ + +SET NAMES utf8mb4; +SET FOREIGN_KEY_CHECKS = 0; + +-- ---------------------------- +-- Table structure for gen_table +-- ---------------------------- +DROP TABLE IF EXISTS `gen_table`; +CREATE TABLE `gen_table` ( + `table_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '编号', + `table_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '表名称', + `table_comment` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '表描述', + `sub_table_name` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '关联子表的表名', + `sub_table_fk_name` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '子表关联的外键名', + `class_name` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '实体类名称', + `tpl_category` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT 'crud' COMMENT '使用的模板（crud单表操作 tree树表操作）', + `package_name` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '生成包路径', + `module_name` varchar(30) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '生成模块名', + `business_name` varchar(30) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '生成业务名', + `function_name` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '生成功能名', + `function_author` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '生成功能作者', + `gen_type` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '生成代码方式（0zip压缩包 1自定义路径）', + `gen_path` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '/' COMMENT '生成路径（不填默认项目路径）', + `options` varchar(1000) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '其它生成选项', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`table_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 23 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '代码生成业务表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of gen_table +-- ---------------------------- +INSERT INTO `gen_table` VALUES (12, 'iot_category', '设备分类', '', '', 'IotCategory', 'crud', 'com.ruoyi.system', 'system', 'category', '设备分类', 'kerwincui', '0', '/', '{\"parentMenuId\":\"2000\"}', 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58', NULL); +INSERT INTO `gen_table` VALUES (14, 'iot_device_set', '设备配置', NULL, NULL, 'IotDeviceSet', 'crud', 'com.ruoyi.system', 'system', 'set', '设备配置', 'kerwincui', '0', '/', '{\"parentMenuId\":\"2000\"}', 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:45', NULL); +INSERT INTO `gen_table` VALUES (15, 'iot_device_status', '设备状态', NULL, NULL, 'IotDeviceStatus', 'crud', 'com.ruoyi.system', 'system', 'status', '设备状态', 'kerwincui', '0', '/', '{\"parentMenuId\":\"2000\"}', 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:15:04', NULL); +INSERT INTO `gen_table` VALUES (17, 'iot_group', '设备分组', NULL, NULL, 'IotGroup', 'crud', 'com.ruoyi.system', 'system', 'group', '分组', 'kerwincui', '0', '/', '{\"parentMenuId\":\"2000\"}', 'admin', '2021-05-18 08:04:15', '', '2021-05-18 08:13:40', NULL); +INSERT INTO `gen_table` VALUES (18, 't_user_account_info', '小程序用户表', NULL, NULL, 'TUserAccountInfo', 'crud', 'com.ruoyi.system', 'system', 'info', '小程序用户', 'wxy', '0', '/', NULL, 'admin', '2021-08-26 14:45:28', '', NULL, NULL); +INSERT INTO `gen_table` VALUES (19, 't_user_login_log', '', NULL, NULL, 'TUserLoginLog', 'crud', 'com.ruoyi.system', 'system', 'log', NULL, 'wxy', '0', '/', NULL, 'admin', '2021-08-26 14:45:29', '', NULL, NULL); +INSERT INTO `gen_table` VALUES (20, 'sys_user', '用户信息表', NULL, NULL, 'SysUser', 'crud', 'com.ruoyi.system', 'system', 'user', '用户信息', 'wxy', '0', '/', NULL, 'admin', '2021-08-26 17:07:44', '', NULL, NULL); +INSERT INTO `gen_table` VALUES (21, 'iot_device_user_relation', '', NULL, NULL, 'IotDeviceUserRelation', 'crud', 'com.ruoyi.system', 'system', 'relation', NULL, 'wxy', '0', '/', NULL, 'admin', '2021-08-27 11:55:05', '', NULL, NULL); +INSERT INTO `gen_table` VALUES (22, 'iot_device', '', NULL, NULL, 'IotDevice', 'crud', 'com.ruoyi.system', 'system', 'device', NULL, 'wxy', '0', '/', NULL, 'admin', '2021-08-27 13:45:40', '', NULL, NULL); + +-- ---------------------------- +-- Table structure for gen_table_column +-- ---------------------------- +DROP TABLE IF EXISTS `gen_table_column`; +CREATE TABLE `gen_table_column` ( + `column_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '编号', + `table_id` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '归属表编号', + `column_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '列名称', + `column_comment` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '列描述', + `column_type` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '列类型', + `java_type` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT 'JAVA类型', + `java_field` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT 'JAVA字段名', + `is_pk` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否主键（1是）', + `is_increment` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否自增（1是）', + `is_required` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否必填（1是）', + `is_insert` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否为插入字段（1是）', + `is_edit` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否编辑字段（1是）', + `is_list` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否列表字段（1是）', + `is_query` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '是否查询字段（1是）', + `query_type` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT 'EQ' COMMENT '查询方式（等于、不等于、大于、小于、范围）', + `html_type` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '显示类型（文本框、文本域、下拉框、复选框、单选框、日期控件）', + `dict_type` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '字典类型', + `sort` int(0) NULL DEFAULT NULL COMMENT '排序', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + PRIMARY KEY (`column_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 371 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '代码生成业务表字段' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of gen_table_column +-- ---------------------------- +INSERT INTO `gen_table_column` VALUES (217, '12', 'category_id', '序号', 'bigint(20)', 'Long', 'categoryId', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58'); +INSERT INTO `gen_table_column` VALUES (218, '12', 'category_name', '分类名称', 'varchar(100)', 'String', 'categoryName', '0', '0', '1', '1', '1', '1', '1', 'LIKE', 'input', '', 2, 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58'); +INSERT INTO `gen_table_column` VALUES (219, '12', 'del_flag', '删除标志（0代表存在 2代表删除）', 'char(1)', 'String', 'delFlag', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 3, 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58'); +INSERT INTO `gen_table_column` VALUES (220, '12', 'create_by', '创建者', 'varchar(64)', 'String', 'createBy', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 4, 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58'); +INSERT INTO `gen_table_column` VALUES (221, '12', 'create_time', '创建时间', 'datetime', 'Date', 'createTime', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'datetime', '', 5, 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58'); +INSERT INTO `gen_table_column` VALUES (222, '12', 'update_by', '更新者', 'varchar(64)', 'String', 'updateBy', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'input', '', 6, 'admin', '2021-05-06 13:31:29', '', '2021-05-07 08:22:58'); +INSERT INTO `gen_table_column` VALUES (223, '12', 'update_time', '更新时间', 'datetime', 'Date', 'updateTime', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'datetime', '', 7, 'admin', '2021-05-06 13:31:30', '', '2021-05-07 08:22:59'); +INSERT INTO `gen_table_column` VALUES (224, '12', 'remark', '备注', 'varchar(500)', 'String', 'remark', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'textarea', '', 8, 'admin', '2021-05-06 13:31:30', '', '2021-05-07 08:22:59'); +INSERT INTO `gen_table_column` VALUES (237, '14', 'device_config_id', '序号', 'bigint(20)', 'Long', 'deviceConfigId', '1', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:45'); +INSERT INTO `gen_table_column` VALUES (238, '14', 'device_id', '设备', 'bigint(20)', 'Long', 'deviceId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:45'); +INSERT INTO `gen_table_column` VALUES (239, '14', 'device_num', '设备编号', 'varchar(64)', 'String', 'deviceNum', '0', '0', '1', '1', '1', '1', '1', 'LIKE', 'input', '', 3, 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:45'); +INSERT INTO `gen_table_column` VALUES (240, '14', 'is_alarm', '报警', 'tinyint(1)', 'Integer', 'isAlarm', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 4, 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:45'); +INSERT INTO `gen_table_column` VALUES (241, '14', 'is_radar', '雷达感应', 'tinyint(1)', 'Integer', 'isRadar', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 5, 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:45'); +INSERT INTO `gen_table_column` VALUES (242, '14', 'is_host', '托管', 'tinyint(1)', 'Integer', 'isHost', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 6, 'admin', '2021-05-06 13:31:32', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (243, '14', 'is_reset', '重启', 'tinyint(1)', 'Integer', 'isReset', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'radio', 'sys_yes_no', 7, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (244, '14', 'is_ap', '打开AP', 'tinyint(1)', 'Integer', 'isAp', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'radio', 'sys_yes_no', 8, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (245, '14', 'is_rf_control', '射频遥控', 'tinyint(1)', 'Integer', 'isRfControl', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 9, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (246, '14', 'is_rf_learn', '遥控配对', 'tinyint(1)', 'Integer', 'isRfLearn', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'radio', 'sys_yes_no', 10, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (247, '14', 'is_rf_clear', '遥控清码', 'tinyint(1)', 'Integer', 'isRfClear', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'radio', 'sys_yes_no', 11, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (248, '14', 'rf_one_func', '按键一', 'tinyint(10)', 'Integer', 'rfOneFunc', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'select', 'rf_function', 12, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:46'); +INSERT INTO `gen_table_column` VALUES (249, '14', 'rf_two_func', '按键二', 'tinyint(10)', 'Integer', 'rfTwoFunc', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'select', 'rf_function', 13, 'admin', '2021-05-06 13:31:33', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (250, '14', 'rf_three_func', '按键三', 'tinyint(10)', 'Integer', 'rfThreeFunc', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'select', 'rf_function', 14, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (251, '14', 'rf_four_func', '按键四', 'tinyint(10)', 'Integer', 'rfFourFunc', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'select', 'rf_function', 15, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (252, '14', 'owner_id', '用户', 'varchar(64)', 'String', 'ownerId', '0', '0', NULL, '1', '1', '1', '1', 'LIKE', 'input', '', 16, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (253, '14', 'network_address', '配网地址', 'varchar(255)', 'String', 'networkAddress', '0', '0', NULL, '1', '1', '1', '1', 'LIKE', 'input', '', 17, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (254, '14', 'network_ip', '配网IP', 'varchar(32)', 'String', 'networkIp', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 18, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (255, '14', 'del_flag', '删除标志（0代表存在 2代表删除）', 'char(1)', 'String', 'delFlag', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 19, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (256, '14', 'create_by', '创建者', 'varchar(64)', 'String', 'createBy', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 20, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (257, '14', 'create_time', '创建时间', 'datetime', 'Date', 'createTime', '0', '0', NULL, '1', NULL, NULL, '1', 'BETWEEN', 'datetime', '', 21, 'admin', '2021-05-06 13:31:34', '', '2021-05-06 15:14:47'); +INSERT INTO `gen_table_column` VALUES (258, '14', 'update_by', '更新者', 'varchar(64)', 'String', 'updateBy', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'input', '', 22, 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:14:48'); +INSERT INTO `gen_table_column` VALUES (259, '14', 'update_time', '更新时间', 'datetime', 'Date', 'updateTime', '0', '0', '1', '1', '1', NULL, NULL, 'EQ', 'datetime', '', 23, 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:14:48'); +INSERT INTO `gen_table_column` VALUES (260, '14', 'remark', '备注', 'varchar(500)', 'String', 'remark', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'textarea', '', 24, 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:14:48'); +INSERT INTO `gen_table_column` VALUES (261, '15', 'device_status_id', '序号', 'bigint(20)', 'Long', 'deviceStatusId', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:15:04'); +INSERT INTO `gen_table_column` VALUES (262, '15', 'device_id', '设备', 'bigint(20)', 'Long', 'deviceId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:15:04'); +INSERT INTO `gen_table_column` VALUES (263, '15', 'device_num', '设备编号', 'varchar(64)', 'String', 'deviceNum', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 3, 'admin', '2021-05-06 13:31:35', '', '2021-05-06 15:15:04'); +INSERT INTO `gen_table_column` VALUES (264, '15', 'relay_status', '继电器', 'tinyint(1)', 'Integer', 'relayStatus', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 4, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (265, '15', 'light_status', '灯状态', 'tinyint(1)', 'Integer', 'lightStatus', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 5, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (266, '15', 'is_online', '在线', 'tinyint(1)', 'Integer', 'isOnline', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', 'sys_yes_no', 6, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (267, '15', 'device_temperature', '设备温度', 'float(6,2)', 'BigDecimal', 'deviceTemperature', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 7, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (268, '15', 'device_humidity', '设备湿度', 'float(6,2)', 'BigDecimal', 'deviceHumidity', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 8, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (269, '15', 'air_temperature', '空气温度', 'float(6,2)', 'BigDecimal', 'airTemperature', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 9, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (270, '15', 'air_humidity', '空气湿度', 'float(6,2)', 'BigDecimal', 'airHumidity', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 10, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (271, '15', 'trigger_source', '触发源', 'tinyint(10)', 'Integer', 'triggerSource', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'select', 'iot_trigger_source', 11, 'admin', '2021-05-06 13:31:36', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (272, '15', 'brightness', '彩灯亮度', 'tinyint(10) unsigned', 'Integer', 'brightness', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 12, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:05'); +INSERT INTO `gen_table_column` VALUES (273, '15', 'light_interval', '渐变间隔', 'smallint(10)', 'Integer', 'lightInterval', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 13, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (274, '15', 'light_mode', '彩灯模式', 'tinyint(10)', 'Integer', 'lightMode', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'select', 'light_mode', 14, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (275, '15', 'red', '红灯', 'tinyint(255) unsigned', 'Long', 'red', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 15, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (276, '15', 'green', '绿灯', 'tinyint(255) unsigned', 'Long', 'green', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 16, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (277, '15', 'blue', '蓝灯', 'tinyint(255) unsigned', 'Long', 'blue', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 17, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (278, '15', 'del_flag', '删除标志（0代表存在 2代表删除）', 'char(1)', 'String', 'delFlag', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 18, 'admin', '2021-05-06 13:31:37', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (279, '15', 'create_by', '创建者', 'varchar(64)', 'String', 'createBy', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 19, 'admin', '2021-05-06 13:31:38', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (280, '15', 'create_time', '创建时间', 'datetime', 'Date', 'createTime', '0', '0', NULL, '1', NULL, NULL, '1', 'BETWEEN', 'datetime', '', 20, 'admin', '2021-05-06 13:31:38', '', '2021-05-06 15:15:06'); +INSERT INTO `gen_table_column` VALUES (281, '15', 'update_by', '更新者', 'varchar(64)', 'String', 'updateBy', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'input', '', 21, 'admin', '2021-05-06 13:31:38', '', '2021-05-06 15:15:07'); +INSERT INTO `gen_table_column` VALUES (282, '15', 'update_time', '更新时间', 'datetime', 'Date', 'updateTime', '0', '0', '1', '1', '1', NULL, NULL, 'EQ', 'datetime', '', 22, 'admin', '2021-05-06 13:31:38', '', '2021-05-06 15:15:07'); +INSERT INTO `gen_table_column` VALUES (283, '15', 'remark', '备注', 'varchar(500)', 'String', 'remark', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'textarea', '', 23, 'admin', '2021-05-06 13:31:38', '', '2021-05-06 15:15:07'); +INSERT INTO `gen_table_column` VALUES (294, '17', 'group_id', '设备分组', 'bigint(20)', 'Long', 'groupId', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-05-18 08:04:15', '', '2021-05-18 08:13:40'); +INSERT INTO `gen_table_column` VALUES (295, '17', 'user_id', '用户', 'bigint(20)', 'Long', 'userId', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-05-18 08:04:16', '', '2021-05-18 08:13:40'); +INSERT INTO `gen_table_column` VALUES (296, '17', 'group_name', '分组名称', 'varchar(100)', 'String', 'groupName', '0', '0', '1', '1', '1', '1', '1', 'LIKE', 'input', '', 3, 'admin', '2021-05-18 08:04:16', '', '2021-05-18 08:13:40'); +INSERT INTO `gen_table_column` VALUES (297, '17', 'group_order', '排序', 'smallint(5) unsigned zerofill', 'Integer', 'groupOrder', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'input', '', 4, 'admin', '2021-05-18 08:04:16', '', '2021-05-18 08:13:41'); +INSERT INTO `gen_table_column` VALUES (298, '17', 'del_flag', '删除标志（0代表存在 2代表删除）', 'char(1)', 'String', 'delFlag', '0', '0', NULL, NULL, NULL, NULL, NULL, 'EQ', 'input', '', 5, 'admin', '2021-05-18 08:04:16', '', '2021-05-18 08:13:41'); +INSERT INTO `gen_table_column` VALUES (299, '17', 'create_by', '创建者', 'varchar(64)', 'String', 'createBy', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 6, 'admin', '2021-05-18 08:04:16', '', '2021-05-18 08:13:41'); +INSERT INTO `gen_table_column` VALUES (300, '17', 'create_time', '创建时间', 'datetime', 'Date', 'createTime', '0', '0', NULL, '1', NULL, '1', '1', 'BETWEEN', 'datetime', '', 7, 'admin', '2021-05-18 08:04:17', '', '2021-05-18 08:13:41'); +INSERT INTO `gen_table_column` VALUES (301, '17', 'update_by', '更新者', 'varchar(64)', 'String', 'updateBy', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'input', '', 8, 'admin', '2021-05-18 08:04:17', '', '2021-05-18 08:13:41'); +INSERT INTO `gen_table_column` VALUES (302, '17', 'update_time', '更新时间', 'datetime', 'Date', 'updateTime', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'datetime', '', 9, 'admin', '2021-05-18 08:04:17', '', '2021-05-18 08:13:41'); +INSERT INTO `gen_table_column` VALUES (303, '17', 'remark', '备注', 'varchar(500)', 'String', 'remark', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'textarea', '', 10, 'admin', '2021-05-18 08:04:17', '', '2021-05-18 08:13:42'); +INSERT INTO `gen_table_column` VALUES (304, '18', 'id', NULL, 'int', 'Long', 'id', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (305, '18', 'sessionKey', 'sessionKey', 'varchar(255)', 'String', 'sessionkey', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (306, '18', 'access_token', 'accessToken', 'varchar(255)', 'String', 'accessToken', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 3, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (307, '18', 'open_id', NULL, 'varchar(50)', 'String', 'openId', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 4, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (308, '18', 'union_id', NULL, 'varchar(50)', 'String', 'unionId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 5, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (309, '18', 'nick_name', '昵称', 'varchar(255)', 'String', 'nickName', '0', '0', NULL, '1', '1', '1', '1', 'LIKE', 'input', '', 6, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (310, '18', 'avatar', '头像', 'varchar(255)', 'String', 'avatar', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 7, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (311, '18', 'phone', '手机号', 'varchar(255)', 'String', 'phone', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 8, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (312, '18', 'birthday', '生日', 'varchar(255)', 'String', 'birthday', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 9, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (313, '18', 'status', '用户状态：0-冻结，1-正常', 'int', 'Long', 'status', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'radio', '', 10, 'admin', '2021-08-26 14:45:28', '', NULL); +INSERT INTO `gen_table_column` VALUES (314, '18', 'country', '国家', 'varchar(255)', 'String', 'country', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 11, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (315, '18', 'province', '省份', 'varchar(255)', 'String', 'province', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 12, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (316, '18', 'city', '城市', 'varchar(255)', 'String', 'city', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 13, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (317, '18', 'address', '地址', 'varchar(255)', 'String', 'address', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 14, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (318, '18', 'user_type', '用户类型：0-未授权用户，1-消费者，2-商家', 'int', 'Long', 'userType', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'select', '', 15, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (319, '18', 'admin_id', '绑定的管理员编号', 'int', 'Long', 'adminId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 16, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (320, '18', 'last_login_time', NULL, 'timestamp', 'Date', 'lastLoginTime', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'datetime', '', 17, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (321, '18', 'last_login_ip', NULL, 'varchar(255)', 'String', 'lastLoginIp', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 18, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (322, '18', 'gmt_time', NULL, 'timestamp', 'Date', 'gmtTime', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'datetime', '', 19, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (323, '18', 'gmt_update', NULL, 'timestamp', 'Date', 'gmtUpdate', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'datetime', '', 20, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (324, '19', 'id', NULL, 'int', 'Long', 'id', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (325, '19', 'user_type', '用户类型', 'varchar(255)', 'String', 'userType', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'select', '', 2, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (326, '19', 'user_id', NULL, 'int', 'Long', 'userId', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 3, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (327, '19', 'code', NULL, 'varchar(50)', 'String', 'code', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 4, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (328, '19', 'open_id', NULL, 'varchar(50)', 'String', 'openId', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 5, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (329, '19', 'ip', 'IP地址', 'varchar(30)', 'String', 'ip', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 6, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (330, '19', 'gmt_time', NULL, 'timestamp', 'Date', 'gmtTime', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'datetime', '', 7, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (331, '19', 'gmt_update', NULL, 'timestamp', 'Date', 'gmtUpdate', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'datetime', '', 8, 'admin', '2021-08-26 14:45:29', '', NULL); +INSERT INTO `gen_table_column` VALUES (332, '20', 'user_id', '用户ID', 'bigint', 'Long', 'userId', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (333, '20', 'dept_id', '部门ID', 'bigint', 'Long', 'deptId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (334, '20', 'open_id', '用户OpenId', 'varchar(40)', 'String', 'openId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 3, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (335, '20', 'user_name', '用户账号', 'varchar(30)', 'String', 'userName', '0', '0', '1', '1', '1', '1', '1', 'LIKE', 'input', '', 4, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (336, '20', 'nick_name', '用户昵称', 'varchar(30)', 'String', 'nickName', '0', '0', '1', '1', '1', '1', '1', 'LIKE', 'input', '', 5, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (337, '20', 'user_type', '用户类型（00系统用户）', 'varchar(2)', 'String', 'userType', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'select', '', 6, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (338, '20', 'email', '用户邮箱', 'varchar(50)', 'String', 'email', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 7, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (339, '20', 'phonenumber', '手机号码', 'varchar(11)', 'String', 'phonenumber', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 8, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (340, '20', 'sex', '用户性别（0男 1女 2未知）', 'char(1)', 'String', 'sex', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'select', '', 9, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (341, '20', 'avatar', '头像地址', 'varchar(100)', 'String', 'avatar', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 10, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (342, '20', 'password', '密码', 'varchar(100)', 'String', 'password', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 11, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (343, '20', 'status', '帐号状态（0正常 1停用）', 'char(1)', 'String', 'status', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'radio', '', 12, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (344, '20', 'del_flag', '删除标志（0代表存在 2代表删除）', 'char(1)', 'String', 'delFlag', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 13, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (345, '20', 'login_ip', '最后登录IP', 'varchar(128)', 'String', 'loginIp', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 14, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (346, '20', 'login_date', '最后登录时间', 'datetime', 'Date', 'loginDate', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'datetime', '', 15, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (347, '20', 'create_by', '创建者', 'varchar(64)', 'String', 'createBy', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 16, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (348, '20', 'create_time', '创建时间', 'datetime', 'Date', 'createTime', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'datetime', '', 17, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (349, '20', 'update_by', '更新者', 'varchar(64)', 'String', 'updateBy', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'input', '', 18, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (350, '20', 'update_time', '更新时间', 'datetime', 'Date', 'updateTime', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'datetime', '', 19, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (351, '20', 'remark', '备注', 'varchar(500)', 'String', 'remark', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'textarea', '', 20, 'admin', '2021-08-26 17:07:45', '', NULL); +INSERT INTO `gen_table_column` VALUES (352, '21', 'id', NULL, 'int', 'Long', 'id', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-08-27 11:55:05', '', NULL); +INSERT INTO `gen_table_column` VALUES (353, '21', 'user_id', NULL, 'int', 'Long', 'userId', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-08-27 11:55:05', '', NULL); +INSERT INTO `gen_table_column` VALUES (354, '21', 'device_id', NULL, 'int', 'Long', 'deviceId', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 3, 'admin', '2021-08-27 11:55:06', '', NULL); +INSERT INTO `gen_table_column` VALUES (355, '21', 'device_num', NULL, 'varchar(60)', 'String', 'deviceNum', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 4, 'admin', '2021-08-27 11:55:06', '', NULL); +INSERT INTO `gen_table_column` VALUES (356, '21', 'gmt_time', NULL, 'timestamp', 'Date', 'gmtTime', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'datetime', '', 5, 'admin', '2021-08-27 11:55:06', '', NULL); +INSERT INTO `gen_table_column` VALUES (357, '21', 'gmt_update', NULL, 'timestamp', 'Date', 'gmtUpdate', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'datetime', '', 6, 'admin', '2021-08-27 11:55:06', '', NULL); +INSERT INTO `gen_table_column` VALUES (358, '22', 'device_id', '设备ID', 'bigint', 'Long', 'deviceId', '1', '1', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 1, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (359, '22', 'device_num', '设备编号', 'varchar(64)', 'String', 'deviceNum', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'input', '', 2, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (360, '22', 'category_id', '设备分类', 'bigint', 'Long', 'categoryId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 3, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (361, '22', 'device_name', '设备名称', 'varchar(64)', 'String', 'deviceName', '0', '0', '1', '1', '1', '1', '1', 'LIKE', 'input', '', 4, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (362, '22', 'firmware_version', '固件版本', 'varchar(32)', 'String', 'firmwareVersion', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 5, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (363, '22', 'owner_id', '设备用户ID', 'varchar(64)', 'String', 'ownerId', '0', '0', NULL, '1', '1', '1', '1', 'EQ', 'input', '', 6, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (364, '22', 'del_flag', '删除标志（0代表存在 2代表删除）', 'char(1)', 'String', 'delFlag', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 7, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (365, '22', 'status', '设备状态：未激活，未绑定，已绑定', 'varchar(255)', 'String', 'status', '0', '0', '1', '1', '1', '1', '1', 'EQ', 'radio', '', 8, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (366, '22', 'create_by', '创建者', 'varchar(64)', 'String', 'createBy', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'input', '', 9, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (367, '22', 'create_time', '创建时间', 'datetime', 'Date', 'createTime', '0', '0', NULL, '1', NULL, NULL, NULL, 'EQ', 'datetime', '', 10, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (368, '22', 'update_by', '更新者', 'varchar(64)', 'String', 'updateBy', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'input', '', 11, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (369, '22', 'update_time', '更新时间', 'datetime', 'Date', 'updateTime', '0', '0', NULL, '1', '1', NULL, NULL, 'EQ', 'datetime', '', 12, 'admin', '2021-08-27 13:45:40', '', NULL); +INSERT INTO `gen_table_column` VALUES (370, '22', 'remark', '备注', 'varchar(500)', 'String', 'remark', '0', '0', NULL, '1', '1', '1', NULL, 'EQ', 'textarea', '', 13, 'admin', '2021-08-27 13:45:40', '', NULL); + +-- ---------------------------- +-- Table structure for iot_category +-- ---------------------------- +DROP TABLE IF EXISTS `iot_category`; +CREATE TABLE `iot_category` ( + `category_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '设备分类ID', + `category_name` varchar(100) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL COMMENT '设备分类名称', + `del_flag` char(1) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `create_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`category_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 6 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_0900_ai_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_category +-- ---------------------------- +INSERT INTO `iot_category` VALUES (1, 'wifi通断器', '0', '', '2021-05-06 01:00:04', '', '2021-05-06 01:05:08', '智能开关，带温湿度传感器，支持手机和射频遥控控制。应用于传统家电设备的控制等。'); +INSERT INTO `iot_category` VALUES (2, '智能灯', '0', '', '2021-05-06 01:01:39', '', '2021-05-06 01:05:32', '智能七彩灯，支持雷达感应、报警，手机和射频遥控控制。应用于环境灯、感应灯和传统灯的控制等。'); +INSERT INTO `iot_category` VALUES (3, '智能门锁', '0', '', '2021-05-06 01:02:34', '', '2021-05-06 01:04:22', '支持手机和射频遥控控制。'); +INSERT INTO `iot_category` VALUES (4, '智能水阀', '0', '', '2021-05-06 01:03:57', '', NULL, '手机和射频遥控控制，应用于浇灌系统。'); +INSERT INTO `iot_category` VALUES (5, '其他', '0', '', '2021-05-28 19:31:05', '', NULL, '其他硬件设备的接入'); + +-- ---------------------------- +-- Table structure for iot_device +-- ---------------------------- +DROP TABLE IF EXISTS `iot_device`; +CREATE TABLE `iot_device` ( + `device_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '设备ID', + `device_num` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL COMMENT '设备编号', + `category_id` bigint(0) NULL DEFAULT NULL COMMENT '设备分类', + `device_name` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL COMMENT '设备名称', + `remark` varchar(500) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '备注', + `firmware_version` varchar(32) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '固件版本', + `owner_id` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '设备用户ID', + `del_flag` char(1) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `status` varchar(255) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL DEFAULT '未激活' COMMENT '设备状态：未激活，未绑定，已绑定', + `create_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + PRIMARY KEY (`device_id`) USING BTREE, + INDEX `iot_device_category`(`category_id`) USING BTREE, + CONSTRAINT `iot_device_category` FOREIGN KEY (`category_id`) REFERENCES `iot_category` (`category_id`) ON DELETE SET NULL ON UPDATE RESTRICT +) ENGINE = InnoDB AUTO_INCREMENT = 13 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_0900_ai_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_device +-- ---------------------------- +INSERT INTO `iot_device` VALUES (1, '7CDFA1049ADA', 2, '阿拉丁神灯', '阿拉丁灯灯灯灯灯。', '1.0', NULL, '0', '未激活', '', '2021-05-23 14:26:38', '', '2021-06-26 20:25:09'); +INSERT INTO `iot_device` VALUES (2, '7CDFA1049ADB', 1, '智能开关-测试', '暂无', '1.0', NULL, '0', '未激活', '', '2021-05-23 14:26:38', '', '2021-06-15 02:47:52'); +INSERT INTO `iot_device` VALUES (3, '7CDFA1049ADC', 1, '设备名称', 'remark', '1.0', NULL, '0', '未激活', '', '2021-05-23 14:26:38', '', '2021-06-15 02:47:52'); +INSERT INTO `iot_device` VALUES (4, '863488052352472', 4, '4G开关001', '灯等等灯', '1.0', '1', '0', '未绑定', '', NULL, '', '2021-08-31 20:11:17'); + +-- ---------------------------- +-- Table structure for iot_device_group +-- ---------------------------- +DROP TABLE IF EXISTS `iot_device_group`; +CREATE TABLE `iot_device_group` ( + `device_group_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '设备分组ID', + `group_id` bigint(0) NOT NULL COMMENT '分组ID', + `device_id` bigint(0) NOT NULL COMMENT '设备ID', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + PRIMARY KEY (`device_group_id`) USING BTREE, + INDEX `iot_device_group_group_id`(`group_id`) USING BTREE, + INDEX `iot_device_group_device_id`(`device_id`) USING BTREE, + CONSTRAINT `iot_device_group_device_id` FOREIGN KEY (`device_id`) REFERENCES `iot_device` (`device_id`) ON DELETE RESTRICT ON UPDATE RESTRICT, + CONSTRAINT `iot_device_group_group_id` FOREIGN KEY (`group_id`) REFERENCES `iot_group` (`group_id`) ON DELETE RESTRICT ON UPDATE RESTRICT +) ENGINE = InnoDB AUTO_INCREMENT = 8 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_0900_ai_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_device_group +-- ---------------------------- +INSERT INTO `iot_device_group` VALUES (1, 1, 1, '2021-06-11 23:25:49'); +INSERT INTO `iot_device_group` VALUES (2, 2, 1, '2021-06-11 23:25:49'); +INSERT INTO `iot_device_group` VALUES (6, 1, 2, '2021-06-11 23:25:49'); +INSERT INTO `iot_device_group` VALUES (7, 2, 2, '2021-06-11 23:25:49'); + +-- ---------------------------- +-- Table structure for iot_device_set +-- ---------------------------- +DROP TABLE IF EXISTS `iot_device_set`; +CREATE TABLE `iot_device_set` ( + `device_set_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '配置id', + `device_id` bigint(0) NULL DEFAULT NULL COMMENT '设备ID', + `device_num` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL COMMENT '设备编号', + `is_alarm` tinyint(1) NULL DEFAULT NULL COMMENT '是否启用报警', + `is_radar` tinyint(1) NULL DEFAULT NULL COMMENT '是否启用雷达感应', + `is_host` tinyint(1) NULL DEFAULT NULL COMMENT '是否托管', + `is_reset` tinyint(1) NULL DEFAULT NULL COMMENT '是否重启', + `is_ap` tinyint(1) NULL DEFAULT NULL COMMENT '是否打开AP', + `is_smart_config` tinyint(1) NULL DEFAULT NULL COMMENT '是否智能配网', + `is_wifi_offline` tinyint(1) NULL DEFAULT NULL COMMENT '是否离线模式', + `is_open_certifi` tinyint(1) NULL DEFAULT NULL COMMENT '是否使用证书', + `is_rf_control` tinyint(1) NULL DEFAULT NULL COMMENT '是否启用射频遥控', + `is_rf_learn` tinyint(1) NULL DEFAULT NULL COMMENT '是否遥控配对', + `is_rf_clear` tinyint(1) NULL DEFAULT NULL COMMENT '是否遥控清码', + `rf_one_func` tinyint(0) NULL DEFAULT NULL COMMENT 'RF遥控第一个按键功能', + `rf_two_func` tinyint(0) NULL DEFAULT NULL COMMENT 'RF遥控第二个按键功能', + `rf_three_func` tinyint(0) NULL DEFAULT NULL COMMENT 'RF遥控第三个按键功能', + `rf_four_func` tinyint(0) NULL DEFAULT NULL COMMENT 'RF遥控第四个按键功能', + `owner_id` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '设备用户ID，用于记录配网后用户的变更', + `network_address` varchar(255) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '配网地址', + `network_ip` varchar(32) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '配网IP', + `radar_interval` smallint(0) NULL DEFAULT NULL COMMENT '雷达感应间隔，单位秒', + `del_flag` char(1) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `create_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`device_set_id`) USING BTREE, + INDEX `iot_device_config`(`device_id`) USING BTREE, + CONSTRAINT `iot_device_config` FOREIGN KEY (`device_id`) REFERENCES `iot_device` (`device_id`) ON DELETE SET NULL ON UPDATE RESTRICT +) ENGINE = InnoDB AUTO_INCREMENT = 300 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_0900_ai_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_device_set +-- ---------------------------- +INSERT INTO `iot_device_set` VALUES (1, 1, '7CDFA1049ADA', 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 2, 3, 4, '1', '内网', '127.0.0.1', 5, '0', '', '2021-06-26 20:25:10', '', NULL, NULL); +INSERT INTO `iot_device_set` VALUES (2, 2, '7CDFA1049ADB', 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1, 2, 3, 4, '1', '内网', '127.0.0.1', 5, '0', '', '2021-06-01 00:12:26', '', '2021-06-23 20:59:33', NULL); +INSERT INTO `iot_device_set` VALUES (3, 4, '863488052352472', NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', NULL, '', NULL, NULL); + +-- ---------------------------- +-- Table structure for iot_device_status +-- ---------------------------- +DROP TABLE IF EXISTS `iot_device_status`; +CREATE TABLE `iot_device_status` ( + `device_status_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '设备状态ID', + `device_id` bigint(0) NULL DEFAULT NULL COMMENT '设备ID', + `device_num` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL COMMENT '设备编号', + `relay_status` tinyint(1) NULL DEFAULT NULL COMMENT '继电器状态:0-关，1-开', + `light_status` tinyint(1) NULL DEFAULT NULL COMMENT '灯状态:0-关，1-开', + `is_online` tinyint(1) NULL DEFAULT NULL COMMENT '设备是否在线', + `rssi` tinyint(0) NULL DEFAULT NULL COMMENT 'wifi信号强度', + `device_temperature` float(6, 2) NULL DEFAULT NULL COMMENT '设备温度', + `air_temperature` float(6, 2) NULL DEFAULT NULL COMMENT '空气温度', + `air_humidity` float(6, 2) NULL DEFAULT NULL COMMENT '空气湿度', + `trigger_source` tinyint(0) NULL DEFAULT NULL COMMENT '触发源：0-无、1-按键、2.手机、3-浏览器、4-射频遥控、5-雷达、6-报警、7-定时', + `brightness` tinyint(0) UNSIGNED NULL DEFAULT NULL COMMENT '灯的亮度：0-100', + `light_interval` int(0) NULL DEFAULT NULL COMMENT '渐变、动感模式闪烁间隔，单位秒', + `light_mode` tinyint(0) NULL DEFAULT NULL COMMENT '灯模式：1-、2-、3-、4-、5-、6-', + `fade_time` int(0) NULL DEFAULT NULL COMMENT '灯渐变时间', + `red` tinyint(0) UNSIGNED NULL DEFAULT NULL COMMENT '红灯值：0-255', + `green` tinyint(0) UNSIGNED NULL DEFAULT NULL COMMENT '绿灯值：0-255', + `blue` tinyint(0) UNSIGNED NULL DEFAULT NULL COMMENT '蓝灯值：0-255', + `del_flag` char(1) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `create_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`device_status_id`) USING BTREE, + INDEX `iot_device_status`(`device_id`) USING BTREE, + CONSTRAINT `iot_device_status` FOREIGN KEY (`device_id`) REFERENCES `iot_device` (`device_id`) ON DELETE SET NULL ON UPDATE RESTRICT +) ENGINE = InnoDB AUTO_INCREMENT = 2879 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_0900_ai_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_device_status +-- ---------------------------- +INSERT INTO `iot_device_status` VALUES (1, 1, '7CDFA1049ADA', 1, 1, 1, -80, 36.52, 0.00, 0.00, 0, 100, 432, 0, 259, 255, 254, 241, '0', '', '2021-06-26 20:27:17', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2, 2, '7CDFA1049ADB', 0, 1, 0, -46, 23.78, 0.00, 0.00, 0, 100, 100, 0, 100, 255, 255, 255, '0', '', '2021-06-01 00:13:38', '', '2021-06-23 21:00:37', NULL); +INSERT INTO `iot_device_status` VALUES (2846, 1, '7CDFA1049ADA', 1, 0, 1, -80, 36.52, 0.00, 0.00, 0, 100, 432, 0, 259, 255, 254, 241, '0', '', '2021-08-26 18:38:11', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2847, 1, '7CDFA1049ADA', 1, 1, 1, -80, 36.52, 0.00, 0.00, 0, 100, 432, 0, 259, 255, 254, 241, '0', '', '2021-08-26 18:38:12', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2848, 1, '7CDFA1049ADA', 1, 0, 1, -80, 36.52, 0.00, 0.00, 0, 100, 432, 0, 259, 255, 254, 241, '0', '', '2021-08-26 18:38:13', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2849, 1, '7CDFA1049ADA', 1, 1, 1, -80, 36.52, 0.00, 0.00, 0, 100, 432, 0, 259, 255, 254, 241, '0', '', '2021-08-26 18:38:17', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2850, 4, '863488052352472', 1, 1, 1, -80, 36.52, 0.00, 0.00, 0, 100, 432, 0, 259, 255, 254, 241, '0', '', '2021-08-26 18:38:17', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2851, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:11:20', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2852, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:11:22', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2853, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:11:23', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2854, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:14:13', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2855, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:14:13', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2856, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:19:29', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2857, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:19:31', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2858, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:20:02', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2859, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:20:03', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2860, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:23:34', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2861, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:23:40', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2862, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:37', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2863, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:39', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2864, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:41', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2865, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:43', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2866, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:47', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2867, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:50', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2868, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:24:51', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2869, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:08', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2870, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:10', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2871, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:10', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2872, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:11', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2873, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:12', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2874, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:13', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2875, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:14', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2876, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:14', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2877, 4, '863488052352472', 1, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:15', '', NULL, NULL); +INSERT INTO `iot_device_status` VALUES (2878, 4, '863488052352472', 0, NULL, 1, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, '0', '', '2021-08-31 20:25:15', '', NULL, NULL); + +-- ---------------------------- +-- Table structure for iot_device_user_relation +-- ---------------------------- +DROP TABLE IF EXISTS `iot_device_user_relation`; +CREATE TABLE `iot_device_user_relation` ( + `id` int(0) NOT NULL AUTO_INCREMENT, + `user_id` int(0) NOT NULL, + `device_id` int(0) NOT NULL, + `device_num` varchar(60) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NOT NULL, + `device_name` varchar(255) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NULL DEFAULT NULL COMMENT '设备名称', + `remark` varchar(255) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NULL DEFAULT NULL COMMENT '设备备注', + `gmt_time` timestamp(0) NULL DEFAULT CURRENT_TIMESTAMP(0), + `gmt_update` timestamp(0) NULL DEFAULT NULL ON UPDATE CURRENT_TIMESTAMP(0), + PRIMARY KEY (`id`) USING BTREE, + INDEX `user_id`(`user_id`, `device_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 14 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_unicode_ci COMMENT = '用户-设备关联表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_device_user_relation +-- ---------------------------- +INSERT INTO `iot_device_user_relation` VALUES (8, 115, 4, '863488052352472', 'wxy测试开关', NULL, '2021-08-28 13:35:23', NULL); +INSERT INTO `iot_device_user_relation` VALUES (10, 114, 4, '863488052352472', '阿拉丁神灯', '灯等等灯', '2021-08-30 10:57:14', '2021-08-30 15:28:25'); +INSERT INTO `iot_device_user_relation` VALUES (13, 116, 4, '863488052352472', '阿拉丁神灯', NULL, '2021-08-31 20:24:31', NULL); + +-- ---------------------------- +-- Table structure for iot_group +-- ---------------------------- +DROP TABLE IF EXISTS `iot_group`; +CREATE TABLE `iot_group` ( + `group_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '设备分组ID', + `user_id` bigint(0) NOT NULL COMMENT '用户ID', + `group_name` varchar(100) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NOT NULL COMMENT '设备分组名称', + `group_order` smallint(5) UNSIGNED ZEROFILL NULL DEFAULT 00000 COMMENT '分组的排序', + `del_flag` char(1) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `create_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8mb4 COLLATE utf8mb4_0900_ai_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`group_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 6 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_0900_ai_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of iot_group +-- ---------------------------- +INSERT INTO `iot_group` VALUES (1, 114, '一楼', 00001, '0', '', '2021-05-18 16:35:03', '', '2021-05-18 16:35:32', '智能灯'); +INSERT INTO `iot_group` VALUES (2, 114, '二楼', 00002, '0', '', '2021-05-18 16:35:03', '', '2021-05-18 16:35:32', '智能灯'); +INSERT INTO `iot_group` VALUES (3, 114, '三楼', 00003, '0', '', '2021-05-18 16:35:03', '', '2021-05-18 16:35:32', '智能灯'); +INSERT INTO `iot_group` VALUES (4, 114, '四楼', 00004, '0', '', '2021-05-18 16:35:03', '', '2021-05-18 16:35:32', '智能灯'); +INSERT INTO `iot_group` VALUES (5, 114, '五楼', 00005, '0', '', '2021-05-18 16:35:03', '', '2021-05-18 16:35:32', '智能灯'); + +-- ---------------------------- +-- Table structure for qrtz_blob_triggers +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_blob_triggers`; +CREATE TABLE `qrtz_blob_triggers` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `blob_data` blob NULL, + PRIMARY KEY (`sched_name`, `trigger_name`, `trigger_group`) USING BTREE, + CONSTRAINT `QRTZ_BLOB_TRIGGERS_ibfk_1` FOREIGN KEY (`sched_name`, `trigger_name`, `trigger_group`) REFERENCES `qrtz_triggers` (`sched_name`, `trigger_name`, `trigger_group`) ON DELETE RESTRICT ON UPDATE RESTRICT +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Table structure for qrtz_calendars +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_calendars`; +CREATE TABLE `qrtz_calendars` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `calendar_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `calendar` blob NOT NULL, + PRIMARY KEY (`sched_name`, `calendar_name`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Table structure for qrtz_cron_triggers +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_cron_triggers`; +CREATE TABLE `qrtz_cron_triggers` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `cron_expression` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `time_zone_id` varchar(80) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + PRIMARY KEY (`sched_name`, `trigger_name`, `trigger_group`) USING BTREE, + CONSTRAINT `QRTZ_CRON_TRIGGERS_ibfk_1` FOREIGN KEY (`sched_name`, `trigger_name`, `trigger_group`) REFERENCES `qrtz_triggers` (`sched_name`, `trigger_name`, `trigger_group`) ON DELETE RESTRICT ON UPDATE RESTRICT +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of qrtz_cron_triggers +-- ---------------------------- +INSERT INTO `qrtz_cron_triggers` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME1', 'DEFAULT', '0/10 * * * * ?', 'Asia/Shanghai'); +INSERT INTO `qrtz_cron_triggers` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME2', 'DEFAULT', '0/15 * * * * ?', 'Asia/Shanghai'); +INSERT INTO `qrtz_cron_triggers` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME3', 'DEFAULT', '0/20 * * * * ?', 'Asia/Shanghai'); + +-- ---------------------------- +-- Table structure for qrtz_fired_triggers +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_fired_triggers`; +CREATE TABLE `qrtz_fired_triggers` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `entry_id` varchar(95) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `instance_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `fired_time` bigint(0) NOT NULL, + `sched_time` bigint(0) NOT NULL, + `priority` int(0) NOT NULL, + `state` varchar(16) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `job_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `job_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `is_nonconcurrent` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `requests_recovery` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + PRIMARY KEY (`sched_name`, `entry_id`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Table structure for qrtz_job_details +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_job_details`; +CREATE TABLE `qrtz_job_details` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `job_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `job_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `description` varchar(250) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `job_class_name` varchar(250) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `is_durable` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `is_nonconcurrent` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `is_update_data` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `requests_recovery` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `job_data` blob NULL, + PRIMARY KEY (`sched_name`, `job_name`, `job_group`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of qrtz_job_details +-- ---------------------------- +INSERT INTO `qrtz_job_details` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME1', 'DEFAULT', NULL, 'com.ruoyi.quartz.util.QuartzDisallowConcurrentExecution', '0', '1', '0', '0', 0xACED0005737200156F72672E71756172747A2E4A6F62446174614D61709FB083E8BFA9B0CB020000787200266F72672E71756172747A2E7574696C732E537472696E674B65794469727479466C61674D61708208E8C3FBC55D280200015A0013616C6C6F77735472616E7369656E74446174617872001D6F72672E71756172747A2E7574696C732E4469727479466C61674D617013E62EAD28760ACE0200025A000564697274794C00036D617074000F4C6A6176612F7574696C2F4D61703B787001737200116A6176612E7574696C2E486173684D61700507DAC1C31660D103000246000A6C6F6164466163746F724900097468726573686F6C6478703F4000000000000C7708000000100000000174000F5441534B5F50524F504552544945537372001E636F6D2E72756F79692E71756172747A2E646F6D61696E2E5379734A6F6200000000000000010200084C000A636F6E63757272656E747400124C6A6176612F6C616E672F537472696E673B4C000E63726F6E45787072657373696F6E71007E00094C000C696E766F6B6554617267657471007E00094C00086A6F6247726F757071007E00094C00056A6F6249647400104C6A6176612F6C616E672F4C6F6E673B4C00076A6F624E616D6571007E00094C000D6D697366697265506F6C69637971007E00094C000673746174757371007E000978720027636F6D2E72756F79692E636F6D6D6F6E2E636F72652E646F6D61696E2E42617365456E7469747900000000000000010200074C0008637265617465427971007E00094C000A63726561746554696D657400104C6A6176612F7574696C2F446174653B4C0006706172616D7371007E00034C000672656D61726B71007E00094C000B73656172636856616C756571007E00094C0008757064617465427971007E00094C000A75706461746554696D6571007E000C787074000561646D696E7372000E6A6176612E7574696C2E44617465686A81014B59741903000078707708000001797B913EF878707400007070707400013174000E302F3130202A202A202A202A203F74001172795461736B2E72794E6F506172616D7374000744454641554C547372000E6A6176612E6C616E672E4C6F6E673B8BE490CC8F23DF0200014A000576616C7565787200106A6176612E6C616E672E4E756D62657286AC951D0B94E08B02000078700000000000000001740018E7B3BBE7BB9FE9BB98E8AEA4EFBC88E697A0E58F82EFBC8974000133740001317800); +INSERT INTO `qrtz_job_details` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME2', 'DEFAULT', NULL, 'com.ruoyi.quartz.util.QuartzDisallowConcurrentExecution', '0', '1', '0', '0', 0xACED0005737200156F72672E71756172747A2E4A6F62446174614D61709FB083E8BFA9B0CB020000787200266F72672E71756172747A2E7574696C732E537472696E674B65794469727479466C61674D61708208E8C3FBC55D280200015A0013616C6C6F77735472616E7369656E74446174617872001D6F72672E71756172747A2E7574696C732E4469727479466C61674D617013E62EAD28760ACE0200025A000564697274794C00036D617074000F4C6A6176612F7574696C2F4D61703B787001737200116A6176612E7574696C2E486173684D61700507DAC1C31660D103000246000A6C6F6164466163746F724900097468726573686F6C6478703F4000000000000C7708000000100000000174000F5441534B5F50524F504552544945537372001E636F6D2E72756F79692E71756172747A2E646F6D61696E2E5379734A6F6200000000000000010200084C000A636F6E63757272656E747400124C6A6176612F6C616E672F537472696E673B4C000E63726F6E45787072657373696F6E71007E00094C000C696E766F6B6554617267657471007E00094C00086A6F6247726F757071007E00094C00056A6F6249647400104C6A6176612F6C616E672F4C6F6E673B4C00076A6F624E616D6571007E00094C000D6D697366697265506F6C69637971007E00094C000673746174757371007E000978720027636F6D2E72756F79692E636F6D6D6F6E2E636F72652E646F6D61696E2E42617365456E7469747900000000000000010200074C0008637265617465427971007E00094C000A63726561746554696D657400104C6A6176612F7574696C2F446174653B4C0006706172616D7371007E00034C000672656D61726B71007E00094C000B73656172636856616C756571007E00094C0008757064617465427971007E00094C000A75706461746554696D6571007E000C787074000561646D696E7372000E6A6176612E7574696C2E44617465686A81014B59741903000078707708000001797B913EF878707400007070707400013174000E302F3135202A202A202A202A203F74001572795461736B2E7279506172616D7328277279272974000744454641554C547372000E6A6176612E6C616E672E4C6F6E673B8BE490CC8F23DF0200014A000576616C7565787200106A6176612E6C616E672E4E756D62657286AC951D0B94E08B02000078700000000000000002740018E7B3BBE7BB9FE9BB98E8AEA4EFBC88E69C89E58F82EFBC8974000133740001317800); +INSERT INTO `qrtz_job_details` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME3', 'DEFAULT', NULL, 'com.ruoyi.quartz.util.QuartzDisallowConcurrentExecution', '0', '1', '0', '0', 0xACED0005737200156F72672E71756172747A2E4A6F62446174614D61709FB083E8BFA9B0CB020000787200266F72672E71756172747A2E7574696C732E537472696E674B65794469727479466C61674D61708208E8C3FBC55D280200015A0013616C6C6F77735472616E7369656E74446174617872001D6F72672E71756172747A2E7574696C732E4469727479466C61674D617013E62EAD28760ACE0200025A000564697274794C00036D617074000F4C6A6176612F7574696C2F4D61703B787001737200116A6176612E7574696C2E486173684D61700507DAC1C31660D103000246000A6C6F6164466163746F724900097468726573686F6C6478703F4000000000000C7708000000100000000174000F5441534B5F50524F504552544945537372001E636F6D2E72756F79692E71756172747A2E646F6D61696E2E5379734A6F6200000000000000010200084C000A636F6E63757272656E747400124C6A6176612F6C616E672F537472696E673B4C000E63726F6E45787072657373696F6E71007E00094C000C696E766F6B6554617267657471007E00094C00086A6F6247726F757071007E00094C00056A6F6249647400104C6A6176612F6C616E672F4C6F6E673B4C00076A6F624E616D6571007E00094C000D6D697366697265506F6C69637971007E00094C000673746174757371007E000978720027636F6D2E72756F79692E636F6D6D6F6E2E636F72652E646F6D61696E2E42617365456E7469747900000000000000010200074C0008637265617465427971007E00094C000A63726561746554696D657400104C6A6176612F7574696C2F446174653B4C0006706172616D7371007E00034C000672656D61726B71007E00094C000B73656172636856616C756571007E00094C0008757064617465427971007E00094C000A75706461746554696D6571007E000C787074000561646D696E7372000E6A6176612E7574696C2E44617465686A81014B59741903000078707708000001797B913EF878707400007070707400013174000E302F3230202A202A202A202A203F74003872795461736B2E72794D756C7469706C65506172616D7328277279272C20747275652C20323030304C2C203331362E3530442C203130302974000744454641554C547372000E6A6176612E6C616E672E4C6F6E673B8BE490CC8F23DF0200014A000576616C7565787200106A6176612E6C616E672E4E756D62657286AC951D0B94E08B02000078700000000000000003740018E7B3BBE7BB9FE9BB98E8AEA4EFBC88E5A49AE58F82EFBC8974000133740001317800); + +-- ---------------------------- +-- Table structure for qrtz_locks +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_locks`; +CREATE TABLE `qrtz_locks` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `lock_name` varchar(40) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + PRIMARY KEY (`sched_name`, `lock_name`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of qrtz_locks +-- ---------------------------- +INSERT INTO `qrtz_locks` VALUES ('RuoyiScheduler', 'STATE_ACCESS'); +INSERT INTO `qrtz_locks` VALUES ('RuoyiScheduler', 'TRIGGER_ACCESS'); + +-- ---------------------------- +-- Table structure for qrtz_paused_trigger_grps +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_paused_trigger_grps`; +CREATE TABLE `qrtz_paused_trigger_grps` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + PRIMARY KEY (`sched_name`, `trigger_group`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Table structure for qrtz_scheduler_state +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_scheduler_state`; +CREATE TABLE `qrtz_scheduler_state` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `instance_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `last_checkin_time` bigint(0) NOT NULL, + `checkin_interval` bigint(0) NOT NULL, + PRIMARY KEY (`sched_name`, `instance_name`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of qrtz_scheduler_state +-- ---------------------------- +INSERT INTO `qrtz_scheduler_state` VALUES ('RuoyiScheduler', 'Admin1630461270994', 1630548198218, 15000); + +-- ---------------------------- +-- Table structure for qrtz_simple_triggers +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_simple_triggers`; +CREATE TABLE `qrtz_simple_triggers` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `repeat_count` bigint(0) NOT NULL, + `repeat_interval` bigint(0) NOT NULL, + `times_triggered` bigint(0) NOT NULL, + PRIMARY KEY (`sched_name`, `trigger_name`, `trigger_group`) USING BTREE, + CONSTRAINT `QRTZ_SIMPLE_TRIGGERS_ibfk_1` FOREIGN KEY (`sched_name`, `trigger_name`, `trigger_group`) REFERENCES `qrtz_triggers` (`sched_name`, `trigger_name`, `trigger_group`) ON DELETE RESTRICT ON UPDATE RESTRICT +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Table structure for qrtz_simprop_triggers +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_simprop_triggers`; +CREATE TABLE `qrtz_simprop_triggers` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `str_prop_1` varchar(512) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `str_prop_2` varchar(512) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `str_prop_3` varchar(512) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `int_prop_1` int(0) NULL DEFAULT NULL, + `int_prop_2` int(0) NULL DEFAULT NULL, + `long_prop_1` bigint(0) NULL DEFAULT NULL, + `long_prop_2` bigint(0) NULL DEFAULT NULL, + `dec_prop_1` decimal(13, 4) NULL DEFAULT NULL, + `dec_prop_2` decimal(13, 4) NULL DEFAULT NULL, + `bool_prop_1` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `bool_prop_2` varchar(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + PRIMARY KEY (`sched_name`, `trigger_name`, `trigger_group`) USING BTREE, + CONSTRAINT `QRTZ_SIMPROP_TRIGGERS_ibfk_1` FOREIGN KEY (`sched_name`, `trigger_name`, `trigger_group`) REFERENCES `qrtz_triggers` (`sched_name`, `trigger_name`, `trigger_group`) ON DELETE RESTRICT ON UPDATE RESTRICT +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Table structure for qrtz_triggers +-- ---------------------------- +DROP TABLE IF EXISTS `qrtz_triggers`; +CREATE TABLE `qrtz_triggers` ( + `sched_name` varchar(120) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `job_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `job_group` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `description` varchar(250) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `next_fire_time` bigint(0) NULL DEFAULT NULL, + `prev_fire_time` bigint(0) NULL DEFAULT NULL, + `priority` int(0) NULL DEFAULT NULL, + `trigger_state` varchar(16) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `trigger_type` varchar(8) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL, + `start_time` bigint(0) NOT NULL, + `end_time` bigint(0) NULL DEFAULT NULL, + `calendar_name` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL, + `misfire_instr` smallint(0) NULL DEFAULT NULL, + `job_data` blob NULL, + PRIMARY KEY (`sched_name`, `trigger_name`, `trigger_group`) USING BTREE, + INDEX `sched_name`(`sched_name`, `job_name`, `job_group`) USING BTREE, + CONSTRAINT `QRTZ_TRIGGERS_ibfk_1` FOREIGN KEY (`sched_name`, `job_name`, `job_group`) REFERENCES `qrtz_job_details` (`sched_name`, `job_name`, `job_group`) ON DELETE RESTRICT ON UPDATE RESTRICT +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of qrtz_triggers +-- ---------------------------- +INSERT INTO `qrtz_triggers` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME1', 'DEFAULT', 'TASK_CLASS_NAME1', 'DEFAULT', NULL, 1630461280000, -1, 5, 'PAUSED', 'CRON', 1630461271000, 0, NULL, 2, ''); +INSERT INTO `qrtz_triggers` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME2', 'DEFAULT', 'TASK_CLASS_NAME2', 'DEFAULT', NULL, 1630461285000, -1, 5, 'PAUSED', 'CRON', 1630461271000, 0, NULL, 2, ''); +INSERT INTO `qrtz_triggers` VALUES ('RuoyiScheduler', 'TASK_CLASS_NAME3', 'DEFAULT', 'TASK_CLASS_NAME3', 'DEFAULT', NULL, 1630461280000, -1, 5, 'PAUSED', 'CRON', 1630461271000, 0, NULL, 2, ''); + +-- ---------------------------- +-- Table structure for sys_config +-- ---------------------------- +DROP TABLE IF EXISTS `sys_config`; +CREATE TABLE `sys_config` ( + `config_id` int(0) NOT NULL AUTO_INCREMENT COMMENT '参数主键', + `config_name` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '参数名称', + `config_key` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '参数键名', + `config_value` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '参数键值', + `config_type` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT 'N' COMMENT '系统内置（Y是 N否）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`config_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 4 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '参数配置表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_config +-- ---------------------------- +INSERT INTO `sys_config` VALUES (1, '主框架页-默认皮肤样式名称', 'sys.index.skinName', 'skin-blue', 'Y', 'admin', '2021-05-18 02:23:07', '', NULL, '蓝色 skin-blue、绿色 skin-green、紫色 skin-purple、红色 skin-red、黄色 skin-yellow'); +INSERT INTO `sys_config` VALUES (2, '用户管理-账号初始密码', 'sys.user.initPassword', '123456', 'Y', 'admin', '2021-05-18 02:23:07', '', NULL, '初始化密码 123456'); +INSERT INTO `sys_config` VALUES (3, '主框架页-侧边栏主题', 'sys.index.sideTheme', 'theme-dark', 'Y', 'admin', '2021-05-18 02:23:07', '', NULL, '深色主题theme-dark，浅色主题theme-light'); + +-- ---------------------------- +-- Table structure for sys_dept +-- ---------------------------- +DROP TABLE IF EXISTS `sys_dept`; +CREATE TABLE `sys_dept` ( + `dept_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '部门id', + `parent_id` bigint(0) NULL DEFAULT 0 COMMENT '父部门id', + `ancestors` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '祖级列表', + `dept_name` varchar(30) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '部门名称', + `order_num` int(0) NULL DEFAULT 0 COMMENT '显示顺序', + `leader` varchar(20) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '负责人', + `phone` varchar(11) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '联系电话', + `email` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '邮箱', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '部门状态（0正常 1停用）', + `del_flag` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + PRIMARY KEY (`dept_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 110 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '部门表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_dept +-- ---------------------------- +INSERT INTO `sys_dept` VALUES (100, 0, '0', '若依科技', 0, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (101, 100, '0,100', '深圳总公司', 1, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (102, 100, '0,100', '长沙分公司', 2, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (103, 101, '0,100,101', '研发部门', 1, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (104, 101, '0,100,101', '市场部门', 2, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (105, 101, '0,100,101', '测试部门', 3, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (106, 101, '0,100,101', '财务部门', 4, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (107, 101, '0,100,101', '运维部门', 5, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (108, 102, '0,100,102', '市场部门', 1, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); +INSERT INTO `sys_dept` VALUES (109, 102, '0,100,102', '财务部门', 2, '若依', '15888888888', 'ry@qq.com', '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL); + +-- ---------------------------- +-- Table structure for sys_dict_data +-- ---------------------------- +DROP TABLE IF EXISTS `sys_dict_data`; +CREATE TABLE `sys_dict_data` ( + `dict_code` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '字典编码', + `dict_sort` int(0) NULL DEFAULT 0 COMMENT '字典排序', + `dict_label` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '字典标签', + `dict_value` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '字典键值', + `dict_type` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '字典类型', + `css_class` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '样式属性（其他样式扩展）', + `list_class` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '表格回显样式', + `is_default` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT 'N' COMMENT '是否默认（Y是 N否）', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '状态（0正常 1停用）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`dict_code`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 119 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '字典数据表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_dict_data +-- ---------------------------- +INSERT INTO `sys_dict_data` VALUES (1, 1, '男', '0', 'sys_user_sex', '', '', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '性别男'); +INSERT INTO `sys_dict_data` VALUES (2, 2, '女', '1', 'sys_user_sex', '', '', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '性别女'); +INSERT INTO `sys_dict_data` VALUES (3, 3, '未知', '2', 'sys_user_sex', '', '', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '性别未知'); +INSERT INTO `sys_dict_data` VALUES (4, 1, '显示', '0', 'sys_show_hide', '', 'primary', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '显示菜单'); +INSERT INTO `sys_dict_data` VALUES (5, 2, '隐藏', '1', 'sys_show_hide', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '隐藏菜单'); +INSERT INTO `sys_dict_data` VALUES (6, 1, '正常', '0', 'sys_normal_disable', '', 'primary', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '正常状态'); +INSERT INTO `sys_dict_data` VALUES (7, 2, '停用', '1', 'sys_normal_disable', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '停用状态'); +INSERT INTO `sys_dict_data` VALUES (8, 1, '正常', '0', 'sys_job_status', '', 'primary', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '正常状态'); +INSERT INTO `sys_dict_data` VALUES (9, 2, '暂停', '1', 'sys_job_status', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '停用状态'); +INSERT INTO `sys_dict_data` VALUES (10, 1, '默认', 'DEFAULT', 'sys_job_group', '', '', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '默认分组'); +INSERT INTO `sys_dict_data` VALUES (11, 2, '系统', 'SYSTEM', 'sys_job_group', '', '', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '系统分组'); +INSERT INTO `sys_dict_data` VALUES (12, 1, '是', 'Y', 'sys_yes_no', '', 'primary', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '系统默认是'); +INSERT INTO `sys_dict_data` VALUES (13, 2, '否', 'N', 'sys_yes_no', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '系统默认否'); +INSERT INTO `sys_dict_data` VALUES (14, 1, '通知', '1', 'sys_notice_type', '', 'warning', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '通知'); +INSERT INTO `sys_dict_data` VALUES (15, 2, '公告', '2', 'sys_notice_type', '', 'success', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '公告'); +INSERT INTO `sys_dict_data` VALUES (16, 1, '正常', '0', 'sys_notice_status', '', 'primary', 'Y', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '正常状态'); +INSERT INTO `sys_dict_data` VALUES (17, 2, '关闭', '1', 'sys_notice_status', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '关闭状态'); +INSERT INTO `sys_dict_data` VALUES (18, 1, '新增', '1', 'sys_oper_type', '', 'info', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '新增操作'); +INSERT INTO `sys_dict_data` VALUES (19, 2, '修改', '2', 'sys_oper_type', '', 'info', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '修改操作'); +INSERT INTO `sys_dict_data` VALUES (20, 3, '删除', '3', 'sys_oper_type', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '删除操作'); +INSERT INTO `sys_dict_data` VALUES (21, 4, '授权', '4', 'sys_oper_type', '', 'primary', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '授权操作'); +INSERT INTO `sys_dict_data` VALUES (22, 5, '导出', '5', 'sys_oper_type', '', 'warning', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '导出操作'); +INSERT INTO `sys_dict_data` VALUES (23, 6, '导入', '6', 'sys_oper_type', '', 'warning', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '导入操作'); +INSERT INTO `sys_dict_data` VALUES (24, 7, '强退', '7', 'sys_oper_type', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '强退操作'); +INSERT INTO `sys_dict_data` VALUES (25, 8, '生成代码', '8', 'sys_oper_type', '', 'warning', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '生成操作'); +INSERT INTO `sys_dict_data` VALUES (26, 9, '清空数据', '9', 'sys_oper_type', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '清空操作'); +INSERT INTO `sys_dict_data` VALUES (27, 1, '成功', '0', 'sys_common_status', '', 'primary', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '正常状态'); +INSERT INTO `sys_dict_data` VALUES (28, 2, '失败', '1', 'sys_common_status', '', 'danger', 'N', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '停用状态'); +INSERT INTO `sys_dict_data` VALUES (100, 0, '按键', '1', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:53:34', 'admin', '2021-05-05 15:54:17', '按键操作'); +INSERT INTO `sys_dict_data` VALUES (101, 0, '手机', '2', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:53:50', '', NULL, '手机操作'); +INSERT INTO `sys_dict_data` VALUES (102, 0, '浏览器', '3', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:54:09', '', NULL, '浏览器操作'); +INSERT INTO `sys_dict_data` VALUES (103, 0, '射频遥控', '4', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:54:44', '', NULL, '433M遥控操作'); +INSERT INTO `sys_dict_data` VALUES (104, 0, '雷达', '5', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:55:03', '', NULL, '雷达触发'); +INSERT INTO `sys_dict_data` VALUES (105, 0, '报警', '6', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:55:44', '', NULL, '报警触发'); +INSERT INTO `sys_dict_data` VALUES (106, 0, '定时', '7', 'iot_trigger_source', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:56:03', '', NULL, '定时触发'); +INSERT INTO `sys_dict_data` VALUES (107, 1, '继电器开关', '1', 'rf_function', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:58:36', 'admin', '2021-06-23 22:50:32', '继电器通断'); +INSERT INTO `sys_dict_data` VALUES (108, 2, '七彩灯开关', '2', 'rf_function', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:58:57', 'admin', '2021-06-23 22:50:44', '开关灯'); +INSERT INTO `sys_dict_data` VALUES (109, 3, '雷达开关', '3', 'rf_function', NULL, NULL, 'N', '0', 'admin', '2021-05-05 15:59:34', 'admin', '2021-06-23 22:50:21', '开关雷达'); +INSERT INTO `sys_dict_data` VALUES (110, 4, '报警开关', '4', 'rf_function', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:00:01', 'admin', '2021-06-01 15:44:44', '报警开关'); +INSERT INTO `sys_dict_data` VALUES (111, 5, '智能配网', '5', 'rf_function', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:00:16', 'admin', '2021-06-01 15:44:51', '智能配网'); +INSERT INTO `sys_dict_data` VALUES (112, 0, '固定颜色', '0', 'light_mode', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:07:22', '', NULL, '固定颜色'); +INSERT INTO `sys_dict_data` VALUES (113, 0, '七彩渐变', '1', 'light_mode', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:07:41', '', NULL, '七彩渐变'); +INSERT INTO `sys_dict_data` VALUES (114, 0, '动感模式', '2', 'light_mode', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:08:44', '', NULL, '动感模式'); +INSERT INTO `sys_dict_data` VALUES (115, 0, '单色渐变', '3', 'light_mode', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:09:12', '', NULL, '单色渐变'); +INSERT INTO `sys_dict_data` VALUES (116, 0, '白光', '4', 'light_mode', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:09:46', '', NULL, '白光'); +INSERT INTO `sys_dict_data` VALUES (117, 0, '暖光', '5', 'light_mode', NULL, NULL, 'N', '0', 'admin', '2021-05-05 16:10:07', '', NULL, '暖光'); +INSERT INTO `sys_dict_data` VALUES (118, 0, '无', '0', 'rf_function', NULL, NULL, 'N', '0', 'admin', '2021-06-01 15:43:44', 'admin', '2021-06-01 15:44:21', '不进行任何操作'); + +-- ---------------------------- +-- Table structure for sys_dict_type +-- ---------------------------- +DROP TABLE IF EXISTS `sys_dict_type`; +CREATE TABLE `sys_dict_type` ( + `dict_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '字典主键', + `dict_name` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '字典名称', + `dict_type` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '字典类型', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '状态（0正常 1停用）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`dict_id`) USING BTREE, + UNIQUE INDEX `dict_type`(`dict_type`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 103 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '字典类型表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_dict_type +-- ---------------------------- +INSERT INTO `sys_dict_type` VALUES (1, '用户性别', 'sys_user_sex', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '用户性别列表'); +INSERT INTO `sys_dict_type` VALUES (2, '菜单状态', 'sys_show_hide', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '菜单状态列表'); +INSERT INTO `sys_dict_type` VALUES (3, '系统开关', 'sys_normal_disable', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '系统开关列表'); +INSERT INTO `sys_dict_type` VALUES (4, '任务状态', 'sys_job_status', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '任务状态列表'); +INSERT INTO `sys_dict_type` VALUES (5, '任务分组', 'sys_job_group', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '任务分组列表'); +INSERT INTO `sys_dict_type` VALUES (6, '系统是否', 'sys_yes_no', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '系统是否列表'); +INSERT INTO `sys_dict_type` VALUES (7, '通知类型', 'sys_notice_type', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '通知类型列表'); +INSERT INTO `sys_dict_type` VALUES (8, '通知状态', 'sys_notice_status', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '通知状态列表'); +INSERT INTO `sys_dict_type` VALUES (9, '操作类型', 'sys_oper_type', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '操作类型列表'); +INSERT INTO `sys_dict_type` VALUES (10, '系统状态', 'sys_common_status', '0', 'admin', '2021-05-18 02:23:07', '', NULL, '登录状态列表'); +INSERT INTO `sys_dict_type` VALUES (100, '设备触发源', 'iot_trigger_source', '0', 'admin', '2021-05-05 15:51:26', '', NULL, '设备操作的触发源'); +INSERT INTO `sys_dict_type` VALUES (101, '射频遥控按键功能', 'rf_function', '0', 'admin', '2021-05-05 15:58:05', '', NULL, '射频遥控按键功能列表'); +INSERT INTO `sys_dict_type` VALUES (102, '彩灯模式', 'light_mode', '0', 'admin', '2021-05-05 16:04:53', '', NULL, '彩灯模式，单色、七彩、渐变、动感'); + +-- ---------------------------- +-- Table structure for sys_job +-- ---------------------------- +DROP TABLE IF EXISTS `sys_job`; +CREATE TABLE `sys_job` ( + `job_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '任务ID', + `job_name` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL DEFAULT '' COMMENT '任务名称', + `job_group` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL DEFAULT 'DEFAULT' COMMENT '任务组名', + `invoke_target` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '调用目标字符串', + `cron_expression` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT 'cron执行表达式', + `misfire_policy` varchar(20) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '3' COMMENT '计划执行错误策略（1立即执行 2执行一次 3放弃执行）', + `concurrent` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '1' COMMENT '是否并发执行（0允许 1禁止）', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '状态（0正常 1暂停）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '备注信息', + PRIMARY KEY (`job_id`, `job_name`, `job_group`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 4 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '定时任务调度表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_job +-- ---------------------------- +INSERT INTO `sys_job` VALUES (1, '系统默认（无参）', 'DEFAULT', 'ryTask.ryNoParams', '0/10 * * * * ?', '3', '1', '1', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_job` VALUES (2, '系统默认（有参）', 'DEFAULT', 'ryTask.ryParams(\'ry\')', '0/15 * * * * ?', '3', '1', '1', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_job` VALUES (3, '系统默认（多参）', 'DEFAULT', 'ryTask.ryMultipleParams(\'ry\', true, 2000L, 316.50D, 100)', '0/20 * * * * ?', '3', '1', '1', 'admin', '2021-05-18 02:23:07', '', NULL, ''); + +-- ---------------------------- +-- Table structure for sys_job_log +-- ---------------------------- +DROP TABLE IF EXISTS `sys_job_log`; +CREATE TABLE `sys_job_log` ( + `job_log_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '任务日志ID', + `job_name` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '任务名称', + `job_group` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '任务组名', + `invoke_target` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '调用目标字符串', + `job_message` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '日志信息', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '执行状态（0正常 1失败）', + `exception_info` varchar(2000) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '异常信息', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + PRIMARY KEY (`job_log_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 2 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '定时任务调度日志表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_job_log +-- ---------------------------- +INSERT INTO `sys_job_log` VALUES (1, '系统默认（有参）', 'DEFAULT', 'ryTask.ryParams(\'ry\')', '系统默认（有参） 总共耗时：1毫秒', '0', '', '2021-06-11 09:23:45'); + +-- ---------------------------- +-- Table structure for sys_logininfor +-- ---------------------------- +DROP TABLE IF EXISTS `sys_logininfor`; +CREATE TABLE `sys_logininfor` ( + `info_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '访问ID', + `user_name` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '用户账号', + `ipaddr` varchar(128) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '登录IP地址', + `login_location` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '登录地点', + `browser` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '浏览器类型', + `os` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '操作系统', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '登录状态（0成功 1失败）', + `msg` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '提示消息', + `login_time` datetime(0) NULL DEFAULT NULL COMMENT '访问时间', + PRIMARY KEY (`info_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 435 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '系统访问记录' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_logininfor +-- ---------------------------- +INSERT INTO `sys_logininfor` VALUES (385, 'admin', '172.17.0.1', '内网IP', 'Mobile Safari', 'Android 1.x', '1', '用户不存在/密码错误', '2021-06-30 17:13:17'); +INSERT INTO `sys_logininfor` VALUES (386, 'admin', '172.17.0.1', '内网IP', 'Mobile Safari', 'Android 1.x', '1', '验证码已失效', '2021-06-30 17:13:34'); +INSERT INTO `sys_logininfor` VALUES (387, 'admin', '172.17.0.1', '内网IP', 'Mobile Safari', 'Android 1.x', '0', '登录成功', '2021-06-30 17:14:13'); +INSERT INTO `sys_logininfor` VALUES (388, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '1', '用户不存在/密码错误', '2021-08-26 14:44:02'); +INSERT INTO `sys_logininfor` VALUES (389, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '1', '验证码错误', '2021-08-26 14:44:08'); +INSERT INTO `sys_logininfor` VALUES (390, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-26 14:44:59'); +INSERT INTO `sys_logininfor` VALUES (391, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:35:01'); +INSERT INTO `sys_logininfor` VALUES (392, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:37:13'); +INSERT INTO `sys_logininfor` VALUES (393, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:37:24'); +INSERT INTO `sys_logininfor` VALUES (394, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:37:36'); +INSERT INTO `sys_logininfor` VALUES (395, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:38:40'); +INSERT INTO `sys_logininfor` VALUES (396, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:38:56'); +INSERT INTO `sys_logininfor` VALUES (397, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:39:53'); +INSERT INTO `sys_logininfor` VALUES (398, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:39:56'); +INSERT INTO `sys_logininfor` VALUES (399, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:40:10'); +INSERT INTO `sys_logininfor` VALUES (400, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:40:19'); +INSERT INTO `sys_logininfor` VALUES (401, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:40:49'); +INSERT INTO `sys_logininfor` VALUES (402, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:41:42'); +INSERT INTO `sys_logininfor` VALUES (403, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:42:10'); +INSERT INTO `sys_logininfor` VALUES (404, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:42:26'); +INSERT INTO `sys_logininfor` VALUES (405, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:42:56'); +INSERT INTO `sys_logininfor` VALUES (406, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:43:05'); +INSERT INTO `sys_logininfor` VALUES (407, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:44:38'); +INSERT INTO `sys_logininfor` VALUES (408, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:44:48'); +INSERT INTO `sys_logininfor` VALUES (409, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:45:01'); +INSERT INTO `sys_logininfor` VALUES (410, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:51:20'); +INSERT INTO `sys_logininfor` VALUES (411, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:51:40'); +INSERT INTO `sys_logininfor` VALUES (412, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:51:54'); +INSERT INTO `sys_logininfor` VALUES (413, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:55:17'); +INSERT INTO `sys_logininfor` VALUES (414, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 15:58:28'); +INSERT INTO `sys_logininfor` VALUES (415, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 16:11:13'); +INSERT INTO `sys_logininfor` VALUES (416, 'ozCz80FhaFo6rij0YLwz1aXTzKok', '180.111.206.137', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 16:16:40'); +INSERT INTO `sys_logininfor` VALUES (417, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '1', '用户不存在/密码错误', '2021-08-26 16:23:04'); +INSERT INTO `sys_logininfor` VALUES (418, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '退出成功', '2021-08-26 16:24:11'); +INSERT INTO `sys_logininfor` VALUES (419, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '退出成功', '2021-08-26 16:24:11'); +INSERT INTO `sys_logininfor` VALUES (420, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-26 16:30:13'); +INSERT INTO `sys_logininfor` VALUES (421, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 16:30:59'); +INSERT INTO `sys_logininfor` VALUES (422, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-26 16:54:25'); +INSERT INTO `sys_logininfor` VALUES (423, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 16:56:12'); +INSERT INTO `sys_logininfor` VALUES (424, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-26 16:58:05'); +INSERT INTO `sys_logininfor` VALUES (425, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 16:59:32'); +INSERT INTO `sys_logininfor` VALUES (426, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 16:59:48'); +INSERT INTO `sys_logininfor` VALUES (427, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 17:00:19'); +INSERT INTO `sys_logininfor` VALUES (428, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 17:01:36'); +INSERT INTO `sys_logininfor` VALUES (429, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '222.95.162.245', 'XX XX', 'Mobile Safari', 'iOS 11 (iPhone)', '0', '登录成功', '2021-08-26 17:02:12'); +INSERT INTO `sys_logininfor` VALUES (430, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-26 17:06:05'); +INSERT INTO `sys_logininfor` VALUES (431, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-27 11:53:54'); +INSERT INTO `sys_logininfor` VALUES (432, 'admin', '222.95.162.245', 'XX XX', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-27 11:54:00'); +INSERT INTO `sys_logininfor` VALUES (433, 'admin', '58.212.134.111', 'XX XX', 'Mobile Safari', 'Android 1.x', '0', '登录成功', '2021-08-27 19:20:43'); +INSERT INTO `sys_logininfor` VALUES (434, 'admin', '127.0.0.1', '内网IP', 'Chrome 9', 'Windows 10', '0', '登录成功', '2021-08-28 13:59:02'); + +-- ---------------------------- +-- Table structure for sys_menu +-- ---------------------------- +DROP TABLE IF EXISTS `sys_menu`; +CREATE TABLE `sys_menu` ( + `menu_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '菜单ID', + `menu_name` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '菜单名称', + `parent_id` bigint(0) NULL DEFAULT 0 COMMENT '父菜单ID', + `order_num` int(0) NULL DEFAULT 0 COMMENT '显示顺序', + `path` varchar(200) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '路由地址', + `component` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '组件路径', + `is_frame` int(0) NULL DEFAULT 1 COMMENT '是否为外链（0是 1否）', + `is_cache` int(0) NULL DEFAULT 0 COMMENT '是否缓存（0缓存 1不缓存）', + `menu_type` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '菜单类型（M目录 C菜单 F按钮）', + `visible` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '菜单状态（0显示 1隐藏）', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '菜单状态（0正常 1停用）', + `perms` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '权限标识', + `icon` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '#' COMMENT '菜单图标', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '备注', + PRIMARY KEY (`menu_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 2074 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '菜单权限表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_menu +-- ---------------------------- +INSERT INTO `sys_menu` VALUES (1, '系统管理', 0, 1, 'system', NULL, 1, 0, 'M', '0', '0', '', 'system', 'admin', '2021-05-18 02:23:06', '', NULL, '系统管理目录'); +INSERT INTO `sys_menu` VALUES (2, '系统监控', 0, 2, 'monitor', NULL, 1, 0, 'M', '0', '0', '', 'monitor', 'admin', '2021-05-18 02:23:06', '', NULL, '系统监控目录'); +INSERT INTO `sys_menu` VALUES (3, '系统工具', 0, 3, 'tool', NULL, 1, 0, 'M', '0', '0', '', 'tool', 'admin', '2021-05-18 02:23:06', '', NULL, '系统工具目录'); +INSERT INTO `sys_menu` VALUES (4, '物美官网', 0, 4, 'http://wumei.live', NULL, 0, 0, 'M', '0', '0', '', 'guide', 'admin', '2021-05-18 02:23:06', 'admin', '2021-05-24 14:17:14', '若依官网地址'); +INSERT INTO `sys_menu` VALUES (100, '用户管理', 1, 1, 'user', 'system/user/index', 1, 0, 'C', '0', '0', 'system:user:list', 'user', 'admin', '2021-05-18 02:23:06', '', NULL, '用户管理菜单'); +INSERT INTO `sys_menu` VALUES (101, '角色管理', 1, 2, 'role', 'system/role/index', 1, 0, 'C', '0', '0', 'system:role:list', 'peoples', 'admin', '2021-05-18 02:23:06', '', NULL, '角色管理菜单'); +INSERT INTO `sys_menu` VALUES (102, '菜单管理', 1, 3, 'menu', 'system/menu/index', 1, 0, 'C', '0', '0', 'system:menu:list', 'tree-table', 'admin', '2021-05-18 02:23:06', '', NULL, '菜单管理菜单'); +INSERT INTO `sys_menu` VALUES (103, '部门管理', 1, 4, 'dept', 'system/dept/index', 1, 0, 'C', '0', '0', 'system:dept:list', 'tree', 'admin', '2021-05-18 02:23:06', '', NULL, '部门管理菜单'); +INSERT INTO `sys_menu` VALUES (104, '岗位管理', 1, 5, 'post', 'system/post/index', 1, 0, 'C', '0', '0', 'system:post:list', 'post', 'admin', '2021-05-18 02:23:06', '', NULL, '岗位管理菜单'); +INSERT INTO `sys_menu` VALUES (105, '字典管理', 1, 6, 'dict', 'system/dict/index', 1, 0, 'C', '0', '0', 'system:dict:list', 'dict', 'admin', '2021-05-18 02:23:06', '', NULL, '字典管理菜单'); +INSERT INTO `sys_menu` VALUES (106, '参数设置', 1, 7, 'config', 'system/config/index', 1, 0, 'C', '0', '0', 'system:config:list', 'edit', 'admin', '2021-05-18 02:23:06', '', NULL, '参数设置菜单'); +INSERT INTO `sys_menu` VALUES (107, '通知公告', 1, 8, 'notice', 'system/notice/index', 1, 0, 'C', '0', '0', 'system:notice:list', 'message', 'admin', '2021-05-18 02:23:06', '', NULL, '通知公告菜单'); +INSERT INTO `sys_menu` VALUES (108, '日志管理', 1, 9, 'log', '', 1, 0, 'M', '0', '0', '', 'log', 'admin', '2021-05-18 02:23:06', '', NULL, '日志管理菜单'); +INSERT INTO `sys_menu` VALUES (109, '在线用户', 2, 1, 'online', 'monitor/online/index', 1, 0, 'C', '0', '0', 'monitor:online:list', 'online', 'admin', '2021-05-18 02:23:06', '', NULL, '在线用户菜单'); +INSERT INTO `sys_menu` VALUES (110, '定时任务', 2, 2, 'job', 'monitor/job/index', 1, 0, 'C', '0', '0', 'monitor:job:list', 'job', 'admin', '2021-05-18 02:23:06', '', NULL, '定时任务菜单'); +INSERT INTO `sys_menu` VALUES (111, '数据监控', 2, 3, 'druid', 'monitor/druid/index', 1, 0, 'C', '0', '0', 'monitor:druid:list', 'druid', 'admin', '2021-05-18 02:23:06', '', NULL, '数据监控菜单'); +INSERT INTO `sys_menu` VALUES (112, '服务监控', 2, 4, 'server', 'monitor/server/index', 1, 0, 'C', '0', '0', 'monitor:server:list', 'server', 'admin', '2021-05-18 02:23:06', '', NULL, '服务监控菜单'); +INSERT INTO `sys_menu` VALUES (113, '缓存监控', 2, 5, 'cache', 'monitor/cache/index', 1, 0, 'C', '0', '0', 'monitor:cache:list', 'redis', 'admin', '2021-05-18 02:23:06', '', NULL, '缓存监控菜单'); +INSERT INTO `sys_menu` VALUES (114, '表单构建', 3, 1, 'build', 'tool/build/index', 1, 0, 'C', '0', '0', 'tool:build:list', 'build', 'admin', '2021-05-18 02:23:06', '', NULL, '表单构建菜单'); +INSERT INTO `sys_menu` VALUES (115, '代码生成', 3, 2, 'gen', 'tool/gen/index', 1, 0, 'C', '0', '0', 'tool:gen:list', 'code', 'admin', '2021-05-18 02:23:06', '', NULL, '代码生成菜单'); +INSERT INTO `sys_menu` VALUES (116, '系统接口', 3, 3, 'swagger', 'tool/swagger/index', 1, 0, 'C', '0', '0', 'tool:swagger:list', 'swagger', 'admin', '2021-05-18 02:23:06', '', NULL, '系统接口菜单'); +INSERT INTO `sys_menu` VALUES (500, '操作日志', 108, 1, 'operlog', 'monitor/operlog/index', 1, 0, 'C', '0', '0', 'monitor:operlog:list', 'form', 'admin', '2021-05-18 02:23:06', '', NULL, '操作日志菜单'); +INSERT INTO `sys_menu` VALUES (501, '登录日志', 108, 2, 'logininfor', 'monitor/logininfor/index', 1, 0, 'C', '0', '0', 'monitor:logininfor:list', 'logininfor', 'admin', '2021-05-18 02:23:06', '', NULL, '登录日志菜单'); +INSERT INTO `sys_menu` VALUES (1001, '用户查询', 100, 1, '', '', 1, 0, 'F', '0', '0', 'system:user:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1002, '用户新增', 100, 2, '', '', 1, 0, 'F', '0', '0', 'system:user:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1003, '用户修改', 100, 3, '', '', 1, 0, 'F', '0', '0', 'system:user:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1004, '用户删除', 100, 4, '', '', 1, 0, 'F', '0', '0', 'system:user:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1005, '用户导出', 100, 5, '', '', 1, 0, 'F', '0', '0', 'system:user:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1006, '用户导入', 100, 6, '', '', 1, 0, 'F', '0', '0', 'system:user:import', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1007, '重置密码', 100, 7, '', '', 1, 0, 'F', '0', '0', 'system:user:resetPwd', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1008, '角色查询', 101, 1, '', '', 1, 0, 'F', '0', '0', 'system:role:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1009, '角色新增', 101, 2, '', '', 1, 0, 'F', '0', '0', 'system:role:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1010, '角色修改', 101, 3, '', '', 1, 0, 'F', '0', '0', 'system:role:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1011, '角色删除', 101, 4, '', '', 1, 0, 'F', '0', '0', 'system:role:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1012, '角色导出', 101, 5, '', '', 1, 0, 'F', '0', '0', 'system:role:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1013, '菜单查询', 102, 1, '', '', 1, 0, 'F', '0', '0', 'system:menu:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1014, '菜单新增', 102, 2, '', '', 1, 0, 'F', '0', '0', 'system:menu:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1015, '菜单修改', 102, 3, '', '', 1, 0, 'F', '0', '0', 'system:menu:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1016, '菜单删除', 102, 4, '', '', 1, 0, 'F', '0', '0', 'system:menu:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1017, '部门查询', 103, 1, '', '', 1, 0, 'F', '0', '0', 'system:dept:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1018, '部门新增', 103, 2, '', '', 1, 0, 'F', '0', '0', 'system:dept:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1019, '部门修改', 103, 3, '', '', 1, 0, 'F', '0', '0', 'system:dept:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1020, '部门删除', 103, 4, '', '', 1, 0, 'F', '0', '0', 'system:dept:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1021, '岗位查询', 104, 1, '', '', 1, 0, 'F', '0', '0', 'system:post:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1022, '岗位新增', 104, 2, '', '', 1, 0, 'F', '0', '0', 'system:post:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1023, '岗位修改', 104, 3, '', '', 1, 0, 'F', '0', '0', 'system:post:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1024, '岗位删除', 104, 4, '', '', 1, 0, 'F', '0', '0', 'system:post:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1025, '岗位导出', 104, 5, '', '', 1, 0, 'F', '0', '0', 'system:post:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1026, '字典查询', 105, 1, '#', '', 1, 0, 'F', '0', '0', 'system:dict:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1027, '字典新增', 105, 2, '#', '', 1, 0, 'F', '0', '0', 'system:dict:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1028, '字典修改', 105, 3, '#', '', 1, 0, 'F', '0', '0', 'system:dict:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1029, '字典删除', 105, 4, '#', '', 1, 0, 'F', '0', '0', 'system:dict:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1030, '字典导出', 105, 5, '#', '', 1, 0, 'F', '0', '0', 'system:dict:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1031, '参数查询', 106, 1, '#', '', 1, 0, 'F', '0', '0', 'system:config:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1032, '参数新增', 106, 2, '#', '', 1, 0, 'F', '0', '0', 'system:config:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1033, '参数修改', 106, 3, '#', '', 1, 0, 'F', '0', '0', 'system:config:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1034, '参数删除', 106, 4, '#', '', 1, 0, 'F', '0', '0', 'system:config:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1035, '参数导出', 106, 5, '#', '', 1, 0, 'F', '0', '0', 'system:config:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1036, '公告查询', 107, 1, '#', '', 1, 0, 'F', '0', '0', 'system:notice:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1037, '公告新增', 107, 2, '#', '', 1, 0, 'F', '0', '0', 'system:notice:add', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1038, '公告修改', 107, 3, '#', '', 1, 0, 'F', '0', '0', 'system:notice:edit', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1039, '公告删除', 107, 4, '#', '', 1, 0, 'F', '0', '0', 'system:notice:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1040, '操作查询', 500, 1, '#', '', 1, 0, 'F', '0', '0', 'monitor:operlog:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1041, '操作删除', 500, 2, '#', '', 1, 0, 'F', '0', '0', 'monitor:operlog:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1042, '日志导出', 500, 4, '#', '', 1, 0, 'F', '0', '0', 'monitor:operlog:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1043, '登录查询', 501, 1, '#', '', 1, 0, 'F', '0', '0', 'monitor:logininfor:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1044, '登录删除', 501, 2, '#', '', 1, 0, 'F', '0', '0', 'monitor:logininfor:remove', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1045, '日志导出', 501, 3, '#', '', 1, 0, 'F', '0', '0', 'monitor:logininfor:export', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1046, '在线查询', 109, 1, '#', '', 1, 0, 'F', '0', '0', 'monitor:online:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1047, '批量强退', 109, 2, '#', '', 1, 0, 'F', '0', '0', 'monitor:online:batchLogout', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1048, '单条强退', 109, 3, '#', '', 1, 0, 'F', '0', '0', 'monitor:online:forceLogout', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1049, '任务查询', 110, 1, '#', '', 1, 0, 'F', '0', '0', 'monitor:job:query', '#', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1050, '任务新增', 110, 2, '#', '', 1, 0, 'F', '0', '0', 'monitor:job:add', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1051, '任务修改', 110, 3, '#', '', 1, 0, 'F', '0', '0', 'monitor:job:edit', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1052, '任务删除', 110, 4, '#', '', 1, 0, 'F', '0', '0', 'monitor:job:remove', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1053, '状态修改', 110, 5, '#', '', 1, 0, 'F', '0', '0', 'monitor:job:changeStatus', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1054, '任务导出', 110, 7, '#', '', 1, 0, 'F', '0', '0', 'monitor:job:export', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1055, '生成查询', 115, 1, '#', '', 1, 0, 'F', '0', '0', 'tool:gen:query', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1056, '生成修改', 115, 2, '#', '', 1, 0, 'F', '0', '0', 'tool:gen:edit', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1057, '生成删除', 115, 3, '#', '', 1, 0, 'F', '0', '0', 'tool:gen:remove', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1058, '导入代码', 115, 2, '#', '', 1, 0, 'F', '0', '0', 'tool:gen:import', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1059, '预览代码', 115, 4, '#', '', 1, 0, 'F', '0', '0', 'tool:gen:preview', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (1060, '生成代码', 115, 5, '#', '', 1, 0, 'F', '0', '0', 'tool:gen:code', '#', 'admin', '2021-05-18 02:23:07', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2000, '物联网', 0, 0, 'iot', NULL, 1, 0, 'M', '0', '0', '', 'iot', 'admin', '2021-05-03 17:20:27', 'admin', '2021-05-18 09:32:14', ''); +INSERT INTO `sys_menu` VALUES (2043, '设备分类', 2000, 10, 'category', 'system/category/index', 1, 0, 'C', '0', '0', 'system:category:list', 'category', 'admin', '2021-05-06 15:10:35', 'admin', '2021-05-18 09:32:58', '设备分类菜单'); +INSERT INTO `sys_menu` VALUES (2044, '设备分类查询', 2043, 1, '#', '', 1, 0, 'F', '0', '0', 'system:category:query', '#', 'admin', '2021-05-06 15:10:35', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2045, '设备分类新增', 2043, 2, '#', '', 1, 0, 'F', '0', '0', 'system:category:add', '#', 'admin', '2021-05-06 15:10:35', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2046, '设备分类修改', 2043, 3, '#', '', 1, 0, 'F', '0', '0', 'system:category:edit', '#', 'admin', '2021-05-06 15:10:35', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2047, '设备分类删除', 2043, 4, '#', '', 1, 0, 'F', '0', '0', 'system:category:remove', '#', 'admin', '2021-05-06 15:10:35', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2048, '设备分类导出', 2043, 5, '#', '', 1, 0, 'F', '0', '0', 'system:category:export', '#', 'admin', '2021-05-06 15:10:35', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2049, '设备列表', 2000, 11, 'device', 'system/device/index', 1, 0, 'C', '0', '0', 'system:device:list', 'device', 'admin', '2021-05-06 15:10:50', 'admin', '2021-05-18 09:33:08', '设备菜单'); +INSERT INTO `sys_menu` VALUES (2050, '设备查询', 2049, 1, '#', '', 1, 0, 'F', '0', '0', 'system:device:query', '#', 'admin', '2021-05-06 15:10:50', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2051, '设备新增', 2049, 2, '#', '', 1, 0, 'F', '0', '0', 'system:device:add', '#', 'admin', '2021-05-06 15:10:50', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2052, '设备修改', 2049, 3, '#', '', 1, 0, 'F', '0', '0', 'system:device:edit', '#', 'admin', '2021-05-06 15:10:50', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2053, '设备删除', 2049, 4, '#', '', 1, 0, 'F', '0', '0', 'system:device:remove', '#', 'admin', '2021-05-06 15:10:50', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2054, '设备导出', 2049, 5, '#', '', 1, 0, 'F', '0', '0', 'system:device:export', '#', 'admin', '2021-05-06 15:10:50', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2055, '配置日志', 2000, 13, 'set', 'system/set/index', 1, 0, 'C', '0', '0', 'system:set:list', 'config', 'admin', '2021-05-06 15:11:09', 'admin', '2021-05-26 14:54:24', '设备配置菜单'); +INSERT INTO `sys_menu` VALUES (2056, '设备配置查询', 2055, 1, '#', '', 1, 0, 'F', '0', '0', 'system:set:query', '#', 'admin', '2021-05-06 15:11:09', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2057, '设备配置新增', 2055, 2, '#', '', 1, 0, 'F', '0', '0', 'system:set:add', '#', 'admin', '2021-05-06 15:11:09', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2058, '设备配置修改', 2055, 3, '#', '', 1, 0, 'F', '0', '0', 'system:set:edit', '#', 'admin', '2021-05-06 15:11:09', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2059, '设备配置删除', 2055, 4, '#', '', 1, 0, 'F', '0', '0', 'system:set:remove', '#', 'admin', '2021-05-06 15:11:09', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2060, '设备配置导出', 2055, 5, '#', '', 1, 0, 'F', '0', '0', 'system:set:export', '#', 'admin', '2021-05-06 15:11:09', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2061, '状态日志', 2000, 12, 'status', 'system/status/index', 1, 0, 'C', '0', '0', 'system:status:list', 'status', 'admin', '2021-05-06 15:11:19', 'admin', '2021-05-26 14:54:38', '设备状态菜单'); +INSERT INTO `sys_menu` VALUES (2062, '设备状态查询', 2061, 1, '#', '', 1, 0, 'F', '0', '0', 'system:status:query', '#', 'admin', '2021-05-06 15:11:19', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2063, '设备状态新增', 2061, 2, '#', '', 1, 0, 'F', '0', '0', 'system:status:add', '#', 'admin', '2021-05-06 15:11:19', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2064, '设备状态修改', 2061, 3, '#', '', 1, 0, 'F', '0', '0', 'system:status:edit', '#', 'admin', '2021-05-06 15:11:19', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2065, '设备状态删除', 2061, 4, '#', '', 1, 0, 'F', '0', '0', 'system:status:remove', '#', 'admin', '2021-05-06 15:11:19', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2066, '设备状态导出', 2061, 5, '#', '', 1, 0, 'F', '0', '0', 'system:status:export', '#', 'admin', '2021-05-06 15:11:19', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2067, '设备分组', 2000, 1, 'group', 'system/group/index', 1, 0, 'C', '0', '0', 'system:group:list', 'group', 'admin', '2021-05-18 08:15:31', 'admin', '2021-05-18 09:40:59', '分组菜单'); +INSERT INTO `sys_menu` VALUES (2068, '分组查询', 2067, 1, '#', '', 1, 0, 'F', '0', '0', 'system:group:query', '#', 'admin', '2021-05-18 08:15:31', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2069, '分组新增', 2067, 2, '#', '', 1, 0, 'F', '0', '0', 'system:group:add', '#', 'admin', '2021-05-18 08:15:31', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2070, '分组修改', 2067, 3, '#', '', 1, 0, 'F', '0', '0', 'system:group:edit', '#', 'admin', '2021-05-18 08:15:31', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2071, '分组删除', 2067, 4, '#', '', 1, 0, 'F', '0', '0', 'system:group:remove', '#', 'admin', '2021-05-18 08:15:31', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2072, '分组导出', 2067, 5, '#', '', 1, 0, 'F', '0', '0', 'system:group:export', '#', 'admin', '2021-05-18 08:15:31', '', NULL, ''); +INSERT INTO `sys_menu` VALUES (2073, 'EMQ管理', 2000, 14, 'http://localhost:18083/#/login?redirect=%2F', NULL, 0, 0, 'C', '0', '0', '', 'mqtt', 'admin', '2021-05-26 14:53:48', 'admin', '2021-05-27 16:11:27', ''); + +-- ---------------------------- +-- Table structure for sys_notice +-- ---------------------------- +DROP TABLE IF EXISTS `sys_notice`; +CREATE TABLE `sys_notice` ( + `notice_id` int(0) NOT NULL AUTO_INCREMENT COMMENT '公告ID', + `notice_title` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '公告标题', + `notice_type` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '公告类型（1通知 2公告）', + `notice_content` longblob NULL COMMENT '公告内容', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '公告状态（0正常 1关闭）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`notice_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 4 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '通知公告表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_notice +-- ---------------------------- +INSERT INTO `sys_notice` VALUES (1, '温馨提醒：2018-07-01 若依新版本发布啦', '2', 0xE696B0E78988E69CACE58685E5AEB9, '0', 'admin', '2021-05-18 02:23:07', '', NULL, '管理员'); +INSERT INTO `sys_notice` VALUES (2, '维护通知：2018-07-01 若依系统凌晨维护', '1', 0xE7BBB4E68AA4E58685E5AEB9, '0', 'admin', '2021-05-18 02:23:07', '', NULL, '管理员'); +INSERT INTO `sys_notice` VALUES (3, '111', '2', 0x3C703E3131313131313C2F703E, '0', 'admin', '2021-08-27 19:24:12', '', NULL, NULL); + +-- ---------------------------- +-- Table structure for sys_oper_log +-- ---------------------------- +DROP TABLE IF EXISTS `sys_oper_log`; +CREATE TABLE `sys_oper_log` ( + `oper_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '日志主键', + `title` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '模块标题', + `business_type` int(0) NULL DEFAULT 0 COMMENT '业务类型（0其它 1新增 2修改 3删除）', + `method` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '方法名称', + `request_method` varchar(10) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '请求方式', + `operator_type` int(0) NULL DEFAULT 0 COMMENT '操作类别（0其它 1后台用户 2手机端用户）', + `oper_name` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '操作人员', + `dept_name` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '部门名称', + `oper_url` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '请求URL', + `oper_ip` varchar(128) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '主机地址', + `oper_location` varchar(255) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '操作地点', + `oper_param` varchar(2000) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '请求参数', + `json_result` varchar(2000) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '返回参数', + `status` int(0) NULL DEFAULT 0 COMMENT '操作状态（0正常 1异常）', + `error_msg` varchar(2000) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '错误消息', + `oper_time` datetime(0) NULL DEFAULT NULL COMMENT '操作时间', + PRIMARY KEY (`oper_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 2663 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '操作日志记录' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_oper_log +-- ---------------------------- +INSERT INTO `sys_oper_log` VALUES (1873, '设备状态', 2, 'com.ruoyi.system.controller.IotDeviceStatusController.edit()', 'PUT', 1, 'admin', NULL, '/system/status', '172.17.0.1', '内网IP', '{\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"triggerSource\":1,\"relayStatus\":0,\"updateTime\":1625044821428,\"params\":{}}', '{\"msg\":\"mqtt 发布成功\",\"code\":200}', 0, NULL, '2021-06-30 17:20:21'); +INSERT INTO `sys_oper_log` VALUES (1874, '设备状态', 2, 'com.ruoyi.system.controller.IotDeviceStatusController.edit()', 'PUT', 1, 'admin', NULL, '/system/status', '172.17.0.1', '内网IP', '{\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"triggerSource\":1,\"relayStatus\":1,\"updateTime\":1625044822177,\"params\":{}}', '{\"msg\":\"mqtt 发布成功\",\"code\":200}', 0, NULL, '2021-06-30 17:20:22'); +INSERT INTO `sys_oper_log` VALUES (1875, '设备状态', 2, 'com.ruoyi.system.controller.IotDeviceStatusController.edit()', 'PUT', 1, 'admin', NULL, '/system/status', '172.17.0.1', '内网IP', '{\"lightStatus\":0,\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"triggerSource\":1,\"updateTime\":1625044822998,\"params\":{}}', '{\"msg\":\"mqtt 发布成功\",\"code\":200}', 0, NULL, '2021-06-30 17:20:23'); +INSERT INTO `sys_oper_log` VALUES (1876, '设备状态', 2, 'com.ruoyi.system.controller.IotDeviceStatusController.edit()', 'PUT', 1, 'admin', NULL, '/system/status', '172.17.0.1', '内网IP', '{\"lightStatus\":1,\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"triggerSource\":1,\"updateTime\":1625044823902,\"params\":{}}', '{\"msg\":\"mqtt 发布成功\",\"code\":200}', 0, NULL, '2021-06-30 17:20:23'); +INSERT INTO `sys_oper_log` VALUES (1877, '代码生成', 6, 'com.ruoyi.generator.controller.GenController.importTableSave()', 'POST', 1, 'admin', NULL, '/tool/gen/importTable', '222.95.162.245', 'XX XX', 't_user_account_info,t_user_login_log', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 14:45:29'); +INSERT INTO `sys_oper_log` VALUES (1878, '代码生成', 8, 'com.ruoyi.generator.controller.GenController.batchGenCode()', 'GET', 1, 'admin', NULL, '/tool/gen/batchGenCode', '222.95.162.245', 'XX XX', '{}', 'null', 0, NULL, '2021-08-26 14:45:39'); +INSERT INTO `sys_oper_log` VALUES (1879, '代码生成', 6, 'com.ruoyi.generator.controller.GenController.importTableSave()', 'POST', 1, 'admin', NULL, '/tool/gen/importTable', '222.95.162.245', 'XX XX', 'sys_user', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 17:07:45'); +INSERT INTO `sys_oper_log` VALUES (1880, '角色管理', 1, 'com.ruoyi.web.controller.system.SysRoleController.add()', 'POST', 1, 'admin', NULL, '/system/role', '222.95.162.245', 'XX XX', '{\"flag\":false,\"roleId\":101,\"admin\":false,\"params\":{},\"roleSort\":\"3\",\"deptCheckStrictly\":true,\"createBy\":\"admin\",\"menuCheckStrictly\":true,\"roleKey\":\"mp\",\"roleName\":\"小程序用户\",\"deptIds\":[],\"menuIds\":[2000,2067,2068,2069,2070,2071,2072,2043,2044,2045,2046,2047,2048,2049,2050,2051,2052,2053,2054,2061,2062,2063,2064,2065,2066,2055,2056,2057,2058,2059,2060,2073],\"status\":\"0\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 17:26:52'); +INSERT INTO `sys_oper_log` VALUES (1881, '角色管理', 2, 'com.ruoyi.web.controller.system.SysRoleController.edit()', 'PUT', 1, 'admin', NULL, '/system/role', '222.95.162.245', 'XX XX', '{\"flag\":false,\"roleId\":100,\"admin\":false,\"dataScope\":\"1\",\"delFlag\":\"0\",\"params\":{},\"roleSort\":\"8\",\"deptCheckStrictly\":true,\"createTime\":1622248952000,\"updateBy\":\"admin\",\"menuCheckStrictly\":true,\"roleKey\":\"visitor\",\"roleName\":\"游客角色\",\"menuIds\":[2000,2067,2043,2049,2061,2055,1,100,101,102,103,104,105,106,107,108,500,501,2,109,110,3,115,2068,2044,2050,2062,2056,2073,1001,1008,1013,1017,1021,1026,1031,1036,1040,1043,1046,1049,1055,116,4],\"status\":\"0\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 17:27:06'); +INSERT INTO `sys_oper_log` VALUES (1882, '用户管理', 1, 'com.ruoyi.web.controller.system.SysUserController.add()', 'POST', 1, 'admin', NULL, '/system/user', '222.95.162.245', 'XX XX', '{\"admin\":false,\"password\":\"$2a$10$f.KtWGpaUsdvl2E427/H4OnPi2dYx8HetxnBs1uasSNwCBBUDSwjO\",\"postIds\":[],\"nickName\":\"xxx\",\"params\":{},\"userName\":\"aaa\",\"userId\":101,\"createBy\":\"admin\",\"roleIds\":[101],\"status\":\"0\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 17:28:35'); +INSERT INTO `sys_oper_log` VALUES (1883, '设备状态', 1, 'com.ruoyi.system.controller.IotDeviceStatusController.add()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/status', '180.111.206.137', 'XX XX', '{\"params\":{},\"createTime\":1629974211324}', 'null', 1, '\r\n### Error updating database. Cause: java.sql.SQLException: Field \'device_num\' doesn\'t have a default value\r\n### The error may exist in file [D:\\codes\\IdeaProjects\\wumei-smart-master\\spring-boot\\ruoyi-system\\target\\classes\\mapper\\system\\IotDeviceStatusMapper.xml]\r\n### The error may involve com.ruoyi.system.mapper.IotDeviceStatusMapper.insertIotDeviceStatus-Inline\r\n### The error occurred while setting parameters\r\n### SQL: insert into iot_device_status ( create_time ) values ( ? )\r\n### Cause: java.sql.SQLException: Field \'device_num\' doesn\'t have a default value\n; Field \'device_num\' doesn\'t have a default value; nested exception is java.sql.SQLException: Field \'device_num\' doesn\'t have a default value', '2021-08-26 18:36:50'); +INSERT INTO `sys_oper_log` VALUES (1884, '设备状态', 1, 'com.ruoyi.system.controller.IotDeviceStatusController.add()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/status', '180.111.206.137', 'XX XX', '{\"lightMode\":0,\"isOnline\":1,\"lightStatus\":0,\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"red\":255,\"updateBy\":\"\",\"airHumidity\":0,\"triggerSource\":0,\"lightInterval\":432,\"rssi\":-80,\"green\":254,\"deviceTemperature\":36.52,\"relayStatus\":1,\"fadeTime\":259,\"params\":{},\"createBy\":\"\",\"airTemperature\":0,\"brightness\":100,\"blue\":241,\"createTime\":1629974291015,\"deviceStatusId\":2846}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 18:38:09'); +INSERT INTO `sys_oper_log` VALUES (1885, '设备状态', 1, 'com.ruoyi.system.controller.IotDeviceStatusController.add()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/status', '180.111.206.137', 'XX XX', '{\"lightMode\":0,\"isOnline\":1,\"lightStatus\":1,\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"red\":255,\"updateBy\":\"\",\"airHumidity\":0,\"triggerSource\":0,\"lightInterval\":432,\"rssi\":-80,\"green\":254,\"deviceTemperature\":36.52,\"relayStatus\":1,\"fadeTime\":259,\"params\":{},\"createBy\":\"\",\"airTemperature\":0,\"brightness\":100,\"blue\":241,\"createTime\":1629974292396,\"deviceStatusId\":2847}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 18:38:11'); +INSERT INTO `sys_oper_log` VALUES (1886, '设备状态', 1, 'com.ruoyi.system.controller.IotDeviceStatusController.add()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/status', '180.111.206.137', 'XX XX', '{\"lightMode\":0,\"isOnline\":1,\"lightStatus\":0,\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"red\":255,\"updateBy\":\"\",\"airHumidity\":0,\"triggerSource\":0,\"lightInterval\":432,\"rssi\":-80,\"green\":254,\"deviceTemperature\":36.52,\"relayStatus\":1,\"fadeTime\":259,\"params\":{},\"createBy\":\"\",\"airTemperature\":0,\"brightness\":100,\"blue\":241,\"createTime\":1629974293231,\"deviceStatusId\":2848}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 18:38:12'); +INSERT INTO `sys_oper_log` VALUES (1887, '设备状态', 1, 'com.ruoyi.system.controller.IotDeviceStatusController.add()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/status', '180.111.206.137', 'XX XX', '{\"lightMode\":0,\"isOnline\":1,\"lightStatus\":1,\"deviceId\":1,\"deviceNum\":\"7CDFA1049ADA\",\"red\":255,\"updateBy\":\"\",\"airHumidity\":0,\"triggerSource\":0,\"lightInterval\":432,\"rssi\":-80,\"green\":254,\"deviceTemperature\":36.52,\"relayStatus\":1,\"fadeTime\":259,\"params\":{},\"createBy\":\"\",\"airTemperature\":0,\"brightness\":100,\"blue\":241,\"createTime\":1629974297356,\"deviceStatusId\":2849}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 18:38:16'); +INSERT INTO `sys_oper_log` VALUES (1888, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '222.95.162.245', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADC\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 18:56:26'); +INSERT INTO `sys_oper_log` VALUES (1889, '设备状态', 1, 'com.ruoyi.system.controller.IotDeviceStatusController.add()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/status', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"params\":{},\"createTime\":1629976059277,\"deviceStatusId\":2850}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:07:38'); +INSERT INTO `sys_oper_log` VALUES (1890, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:16:49'); +INSERT INTO `sys_oper_log` VALUES (1891, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:08'); +INSERT INTO `sys_oper_log` VALUES (1892, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:09'); +INSERT INTO `sys_oper_log` VALUES (1893, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:09'); +INSERT INTO `sys_oper_log` VALUES (1894, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:10'); +INSERT INTO `sys_oper_log` VALUES (1895, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:10'); +INSERT INTO `sys_oper_log` VALUES (1896, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:11'); +INSERT INTO `sys_oper_log` VALUES (1897, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:12'); +INSERT INTO `sys_oper_log` VALUES (1898, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:13'); +INSERT INTO `sys_oper_log` VALUES (1899, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:14'); +INSERT INTO `sys_oper_log` VALUES (1900, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:14'); +INSERT INTO `sys_oper_log` VALUES (1901, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:15'); +INSERT INTO `sys_oper_log` VALUES (1902, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:16'); +INSERT INTO `sys_oper_log` VALUES (1903, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:17'); +INSERT INTO `sys_oper_log` VALUES (1904, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:17'); +INSERT INTO `sys_oper_log` VALUES (1905, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:17:18'); +INSERT INTO `sys_oper_log` VALUES (1906, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-26 19:18:38'); +INSERT INTO `sys_oper_log` VALUES (1907, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', 'null', 1, '设备不存在', '2021-08-26 19:25:16'); +INSERT INTO `sys_oper_log` VALUES (1908, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', 'null', 1, '设备不存在', '2021-08-26 19:25:19'); +INSERT INTO `sys_oper_log` VALUES (1909, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', 'null', 1, '设备不存在', '2021-08-27 10:23:46'); +INSERT INTO `sys_oper_log` VALUES (1910, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', 'null', 1, '设备不存在', '2021-08-27 10:23:59'); +INSERT INTO `sys_oper_log` VALUES (1911, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', 'null', 1, '设备不存在', '2021-08-27 10:24:32'); +INSERT INTO `sys_oper_log` VALUES (1912, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', 'null', 1, '设备不存在', '2021-08-27 10:25:53'); +INSERT INTO `sys_oper_log` VALUES (1913, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:30:18'); +INSERT INTO `sys_oper_log` VALUES (1914, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:30:22'); +INSERT INTO `sys_oper_log` VALUES (1915, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:30:23'); +INSERT INTO `sys_oper_log` VALUES (1916, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:30:30'); +INSERT INTO `sys_oper_log` VALUES (1917, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:33:53'); +INSERT INTO `sys_oper_log` VALUES (1918, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:33:56'); +INSERT INTO `sys_oper_log` VALUES (1919, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:33:57'); +INSERT INTO `sys_oper_log` VALUES (1920, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:33:58'); +INSERT INTO `sys_oper_log` VALUES (1921, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:35:34'); +INSERT INTO `sys_oper_log` VALUES (1922, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:35:35'); +INSERT INTO `sys_oper_log` VALUES (1923, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:35:36'); +INSERT INTO `sys_oper_log` VALUES (1924, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:36:33'); +INSERT INTO `sys_oper_log` VALUES (1925, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:36:34'); +INSERT INTO `sys_oper_log` VALUES (1926, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:36:35'); +INSERT INTO `sys_oper_log` VALUES (1927, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:36:35'); +INSERT INTO `sys_oper_log` VALUES (1928, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:36:36'); +INSERT INTO `sys_oper_log` VALUES (1929, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:40:04'); +INSERT INTO `sys_oper_log` VALUES (1930, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:40:06'); +INSERT INTO `sys_oper_log` VALUES (1931, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:40:10'); +INSERT INTO `sys_oper_log` VALUES (1932, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:40:10'); +INSERT INTO `sys_oper_log` VALUES (1933, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:40:21'); +INSERT INTO `sys_oper_log` VALUES (1934, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:40:21'); +INSERT INTO `sys_oper_log` VALUES (1935, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:41:55'); +INSERT INTO `sys_oper_log` VALUES (1936, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:41:55'); +INSERT INTO `sys_oper_log` VALUES (1937, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:41:56'); +INSERT INTO `sys_oper_log` VALUES (1938, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:41:57'); +INSERT INTO `sys_oper_log` VALUES (1939, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:44:07'); +INSERT INTO `sys_oper_log` VALUES (1940, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:44:08'); +INSERT INTO `sys_oper_log` VALUES (1941, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:44:09'); +INSERT INTO `sys_oper_log` VALUES (1942, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 10:44:09'); +INSERT INTO `sys_oper_log` VALUES (1943, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 11:38:52'); +INSERT INTO `sys_oper_log` VALUES (1944, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 11:38:54'); +INSERT INTO `sys_oper_log` VALUES (1945, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 11:53:43'); +INSERT INTO `sys_oper_log` VALUES (1946, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 11:53:44'); +INSERT INTO `sys_oper_log` VALUES (1947, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 11:53:54'); +INSERT INTO `sys_oper_log` VALUES (1948, '代码生成', 6, 'com.ruoyi.generator.controller.GenController.importTableSave()', 'POST', 1, 'admin', NULL, '/tool/gen/importTable', '222.95.162.245', 'XX XX', 'iot_device_user_relation', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 11:55:06'); +INSERT INTO `sys_oper_log` VALUES (1949, '代码生成', 8, 'com.ruoyi.generator.controller.GenController.batchGenCode()', 'GET', 1, 'admin', NULL, '/tool/gen/batchGenCode', '222.95.162.245', 'XX XX', '{}', 'null', 0, NULL, '2021-08-27 11:55:34'); +INSERT INTO `sys_oper_log` VALUES (1950, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceName\":\"设备名称\",\"deviceNum\":\"7CDFA1049ADC\",\"categoryId\":1}', 'null', 1, '', '2021-08-27 13:36:40'); +INSERT INTO `sys_oper_log` VALUES (1951, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceName\":\"设备名称\",\"deviceNum\":\"7CDFA1049ADC\",\"categoryId\":1}', '{\"msg\":\"操作失败\",\"code\":500}', 0, NULL, '2021-08-27 13:40:21'); +INSERT INTO `sys_oper_log` VALUES (1952, '代码生成', 8, 'com.ruoyi.generator.controller.GenController.batchGenCode()', 'GET', 1, 'admin', NULL, '/tool/gen/batchGenCode', '222.95.162.245', 'XX XX', '{}', 'null', 0, NULL, '2021-08-27 13:44:37'); +INSERT INTO `sys_oper_log` VALUES (1953, '代码生成', 3, 'com.ruoyi.generator.controller.GenController.remove()', 'DELETE', 1, 'admin', NULL, '/tool/gen/13', '222.95.162.245', 'XX XX', '{tableIds=13}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 13:45:30'); +INSERT INTO `sys_oper_log` VALUES (1954, '代码生成', 6, 'com.ruoyi.generator.controller.GenController.importTableSave()', 'POST', 1, 'admin', NULL, '/tool/gen/importTable', '222.95.162.245', 'XX XX', 'iot_device', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 13:45:40'); +INSERT INTO `sys_oper_log` VALUES (1955, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceName\":\"设备名称\",\"deviceNum\":\"7CDFA1049ADC\",\"categoryId\":1}', 'null', 1, 'Invalid bound statement (not found): com.ruoyi.system.mapper.IotDeviceMapper.selectIotDeviceByNum', '2021-08-27 13:47:50'); +INSERT INTO `sys_oper_log` VALUES (1956, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceName\":\"设备名称\",\"deviceNum\":\"7CDFA1049ADC\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 13:50:33'); +INSERT INTO `sys_oper_log` VALUES (1957, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceName\":\"设备名称\",\"deviceNum\":\"7CDFA1049ADC\",\"categoryId\":1}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 13:50:43'); +INSERT INTO `sys_oper_log` VALUES (1958, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"我的灯。\",\"params\":{},\"deviceName\":\"灯灯灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 14:05:05'); +INSERT INTO `sys_oper_log` VALUES (1959, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"我的灯。\",\"params\":{},\"deviceName\":\"灯灯灯\",\"deviceNum\":\"7CDFA1049AD2\",\"categoryId\":2}', 'null', 1, '设备【7CDFA1049AD2】不存在', '2021-08-27 14:07:01'); +INSERT INTO `sys_oper_log` VALUES (1960, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"qg34tq\",\"params\":{},\"deviceName\":\"eq3g3\",\"deviceNum\":\"2133r4r\",\"categoryId\":1}', 'null', 1, '设备【2133r4r】不存在', '2021-08-27 14:11:13'); +INSERT INTO `sys_oper_log` VALUES (1961, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"stu6ru\",\"params\":{},\"deviceName\":\"rtjsht\",\"deviceNum\":\"strjtj\",\"categoryId\":1}', 'null', 1, '设备【strjtj】不存在', '2021-08-27 14:14:40'); +INSERT INTO `sys_oper_log` VALUES (1962, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"stu6ru\",\"params\":{},\"deviceName\":\"rtjsht\",\"deviceNum\":\"strjtj\",\"categoryId\":1}', 'null', 1, '设备【strjtj】不存在', '2021-08-27 14:14:43'); +INSERT INTO `sys_oper_log` VALUES (1963, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"我的灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 14:27:15'); +INSERT INTO `sys_oper_log` VALUES (1964, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:26'); +INSERT INTO `sys_oper_log` VALUES (1965, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:49'); +INSERT INTO `sys_oper_log` VALUES (1966, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:50'); +INSERT INTO `sys_oper_log` VALUES (1967, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:51'); +INSERT INTO `sys_oper_log` VALUES (1968, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:52'); +INSERT INTO `sys_oper_log` VALUES (1969, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:53'); +INSERT INTO `sys_oper_log` VALUES (1970, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 14:31:54'); +INSERT INTO `sys_oper_log` VALUES (1971, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:42'); +INSERT INTO `sys_oper_log` VALUES (1972, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:43'); +INSERT INTO `sys_oper_log` VALUES (1973, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:44'); +INSERT INTO `sys_oper_log` VALUES (1974, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:47'); +INSERT INTO `sys_oper_log` VALUES (1975, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:48'); +INSERT INTO `sys_oper_log` VALUES (1976, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:48'); +INSERT INTO `sys_oper_log` VALUES (1977, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:49'); +INSERT INTO `sys_oper_log` VALUES (1978, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:50'); +INSERT INTO `sys_oper_log` VALUES (1979, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:50'); +INSERT INTO `sys_oper_log` VALUES (1980, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:51'); +INSERT INTO `sys_oper_log` VALUES (1981, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:52'); +INSERT INTO `sys_oper_log` VALUES (1982, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:52'); +INSERT INTO `sys_oper_log` VALUES (1983, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:54'); +INSERT INTO `sys_oper_log` VALUES (1984, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:55'); +INSERT INTO `sys_oper_log` VALUES (1985, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:32:55'); +INSERT INTO `sys_oper_log` VALUES (1986, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"\",\"params\":{},\"deviceName\":\"srts\",\"deviceNum\":\"sh\",\"categoryId\":1}', 'null', 1, '设备【sh】不存在', '2021-08-27 14:34:31'); +INSERT INTO `sys_oper_log` VALUES (1987, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"\",\"params\":{},\"deviceName\":\"srts\",\"deviceNum\":\"sh\",\"categoryId\":1}', 'null', 1, '设备【sh】不存在', '2021-08-27 14:34:32'); +INSERT INTO `sys_oper_log` VALUES (1988, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"\",\"params\":{},\"deviceName\":\"trwhb4n\",\"deviceNum\":\"wt\",\"categoryId\":1}', 'null', 1, '设备【wt】不存在', '2021-08-27 14:34:59'); +INSERT INTO `sys_oper_log` VALUES (1989, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:22'); +INSERT INTO `sys_oper_log` VALUES (1990, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:23'); +INSERT INTO `sys_oper_log` VALUES (1991, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:23'); +INSERT INTO `sys_oper_log` VALUES (1992, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:24'); +INSERT INTO `sys_oper_log` VALUES (1993, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:24'); +INSERT INTO `sys_oper_log` VALUES (1994, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:25'); +INSERT INTO `sys_oper_log` VALUES (1995, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:25'); +INSERT INTO `sys_oper_log` VALUES (1996, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:25'); +INSERT INTO `sys_oper_log` VALUES (1997, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:25'); +INSERT INTO `sys_oper_log` VALUES (1998, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:26'); +INSERT INTO `sys_oper_log` VALUES (1999, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:26'); +INSERT INTO `sys_oper_log` VALUES (2000, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:26'); +INSERT INTO `sys_oper_log` VALUES (2001, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:26'); +INSERT INTO `sys_oper_log` VALUES (2002, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:26'); +INSERT INTO `sys_oper_log` VALUES (2003, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:27'); +INSERT INTO `sys_oper_log` VALUES (2004, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁\",\"params\":{},\"deviceName\":\"灯神\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-27 14:35:27'); +INSERT INTO `sys_oper_log` VALUES (2005, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁灯灯灯灯灯。\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 15:00:17'); +INSERT INTO `sys_oper_log` VALUES (2006, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:05:11'); +INSERT INTO `sys_oper_log` VALUES (2007, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:06:01'); +INSERT INTO `sys_oper_log` VALUES (2008, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:06:11'); +INSERT INTO `sys_oper_log` VALUES (2009, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:06:20'); +INSERT INTO `sys_oper_log` VALUES (2010, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:07:41'); +INSERT INTO `sys_oper_log` VALUES (2011, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:09:18'); +INSERT INTO `sys_oper_log` VALUES (2012, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:09:28'); +INSERT INTO `sys_oper_log` VALUES (2013, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 15:17:38'); +INSERT INTO `sys_oper_log` VALUES (2014, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 15:17:41'); +INSERT INTO `sys_oper_log` VALUES (2015, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 15:18:35'); +INSERT INTO `sys_oper_log` VALUES (2016, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":1,\"deviceName\":\"设备名称\"}', '{\"msg\":\"操作失败\",\"code\":500}', 0, NULL, '2021-08-27 15:44:27'); +INSERT INTO `sys_oper_log` VALUES (2017, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":1,\"deviceName\":\"设备名称\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 15:45:52'); +INSERT INTO `sys_oper_log` VALUES (2018, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":51,\"deviceName\":\"设备名称\"}', 'null', 1, '设备不存在', '2021-08-27 15:46:30'); +INSERT INTO `sys_oper_log` VALUES (2019, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":5,\"deviceName\":\"设备名称\"}', 'null', 1, '设备不存在', '2021-08-27 15:46:53'); +INSERT INTO `sys_oper_log` VALUES (2020, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":5,\"deviceName\":\"设备名称\"}', 'null', 1, '设备不存在', '2021-08-27 15:46:59'); +INSERT INTO `sys_oper_log` VALUES (2021, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":7,\"deviceName\":\"设备名称\"}', 'null', 1, '设备不存在', '2021-08-27 15:47:18'); +INSERT INTO `sys_oper_log` VALUES (2022, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":7,\"deviceName\":\"设备名称\"}', 'null', 1, '设备不存在', '2021-08-27 15:47:46'); +INSERT INTO `sys_oper_log` VALUES (2023, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":1,\"deviceName\":\"设备名称\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 15:48:03'); +INSERT INTO `sys_oper_log` VALUES (2024, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":1,\"deviceName\":\"设备名称\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":0}', 0, NULL, '2021-08-27 15:49:24'); +INSERT INTO `sys_oper_log` VALUES (2025, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark\",\"params\":{},\"deviceId\":1,\"deviceName\":\"设备名称\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 15:51:57'); +INSERT INTO `sys_oper_log` VALUES (2026, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '222.95.162.245', 'XX XX', '{\"remark\":\"remark2\",\"params\":{},\"deviceId\":1,\"deviceName\":\"设备名称\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 15:52:38'); +INSERT INTO `sys_oper_log` VALUES (2027, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:39'); +INSERT INTO `sys_oper_log` VALUES (2028, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:40'); +INSERT INTO `sys_oper_log` VALUES (2029, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:42'); +INSERT INTO `sys_oper_log` VALUES (2030, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:42'); +INSERT INTO `sys_oper_log` VALUES (2031, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:43'); +INSERT INTO `sys_oper_log` VALUES (2032, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:43'); +INSERT INTO `sys_oper_log` VALUES (2033, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:44'); +INSERT INTO `sys_oper_log` VALUES (2034, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:45'); +INSERT INTO `sys_oper_log` VALUES (2035, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:45'); +INSERT INTO `sys_oper_log` VALUES (2036, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:45'); +INSERT INTO `sys_oper_log` VALUES (2037, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:45'); +INSERT INTO `sys_oper_log` VALUES (2038, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:45'); +INSERT INTO `sys_oper_log` VALUES (2039, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:46'); +INSERT INTO `sys_oper_log` VALUES (2040, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:46'); +INSERT INTO `sys_oper_log` VALUES (2041, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:46'); +INSERT INTO `sys_oper_log` VALUES (2042, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:47'); +INSERT INTO `sys_oper_log` VALUES (2043, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:47'); +INSERT INTO `sys_oper_log` VALUES (2044, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:47'); +INSERT INTO `sys_oper_log` VALUES (2045, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:47'); +INSERT INTO `sys_oper_log` VALUES (2046, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:48'); +INSERT INTO `sys_oper_log` VALUES (2047, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:48'); +INSERT INTO `sys_oper_log` VALUES (2048, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:48'); +INSERT INTO `sys_oper_log` VALUES (2049, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:49'); +INSERT INTO `sys_oper_log` VALUES (2050, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:49'); +INSERT INTO `sys_oper_log` VALUES (2051, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:51'); +INSERT INTO `sys_oper_log` VALUES (2052, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:52'); +INSERT INTO `sys_oper_log` VALUES (2053, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:52'); +INSERT INTO `sys_oper_log` VALUES (2054, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:52'); +INSERT INTO `sys_oper_log` VALUES (2055, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:52'); +INSERT INTO `sys_oper_log` VALUES (2056, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:53'); +INSERT INTO `sys_oper_log` VALUES (2057, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:54'); +INSERT INTO `sys_oper_log` VALUES (2058, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:55'); +INSERT INTO `sys_oper_log` VALUES (2059, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:56'); +INSERT INTO `sys_oper_log` VALUES (2060, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:57'); +INSERT INTO `sys_oper_log` VALUES (2061, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:57'); +INSERT INTO `sys_oper_log` VALUES (2062, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:57'); +INSERT INTO `sys_oper_log` VALUES (2063, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:58'); +INSERT INTO `sys_oper_log` VALUES (2064, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:58'); +INSERT INTO `sys_oper_log` VALUES (2065, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:58'); +INSERT INTO `sys_oper_log` VALUES (2066, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:58'); +INSERT INTO `sys_oper_log` VALUES (2067, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:59'); +INSERT INTO `sys_oper_log` VALUES (2068, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:59'); +INSERT INTO `sys_oper_log` VALUES (2069, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:59'); +INSERT INTO `sys_oper_log` VALUES (2070, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:55:59'); +INSERT INTO `sys_oper_log` VALUES (2071, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:00'); +INSERT INTO `sys_oper_log` VALUES (2072, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:00'); +INSERT INTO `sys_oper_log` VALUES (2073, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:00'); +INSERT INTO `sys_oper_log` VALUES (2074, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:00'); +INSERT INTO `sys_oper_log` VALUES (2075, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:01'); +INSERT INTO `sys_oper_log` VALUES (2076, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:01'); +INSERT INTO `sys_oper_log` VALUES (2077, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:01'); +INSERT INTO `sys_oper_log` VALUES (2078, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:01'); +INSERT INTO `sys_oper_log` VALUES (2079, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:01'); +INSERT INTO `sys_oper_log` VALUES (2080, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:02'); +INSERT INTO `sys_oper_log` VALUES (2081, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:02'); +INSERT INTO `sys_oper_log` VALUES (2082, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:02'); +INSERT INTO `sys_oper_log` VALUES (2083, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:02'); +INSERT INTO `sys_oper_log` VALUES (2084, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:03'); +INSERT INTO `sys_oper_log` VALUES (2085, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:04'); +INSERT INTO `sys_oper_log` VALUES (2086, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:04'); +INSERT INTO `sys_oper_log` VALUES (2087, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:04'); +INSERT INTO `sys_oper_log` VALUES (2088, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:04'); +INSERT INTO `sys_oper_log` VALUES (2089, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:04'); +INSERT INTO `sys_oper_log` VALUES (2090, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:05'); +INSERT INTO `sys_oper_log` VALUES (2091, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 15:56:05'); +INSERT INTO `sys_oper_log` VALUES (2092, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:07:26'); +INSERT INTO `sys_oper_log` VALUES (2093, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:08:03'); +INSERT INTO `sys_oper_log` VALUES (2094, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:11:32'); +INSERT INTO `sys_oper_log` VALUES (2095, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1234,\"deviceName\":\"阿拉丁神灯\"}', 'null', 1, '设备不存在', '2021-08-27 16:12:50'); +INSERT INTO `sys_oper_log` VALUES (2096, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1234,\"deviceName\":\"阿拉丁神灯\"}', 'null', 1, '设备不存在', '2021-08-27 16:12:54'); +INSERT INTO `sys_oper_log` VALUES (2097, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:13:42'); +INSERT INTO `sys_oper_log` VALUES (2098, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:14:01'); +INSERT INTO `sys_oper_log` VALUES (2099, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:14:13'); +INSERT INTO `sys_oper_log` VALUES (2100, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:14:14'); +INSERT INTO `sys_oper_log` VALUES (2101, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":12133,\"deviceName\":\"阿拉丁神灯\"}', 'null', 1, '设备不存在', '2021-08-27 16:16:03'); +INSERT INTO `sys_oper_log` VALUES (2102, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":12133,\"deviceName\":\"阿拉丁神灯\"}', 'null', 1, '设备不存在', '2021-08-27 16:16:06'); +INSERT INTO `sys_oper_log` VALUES (2103, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":12133,\"deviceName\":\"阿拉丁神灯\"}', 'null', 1, '设备不存在', '2021-08-27 16:16:15'); +INSERT INTO `sys_oper_log` VALUES (2104, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":12133,\"deviceName\":\"阿拉丁神灯\"}', 'null', 1, '设备不存在', '2021-08-27 16:16:18'); +INSERT INTO `sys_oper_log` VALUES (2105, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceId\":1,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:18:05'); +INSERT INTO `sys_oper_log` VALUES (2106, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:22:53'); +INSERT INTO `sys_oper_log` VALUES (2107, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:23:24'); +INSERT INTO `sys_oper_log` VALUES (2108, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:23:41'); +INSERT INTO `sys_oper_log` VALUES (2109, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:23:43'); +INSERT INTO `sys_oper_log` VALUES (2110, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:26:33'); +INSERT INTO `sys_oper_log` VALUES (2111, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:27:37'); +INSERT INTO `sys_oper_log` VALUES (2112, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:27:54'); +INSERT INTO `sys_oper_log` VALUES (2113, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:28:12'); +INSERT INTO `sys_oper_log` VALUES (2114, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:30:10'); +INSERT INTO `sys_oper_log` VALUES (2115, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:30:32'); +INSERT INTO `sys_oper_log` VALUES (2116, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:30:35'); +INSERT INTO `sys_oper_log` VALUES (2117, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:34:21'); +INSERT INTO `sys_oper_log` VALUES (2118, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:35:01'); +INSERT INTO `sys_oper_log` VALUES (2119, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:39:15'); +INSERT INTO `sys_oper_log` VALUES (2120, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:40:56'); +INSERT INTO `sys_oper_log` VALUES (2121, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:42:53'); +INSERT INTO `sys_oper_log` VALUES (2122, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:45:04'); +INSERT INTO `sys_oper_log` VALUES (2123, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:45:18'); +INSERT INTO `sys_oper_log` VALUES (2124, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:45:29'); +INSERT INTO `sys_oper_log` VALUES (2125, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:46:52'); +INSERT INTO `sys_oper_log` VALUES (2126, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:47:39'); +INSERT INTO `sys_oper_log` VALUES (2127, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:55:23'); +INSERT INTO `sys_oper_log` VALUES (2128, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:55:41'); +INSERT INTO `sys_oper_log` VALUES (2129, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:55:50'); +INSERT INTO `sys_oper_log` VALUES (2130, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:55:50'); +INSERT INTO `sys_oper_log` VALUES (2131, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:56:08'); +INSERT INTO `sys_oper_log` VALUES (2132, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:56:11'); +INSERT INTO `sys_oper_log` VALUES (2133, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:56:21'); +INSERT INTO `sys_oper_log` VALUES (2134, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:23'); +INSERT INTO `sys_oper_log` VALUES (2135, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:24'); +INSERT INTO `sys_oper_log` VALUES (2136, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:25'); +INSERT INTO `sys_oper_log` VALUES (2137, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:25'); +INSERT INTO `sys_oper_log` VALUES (2138, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:27'); +INSERT INTO `sys_oper_log` VALUES (2139, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:28'); +INSERT INTO `sys_oper_log` VALUES (2140, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:28'); +INSERT INTO `sys_oper_log` VALUES (2141, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:29'); +INSERT INTO `sys_oper_log` VALUES (2142, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:29'); +INSERT INTO `sys_oper_log` VALUES (2143, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:56:30'); +INSERT INTO `sys_oper_log` VALUES (2144, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:56:55'); +INSERT INTO `sys_oper_log` VALUES (2145, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:57:00'); +INSERT INTO `sys_oper_log` VALUES (2146, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:57:15'); +INSERT INTO `sys_oper_log` VALUES (2147, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '49.93.129.115', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 16:57:19'); +INSERT INTO `sys_oper_log` VALUES (2148, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:57:22'); +INSERT INTO `sys_oper_log` VALUES (2149, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:57:23'); +INSERT INTO `sys_oper_log` VALUES (2150, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:57:23'); +INSERT INTO `sys_oper_log` VALUES (2151, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:57:24'); +INSERT INTO `sys_oper_log` VALUES (2152, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/updateDeviceInfo', '49.93.129.115', 'XX XX', '{\"remark\":\"12\",\"params\":{},\"deviceId\":1,\"deviceName\":\"remark\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 16:59:38'); +INSERT INTO `sys_oper_log` VALUES (2153, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:59:45'); +INSERT INTO `sys_oper_log` VALUES (2154, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '49.93.129.115', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 16:59:46'); +INSERT INTO `sys_oper_log` VALUES (2155, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"122345678\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"7CDFA1049ADA\",\"categoryId\":2}', 'null', 1, '该设备已被绑定！', '2021-08-27 17:00:56'); +INSERT INTO `sys_oper_log` VALUES (2156, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"cmd\":\"off\"}', 'null', 1, '设备编号不能为空', '2021-08-27 17:27:02'); +INSERT INTO `sys_oper_log` VALUES (2157, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"cmd\":\"off\"}', 'null', 1, '设备编号不能为空', '2021-08-27 17:27:54'); +INSERT INTO `sys_oper_log` VALUES (2158, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"cmd\":\"off\"}', 'null', 1, '设备编号不能为空', '2021-08-27 17:27:56'); +INSERT INTO `sys_oper_log` VALUES (2159, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"cmd\":\"off\"}', 'null', 1, '设备编号不能为空', '2021-08-27 17:27:57'); +INSERT INTO `sys_oper_log` VALUES (2160, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"cmd\":\"off\"}', 'null', 1, '设备编号不能为空', '2021-08-27 17:27:57'); +INSERT INTO `sys_oper_log` VALUES (2161, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"cmd\":\"off\"}', 'null', 1, '设备编号不能为空', '2021-08-27 17:28:00'); +INSERT INTO `sys_oper_log` VALUES (2162, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceNum()', 'GET', 1, 'A1BB9722086A', NULL, '/system/device/getDeviceInfoByDeviceNum', '222.95.162.245', 'XX XX', '{}', 'null', 1, 'nested exception is org.apache.ibatis.type.TypeException: Could not set parameters for mapping: ParameterMapping{property=\'userId\', mode=IN, javaType=class java.lang.String, jdbcType=null, numericScale=null, resultMapId=\'null\', jdbcTypeName=\'null\', expression=\'null\'}. Cause: org.apache.ibatis.type.TypeException: Error setting non null for parameter #1 with JdbcType null . Try setting a different JdbcType for this parameter or a different configuration property. Cause: java.lang.ClassCastException: java.lang.Long cannot be cast to java.lang.String', '2021-08-27 17:58:25'); +INSERT INTO `sys_oper_log` VALUES (2163, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceNum()', 'GET', 1, 'A1BB9722086A', NULL, '/system/device/getDeviceInfoByDeviceNum', '222.95.162.245', 'XX XX', '{}', 'null', 1, 'nested exception is org.apache.ibatis.type.TypeException: Could not set parameters for mapping: ParameterMapping{property=\'userId\', mode=IN, javaType=class java.lang.String, jdbcType=null, numericScale=null, resultMapId=\'null\', jdbcTypeName=\'null\', expression=\'null\'}. Cause: org.apache.ibatis.type.TypeException: Error setting non null for parameter #1 with JdbcType null . Try setting a different JdbcType for this parameter or a different configuration property. Cause: java.lang.ClassCastException: java.lang.Long cannot be cast to java.lang.String', '2021-08-27 17:59:54'); +INSERT INTO `sys_oper_log` VALUES (2164, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceNum()', 'GET', 1, 'A1BB9722086A', NULL, '/system/device/getDeviceInfoByDeviceNum', '222.95.162.245', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"12\",\"isOnline\":true,\"deviceName\":\"remark\",\"deviceId\":1}}', 0, NULL, '2021-08-27 18:01:18'); +INSERT INTO `sys_oper_log` VALUES (2165, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.unBindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/unBindDevice', '222.95.162.245', 'XX XX', '{\"params\":{},\"deviceId\":1}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 18:02:38'); +INSERT INTO `sys_oper_log` VALUES (2166, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"122345678\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1}}', 0, NULL, '2021-08-27 18:15:10'); +INSERT INTO `sys_oper_log` VALUES (2167, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"122345678\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1}}', 0, NULL, '2021-08-27 18:16:30'); +INSERT INTO `sys_oper_log` VALUES (2168, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"category_name\":\"智能灯\",\"remark\":\"122345678\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1}}', 0, NULL, '2021-08-27 18:22:10'); +INSERT INTO `sys_oper_log` VALUES (2169, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"122345678\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1,\"categoryName\":\"智能灯\",\"categoryId\":2}}', 0, NULL, '2021-08-27 18:25:00'); +INSERT INTO `sys_oper_log` VALUES (2170, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"122345678\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1,\"categoryName\":\"智能灯\",\"categoryId\":2}}', 0, NULL, '2021-08-27 18:26:08'); +INSERT INTO `sys_oper_log` VALUES (2171, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceNum()', 'GET', 1, 'A1BB9722086A', NULL, '/system/device/getDeviceInfoByDeviceNum', '222.95.162.245', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"isOnline\":true,\"lightStatus\":true,\"deviceId\":1,\"categoryName\":\"智能灯\",\"categoryId\":2}}', 0, NULL, '2021-08-27 18:27:17'); +INSERT INTO `sys_oper_log` VALUES (2172, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"122345678\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1,\"categoryName\":\"智能灯\",\"categoryId\":2}}', 0, NULL, '2021-08-27 18:27:36'); +INSERT INTO `sys_oper_log` VALUES (2173, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"7CDFA1049ADA\",\"remark\":\"122345678\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":1,\"categoryName\":\"智能灯\",\"categoryId\":2}}', 0, NULL, '2021-08-27 18:28:40'); +INSERT INTO `sys_oper_log` VALUES (2174, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 18:28:42'); +INSERT INTO `sys_oper_log` VALUES (2175, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 18:28:43'); +INSERT INTO `sys_oper_log` VALUES (2176, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 18:28:44'); +INSERT INTO `sys_oper_log` VALUES (2177, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"7CDFA1049ADA\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 18:28:44'); +INSERT INTO `sys_oper_log` VALUES (2178, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.unBindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/unBindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceId\":1}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-27 18:28:51'); +INSERT INTO `sys_oper_log` VALUES (2179, '通知公告', 1, 'com.ruoyi.web.controller.system.SysNoticeController.add()', 'POST', 1, 'admin', NULL, '/system/notice', '222.95.162.245', 'XX XX', '{\"noticeContent\":\"

111111

\",\"createBy\":\"admin\",\"noticeType\":\"2\",\"params\":{},\"noticeTitle\":\"111\",\"status\":\"0\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-27 19:24:12'); +INSERT INTO `sys_oper_log` VALUES (2180, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/bindDevice', '58.212.134.111', 'XX XX', '{\"remark\":\"\",\"params\":{},\"deviceName\":\"wxy测试开关\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-28 13:35:23'); +INSERT INTO `sys_oper_log` VALUES (2181, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:39:38'); +INSERT INTO `sys_oper_log` VALUES (2182, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:39:40'); +INSERT INTO `sys_oper_log` VALUES (2183, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:39:50'); +INSERT INTO `sys_oper_log` VALUES (2184, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:39:51'); +INSERT INTO `sys_oper_log` VALUES (2185, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:39:57'); +INSERT INTO `sys_oper_log` VALUES (2186, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:39:58'); +INSERT INTO `sys_oper_log` VALUES (2187, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:40:00'); +INSERT INTO `sys_oper_log` VALUES (2188, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:40:01'); +INSERT INTO `sys_oper_log` VALUES (2189, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:40:01'); +INSERT INTO `sys_oper_log` VALUES (2190, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:40:02'); +INSERT INTO `sys_oper_log` VALUES (2191, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:43:55'); +INSERT INTO `sys_oper_log` VALUES (2192, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:43:56'); +INSERT INTO `sys_oper_log` VALUES (2193, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:44:03'); +INSERT INTO `sys_oper_log` VALUES (2194, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:44:03'); +INSERT INTO `sys_oper_log` VALUES (2195, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:48:43'); +INSERT INTO `sys_oper_log` VALUES (2196, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:50:44'); +INSERT INTO `sys_oper_log` VALUES (2197, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:50:56'); +INSERT INTO `sys_oper_log` VALUES (2198, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:51:02'); +INSERT INTO `sys_oper_log` VALUES (2199, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'A1BB9722086A', NULL, '/system/device/control', '58.212.134.111', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-28 13:51:11'); +INSERT INTO `sys_oper_log` VALUES (2200, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"阿拉丁等等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-30 10:17:55'); +INSERT INTO `sys_oper_log` VALUES (2201, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:18:41'); +INSERT INTO `sys_oper_log` VALUES (2202, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:18:47'); +INSERT INTO `sys_oper_log` VALUES (2203, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:18:54'); +INSERT INTO `sys_oper_log` VALUES (2204, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:19:08'); +INSERT INTO `sys_oper_log` VALUES (2205, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:19:12'); +INSERT INTO `sys_oper_log` VALUES (2206, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:19:35'); +INSERT INTO `sys_oper_log` VALUES (2207, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:19:37'); +INSERT INTO `sys_oper_log` VALUES (2208, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:20:09'); +INSERT INTO `sys_oper_log` VALUES (2209, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:24:30'); +INSERT INTO `sys_oper_log` VALUES (2210, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:25:17'); +INSERT INTO `sys_oper_log` VALUES (2211, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:25:19'); +INSERT INTO `sys_oper_log` VALUES (2212, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:25:23'); +INSERT INTO `sys_oper_log` VALUES (2213, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:25:27'); +INSERT INTO `sys_oper_log` VALUES (2214, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:25:36'); +INSERT INTO `sys_oper_log` VALUES (2215, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:26:00'); +INSERT INTO `sys_oper_log` VALUES (2216, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:26:18'); +INSERT INTO `sys_oper_log` VALUES (2217, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:26:20'); +INSERT INTO `sys_oper_log` VALUES (2218, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:26:21'); +INSERT INTO `sys_oper_log` VALUES (2219, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:29:11'); +INSERT INTO `sys_oper_log` VALUES (2220, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:31:31'); +INSERT INTO `sys_oper_log` VALUES (2221, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:33:12'); +INSERT INTO `sys_oper_log` VALUES (2222, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:33:20'); +INSERT INTO `sys_oper_log` VALUES (2223, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:38:44'); +INSERT INTO `sys_oper_log` VALUES (2224, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:38:58'); +INSERT INTO `sys_oper_log` VALUES (2225, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:39:41'); +INSERT INTO `sys_oper_log` VALUES (2226, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:40:32'); +INSERT INTO `sys_oper_log` VALUES (2227, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:42:12'); +INSERT INTO `sys_oper_log` VALUES (2228, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:45:49'); +INSERT INTO `sys_oper_log` VALUES (2229, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:45:54'); +INSERT INTO `sys_oper_log` VALUES (2230, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:46:27'); +INSERT INTO `sys_oper_log` VALUES (2231, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:46:32'); +INSERT INTO `sys_oper_log` VALUES (2232, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:48:18'); +INSERT INTO `sys_oper_log` VALUES (2233, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:50:12'); +INSERT INTO `sys_oper_log` VALUES (2234, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:53:58'); +INSERT INTO `sys_oper_log` VALUES (2235, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:54:13'); +INSERT INTO `sys_oper_log` VALUES (2236, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:54:35'); +INSERT INTO `sys_oper_log` VALUES (2237, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:54:40'); +INSERT INTO `sys_oper_log` VALUES (2238, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:55:08'); +INSERT INTO `sys_oper_log` VALUES (2239, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:55:11'); +INSERT INTO `sys_oper_log` VALUES (2240, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:55:34'); +INSERT INTO `sys_oper_log` VALUES (2241, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:55:46'); +INSERT INTO `sys_oper_log` VALUES (2242, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.unBindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/unBindDevice', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceId\":4}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-30 10:55:59'); +INSERT INTO `sys_oper_log` VALUES (2243, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '180.111.206.137', 'XX XX', '{\"remark\":\"\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":2}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-30 10:57:14'); +INSERT INTO `sys_oper_log` VALUES (2244, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:57:19'); +INSERT INTO `sys_oper_log` VALUES (2245, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:57:22'); +INSERT INTO `sys_oper_log` VALUES (2246, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 10:57:25'); +INSERT INTO `sys_oper_log` VALUES (2247, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"params\":{},\"deviceId\":4,\"deviceName\":\"阿拉丁\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-30 10:57:35'); +INSERT INTO `sys_oper_log` VALUES (2248, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 10:57:39'); +INSERT INTO `sys_oper_log` VALUES (2249, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:27:39'); +INSERT INTO `sys_oper_log` VALUES (2250, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:27:44'); +INSERT INTO `sys_oper_log` VALUES (2251, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceId\":4,\"deviceName\":\"阿拉丁\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-30 15:28:03'); +INSERT INTO `sys_oper_log` VALUES (2252, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:28:05'); +INSERT INTO `sys_oper_log` VALUES (2253, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.updateDeviceInfo()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/updateDeviceInfo', '180.111.206.137', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceId\":4,\"deviceName\":\"阿拉丁神灯\"}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-30 15:28:25'); +INSERT INTO `sys_oper_log` VALUES (2254, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:28:27'); +INSERT INTO `sys_oper_log` VALUES (2255, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 15:28:33'); +INSERT INTO `sys_oper_log` VALUES (2256, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.137', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 15:28:35'); +INSERT INTO `sys_oper_log` VALUES (2257, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:28:55'); +INSERT INTO `sys_oper_log` VALUES (2258, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:30:29'); +INSERT INTO `sys_oper_log` VALUES (2259, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:30:46'); +INSERT INTO `sys_oper_log` VALUES (2260, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.137', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 15:31:12'); +INSERT INTO `sys_oper_log` VALUES (2261, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:53:02'); +INSERT INTO `sys_oper_log` VALUES (2262, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:54:39'); +INSERT INTO `sys_oper_log` VALUES (2263, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:54:46'); +INSERT INTO `sys_oper_log` VALUES (2264, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:57:11'); +INSERT INTO `sys_oper_log` VALUES (2265, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:57:19'); +INSERT INTO `sys_oper_log` VALUES (2266, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:57:22'); +INSERT INTO `sys_oper_log` VALUES (2267, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:57:30'); +INSERT INTO `sys_oper_log` VALUES (2268, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:57:34'); +INSERT INTO `sys_oper_log` VALUES (2269, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:57:56'); +INSERT INTO `sys_oper_log` VALUES (2270, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 18:58:26'); +INSERT INTO `sys_oper_log` VALUES (2271, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 19:00:11'); +INSERT INTO `sys_oper_log` VALUES (2272, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 19:08:36'); +INSERT INTO `sys_oper_log` VALUES (2273, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 19:17:25'); +INSERT INTO `sys_oper_log` VALUES (2274, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 19:17:30'); +INSERT INTO `sys_oper_log` VALUES (2275, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 19:19:06'); +INSERT INTO `sys_oper_log` VALUES (2276, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-30 19:50:40'); +INSERT INTO `sys_oper_log` VALUES (2277, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:41'); +INSERT INTO `sys_oper_log` VALUES (2278, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:42'); +INSERT INTO `sys_oper_log` VALUES (2279, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:43'); +INSERT INTO `sys_oper_log` VALUES (2280, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:44'); +INSERT INTO `sys_oper_log` VALUES (2281, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:45'); +INSERT INTO `sys_oper_log` VALUES (2282, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:45'); +INSERT INTO `sys_oper_log` VALUES (2283, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:46'); +INSERT INTO `sys_oper_log` VALUES (2284, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:46'); +INSERT INTO `sys_oper_log` VALUES (2285, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:47'); +INSERT INTO `sys_oper_log` VALUES (2286, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:47'); +INSERT INTO `sys_oper_log` VALUES (2287, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:48'); +INSERT INTO `sys_oper_log` VALUES (2288, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:49'); +INSERT INTO `sys_oper_log` VALUES (2289, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:49'); +INSERT INTO `sys_oper_log` VALUES (2290, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:53'); +INSERT INTO `sys_oper_log` VALUES (2291, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:54'); +INSERT INTO `sys_oper_log` VALUES (2292, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:55'); +INSERT INTO `sys_oper_log` VALUES (2293, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:55'); +INSERT INTO `sys_oper_log` VALUES (2294, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-30 19:50:55'); +INSERT INTO `sys_oper_log` VALUES (2295, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 10:35:17'); +INSERT INTO `sys_oper_log` VALUES (2296, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:46:28'); +INSERT INTO `sys_oper_log` VALUES (2297, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:48:05'); +INSERT INTO `sys_oper_log` VALUES (2298, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:48:10'); +INSERT INTO `sys_oper_log` VALUES (2299, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '180.111.206.122', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-31 14:48:23'); +INSERT INTO `sys_oper_log` VALUES (2300, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:32'); +INSERT INTO `sys_oper_log` VALUES (2301, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:34'); +INSERT INTO `sys_oper_log` VALUES (2302, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:39'); +INSERT INTO `sys_oper_log` VALUES (2303, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:40'); +INSERT INTO `sys_oper_log` VALUES (2304, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:49'); +INSERT INTO `sys_oper_log` VALUES (2305, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:50'); +INSERT INTO `sys_oper_log` VALUES (2306, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:48:50'); +INSERT INTO `sys_oper_log` VALUES (2307, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:03'); +INSERT INTO `sys_oper_log` VALUES (2308, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:04'); +INSERT INTO `sys_oper_log` VALUES (2309, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:05'); +INSERT INTO `sys_oper_log` VALUES (2310, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:06'); +INSERT INTO `sys_oper_log` VALUES (2311, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:06'); +INSERT INTO `sys_oper_log` VALUES (2312, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:07'); +INSERT INTO `sys_oper_log` VALUES (2313, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:08'); +INSERT INTO `sys_oper_log` VALUES (2314, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:08'); +INSERT INTO `sys_oper_log` VALUES (2315, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:15'); +INSERT INTO `sys_oper_log` VALUES (2316, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:16'); +INSERT INTO `sys_oper_log` VALUES (2317, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:49:34'); +INSERT INTO `sys_oper_log` VALUES (2318, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:49:42'); +INSERT INTO `sys_oper_log` VALUES (2319, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:49:48'); +INSERT INTO `sys_oper_log` VALUES (2320, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.unBindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/unBindDevice', '180.111.206.122', 'XX XX', '{\"params\":{},\"deviceId\":4}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-31 14:49:54'); +INSERT INTO `sys_oper_log` VALUES (2321, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:50:01'); +INSERT INTO `sys_oper_log` VALUES (2322, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '180.111.206.122', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-31 14:50:07'); +INSERT INTO `sys_oper_log` VALUES (2323, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:50:09'); +INSERT INTO `sys_oper_log` VALUES (2324, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:50:10'); +INSERT INTO `sys_oper_log` VALUES (2325, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '180.111.206.122', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 14:50:14'); +INSERT INTO `sys_oper_log` VALUES (2326, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:50:17'); +INSERT INTO `sys_oper_log` VALUES (2327, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:50:18'); +INSERT INTO `sys_oper_log` VALUES (2328, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '180.111.206.122', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 14:50:22'); +INSERT INTO `sys_oper_log` VALUES (2329, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:50:25'); +INSERT INTO `sys_oper_log` VALUES (2330, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:50:26'); +INSERT INTO `sys_oper_log` VALUES (2331, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:50:34'); +INSERT INTO `sys_oper_log` VALUES (2332, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:50:38'); +INSERT INTO `sys_oper_log` VALUES (2333, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:50:59'); +INSERT INTO `sys_oper_log` VALUES (2334, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:00'); +INSERT INTO `sys_oper_log` VALUES (2335, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:01'); +INSERT INTO `sys_oper_log` VALUES (2336, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:02'); +INSERT INTO `sys_oper_log` VALUES (2337, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:03'); +INSERT INTO `sys_oper_log` VALUES (2338, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:04'); +INSERT INTO `sys_oper_log` VALUES (2339, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:05'); +INSERT INTO `sys_oper_log` VALUES (2340, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:05'); +INSERT INTO `sys_oper_log` VALUES (2341, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:06'); +INSERT INTO `sys_oper_log` VALUES (2342, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:06'); +INSERT INTO `sys_oper_log` VALUES (2343, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:07'); +INSERT INTO `sys_oper_log` VALUES (2344, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:08'); +INSERT INTO `sys_oper_log` VALUES (2345, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:08'); +INSERT INTO `sys_oper_log` VALUES (2346, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:09'); +INSERT INTO `sys_oper_log` VALUES (2347, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:10'); +INSERT INTO `sys_oper_log` VALUES (2348, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:51:29'); +INSERT INTO `sys_oper_log` VALUES (2349, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:31'); +INSERT INTO `sys_oper_log` VALUES (2350, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:32'); +INSERT INTO `sys_oper_log` VALUES (2351, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:32'); +INSERT INTO `sys_oper_log` VALUES (2352, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:33'); +INSERT INTO `sys_oper_log` VALUES (2353, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:33'); +INSERT INTO `sys_oper_log` VALUES (2354, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:34'); +INSERT INTO `sys_oper_log` VALUES (2355, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:34'); +INSERT INTO `sys_oper_log` VALUES (2356, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:51:35'); +INSERT INTO `sys_oper_log` VALUES (2357, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:52:57'); +INSERT INTO `sys_oper_log` VALUES (2358, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:52:59'); +INSERT INTO `sys_oper_log` VALUES (2359, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:52:59'); +INSERT INTO `sys_oper_log` VALUES (2360, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:01'); +INSERT INTO `sys_oper_log` VALUES (2361, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:02'); +INSERT INTO `sys_oper_log` VALUES (2362, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:02'); +INSERT INTO `sys_oper_log` VALUES (2363, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:02'); +INSERT INTO `sys_oper_log` VALUES (2364, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:02'); +INSERT INTO `sys_oper_log` VALUES (2365, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:03'); +INSERT INTO `sys_oper_log` VALUES (2366, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:03'); +INSERT INTO `sys_oper_log` VALUES (2367, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:03'); +INSERT INTO `sys_oper_log` VALUES (2368, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:03'); +INSERT INTO `sys_oper_log` VALUES (2369, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:03'); +INSERT INTO `sys_oper_log` VALUES (2370, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:04'); +INSERT INTO `sys_oper_log` VALUES (2371, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:04'); +INSERT INTO `sys_oper_log` VALUES (2372, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:04'); +INSERT INTO `sys_oper_log` VALUES (2373, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:04'); +INSERT INTO `sys_oper_log` VALUES (2374, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:05'); +INSERT INTO `sys_oper_log` VALUES (2375, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:05'); +INSERT INTO `sys_oper_log` VALUES (2376, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:05'); +INSERT INTO `sys_oper_log` VALUES (2377, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:05'); +INSERT INTO `sys_oper_log` VALUES (2378, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:05'); +INSERT INTO `sys_oper_log` VALUES (2379, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:06'); +INSERT INTO `sys_oper_log` VALUES (2380, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:06'); +INSERT INTO `sys_oper_log` VALUES (2381, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:07'); +INSERT INTO `sys_oper_log` VALUES (2382, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:07'); +INSERT INTO `sys_oper_log` VALUES (2383, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:07'); +INSERT INTO `sys_oper_log` VALUES (2384, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:07'); +INSERT INTO `sys_oper_log` VALUES (2385, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:07'); +INSERT INTO `sys_oper_log` VALUES (2386, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:08'); +INSERT INTO `sys_oper_log` VALUES (2387, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:08'); +INSERT INTO `sys_oper_log` VALUES (2388, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:08'); +INSERT INTO `sys_oper_log` VALUES (2389, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:08'); +INSERT INTO `sys_oper_log` VALUES (2390, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:09'); +INSERT INTO `sys_oper_log` VALUES (2391, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:09'); +INSERT INTO `sys_oper_log` VALUES (2392, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:17'); +INSERT INTO `sys_oper_log` VALUES (2393, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:18'); +INSERT INTO `sys_oper_log` VALUES (2394, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:18'); +INSERT INTO `sys_oper_log` VALUES (2395, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:18'); +INSERT INTO `sys_oper_log` VALUES (2396, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:18'); +INSERT INTO `sys_oper_log` VALUES (2397, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:53:23'); +INSERT INTO `sys_oper_log` VALUES (2398, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:24'); +INSERT INTO `sys_oper_log` VALUES (2399, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:25'); +INSERT INTO `sys_oper_log` VALUES (2400, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:53:30'); +INSERT INTO `sys_oper_log` VALUES (2401, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:31'); +INSERT INTO `sys_oper_log` VALUES (2402, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:32'); +INSERT INTO `sys_oper_log` VALUES (2403, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:32'); +INSERT INTO `sys_oper_log` VALUES (2404, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:32'); +INSERT INTO `sys_oper_log` VALUES (2405, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:32'); +INSERT INTO `sys_oper_log` VALUES (2406, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:33'); +INSERT INTO `sys_oper_log` VALUES (2407, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:33'); +INSERT INTO `sys_oper_log` VALUES (2408, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:33'); +INSERT INTO `sys_oper_log` VALUES (2409, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:33'); +INSERT INTO `sys_oper_log` VALUES (2410, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:33'); +INSERT INTO `sys_oper_log` VALUES (2411, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:33'); +INSERT INTO `sys_oper_log` VALUES (2412, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:34'); +INSERT INTO `sys_oper_log` VALUES (2413, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:34'); +INSERT INTO `sys_oper_log` VALUES (2414, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:34'); +INSERT INTO `sys_oper_log` VALUES (2415, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:34'); +INSERT INTO `sys_oper_log` VALUES (2416, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:34'); +INSERT INTO `sys_oper_log` VALUES (2417, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:35'); +INSERT INTO `sys_oper_log` VALUES (2418, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:35'); +INSERT INTO `sys_oper_log` VALUES (2419, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:35'); +INSERT INTO `sys_oper_log` VALUES (2420, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:35'); +INSERT INTO `sys_oper_log` VALUES (2421, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:35'); +INSERT INTO `sys_oper_log` VALUES (2422, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:36'); +INSERT INTO `sys_oper_log` VALUES (2423, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:36'); +INSERT INTO `sys_oper_log` VALUES (2424, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:44'); +INSERT INTO `sys_oper_log` VALUES (2425, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:45'); +INSERT INTO `sys_oper_log` VALUES (2426, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:45'); +INSERT INTO `sys_oper_log` VALUES (2427, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:45'); +INSERT INTO `sys_oper_log` VALUES (2428, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:45'); +INSERT INTO `sys_oper_log` VALUES (2429, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:46'); +INSERT INTO `sys_oper_log` VALUES (2430, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:47'); +INSERT INTO `sys_oper_log` VALUES (2431, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:53:48'); +INSERT INTO `sys_oper_log` VALUES (2432, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:54:03'); +INSERT INTO `sys_oper_log` VALUES (2433, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:54:09'); +INSERT INTO `sys_oper_log` VALUES (2434, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:54:32'); +INSERT INTO `sys_oper_log` VALUES (2435, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:34'); +INSERT INTO `sys_oper_log` VALUES (2436, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:35'); +INSERT INTO `sys_oper_log` VALUES (2437, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:36'); +INSERT INTO `sys_oper_log` VALUES (2438, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:37'); +INSERT INTO `sys_oper_log` VALUES (2439, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:37'); +INSERT INTO `sys_oper_log` VALUES (2440, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:38'); +INSERT INTO `sys_oper_log` VALUES (2441, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:39'); +INSERT INTO `sys_oper_log` VALUES (2442, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:40'); +INSERT INTO `sys_oper_log` VALUES (2443, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:41'); +INSERT INTO `sys_oper_log` VALUES (2444, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:42'); +INSERT INTO `sys_oper_log` VALUES (2445, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:43'); +INSERT INTO `sys_oper_log` VALUES (2446, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:44'); +INSERT INTO `sys_oper_log` VALUES (2447, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:45'); +INSERT INTO `sys_oper_log` VALUES (2448, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:46'); +INSERT INTO `sys_oper_log` VALUES (2449, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:47'); +INSERT INTO `sys_oper_log` VALUES (2450, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:48'); +INSERT INTO `sys_oper_log` VALUES (2451, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:48'); +INSERT INTO `sys_oper_log` VALUES (2452, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:49'); +INSERT INTO `sys_oper_log` VALUES (2453, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:50'); +INSERT INTO `sys_oper_log` VALUES (2454, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:51'); +INSERT INTO `sys_oper_log` VALUES (2455, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:54:52'); +INSERT INTO `sys_oper_log` VALUES (2456, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:52'); +INSERT INTO `sys_oper_log` VALUES (2457, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:53'); +INSERT INTO `sys_oper_log` VALUES (2458, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:53'); +INSERT INTO `sys_oper_log` VALUES (2459, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:54'); +INSERT INTO `sys_oper_log` VALUES (2460, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:54'); +INSERT INTO `sys_oper_log` VALUES (2461, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:54:55'); +INSERT INTO `sys_oper_log` VALUES (2462, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:54:56'); +INSERT INTO `sys_oper_log` VALUES (2463, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:54:59'); +INSERT INTO `sys_oper_log` VALUES (2464, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '180.111.206.122', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 14:58:05'); +INSERT INTO `sys_oper_log` VALUES (2465, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '180.111.206.122', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 14:58:11'); +INSERT INTO `sys_oper_log` VALUES (2466, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:16'); +INSERT INTO `sys_oper_log` VALUES (2467, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:17'); +INSERT INTO `sys_oper_log` VALUES (2468, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:19'); +INSERT INTO `sys_oper_log` VALUES (2469, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:20'); +INSERT INTO `sys_oper_log` VALUES (2470, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:21'); +INSERT INTO `sys_oper_log` VALUES (2471, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:21'); +INSERT INTO `sys_oper_log` VALUES (2472, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:23'); +INSERT INTO `sys_oper_log` VALUES (2473, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:23'); +INSERT INTO `sys_oper_log` VALUES (2474, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:58:33'); +INSERT INTO `sys_oper_log` VALUES (2475, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:35'); +INSERT INTO `sys_oper_log` VALUES (2476, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:35'); +INSERT INTO `sys_oper_log` VALUES (2477, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:58:49'); +INSERT INTO `sys_oper_log` VALUES (2478, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:58:54'); +INSERT INTO `sys_oper_log` VALUES (2479, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:58:58'); +INSERT INTO `sys_oper_log` VALUES (2480, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:59:01'); +INSERT INTO `sys_oper_log` VALUES (2481, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:05'); +INSERT INTO `sys_oper_log` VALUES (2482, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:06'); +INSERT INTO `sys_oper_log` VALUES (2483, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:07'); +INSERT INTO `sys_oper_log` VALUES (2484, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:08'); +INSERT INTO `sys_oper_log` VALUES (2485, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:59:14'); +INSERT INTO `sys_oper_log` VALUES (2486, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:59:16'); +INSERT INTO `sys_oper_log` VALUES (2487, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:18'); +INSERT INTO `sys_oper_log` VALUES (2488, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:21'); +INSERT INTO `sys_oper_log` VALUES (2489, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:22'); +INSERT INTO `sys_oper_log` VALUES (2490, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:23'); +INSERT INTO `sys_oper_log` VALUES (2491, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:24'); +INSERT INTO `sys_oper_log` VALUES (2492, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:25'); +INSERT INTO `sys_oper_log` VALUES (2493, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:59:36'); +INSERT INTO `sys_oper_log` VALUES (2494, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:38'); +INSERT INTO `sys_oper_log` VALUES (2495, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:39'); +INSERT INTO `sys_oper_log` VALUES (2496, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:40'); +INSERT INTO `sys_oper_log` VALUES (2497, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:41'); +INSERT INTO `sys_oper_log` VALUES (2498, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:43'); +INSERT INTO `sys_oper_log` VALUES (2499, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:44'); +INSERT INTO `sys_oper_log` VALUES (2500, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:45'); +INSERT INTO `sys_oper_log` VALUES (2501, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:45'); +INSERT INTO `sys_oper_log` VALUES (2502, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:46'); +INSERT INTO `sys_oper_log` VALUES (2503, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 14:59:46'); +INSERT INTO `sys_oper_log` VALUES (2504, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 14:59:52'); +INSERT INTO `sys_oper_log` VALUES (2505, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 15:54:30'); +INSERT INTO `sys_oper_log` VALUES (2506, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:54:32'); +INSERT INTO `sys_oper_log` VALUES (2507, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:54:33'); +INSERT INTO `sys_oper_log` VALUES (2508, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:54:34'); +INSERT INTO `sys_oper_log` VALUES (2509, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:54:35'); +INSERT INTO `sys_oper_log` VALUES (2510, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:54:35'); +INSERT INTO `sys_oper_log` VALUES (2511, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:54:36'); +INSERT INTO `sys_oper_log` VALUES (2512, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 15:58:06'); +INSERT INTO `sys_oper_log` VALUES (2513, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:08'); +INSERT INTO `sys_oper_log` VALUES (2514, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:09'); +INSERT INTO `sys_oper_log` VALUES (2515, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:10'); +INSERT INTO `sys_oper_log` VALUES (2516, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:12'); +INSERT INTO `sys_oper_log` VALUES (2517, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:13'); +INSERT INTO `sys_oper_log` VALUES (2518, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:13'); +INSERT INTO `sys_oper_log` VALUES (2519, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:14'); +INSERT INTO `sys_oper_log` VALUES (2520, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:15'); +INSERT INTO `sys_oper_log` VALUES (2521, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:15'); +INSERT INTO `sys_oper_log` VALUES (2522, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:58:17'); +INSERT INTO `sys_oper_log` VALUES (2523, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 15:59:07'); +INSERT INTO `sys_oper_log` VALUES (2524, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 15:59:25'); +INSERT INTO `sys_oper_log` VALUES (2525, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:59:32'); +INSERT INTO `sys_oper_log` VALUES (2526, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 15:59:33'); +INSERT INTO `sys_oper_log` VALUES (2527, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 15:59:46'); +INSERT INTO `sys_oper_log` VALUES (2528, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 15:59:51'); +INSERT INTO `sys_oper_log` VALUES (2529, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:00:05'); +INSERT INTO `sys_oper_log` VALUES (2530, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:00:08'); +INSERT INTO `sys_oper_log` VALUES (2531, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:00:13'); +INSERT INTO `sys_oper_log` VALUES (2532, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 16:00:14'); +INSERT INTO `sys_oper_log` VALUES (2533, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 16:00:15'); +INSERT INTO `sys_oper_log` VALUES (2534, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:01:01'); +INSERT INTO `sys_oper_log` VALUES (2535, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 16:01:07'); +INSERT INTO `sys_oper_log` VALUES (2536, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:01:14'); +INSERT INTO `sys_oper_log` VALUES (2537, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 16:01:30'); +INSERT INTO `sys_oper_log` VALUES (2538, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:01:33'); +INSERT INTO `sys_oper_log` VALUES (2539, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:02:15'); +INSERT INTO `sys_oper_log` VALUES (2540, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 16:02:19'); +INSERT INTO `sys_oper_log` VALUES (2541, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:02:43'); +INSERT INTO `sys_oper_log` VALUES (2542, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 16:02:46'); +INSERT INTO `sys_oper_log` VALUES (2543, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:02:48'); +INSERT INTO `sys_oper_log` VALUES (2544, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 16:02:53'); +INSERT INTO `sys_oper_log` VALUES (2545, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:29:05'); +INSERT INTO `sys_oper_log` VALUES (2546, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:29:05'); +INSERT INTO `sys_oper_log` VALUES (2547, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:29:05'); +INSERT INTO `sys_oper_log` VALUES (2548, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '117.136.45.101', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 19:29:05'); +INSERT INTO `sys_oper_log` VALUES (2549, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:30:16'); +INSERT INTO `sys_oper_log` VALUES (2550, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:30:30'); +INSERT INTO `sys_oper_log` VALUES (2551, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:31:21'); +INSERT INTO `sys_oper_log` VALUES (2552, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:31:56'); +INSERT INTO `sys_oper_log` VALUES (2553, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:32:02'); +INSERT INTO `sys_oper_log` VALUES (2554, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:32:03'); +INSERT INTO `sys_oper_log` VALUES (2555, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:32:08'); +INSERT INTO `sys_oper_log` VALUES (2556, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:32:20'); +INSERT INTO `sys_oper_log` VALUES (2557, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:32:39'); +INSERT INTO `sys_oper_log` VALUES (2558, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:32:47'); +INSERT INTO `sys_oper_log` VALUES (2559, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '117.136.45.101', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 19:32:52'); +INSERT INTO `sys_oper_log` VALUES (2560, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:32:52'); +INSERT INTO `sys_oper_log` VALUES (2561, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:32:57'); +INSERT INTO `sys_oper_log` VALUES (2562, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:33:01'); +INSERT INTO `sys_oper_log` VALUES (2563, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/bindDevice', '117.136.45.101', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":1}', 'null', 1, '该设备已被绑定！', '2021-08-31 19:33:05'); +INSERT INTO `sys_oper_log` VALUES (2564, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:33:05'); +INSERT INTO `sys_oper_log` VALUES (2565, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:33:11'); +INSERT INTO `sys_oper_log` VALUES (2566, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:33:18'); +INSERT INTO `sys_oper_log` VALUES (2567, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:33:20'); +INSERT INTO `sys_oper_log` VALUES (2568, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:33:22'); +INSERT INTO `sys_oper_log` VALUES (2569, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:38:01'); +INSERT INTO `sys_oper_log` VALUES (2570, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:38:07'); +INSERT INTO `sys_oper_log` VALUES (2571, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:40:39'); +INSERT INTO `sys_oper_log` VALUES (2572, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:40:42'); +INSERT INTO `sys_oper_log` VALUES (2573, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:41:12'); +INSERT INTO `sys_oper_log` VALUES (2574, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:20'); +INSERT INTO `sys_oper_log` VALUES (2575, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:21'); +INSERT INTO `sys_oper_log` VALUES (2576, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:23'); +INSERT INTO `sys_oper_log` VALUES (2577, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:41:27'); +INSERT INTO `sys_oper_log` VALUES (2578, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:31'); +INSERT INTO `sys_oper_log` VALUES (2579, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:41:35'); +INSERT INTO `sys_oper_log` VALUES (2580, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:37'); +INSERT INTO `sys_oper_log` VALUES (2581, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:41:41'); +INSERT INTO `sys_oper_log` VALUES (2582, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:54'); +INSERT INTO `sys_oper_log` VALUES (2583, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:41:55'); +INSERT INTO `sys_oper_log` VALUES (2584, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:41:57'); +INSERT INTO `sys_oper_log` VALUES (2585, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:43:27'); +INSERT INTO `sys_oper_log` VALUES (2586, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:30'); +INSERT INTO `sys_oper_log` VALUES (2587, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:35'); +INSERT INTO `sys_oper_log` VALUES (2588, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:38'); +INSERT INTO `sys_oper_log` VALUES (2589, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:42'); +INSERT INTO `sys_oper_log` VALUES (2590, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:43'); +INSERT INTO `sys_oper_log` VALUES (2591, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:45'); +INSERT INTO `sys_oper_log` VALUES (2592, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:43:47'); +INSERT INTO `sys_oper_log` VALUES (2593, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:52:01'); +INSERT INTO `sys_oper_log` VALUES (2594, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:52:06'); +INSERT INTO `sys_oper_log` VALUES (2595, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:53:21'); +INSERT INTO `sys_oper_log` VALUES (2596, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:53:25'); +INSERT INTO `sys_oper_log` VALUES (2597, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:53:41'); +INSERT INTO `sys_oper_log` VALUES (2598, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:59:40'); +INSERT INTO `sys_oper_log` VALUES (2599, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:59:42'); +INSERT INTO `sys_oper_log` VALUES (2600, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:59:45'); +INSERT INTO `sys_oper_log` VALUES (2601, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 19:59:46'); +INSERT INTO `sys_oper_log` VALUES (2602, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 19:59:50'); +INSERT INTO `sys_oper_log` VALUES (2603, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 20:02:10'); +INSERT INTO `sys_oper_log` VALUES (2604, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:30'); +INSERT INTO `sys_oper_log` VALUES (2605, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 20:02:33'); +INSERT INTO `sys_oper_log` VALUES (2606, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"lightStatus\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"wifi通断器\",\"categoryId\":1}}', 0, NULL, '2021-08-31 20:02:36'); +INSERT INTO `sys_oper_log` VALUES (2607, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:37'); +INSERT INTO `sys_oper_log` VALUES (2608, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:40'); +INSERT INTO `sys_oper_log` VALUES (2609, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:43'); +INSERT INTO `sys_oper_log` VALUES (2610, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:45'); +INSERT INTO `sys_oper_log` VALUES (2611, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:46'); +INSERT INTO `sys_oper_log` VALUES (2612, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:55'); +INSERT INTO `sys_oper_log` VALUES (2613, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:55'); +INSERT INTO `sys_oper_log` VALUES (2614, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:02:55'); +INSERT INTO `sys_oper_log` VALUES (2615, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:11:29'); +INSERT INTO `sys_oper_log` VALUES (2616, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:14:10'); +INSERT INTO `sys_oper_log` VALUES (2617, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:14:11'); +INSERT INTO `sys_oper_log` VALUES (2618, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:14:12'); +INSERT INTO `sys_oper_log` VALUES (2619, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:14:18'); +INSERT INTO `sys_oper_log` VALUES (2620, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:18:14'); +INSERT INTO `sys_oper_log` VALUES (2621, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:19:27'); +INSERT INTO `sys_oper_log` VALUES (2622, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:19:28'); +INSERT INTO `sys_oper_log` VALUES (2623, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '180.111.206.122', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:19:30'); +INSERT INTO `sys_oper_log` VALUES (2624, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '180.111.206.122', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:19:32'); +INSERT INTO `sys_oper_log` VALUES (2625, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:20:00'); +INSERT INTO `sys_oper_log` VALUES (2626, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:20:01'); +INSERT INTO `sys_oper_log` VALUES (2627, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:20:02'); +INSERT INTO `sys_oper_log` VALUES (2628, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:20:12'); +INSERT INTO `sys_oper_log` VALUES (2629, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:20:16'); +INSERT INTO `sys_oper_log` VALUES (2630, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:25'); +INSERT INTO `sys_oper_log` VALUES (2631, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:28'); +INSERT INTO `sys_oper_log` VALUES (2632, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:23:32'); +INSERT INTO `sys_oper_log` VALUES (2633, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":true,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:35'); +INSERT INTO `sys_oper_log` VALUES (2634, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, 'EB5312FB4A26', NULL, '/system/device/control', '117.136.45.101', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:23:38'); +INSERT INTO `sys_oper_log` VALUES (2635, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:43'); +INSERT INTO `sys_oper_log` VALUES (2636, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:48'); +INSERT INTO `sys_oper_log` VALUES (2637, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:55'); +INSERT INTO `sys_oper_log` VALUES (2638, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:23:55'); +INSERT INTO `sys_oper_log` VALUES (2639, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.unBindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/unBindDevice', '117.136.45.72', 'XX XX', '{\"params\":{},\"deviceId\":4}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-31 20:23:58'); +INSERT INTO `sys_oper_log` VALUES (2640, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, 'EB5312FB4A26', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.101', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":{\"deviceNum\":\"863488052352472\",\"relayStatus\":false,\"remark\":\"灯等等灯\",\"isOnline\":true,\"deviceName\":\"阿拉丁神灯\",\"deviceId\":4,\"categoryName\":\"智能水阀\",\"categoryId\":4}}', 0, NULL, '2021-08-31 20:24:04'); +INSERT INTO `sys_oper_log` VALUES (2641, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '117.136.45.72', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":4}', '{\"msg\":\"操作成功\",\"code\":200,\"data\":1}', 0, NULL, '2021-08-31 20:24:31'); +INSERT INTO `sys_oper_log` VALUES (2642, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:31'); +INSERT INTO `sys_oper_log` VALUES (2643, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:35'); +INSERT INTO `sys_oper_log` VALUES (2644, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:38'); +INSERT INTO `sys_oper_log` VALUES (2645, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:40'); +INSERT INTO `sys_oper_log` VALUES (2646, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:41'); +INSERT INTO `sys_oper_log` VALUES (2647, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:46'); +INSERT INTO `sys_oper_log` VALUES (2648, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:49'); +INSERT INTO `sys_oper_log` VALUES (2649, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:50'); +INSERT INTO `sys_oper_log` VALUES (2650, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:24:55'); +INSERT INTO `sys_oper_log` VALUES (2651, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.bindDevice()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/bindDevice', '117.136.45.72', 'XX XX', '{\"remark\":\"灯等等灯\",\"params\":{},\"deviceName\":\"阿拉丁神灯\",\"deviceNum\":\"863488052352472\",\"categoryId\":4}', 'null', 1, '该设备已被绑定！', '2021-08-31 20:25:05'); +INSERT INTO `sys_oper_log` VALUES (2652, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.getDeviceInfoByDeviceId()', 'GET', 1, '6F1B3F33DD38', NULL, '/system/device/getDeviceInfoByDeviceId', '117.136.45.72', 'XX XX', '{}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:05'); +INSERT INTO `sys_oper_log` VALUES (2653, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:07'); +INSERT INTO `sys_oper_log` VALUES (2654, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:08'); +INSERT INTO `sys_oper_log` VALUES (2655, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:09'); +INSERT INTO `sys_oper_log` VALUES (2656, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:10'); +INSERT INTO `sys_oper_log` VALUES (2657, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:11'); +INSERT INTO `sys_oper_log` VALUES (2658, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:12'); +INSERT INTO `sys_oper_log` VALUES (2659, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:12'); +INSERT INTO `sys_oper_log` VALUES (2660, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:13'); +INSERT INTO `sys_oper_log` VALUES (2661, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"on\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:14'); +INSERT INTO `sys_oper_log` VALUES (2662, '设备', 2, 'com.ruoyi.system.controller.IotDeviceController.control()', 'POST', 1, '6F1B3F33DD38', NULL, '/system/device/control', '117.136.45.72', 'XX XX', '{\"deviceNum\":\"863488052352472\",\"cmd\":\"off\"}', '{\"msg\":\"操作成功\",\"code\":200}', 0, NULL, '2021-08-31 20:25:14'); + +-- ---------------------------- +-- Table structure for sys_post +-- ---------------------------- +DROP TABLE IF EXISTS `sys_post`; +CREATE TABLE `sys_post` ( + `post_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '岗位ID', + `post_code` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '岗位编码', + `post_name` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '岗位名称', + `post_sort` int(0) NOT NULL COMMENT '显示顺序', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '状态（0正常 1停用）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`post_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 5 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '岗位信息表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_post +-- ---------------------------- +INSERT INTO `sys_post` VALUES (1, 'ceo', '董事长', 1, '0', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_post` VALUES (2, 'se', '项目经理', 2, '0', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_post` VALUES (3, 'hr', '人力资源', 3, '0', 'admin', '2021-05-18 02:23:06', '', NULL, ''); +INSERT INTO `sys_post` VALUES (4, 'user', '普通员工', 4, '0', 'admin', '2021-05-18 02:23:06', '', NULL, ''); + +-- ---------------------------- +-- Table structure for sys_role +-- ---------------------------- +DROP TABLE IF EXISTS `sys_role`; +CREATE TABLE `sys_role` ( + `role_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '角色ID', + `role_name` varchar(30) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '角色名称', + `role_key` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '角色权限字符串', + `role_sort` int(0) NOT NULL COMMENT '显示顺序', + `data_scope` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '1' COMMENT '数据范围（1：全部数据权限 2：自定数据权限 3：本部门数据权限 4：本部门及以下数据权限）', + `menu_check_strictly` tinyint(1) NULL DEFAULT 1 COMMENT '菜单树选择项是否关联显示', + `dept_check_strictly` tinyint(1) NULL DEFAULT 1 COMMENT '部门树选择项是否关联显示', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '角色状态（0正常 1停用）', + `del_flag` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`role_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 102 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '角色信息表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_role +-- ---------------------------- +INSERT INTO `sys_role` VALUES (1, '超级管理员', 'admin', 1, '1', 1, 1, '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL, '超级管理员'); +INSERT INTO `sys_role` VALUES (2, '普通角色', 'common', 2, '2', 1, 1, '0', '0', 'admin', '2021-05-18 02:23:06', '', NULL, '普通角色'); +INSERT INTO `sys_role` VALUES (100, '游客角色', 'visitor', 8, '1', 1, 1, '0', '0', 'admin', '2021-05-29 08:42:32', 'admin', '2021-08-26 17:27:05', NULL); +INSERT INTO `sys_role` VALUES (101, '小程序用户', 'mp', 3, '1', 1, 1, '0', '0', 'admin', '2021-08-26 17:26:52', '', NULL, NULL); + +-- ---------------------------- +-- Table structure for sys_role_dept +-- ---------------------------- +DROP TABLE IF EXISTS `sys_role_dept`; +CREATE TABLE `sys_role_dept` ( + `role_id` bigint(0) NOT NULL COMMENT '角色ID', + `dept_id` bigint(0) NOT NULL COMMENT '部门ID', + PRIMARY KEY (`role_id`, `dept_id`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '角色和部门关联表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_role_dept +-- ---------------------------- +INSERT INTO `sys_role_dept` VALUES (2, 100); +INSERT INTO `sys_role_dept` VALUES (2, 101); +INSERT INTO `sys_role_dept` VALUES (2, 105); + +-- ---------------------------- +-- Table structure for sys_role_menu +-- ---------------------------- +DROP TABLE IF EXISTS `sys_role_menu`; +CREATE TABLE `sys_role_menu` ( + `role_id` bigint(0) NOT NULL COMMENT '角色ID', + `menu_id` bigint(0) NOT NULL COMMENT '菜单ID', + PRIMARY KEY (`role_id`, `menu_id`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '角色和菜单关联表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_role_menu +-- ---------------------------- +INSERT INTO `sys_role_menu` VALUES (2, 1); +INSERT INTO `sys_role_menu` VALUES (2, 2); +INSERT INTO `sys_role_menu` VALUES (2, 3); +INSERT INTO `sys_role_menu` VALUES (2, 4); +INSERT INTO `sys_role_menu` VALUES (2, 100); +INSERT INTO `sys_role_menu` VALUES (2, 101); +INSERT INTO `sys_role_menu` VALUES (2, 102); +INSERT INTO `sys_role_menu` VALUES (2, 103); +INSERT INTO `sys_role_menu` VALUES (2, 104); +INSERT INTO `sys_role_menu` VALUES (2, 105); +INSERT INTO `sys_role_menu` VALUES (2, 106); +INSERT INTO `sys_role_menu` VALUES (2, 107); +INSERT INTO `sys_role_menu` VALUES (2, 108); +INSERT INTO `sys_role_menu` VALUES (2, 109); +INSERT INTO `sys_role_menu` VALUES (2, 110); +INSERT INTO `sys_role_menu` VALUES (2, 111); +INSERT INTO `sys_role_menu` VALUES (2, 112); +INSERT INTO `sys_role_menu` VALUES (2, 113); +INSERT INTO `sys_role_menu` VALUES (2, 114); +INSERT INTO `sys_role_menu` VALUES (2, 115); +INSERT INTO `sys_role_menu` VALUES (2, 116); +INSERT INTO `sys_role_menu` VALUES (2, 500); +INSERT INTO `sys_role_menu` VALUES (2, 501); +INSERT INTO `sys_role_menu` VALUES (2, 1000); +INSERT INTO `sys_role_menu` VALUES (2, 1001); +INSERT INTO `sys_role_menu` VALUES (2, 1002); +INSERT INTO `sys_role_menu` VALUES (2, 1003); +INSERT INTO `sys_role_menu` VALUES (2, 1004); +INSERT INTO `sys_role_menu` VALUES (2, 1005); +INSERT INTO `sys_role_menu` VALUES (2, 1006); +INSERT INTO `sys_role_menu` VALUES (2, 1007); +INSERT INTO `sys_role_menu` VALUES (2, 1008); +INSERT INTO `sys_role_menu` VALUES (2, 1009); +INSERT INTO `sys_role_menu` VALUES (2, 1010); +INSERT INTO `sys_role_menu` VALUES (2, 1011); +INSERT INTO `sys_role_menu` VALUES (2, 1012); +INSERT INTO `sys_role_menu` VALUES (2, 1013); +INSERT INTO `sys_role_menu` VALUES (2, 1014); +INSERT INTO `sys_role_menu` VALUES (2, 1015); +INSERT INTO `sys_role_menu` VALUES (2, 1016); +INSERT INTO `sys_role_menu` VALUES (2, 1017); +INSERT INTO `sys_role_menu` VALUES (2, 1018); +INSERT INTO `sys_role_menu` VALUES (2, 1019); +INSERT INTO `sys_role_menu` VALUES (2, 1020); +INSERT INTO `sys_role_menu` VALUES (2, 1021); +INSERT INTO `sys_role_menu` VALUES (2, 1022); +INSERT INTO `sys_role_menu` VALUES (2, 1023); +INSERT INTO `sys_role_menu` VALUES (2, 1024); +INSERT INTO `sys_role_menu` VALUES (2, 1025); +INSERT INTO `sys_role_menu` VALUES (2, 1026); +INSERT INTO `sys_role_menu` VALUES (2, 1027); +INSERT INTO `sys_role_menu` VALUES (2, 1028); +INSERT INTO `sys_role_menu` VALUES (2, 1029); +INSERT INTO `sys_role_menu` VALUES (2, 1030); +INSERT INTO `sys_role_menu` VALUES (2, 1031); +INSERT INTO `sys_role_menu` VALUES (2, 1032); +INSERT INTO `sys_role_menu` VALUES (2, 1033); +INSERT INTO `sys_role_menu` VALUES (2, 1034); +INSERT INTO `sys_role_menu` VALUES (2, 1035); +INSERT INTO `sys_role_menu` VALUES (2, 1036); +INSERT INTO `sys_role_menu` VALUES (2, 1037); +INSERT INTO `sys_role_menu` VALUES (2, 1038); +INSERT INTO `sys_role_menu` VALUES (2, 1039); +INSERT INTO `sys_role_menu` VALUES (2, 1040); +INSERT INTO `sys_role_menu` VALUES (2, 1041); +INSERT INTO `sys_role_menu` VALUES (2, 1042); +INSERT INTO `sys_role_menu` VALUES (2, 1043); +INSERT INTO `sys_role_menu` VALUES (2, 1044); +INSERT INTO `sys_role_menu` VALUES (2, 1045); +INSERT INTO `sys_role_menu` VALUES (2, 1046); +INSERT INTO `sys_role_menu` VALUES (2, 1047); +INSERT INTO `sys_role_menu` VALUES (2, 1048); +INSERT INTO `sys_role_menu` VALUES (2, 1049); +INSERT INTO `sys_role_menu` VALUES (2, 1050); +INSERT INTO `sys_role_menu` VALUES (2, 1051); +INSERT INTO `sys_role_menu` VALUES (2, 1052); +INSERT INTO `sys_role_menu` VALUES (2, 1053); +INSERT INTO `sys_role_menu` VALUES (2, 1054); +INSERT INTO `sys_role_menu` VALUES (2, 1055); +INSERT INTO `sys_role_menu` VALUES (2, 1056); +INSERT INTO `sys_role_menu` VALUES (2, 1057); +INSERT INTO `sys_role_menu` VALUES (2, 1058); +INSERT INTO `sys_role_menu` VALUES (2, 1059); +INSERT INTO `sys_role_menu` VALUES (2, 1060); +INSERT INTO `sys_role_menu` VALUES (100, 1); +INSERT INTO `sys_role_menu` VALUES (100, 2); +INSERT INTO `sys_role_menu` VALUES (100, 3); +INSERT INTO `sys_role_menu` VALUES (100, 4); +INSERT INTO `sys_role_menu` VALUES (100, 100); +INSERT INTO `sys_role_menu` VALUES (100, 101); +INSERT INTO `sys_role_menu` VALUES (100, 102); +INSERT INTO `sys_role_menu` VALUES (100, 103); +INSERT INTO `sys_role_menu` VALUES (100, 104); +INSERT INTO `sys_role_menu` VALUES (100, 105); +INSERT INTO `sys_role_menu` VALUES (100, 106); +INSERT INTO `sys_role_menu` VALUES (100, 107); +INSERT INTO `sys_role_menu` VALUES (100, 108); +INSERT INTO `sys_role_menu` VALUES (100, 109); +INSERT INTO `sys_role_menu` VALUES (100, 110); +INSERT INTO `sys_role_menu` VALUES (100, 115); +INSERT INTO `sys_role_menu` VALUES (100, 116); +INSERT INTO `sys_role_menu` VALUES (100, 500); +INSERT INTO `sys_role_menu` VALUES (100, 501); +INSERT INTO `sys_role_menu` VALUES (100, 1001); +INSERT INTO `sys_role_menu` VALUES (100, 1008); +INSERT INTO `sys_role_menu` VALUES (100, 1013); +INSERT INTO `sys_role_menu` VALUES (100, 1017); +INSERT INTO `sys_role_menu` VALUES (100, 1021); +INSERT INTO `sys_role_menu` VALUES (100, 1026); +INSERT INTO `sys_role_menu` VALUES (100, 1031); +INSERT INTO `sys_role_menu` VALUES (100, 1036); +INSERT INTO `sys_role_menu` VALUES (100, 1040); +INSERT INTO `sys_role_menu` VALUES (100, 1043); +INSERT INTO `sys_role_menu` VALUES (100, 1046); +INSERT INTO `sys_role_menu` VALUES (100, 1049); +INSERT INTO `sys_role_menu` VALUES (100, 1055); +INSERT INTO `sys_role_menu` VALUES (100, 2000); +INSERT INTO `sys_role_menu` VALUES (100, 2043); +INSERT INTO `sys_role_menu` VALUES (100, 2044); +INSERT INTO `sys_role_menu` VALUES (100, 2049); +INSERT INTO `sys_role_menu` VALUES (100, 2050); +INSERT INTO `sys_role_menu` VALUES (100, 2055); +INSERT INTO `sys_role_menu` VALUES (100, 2056); +INSERT INTO `sys_role_menu` VALUES (100, 2061); +INSERT INTO `sys_role_menu` VALUES (100, 2062); +INSERT INTO `sys_role_menu` VALUES (100, 2067); +INSERT INTO `sys_role_menu` VALUES (100, 2068); +INSERT INTO `sys_role_menu` VALUES (100, 2073); +INSERT INTO `sys_role_menu` VALUES (101, 2000); +INSERT INTO `sys_role_menu` VALUES (101, 2043); +INSERT INTO `sys_role_menu` VALUES (101, 2044); +INSERT INTO `sys_role_menu` VALUES (101, 2045); +INSERT INTO `sys_role_menu` VALUES (101, 2046); +INSERT INTO `sys_role_menu` VALUES (101, 2047); +INSERT INTO `sys_role_menu` VALUES (101, 2048); +INSERT INTO `sys_role_menu` VALUES (101, 2049); +INSERT INTO `sys_role_menu` VALUES (101, 2050); +INSERT INTO `sys_role_menu` VALUES (101, 2051); +INSERT INTO `sys_role_menu` VALUES (101, 2052); +INSERT INTO `sys_role_menu` VALUES (101, 2053); +INSERT INTO `sys_role_menu` VALUES (101, 2054); +INSERT INTO `sys_role_menu` VALUES (101, 2055); +INSERT INTO `sys_role_menu` VALUES (101, 2056); +INSERT INTO `sys_role_menu` VALUES (101, 2057); +INSERT INTO `sys_role_menu` VALUES (101, 2058); +INSERT INTO `sys_role_menu` VALUES (101, 2059); +INSERT INTO `sys_role_menu` VALUES (101, 2060); +INSERT INTO `sys_role_menu` VALUES (101, 2061); +INSERT INTO `sys_role_menu` VALUES (101, 2062); +INSERT INTO `sys_role_menu` VALUES (101, 2063); +INSERT INTO `sys_role_menu` VALUES (101, 2064); +INSERT INTO `sys_role_menu` VALUES (101, 2065); +INSERT INTO `sys_role_menu` VALUES (101, 2066); +INSERT INTO `sys_role_menu` VALUES (101, 2067); +INSERT INTO `sys_role_menu` VALUES (101, 2068); +INSERT INTO `sys_role_menu` VALUES (101, 2069); +INSERT INTO `sys_role_menu` VALUES (101, 2070); +INSERT INTO `sys_role_menu` VALUES (101, 2071); +INSERT INTO `sys_role_menu` VALUES (101, 2072); +INSERT INTO `sys_role_menu` VALUES (101, 2073); + +-- ---------------------------- +-- Table structure for sys_user +-- ---------------------------- +DROP TABLE IF EXISTS `sys_user`; +CREATE TABLE `sys_user` ( + `user_id` bigint(0) NOT NULL AUTO_INCREMENT COMMENT '用户ID', + `dept_id` bigint(0) NULL DEFAULT NULL COMMENT '部门ID', + `open_id` varchar(40) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '用户OpenId', + `user_name` varchar(30) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '用户账号', + `nick_name` varchar(30) CHARACTER SET utf8 COLLATE utf8_general_ci NOT NULL COMMENT '用户昵称', + `user_type` varchar(2) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '00' COMMENT '用户类型（00系统用户）', + `email` varchar(50) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '用户邮箱', + `phonenumber` varchar(11) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '手机号码', + `sex` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '用户性别（0男 1女 2未知）', + `avatar` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '头像地址', + `password` varchar(100) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '密码', + `status` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '帐号状态（0正常 1停用）', + `del_flag` char(1) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '0' COMMENT '删除标志（0代表存在 2代表删除）', + `login_ip` varchar(128) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '最后登录IP', + `login_date` datetime(0) NULL DEFAULT NULL COMMENT '最后登录时间', + `create_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '创建者', + `create_time` datetime(0) NULL DEFAULT NULL COMMENT '创建时间', + `update_by` varchar(64) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT '' COMMENT '更新者', + `update_time` datetime(0) NULL DEFAULT NULL COMMENT '更新时间', + `remark` varchar(500) CHARACTER SET utf8 COLLATE utf8_general_ci NULL DEFAULT NULL COMMENT '备注', + PRIMARY KEY (`user_id`) USING BTREE, + UNIQUE INDEX `open_id`(`open_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 117 CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '用户信息表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_user +-- ---------------------------- +INSERT INTO `sys_user` VALUES (1, 103, NULL, 'admin', '物美智能', '00', '164770707@qq.com', '15888888888', '1', '', '$2a$10$PXtk.97BgFUAK/7lpmxZ4eNPS6zL0VVHR7g.sjrdG5XUiX7pfGaRa', '0', '0', '127.0.0.1', '2021-05-18 02:23:06', 'admin', '2021-05-18 02:23:06', '', NULL, '管理员'); +INSERT INTO `sys_user` VALUES (2, 105, NULL, 'wumei', '物美智能', '00', 'admin@wumei.com', '15666666666', '1', '', '$2a$10$uLlHqgW4b5oAqoS81Rhkk.7Tf6wnGvh9FE9V160Dv2Kn9doOrB4qe', '0', '0', '127.0.0.1', '2021-05-18 02:23:06', 'admin', '2021-05-18 02:23:06', 'admin', '2021-06-19 09:31:14', '测试员'); +INSERT INTO `sys_user` VALUES (100, NULL, NULL, 'public', '访客', '00', '', '', '0', '', '$2a$10$E8d4gZ3.QQzDE7LBfY7XpuuGX.LvWFcA982AAdAzk24u91bQ1nete', '0', '0', '', NULL, 'admin', '2021-05-29 08:37:36', 'admin', '2021-06-19 09:31:20', NULL); +INSERT INTO `sys_user` VALUES (101, NULL, NULL, 'aaa', 'xxx', '00', '', '', '0', '', '$2a$10$f.KtWGpaUsdvl2E427/H4OnPi2dYx8HetxnBs1uasSNwCBBUDSwjO', '0', '0', '', NULL, 'admin', '2021-08-26 17:28:34', '', NULL, NULL); +INSERT INTO `sys_user` VALUES (114, NULL, 'oRHbg4lwGVJYu7GjfVwRv6pYygzQ', 'EB5312FB4A26', '微信注册用户', '00', '', '', '0', '', '$2a$10$iWySi4cYQ.0DFSMFCzofbu1H13Dd03WW7h/0OZPzQcBd.7f1fWjV.', '0', '0', '', NULL, '微信小程序', '2021-08-26 18:06:16', '', NULL, NULL); +INSERT INTO `sys_user` VALUES (115, NULL, 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', 'A1BB9722086A', '微信注册用户', '00', '', '', '0', '', '$2a$10$rAoFt5nuPw/2CXhRsa/uoOjExW0XH3xM009kcWWo12rzFiSgIK.n2', '0', '0', '', NULL, '微信小程序', '2021-08-26 18:41:21', '', NULL, NULL); +INSERT INTO `sys_user` VALUES (116, NULL, 'oRHbg4kHhyFV8DPX-wpGREyjfQsM', '6F1B3F33DD38', '微信注册用户', '00', '', '', '0', '', '$2a$10$SUR7vd7YIiMkFBFSTKba7uTc5FdpAdwyMuzUsUpMjkgTC0NfiRpqK', '0', '0', '', NULL, '微信小程序', '2021-08-31 14:47:58', '', NULL, NULL); + +-- ---------------------------- +-- Table structure for sys_user_post +-- ---------------------------- +DROP TABLE IF EXISTS `sys_user_post`; +CREATE TABLE `sys_user_post` ( + `user_id` bigint(0) NOT NULL COMMENT '用户ID', + `post_id` bigint(0) NOT NULL COMMENT '岗位ID', + PRIMARY KEY (`user_id`, `post_id`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '用户与岗位关联表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_user_post +-- ---------------------------- +INSERT INTO `sys_user_post` VALUES (1, 1); +INSERT INTO `sys_user_post` VALUES (2, 2); + +-- ---------------------------- +-- Table structure for sys_user_role +-- ---------------------------- +DROP TABLE IF EXISTS `sys_user_role`; +CREATE TABLE `sys_user_role` ( + `user_id` bigint(0) NOT NULL COMMENT '用户ID', + `role_id` bigint(0) NOT NULL COMMENT '角色ID', + PRIMARY KEY (`user_id`, `role_id`) USING BTREE +) ENGINE = InnoDB CHARACTER SET = utf8 COLLATE = utf8_general_ci COMMENT = '用户和角色关联表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of sys_user_role +-- ---------------------------- +INSERT INTO `sys_user_role` VALUES (1, 1); +INSERT INTO `sys_user_role` VALUES (2, 100); +INSERT INTO `sys_user_role` VALUES (100, 100); +INSERT INTO `sys_user_role` VALUES (101, 101); + +-- ---------------------------- +-- Table structure for t_user_account_info +-- ---------------------------- +DROP TABLE IF EXISTS `t_user_account_info`; +CREATE TABLE `t_user_account_info` ( + `id` int(0) NOT NULL AUTO_INCREMENT, + `sessionKey` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT 'sessionKey', + `access_token` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT 'accessToken', + `open_id` varchar(50) CHARACTER SET utf8 COLLATE utf8_unicode_ci NOT NULL, + `union_id` varchar(50) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL, + `nick_name` varchar(255) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NULL DEFAULT NULL COMMENT '昵称', + `avatar` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '头像', + `phone` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '手机号', + `birthday` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '生日', + `status` int(0) NOT NULL DEFAULT 1 COMMENT '用户状态：0-冻结，1-正常', + `country` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '国家', + `province` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '省份', + `city` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '城市', + `address` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL COMMENT '地址', + `user_type` int(0) NOT NULL DEFAULT 0 COMMENT '用户类型：0-未授权用户，1-消费者，2-商家', + `admin_id` int(0) NULL DEFAULT NULL COMMENT '绑定的管理员编号', + `last_login_time` timestamp(0) NOT NULL DEFAULT CURRENT_TIMESTAMP(0), + `last_login_ip` varchar(255) CHARACTER SET utf8 COLLATE utf8_unicode_ci NULL DEFAULT NULL, + `gmt_time` timestamp(0) NOT NULL DEFAULT CURRENT_TIMESTAMP(0), + `gmt_update` timestamp(0) NOT NULL DEFAULT CURRENT_TIMESTAMP(0) ON UPDATE CURRENT_TIMESTAMP(0), + PRIMARY KEY (`id`) USING BTREE, + UNIQUE INDEX `open_id`(`open_id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 200030 CHARACTER SET = utf8 COLLATE = utf8_unicode_ci COMMENT = '小程序用户表' ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of t_user_account_info +-- ---------------------------- +INSERT INTO `t_user_account_info` VALUES (200029, 'wd4/hPuBQ+ummo/NOv1Rsw==', 'ced50c3733424484becfa6a68e4066fc', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', NULL, '新注册用户', 'https://c-ssl.duitang.com/uploads/item/201912/27/20191227145714_rtHRc.thumb.1000_0.jpeg', NULL, NULL, 0, NULL, NULL, NULL, NULL, 0, NULL, '2021-08-26 17:02:10', '127.0.0.1', '2021-08-26 16:30:57', '2021-08-26 17:02:08'); + +-- ---------------------------- +-- Table structure for t_user_login_log +-- ---------------------------- +DROP TABLE IF EXISTS `t_user_login_log`; +CREATE TABLE `t_user_login_log` ( + `id` int(0) NOT NULL AUTO_INCREMENT, + `user_type` varchar(255) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NULL DEFAULT NULL COMMENT '用户类型', + `user_id` int(0) NOT NULL, + `code` varchar(50) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NOT NULL, + `open_id` varchar(50) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NOT NULL, + `ip` varchar(30) CHARACTER SET utf8mb4 COLLATE utf8mb4_unicode_ci NULL DEFAULT NULL COMMENT 'IP地址', + `gmt_time` timestamp(0) NULL DEFAULT CURRENT_TIMESTAMP(0), + `gmt_update` timestamp(0) NULL DEFAULT NULL ON UPDATE CURRENT_TIMESTAMP(0), + PRIMARY KEY (`id`) USING BTREE +) ENGINE = InnoDB AUTO_INCREMENT = 1725 CHARACTER SET = utf8mb4 COLLATE = utf8mb4_unicode_ci ROW_FORMAT = Dynamic; + +-- ---------------------------- +-- Records of t_user_login_log +-- ---------------------------- +INSERT INTO `t_user_login_log` VALUES (1718, '未授权用户', 200029, '023mpv0w3w8VXW22mg2w34Vlyj3mpv01', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 16:30:57', NULL); +INSERT INTO `t_user_login_log` VALUES (1719, '未授权用户', 200029, '083hBWkl269zD74Ioxol2Rqaaq0hBWkA', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 16:56:12', NULL); +INSERT INTO `t_user_login_log` VALUES (1720, '未授权用户', 200029, '073d93000npdjM15qS100TtVyj3d930s', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 16:59:18', NULL); +INSERT INTO `t_user_login_log` VALUES (1721, '未授权用户', 200029, '053NjS000cfoiM1siM300P1HhV1NjS0W', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 16:59:42', NULL); +INSERT INTO `t_user_login_log` VALUES (1722, '未授权用户', 200029, '043nlS000U9niM1a6I0007YZCb3nlS0u', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 17:00:07', NULL); +INSERT INTO `t_user_login_log` VALUES (1723, '未授权用户', 200029, '0039Zull2tOZC74R3Pnl2Hpg8l49Zul1', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 17:00:51', NULL); +INSERT INTO `t_user_login_log` VALUES (1724, '未授权用户', 200029, '013pCmFa1E5TDB0fpIIa138qab2pCmFl', 'oRHbg4mTdANmQwDhuQAD8vBbkNG0', '127.0.0.1', '2021-08-26 17:02:08', NULL); + +SET FOREIGN_KEY_CHECKS = 1; From d9c4185983fb28c1caa9907e08ec9a660b75d32b Mon Sep 17 00:00:00 2001 From: yueming Date: Mon, 6 Sep 2021 00:02:30 +0800 Subject: [PATCH 7/9] =?UTF-8?q?=E8=BF=9E=E6=8E=A5=E6=9C=8D=E5=8A=A1?= =?UTF-8?q?=E5=99=A8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../cmsis/startup/startup_stm32f10x_hd.s | 2 +- firmware/stm32-esp/output/pro.hex | 3190 +++++++++-------- firmware/stm32-esp/project/pro.uvgui.LS-PC | 144 +- firmware/stm32-esp/project/pro.uvgui.RJYF-PC | 380 +- firmware/stm32-esp/project/pro.uvopt | 198 +- firmware/stm32-esp/project/pro.uvproj | 49 +- firmware/stm32-esp/user/data/basic_data.c | 6 +- firmware/stm32-esp/user/data/basic_data.h | 14 +- firmware/stm32-esp/user/drive/bsp_timer3.c | 9 +- firmware/stm32-esp/user/drive/bsp_uart2.c | 25 +- firmware/stm32-esp/user/drive/bsp_uart2.h | 2 +- firmware/stm32-esp/user/main.c | 2 +- firmware/stm32-esp/user/mqtt/MQTTConnect.h | 126 - .../stm32-esp/user/mqtt/MQTTConnectClient.c | 181 - .../stm32-esp/user/mqtt/MQTTConnectServer.c | 125 - .../user/mqtt/MQTTDeserializePublish.c | 105 - firmware/stm32-esp/user/mqtt/MQTTFormat.c | 233 -- firmware/stm32-esp/user/mqtt/MQTTFormat.h | 37 - firmware/stm32-esp/user/mqtt/MQTTPacket.c | 365 -- firmware/stm32-esp/user/mqtt/MQTTPacket.h | 116 - firmware/stm32-esp/user/mqtt/MQTTPublish.h | 38 - .../user/mqtt/MQTTSerializePublish.c | 145 - firmware/stm32-esp/user/mqtt/MQTTSubscribe.h | 39 - .../stm32-esp/user/mqtt/MQTTSubscribeClient.c | 118 - .../stm32-esp/user/mqtt/MQTTSubscribeServer.c | 92 - .../stm32-esp/user/mqtt/MQTTUnsubscribe.h | 38 - .../user/mqtt/MQTTUnsubscribeClient.c | 87 - .../user/mqtt/MQTTUnsubscribeServer.c | 83 - firmware/stm32-esp/user/mqtt/StackTrace.h | 61 - firmware/stm32-esp/user/mqtt/mqtt.c | 333 ++ firmware/stm32-esp/user/mqtt/mqtt.h | 56 + firmware/stm32-esp/user/show/dev_work.c | 3 +- firmware/stm32-esp/user/show/esp8266_uart2.c | 109 +- firmware/stm32-esp/user/show/esp8266_uart2.h | 1 + firmware/stm32-esp/user/show/esp8266_work.c | 475 +-- firmware/stm32-esp/user/show/esp8266_work.h | 10 +- 36 files changed, 2748 insertions(+), 4249 deletions(-) delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTConnect.h delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTConnectClient.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTConnectServer.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTFormat.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTFormat.h delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTPacket.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTPacket.h delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTPublish.h delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTSubscribe.h delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c delete mode 100644 firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c delete mode 100644 firmware/stm32-esp/user/mqtt/StackTrace.h create mode 100644 firmware/stm32-esp/user/mqtt/mqtt.c create mode 100644 firmware/stm32-esp/user/mqtt/mqtt.h diff --git a/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s b/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s index adc9b94a..963282d0 100644 --- a/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s +++ b/firmware/stm32-esp/libraries/cmsis/startup/startup_stm32f10x_hd.s @@ -42,7 +42,7 @@ __initial_sp ; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -Heap_Size EQU 0x00000200 +Heap_Size EQU 0x00001000 AREA HEAP, NOINIT, READWRITE, ALIGN=3 __heap_base diff --git a/firmware/stm32-esp/output/pro.hex b/firmware/stm32-esp/output/pro.hex index d50342c6..2f05d555 100644 --- a/firmware/stm32-esp/output/pro.hex +++ b/firmware/stm32-esp/output/pro.hex @@ -1,8 +1,8 @@ :020000040800F2 -:100000009809002045010008311B00082D1B00083D -:100010002F1B00082D1000083135000800000000DB -:10002000000000000000000000000000F91E0008B1 -:100030002F10000800000000E31D00086D300008CC +:10000000982000204501000807210008A51D0008D0 +:100010000521000891100008113B000800000000B5 +:10002000000000000000000000000000C9240008DB +:100030009310000800000000B32300083D360008BC :100040005F0100085F0100085F0100085F01000810 :100050005F0100085F0100085F0100085F01000800 :100060005F0100085F0100085F0100085F010008F0 @@ -10,18 +10,18 @@ :100080005F0100085F0100085F0100085F010008D0 :100090005F0100085F0100085F0100085F010008C0 :1000A0005F0100085F0100085F0100085F010008B0 -:1000B0005F010008C13000085F0100085F0100080F +:1000B0005F010008913600085F0100085F01000839 :1000C0005F0100085F0100085F0100085F01000890 -:1000D0005F01000889320008F13200085933000836 -:1000E000811900085F0100085F0100085F01000836 +:1000D0005F01000865380008CD380008393900088C +:1000E000F91B00085F0100085F0100085F010008BC :1000F0005F0100085F0100085F0100085F01000860 :100100005F0100085F0100085F0100085F0100084F :100110005F0100085F0100085F0100085F0100083F :100120005F0100085F0100085F0100085F0100082F -:10013000DFF80CD000F0C4FB00480047094100087C -:10014000980900200648804706480047FEE7FEE77A +:10013000DFF80CD000F0CCFB00480047E94600088F +:10014000982000200648804706480047FEE7FEE763 :10015000FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE777 -:100160007130000831010008A0F14101192900D8BF +:100160004136000831010008A0F14101192900D8E9 :100170002030704740EA01039B0703D009E008C91B :10018000121F08C0042AFAD203E011F8013B00F85C :10019000013B521EF9D27047D2B201E000F8012BA8 @@ -29,1541 +29,1639 @@ :1001B00004461946FFF7F0FF204610BD30B505464E :1001C0002A460B4612F8010B13F8014B08B1A04266 :1001D000F8D01CB1002802D06D1CF1E7284630BDD4 -:1001E000421C10F8011B0029FBD1801A704730B562 -:1001F00005460020034600E05B1C934205D2EC5C00 -:10020000C85C201A01D1002CF6D130BD2DE9FE4F7B -:10021000804681EA0300C00F0C46009021F00041A7 -:1002200023F00045B8EB0200A94105D24046214623 -:1002300090461C460B46024623F00040104347D030 -:10024000270DC7F30A00C3F30A510290401A019028 -:1002500040286BDAC3F3130040F4801B00989246E9 -:1002600020B10023D2EB030A63EB0B0B0198594634 -:10027000C0F14002504600F0D6F906460D46504601 -:100280005946019A00F0EEF910EB08006141002494 -:1002900087EA115284EAE7731A4340D0009A62B3A6 -:1002A000019A012A4FEA075215DC001B61EB02019B -:1002B0004FF0004202EA0752CDE90042001C41F52E -:1002C000801132462B4600F025FA03B0BDE8F08FCE -:1002D00040462146F9E7001B61EB0201001C41F595 -:1002E000801300185B412018A2F5001747EB0301AB -:1002F00040EAD570B6196D4111E06D084FEA360637 -:1003000045EAC0754FEA0752001B61EB0201001C71 -:1003100041F5801149084FEA300000195141324639 -:100320002B4603B0BDE8F04F00F0E5B9009801227C -:1003300040000023D0EB020263EBE07300982146FB -:100340004FEAE074B8EB000061EB0401E9E783F0E9 -:1003500000435BE781F0004158E72DE9FE4F81EA59 -:10036000030404F0004421F0004100944FF0000B1E -:1003700023F0004350EA01045ED052EA03045BD04C -:10038000C3F30A54C1F30A552C44A4F2F334019484 -:10039000A0FB0254C1F3130141F48011C3F3130312 -:1003A00043F4801301FB024400FB034E840A970AC6 -:1003B00044EA815447EA8357A4FB076802958D0AF3 -:1003C00005FB07854FEA932C04FB0C542705029D7F -:1003D0004FEA065847EA1637B5EB08056EEB070CEF -:1003E000870E920E47EA811742EA8312A7FB0201A9 -:1003F000B6EB0B0164EB00042B0D43EA0C335E18E3 -:1004000044EB1C50DA465146E7FB0201C5F31304E6 -:100410004FEA0B3343EA14534FEA0432019C43EA98 -:100420000603A4F10C040294009CCDE900B400F092 -:1004300071F903B0BDE8F08F00200146F9E770B50F -:1004400021F0004303430CD0C1F30A550024D5EB3F -:10045000040564EB0403D617AD1AB34102DB002098 -:10046000014670BD201841EB025170BD9623002259 -:10047000114600F012B90EB5C10F80EAE0700844D1 -:10048000CA07002140F233438DE80E000A460B46AE -:1004900000F040F903B000BD70B5C1F30A5201F09D -:1004A00000450024C1F3130140F2FF3341F48011F1 -:1004B0009A4201DA002070BD40F233439A42A2F220 -:1004C000334203DC524200F0BDF800E090402C4380 -:1004D000F1D0404270BDC1F30A5210B5C1F313010F -:1004E00040F2FF3341F480119A4201DA002010BD3E -:1004F00040F233439A42A2F2334203DC524200F00C -:10050000A1F810BD904010BD00F0004230F0004056 -:100510000AD0C10D01F56071C0F3160042EA015125 -:10052000C208400711437047002001467047000091 -:1005300030B5041E71F1000404DB4FF0004440426A -:1005400064EB0101141E73F1000405DB1C464FF03F -:100550000043524263EB0403994208BF904230BD0E -:1005600001F0004330B421F0004150EA010206D00E -:100570000A0DA2F56072C1F31301002A02DC30BC3F -:1005800000207047440F44EAC104C100E01830BCA9 -:1005900000EBC25000F078B830B50B4601460020A1 -:1005A0002022012409E021FA02F59D4205D303FA35 -:1005B00002F5491B04FA02F52844151EA2F10102B6 -:1005C000F1DC30BD2DE9F05F0546002092469B46E8 -:1005D00088460646814640241BE028464146474659 -:1005E000224600F02FF853465A46C01A914110D3C4 -:1005F00011461846224600F016F82D1A67EB01083E -:100600004F4622460120002100F00DF817EB0009AB -:100610004E41201EA4F10104DFDC484631462A4643 -:100620004346BDE8F09F202A04DB203A00FA02F19D -:10063000002070479140C2F1200320FA03F31943D0 -:1006400090407047202A04DB203A21FA02F0002172 -:10065000704721FA02F3D040C2F1200291400843D2 -:1006600019467047202A06DBCB17203A41FA02F0E0 -:1006700043EAE07306E041FA02F3D040C2F12002FF -:1006800091400843194670470029A8BF7047401C95 -:10069000490008BF20F00100704710B4B0FA80FC98 -:1006A00000FA0CF050EA010404BF10BC704749B1D5 -:1006B000CCF1200421FA04F411FA0CF118BF012145 -:1006C00021430843A3EB0C01CB1D4FEA00614FEA25 -:1006D000102042BF002010BC704700EBC3501044F4 -:1006E0000029A4BF10BC7047401C490008BF20F07F -:1006F000010010BC704710B5141E73F1000408DA35 -:10070000401C41F1000192185B411A4301D120F0D5 -:10071000010010BD2DE9F04D92469B4611B1B1FA92 -:1007200081F202E0B0FA80F220329046FFF77BFFC0 -:1007300004460F4640EA0A0041EA0B0153465A4676 -:10074000084313D0114653EA010019D0C8F1400202 -:100750005046FFF777FF05460E465046594642463B -:10076000FFF761FF084305D0012004E02046394629 -:10077000BDE8F08D0020054346EAE0762C43374380 -:100780000A986305E40AA0EB08000022FD0A44EA87 -:1007900047540A3002D500200146E9E70105101947 -:1007A0006941DDE9084500196941BDE8F04DA2E75E -:1007B0002DE9F04D81EA030404F0004B21F00045DF -:1007C00014464FF0000A23F0004150EA050220D001 -:1007D00054EA01021DD0C5F30A570246C5F31303BC -:1007E000C1F31300C1F30A5640F4801543F480139B -:1007F000A7EB0608101BD64608F2FD3873EB050080 -:1008000002D308F1010801E092185B41B8F1000F32 -:1008100003DA00200146BDE8F08D00204FF480117E -:10082000064684460EE0171B73EB050705D3121B23 -:1008300063EB050306434CEA010C49084FEA30001C -:1008400092185B4150EA0107EDD152EA030012D041 -:1008500082EA040083EA0501084305D0101BAB417E -:1008600006D20122002306E000224FF0004302E0FE -:100870006FF0010253101AEB06004CEB085110EB1D -:100880000A0041EB0B01BDE8F04DFFF734BFC1F3A7 -:100890000A52C1F3130140F2FF3341F480119A422E -:1008A00002DA00200146704740F233439A42A2F236 -:1008B000334202DC5242FFF7C5BEFFF7B4BE000070 -:1008C000064C074D06E0E06840F0010394E807009D -:1008D00098471034AC42F6D3FFF72EFC486100086D -:1008E000686100082DE9F04D00231A461B1A8A4161 -:1008F00003DB00200146BDE8F08DC1F30A52C1F3CD -:10090000130141F480154FF0000BD10702D10018FC -:100910006D41521E0027044640F2FF11384601EB9C -:10092000620A3E468046024600204FF48011FFF7DF -:1009300089FEC2197141BB1846EB0100B4EB030CF0 -:1009400075EB000C04D3E41A65EB000517460E4660 -:10095000241908F101006D4180463428E3DDF919BE -:1009600046EB0600091BA84103D24FF0FF321346A5 -:1009700001E0002213461BEB070046EB0A51BDE8DD -:10098000F04DFFF7B8BE002904D0816841F00101A5 -:1009900081607047816821F001018160704700002B -:1009A00010B5154988420AD144150121204601F0AD -:1009B0003FFA2046BDE81040002101F039BA0F4946 -:1009C00088420AD104150121204601F031FA20465F -:1009D000BDE81040002101F02BBA094988420AD134 -:1009E0000121CC03204601F023FA2046BDE8104047 -:1009F000002101F01DBA10BD002401400028014073 -:100A0000003C0140014600208968490700D50120CB -:100A10007047C06C80B270470246002012680A42DC -:100A200000D001207047014600208968090700D5E1 -:100A30000120704770B500240025194E01220723BC -:100A40001146304600F054F80121304600F08FF88E -:100A500002213046FFF7E0FF0028F9D03046FFF7CB -:100A6000D8FF0544022000F0E3FA641CE4B2052C30 -:100A7000E4D30520B5FBF0F0FFF7F8FCFFF744FDE9 -:100A80004FF06632074BFFF768FC6FF00B02FFF781 -:100A9000D6FC0122FFF7D3FCBDE87040FFF760BD34 -:100AA0000024014066660A4010B542680E4B1A40A9 -:100AB0000C790B6842EA04221343436082680B4BB3 -:100AC0001A40D1E9024323434C7942EA44021343DA -:100AD0008360C26A22F47002097C491EC9B242EAEC -:100AE0000151C16210BD0000FFFEF0FFFDF7F1FFF4 -:100AF00070B5072609290AD9C568A1F10A0404EBD3 -:100B00004404A640B543A3401D43C56007E0056902 -:100B100001EB4104A640B543A3401D4305611F23DB -:100B2000072A09D2446B521E02EB820293409C4377 -:100B300091400C43446370BD0D2A09D2046BD21F4F -:100B400002EB820293409C4391400C43046370BDCE -:100B5000C46A0D3A02EB820293409C4391400C43DD -:100B6000C46270BD816841F008018160704700294E -:100B700004D0816841F4A00181607047816821F44C -:100B8000A00181607047816841F004018160704775 -:100B900030B587B001214FF4017001F03BF94FF4FB -:100BA000004001F01FF90220ADF8040000248DF888 -:100BB000074001A9184800F05BFF184D2846FFF7D1 -:100BC000EFFE02948DF80C408DF80D404FF460213B -:100BD0000491059401218DF8181002A92846FFF709 -:100BE00063FF01212846FFF7CEFE2846FFF7BAFF34 -:100BF0002846FFF718FF0028FAD12846FFF7C3FF61 -:100C00002846FFF7FFFE0028FAD101212846FFF70A -:100C1000AEFF07B030BD00000008014000240140D5 -:100C200010B56FF0040002F013FA09480949006892 -:100C3000B0FBF1F00849C0B2087000EB4002C2EB13 -:100C4000C0104FF6FF7202EAC000488010BD0000DD -:100C50000000002000127A00280000202DE9FF414A -:100C60000121182001F0D6F80121084601F0D2F840 -:100C700043F20200ADF80C0010208DF80F000320A5 -:100C80008DF80E00244C03A9204600F0F1FE02214D -:100C9000204600F047FF6114204600F043FFA114F6 -:100CA000204600F03FFF4FF4C040ADF80C00482054 -:100CB0008DF80F00194F03A9384600F0D9FE4FF404 -:100CC000C06000F069FF28248DF8004000258DF8F1 -:100CD00001508DF8025001268DF80360684600F03F -:100CE00029FFF003ADF80C008DF80F4003A938463A -:100CF00000F0BEFE0F21022000F0A6FE01948DF848 -:100D0000085008208DF809008DF80A6001A800F04D -:100D100061FEBDE8FF810000000C014000100140B1 -:100D2000012080F3138805480168054A01F4E06159 -:100D300011430160BFF34F8FFEE700000CED00E0B0 -:100D40000400FA057FB50121022001F055F80920C1 -:100D5000ADF8080041F61F40ADF804000024ADF8DE -:100D60000A40ADF806400E4D01A9284602F03EFAB1 -:100D700001224121284602F02EFA1D218DF8001093 -:100D80008DF8014003218DF8021001218DF8031028 -:100D9000684600F0CFFE0121284602F004FA7FBD2C -:100DA00000040040F0B587B006460121480401F078 -:100DB00023F80121042001F02DF80424ADF8184097 -:100DC00003258DF81A5018218DF81B101E4F06A907 -:100DD000384600F04DFE0821ADF818108DF81B4084 -:100DE00006A9384600F044FE4FF4A06000F0D4FE9F -:100DF00026218DF804108DF8055002208DF806008C -:100E000001208DF8070001A800F094FE0296002052 -:100E1000ADF80C00ADF80E00ADF81000ADF8140000 -:100E20000C20ADF81200094C02A9204602F01AFB72 -:100E3000012240F22551204602F0F9FA0121204614 -:100E400002F0C2FA07B0F0BD0008014000440040C3 -:100E500070B586B005460121880400F0CDFF012160 -:100E6000082000F0D7FF4FF48060ADF81400032491 -:100E70008DF8164018218DF817101F4E05A9304621 -:100E800000F0F6FDF114ADF8141004218DF81710E0 -:100E900005A9304600F0ECFD4FF4A06000F07CFEA8 -:100EA00027208DF800008DF801408DF802400120C8 -:100EB0008DF80300684600F03DFE01950020ADF876 -:100EC0000800ADF80A00ADF80C00ADF810000C20D9 -:100ED000ADF80E00094C01A9204602F0C3FA012228 -:100EE00040F22551204602F0A2FA0121204602F0EC -:100EF0006BFA06B070BD0000000C014000480040D5 -:100F00002DE9F04105460F4600240C4E0BE0402130 -:100F1000304602F065FA0028F9D0295D304602F02B -:100F200003FB641CA4B2BC42F1D34021304602F062 -:100F300057FA0028F9D0BDE8F081000000480040D1 -:100F400070B54FF400512C4800F0E5FD2B4C002506 -:100F5000A8B1A572A089B0F5967F4BD3A07864287C -:100F600001D2401CA070FFF765FD606024498842F3 -:100F70003EDD2449884205DD6420607239E00120AD -:100F8000A072E7E72049884202DD5A20607230E013 -:100F90001E49884202DB502060722AE01C498842C8 -:100FA00002DB4620607224E01A49884202DD3C20C0 -:100FB00060721EE01849884202DD3220607218E03B -:100FC0001649884202DD2820607212E014498842E6 -:100FD00002DB1E2060720CE01249884202DB142002 -:100FE000607206E01049884203DB0A20607200E06C -:100FF0006572A58170BD000000100140D401002081 -:10100000B81E6540B81E85405C8F82407B147E40D0 -:101010009A9979408FC275405C8F7240D7A3704017 -:1010200052B86E40A4706D409A996940FEE77047CF -:101030000B49498848434FF0E021486100238B6108 -:10104000086940F0010008610869C20701D0C003C7 -:10105000FAD5086920F0010008618B617047000033 -:10106000280000200B49097848434FF0E0214861EF -:1010700000238B61086940F0010008610869C2071C -:1010800001D0C003FAD5086920F0010008618B6126 -:1010900070470000280000202DE9F0412B4C01276B -:1010A000FD03207D2A4E4FF00208002816D1294664 -:1010B000304600F030FD80B1C820FFF7B9FF294667 -:1010C000304600F028FD48B12946304600F023FDA7 -:1010D0000028F9D184F8158000E06775207D01288B -:1010E00014D12946304600F016FD78B1C820FFF72C -:1010F0009FFF2946304600F00EFD38B129463046A4 -:1011000000F009FD0028F9D184F81580207D02281F -:1011100017D12946304600F0FEFC002811D0C82027 -:10112000FFF786FF2946304600F0F5FC002808D07E -:101130002946304600F0EFFC0028F9D1A07A10B122 -:101140006775BDE8F08103206075FAE7D4010020DF -:10115000001001402DE9F0412B4C207D627D904232 -:101160004FD001273E03294D022A10D1314628468F -:1011700000F0D8FC00F01CFF227D62B13146284609 -:1011800000F0D2FCA77500F0F3FD02202075607D11 -:10119000012803D01EE001F099F8F3E70221284668 -:1011A00000F0C0FC3146284600F0BCFC227D12B1A4 -:1011B000022A03D00DE001F089F80AE0002001F0D6 -:1011C00001FB01F083F8002020723146284600F030 -:1011D000ABFC2775607D032813D14FF47A70FFF7BD -:1011E00027FF0221284600F09DFC3146284600F0EA -:1011F00099FC4FF40051284600F094FC0320207520 -:10120000FEE7BDE8F0810000D4010020000C0140A1 -:101210000FB4F0B5B3B0C82101A8FEF7C4FF002495 -:1012200039AA01A8389902F099F90020009001A884 -:10123000FEF7D6FF86B20D4F01AD0BE040213846D8 -:1012400002F0CEF80028F9D0295D384602F06CF99A -:10125000641CA4B2B442F1D34021384602F0C0F875 -:101260000028F9D033B0F0BC5DF814FB0044004016 -:1012700070B590B005460E463C2101A8FEF793FFDD -:101280004FF4E130FFF78EFD4FF47A742046FFF7FC -:10129000CFFE2046FFF7CCFE09E000F0DFF9C822C0 -:1012A00039A13AA000F006FB2046FFF7C1FEC82294 -:1012B00035A13AA000F0FEFA0028EED1C82232A1F2 -:1012C00037A000F0F7FA0028F8D1C8222EA136A0E6 -:1012D00000F0F0FA0028F8D10A20FFF7A9FEC82292 -:1012E00029A137A000F0E6FA0028F8D1C82226A1EB -:1012F00036A000F0DFFA0028F8D12046FFF798FE6C -:101300002046FFF795FE2046FFF792FE2046FFF7A6 -:101310008FFE3C2101A8FEF746FF33462A462DA149 -:1013200001A802F007F9224617A101A800F0C2FAAD -:101330000028F8D1C82214A12CA000F0BBFA002884 -:10134000F8D14FF4FA7422460FA12BA000F0B2FAA4 -:101350000028F8D14FF4967422460BA133A000F078 -:10136000A9FA0028F8D1C82207A134A000F0A2FAF7 -:101370000028F8D13449088064213448FEF713FF6F -:1013800010B0002070BD00004F4B000041542B43B3 -:1013900049504D4F44453D3000000000415400008D -:1013A000415445300000000041542B554152543DFA -:1013B0003131353230302C382C312C302C3000008B -:1013C00041542B43574D4F44453D320041542B521D -:1013D0005354000041542B43575341503D22257331 -:1013E000222C222573222C312C34000041542B4313 -:1013F00049504D55583D300041542B4349505354AA -:101400004152543D22554450222C223235352E3241 -:1014100035352E3235352E323535222C36303135B4 -:10142000362C34323235342C3000000041542B43FA -:1014300049504D4F44453D310000000041542B437D -:10144000495053454E440000360000200C01002056 -:1014500001460020054A1288130406D5044BC2F346 -:101460000E0298541846FEF7A9BE704736000020B9 -:101470000C0100202DE9F041324D288800045FD591 -:10148000314C0026207802283ED1304A10787B2843 -:101490003AD1A6802E4BA088115C19547D2902D028 -:1014A000401CA080F7E72A4802F0AAFDE06000286F -:1014B00040D028A1274602F085FD01468069C96910 -:1014C000FFF709F8B860A0F56A41FC3915D123A1EE -:1014D000F86802F077FD02691D4822A1283802F061 -:1014E00029F821A1F86802F06DFD026918481DA1D4 -:1014F000143802F01FF803203870F86802F03EFD3F -:1015000064211348FEF74FFE20780A2818D12A7864 -:1015100062700F480D496430FEF72CFE64210B48C1 -:10152000FEF741FE2E80BDE8F041094811A164306C -:10153000FEF744BE64210548FEF735FE0F480680DD -:10154000BDE8F081360000203C0000200C010020A6 -:1015500028020020706F72740000000073736964C9 -:10156000000000002573000070617373776F726470 -:1015700000000000434C4F53454400003800002059 -:1015800010B5174C2078012811D0022816D0032856 -:101590001FD004280AD100F019F91249A1F1140052 -:1015A00000F094F80028F8D10520207010BD0EA19D -:1015B00010A0FFF75DFE0220207010BD124C608A63 -:1015C000B0F5FA6FF9D311A000F0A8F900206082FD -:1015D00010BD17A000F0A2F90420207010BD00007B -:1015E0003C00002014020020617364717765393873 -:1015F000363700005869616F59695F494F545F4140 -:101600006972426F78000000D40100207B22636F72 -:101610006465223A2230222C226D7367223A2273AB -:101620007461727420636F6E6E656374227D000056 -:101630007B22636F6465223A2231222C226D73670C -:10164000223A2267657457696669496E666F3A7314 -:10165000756363657373227D0000000010B5184C3C -:101660004021204601F0BCFE0028F9D02B21204665 -:1016700001F05AFF0F20FFF7DBFC4021204601F06C -:10168000AFFE0028F9D02B21204601F04DFF0F209E -:10169000FFF7CEFC4021204601F0A2FE0028F9D041 -:1016A0002B21204601F040FF4FF4FA70FFF7C0FCF9 -:1016B000BDE81040142203A103A000F0FBB8000015 -:1016C000004400404F4B00004154000030B58FB043 -:1016D00004460D463C216846FEF765FD3C21684600 -:1016E000FEF761FD2B46224618A1684601F022FF55 -:1016F00064221BA1684600F0DDF810B101200FB094 -:1017000030BDC82219A11AA000F0D4F80028F8D1E1 -:10171000C82216A119A000F0CDF80028F8D1C822DF -:1017200012A121A000F0C6F80028F8D114220FA1C0 -:1017300021A000F0BFF80028F8D1224908806421D8 -:101740002148FEF730FD0020D9E7000041542B432B -:10175000574A41503D222573222C22257322000036 -:101760005749464920474F54204950004F4B0000ED -:1017700041542B4349504D55583D300041542B4363 -:10178000495053544152543D22554450222C223149 -:1017900039322E3136382E312E36222C383038362A -:1017A0002C383038362C300041542B4349504D4FA3 -:1017B00044453D310000000041542B4349505345FE -:1017C0004E440000360000200C01002070B54FF49C -:1017D000E130FFF7E7FA4FF47A742046FFF728FC70 -:1017E0002046FFF725FC4FF4487509E0FFF736FF68 -:1017F000C8221DA11DA000F05DF82846FFF718FCC7 -:10180000C82219A11DA000F055F80028EED1C82269 -:1018100015A11BA000F04EF80028F8D1C82212A193 -:1018200019A000F047F80028F8D10A20FFF700FCC3 -:10183000C8220DA11AA000F03DF80028F8D1C82256 -:1018400009A11AA000F036F80028F8D12046FFF7C9 -:10185000EFFB2046FFF7ECFB2046FFF7E9FB2046B5 -:10186000FFF7E6FB012070BD4F4B000041542B43B6 -:1018700049504D4F44453D300000000041540000A8 -:10188000415445300000000041542B554152543D15 -:101890003131353230302C382C312C302C300000A6 -:1018A00041542B43574D4F44453D310041542B5239 -:1018B000535400002DE9F04180460F461446134D65 -:1018C00000262E8064211248FEF76DFC414611A0CF -:1018D000FFF79EFCC7B18CB916E00A20FFF7A8FB02 -:1018E000288800040AD53846FFF7B2FD18B12E80CB -:1018F0000020BDE8F0812E800120FAE7641E240458 -:10190000240CEAD10120F4E70120F2E736000020A0 -:101910000C01002025730D0A000000000FB4F0B583 -:10192000B3B0C82101A8FEF73EFC002439AA01A8E3 -:10193000389901F013FE0020009001A8FEF750FC3A -:1019400086B20E4F01AD0BE04021384601F048FD54 -:101950000028F9D0295D384601F0E6FD641CA4B2E8 -:10196000B442F1D34021384601F03AFD0028F9D0C5 -:1019700033B00020F0BC5DF814FB000000440040D0 -:1019800010B54FF40044204600F014F8002808D0A9 -:10199000204600F009F80348007D002801D1FFF738 -:1019A000BFF910BDD4010020014908607047000054 -:1019B0001404014001460020054A12680A40044B05 -:1019C00014331B680B4202D0002A00D0012070475C -:1019D0000004014030B51B4A83790168002B2AD0EE -:1019E00013688B431360111D0B680468A3430B60DD -:1019F000017911440B68046823430B60114C0834CF -:101A00002168036899432160231D19680568A9436B -:101A100019604179102905D011440A680068024311 -:101A20000A6030BD216802681143216019680068AE -:101A30000143196030BD0079104402688A43026096 -:101A400030BD00000004014010B58A07120F0F23BB -:101A5000934021F00304054921448C689C438C6029 -:101A60008B68904003438B6010BD00000000014074 -:101A70002DE9F0410022CC7804F00F03E40601D5F3 -:101A80008C7823430C784FF00F0714F0FF0F4FF0C2 -:101A9000010C1CD005680CFA02F40E882640A64200 -:101AA00011D1960007FA06F825EA080503FA06F8A8 -:101AB00048EA0505CE78282E02D0482E02D002E052 -:101AC000446100E00461521C082AE4D305600A88DE -:101AD000FF2A1ED94568002202F108060CFA06F416 -:101AE0000E882640A64210D1960007FA06F825EA8D -:101AF000080503FA06F848EA0505CE78282E00D135 -:101B00004461CE78482E00D10461521C082AE3D3E8 -:101B10004560BDE8F0810246002092680A4200D08C -:101B2000012070474161704701617047FEE7FEE7A1 -:101B30007047000070B50F23C27801260178002A93 -:101B40001ED0144A126802F4E062C2F5E062120A82 -:101B5000C2F10404D3404578A54082781A402A4354 -:101B6000120101F1E02181F80024007800F01F014A -:101B70008E404009800000F1E020C0F8006170BD97 -:101B800001F01F0086404809800000F1E020C0F805 -:101B9000806170BD0CED00E0024908430249086015 -:101BA000704700000000FA050CED00E010B50021C0 -:101BB000002400220378422B10D143784D2B0DD105 -:101BC000435C1A4492B2491CC9B21E29F8D3C17FA2 -:101BD000807F01EB0020904200D1FF24204610BD01 -:101BE0002DE9F0475E4C5F4D4FF000062088000461 -:101BF00019D55D48FFF7DAFFFF280FD15A48417920 -:101C0000027901EB0221A984C179827901EB0221D9 -:101C1000E984417A007A01EB00202885268064213E -:101C20005148FEF7C0FA288AB0F5FA6F03D3E220D4 -:101C300000F0AEF82E82E98BA88C6427DFF82C81A7 -:101C40000A266FF0130A4FF48279814228D0B8F83F -:101C500000100AEB9104B0FBF7F0C2B204F10800E7 -:101C600080B21032494600F00FFFA88CB0FBF6F0AE -:101C7000B0FBF6F106FB110204F1100080B2103245 -:101C8000494600F001FFA88CB0FBF6F106FB1102FB -:101C90001834A0B21032494600F0F6FEA88CE88352 -:101CA000298CE88C81422AD0B8F800100AEB510444 -:101CB0004FF0500AB0FBF7F0C2B204F1080080B256 -:101CC0001032514600F0E0FEE88CB0FBF6F0B0FBBD -:101CD000F6F106FB110204F1100080B210325146F9 -:101CE00000F0D2FEE88CB0FBF6F106FB11021834CE -:101CF000A0B21032514600F0C7FEE88C2884288D2F -:101D0000698C88422AD0B8F80010890801EB410498 -:101D1000103CB0FBF7F0C2B204F1080080B2103200 -:101D2000494600F0B1FE288DB0FBF6F0B0FBF6F1AD -:101D300006FB110204F1100080B21032494600F097 -:101D4000A3FE288DB0FBF6F106FB11021834A0B2F9 -:101D50001032494600F098FE288D6884BDE8F0876F -:101D600038000020D4010020700100208C030020E6 -:101D700010B54FF41650FFF76BF802210348FFF738 -:101D8000D3FEBDE810401420FFF752B9000C01400B -:101D900030B585B00546002414216846FEF703FAE5 -:101DA000002142228DF800204D228DF801208DF86F -:101DB000025000208DF803008DF804006846425C54 -:101DC000224494B2491CC9B20529F8D3200A8DF8DF -:101DD00005008DF8064007216846FFF791F805B029 -:101DE00030BD7047034A516821F4404101435160BE -:101DF0007047000000100240054A002903D0D16955 -:101E00000143D1617047D1698143D16170470000BE -:101E100000100240054A002903D0916901439161F5 -:101E20007047916981439161704700000010024042 -:101E3000054A002903D0D1680143D1607047D168B9 -:101E40008143D160704700000010024010B5264A5F -:101E5000516801F00C01254B002927D0042927D017 -:101E6000082927D00360516801F0F0010909204BCF -:101E70005C5C0168E1404160546804F4E064240A59 -:101E80001C5D21FA04F48460546804F46054E40A8C -:101E90001B5DD940C160526802F44042920B144B62 -:101EA0001B1F9A5CB1FBF2F1016110BD0360DAE720 -:101EB0000360D8E7516801F47011536803F480336C -:101EC000022404EB914133B153689B0307D5094BBE -:101ED00059430160C7E7074B59430160C3E7034B10 -:101EE00059430160BFE700000010024000127A0071 -:101EF0001800002000093D00704700F001B8000004 -:101F00000CB50022019200922748016841F480310B -:101F100001604FF4A063016801F400310091019960 -:101F2000491C0191009911B901999942F3D10168B5 -:101F3000890302D50121009100E000920099012956 -:101F400030D11A490A6842F010020A600A6822F089 -:101F500003020A600A6842F002020A6041684160B6 -:101F600041684160416841F480614160416821F409 -:101F70007C114160416841F4E8114160016841F021 -:101F80008071016001688901FCD5416821F003017D -:101F90004160416841F0020141604168C1F3810143 -:101FA0000229FAD10CBD00000010024000200240BE -:101FB0002DE9F0412D4C2088400861880325B1FBB4 -:101FC000F5F10A3189B22A4E47F6FF7232805A2360 -:101FD000642200F0B1FC2088800800EB400061889A -:101FE0000627B1FBF7F2B1FBF5F102EB410189B233 -:101FF0004FF6E07232802D23322200F09DFC2088C3 -:1020000080086188B1FBF7F2B1FBF5F102EB410109 -:1020100089B248F21F4232802D23322200F08CFC1C -:1020200020886FF0170101EB500080B2282100F0EA -:1020300004FF20886FF0130505EB500080B2B42137 -:1020400000F020FF208805EB900080B2E6252946AD -:1020500000F0CEFE2088800800EB4000103880B2EF -:102060002946BDE8F04100F0A5BE00008C03002029 -:102070004E0000202DE9F041914FF889B0F5FA7F2C -:102080007BD3B878022878D300243846B97A007D0B -:10209000012903D110B14FF4FC6403E0022801D1FF -:1020A0004FF6FF74787A397A002688427ED0DFF8BE -:1020B000148250282ED3A8F800400C242346CD22A9 -:1020C0002146CA2000F0DEFB641CE4B2132CF5D3D9 -:1020D0000C242346D2222146CF2000F0D3FB641CDF -:1020E000E4B2132CF5D30C242346D7222146D42066 -:1020F00000F0C8FB641CE4B2132CF5D30C24234677 -:10210000DC222146D92000F0BDFB641CE4B2132C74 -:10211000F5D3CAE03C2831D3A8F800600C252B4643 -:10212000CD222946CA2000F0ADFB6D1CEDB2132D67 -:10213000F5D3A8F800400C242346D2222146CF2014 -:1021400000F0A0FB641CE4B2132CF5D30C2423464E -:10215000D7222146D42000F095FB641CE4B2132C56 -:10216000F5D30C242346DC222146D92000F08AFB3B -:10217000641CE4B2132CF5D397E09EE0282832D3F8 -:10218000A8F800600C252B46CD222946CA2000F075 -:1021900079FB6D1CEDB2132DF5D30C252B46D22205 -:1021A0002946CF2000F06EFB6D1C00E084E0EDB20C -:1021B000132DF3D3A8F800400C242346D722214640 -:1021C000D42000F05FFB641CE4B2132CF5D30C2484 -:1021D0002346DC222146D92000F054FB641CE4B2E3 -:1021E000132CF5D361E0142830D3A8F800600C2537 -:1021F0002B46CD222946CA2000F044FB6D1CEDB2CF -:10220000132DF5D30C252B46D2222946CF2000F0E2 -:1022100039FB6D1CEDB2132DF5D30C252B46D722BF -:102220002946D42000F02EFB6D1CEDB2132DF5D302 -:10223000A8F800400C242346DC222146D92000F0D7 -:1022400021FB641CE4B2132CF5D32EE068B3A8F88C -:1022500000600C242346CD222146CA2000F012FB48 -:10226000641CE4B2132CF5D30C242346D22221465D -:10227000CF2000F007FB641CE4B2132CF5D30C2430 -:102280002346D7222146D42000F0FCFA641CE4B295 -:10229000132CF5D30C242346DC222146D92000F050 -:1022A000F1FA641CE4B2132CF5D34FF480510648C4 -:1022B000FFF73AFC787A3872FE81BDE8F0810000C1 -:1022C000D40100204E000020000C014010B5184938 -:1022D0004FF6FF7008800923DE221946C82000F05F -:1022E000D1FA1523DE221946C82000F0CBFAC82205 -:1022F00015230921104600F0C5FADE221523092115 -:10230000104600F0BFFA0D23C8221946C52000F080 -:10231000B9FAC52211230D21104600F0B3FA11239A -:10232000C822BDE810401946C52000F0ABBA000035 -:102330004E00002070B5404D288BB0F5FA6F7AD36F -:102340000024A87D3D49002647F6FF72012808D0E9 -:10235000022814D0032821D004282ED005283BD0F1 -:1023600068E00A80234620222146002000F08AFAF5 -:10237000641CE4B20D2CF5D30220A8755AE00A8043 -:102380000F24234618222146002000F07BFA641C0B -:10239000E4B21C2CF5D30320A8754BE00A801E2460 -:1023A000234610222146002000F06CFA641CE4B29F -:1023B0002B2CF5D30420A8753CE00A802D2423465D -:1023C00008222146002000F05DFA641CE4B23A2C99 -:1023D000F5D30520A8752DE00E8023462022214646 -:1023E000002000F04FFA641CE4B20D2CF5D30F244A -:1023F000234618222146002000F044FA641CE4B26F -:102400001C2CF5D31E24234610222146002000F068 -:1024100039FA641CE4B22B2CF5D32D242346082270 -:102420002146002000F02EFA641CE4B23A2CF5D3C9 -:102430000120A8752E8370BDD40100204E0000201D -:1024400010B5112000F044FD1420FEF7F1FDD0205E -:1024500000F03EFD072000F05DFD422000F05AFD37 -:102460001D2000F057FDD12000F032FD002000F0CB -:1024700051FD1A2000F04EFD092000F04BFDD22046 -:1024800000F026FD012000F045FD222000F042FD75 -:10249000C02000F01DFD102000F03CFD3B2000F0AE -:1024A00039FD002000F036FD022000F033FD112040 -:1024B00000F030FDC52000F00BFD032000F02AFDE8 -:1024C000C82000F005FD002000F024FD252000F0CC -:1024D00021FD212000F01EFD052000F01BFD002045 -:1024E00000F018FD0A2000F015FD652000F012FD37 -:1024F000252000F00FFD772000F00CFD502000F0AB -:1025000009FD0F2000F006FD002000F003FDF8207B -:1025100000F0DEFC012000F0FDFCFE2000F0D8FC05 -:10252000002000F0F7FC022000F0F4FC202000F076 -:10253000CFFC362000F0CCFC082000F0EBFC3A2069 -:1025400000F0C6FC552000F0E5FC2B2000F0C0FC9C -:10255000002000F0DFFC002000F0DCFC012000F097 -:10256000D9FC3F2000F0D6FC2A2000F0B1FC00206E -:1025700000F0D0FC002000F0CDFC012000F0CAFCEF -:10258000DF2000F0C7FC7820FEF752FDBDE81040C8 -:10259000292000F09DBC10B5CF2000F099FC002050 -:1025A00000F0B8FCC12000F0B5FC302000F0B2FC17 -:1025B000ED2000F08DFC642000F0ACFC032000F066 -:1025C000A9FC122000F0A6FC812000F0A3FCE8206A -:1025D00000F07EFC852000F09DFC102000F09AFCAD -:1025E0007A2000F097FCCB2000F072FC392000F03C -:1025F00091FC2C2000F08EFC002000F08BFC34209D -:1026000000F088FC022000F085FCF72000F060FC60 -:10261000202000F07FFCEA2000F05AFC002000F0AF -:1026200079FC002000F076FCC02000F051FC1B205B -:1026300000F070FCC12000F04BFC012000F06AFCAF -:10264000C52000F045FC302000F064FC302000F094 -:1026500061FCC72000F03CFCB72000F05BFC36209A -:1026600000F036FC482000F055FC3A2000F030FC29 -:10267000552000F04FFCB12000F02AFC002000F0B3 -:1026800049FC1A2000F046FCB62000F021FC0A208C -:1026900000F040FCA22000F03DFCF22000F018FC0D -:1026A000002000F037FC262000F012FC012000F092 -:1026B00031FCE02000F00CFC0F2000F02BFC2A2065 -:1026C00000F028FC282000F025FC082000F022FC67 -:1026D0000E2000F01FFC082000F01CFC542000F02D -:1026E00019FCA92000F016FC432000F013FC0A207E -:1026F00000F010FC0F2000F00DFC002000F00AFCA0 -:10270000002000F007FC002000F004FC002000F096 -:1027100001FCE12000F0DCFB002000F0FBFB1520B9 -:1027200000F0F8FB172000F0F5FB072000F0F2FBAB -:10273000112000F0EFFB062000F0ECFB2B2000F056 -:10274000E9FB562000F0E6FB3C2000F0E3FB05200F -:1027500000F0E0FB102000F0DDFB0F2000F0DAFBC2 -:102760003F2000F0D7FB3F2000F0D4FB0F2000F00B -:10277000D1FB2B2000F0ACFB002000F0CBFB0020B5 -:1027800000F0C8FB012000F0C5FB3F2000F0C2FBB9 -:102790002A2000F09DFB002000F0BCFB002000F090 -:1027A000B9FB002000F0B6FBEF2000F0B3FB1120D6 -:1027B00000F08EFB7820FEF73BFCBDE8104029209E -:1027C00000F086BB70B5064600240948018845889C -:1027D0004D430021084600F077FA00F0BDFB03E00E -:1027E000304600F097FB641CAC42F9D370BD00008A -:1027F0008C0300202DE9F003214A2C272A252B26C3 -:1028000091884FF0F00C49F241384FF4A07446F62D -:10281000040300280CD0994227D001209071148025 -:10282000A2F802C0414516D1D771157256721CE04C -:1028300000209071A2F800C05480414501D0994217 -:1028400013D1D7711572567299420ED114804FF47C -:10285000F070508009E02220A1F50943893B09D09E -:10286000D0712120107220205072BDE8F0030020AA -:1028700000F07CB9D0714F2010724E205072F4E7F6 -:102880008C0300202DE9FE4F4FF0000B00250026A1 -:10289000171AA3EB010881468A46681E002F03DD44 -:1028A0004FF00101019107E003D14FF000010191C8 -:1028B00002E00190C7F10007B8F1000F03DD4FF00F -:1028C0000100009007E003D14FF00000009002E00B -:1028D0000090C8F10008474501DD3C4600E0444651 -:1028E000601C029015E01FFA8AF11FFA89F000F0CF -:1028F00015F83D444644A54202DD2D1B0198814454 -:10290000A64202DD361B009882440BF1010B1FFA30 -:102910008BFB02988345E6DDBDE8FE8F10B500F025 -:10292000D3F900F019FB03484088BDE8104000F0DF -:10293000F1BA00004C0000202DE9FC5F80468B4678 -:1029400017469A4229D302FB02FA5B430093ABEB92 -:10295000070085B20BEB070001901BE0A8EB070016 -:1029600084B208EB0709A5EB0B060FE0A4EB080007 -:10297000404306FB0600504506D80099884203D91B -:1029800029462046FFF7CAFF641CA4B2A145EDD832 -:102990006D1CADB20198A842E0D8BDE8FC9F0000D4 -:1029A000F8B501211C20FFF735FA4FF47070ADF82F -:1029B000000010208DF8030003208DF80200694606 -:1029C0002F48FFF755F82E484FF400711030016082 -:1029D00040210160802101608115016000F0FAFA58 -:1029E0003220FEF725FB3220FEF722FB254C46F66F -:1029F000040649F24135A088FF2806D3A0F57F419F -:102A0000FF3902D0B0F5134F29D1D32000F060FA7E -:102A100000F08CF800F08AF800F088F80002A0803E -:102A200000F084F8A188C0B20843A080A84210D06A -:102A3000BF2000F04DFA00F079F800F077F800F0D0 -:102A400075F80002A08000F071F8A188C0B20843B8 -:102A5000A080A088A84202D0B04200D0A580A08863 -:102A6000A84202D1FFF797FD03E0B04201D1FFF782 -:102A7000E7FC0020FFF7BEFE0020FFF7A3FEF8BD35 -:102A8000000C01408C0300202DE9F84F07460C464E -:102A90004FF00008A1462248DFF888A000EB0210A2 -:102AA000DFF884B00090009810F808600025300628 -:102AB00004D54FF6FF70AAF8020002E00020AAF841 -:102AC000020021463846FFF729FF7006060E641CF7 -:102AD000A4B2BBF80000B84205D84FF6FF70AAF8C0 -:102AE0000200BDE8F88FA4EB090010280BD06D1C84 -:102AF000EDB2082DDBD308F1010808F0FF08B8F1AA -:102B0000100FD0D3EDE74C467F1CBFB2BBF80000DE -:102B1000B842F0D84FF6FF70AAF80200E1E70000D3 -:102B2000885600084C0000208C0300202DE9F0415D -:102B300000F028FA0C4C4FF4807020608020206058 -:102B40004026201D0660451505600120FEF78AFA23 -:102B500000F008FA07460120FEF784FA2660256097 -:102B60003846BDE8F0810000100C014070B500242B -:102B7000544D46F604022946AB798988012B18D1B9 -:102B8000914216D0082814D2DFE800F00406080AA3 -:102B90000C0E101206200CE007200AE0042008E0CA -:102BA000052006E0012004E0002002E0032000E010 -:102BB0000220A1F51343413B01D0914259D108288D -:102BC00012D2DFE800F0110406080A0C0E1080246F -:102BD0000AE0402408E0C02406E0202404E0602449 -:102BE00002E0A02400E0E024362044F008049142F2 -:102BF00001D144F0020400F06BF9204600F08AF99C -:102C0000A00606D528886988884208D2298068806D -:102C100005E028886988884201D929806880287A57 -:102C200000F056F9002000F075F9002000F072F96C -:102C30002888401EC0F30F2000F06CF92878401E51 -:102C4000C0B200F067F9687A00F042F9002000F0A5 -:102C500061F9002000F05EF96888401EC0F30F2083 -:102C600000F058F9A878BDE87040401EC0B200F0EE -:102C700051B9082812D2DFE800F0040608110A0C46 -:102C80000E1030240AE0102408E0202406E0382446 -:102C900004E0282402E0182400E00824A1F50940FB -:102CA000893809D0032044F4805400F011F92046FB -:102CB000BDE8704000F02EB9112046F240010C43EF -:102CC000F3E700008C03002070B504460E461A4D51 -:102CD0002846AA88007AA2F51341413907D0A2F507 -:102CE000D041043903D0A979012913D016E000F0AE -:102CF000EFF8200A00F00EF9E0B200F00BF9687A64 -:102D000000F0E6F8300A00F005F9F0B2BDE87040D6 -:102D100000F000B92988091B491E8CB200F0D8F8D0 -:102D2000204600F0F7F8287A00F0D2F83046BDE8E7 -:102D3000704000F0EFB800008C0300202DE9F84F40 -:102D400082460C460027A046184902EBC20001EB60 -:102D50008000DFF85C9000900098C65D00254FF67B -:102D6000FF7B300602D5A9F802B002E00020A9F8E6 -:102D7000020021465046FFF7D1FD7006060E641C86 -:102D8000A4B2A4EB0800182809D06D1CEDB2082DE0 -:102D9000E7D37F1CFFB2242FDED3BDE8F88F444673 -:102DA0000AF1010A1FFA8AFAF3E70000785C0008CA -:102DB0004C00002070B504460D46302229462046BE -:102DC000FFF762FE04F1080080B22D222946FFF7CA -:102DD0005BFE04F1100080B211222946FFF754FE79 -:102DE0001834A0B22946BDE870401022FFF74CBE4F -:102DF00070B504460D46302229462046FFF744FEB2 -:102E000004F1080080B22D222946FFF73DFE04F1AF -:102E1000100080B211222946FFF736FE04F1180097 -:102E200080B20E222946FFF72FFE2034A0B2294699 -:102E3000BDE870401022FFF727BE70B504460D466E -:102E4000002229462046FFF779FF04F10C0080B2EA -:102E500001222946FFF772FF04F1180080B2022216 -:102E60002946FFF76BFF04F1240080B203222946B4 -:102E7000FFF764FF3034A0B22946BDE87040042259 -:102E8000FFF75CBF70B504460D4655222946204623 -:102E9000FFF7FAFD04F1080080B247222946FFF748 -:102EA000F3FD04F1100080B20F222946FFF7ECFD7C -:102EB00004F1180080B24D222946FFF7E5FD2034C9 -:102EC000A0B22946BDE870401322FFF7DDBD000027 -:102ED0002DE9F041064600F07DF80D4C4FF480706E -:102EE00020604020251F2860C70027600120FEF7D2 -:102EF000B9F8304600F096F80120FEF7B3F88026C6 -:102F000026600120FEF7AEF82E602F60BDE8F0814C -:102F1000140C01402DE9F041064600F05BF80D4C21 -:102F20004FF48070206040202060C500271D3D6068 -:102F30000120FEF797F8304600F074F80120FEF704 -:102F400091F880263E600120FEF78CF8266025600F -:102F5000BDE8F081100C01400148C079FFF7B8BF0F -:102F60008C03002005488068C1B2054800684FF412 -:102F70007F4202EAC000084480B27047001001405E -:102F800008080140F8B5104C207801281AD0FF201D -:102F9000ADF8000004268DF8036003258DF802507B -:102FA00069460A48FEF764FD4FF4FF50ADF8000093 -:102FB0008DF803608DF8025069460548FEF758FD0C -:102FC00001202070F8BD00004C00002000100140DE -:102FD00000080140F8B5104C207802281AD0FF20D4 -:102FE000ADF8000010268DF8036003258DF802501F -:102FF00069460A48FEF73CFD4FF4FF50ADF800006B -:103000008DF803608DF8025069460548FEF730FDE3 -:1030100002202070F8BD00004C000020001001408C -:1030200000080140C1B2084A1161C943C9B25161E7 -:10303000010A4901054A11606FEA10200006C00C20 -:10304000111D086070470000001001401008014089 -:103050004FF0E021042804D0086920F00400086142 -:103060007047086940F0040008617047704700002D -:1030700010B50F48016841F00101016041680D4A37 -:103080001140416001680C4A11400160016821F45F -:1030900080210160416821F4FE0141604FF41F016D -:1030A0008160FEF72AFF05494FF00060086010BDFF -:1030B000001002400000FFF8FFFFF6FE08ED00E000 -:1030C00010B5324C0121204600F079F800285CD080 -:1030D0000121204600F064F82D4C2E4B0021208861 -:1030E000A8B1020413D41A78C82A01D8521C1A7045 -:1030F0001A78142A0DD35A88824205D140F4004030 -:1031000020805980197004E05880197001E019700E -:103110005980214C2088A8B1020413D45A78642A1B -:1031200001D8521C5A705A78142A0DD39A888242B8 -:1031300005D140F4004020809980597004E09880C7 -:10314000597001E05970998014494FF6E852088A85 -:10315000904201D2401C0882C889904201D2401C92 -:10316000C8818889904201D2401C8881088B904296 -:1031700001D2401C0883888B904201D2401C888376 -:10318000488A904201D2401C488210BD0004004091 -:10319000360000202C00002038000020D401002040 -:1031A000C94301827047002904D0018841F0010120 -:1031B00001807047018821F00101018070470246BB -:1031C0000020138A0B4092890A40002B02D0002A6B -:1031D00000D001207047002A03D082890A438281EF -:1031E000704782898A4382817047000030B5028827 -:1031F0001B4C1C4DA0420DD0A8420BD0B0F1804F0B -:1032000008D0194B984205D0184B984202D0184B61 -:10321000984203D122F070034A881A43154B984212 -:1032200006D0154B984203D022F44073CA881A4343 -:1032300002808A8882850A880285A0420AD0A84234 -:1032400008D00E4A904205D00D4A904202D00D4A55 -:10325000904201D1097A01860121818230BD0000AE -:10326000002C0140003401400004004000080040F0 -:10327000000C0040001000400014004000400140DD -:10328000004401400048014070B5164C40F22555FD -:103290002946204600F0ABF888B1204600F040F9FE -:1032A000C3B211480288110409D410498B54521C2E -:1032B00092B202805A2A02D342F4004101800821CE -:1032C000204600F08DF8012806D1204600F028F9AC -:1032D0000821204600F074F829462046BDE87040D9 -:1032E00000F06EB800380140320000206C00002071 -:1032F00070B5164D40F225563146284600F077F855 -:1033000088B1284600F00CF9C4B211490B881804A2 -:1033100009D4581C82B20F480A80C4545A2A02D3D6 -:1033200042F4004008800821284600F059F801289E -:1033300006D1284600F0F4F80821284600F040F8AD -:1033400031462846BDE8704000F03AB800440040DD -:10335000360000200C01002070B5164C40F22555B7 -:103360002946204600F043F888B1204600F0D8F8FE -:10337000C3B211480288110409D410498B54521C5D -:1033800092B202803B2A02D342F40041018008211C -:10339000204600F025F8012806D1204600F0C0F8AC -:1033A0000821204600F00CF829462046BDE8704070 -:1033B00000F006B80048004034000020D000002093 -:1033C0008A05C94301807047002904D0818941F4EE -:1033D000005181817047818921F4005181817047BA -:1033E0000246002012880A4200D00120704770B5C2 -:1033F000002440F66A12C1F3421301F01F050126B2 -:1034000006FA05F2012B0CD0022B0DD0838A134053 -:10341000090A8E40008830400BB100B101242046DB -:1034200070BD83891340F3E7038A1340F0E710B5BA -:1034300040F66A13C1F3421301F01F040121A140B9 -:10344000012B07D0022B07D014303AB102680A438F -:10345000026010BD0C30F8E71030F6E702688A43CE -:10346000026010BD30B585B004460D46208A4CF68A -:10347000FF710840E98801432182A0894EF6F311CB -:103480000840A9882A8911436A8902431143A1810E -:10349000A08A4FF6FF410840A9890143A1826846EE -:1034A000FEF7D4FC1D48844201D1039800E0029845 -:1034B000A189090408D500EBC00101EB00102968BF -:1034C0004900B0FBF1F007E000EBC00101EB001098 -:1034D00029688900B0FBF1F06422B0FBF2F1090128 -:1034E0000B096FF018056B4300EB8300A3891D04E3 -:1034F0004FF0320307D503EBC000B0FBF2F000F051 -:103500000700084306E003EB0010B0FBF2F000F008 -:103510000F000843208105B030BD00000038014095 -:103520008088C0F308007047C1F3080181807047AC -:10353000FEE700000FB4084B10B504A902AA0398D7 -:1035400000F080F9044602A9002000F012FD204698 -:1035500010BC5DF814FB0000733F000837B514463B -:103560000846064B6A46214600F06CF90446694657 -:10357000002000F0FEFC20463EBD0000733F000826 -:10358000490050EAC12018BF04204A0D18BF40F07E -:10359000010040F2FF72B2EB515F08BF40F0020041 -:1035A000012808BF052070472DE9F0414F1E00EBB0 -:1035B000C7010446D1E9000115461E4637F0060250 -:1035C0000DD02A463346FCF7C8FE7F1E04EBC70326 -:1035D000D3E90023FCF71AFE37F00602F1D1022FDF -:1035E00025D0042F13D0062F18BFBDE8F0812A463E -:1035F0003346FCF7B2FED4E90A23FCF707FE2A465D -:103600003346FCF7AAFED4E90823FCF7FFFD2A465F -:103610003346FCF7A2FED4E90623FCF7F7FD2A4661 -:103620003346FCF79AFED4E90423FCF7EFFD2A4663 -:103630003346FCF792FED4E90223FCF7E7FD2A4665 -:103640003346FCF78AFED4E90023BDE8F041FCF7DD -:10365000DDBD00000022134610460149FDF7A8B861 -:103660000000F03FFCF7D2BD002213461046114681 -:10367000FDF79EB840F2013200204FF0E041FCF728 -:10368000DEBE0000024A00201107FCF7D8BE000091 -:1036900001FDFFFF02E008C8121F08C1002AFAD18D -:1036A00070477047002001E001C1121F002AFBD1C2 -:1036B0007047000001490860704700006800002062 -:1036C0002DE9FF5F82B00021DDE90430020DDDF855 -:1036D00040B0034318D044F61050A2F2FF324243E8 -:1036E0001514119801281FD0A5EB0B00401C5FEAB0 -:1036F000000A4FF000064E4FDFF83891B0465046B2 -:1037000015D5CAF1000413E0119801244AA3012839 -:1037100001D16FEA0B010298119AC0E90031C0E9AA -:10372000024206B0BDE8F09FCBF10000DFE704469F -:103730000021404A491842EB0450CDE9001012E044 -:10374000E00707D032463B4640464946FCF705FEB7 -:103750008046894632463B4610461946FCF7FDFD39 -:1037600006460F466410002CEAD1DDE90401DDE9CC -:103770000023BAF1000F06DAFCF7EFFD42464B4694 -:10378000FCF7EBFD05E0FDF713F842464B46FDF76D -:103790000FF804460E460022284BFCF7C9FE03D85A -:1037A0004FF0FF30014607E00022254B204631460E -:1037B000FCF72CFDFDF76BF8102409E0002C0ADB68 -:1037C0000A220023FCF7FEFE039B30321A55641ECA -:1037D00050EA0102F2D1641C039AC4F111031444AB -:1037E000119A012A03D0012208430DD10AE00843AF -:1037F00004D000204FF0110B119072E7A3EB0B05E2 -:103800006D1E0DE05B4504DD4FF0000205F1010582 -:1038100004E003DA4FF00002A5F10105002AECD024 -:1038200002981199C0E90231C0E9004579E700002A -:10383000000014400000F03F300000000000F043A2 -:103840000000E03F2DE9FF4F95B09B4689460646B4 -:1038500000250FE2252877D100242746F84A0121C8 -:10386000059400E0044316F8013F203B01FA03F001 -:103870001042F7D130782A2811D06FF02F0330781A -:10388000A0F13002092A16D8059A44F0020402EB8E -:10389000820203EB42021044761C0590EFE759F8D0 -:1038A000042B0592002A03DA504244F40054059098 -:1038B00044F00204761C30782E2816D116F8010F39 -:1038C00044F004042A280DD06FF02F023078A0F1C4 -:1038D0003003092B09D807EB870302EB4303C71812 -:1038E000761CF3E759F8047B761C30786C280FD0EF -:1038F00006DC4C2817D068280DD06A2814D104E0C3 -:10390000742810D07A280FD10DE044F400140AE096 -:1039100044F4801401E044F440147278824202D1ED -:1039200004F58014761C761C307866280BD013DCE6 -:10393000582877D009DC002875D04528F6D04628CD -:10394000F4D047281AD19DE118E0632835D06428C7 -:1039500079D0652812D195E1702873D008DC6728EA -:10396000F1D069286FD06E280DD06F2806D1B5E050 -:1039700073282CD0752875D0782874D05A4617999A -:1039800090476D1C75E1C4F30250022809D003284A -:103990000DD0D9F8001004280DD00D6009F10409EC -:1039A00067E1D9F80010EA17C1E90052F6E7D9F843 -:1039B00000100D80F2E70D70F0E719F8041B8DF888 -:1039C000001000208DF80100EA46012003E059F8BC -:1039D00004AB4FF0FF3061074FF0000102D40DE05F -:1039E00008F101018846B9420FDA8045F8DB1AF880 -:1039F00008100029F4D108E008F10101884681424D -:103A0000FADB1AF808100029F6D105985B46A0EBFE -:103A1000080721463846179A00F094FA284400EB2C -:103A2000080507E04DE029E10DE01AF8010B5A46C0 -:103A300017999047B8F10108F7D25B4621463846FE -:103A4000179A13E142E00A220092C4F302524FF0A7 -:103A5000000A022A08D059F804CB032A4FEAEC7175 -:103A60000AD00DE029E02AE009F1070121F0070260 -:103A7000F2E802C1914609E00FFA8CFC4FEAEC71C2 -:103A8000042A03D14FFA8CFC4FEAEC71002907DAC3 -:103A90000A460021DCF1000C61EB02012D2202E05C -:103AA000220504D52B228DF80420012203E0E20731 -:103AB00001D02022F7E7904659E00A2102E01022C7 -:103AC0000DE010214FF0000A00910BE010224FF0A2 -:103AD000000A44F004040827009203E008224FF093 -:103AE000000A0092C4F30252022A05D059F804CB0E -:103AF0000021032A08D009E009F1070121F007029B -:103B0000F2E802C1914605E01FFA8CFC042A01D1BB -:103B10000CF0FF0C4FF00008220728D5702806D0C3 -:103B2000009B83F0100353EA0A0305D00EE0402205 -:103B30008DF80420012208E05CEA010206D0302260 -:103B40008DF804208DF8050002229046009B83F03A -:103B5000080353EA0A030AD15CEA010201D16207B1 -:103B600005D530228DF804204FF001087F1E58281B -:103B700004D034A003900EA802900DE036A0F9E71F -:103B800053466046009AFCF71DFD84460398825C0C -:103B90000298401E029002705CEA0100F0D1029887 -:103BA00006A9081A00F1200A600702D524F480341F -:103BB00000E00127574502DDA7EB0A0000E00020E6 -:103BC00000EB0A01009005984144401A0590E0037B -:103BD00006D45B462146179A059800F0B3F90544D0 -:103BE000002706E001A85A46C05D179990476D1C52 -:103BF0007F1C4745F6DBE0030CD55B462146179A50 -:103C0000059800F09FF9054404E030205A461799C2 -:103C100090476D1C0099481E00900029F5DC08E0D3 -:103C2000029802995A460078491C029117999047C8 -:103C30006D1CBAF10001AAF1010AF1DC65E1000096 -:103C40000928010030313233343536373839616272 -:103C50006364656600000000303132333435363736 -:103C600038394142434445460000000000F058F90D -:103C70000544761C307800287FF4ECAD19B0284656 -:103C8000BDE8F08F620700D4062709F1070222F091 -:103C9000070CFCE80223E14603F000485FEA080C49 -:103CA00002D00FF2702C0DE05FEA045C02D50FF237 -:103CB000682C07E05FEAC47C02D00FF2602C01E0C0 -:103CC000AFF2700C4FF0FF3823F00043CDF850C036 -:103CD00065280CD006DC452809D046281DD0472889 -:103CE0003DD13DE0662818D067287ED138E000211C -:103CF000112F01DB112000E0781CCDE9000106A99D -:103D00000EA8FFF7DDFCDDE90F010E9A03910021FB -:103D1000009207F1010A04914DE04FF00040009736 -:103D2000CDE9011006A90EA8FFF7CAFCDDE90F02D4 -:103D300003920E9B11990022DDF80CA000930492CF -:103D400011B9791C00EB010AB7EB0A0004D4C0F1E9 -:103D5000FF3007F1010A0490AAEB0700019044E04C -:103D6000012F00DA01270021112F01DD112000E0D1 -:103D70003846CDE9000106A90EA8FFF7A1FCDDE950 -:103D80000F010E9A0391002104910092BA46210777 -:103D90000CD40399514500DA8A46BAF1010F05DDCA -:103DA000009AAAF10101515C302908D0B84202DA28 -:103DB00010F1040F06DA0121CDE9011015E0AAF196 -:103DC0000101E9E7002805DC049901440491AAEB0C -:103DD000000102E0411C514500DD8A460499401A69 -:103DE000401C01904FF000400290200704D401983D -:103DF000504501DBCDF8048000208DF84F0002987B -:103E00000DF14F07B0F1004F25D02B200E900298F6 -:103E10004FF0020800280CDA404202902D200E904C -:103E200007E00A210298FCF7B7FB3031029007F84F -:103E3000011DB8F10001A8F10108F2DC0298002888 -:103E4000EFD1791E0E980870307800F0200040F015 -:103E5000450007F8020D12A8C01B00F107081498CE -:103E6000007800B1012000EB0A01019801EBE0713C -:103E700005984144401A401E0590E00306D45B4675 -:103E80002146179A059800F05DF8054414980078CB -:103E900018B15A46179990476D1CE00324D55B462C -:103EA0002146179A059800F04DF805441CE0049847 -:103EB000002807DBDDE90301884203DD0098405C50 -:103EC000179901E0179930205A469047049805F158 -:103ED0000105401C04900198401E019004D12E2041 -:103EE0005A46179990476D1CBAF10001AAF1010AD0 -:103EF000DDDC05E017F8010B5A46179990476D1C59 -:103F0000B8F10001A8F10108F4DC5B462146179ADC -:103F10000598ABE62D0000002B00000020000000FB -:103F20002DE9F041044600251E461746880404D4B6 -:103F300005E039462020B0476D1C641EF9D528469F -:103F4000BDE8F0812DE9F041044600251E4690466B -:103F5000C80301D5302700E02027880404D505E0F8 -:103F600041463846B0476D1C641EF9D52846BDE869 -:103F7000F0810A68531C0B601070704770B50446DE -:103F80000F4E19E02568A089C00503D4A06808B1C8 -:103F9000FFF7F4FFA089C00503D4206908B1716858 -:103FA0008847A089800503D4206A08B171688847D2 -:103FB0007168204688472C46002CE3D170BD000074 -:103FC0005400002070B50D46846800E024682CB1D0 -:103FD0002946206A00F04AF80028F7D1204670BD33 -:103FE00010B5064928200968884704461CB12821D5 -:103FF0002046FCF7D8F8204610BD000054000020F1 -:1040000000221146AFF300802DE9F04104460D4631 -:104010009046FFF7E5FF0646134F0020B860C6B193 -:10402000204601F0C7F80146304600F079FB04460F -:104030008CB1B8F1000F13D0204601F0BBF8044654 -:10404000207868B13046FFF799FFBC600020BDE8DA -:10405000F0810020FBE73046FFF790FF0020F6E7F5 -:1040600005B12C603046F2E75400002070B50446DC -:104070000D46002C01D02DB10AE00DB1012070BD1C -:10408000002070BD012070BD207898B1641C6D1CAB -:104090002078FCF769F806462878FCF765F8864230 -:1040A000F2D02078FCF760F804462878FCF75CF83A -:1040B000201A70BD002070BD10B5002821D0114B12 -:1040C0000022001F196803E0814203D80A464968AC -:1040D0000029F9D152B11368841A9C4204D10068B6 -:1040E00018441060104602E0506000E0186039B1DA -:1040F00002680B1A934203D10B681A4402604968A4 -:10410000416010BD60000020FCF78AFDFCF71AFE3C -:10411000FCF7A4FDC820FCF78BFFFCF739FD4FF43A -:104120007A70FCF785FFFEF73BFC0F4C40F6B83089 -:104130002082E081A0812083C820E08320846084E5 -:10414000FDF71EFAFDF796F9FCF7FAFEFCF7A4FF5F -:10415000FDF700F8207D022803D1FEF7EBF8FDF70C -:104160003FFDFDF787FFEBE7D4010020F0B50B30F2 -:10417000154D20F007010024144A0FE003688B421C -:104180000BD38B4205D95E1A43184768C3E9006711 -:1041900000E04368136002C004E0021D10680028BC -:1041A000ECD12046002802D1286808B10020F0BDDB -:1041B000064A07481060074A121A22F00702C0E9AF -:1041C000002401202860D7E7640000206000002060 -:1041D0009C030020980500202DE9F041074608784F -:1041E000234E5B2803D0B1600020BDE8F08105209C -:1041F000F860481C00F0DEFF044620785D2811D0EE -:10420000FFF7EEFE0546B86070B1204600F0D2FF21 -:104210000146284600F084FA00F0CCFF0446200056 -:1042200004D016E0601CE0E70020DEE70020DCE7B9 -:10423000FFF7D6FEB0B1286045600546601C00F06F -:10424000B9FF0146284600F06BFA00F0B3FF0446C0 -:1042500054B120782C28EBD020785D2806D0B460AB -:104260000020C2E70020C0E70020BEE7601CBCE7DA -:10427000540000200178A1F13002092A01D811462A -:104280000AE0A1F14102052A01D8373904E0A1F181 -:104290006102052A0AD857390A01401C0178A1F1A8 -:1042A0003003092B04D8303A11440EE00020704747 -:1042B000A1F14103052B02D8373A114405E0A1F1E1 -:1042C0006103052B0BD8573A11440A01401C0178B1 -:1042D000A1F13003092B04D8303A11440EE000203C -:1042E0007047A1F14103052B02D8373A114405E08C -:1042F000A1F16103052B0AD8573A1144090140780E -:10430000A0F13002092A04D830390844704700204F -:104310007047A0F14102052A02D837390844704796 -:10432000A0F16102052A02D85739084470470020DD -:10433000704700002DE9F34F85B08A4600242546DA -:1043400059490020CDE90201002637468346012065 -:1043500001909AF800002D2805D154490020CDE99C -:1043600002010AF1010A9AF80000302801D10AF18D -:10437000010A9AF800003138082817D89AF8000086 -:104380003038FCF778F8804689460022484B2046B2 -:104390002946FBF7E2FF42464B46FBF737FF044650 -:1043A0000D461AF8010F30380928E7D99AF80000AD -:1043B0002E2827D19AF80100302823D3392821D874 -:1043C0000AF1010A9AF800003038FCF754F88046E8 -:1043D00089460022364B20462946FBF7BEFF42465F -:1043E0004B46FBF713FF04460D4600222E4B30468A -:1043F0003946FBF7ACFF06460F461AF8010F303876 -:104400000928DFD99AF80000652801D045281DD178 -:104410001AF8010F2B2802D02D2803D010E00AF142 -:10442000010A0DE04FF0FF3001900AF1010A07E0A8 -:104430000BEB8B0100EB410B0AF1010AABF1300BE6 -:104440009AF80000A0F130010929F1D901980BFB7D -:1044500000F0FCF710F832463B46FBF7D7FE024669 -:104460000B460020124900F0B9F906460F46DDE977 -:10447000020122462B46FBF770FF32463B46FBF714 -:104480006CFF04460D460598C0E9064520462946BE -:10449000FCF702F80599486105980321C16007B04F -:1044A0005046BDE8F08F00000000F03F0000F0BF74 -:1044B000000024402DE9F04107460878384E7B285B -:1044C00003D0B1600020BDE8F0810620F860481CF0 -:1044D00000F070FE054628787D2818D0FFF780FD93 -:1044E0000446B860A8B1284600F064FE01462046A4 -:1044F00000F058F800F05EFE68B1216921620027E3 -:10450000276101783A2908D0B0600020DBE7681CF9 -:10451000D9E70020D7E70020D5E7401C00F04AFE8D -:104520000146204600F0FCF800F044FE0546280055 -:1045300028D1C8E7FFF754FDA8B1206044600446C5 -:10454000681C00F037FE0146204600F02BF800F012 -:1045500031FE50B121692162276101783A2906D0E4 -:10456000B0600020AFE70020ADE70020ABE7401CC3 -:1045700000F020FE0146204600F0D2F800F01AFEBE -:10458000054645B128782C28D4D028787D2804D039 -:10459000B560002097E7002095E7681C93E70000CE -:1045A000540000202DE9F04780460D466C1C002089 -:1045B0002A785949222A06D08D60BDE8F087641C0C -:1045C0005C2A00D1641C2278222A02D00AB1401C45 -:1045D000F5D10968401C88470746380004D0681C9C -:1045E0003C464FF480691AE00020E6E75C2903D0DE -:1045F00004F8011B401C12E0461C3078722825D0BC -:1046000006DC622816D0662818D06E2804D119E07E -:1046100074281FD0752821D004F8010B701C017874 -:10462000222901D00029E1D100212170017822291D -:104630006AD06AE0082004F8010BEFE70C2004F8C8 -:10464000010BEBE70A2004F8010BE7E70D2004F863 -:10465000010BE3E7092004F8010BDFE7701CFFF70B -:1046600009FE0546361DA5F55C404845D6D3002D0C -:10467000D4D0A5F55840484513D270785C28CDD1E8 -:10468000B0787528CAD1F01CFFF7F4FDB61DA0F56F -:104690005C414945C2D2C5F3090161F39F2000F591 -:1046A00080350421802D01D2012108E0B5F5006F8D -:1046B00001D2022103E0B5F5803F00D2032160184A -:1046C00001291AD0022911D0032908D0042919D1AF -:1046D00005F0BF0242F0800200F8012DAD0905F09F -:1046E000BF0242F0800200F8012DAD0905F0BF02C3 -:1046F00042F0800200F8012DAD09084A525C2A43BD -:1047000000F8012D441889E7401CC8F810700421F6 -:10471000C8F80C1051E7000054000020B0600008F9 -:1047200070B505460C46002C20D0042224A120465A -:10473000FBF75DFDE0B1052223A12046FBF757FD05 -:10474000D0B1042222A12046FBF751FDC0B1207850 -:1047500022281AD02D2803D0A0F1300109291AD817 -:1047600021462846BDE87040FFF7E4BD002070BD3B -:104770000220E860201D70BD0020E860601D70BD53 -:104780000120E8606861201D70BD21462846BDE813 -:104790007040FFF707BF5B2805D07B2809D00E4883 -:1047A0008460002070BD21462846BDE87040FFF7B8 -:1047B00013BD21462846BDE87040FFF77BBE0000D0 -:1047C0006E756C6C0000000066616C736500000023 -:1047D0007472756500000000540000202DE9F04D52 -:1047E0001D460C4698B0174621F0004123F00043C7 -:1047F000002814BF4FF0010C4FF0000C0CEB440CE0 -:10480000FE4A0CEB02064FEA620C66452BD33E00D3 -:1048100018BF012606EB45061644F94A964222D3F4 -:10482000F84A53EA070C02D0944205D148B918B0AF -:1048300000201146BDE8F08D002808BF4FF0000CA5 -:1048400001D04FF0010C0CEB440212F5001F0AD806 -:10485000002F14BF4FF0010C4FF0000C0CEB450281 -:1048600012F5001F07D918B03A462B462146BDE87D -:10487000F04DFEF7F7BE0022DFF88CA3002CB8BF86 -:10488000534526DADFF884C36345A8BF022220DA45 -:10489000DFF870C39C451CDCDFF874C30CEB235CB1 -:1048A000BCF1140F08DDCCF1340627FA06FC0CFA33 -:1048B00006F6BE420DD108E05FB9CCF1140623FA2A -:1048C00006FC0CFA06F69E4203D10CF00102C2F17E -:1048D000020251EA000C19D1002D17DA002C18BF82 -:1048E000022A01D0012A07D00220FEF7E3FE18B009 -:1048F000BDE8F04DFEF7AEBE0220FEF7DBFEFEF790 -:10490000A9FE18B081F00041BDE8F08DB7F1000CB0 -:104910006CD1534525D104F1804212F5801201BFBC -:1049200000280020B74918B008BFBDE8F08DB54891 -:10493000884207DC002DA1BF6046294618B0BDE8BB -:10494000F08D07E0281E05DA80F0004118B06046BF -:10495000BDE8F08DAF497944D1E9000118B0BDE858 -:10496000F08DDFF8A0C2634525D1002D1FDA19B103 -:10497000514512D1D8B909E0002840F0EC82A24A92 -:10498000214618B062F31E01BDE8F08D00202146DB -:1049900018B060F31E01BDE8F08D08DA18B02346A8 -:1049A000BDE8F04D024600206146FBF701BF18B09C -:1049B0002146BDE8F08D514518DAB5F1804F0DD094 -:1049C000A5F1005CBCF1FF5C10D1B4F1000C0DDB73 -:1049D00018B06146BDE8F04D00F0F6BB234618B0B4 -:1049E0000246BDE8F04D1946FBF7B7BC060024F0BF -:1049F000004C3BD1D9B1514533D1002C06DD002DFF -:104A0000A1BF0020514618B0BDE8F08D002C01DD9B -:104A1000002D1BDB002C13DA002D11DB012A4FF0D7 -:104A2000000014BF78497C4918B0BDE8F08D022A17 -:104A300018BF002C0AD0012A08D1002C06DA0AE09F -:104A4000002CB8BF002D11DA012A04D0002018B0C4 -:104A50000146BDE8F08D18B000204FF00041BDE8E0 -:104A6000F08DA1F14050B0F17F601AD0012000EB31 -:104A7000E47050EA020421D0624C521E4FF0000B49 -:104A8000104304BF4FF0000B644C654883427CDD4B -:104A9000644A654893421FDD884217DB002D25DB01 -:104AA00037E0002C00DA4AB1022A0CBF01204FF097 -:104AB000FF3018B0BDE8F04DFBF7DDBC0120FEF77C -:104AC000F9FD18B0BDE8F04DFEF7CEBD4D4A8A4263 -:104AD00002DC002D0ADC1CE0814202DA002D18DA2B -:104AE00004E0484B994220DD002D12DD0220FEF744 -:104AF000E1FDFEF7BFFD05460E460022534658462F -:104B00002146FBF72AFC18B066F31E012846BDE8D3 -:104B1000F08D0220FEF7CEFDFEF7B4FD0A462146D9 -:104B200018B062F31E01BDE8F08D002230466146E8 -:104B3000FBF70DFC80460E466FF00102FBF77FFC91 -:104B40004FF05532394BFBF705FC42463346FBF735 -:104B500004FC0022364BFBF7FDFB824642463346FF -:104B6000049110461946FBF7F8FB5246049BFBF7ED -:104B7000F4FB8A4600904FF0C0422E4B404631462F -:104B8000FBF7EBFB2C4A2B4B00E027E0CDE90601BD -:104B900051460098FBF7E1FB82460191274A284BDA -:104BA00040463146FBF7D9FB5246019BFBF7CFFB52 -:104BB00082460B4602460591DDE90601FBF726FB1E -:104BC000DDE90623002688463046FBF7C0FB524647 -:104BD000059BFBF7BFFB024600F07EB90020B1F554 -:104BE000801F07DA352230466146FBF728FC06466F -:104BF0006FF0340000EB215024E00000FFFF1F00A5 -:104C0000FFFF0F000000F03F0000F07F0000404376 -:104C100001FCFFFFE61700000000F0FF0000F0BFFE -:104C20000000E0410000F043FFFFEF3F5555D53F46 -:104C30000000E03F4715F73FFE822B6544DF5DF83B -:104C40000BAE543EA0F2FF300190C1F3130040F0D0 -:104C50007F6141F040510291FE498842D8BF002057 -:104C600004DDFD498142C8BF012001DD0D9008E04F -:104C700000200D900198401C01900298A0F5801032 -:104C800002900299F54878440B910D9900EBC10010 -:104C9000D0E900230F9330460A920B99FBF757FB9C -:104CA000CDE90601DDE90A2130460F9BFBF7AEFA9C -:104CB00002460B460020EA49FBF77AFD05910246C1 -:104CC0000B460090DDE90601FBF747FB1490E54831 -:104CD0008A464FF0000878440299006812904FF01D -:104CE000005040EA61010D980F9B01EB804000F5F8 -:104CF000002109910A9A1298FBF729FB32460B9B77 -:104D0000FBF728FB42465346FBF727FB064602917A -:104D100040465146099B129AFBF71FFBDDE906232B -:104D2000FBF718FB3246029BFBF711FB059B009A31 -:104D3000FBF713FB0091149A049053461046194652 -:104D4000FBF70BFB06460246C7480B4602910621BD -:104D50007844FEF729FCCDE90510029B3246104647 -:104D60001946FBF7FAFADDE90532FBF7F6FA059189 -:104D70000646534640461946149AFBF747FA009BED -:104D8000049AFBF7EAFA3246059BFBF73FFACDE9B6 -:104D900005104246534610461946FBF7DEFA00223C -:104DA000B24B02910A90FBF731FADDE90532FBF7CD -:104DB0002DFA0E464246AD4B4046FBF7C8FA029B21 -:104DC0000A9AFBF7C4FADDE90532FBF7C3FA42465B -:104DD00002910A90334610465146FBF7BEFACDE9E0 -:104DE00006015346149A02990A98FBF7B6FA8A46C6 -:104DF00002903346424600990498FBF7AEFA5346B8 -:104E0000029AFBF703FA82460B4602460591DDE95A -:104E10000601FBF7FBF9DDE906230020884606467C -:104E2000FBF795FA5246059BFBF794FA82460991E7 -:104E30004FF060428E4B30464146FBF78EFA0490AD -:104E400006918C4A8A4B50460999FBF786FA8246AE -:104E50000291894A894B30464146FBF77EFA524619 -:104E6000029BFBF7D3F9864B7B440D9A03EBC203FD -:104E7000D3E90023FBF7CAF90E9007910198FBF7DD -:104E8000FAFA0591DDE9061382460E9A0498FBF7BB -:104E9000BDF97C4A7A440D9B02EBC303D3E900239E -:104EA00000930292FBF7B2F95246059BFBF7AEF96D -:104EB0000026884652463046059BFBF748FA009B81 -:104EC000029AFBF744FA069B049AFBF740FA079B09 -:104ED0000E9AFBF73FFA024600200B460290384636 -:104EE0002946FBF73AFA824601912B463846194685 -:104EF000029AFBF72CFA32464346FBF72EFA52464B -:104F0000019BFBF783F907468A463246434629460A -:104F10000298FBF722FA05460E463A465346FBF73F -:104F200075F9594A8846914221DBA8EB020353EAFE -:104F3000000210D12A463346FBF709FACDE90401F5 -:104F4000524A534B38465146FBF760F9DDE90423DA -:104F5000FBF7EEFA21D20220FEF7ACFBFEF78AFB4C -:104F60000A46214618B062F31E01BDE8F08D494B98 -:104F700028F000429A4210D3474A08EB020353EA52 -:104F800000027FF4C6AD2A463346FBF7E0F93A4605 -:104F90005346FBF7CDFA7FF6BCAD0022019228F014 -:104FA00000403E493E4A01EB2051824223DA481C30 -:104FB0004FF4801121FA00F040443A4AC0F30A51FC -:104FC0007A44394BA1F2FF31CB4020EA0303C0F30E -:104FD000130040F48010C1F11401C8401268019020 -:104FE000B8F1000FBCBF4042019028463146FBF7A4 -:104FF000AEF905460E462A46334638465146FBF77B -:1050000005F94FF000084246284B40460591FBF752 -:10501000A4F9CDE90601264A264B40460599FBF73F -:105020009CF9009102902A46334640460599FBF7C9 -:105030008EF93A465346FBF78DF91F4A1F4BFBF793 -:105040008CF9009B029AFBF7E1F807468846024676 -:105050000B4635E08E9803007AB60B002E14000044 -:105060000000F03F661400009413000000000840A8 -:1050700009C7EE3FFD033ADCF5015B14E02F3EBEAD -:105080006C1200003012000000009040FE822B6580 -:105090004715973C00CC904000346F3F01FCFFFF68 -:1050A0000000E03F7C110000FFFF0F00432EE63FB1 -:1050B000396CA80C615C20BEEF39FAFE422EE63F47 -:1050C000DDE90601FBF7A2F8DDE9062305460E46F9 -:1050D000FBF73DF93A464346FBF73CF90F462A46B3 -:1050E0003346009010461946FBF737F982460246D0 -:1050F0002E4888460B4605217844FEF755FA52465D -:105100004346FBF72AF92A463346FBF723F9804644 -:105110008A463B4628463146009AFBF71EF93B4635 -:10512000009AFBF773F80691009000224FF080433D -:1051300040465146FBF70BF90F460C90424653464A -:1051400028463146FBF709F93B460C9AFBF730FB42 -:10515000069B009AFBF7FBF82A463346FBF7F7F865 -:105160000022134BFBF7F6F8054601980E4601EBBB -:1051700000510815002810DC28463146019AFBF73B -:105180005EF9FEF7FDF9042808BFFEF77BFA284612 -:105190003146019AFBF753F905460B4618B02A46EB -:1051A00058462146BDE8F04DFBF7D7B81C1000006B -:1051B0000000F03F00E0401C002804D001780029E6 -:1051C00001D02029F7D970472DE9F04106460F4656 -:1051D000FBF788FB041E0D4618BF0120284320F072 -:1051E0000040C0F17F6000F1E040C00F0ED0301CE5 -:1051F00018BF0120384320F00040C0F17F6000F16B -:10520000E040C00F04BF0120FEF754FA20462946B3 -:10521000BDE8F08100000000000000000000000078 -:10522000000000003F4000000000000000003000CF -:10523000400030004000000009000BC03D000BC0E2 -:105240003D00090018C024407FE02240318000006A -:10525000180024C01B000D803240018003801C40D8 -:1052600027401C8007400040100060000000000044 -:10527000000000000000000000001F8020404020CF -:105280000000402020401F800000000009000600B0 -:105290001F80060009000000040004003F80040095 -:1052A000040000000010006000000000000000008A -:1052B000040004000400040004000000000000409A -:1052C0000000000000000000002001C006003800BF -:1052D000400000001F802040204020401F80000030 -:1052E000000010403FC000400000000018C02140F6 -:1052F00022402440184000001080204024402440D8 -:105300001B80000002000D0011003FC001400000A2 -:105310003C80244024402440238000001F802440FF -:1053200024403440038000003000200027C03800B3 -:10533000200000001B802440244024401B800000EB -:105340001C0022C0224022401F80000000000000FC -:1053500008400000000000000000000004600000A1 -:1053600000000000000004000A00110020804040FE -:105370000900090009000900090000000000404080 -:10538000208011000A00040018002000234024009F -:10539000180000001F802040274029401F400000C7 -:1053A000004007C039000F0001C0004020403FC04E -:1053B000244024401B8000001F80204020402040CB -:1053C0003080000020403FC0204020401F8000006F -:1053D00020403FC024402E4030C0000020403FC04D -:1053E00024402E00300000000F001080204022409A -:1053F0003380020020403FC0040004003FC0204032 -:10540000204020403FC0204020400000006020207D -:1054100020203FC02000200020403FC024400B003F -:1054200030C0204020403FC020400040004000C02D -:105430003FC03C0003C03C003FC0000020403FC0D4 -:105440000C4023003FC020001F802040204020400F -:105450001F80000020403FC02440240018000000AE -:105460001F802140214020E01FA0000020403FC0BD -:105470002440260019C0004018C024402440224087 -:1054800031800000300020403FC02040300000004C -:1054900020003F80004000403F80200020003E0070 -:1054A00001C0070038002000380007C03C0007C0DA -:1054B00038000000204039C0060039C020400000FC -:1054C0002000384007C0384020000000304021C094 -:1054D0002640384020C00000000000007FE040204F -:1054E00040200000000070000C000380004000001D -:1054F0000000402040207FE000000000000020006D -:1055000040002000000000000010001000100010FB -:10551000001000100000000040000000000000002B -:10552000000002800540054003C0004020003FC04D -:105530000440044003800000000003800440044055 -:105540000640000000000380044024403FC00040AB -:1055500000000380054005400340000000000440B7 -:105560001FC0244024402000000002E005500550E8 -:105570000650042020403FC00440040003C0004007 -:105580000000044027C00040000000000010001090 -:10559000041027E00000000020403FC00140070049 -:1055A00004C00440204020403FC0004000400000B4 -:1055B00007C0040007C0040003C00000044007C087 -:1055C0000440040003C00040000003800440044085 -:1055D00003800000041007F0045004400380000022 -:1055E000000003800440045007F00010044007C08E -:1055F0000240040004000000000006400540054091 -:1056000004C00000000004001F80044000400000AF -:10561000040007800040044007C000400400070069 -:1056200004C0018006000400060001C0070001C09C -:1056300006000000044006C0010006C0044000004F -:105640000410071004E0018006000400000004407C -:1056500005C00640044000000000000004007BE09C -:1056600040200000000000000000FFF000000000EB -:10567000000040207BE004000000000040008000AB -:10568000400020002000400000000000000000005A -:1056900000000000000000000000000000001FCC1F -:1056A000000C000000000000000008003000600056 -:1056B0000800300060000000022003FC1E200220D1 -:1056C00003FC1E200220000000000E1811043FFF02 -:1056D00010840C78000000000F0010840F3800C008 -:1056E000077818840078000000780F8410C4112413 -:1056F0000E9800E4008400080800680070000000B4 -:10570000000000000000000000000000000007E0B2 -:10571000181820044002000000004002200418185D -:1057200007E00000000000000240024001800FF08E -:1057300001800240024000000080008000800FF8DD -:1057400000800080008000000001000D000E0000BD -:1057500000000000000000000000008000800080C9 -:1057600000800080008000800000000C000C000021 -:1057700000000000000000000000000600180060AB -:105780000180060018002000000007F0080810043F -:105790001004080807F000000000080408041FFCBB -:1057A000000400040000000000000E0C101410247F -:1057B000104411840E0C000000000C181004110499 -:1057C000110412880C700000000000E00320042483 -:1057D00008241FFC0024000000001F9810841104FE -:1057E0001104108810700000000007F008881104F0 -:1057F000110418880070000000001C00100010FC4C -:1058000013001C001000000000000E38114410842A -:10581000108411440E38000000000700088C10446A -:105820001044088807F00000000000000000030C8E -:10583000030C000000000000000000000001010651 -:105840000000000000000000000000800140022075 -:105850000410080810040000022002200220022088 -:10586000022002200220000000001004080804109A -:10587000022001400080000000000E001200100C09 -:10588000106C10800F00000003E00C1813E41424C7 -:1058900017C4082807D000000004003C03C41C40C3 -:1058A000074000E4001C000410041FFC1104110454 -:1058B00011040E880070000003E00C18100410049E -:1058C000100410081C10000010041FFC1004100429 -:1058D0001004080807F0000010041FFC1104110454 -:1058E00017C410040818000010041FFC1104110054 -:1058F00017C010000800000003E00C18100410048A -:1059000010441C780040000010041FFC108400802C -:10591000008010841FFC10040000100410041FFC01 -:105920001004100400000000000300011001100129 -:105930001FFE10001000000010041FFC1104038063 -:105940001464181C1004000010041FFC1004000450 -:1059500000040004000C000010041FFC1F0000FCE9 -:105960001F001FFC1004000010041FFC0C040300A7 -:1059700000E010181FFC100007F0080810041004C5 -:105980001004080807F0000010041FFC10841080A9 -:10599000108010800F00000007F008181024102459 -:1059A000101C080A07F2000010041FFC110411006B -:1059B00011C011300E0C000400000E1C11041084E4 -:1059C000108410441C3800001800100010041FFC44 -:1059D000100410001800000010001FF8100400044C -:1059E000000410041FF8100010001E0011E0001C3D -:1059F000007013801C0010001FC0103C00E01F004E -:105A000000E0103C1FC000001004180C163401C048 -:105A100001C01634180C100410001C00130400FC04 -:105A200013041C00100000000804101C10641084F3 -:105A300013041C04101800000000000000007FFE8A -:105A40004002400240020000000030000C000380D1 -:105A50000060001C00030000000040024002400201 -:105A60007FFE000000000000000000002000400059 -:105A70004000400020000000000100010001000182 -:105A80000001000100010001000040004000200072 -:105A90000000000000000000000000980124014404 -:105AA0000144014400FC000410001FFC00880104B4 -:105AB00001040088007000000000007000880104EC -:105AC0000104010400880000000000700088010447 -:105AD000010411081FFC0004000000F80144014407 -:105AE0000144014400C800000000010401040FFC4F -:105AF0001104110411001800000000D60129012929 -:105B0000012901C90106000010041FFC00840100E6 -:105B10000100010400FC000400000104190419FC48 -:105B20000004000400000000000000030001010167 -:105B3000190119FE0000000010041FFC00240040A1 -:105B400001B4010C010400000000100410041FFC4B -:105B50000004000400000000010401FC0104010035 -:105B600001FC0104010000FC010401FC00840100AF -:105B70000100010400FC0004000000F8010401041D -:105B80000104010400F80000010101FF0085010487 -:105B9000010400880070000000000070008801040B -:105BA0000104010501FF00010104010401FC00845E -:105BB0000104010001800000000000CC0124012448 -:105BC000012401240198000000000100010007F8F1 -:105BD0000104010400000000010001F800040004B9 -:105BE0000004010801FC0004010001800170000CA8 -:105BF000001001600180010001F0010C003001C0C3 -:105C00000030010C01F0010000000104018C00745F -:105C10000170018C01040000010101810171000E7D -:105C2000001801600180010000000184010C0134B2 -:105C300001440184010C000000000000000000008D -:105C400001003EFC40024002000000000000000095 -:105C5000FFFF0000000000000000400240023EFC88 -:105C600001000000000000000000600080008000D3 -:105C700040004000200020000000000FFFF80FFF50 -:105C8000F80C0C000C0C000C0C00040C00060C00B2 -:105C9000061C0003F80001F0000000000000000FE7 -:105CA000FFF80FFFF80FF00000FF800007F8000773 -:105CB000F801FF000FE0000FFFF80FFFF8000000F1 -:105CC0000000000180100780700600F00C01D00C6D -:105CD00003900C07100E1C1007F81003E0100000D2 -:105CE0001000000000000000000000003800003834 -:105CF00000000000000000000000000000000000A4 -:105D000000000000000000000000800038E007F8FC -:105D10007007B01004201804201804301804303024 -:105D2000043CF0041FE0000300000000000000003D -:105D3000000003FC0000003FFFC000007FFFF000F8 -:105D400000FC01F80001E000780003C0001C000323 -:105D500080001C000300000E000300000E00038002 -:105D6000001C0003C0003C0001F000780000FFFFB1 -:105D7000F000007FFFE000000FFF000000000000C7 -:105D80000000000000000000000000000000000013 -:105D90000000000000001C000000001800000000CF -:105DA00038000000007000000000E000000001FF6B -:105DB000FFFC0003FFFFFC0003FFFFFC00000000EE -:105DC00000000000000000000000000000000000D3 -:105DD00000000000000000000000000000000000C3 -:105DE000000000000000100000000070001C000017 -:105DF000F8003C0001E0007C0003C000FC000380D0 -:105E000001EC00038003CC0003800F0C0003801E14 -:105E10000C0003803C0C000380F80C0001E7E00C50 -:105E20000001FFC00C0000FF000C000018000C0077 -:105E30000000000000000000000000000000000062 -:105E400000008000003000E000007000F00001F071 -:105E500000780001C0003C000380001C000380604B -:105E60000C000300E00C000300E00C000380E01CC9 -:105E7000000381F01C0001E7B8780001FF3FF80043 -:105E800000FE1FF000001807C00000000000000026 -:105E900000000000000003800000000780000000F8 -:105EA0001F800000003F800000007B80000001E3B5 -:105EB00080000003C38000000F838000001E038069 -:105EC00000007C03800000F003800003FFFFFC0063 -:105ED00003FFFFFC0003FFFFFC0000000380000045 -:105EE00000038000000003800000000000000000AC -:105EF000000000000020E0000007E0F00000FFE0EC -:105F0000780003FFC01C0003F1801C000383800E97 -:105F1000000383800E000383800E000383800C0047 -:105F20000383801C000381C03C000381E0780003F0 -:105F300080FFF80003807FE00000001F8000000069 -:105F4000000000000000000000000000000000074A -:105F5000000000003FE0000000FFF0000003F8F840 -:105F6000000007E03C00001FC01C00003F800C0048 -:105F700000F9800E0001F1800E0003C1800E0003C5 -:105F800001C00C000201C01C000000E07C00000009 -:105F9000FFF80000007FF00000001FC000000000BC -:105FA000000000000000000000000000038000006E -:105FB00000038000000003800000000380001C003C -:105FC000038000FC00038007FC0003801FE0000347 -:105FD000807F00000381F800000387E00000039F3A -:105FE00000000003FC00000003F000000003E000DC -:105FF000000003800000000000000000000000001E -:1060000000000007E000007E1FF00000FFBFF80066 -:1060100001E7F83C000381F01C000380E00C000362 -:1060200080E00E000300E00E000380E00E0003801D -:10603000E00C000381F01C0001E7B83C0000FF3FCA -:10604000F800007E1FF00000000FE00000000000DC -:106050000000000000000000000000003FC0000041 -:10606000007FE0000000FFF0000001E07800000386 -:10607000C03806000380181E000380187E000380CD -:1060800019F80003801FE00003803FC00003C07FB9 -:10609000000001E1FC000000FFF00000007FC000F4 -:1060A00000003F00000000000000000000000000B1 -:1060B0000000C0E0F0F8FC00000000000000F03F2D -:1060C000000000000000F83F000000000000000099 -:1060D0000000004003B8E23F0000000000000000A4 -:1060E00006D0CF43EBFD4C3E033333333333E33F32 -:1060F000FFAB6FDBB66DDB3F4D268F515555D53F5E -:1061000001411DA96074D13F65DBC9934A86CD3F2B -:10611000EF4E454A287ECA3F3E5555555555C53F19 -:1061200093BDBE166CC166BF2CDE25AF6A56113F0B -:10613000F16BD2C541BDBBBED0A4BE726937663E0D -:10614000000000000000000068610008000000205E -:106150006C00000094360008D46100086C00002038 -:106160002C090000A436000800A24A040000000028 -:1061700000000000010203040607080902040608E3 -:1061800000000000010203040102030406070809DD -:1061900000000000000000000000000000000000FF -:1061A00000000000010000000000000000000000EE -:1061B0000000000000000000FFFF00006D4100082B -:1061C000B9400008000000000000000000000000CE -:0461D00000000000CB +:1001E000421C10F8011B0029FBD1801A70470346FE +:1001F00011F8012B00F8012B002AF9D1184670479D +:1002000030B505460020034600E05B1C934205D252 +:10021000EC5CC85C201A01D1002CF6D130BD2DE970 +:10022000FE4F804681EA0300C00F0C46009021F08B +:10023000004123F00045B8EB0200A94105D2404639 +:10024000214690461C460B46024623F000401043D0 +:1002500047D0270DC7F30A00C3F30A510290401A92 +:10026000019040286BDAC3F3130040F4801B009820 +:10027000924620B10023D2EB030A63EB0B0B0198EB +:100280005946C0F14002504600F0D5F906460D46E9 +:1002900050465946019A00F0EDF910EB0800614113 +:1002A000002487EA115284EAE7731A4340D0009A87 +:1002B00062B3019A012A4FEA075215DC001B61EB79 +:1002C00002014FF0004202EA0752CDE90042001C51 +:1002D00041F5801132462B4600F024FA03B0BDE808 +:1002E000F08F40462146F9E7001B61EB0201001C3C +:1002F00041F5801300185B412018A2F5001747EB69 +:10030000030140EAD570B6196D4111E06D084FEA5E +:10031000360645EAC0754FEA0752001B61EB020141 +:10032000001C41F5801149084FEA30000019514185 +:1003300032462B4603B0BDE8F04F00F0E4B9009818 +:10034000012240000023D0EB020263EBE07300982F +:1003500021464FEAE074B8EB000061EB0401E9E7E5 +:1003600083F000435BE781F0004158E72DE9FE4F41 +:1003700081EA030404F0004421F0004100944FF0AE +:10038000000B23F0004350EA01045ED052EA03045C +:100390005BD0C3F30A54C1F30A552C44A4F2F334DE +:1003A0000194A0FB0254C1F3130141F48011C3F383 +:1003B000130343F4801301FB024400FB034E840A41 +:1003C000970A44EA815447EA8357A4FB07680295D9 +:1003D0008D0A05FB07854FEA932C04FB0C54270577 +:1003E000029D4FEA065847EA1637B5EB08056EEB53 +:1003F000070C870E920E47EA811742EA8312A7FB89 +:100400000201B6EB0B0164EB00042B0D43EA0C3345 +:100410005E1844EB1C50DA465146E7FB0201C5F377 +:1004200013044FEA0B3343EA14534FEA0432019C9E +:1004300043EA0603A4F10C040294009CCDE900B445 +:1004400000F070F903B0BDE8F08F00200146F9E735 +:1004500070B521F0004303430CD0C1F30A550024CA +:10046000D5EB040564EB0403D617AD1AB34102DBE8 +:100470000020014670BD201841EB025170BD96234B +:100480000022114600F011B90EB5C10F80EAE070EC +:100490000844CA07002140F233438DE80E000A46A3 +:1004A0000B4600F03FF903B000BD70B5C1F30A522E +:1004B00001F000450024C1F3130140F2FF3341F481 +:1004C00080119A4201DA002070BD40F233439A4213 +:1004D000A2F2334203DC524200F0BCF800E090404C +:1004E0002C43F1D0404270BDC1F30A5210B5C1F3A4 +:1004F000130140F2FF3341F480119A4201DA0020E7 +:1005000010BD40F233439A42A2F2334203DC52421E +:1005100000F0A0F810BD904010BD00F0004230F097 +:1005200000400AD0C10D01F56071C0F3160042EA27 +:100530000151C2084007114370470020014670472F +:1005400030B5041E71F1000404DB4FF0004440425A +:1005500064EB0101141E73F1000405DB1C464FF02F +:100560000043524263EB0403994208BF904230BDFE +:1005700001F0004330B421F0004150EA010206D0FE +:100580000A0DA2F56072C1F31301002A02DC30BC2F +:1005900000207047440F44EAC104C100E01830BC99 +:1005A00000EBC25000F078B830B50B460146002091 +:1005B0002022012409E021FA02F59D4205D303FA25 +:1005C00002F5491B04FA02F52844151EA2F10102A6 +:1005D000F1DC30BD2DE9F05F0546002092469B46D8 +:1005E00088460646814640241BE028464146474649 +:1005F000224600F02FF853465A46C01A914110D3B4 +:1006000011461846224600F016F82D1A67EB01082D +:100610004F4622460120002100F00DF817EB00099B +:100620004E41201EA4F10104DFDC484631462A4633 +:100630004346BDE8F09F202A04DB203A00FA02F18D +:10064000002070479140C2F1200320FA03F31943C0 +:1006500090407047202A04DB203A21FA02F0002162 +:10066000704721FA02F3D040C2F1200291400843C2 +:1006700019467047202A06DBCB17203A41FA02F0D0 +:1006800043EAE07306E041FA02F3D040C2F12002EF +:1006900091400843194670470029A8BF7047401C85 +:1006A000490008BF20F00100704710B4B0FA80FC88 +:1006B00000FA0CF050EA010404BF10BC704749B1C5 +:1006C000CCF1200421FA04F411FA0CF118BF012135 +:1006D00021430843A3EB0C01CB1D4FEA00614FEA15 +:1006E000102042BF002010BC704700EBC3501044E4 +:1006F0000029A4BF10BC7047401C490008BF20F06F +:10070000010010BC704710B5141E73F1000408DA24 +:10071000401C41F1000192185B411A4301D120F0C5 +:10072000010010BD2DE9F04D92469B4611B1B1FA82 +:1007300081F202E0B0FA80F220329046FFF77BFFB0 +:1007400004460F4640EA0A0041EA0B0153465A4666 +:10075000084313D0114653EA010019D0C8F14002F2 +:100760005046FFF777FF05460E465046594642462B +:10077000FFF761FF084305D0012004E02046394619 +:10078000BDE8F08D0020054346EAE0762C43374370 +:100790000A986305E40AA0EB08000022FD0A44EA77 +:1007A00047540A3002D500200146E9E70105101937 +:1007B0006941DDE9084500196941BDE8F04DA2E74E +:1007C0002DE9F04D81EA030404F0004B21F00045CF +:1007D00014464FF0000A23F0004150EA050220D0F1 +:1007E00054EA01021DD0C5F30A570246C5F31303AC +:1007F000C1F31300C1F30A5640F4801543F480138B +:10080000A7EB0608101BD64608F2FD3873EB05006F +:1008100002D308F1010801E092185B41B8F1000F22 +:1008200003DA00200146BDE8F08D00204FF480116E +:10083000064684460EE0171B73EB050705D3121B13 +:1008400063EB050306434CEA010C49084FEA30000C +:1008500092185B4150EA0107EDD152EA030012D031 +:1008600082EA040083EA0501084305D0101BAB416E +:1008700006D20122002306E000224FF0004302E0EE +:100880006FF0010253101AEB06004CEB085110EB0D +:100890000A0041EB0B01BDE8F04DFFF734BFC1F397 +:1008A0000A52C1F3130140F2FF3341F480119A421E +:1008B00002DA00200146704740F233439A42A2F226 +:1008C000334202DC5242FFF7C5BEFFF7B4BE000060 +:1008D000064C074D06E0E06840F0010394E807008D +:1008E00098471034AC42F6D3FFF726FC686700083F +:1008F000886700082DE9F04D00231A461B1A8A412B +:1009000003DB00200146BDE8F08DC1F30A52C1F3BC +:10091000130141F480154FF0000BD10702D10018EC +:100920006D41521E0027044640F2FF11384601EB8C +:10093000620A3E468046024600204FF48011FFF7CF +:1009400089FEC2197141BB1846EB0100B4EB030CE0 +:1009500075EB000C04D3E41A65EB000517460E4650 +:10096000241908F101006D4180463428E3DDF919AE +:1009700046EB0600091BA84103D24FF0FF32134695 +:1009800001E0002213461BEB070046EB0A51BDE8CD +:10099000F04DFFF7B8BE70B58C1810F8015B15F07C +:1009A000070301D110F8013B2A1106D110F8012BE1 +:1009B00003E010F8016B01F8016B5B1EF9D12B0706 +:1009C00005D40023521E0DD401F8013BFAE710F8BC +:1009D000013BCB1A921C03E013F8015B01F8015BA9 +:1009E000521EF9D5A142D8D3002070BD002904D0F1 +:1009F000816841F0010181607047816821F0010147 +:100A00008160704710B5154988420AD1441501210B +:100A1000204601F0F5FC2046BDE81040002101F021 +:100A2000EFBC0F4988420AD104150121204601F08C +:100A3000E7FC2046BDE81040002101F0E1BC094977 +:100A400088420AD10121CC03204601F0D9FC20467E +:100A5000BDE81040002101F0D3BC10BD00240140CE +:100A600000280140003C01400146002089684907F8 +:100A700000D501207047C06C80B27047024600204C +:100A800012680A4200D001207047014600208968A0 +:100A9000090700D50120704770B500240025194EC4 +:100AA000012207231146304600F054F80121304658 +:100AB00000F08FF802213046FFF7E0FF0028F9D060 +:100AC0003046FFF7D8FF0544022000F0E3FA641C2B +:100AD000E4B2052CE4D30520B5FBF0F0FFF7CFFC22 +:100AE000FFF71BFD4FF06632074BFFF73FFC6FF03F +:100AF0000B02FFF7ADFC0122FFF7AAFCBDE8704036 +:100B0000FFF736BD0024014066660A4010B5426812 +:100B10000E4B1A400C790B6842EA042213434360DF +:100B200082680B4B1A40D1E9024323434C7942EAD5 +:100B3000440213438360C26A22F47002097C491E96 +:100B4000C9B242EA0151C16210BD0000FFFEF0FFD0 +:100B5000FDF7F1FF70B5072609290AD9C568A1F18B +:100B60000A0404EB4404A640B543A3401D43C560FA +:100B700007E0056901EB4104A640B543A3401D43CE +:100B800005611F23072A09D2446B521E02EB820221 +:100B900093409C4391400C43446370BD0D2A09D29D +:100BA000046BD21F02EB820293409C4391400C43A2 +:100BB000046370BDC46A0D3A02EB820293409C4309 +:100BC00091400C43C46270BD816841F008018160AE +:100BD0007047002904D0816841F4A001816070470A +:100BE000816821F4A00181607047816841F00401AF +:100BF0008160704730B587B001214FF4017001F07A +:100C0000F1FB4FF4004001F0D5FB0220ADF80400E9 +:100C100000248DF8074001A9184801F065F8184D27 +:100C20002846FFF7EFFE02948DF80C408DF80D403A +:100C30004FF460210491059401218DF8181002A948 +:100C40002846FFF763FF01212846FFF7CFFE28461D +:100C5000FFF7BAFF2846FFF718FF0028FAD1284609 +:100C6000FFF7C3FF2846FFF7FFFE0028FAD1012156 +:100C70002846FFF7AEFF07B030BD00000008014076 +:100C80000024014010B56FF0040002F0C9FC0948CF +:100C900009490068B0FBF1F00849C0B2087000EBE8 +:100CA0004002C2EBC0104FF6FF7202EAC00048805B +:100CB00010BD00000000002000127A002800002073 +:100CC0002DE9FF410121182001F08CFB012108468C +:100CD00001F088FB43F20200ADF80C0010208DF803 +:100CE0000F0003208DF80E00244C03A9204600F0CD +:100CF000FBFF0221204601F051F86114204601F06B +:100D00004DF8A114204601F049F84FF4C040ADF869 +:100D10000C0048208DF80F00194F03A9384600F049 +:100D2000E3FF4FF4C06001F021FA28248DF8004061 +:100D300000258DF801508DF8025001268DF80360D2 +:100D4000684601F0E1F9F003ADF80C008DF80F40B2 +:100D500003A9384600F0C8FF0F21022000F0B0FFC1 +:100D600001948DF8085008208DF809008DF80A606C +:100D700001A800F06BFFBDE8FF810000000C0140FE +:100D800000100140012080F3138805480168054ADE +:100D900001F4E06111430160BFF34F8FFEE70000F3 +:100DA0000CED00E00400FA057FB50121022001F0FE +:100DB0000BFB0920ADF8080041F61F40ADF8040018 +:100DC0000024ADF80A40ADF806400E4D01A92846B2 +:100DD00002F0FAFC01224121284602F0EAFC1D2122 +:100DE0008DF800108DF8014003218DF802100121CB +:100DF0008DF80310684601F087F90121284602F0BA +:100E0000C0FC7FBD00040040F0B587B0064601215C +:100E1000480401F0D9FA0121042001F0E3FA042486 +:100E2000ADF8184003258DF81A5018218DF81B10C5 +:100E30001E4F06A9384600F057FF0821ADF81810DC +:100E40008DF81B4006A9384600F04EFF4FF4A06015 +:100E500001F08CF926218DF804108DF80550022040 +:100E60008DF8060001208DF8070001A801F04CF96B +:100E700002960020ADF80C00ADF80E00ADF81000A1 +:100E8000ADF814000C20ADF81200094C02A9204660 +:100E900002F0D8FD012240F22551204602F0B7FDB4 +:100EA0000121204602F080FD07B0F0BD000801409E +:100EB0000044004070B586B005460121880401F069 +:100EC00083FA0121082001F08DFA4FF48060ADF81B +:100ED000140003248DF8164018218DF817101F4EAA +:100EE00005A9304600F000FFF114ADF814100421FC +:100EF0008DF8171005A9304600F0F6FE4FF4A060FB +:100F000001F034F927208DF800008DF801408DF8AC +:100F1000024001208DF80300684601F0F5F80195C4 +:100F20000020ADF80800ADF80A00ADF80C00ADF8EF +:100F300010000C20ADF80E00094C01A9204602F06B +:100F400081FD012240F22551204602F060FD012181 +:100F5000204602F029FD06B070BD0000000C0140E3 +:100F6000004800402DE9F04105460F4600240C4E94 +:100F70000BE04021304602F023FD0028F9D0295D26 +:100F8000304602F0C1FD641CA4B2BC42F1D3402142 +:100F9000304602F015FD0028F9D0BDE8F0810000D0 +:100FA0000048004070B54FF400512C4800F0EFFEAF +:100FB0002B4C0025A8B1A572A089B0F5967F4BD324 +:100FC000A078642801D2401CA070FFF765FD606026 +:100FD000244988423EDD2449884205DD6420607250 +:100FE00039E00120A072E7E72049884202DD5A205B +:100FF000607230E01E49884202DB502060722AE0B5 +:101000001C49884202DB4620607224E01A4988426B +:1010100002DD3C2060721EE01849884202DD322069 +:10102000607218E01649884202DD2820607212E0E2 +:101030001449884202DB1E2060720CE0124988428B +:1010400002DB1420607206E01049884203DB0A20AC +:10105000607200E06572A58170BD00000010014063 +:10106000E4050020B81E6540B81E85405C8F8240B4 +:101070007B147E409A9979408FC275405C8F724094 +:10108000D7A3704052B86E40A4706D409A996940E1 +:10109000FEE770470B49498848434FF0E02148611B +:1010A00000238B61086940F0010008610869C207EC +:1010B00001D0C003FAD5086920F0010008618B61F6 +:1010C00070470000280000200B49097848434FF082 +:1010D000E021486100238B61086940F0010008614C +:1010E0000869C20701D0C003FAD5086920F00100E1 +:1010F00008618B6170470000280000202DE9F04155 +:101100002B4C0127FD03207E2A4E4FF002080028B9 +:1011100016D12946304600F03AFE80B1C820FFF7CC +:10112000B9FF2946304600F032FE48B12946304624 +:1011300000F02DFE0028F9D184F8198000E06776D0 +:10114000207E012814D12946304600F020FE78B1D7 +:10115000C820FFF79FFF2946304600F018FE38B13F +:101160002946304600F013FE0028F9D184F8198092 +:10117000207E022817D12946304600F008FE0028BC +:1011800011D0C820FFF786FF2946304600F0FFFD4A +:10119000002808D02946304600F0F9FD0028F9D192 +:1011A000A07A10B16776BDE8F08103206076FAE797 +:1011B000E4050020001001402DE9F0412B4C207E79 +:1011C000627E90424FD001273E03294D022A10D162 +:1011D0003146284600F0E2FD01F0D2F9227E62B1EC +:1011E0003146284600F0DCFDA77601F0A9F8022080 +:1011F0002076607E012803D01EE001F04FFBF3E76C +:101200000221284600F0CAFD3146284600F0C6FDFE +:10121000227E12B1022A03D00DE001F03FFB0AE06A +:10122000002001F0B7FD01F039FB002020723146AB +:10123000284600F0B5FD2776607E032813D14FF4D1 +:101240007A70FFF727FF0221284600F0A7FD3146FC +:10125000284600F0A3FD4FF40051284600F09EFD03 +:1012600003202076FEE7BDE8F0810000E4050020C1 +:10127000000C01402DE9F04180461746002400296A +:1012800001D00D4603E04046FEF7AAFF85B2134E9B +:1012900019E05FB1022C09D14021304602F090FBE9 +:1012A0000028F9D03946304602F02EFC4021304665 +:1012B00002F086FB0028F9D018F80410304602F03E +:1012C00023FC641CA4B2AC42E3D34021304602F0BC +:1012D00077FB0028F9D0BDE8F08100000044004011 +:1012E00070B590B005460E463C2101A8FEF75BFFA5 +:1012F0004FF4E130FFF788FD4FF47A742046FFF792 +:10130000C9FE2046FFF7C6FE09E000F021FBC82217 +:1013100039A13AA000F00CFC2046FFF7BBFEC82222 +:1013200035A13AA000F004FC0028EED1C82232A179 +:1013300038A000F0FDFB0028F8D1C8222EA137A06C +:1013400000F0F6FB0028F8D10A20FFF7A3FEC82220 +:1013500029A139A000F0ECFB0028F8D1C82226A171 +:1013600039A000F0E5FB0028F8D12046FFF792FEF7 +:101370002046FFF78FFE2046FFF78CFE2046FFF742 +:1013800089FE3C2101A8FEF70EFF33462A4631A113 +:1013900001A802F0BFFB224617A101A800F0C8FB7C +:1013A0000028F8D1C82214A131A000F0C1FB002808 +:1013B000F8D14FF4FA7422460FA131A000F0B8FB27 +:1013C0000028F8D14FF496752A460BA139A000F0F9 +:1013D000AFFB0028F8D1C82207A13AA000F0A8FB73 +:1013E0000028F8D13B4B188021463B48FEF7DBFE36 +:1013F00010B0002070BD00004F4B000041542B4343 +:1014000049504D4F44453D300D0A000041540D0AEE +:1014100000000000415445300D0A000041542B5596 +:101420004152543D3131353230302C382C312C3052 +:101430002C300D0A0000000041542B43574D4F44FF +:10144000453D320D0A00000041542B5253540D0A01 +:101450000000000041542B43575341503D22257357 +:10146000222C222573222C312C340D0A000000007E +:1014700041542B4349504D55583D300D0A00000052 +:1014800041542B43495053544152543D22554450EA +:10149000222C223235352E3235352E3235352E324C +:1014A0003535222C36303135362C34323235342C29 +:1014B000300D0A0041542B4349504D4F44453D31B6 +:1014C0000D0A000041542B43495053454E440D0A28 +:1014D0000000000036000020FC0100200146002032 +:1014E000054A1288130406D5044BC2F30E02985421 +:1014F0001846FEF763BE704736000020FC0100204E +:101500002DE9F0475A4F3888000444D5594DDFF88B +:10151000688100262878594CDFF864914FF4FA7AF4 +:1015200002282ED199F800007B282AD15146204666 +:10153000FEF739FE6E806A8819F80200A0547D28F3 +:1015400002D0521C6A80F6E74C4803F049F8286143 +:10155000D8B14CA103F026F8026946484BA11430DB +:1015600002F0D8FA4AA1286903F01CF80269414840 +:1015700046A1283002F0CEFA03202870286902F034 +:10158000EDFF28780A2808D021E051463C48FEF7B4 +:101590000AFEA8F80060BDE8F087388820F4004013 +:1015A000E8800D2109F8001048440A214170514695 +:1015B0003A48FEF7F8FD2F4A39A15032374802F079 +:1015C000A9FA36492E4803F0F7F8012805D051460C +:1015D0002B48FEF7E8FD3E80DDE751462748FEF741 +:1015E000E2FD6E80698819F801007B2802D0491C51 +:1015F0006980F7E7AE80A888431819F803202254C1 +:101600007D2A07D103EB090253780D2B02D1927882 +:101610000A2A02D0401CA880EDE7184802F0E0FF3B +:101620002861E8B122A102F0BDFF01468069C969C5 +:10163000FEF75AFF214CA07421A1286902F0B2FFE5 +:1016400001468069C969FEF74FFFE074286902F01E +:1016500085FF51460A48FEF7A6FDA8F800609AE704 +:1016600051460748FEF79FFDA8F8006093E7000089 +:10167000360000203C000020380000200808002030 +:10168000FC010020737369640000000025730000F2 +:1016900070617373776F726400000000140600209D +:1016A0007374617475732F7365742F257300000054 +:1016B00072656C617953746174757300E405002080 +:1016C000726564002DE9FC47574E3078012836D00A +:1016D000564F4FF000084FF4FA61022836D0032825 +:1016E0003DD0042841D00A254FF4FA79052849D085 +:1016F0000A2822D1F88A88421FD349464C48FEF76F +:1017000052FDFB8D06F150024AA1494802F002FA4F +:10171000F06000280FDD0124CDE90045B0890023E9 +:1017200082B2434953A000F0E5FB0028F4D14946BA +:101730005248FEF738FDA7F81680BDE8FC8750A197 +:1017400052A0FFF7CDFD02203070F6E7B88A88423C +:10175000F3D353A000F01EFAA7F81480EDE759A0C8 +:1017600000F018FA04203070E7E700F067F92E491E +:101770002831A1F1140000F025F90028F7D1052047 +:101780003070DAE75948782120F8021B2649643185 +:10179000FEF72DFD24495548C8313430FEF727FDAA +:1017A00021495248DC316630FEF721FDC82250A1A4 +:1017B00050A000F0BDF90028F8D149461C48FEF7BA +:1017C000F2FC194A4FA13C321948B36802F0A2F961 +:1017D0004A4647A1164800F0ABF90028F8D1C822C4 +:1017E00043A14FA000F0A4F90028F8D1C82240A1DD +:1017F0004FA000F09DF90028F8D100F0D5FA00289C +:10180000FBD149460A48FEF7CEFC074A4CA15032AC +:10181000074802F07FF90C220021054800F008FC7F +:101820000028F8D1357088E73C000020E40500204E +:10183000140600207B226465766963654E756D220F +:101840003A222573222C2269734F6E6C696E6522D1 +:101850003A312C2261697254656D706572617475DC +:101860007265223A25642C2272656D61726B223A90 +:1018700022227D007374617475730000FC010020E6 +:101880006173647177653938363700005869616F64 +:1018900059695F494F545F416972426F7800000097 +:1018A0007B22636F6465223A302C226D7367223A83 +:1018B00022737461727420636F6E6E656374227D2F +:1018C000000000007B22636F6465223A312C226D98 +:1018D0007367223A2267657457696669496E666F55 +:1018E0003A73756363657373227D0000FA0B002001 +:1018F0004F4B000041542B4349504D55583D300D3E +:101900000A00000041542B43495053544152543D66 +:1019100022544350222C222573222C25640D0A00C8 +:1019200041542B4349504D4F44453D310D0A000071 +:1019300041542B43495053454E440D0A00000000CA +:101940007374617475732F7365742F2573000000B1 +:1019500010B5184C4021204602F032F80028F9D08A +:101960002B21204602F0D0F80F20FFF793FB4021F7 +:10197000204602F025F80028F9D02B21204602F05D +:10198000C3F80F20FFF786FB4021204602F018F82D +:101990000028F9D02B21204602F0B6F84FF4FA7057 +:1019A000FFF778FBBDE81040142203A103A000F06C +:1019B000BFB80000004400404F4B000041540D0AE6 +:1019C0000000000030B58FB004460D463C2168464B +:1019D000FEF7E9FB3C216846FEF7E5FB2B46224675 +:1019E0000BA1684602F096F864220FA1684600F049 +:1019F0009FF810B101200FB030BD0E4900200880C3 +:101A00004FF4FA710C48FEF7CEFB0020F3E700001C +:101A100041542B43574A41503D222573222C222505 +:101A200073220D0A000000005749464920474F54D1 +:101A30002049500036000020FC01002070B54FF412 +:101A4000E130FFF7E1F94FF47A742046FFF722FB0B +:101A50002046FFF71FFB4FF4487509E0FFF778FFBA +:101A6000C8221CA11CA000F063F82846FFF712FB57 +:101A7000C82218A11CA000F05BF80028EED1C822F3 +:101A800014A11BA000F054F80028F8D1C82211A11D +:101A900019A000F04DF80028F8D10A20FFF7FAFA53 +:101AA000C8220CA11BA000F043F80028F8D1C822DE +:101AB00008A11CA000F03CF80028F8D12046FFF750 +:101AC000E9FA2046FFF7E6FA2046FFF7E3FA01209D +:101AD00070BD00004F4B000041542B4349504D4F07 +:101AE00044453D300D0A000041540D0A000000003D +:101AF000415445300D0A000041542B554152543D8C +:101B00003131353230302C382C312C302C300D0A1C +:101B10000000000041542B43574D4F44453D310DCB +:101B20000A00000041542B5253540D0A00000000DB +:101B30002DE9F04180460F461446144D00262E80B4 +:101B40004FF4FA711248FEF72EFB00221146404670 +:101B5000FFF790FBC7B18CB916E00A20FFF79AFA9D +:101B60002A8810040AD53846FFF7B8FC18B12E8031 +:101B70000020BDE8F0812E800120FAE7641E2404D5 +:101B8000240CEAD10120F4E70120F2E7360000201E +:101B9000FC0100200FB4F0B5CDB04FF4967102A84F +:101BA000FEF701FB002453AA02A8529901F0C6FFD8 +:101BB0000020019002A8FEF713FB86B20D4F02AD84 +:101BC0000BE04021384601F0FBFE0028F9D0295DEA +:101BD000384601F099FF641CA4B2B442F1D340210D +:101BE000384601F0EDFE0028F9D04DB00020F0BCE1 +:101BF0005DF814FB0044004010B54FF4004420464B +:101C000000F014F8002808D0204600F009F8034836 +:101C1000007E002801D1FFF7B5F810BDE4050020D3 +:101C2000014908607047000014040140014600208B +:101C3000054A12680A40044B14331B680B4202D059 +:101C4000002A00D0012070470004014030B51B4A33 +:101C500083790168002B2AD013688B431360111D10 +:101C60000B680468A3430B60017911440B68046896 +:101C700023430B60114C08342168036899432160A9 +:101C8000231D19680568A94319604179102905D0F9 +:101C900011440A68006802430A6030BD2168026886 +:101CA00011432160196800680143196030BD007953 +:101CB000104402688A43026030BD00000004014005 +:101CC00010B58A07120F0F23934021F00304054932 +:101CD00021448C689C438C608B68904003438B60EC +:101CE00010BD0000000001402DE9F0410022CC7839 +:101CF00004F00F03E40601D58C7823430C784FF0F1 +:101D00000F0714F0FF0F4FF0010C1CD005680CFA00 +:101D100002F40E882640A64211D1960007FA06F872 +:101D200025EA080503FA06F848EA0505CE78282EC4 +:101D300002D0482E02D002E0446100E00461521C4F +:101D4000082AE4D305600A88FF2A1ED945680022C4 +:101D500002F108060CFA06F40E882640A64210D1BD +:101D6000960007FA06F825EA080503FA06F848EA95 +:101D70000505CE78282E00D14461CE78482E00D1BA +:101D80000461521C082AE3D34560BDE8F081024695 +:101D9000002092680A4200D00120704741617047DC +:101DA00001617047FEE700002DE9F0474D4D4FF40B +:101DB000FA794946A5F802904B48FEF7F4F94A4CE7 +:101DC000102020704FF0000884F8018084F8028011 +:101DD0000420E0704D212171512161715421A171C4 +:101DE000E1712072C220607204F5FA763088010A2F +:101DF000A172E0720C20A880B01CFEF7F1F9C2B20B +:101E00002A70A88804F8008020444270801CB11C0D +:101E1000FEF7B0F9A88829780844801CA88004F54A +:101E20000A700646FEF7DCF9C2B22A70A88804F8E8 +:101E3000008020444270801C3146FEF79BF9A88840 +:101E400029780844801CA88004F25A200646FEF730 +:101E5000C7F9C2B22A70A88804F8008020444270F2 +:101E6000801C3146FEF786F9A88829780844801C32 +:101E700086B2AE807F2E12D2B01E60701B4FA7F8C4 +:101E8000008049461A48FEF78EF900223146204666 +:101E9000FFF7F0F9688818B3154C02260FE001200F +:101EA000BDE8F0870A20FFF7F5F83888000406D56A +:101EB0002078B6EB101F02D16078022807D068881E +:101EC000401E0004000C6880ECD10120E8E7E078B7 +:101ED00010B1A7F80080FEE7A7F800800020DFE738 +:101EE0000120DDE740010020060A00203600002026 +:101EF000FC0100202DE9FF5F8346DDE90E47924695 +:101F00001E46474D4FF4FA794946A5F802904548D8 +:101F1000FEF749F9F000434E00EB440030303070DA +:101F20004FF0000886F801800220A8805846FEF78E +:101F300057F9C2B22A70A88806F80080304442706F +:101F4000801C5946FEF716F9A88829780844801C99 +:101F500080B2A880012C01D0022C05D1390A31545D +:101F600031184F70801CA8800AF0FF022A7042B11D +:101F7000A88801993044FEF7FDF8A888297808441C +:101F8000A880A5F80880A5F80A80AF88812F02D81C +:101F9000B81E70700EE0B81E80B200F07F0129817B +:101FA000C009E88030B141F08001298100F07F0054 +:101FB000688171701C4EA6F8008049461B48FEF7E8 +:101FC000F2F8AA7A39461748FFF754F9012C05D0E0 +:101FD000022C03D0002004B0BDE8F09F6888C0B197 +:101FE0004FF00409114F0EE00A20FFF753F8308834 +:101FF000000408D53878B9EB101F04D1787802288E +:1020000001D1012C07D06888401E0004000C6880B4 +:10201000EAD10120DFE7A6F800800020DBE700001E +:1020200040010020060A002036000020FC010020AC +:102030002DE9F0478246884691462E4C4FF4FA77B8 +:10204000394667802C48FEF7AEF82B4D8220287069 +:1020500000266E70AE70284680F803900420A080A1 +:102060005046FEF7BDF8C2B22270A0882E54284414 +:102070004270801C5146FEF77DF8A0882178084404 +:10208000801C80B205F80080401C1FFA80F8A4F87C +:102090000480B8F17F0F13D2A8F102006870174DC9 +:1020A0002E8039461648FEF77EF800224146124837 +:1020B000FFF7E0F86088D8B1114F4FF009080FE042 +:1020C0000120BDE8F0870A20FEF7E4FF288800041D +:1020D00006D53878B8EB101F02D12E800020F0E72B +:1020E0006088401E0004000C6080ECD10120E8E70D +:1020F0000120E6E740010020060A0020360000200B +:10210000FC010020FEE7704770B50F23C27801265E +:102110000178002A1ED0144A126802F4E062C2F567 +:10212000E062120AC2F10404D3404578A5408278E7 +:102130001A402A43120101F1E02181F800240078BD +:1021400000F01F018E404009800000F1E020C0F83F +:10215000006170BD01F01F0086404809800000F159 +:10216000E020C0F8806170BD0CED00E0024908433A +:1021700002490860704700000000FA050CED00E01D +:1021800010B50021002400220378422B10D143789F +:102190004D2B0DD1435C1A4492B2491CC9B21E2981 +:1021A000F8D3C17F807F01EB0020904200D1FF2453 +:1021B000204610BD2DE9F0475D4C5E4D4FF0000606 +:1021C000208800041AD55C48FFF7DAFFFF280FD1FA +:1021D00059484179027901EB02212985C179827937 +:1021E00001EB02216985417A007A01EB0020A88584 +:1021F00026804FF4FA715048FDF7D5FF288AB0F5D4 +:10220000FA6F03D3E22000F0ABF82E82698C288DA0 +:102210004A4F0A266FF0130A4FF482794FF0640890 +:10222000814227D039880AEB9104B0FBF8F0C2B2A2 +:1022300004F1080080B21032494600F00DFF288DED +:10224000B0FBF6F0B0FBF6F106FB110204F1100052 +:1022500080B21032494600F0FFFE288DB0FBF6F147 +:1022600006FB11021834A0B21032494600F0F4FE09 +:10227000288D6884A98C688D814229D039880AEB21 +:1022800051044FF0500AB0FBF8F0C2B204F108005C +:1022900080B21032514600F0DFFE688DB0FBF6F0E0 +:1022A000B0FBF6F106FB110204F1100080B210320F +:1022B000514600F0D1FE688DB0FBF6F106FB11022D +:1022C0001834A0B21032514600F0C6FE688DA884C2 +:1022D000A88DE98C884229D03988890801EB41040E +:1022E000103CB0FBF8F0C2B204F1080080B210322A +:1022F000494600F0B1FEA88DB0FBF6F0B0FBF6F158 +:1023000006FB110204F1100080B21032494600F0C1 +:10231000A3FEA88DB0FBF6F106FB11021834A0B2A3 +:102320001032494600F098FEA88DE884BDE8F08799 +:1023300038000020E4050020F0030020FC09002004 +:1023400010B54FF41650FEF7B5FD02210348FFF714 +:1023500027FDBDE810401420FEF79CBE000C014094 +:1023600030B585B00546002414216846FDF71BFFF3 +:10237000002142228DF800204D228DF801208DF899 +:10238000025000208DF803008DF804006846425C7E +:10239000224494B2491CC9B20529F8D3200A8DF809 +:1023A00005008DF8064007216846FEF7DBFD05B005 +:1023B00030BD7047034A516821F4404101435160E8 +:1023C0007047000000100240054A002903D0D1697F +:1023D0000143D1617047D1698143D16170470000E9 +:1023E00000100240054A002903D091690143916120 +:1023F000704791698143916170470000001002406D +:10240000054A002903D0D1680143D1607047D168E3 +:102410008143D160704700000010024010B5264A89 +:10242000516801F00C01254B002927D0042927D041 +:10243000082927D00360516801F0F0010909204BF9 +:102440005C5C0168E1404160546804F4E064240A83 +:102450001C5D21FA04F48460546804F46054E40AB6 +:102460001B5DD940C160526802F44042920B144B8C +:102470001B1F9A5CB1FBF2F1016110BD0360DAE74A +:102480000360D8E7516801F47011536803F4803396 +:10249000022404EB914133B153689B0307D5094BE8 +:1024A00059430160C7E7074B59430160C3E7034B3A +:1024B00059430160BFE700000010024000127A009B +:1024C0001800002000093D00704700F001B800002E +:1024D0000CB50022019200922748016841F4803136 +:1024E00001604FF4A063016801F40031009101998B +:1024F000491C0191009911B901999942F3D10168E0 +:10250000890302D50121009100E000920099012980 +:1025100030D11A490A6842F010020A600A6822F0B3 +:1025200003020A600A6842F002020A6041684160E0 +:1025300041684160416841F480614160416821F433 +:102540007C114160416841F4E8114160016841F04B +:102550008071016001688901FCD5416821F00301A7 +:102560004160416841F0020141604168C1F381016D +:102570000229FAD10CBD00000010024000200240E8 +:102580002DE9F0412D4C2088400861880325B1FBDE +:10259000F5F10A3189B22A4E47F6FF7232805A238A +:1025A000642200F0B1FC2088800800EB40006188C4 +:1025B0000627B1FBF7F2B1FBF5F102EB410189B25D +:1025C0004FF6E07232802D23322200F09DFC2088ED +:1025D00080086188B1FBF7F2B1FBF5F102EB410134 +:1025E00089B248F21F4232802D23322200F08CFC47 +:1025F00020886FF0170101EB500080B2282100F015 +:1026000004FF20886FF0130505EB500080B2B42161 +:1026100000F020FF208805EB900080B2E6252946D7 +:1026200000F0CEFE2088800800EB4000103880B219 +:102630002946BDE8F04100F0A5BE0000FC090020DD +:102640002E0100202DE9F041914FF889B0F5FA7F75 +:102650007BD3B878022878D300243846B97A007E34 +:10266000012903D110B14FF4FC6403E0022801D129 +:102670004FF6FF74787A397A002688427ED0DFF8E8 +:10268000148250282ED3A8F800400C242346CD22D3 +:102690002146CA2000F0DEFB641CE4B2132CF5D303 +:1026A0000C242346D2222146CF2000F0D3FB641C09 +:1026B000E4B2132CF5D30C242346D7222146D42090 +:1026C00000F0C8FB641CE4B2132CF5D30C242346A1 +:1026D000DC222146D92000F0BDFB641CE4B2132C9F +:1026E000F5D3CAE03C2831D3A8F800600C252B466E +:1026F000CD222946CA2000F0ADFB6D1CEDB2132D92 +:10270000F5D3A8F800400C242346D2222146CF203E +:1027100000F0A0FB641CE4B2132CF5D30C24234678 +:10272000D7222146D42000F095FB641CE4B2132C80 +:10273000F5D30C242346DC222146D92000F08AFB65 +:10274000641CE4B2132CF5D397E09EE0282832D322 +:10275000A8F800600C252B46CD222946CA2000F09F +:1027600079FB6D1CEDB2132DF5D30C252B46D2222F +:102770002946CF2000F06EFB6D1C00E084E0EDB236 +:10278000132DF3D3A8F800400C242346D72221466A +:10279000D42000F05FFB641CE4B2132CF5D30C24AE +:1027A0002346DC222146D92000F054FB641CE4B20D +:1027B000132CF5D361E0142830D3A8F800600C2561 +:1027C0002B46CD222946CA2000F044FB6D1CEDB2F9 +:1027D000132DF5D30C252B46D2222946CF2000F00D +:1027E00039FB6D1CEDB2132DF5D30C252B46D722EA +:1027F0002946D42000F02EFB6D1CEDB2132DF5D32D +:10280000A8F800400C242346DC222146D92000F001 +:1028100021FB641CE4B2132CF5D32EE068B3A8F8B6 +:1028200000600C242346CD222146CA2000F012FB72 +:10283000641CE4B2132CF5D30C242346D222214687 +:10284000CF2000F007FB641CE4B2132CF5D30C245A +:102850002346D7222146D42000F0FCFA641CE4B2BF +:10286000132CF5D30C242346DC222146D92000F07A +:10287000F1FA641CE4B2132CF5D34FF480510648EE +:10288000FFF78EFA787A3872FE81BDE8F081000099 +:10289000E40500202E010020000C014010B518496D +:1028A0004FF6FF7008800923DE221946C82000F089 +:1028B000D1FA1523DE221946C82000F0CBFAC8222F +:1028C00015230921104600F0C5FADE22152309213F +:1028D000104600F0BFFA0D23C8221946C52000F0AB +:1028E000B9FAC52211230D21104600F0B3FA1123C5 +:1028F000C822BDE810401946C52000F0ABBA000060 +:102900002E01002070B5404DA88BB0F5FA6F7AD338 +:102910000024A87E3D49002647F6FF72012808D012 +:10292000022814D0032821D004282ED005283BD01B +:1029300068E00A80234620222146002000F08AFA1F +:10294000641CE4B20D2CF5D30220A8765AE00A806C +:102950000F24234618222146002000F07BFA641C35 +:10296000E4B21C2CF5D30320A8764BE00A801E2489 +:10297000234610222146002000F06CFA641CE4B2C9 +:102980002B2CF5D30420A8763CE00A802D24234686 +:1029900008222146002000F05DFA641CE4B23A2CC3 +:1029A000F5D30520A8762DE00E802346202221466F +:1029B000002000F04FFA641CE4B20D2CF5D30F2474 +:1029C000234618222146002000F044FA641CE4B299 +:1029D0001C2CF5D31E24234610222146002000F093 +:1029E00039FA641CE4B22B2CF5D32D24234608229B +:1029F0002146002000F02EFA641CE4B23A2CF5D3F4 +:102A00000120A876AE8370BDE40500202E010020D1 +:102A100010B5112000F044FD1420FEF73BFBD02040 +:102A200000F03EFD072000F05DFD422000F05AFD61 +:102A30001D2000F057FDD12000F032FD002000F0F5 +:102A400051FD1A2000F04EFD092000F04BFDD22070 +:102A500000F026FD012000F045FD222000F042FD9F +:102A6000C02000F01DFD102000F03CFD3B2000F0D8 +:102A700039FD002000F036FD022000F033FD11206A +:102A800000F030FDC52000F00BFD032000F02AFD12 +:102A9000C82000F005FD002000F024FD252000F0F6 +:102AA00021FD212000F01EFD052000F01BFD00206F +:102AB00000F018FD0A2000F015FD652000F012FD61 +:102AC000252000F00FFD772000F00CFD502000F0D5 +:102AD00009FD0F2000F006FD002000F003FDF820A6 +:102AE00000F0DEFC012000F0FDFCFE2000F0D8FC30 +:102AF000002000F0F7FC022000F0F4FC202000F0A1 +:102B0000CFFC362000F0CCFC082000F0EBFC3A2093 +:102B100000F0C6FC552000F0E5FC2B2000F0C0FCC6 +:102B2000002000F0DFFC002000F0DCFC012000F0C1 +:102B3000D9FC3F2000F0D6FC2A2000F0B1FC002098 +:102B400000F0D0FC002000F0CDFC012000F0CAFC19 +:102B5000DF2000F0C7FC7820FEF79CFABDE81040AB +:102B6000292000F09DBC10B5CF2000F099FC00207A +:102B700000F0B8FCC12000F0B5FC302000F0B2FC41 +:102B8000ED2000F08DFC642000F0ACFC032000F090 +:102B9000A9FC122000F0A6FC812000F0A3FCE82094 +:102BA00000F07EFC852000F09DFC102000F09AFCD7 +:102BB0007A2000F097FCCB2000F072FC392000F066 +:102BC00091FC2C2000F08EFC002000F08BFC3420C7 +:102BD00000F088FC022000F085FCF72000F060FC8B +:102BE000202000F07FFCEA2000F05AFC002000F0DA +:102BF00079FC002000F076FCC02000F051FC1B2086 +:102C000000F070FCC12000F04BFC012000F06AFCD9 +:102C1000C52000F045FC302000F064FC302000F0BE +:102C200061FCC72000F03CFCB72000F05BFC3620C4 +:102C300000F036FC482000F055FC3A2000F030FC53 +:102C4000552000F04FFCB12000F02AFC002000F0DD +:102C500049FC1A2000F046FCB62000F021FC0A20B6 +:102C600000F040FCA22000F03DFCF22000F018FC37 +:102C7000002000F037FC262000F012FC012000F0BC +:102C800031FCE02000F00CFC0F2000F02BFC2A208F +:102C900000F028FC282000F025FC082000F022FC91 +:102CA0000E2000F01FFC082000F01CFC542000F057 +:102CB00019FCA92000F016FC432000F013FC0A20A8 +:102CC00000F010FC0F2000F00DFC002000F00AFCCA +:102CD000002000F007FC002000F004FC002000F0C1 +:102CE00001FCE12000F0DCFB002000F0FBFB1520E4 +:102CF00000F0F8FB172000F0F5FB072000F0F2FBD6 +:102D0000112000F0EFFB062000F0ECFB2B2000F080 +:102D1000E9FB562000F0E6FB3C2000F0E3FB052039 +:102D200000F0E0FB102000F0DDFB0F2000F0DAFBEC +:102D30003F2000F0D7FB3F2000F0D4FB0F2000F035 +:102D4000D1FB2B2000F0ACFB002000F0CBFB0020DF +:102D500000F0C8FB012000F0C5FB3F2000F0C2FBE3 +:102D60002A2000F09DFB002000F0BCFB002000F0BA +:102D7000B9FB002000F0B6FBEF2000F0B3FB112000 +:102D800000F08EFB7820FEF785F9BDE81040292081 +:102D900000F086BB70B506460024094801884588C6 +:102DA0004D430021084600F077FA00F0BDFB03E038 +:102DB000304600F097FB641CAC42F9D370BD0000B4 +:102DC000FC0900202DE9F003214A2C272A252B2677 +:102DD00091884FF0F00C49F241384FF4A07446F658 +:102DE000040300280CD0994227D001209071148050 +:102DF000A2F802C0414516D1D771157256721CE077 +:102E000000209071A2F800C05480414501D0994241 +:102E100013D1D7711572567299420ED114804FF4A6 +:102E2000F070508009E02220A1F50943893B09D0C8 +:102E3000D0712120107220205072BDE8F0030020D4 +:102E400000F07CB9D0714F2010724E205072F4E720 +:102E5000FC0900202DE9FE4F4FF0000B0025002655 +:102E6000171AA3EB010881468A46681E002F03DD6E +:102E70004FF00101019107E003D14FF000010191F2 +:102E800002E00190C7F10007B8F1000F03DD4FF039 +:102E90000100009007E003D14FF00000009002E035 +:102EA0000090C8F10008474501DD3C4600E044467B +:102EB000601C029015E01FFA8AF11FFA89F000F0F9 +:102EC00015F83D444644A54202DD2D1B019881447E +:102ED000A64202DD361B009882440BF1010B1FFA5B +:102EE0008BFB02988345E6DDBDE8FE8F10B500F050 +:102EF000D3F900F019FB03484088BDE8104000F00A +:102F0000F1BA00002C0100202DE9FC5F80468B46C1 +:102F100017469A4229D302FB02FA5B430093ABEBBC +:102F2000070085B20BEB070001901BE0A8EB070040 +:102F300084B208EB0709A5EB0B060FE0A4EB080031 +:102F4000404306FB0600504506D80099884203D945 +:102F500029462046FFF7CAFF641CA4B2A145EDD85C +:102F60006D1CADB20198A842E0D8BDE8FC9F0000FE +:102F7000F8B501211C20FFF735FA4FF47070ADF859 +:102F8000000010208DF8030003208DF80200694630 +:102F90002F48FEF7A9FE2E484FF400711030016053 +:102FA00040210160802101608115016000F0FAFA82 +:102FB0003220FEF76FF83220FEF76CF8254C46F60B +:102FC000040649F24135A088FF2806D3A0F57F41C9 +:102FD000FF3902D0B0F5134F29D1D32000F060FAA9 +:102FE00000F08CF800F08AF800F088F80002A08069 +:102FF00000F084F8A188C0B20843A080A84210D095 +:10300000BF2000F04DFA00F079F800F077F800F0FA +:1030100075F80002A08000F071F8A188C0B20843E2 +:10302000A080A088A84202D0B04200D0A580A0888D +:10303000A84202D1FFF797FD03E0B04201D1FFF7AC +:10304000E7FC0020FFF7BEFE0020FFF7A3FEF8BD5F +:10305000000C0140FC0900202DE9F84F07460C4602 +:103060004FF00008A1462248DFF888A000EB0210CC +:10307000DFF884B00090009810F808600025300652 +:1030800004D54FF6FF70AAF8020002E00020AAF86B +:10309000020021463846FFF729FF7006060E641C21 +:1030A000A4B2BBF80000B84205D84FF6FF70AAF8EA +:1030B0000200BDE8F88FA4EB090010280BD06D1CAE +:1030C000EDB2082DDBD308F1010808F0FF08B8F1D4 +:1030D000100FD0D3EDE74C467F1CBFB2BBF8000009 +:1030E000B842F0D84FF6FF70AAF80200E1E70000FE +:1030F000A85C00082C010020FC0900202DE9F0410B +:1031000000F028FA0C4C4FF4807020608020206082 +:103110004026201D0660451505600120FDF7D4FFFF +:1031200000F008FA07460120FDF7CEFF2660256073 +:103130003846BDE8F0810000100C014070B5002455 +:10314000544D46F604022946AB798988012B18D1E3 +:10315000914216D0082814D2DFE800F00406080ACD +:103160000C0E101206200CE007200AE0042008E0F4 +:10317000052006E0012004E0002002E0032000E03A +:103180000220A1F51343413B01D0914259D10828B7 +:1031900012D2DFE800F0110406080A0C0E10802499 +:1031A0000AE0402408E0C02406E0202404E0602473 +:1031B00002E0A02400E0E024362044F0080491421C +:1031C00001D144F0020400F06BF9204600F08AF9C6 +:1031D000A00606D528886988884208D22980688098 +:1031E00005E028886988884201D929806880287A82 +:1031F00000F056F9002000F075F9002000F072F997 +:103200002888401EC0F30F2000F06CF92878401E7B +:10321000C0B200F067F9687A00F042F9002000F0CF +:1032200061F9002000F05EF96888401EC0F30F20AD +:1032300000F058F9A878BDE87040401EC0B200F018 +:1032400051B9082812D2DFE800F0040608110A0C70 +:103250000E1030240AE0102408E0202406E0382470 +:1032600004E0282402E0182400E00824A1F5094025 +:10327000893809D0032044F4805400F011F9204625 +:10328000BDE8704000F02EB9112046F240010C4319 +:10329000F3E70000FC09002070B504460E461A4D05 +:1032A0002846AA88007AA2F51341413907D0A2F531 +:1032B000D041043903D0A979012913D016E000F0D8 +:1032C000EFF8200A00F00EF9E0B200F00BF9687A8E +:1032D00000F0E6F8300A00F005F9F0B2BDE8704001 +:1032E00000F000B92988091B491E8CB200F0D8F8FB +:1032F000204600F0F7F8287A00F0D2F83046BDE812 +:10330000704000F0EFB80000FC0900202DE9F84FF4 +:1033100082460C460027A046184902EBC20001EB8A +:103320008000DFF85C9000900098C65D00254FF6A5 +:10333000FF7B300602D5A9F802B002E00020A9F810 +:10334000020021465046FFF7D1FD7006060E641CB0 +:10335000A4B2A4EB0800182809D06D1CEDB2082D0A +:10336000E7D37F1CFFB2242FDED3BDE8F88F44469D +:103370000AF1010A1FFA8AFAF3E7000098620008CE +:103380002C01002070B504460D4630222946204607 +:10339000FFF762FE04F1080080B22D222946FFF7F4 +:1033A0005BFE04F1100080B211222946FFF754FEA3 +:1033B0001834A0B22946BDE870401022FFF74CBE79 +:1033C00070B504460D46302229462046FFF744FEDC +:1033D00004F1080080B22D222946FFF73DFE04F1DA +:1033E000100080B211222946FFF736FE04F11800C2 +:1033F00080B20E222946FFF72FFE2034A0B22946C4 +:10340000BDE870401022FFF727BE70B504460D4698 +:10341000002229462046FFF779FF04F10C0080B214 +:1034200001222946FFF772FF04F1180080B2022240 +:103430002946FFF76BFF04F1240080B203222946DE +:10344000FFF764FF3034A0B22946BDE87040042283 +:10345000FFF75CBF70B504460D465522294620464D +:10346000FFF7FAFD04F1080080B247222946FFF772 +:10347000F3FD04F1100080B20F222946FFF7ECFDA6 +:1034800004F1180080B24D222946FFF7E5FD2034F3 +:10349000A0B22946BDE870401322FFF7DDBD000051 +:1034A0002DE9F041064600F07DF80D4C4FF4807098 +:1034B00020604020251F2860C70027600120FDF7FD +:1034C00003FE304600F096F80120FDF7FDFD802652 +:1034D00026600120FDF7F8FD2E602F60BDE8F08129 +:1034E000140C01402DE9F041064600F05BF80D4C4C +:1034F0004FF48070206040202060C500271D3D6093 +:103500000120FDF7E1FD304600F074F80120FDF7E1 +:10351000DBFD80263E600120FDF7D6FD266025609C +:10352000BDE8F081100C01400148C079FFF7B8BF39 +:10353000FC09002005488068C1B2054800684FF4C6 +:103540007F4202EAC000084480B270470010014088 +:1035500008080140F8B5104C207801281AD0FF2047 +:10356000ADF8000004268DF8036003258DF80250A5 +:1035700069460A48FEF7B8FB4FF4FF50ADF800006B +:103580008DF803608DF8025069460548FEF7ACFBE4 +:1035900001202070F8BD00002C0100200010014027 +:1035A00000080140F8B5104C207802281AD0FF20FE +:1035B000ADF8000010268DF8036003258DF8025049 +:1035C00069460A48FEF790FB4FF4FF50ADF8000043 +:1035D0008DF803608DF8025069460548FEF784FBBC +:1035E00002202070F8BD00002C01002000100140D6 +:1035F00000080140C1B2084A1161C943C9B2516112 +:10360000010A4901054A11606FEA10200006C00C4A +:10361000111D0860704700000010014010080140B3 +:103620004FF0E021042804D0086920F0040008616C +:103630007047086940F00400086170477047000057 +:1036400010B50F48016841F00101016041680D4A61 +:103650001140416001680C4A11400160016821F489 +:1036600080210160416821F4FE0141604FF41F0197 +:103670008160FEF72AFF05494FF00060086010BD29 +:10368000001002400000FFF8FFFFF6FE08ED00E02A +:1036900010B5354C0121204600F07FF8002861D09C +:1036A0000121204600F06AF8304C314B002120887F +:1036B000A8B1020413D41A78C82A01D8521C1A706F +:1036C0001A78142A0DD35A88824205D140F400405A +:1036D00020805980197004E05880197001E0197039 +:1036E0005980244C2088A8B1020413D45A78642A43 +:1036F00001D8521C5A705A78142A0DD39A888242E3 +:1037000005D140F4004020809980597004E09880F1 +:10371000597001E05970998017494FF6E852088AAC +:10372000904201D2401C0882C889904201D2401CBC +:10373000C8818889904201D2401C8881888B904240 +:1037400001D2401C8883088C904201D2401C08841E +:10375000888A904201D2401C8882C88A904201D255 +:10376000401CC88210BD000000040040360000204C +:103770002C00002038000020E4050020C94301820D +:103780007047002904D0018841F001010180704791 +:10379000018821F001010180704702460020138A50 +:1037A0000B4092890A40002B02D0002A00D0012051 +:1037B0007047002A03D082890A4382817047828938 +:1037C0008A4382817047000030B502881B4C1C4D33 +:1037D000A0420DD0A8420BD0B0F1804F08D0194BB9 +:1037E000984205D0184B984202D0184B984203D10A +:1037F00022F070034A881A43154B984206D0154BA5 +:10380000984203D022F44073CA881A4302808A88FF +:1038100082850A880285A0420AD0A84208D00E4AB2 +:10382000904205D00D4A904202D00D4A904201D1FB +:10383000097A01860121818230BD0000002C0140FF +:10384000003401400004004000080040000C00402B +:1038500000100040001400400040014000440140BE +:103860000048014070B5164C40F2255529462046C7 +:1038700000F0ADF888B1204600F042F9C3B211481B +:103880000288110409D410498B54521C92B2028050 +:103890005A2A02D342F4004101800821204600F058 +:1038A0008FF8012806D1204600F02AF90821204689 +:1038B00000F076F829462046BDE8704000F070B868 +:1038C00000380140320000205C01002070B5174D27 +:1038D00040F225563146284600F079F890B1284646 +:1038E00000F00EF9C4B212490B8818040AD4581C0F +:1038F00082B210480A80C454B2F5F07F02D342F479 +:10390000004008800821284600F05AF8012806D116 +:10391000284600F0F5F80821284600F041F8314625 +:103920002846BDE8704000F03BB80000004400406D +:1039300036000020FC01002070B5164C40F22555E1 +:103940002946204600F043F888B1204600F0D8F818 +:10395000C3B211480288110409D410498B54521C77 +:1039600092B202803B2A02D342F400410180082136 +:10397000204600F025F8012806D1204600F0C0F8C6 +:103980000821204600F00CF829462046BDE870408A +:1039900000F006B80048004034000020C0010020BC +:1039A0008A05C94301807047002904D0818941F408 +:1039B000005181817047818921F4005181817047D4 +:1039C0000246002012880A4200D00120704770B5DC +:1039D000002440F66A12C1F3421301F01F050126CC +:1039E00006FA05F2012B0CD0022B0DD0838A13406E +:1039F000090A8E40008830400BB100B101242046F6 +:103A000070BD83891340F3E7038A1340F0E710B5D4 +:103A100040F66A13C1F3421301F01F040121A140D3 +:103A2000012B07D0022B07D014303AB102680A43A9 +:103A3000026010BD0C30F8E71030F6E702688A43E8 +:103A4000026010BD30B585B004460D46208A4CF6A4 +:103A5000FF710840E98801432182A0894EF6F311E5 +:103A60000840A9882A8911436A8902431143A18128 +:103A7000A08A4FF6FF410840A9890143A182684608 +:103A8000FEF7CCFC1D48844201D1039800E0029867 +:103A9000A189090408D500EBC00101EB00102968D9 +:103AA0004900B0FBF1F007E000EBC00101EB0010B2 +:103AB00029688900B0FBF1F06422B0FBF2F1090142 +:103AC0000B096FF018056B4300EB8300A3891D04FD +:103AD0004FF0320307D503EBC000B0FBF2F000F06B +:103AE0000700084306E003EB0010B0FBF2F000F023 +:103AF0000F000843208105B030BD000000380140B0 +:103B00008088C0F308007047C1F3080181807047C6 +:103B1000FEE700000FB4084B10B504A902AA0398F1 +:103B200000F080F9044602A9002000F012FD2046B2 +:103B300010BC5DF814FB00005345000837B514466F +:103B40000846064B6A46214600F06CF90446694671 +:103B5000002000F0FEFC20463EBD0000534500085A +:103B6000490050EAC12018BF04204A0D18BF40F098 +:103B7000010040F2FF72B2EB515F08BF40F002005B +:103B8000012808BF052070472DE9F0414F1E00EBCA +:103B9000C7010446D1E9000115461E4637F006026A +:103BA0000DD02A463346FCF7E1FB7F1E04EBC7032A +:103BB000D3E90023FCF733FB37F00602F1D1022FE3 +:103BC00025D0042F13D0062F18BFBDE8F0812A4658 +:103BD0003346FCF7CBFBD4E90A23FCF720FB2A464B +:103BE0003346FCF7C3FBD4E90823FCF718FB2A464D +:103BF0003346FCF7BBFBD4E90623FCF710FB2A464F +:103C00003346FCF7B3FBD4E90423FCF708FB2A4650 +:103C10003346FCF7ABFBD4E90223FCF700FB2A4652 +:103C20003346FCF7A3FBD4E90023BDE8F041FCF7E1 +:103C3000F6BA00000022134610460149FCF7C0BD49 +:103C40000000F03FFCF7EBBA002213461046114685 +:103C5000FCF7B6BD40F2013200204FF0E041FCF726 +:103C6000F7BB0000024A00201107FCF7F1BB00007F +:103C700001FDFFFF02E008C8121F08C1002AFAD1A7 +:103C800070477047002001E001C1121F002AFBD1DC +:103C9000704700000149086070470000580100208B +:103CA0002DE9FF5F82B00021DDE90430020DDDF86F +:103CB00040B0034318D044F61050A2F2FF32424302 +:103CC0001514119801281FD0A5EB0B00401C5FEACA +:103CD000000A4FF000064E4FDFF83891B0465046CC +:103CE00015D5CAF1000413E0119801244AA3012854 +:103CF00001D16FEA0B010298119AC0E90031C0E9C5 +:103D0000024206B0BDE8F09FCBF10000DFE70446B9 +:103D10000021404A491842EB0450CDE9001012E05E +:103D2000E00707D032463B4640464946FCF71EFBBB +:103D30008046894632463B4610461946FCF716FB3C +:103D400006460F466410002CEAD1DDE90401DDE9E6 +:103D50000023BAF1000F06DAFCF708FB42464B4697 +:103D6000FCF704FB05E0FCF72BFD42464B46FCF755 +:103D700027FD04460E460022284BFCF7E1FB03D842 +:103D80004FF0FF30014607E00022254B2046314628 +:103D9000FCF745FAFCF783FD102409E0002C0ADB50 +:103DA0000A220023FCF716FC039B30321A55641ECE +:103DB00050EA0102F2D1641C039AC4F111031444C5 +:103DC000119A012A03D0012208430DD10AE00843C9 +:103DD00004D000204FF0110B119072E7A3EB0B05FC +:103DE0006D1E0DE05B4504DD4FF0000205F101059D +:103DF00004E003DA4FF00002A5F10105002AECD03F +:103E000002981199C0E90231C0E9004579E7000044 +:103E1000000014400000F03F300000000000F043BC +:103E20000000E03F2DE9FF4F95B09B4689460646CE +:103E300000250FE2252877D100242746F84A0121E2 +:103E4000059400E0044316F8013F203B01FA03F01B +:103E50001042F7D130782A2811D06FF02F03307834 +:103E6000A0F13002092A16D8059A44F0020402EBA8 +:103E7000820203EB42021044761C0590EFE759F8EA +:103E8000042B0592002A03DA504244F400540590B2 +:103E900044F00204761C30782E2816D116F8010F53 +:103EA00044F004042A280DD06FF02F023078A0F1DE +:103EB0003003092B09D807EB870302EB4303C7182C +:103EC000761CF3E759F8047B761C30786C280FD009 +:103ED00006DC4C2817D068280DD06A2814D104E0DD +:103EE000742810D07A280FD10DE044F400140AE0B1 +:103EF00044F4801401E044F440147278824202D108 +:103F000004F58014761C761C307866280BD013DC00 +:103F1000582877D009DC002875D04528F6D04628E7 +:103F2000F4D047281AD19DE118E0632835D06428E1 +:103F300079D0652812D195E1702873D008DC672804 +:103F4000F1D069286FD06E280DD06F2806D1B5E06A +:103F500073282CD0752875D0782874D05A461799B4 +:103F600090476D1C75E1C4F30250022809D0032864 +:103F70000DD0D9F8001004280DD00D6009F1040906 +:103F800067E1D9F80010EA17C1E90052F6E7D9F85D +:103F900000100D80F2E70D70F0E719F8041B8DF8A2 +:103FA000001000208DF80100EA46012003E059F8D6 +:103FB00004AB4FF0FF3061074FF0000102D40DE079 +:103FC00008F101018846B9420FDA8045F8DB1AF89A +:103FD00008100029F4D108E008F101018846814267 +:103FE000FADB1AF808100029F6D105985B46A0EB19 +:103FF000080721463846179A00F094FA284400EB47 +:10400000080507E04DE029E10DE01AF8010B5A46DA +:1040100017999047B8F10108F7D25B462146384618 +:10402000179A13E142E00A220092C4F302524FF0C1 +:10403000000A022A08D059F804CB032A4FEAEC718F +:104040000AD00DE029E02AE009F1070121F007027A +:10405000F2E802C1914609E00FFA8CFC4FEAEC71DC +:10406000042A03D14FFA8CFC4FEAEC71002907DADD +:104070000A460021DCF1000C61EB02012D2202E076 +:10408000220504D52B228DF80420012203E0E2074B +:1040900001D02022F7E7904659E00A2102E01022E1 +:1040A0000DE010214FF0000A00910BE010224FF0BC +:1040B000000A44F004040827009203E008224FF0AD +:1040C000000A0092C4F30252022A05D059F804CB28 +:1040D0000021032A08D009E009F1070121F00702B5 +:1040E000F2E802C1914605E01FFA8CFC042A01D1D6 +:1040F0000CF0FF0C4FF00008220728D5702806D0DE +:10410000009B83F0100353EA0A0305D00EE040221F +:104110008DF80420012208E05CEA010206D030227A +:104120008DF804208DF8050002229046009B83F054 +:10413000080353EA0A030AD15CEA010201D16207CB +:1041400005D530228DF804204FF001087F1E582835 +:1041500004D034A003900EA802900DE036A0F9E739 +:1041600053466046009AFCF735FA84460398825C11 +:104170000298401E029002705CEA0100F0D10298A1 +:1041800006A9081A00F1200A600702D524F4803439 +:1041900000E00127574502DDA7EB0A0000E0002000 +:1041A00000EB0A01009005984144401A0590E00395 +:1041B00006D45B462146179A059800F0B3F90544EA +:1041C000002706E001A85A46C05D179990476D1C6C +:1041D0007F1C4745F6DBE0030CD55B462146179A6A +:1041E000059800F09FF9054404E030205A461799DD +:1041F00090476D1C0099481E00900029F5DC08E0EE +:10420000029802995A460078491C029117999047E2 +:104210006D1CBAF10001AAF1010AF1DC65E10000B0 +:10422000092801003031323334353637383961628C +:104230006364656600000000303132333435363750 +:1042400038394142434445460000000000F058F927 +:104250000544761C307800287FF4ECAD19B0284670 +:10426000BDE8F08F620700D4062709F1070222F0AB +:10427000070CFCE80223E14603F000485FEA080C63 +:1042800002D00FF2702C0DE05FEA045C02D50FF251 +:10429000682C07E05FEAC47C02D00FF2602C01E0DA +:1042A000AFF2700C4FF0FF3823F00043CDF850C050 +:1042B00065280CD006DC452809D046281DD04728A3 +:1042C0003DD13DE0662818D067287ED138E0002136 +:1042D000112F01DB112000E0781CCDE9000106A9B7 +:1042E0000EA8FFF7DDFCDDE90F010E9A0391002116 +:1042F000009207F1010A04914DE04FF00040009751 +:10430000CDE9011006A90EA8FFF7CAFCDDE90F02EE +:1043100003920E9B11990022DDF80CA000930492E9 +:1043200011B9791C00EB010AB7EB0A0004D4C0F103 +:10433000FF3007F1010A0490AAEB0700019044E066 +:10434000012F00DA01270021112F01DD112000E0EB +:104350003846CDE9000106A90EA8FFF7A1FCDDE96A +:104360000F010E9A0391002104910092BA46210791 +:104370000CD40399514500DA8A46BAF1010F05DDE4 +:10438000009AAAF10101515C302908D0B84202DA42 +:1043900010F1040F06DA0121CDE9011015E0AAF1B0 +:1043A0000101E9E7002805DC049901440491AAEB26 +:1043B000000102E0411C514500DD8A460499401A83 +:1043C000401C01904FF000400290200704D4019857 +:1043D000504501DBCDF8048000208DF84F00029895 +:1043E0000DF14F07B0F1004F25D02B200E90029811 +:1043F0004FF0020800280CDA404202902D200E9067 +:1044000007E00A210298FCF7CFF83031029007F854 +:10441000011DB8F10001A8F10108F2DC02980028A2 +:10442000EFD1791E0E980870307800F0200040F02F +:10443000450007F8020D12A8C01B00F107081498E8 +:10444000007800B1012000EB0A01019801EBE07156 +:1044500005984144401A401E0590E00306D45B468F +:104460002146179A059800F05DF8054414980078E5 +:1044700018B15A46179990476D1CE00324D55B4646 +:104480002146179A059800F04DF805441CE0049861 +:10449000002807DBDDE90301884203DD0098405C6A +:1044A000179901E0179930205A469047049805F172 +:1044B0000105401C04900198401E019004D12E205B +:1044C0005A46179990476D1CBAF10001AAF1010AEA +:1044D000DDDC05E017F8010B5A46179990476D1C73 +:1044E000B8F10001A8F10108F4DC5B462146179AF7 +:1044F0000598ABE62D0000002B0000002000000016 +:104500002DE9F041044600251E461746880404D4D0 +:1045100005E039462020B0476D1C641EF9D52846B9 +:10452000BDE8F0812DE9F041044600251E46904685 +:10453000C80301D5302700E02027880404D505E012 +:1045400041463846B0476D1C641EF9D52846BDE883 +:10455000F0810A68531C0B601070704770B50446F8 +:104560000F4E19E02568A089C00503D4A06808B1E2 +:10457000FFF7F4FFA089C00503D4206908B1716872 +:104580008847A089800503D4206A08B171688847EC +:104590007168204688472C46002CE3D170BD00008E +:1045A0003401002070B50D46846800E024682CB109 +:1045B0002946206A00F04AF80028F7D1204670BD4D +:1045C00010B5064928200968884704461CB12821EF +:1045D0002046FBF7E8FD204610BD00003401002016 +:1045E00000221146AFF300802DE9F04104460D464C +:1045F0009046FFF7E5FF0646134F0020B860C6B1AE +:10460000204601F0E7F80146304600F099FB0446E9 +:104610008CB1B8F1000F13D0204601F0DBF804464E +:10462000207868B13046FFF799FFBC600020BDE8F4 +:10463000F0810020FBE73046FFF790FF0020F6E70F +:1046400005B12C603046F2E73401002070B5044615 +:104650000D46002C01D02DB10AE00DB1012070BD36 +:10466000002070BD012070BD207898B1641C6D1CC5 +:104670002078FBF779FD06462878FBF775FD864222 +:10468000F2D02078FBF770FD04462878FBF76CFD2C +:10469000201A70BD002070BD10B5002821D0114B2C +:1046A0000022001F196803E0814203D80A464968C6 +:1046B0000029F9D152B11368841A9C4204D10068D0 +:1046C00018441060104602E0506000E0186039B1F4 +:1046D00002680B1A934203D10B681A4402604968BE +:1046E000416010BD50010020FCF7CCFAFCF75CFBE8 +:1046F000FCF7E6FAC820FCF7CDFCFCF77BFA4FF498 +:104700007A70FCF7C7FCFEF733FC0F4C40F6B8306C +:104710002082E081A081A083C8206084A084E084FE +:10472000FCF7D0FFFCF7ECFEFCF73CFCFCF7E6FCEA +:10473000FCF742FD207E022803D1FEF7E3F8FDF7E7 +:1047400039FDFDF77FFFEBE7E4050020F0B50B3006 +:10475000154D20F007010024144A0FE003688B4236 +:104760000BD38B4205D95E1A43184768C3E900672B +:1047700000E04368136002C004E0021D10680028D6 +:10478000ECD12046002802D1286808B10020F0BDF5 +:10479000064A07481060074A121A22F00702C0E9C9 +:1047A000002401202860D7E7540100205001002098 +:1047B0009C0C0020981C0020F0B500230D78C45CF0 +:1047C000AC420DD100229E188F5C865DBE4207D19F +:1047D0008E18767816B1521C92B2F4E70120F0BD23 +:1047E0000D2C03D1C21852780A2A02D05B1C9BB24E +:1047F000E5E70020F0BD00002DE9F041074608780C +:10480000234E5B2803D0B1600020BDE8F081052075 +:10481000F860481C00F0DEFF044620785D2811D0C7 +:10482000FFF7CEFE0546B86070B1204600F0D2FF1B +:104830000146284600F084FA00F0CCFF0446200030 +:1048400004D016E0601CE0E70020DEE70020DCE793 +:10485000FFF7B6FEB0B1286045600546601C00F069 +:10486000B9FF0146284600F06BFA00F0B3FF04469A +:1048700054B120782C28EBD020785D2806D0B46085 +:104880000020C2E70020C0E70020BEE7601CBCE7B4 +:10489000340100200178A1F13002092A01D8114623 +:1048A0000AE0A1F14102052A01D8373904E0A1F15B +:1048B0006102052A0AD857390A01401C0178A1F182 +:1048C0003003092B04D8303A11440EE00020704721 +:1048D000A1F14103052B02D8373A114405E0A1F1BB +:1048E0006103052B0BD8573A11440A01401C01788B +:1048F000A1F13003092B04D8303A11440EE0002016 +:104900007047A1F14103052B02D8373A114405E065 +:10491000A1F16103052B0AD8573A114409014078E7 +:10492000A0F13002092A04D8303908447047002029 +:104930007047A0F14102052A02D837390844704770 +:10494000A0F16102052A02D85739084470470020B7 +:10495000704700002DE9F34F85B08A4600242546B4 +:1049600059490020CDE9020100263746834601203F +:1049700001909AF800002D2805D154490020CDE976 +:1049800002010AF1010A9AF80000302801D10AF167 +:10499000010A9AF800003138082817D89AF8000060 +:1049A0003038FBF771FD804689460022484B20468F +:1049B0002946FBF7DBFC42464B46FBF730FC04463E +:1049C0000D461AF8010F30380928E7D99AF8000087 +:1049D0002E2827D19AF80100302823D3392821D84E +:1049E0000AF1010A9AF800003038FBF74DFD8046C5 +:1049F00089460022364B20462946FBF7B7FC424643 +:104A00004B46FBF70CFC04460D4600222E4B30466D +:104A10003946FBF7A5FC06460F461AF8010F303859 +:104A20000928DFD99AF80000652801D045281DD152 +:104A30001AF8010F2B2802D02D2803D010E00AF11C +:104A4000010A0DE04FF0FF3001900AF1010A07E082 +:104A50000BEB8B0100EB410B0AF1010AABF1300BC0 +:104A60009AF80000A0F130010929F1D901980BFB57 +:104A700000F0FBF709FD32463B46FBF7D0FB024650 +:104A80000B460020124900F0B9F906460F46DDE951 +:104A9000020122462B46FBF769FC32463B46FBF7F8 +:104AA00065FC04460D460598C0E9064520462946A2 +:104AB000FBF7FBFC0599486105980321C16007B02D +:104AC0005046BDE8F08F00000000F03F0000F0BF4E +:104AD000000024402DE9F04107460878384E7B2835 +:104AE00003D0B1600020BDE8F0810620F860481CCA +:104AF00000F070FE054628787D2818D0FFF760FD8D +:104B00000446B860A8B1284600F064FE014620467D +:104B100000F058F800F05EFE68B1216921620027BC +:104B2000276101783A2908D0B0600020DBE7681CD3 +:104B3000D9E70020D7E70020D5E7401C00F04AFE67 +:104B40000146204600F0FCF800F044FE054628002F +:104B500028D1C8E7FFF734FDA8B1206044600446BF +:104B6000681C00F037FE0146204600F02BF800F0EC +:104B700031FE50B121692162276101783A2906D0BE +:104B8000B0600020AFE70020ADE70020ABE7401C9D +:104B900000F020FE0146204600F0D2F800F01AFE98 +:104BA000054645B128782C28D4D028787D2804D013 +:104BB000B560002097E7002095E7681C93E70000A8 +:104BC000340100202DE9F04780460D466C1C002082 +:104BD0002A785949222A06D08D60BDE8F087641CE6 +:104BE0005C2A00D1641C2278222A02D00AB1401C1F +:104BF000F5D10968401C88470746380004D0681C76 +:104C00003C464FF480691AE00020E6E75C2903D0B7 +:104C100004F8011B401C12E0461C3078722825D095 +:104C200006DC622816D0662818D06E2804D119E058 +:104C300074281FD0752821D004F8010B701C01784E +:104C4000222901D00029E1D10021217001782229F7 +:104C50006AD06AE0082004F8010BEFE70C2004F8A2 +:104C6000010BEBE70A2004F8010BE7E70D2004F83D +:104C7000010BE3E7092004F8010BDFE7701CFFF7E5 +:104C800009FE0546361DA5F55C404845D6D3002DE6 +:104C9000D4D0A5F55840484513D270785C28CDD1C2 +:104CA000B0787528CAD1F01CFFF7F4FDB61DA0F549 +:104CB0005C414945C2D2C5F3090161F39F2000F56B +:104CC00080350421802D01D2012108E0B5F5006F67 +:104CD00001D2022103E0B5F5803F00D20321601824 +:104CE00001291AD0022911D0032908D0042919D189 +:104CF00005F0BF0242F0800200F8012DAD0905F079 +:104D0000BF0242F0800200F8012DAD0905F0BF029C +:104D100042F0800200F8012DAD09084A525C2A4396 +:104D200000F8012D441889E7401CC8F810700421D0 +:104D3000C8F80C1051E7000034010020D0660008CC +:104D400070B505460C46002C20D0042224A1204634 +:104D5000FBF756FAE0B1052223A12046FBF750FAF3 +:104D6000D0B1042222A12046FBF74AFAC0B1207834 +:104D700022281AD02D2803D0A0F1300109291AD8F1 +:104D800021462846BDE87040FFF7E4BD002070BD15 +:104D90000220E860201D70BD0020E860601D70BD2D +:104DA0000120E8606861201D70BD21462846BDE8ED +:104DB0007040FFF707BF5B2805D07B2809D00E485D +:104DC0008460002070BD21462846BDE87040FFF792 +:104DD00013BD21462846BDE87040FFF77BBE0000AA +:104DE0006E756C6C0000000066616C7365000000FD +:104DF0007472756500000000340100202DE9F04D4B +:104E00001D460C4698B0174621F0004123F00043A0 +:104E1000002814BF4FF0010C4FF0000C0CEB440CB9 +:104E2000FE4A0CEB02064FEA620C66452BD33E00AD +:104E300018BF012606EB45061644F94A964222D3CE +:104E4000F84A53EA070C02D0944205D148B918B089 +:104E500000201146BDE8F08D002808BF4FF0000C7F +:104E600001D04FF0010C0CEB440212F5001F0AD8E0 +:104E7000002F14BF4FF0010C4FF0000C0CEB45025B +:104E800012F5001F07D918B03A462B462146BDE857 +:104E9000F04DFEF7D7BE0022DFF88CA3002CB8BF80 +:104EA000534526DADFF884C36345A8BF022220DA1F +:104EB000DFF870C39C451CDCDFF874C30CEB235C8B +:104EC000BCF1140F08DDCCF1340627FA06FC0CFA0D +:104ED00006F6BE420DD108E05FB9CCF1140623FA04 +:104EE00006FC0CFA06F69E4203D10CF00102C2F158 +:104EF000020251EA000C19D1002D17DA002C18BF5C +:104F0000022A01D0012A07D00220FEF7C3FE18B002 +:104F1000BDE8F04DFEF78EBE0220FEF7BBFEFEF7A9 +:104F200089FE18B081F00041BDE8F08DB7F1000CAA +:104F30006CD1534525D104F1804212F5801201BF96 +:104F400000280020B74918B008BFBDE8F08DB5486B +:104F5000884207DC002DA1BF6046294618B0BDE895 +:104F6000F08D07E0281E05DA80F0004118B0604699 +:104F7000BDE8F08DAF497944D1E9000118B0BDE832 +:104F8000F08DDFF8A0C2634525D1002D1FDA19B1DD +:104F9000514512D1D8B909E0002840F0EC82A24A6C +:104FA000214618B062F31E01BDE8F08D00202146B5 +:104FB00018B060F31E01BDE8F08D08DA18B0234682 +:104FC000BDE8F04D024600206146FBF7F9BB18B082 +:104FD0002146BDE8F08D514518DAB5F1804F0DD06E +:104FE000A5F1005CBCF1FF5C10D1B4F1000C0DDB4D +:104FF00018B06146BDE8F04D00F0F6BB234618B08E +:105000000246BDE8F04D1946FBF7B0B9060024F0A2 +:10501000004C3BD1D9B1514533D1002C06DD002DD8 +:10502000A1BF0020514618B0BDE8F08D002C01DD75 +:10503000002D1BDB002C13DA002D11DB012A4FF0B1 +:10504000000014BF78497C4918B0BDE8F08D022AF1 +:1050500018BF002C0AD0012A08D1002C06DA0AE079 +:10506000002CB8BF002D11DA012A04D0002018B09E +:105070000146BDE8F08D18B000204FF00041BDE8BA +:10508000F08DA1F14050B0F17F601AD0012000EB0B +:10509000E47050EA020421D0624C521E4FF0000B23 +:1050A000104304BF4FF0000B644C654883427CDD25 +:1050B000644A654893421FDD884217DB002D25DBDB +:1050C00037E0002C00DA4AB1022A0CBF01204FF071 +:1050D000FF3018B0BDE8F04DFBF7D6B90120FEF760 +:1050E000D9FD18B0BDE8F04DFEF7AEBD4D4A8A427D +:1050F00002DC002D0ADC1CE0814202DA002D18DA05 +:1051000004E0484B994220DD002D12DD0220FEF71D +:10511000C1FDFEF79FFD05460E4600225346584648 +:105120002146FBF723F918B066F31E012846BDE8B7 +:10513000F08D0220FEF7AEFDFEF794FD0A462146F3 +:1051400018B062F31E01BDE8F08D002230466146C2 +:10515000FBF706F980460E466FF00102FBF778F97F +:105160004FF05532394BFBF7FEF842463346FBF71A +:10517000FDF80022364BFBF7F6F8824642463346EE +:10518000049110461946FBF7F1F85246049BFBF7D1 +:10519000EDF88A4600904FF0C0422E4B4046314613 +:1051A000FBF7E4F82C4A2B4B00E027E0CDE90601A1 +:1051B00051460098FBF7DAF882460191274A284BBE +:1051C00040463146FBF7D2F85246019BFBF7C8F840 +:1051D00082460B4602460591DDE90601FBF71FF802 +:1051E000DDE90623002688463046FBF7B9F852462B +:1051F000059BFBF7B8F8024600F07EB90020B1F538 +:10520000801F07DA352230466146FBF721F9064652 +:105210006FF0340000EB215024E00000FFFF1F007E +:10522000FFFF0F000000F03F0000F07F0000404350 +:1052300001FCFFFFE61700000000F0FF0000F0BFD8 +:105240000000E0410000F043FFFFEF3F5555D53F20 +:105250000000E03F4715F73FFE822B6544DF5DF815 +:105260000BAE543EA0F2FF300190C1F3130040F0AA +:105270007F6141F040510291FE498842D8BF002031 +:1052800004DDFD498142C8BF012001DD0D9008E029 +:1052900000200D900198401C01900298A0F580100C +:1052A00002900299F54878440B910D9900EBC100EA +:1052B000D0E900230F9330460A920B99FBF750F880 +:1052C000CDE90601DDE90A2130460F9BFAF7A7FF79 +:1052D00002460B460020EA49FBF772FA05910246A6 +:1052E0000B460090DDE90601FBF740F81490E54815 +:1052F0008A464FF0000878440299006812904FF0F7 +:10530000005040EA61010D980F9B01EB804000F5D1 +:10531000002109910A9A1298FBF722F832460B9B5A +:10532000FBF721F842465346FBF720F80646029168 +:1053300040465146099B129AFBF718F8DDE906230F +:10534000FBF711F83246029BFBF70AF8059B009A1F +:10535000FBF70CF80091149A049053461046194636 +:10536000FBF704F806460246C7480B4602910621A1 +:105370007844FEF709FCCDE90510029B3246104641 +:105380001946FAF7F3FFDDE90532FAF7EFFF059169 +:105390000646534640461946149AFAF740FF009BCA +:1053A000049AFAF7E3FF3246059BFAF738FFCDE996 +:1053B00005104246534610461946FAF7D7FF002219 +:1053C000B24B02910A90FAF72AFFDDE90532FAF7AB +:1053D00026FF0E464246AD4B4046FAF7C1FF029B00 +:1053E0000A9AFAF7BDFFDDE90532FAF7BCFF42463B +:1053F00002910A90334610465146FAF7B7FFCDE9BD +:1054000006015346149A02990A98FAF7AFFF8A46A2 +:1054100002903346424600990498FAF7A7FF534694 +:10542000029AFAF7FCFE82460B4602460591DDE938 +:105430000601FAF7F4FEDDE9062300208846064659 +:10544000FAF78EFF5246059BFAF78DFF82460991C7 +:105450004FF060428E4B30464146FAF787FF04908A +:1054600006918C4A8A4B50460999FAF77FFF82468B +:105470000291894A894B30464146FAF777FF5246F6 +:10548000029BFAF7CCFE864B7B440D9A03EBC203DA +:10549000D3E90023FAF7C3FE0E9007910198FAF7BB +:1054A000F3FF0591DDE9061382460E9A0498FAF798 +:1054B000B6FE7C4A7A440D9B02EBC303D3E900237A +:1054C00000930292FAF7ABFE5246059BFAF7A7FE4D +:1054D0000026884652463046059BFAF741FF009B5E +:1054E000029AFAF73DFF069B049AFAF739FF079BE9 +:1054F0000E9AFAF738FF024600200B460290384613 +:105500002946FAF733FF824601912B463846194661 +:10551000029AFAF725FF32464346FAF727FF52462A +:10552000019BFAF77CFE07468A46324643462946E7 +:105530000298FAF71BFF05460E463A465346FAF71D +:105540006EFE594A8846914221DBA8EB020353EADA +:10555000000210D12A463346FAF702FFCDE90401D2 +:10556000524A534B38465146FAF759FEDDE90423B7 +:10557000FAF7E6FF21D20220FEF78CFBFEF76AFB6A +:105580000A46214618B062F31E01BDE8F08D494B72 +:1055900028F000429A4210D3474A08EB020353EA2C +:1055A00000027FF4C6AD2A463346FAF7D9FE3A46E2 +:1055B0005346FAF7C5FF7FF6BCAD0022019228F0F2 +:1055C00000403E493E4A01EB2051824223DA481C0A +:1055D0004FF4801121FA00F040443A4AC0F30A51D6 +:1055E0007A44394BA1F2FF31CB4020EA0303C0F3E8 +:1055F000130040F48010C1F11401C84012680190FA +:10560000B8F1000FBCBF4042019028463146FAF77E +:10561000A7FE05460E462A46334638465146FAF757 +:10562000FEFD4FF000084246284B40460591FAF730 +:105630009DFECDE90601264A264B40460599FAF71C +:1056400095FE009102902A46334640460599FAF7A6 +:1056500087FE3A465346FAF786FE1F4A1F4BFAF773 +:1056600085FE009B029AFAF7DAFD07468846024655 +:105670000B4635E08E9803007AB60B002E1400001E +:105680000000F03F66140000941300000000084082 +:1056900009C7EE3FFD033ADCF5015B14E02F3EBE87 +:1056A0006C1200003012000000009040FE822B655A +:1056B0004715973C00CC904000346F3F01FCFFFF42 +:1056C0000000E03F7C110000FFFF0F00432EE63F8B +:1056D000396CA80C615C20BEEF39FAFE422EE63F21 +:1056E000DDE90601FAF79BFDDDE9062305460E46D6 +:1056F000FAF736FE3A464346FAF735FE0F462A4693 +:105700003346009010461946FAF730FE82460246AC +:105710002E4888460B4605217844FEF735FA524656 +:105720004346FAF723FE2A463346FAF71CFE804624 +:105730008A463B4628463146009AFAF717FE3B4612 +:10574000009AFAF76CFD0691009000224FF080431A +:1057500040465146FAF704FE0F460C904246534627 +:1057600028463146FAF702FE3B460C9AFBF728F82A +:10577000069B009AFAF7F4FD2A463346FAF7F0FD45 +:105780000022134BFAF7EFFD054601980E4601EB98 +:1057900000510815002810DC28463146019AFAF716 +:1057A00057FEFEF7DDF9042808BFFEF75BFA28462E +:1057B0003146019AFAF74CFE05460B4618B02A46C8 +:1057C00058462146BDE8F04DFAF7D0BD1C10000048 +:1057D0000000F03F00E0401C002804D001780029C0 +:1057E00001D02029F7D970472DE9F04106460F4630 +:1057F000FBF780F8041E0D4618BF0120284320F057 +:105800000040C0F17F6000F1E040C00F0ED0301CBE +:1058100018BF0120384320F00040C0F17F6000F144 +:10582000E040C00F04BF0120FEF734FA20462946AD +:10583000BDE8F08100000000000000000000000052 +:10584000000000003F4000000000000000003000A9 +:10585000400030004000000009000BC03D000BC0BC +:105860003D00090018C024407FE022403180000044 +:10587000180024C01B000D803240018003801C40B2 +:1058800027401C800740004010006000000000001E +:10589000000000000000000000001F8020404020A9 +:1058A0000000402020401F8000000000090006008A +:1058B0001F80060009000000040004003F8004006F +:1058C0000400000000100060000000000000000064 +:1058D0000400040004000400040000000000004074 +:1058E0000000000000000000002001C00600380099 +:1058F000400000001F802040204020401F8000000A +:10590000000010403FC000400000000018C02140CF +:1059100022402440184000001080204024402440B1 +:105920001B80000002000D0011003FC0014000007C +:105930003C80244024402440238000001F802440D9 +:1059400024403440038000003000200027C038008D +:10595000200000001B802440244024401B800000C5 +:105960001C0022C0224022401F80000000000000D6 +:10597000084000000000000000000000046000007B +:1059800000000000000004000A00110020804040D8 +:10599000090009000900090009000000000040405A +:1059A000208011000A000400180020002340240079 +:1059B000180000001F802040274029401F400000A1 +:1059C000004007C039000F0001C0004020403FC028 +:1059D000244024401B8000001F80204020402040A5 +:1059E0003080000020403FC0204020401F80000049 +:1059F00020403FC024402E4030C0000020403FC027 +:105A000024402E00300000000F0010802040224073 +:105A10003380020020403FC0040004003FC020400B +:105A2000204020403FC02040204000000060202057 +:105A300020203FC02000200020403FC024400B0019 +:105A400030C0204020403FC020400040004000C007 +:105A50003FC03C0003C03C003FC0000020403FC0AE +:105A60000C4023003FC020001F80204020402040E9 +:105A70001F80000020403FC0244024001800000088 +:105A80001F802140214020E01FA0000020403FC097 +:105A90002440260019C0004018C024402440224061 +:105AA00031800000300020403FC020403000000026 +:105AB00020003F80004000403F80200020003E004A +:105AC00001C0070038002000380007C03C0007C0B4 +:105AD00038000000204039C0060039C020400000D6 +:105AE0002000384007C0384020000000304021C06E +:105AF0002640384020C00000000000007FE0402029 +:105B000040200000000070000C00038000400000F6 +:105B10000000402040207FE0000000000000200046 +:105B200040002000000000000010001000100010D5 +:105B30000010001000000000400000000000000005 +:105B4000000002800540054003C0004020003FC027 +:105B5000044004400380000000000380044004402F +:105B60000640000000000380044024403FC0004085 +:105B70000000038005400540034000000000044091 +:105B80001FC0244024402000000002E005500550C2 +:105B90000650042020403FC00440040003C00040E1 +:105BA0000000044027C0004000000000001000106A +:105BB000041027E00000000020403FC00140070023 +:105BC00004C00440204020403FC00040004000008E +:105BD00007C0040007C0040003C00000044007C061 +:105BE0000440040003C0004000000380044004405F +:105BF00003800000041007F00450044003800000FC +:105C0000000003800440045007F00010044007C067 +:105C1000024004000400000000000640054005406A +:105C200004C00000000004001F8004400040000089 +:105C3000040007800040044007C000400400070043 +:105C400004C0018006000400060001C0070001C076 +:105C500006000000044006C0010006C00440000029 +:105C60000410071004E00180060004000000044056 +:105C700005C00640044000000000000004007BE076 +:105C800040200000000000000000FFF000000000C5 +:105C9000000040207BE00400000000004000800085 +:105CA0004000200020004000000000000000000034 +:105CB00000000000000000000000000000001FCCF9 +:105CC000000C000000000000000008003000600030 +:105CD0000800300060000000022003FC1E200220AB +:105CE00003FC1E200220000000000E1811043FFFDC +:105CF00010840C78000000000F0010840F3800C0E2 +:105D0000077818840078000000780F8410C41124EC +:105D10000E9800E40084000808006800700000008D +:105D2000000000000000000000000000000007E08C +:105D30001818200440020000000040022004181837 +:105D400007E00000000000000240024001800FF068 +:105D500001800240024000000080008000800FF8B7 +:105D600000800080008000000001000D000E000097 +:105D700000000000000000000000008000800080A3 +:105D800000800080008000800000000C000C0000FB +:105D90000000000000000000000000060018006085 +:105DA0000180060018002000000007F00808100419 +:105DB0001004080807F000000000080408041FFC95 +:105DC000000400040000000000000E0C1014102459 +:105DD000104411840E0C000000000C181004110473 +:105DE000110412880C700000000000E0032004245D +:105DF00008241FFC0024000000001F9810841104D8 +:105E00001104108810700000000007F008881104C9 +:105E1000110418880070000000001C00100010FC25 +:105E200013001C001000000000000E381144108404 +:105E3000108411440E38000000000700088C104444 +:105E40001044088807F00000000000000000030C68 +:105E5000030C00000000000000000000000101062B +:105E6000000000000000000000000080014002204F +:105E70000410080810040000022002200220022062 +:105E80000220022002200000000010040808041074 +:105E9000022001400080000000000E001200100CE3 +:105EA000106C10800F00000003E00C1813E41424A1 +:105EB00017C4082807D000000004003C03C41C409D +:105EC000074000E4001C000410041FFC110411042E +:105ED00011040E880070000003E00C181004100478 +:105EE000100410081C10000010041FFC1004100403 +:105EF0001004080807F0000010041FFC110411042E +:105F000017C410040818000010041FFC110411002D +:105F100017C010000800000003E00C181004100463 +:105F200010441C780040000010041FFC1084008006 +:105F3000008010841FFC10040000100410041FFCDB +:105F40001004100400000000000300011001100103 +:105F50001FFE10001000000010041FFC110403803D +:105F60001464181C1004000010041FFC100400042A +:105F700000040004000C000010041FFC1F0000FCC3 +:105F80001F001FFC1004000010041FFC0C04030081 +:105F900000E010181FFC100007F00808100410049F +:105FA0001004080807F0000010041FFC1084108083 +:105FB000108010800F00000007F008181024102433 +:105FC000101C080A07F2000010041FFC1104110045 +:105FD00011C011300E0C000400000E1C11041084BE +:105FE000108410441C3800001800100010041FFC1E +:105FF000100410001800000010001FF81004000426 +:10600000000410041FF8100010001E0011E0001C16 +:10601000007013801C0010001FC0103C00E01F0027 +:1060200000E0103C1FC000001004180C163401C022 +:1060300001C01634180C100410001C00130400FCDE +:1060400013041C00100000000804101C10641084CD +:1060500013041C04101800000000000000007FFE64 +:106060004002400240020000000030000C000380AB +:106070000060001C000300000000400240024002DB +:106080007FFE000000000000000000002000400033 +:10609000400040002000000000010001000100015C +:1060A000000100010001000100004000400020004C +:1060B00000000000000000000000009801240144DE +:1060C0000144014400FC000410001FFC008801048E +:1060D00001040088007000000000007000880104C6 +:1060E0000104010400880000000000700088010421 +:1060F000010411081FFC0004000000F801440144E1 +:106100000144014400C800000000010401040FFC28 +:106110001104110411001800000000D60129012902 +:10612000012901C90106000010041FFC00840100C0 +:106130000100010400FC000400000104190419FC22 +:106140000004000400000000000000030001010141 +:10615000190119FE0000000010041FFC002400407B +:1061600001B4010C010400000000100410041FFC25 +:106170000004000400000000010401FC010401000F +:1061800001FC0104010000FC010401FC0084010089 +:106190000100010400FC0004000000F801040104F7 +:1061A0000104010400F80000010101FF0085010461 +:1061B00001040088007000000000007000880104E5 +:1061C0000104010501FF00010104010401FC008438 +:1061D0000104010001800000000000CC0124012422 +:1061E000012401240198000000000100010007F8CB +:1061F0000104010400000000010001F80004000493 +:106200000004010801FC0004010001800170000C81 +:10621000001001600180010001F0010C003001C09C +:106220000030010C01F0010000000104018C007439 +:106230000170018C01040000010101810171000E57 +:10624000001801600180010000000184010C01348C +:1062500001440184010C0000000000000000000067 +:1062600001003EFC4002400200000000000000006F +:10627000FFFF0000000000000000400240023EFC62 +:1062800001000000000000000000600080008000AD +:1062900040004000200020000000000FFFF80FFF2A +:1062A000F80C0C000C0C000C0C00040C00060C008C +:1062B000061C0003F80001F0000000000000000FC1 +:1062C000FFF80FFFF80FF00000FF800007F800074D +:1062D000F801FF000FE0000FFFF80FFFF8000000CB +:1062E0000000000180100780700600F00C01D00C47 +:1062F00003900C07100E1C1007F81003E0100000AC +:10630000100000000000000000000000380000380D +:10631000000000000000000000000000000000007D +:1063200000000000000000000000800038E007F8D6 +:106330007007B010042018042018043018043030FE +:10634000043CF0041FE00003000000000000000017 +:10635000000003FC0000003FFFC000007FFFF000D2 +:1063600000FC01F80001E000780003C0001C0003FD +:1063700080001C000300000E000300000E000380DC +:10638000001C0003C0003C0001F000780000FFFF8B +:10639000F000007FFFE000000FFF000000000000A1 +:1063A00000000000000000000000000000000000ED +:1063B0000000000000001C000000001800000000A9 +:1063C00038000000007000000000E000000001FF45 +:1063D000FFFC0003FFFFFC0003FFFFFC00000000C8 +:1063E00000000000000000000000000000000000AD +:1063F000000000000000000000000000000000009D +:10640000000000000000100000000070001C0000F0 +:10641000F8003C0001E0007C0003C000FC000380A9 +:1064200001EC00038003CC0003800F0C0003801EEE +:106430000C0003803C0C000380F80C0001E7E00C2A +:106440000001FFC00C0000FF000C000018000C0051 +:10645000000000000000000000000000000000003C +:1064600000008000003000E000007000F00001F04B +:1064700000780001C0003C000380001C0003806025 +:106480000C000300E00C000300E00C000380E01CA3 +:10649000000381F01C0001E7B8780001FF3FF8001D +:1064A00000FE1FF000001807C00000000000000000 +:1064B00000000000000003800000000780000000D2 +:1064C0001F800000003F800000007B80000001E38F +:1064D00080000003C38000000F838000001E038043 +:1064E00000007C03800000F003800003FFFFFC003D +:1064F00003FFFFFC0003FFFFFC000000038000001F +:106500000003800000000380000000000000000085 +:10651000000000000020E0000007E0F00000FFE0C5 +:10652000780003FFC01C0003F1801C000383800E71 +:10653000000383800E000383800E000383800C0021 +:106540000383801C000381C03C000381E0780003CA +:1065500080FFF80003807FE00000001F8000000043 +:106560000000000000000000000000000000000724 +:10657000000000003FE0000000FFF0000003F8F81A +:10658000000007E03C00001FC01C00003F800C0022 +:1065900000F9800E0001F1800E0003C1800E00039F +:1065A00001C00C000201C01C000000E07C000000E3 +:1065B000FFF80000007FF00000001FC00000000096 +:1065C0000000000000000000000000000380000048 +:1065D00000038000000003800000000380001C0016 +:1065E000038000FC00038007FC0003801FE0000321 +:1065F000807F00000381F800000387E00000039F14 +:1066000000000003FC00000003F000000003E000B5 +:1066100000000380000000000000000000000000F7 +:1066200000000007E000007E1FF00000FFBFF80040 +:1066300001E7F83C000381F01C000380E00C00033C +:1066400080E00E000300E00E000380E00E000380F7 +:10665000E00C000381F01C0001E7B83C0000FF3FA4 +:10666000F800007E1FF00000000FE00000000000B6 +:106670000000000000000000000000003FC000001B +:10668000007FE0000000FFF0000001E07800000360 +:10669000C03806000380181E000380187E000380A7 +:1066A00019F80003801FE00003803FC00003C07F93 +:1066B000000001E1FC000000FFF00000007FC000CE +:1066C00000003F000000000000000000000000008B +:1066D0000000C0E0F0F8FC00000000000000F03F07 +:1066E000000000000000F83F000000000000000073 +:1066F0000000004003B8E23F00000000000000007E +:1067000006D0CF43EBFD4C3E033333333333E33F0B +:10671000FFAB6FDBB66DDB3F4D268F515555D53F37 +:1067200001411DA96074D13F65DBC9934A86CD3F05 +:10673000EF4E454A287ECA3F3E5555555555C53FF3 +:1067400093BDBE166CC166BF2CDE25AF6A56113FE5 +:10675000F16BD2C541BDBBBED0A4BE726937663EE7 +:106760000000000000000000886700080000002012 +:106770005C01000096090008F86700085C01002031 +:106780003C1F0000843C00081184A24A04680D01EB +:10679000020304060708090204060810691401141C +:1067A0006939A35B07D008434D43432D4C491F3043 +:1067B000393234313302936C69800D3130362E31E9 +:1067C000322E392E323133800D4538444238343937 +:1067D000333332393905607573657205107465732A +:1067E00074071231323334353623FFFF134D47140B +:0867F00008994662080219C86D :0400000508000131BD :00000001FF diff --git a/firmware/stm32-esp/project/pro.uvgui.LS-PC b/firmware/stm32-esp/project/pro.uvgui.LS-PC index 1bea18d0..19d00cfa 100644 --- a/firmware/stm32-esp/project/pro.uvgui.LS-PC +++ b/firmware/stm32-esp/project/pro.uvgui.LS-PC @@ -11,17 +11,17 @@ 38003 Registers - 140 100 + 140 130 346 Code Coverage - 890 100 + 1008 160 204 Performance Analyzer - 1168 175 175 100 + 1168 @@ -86,8 +86,8 @@ 44 - 0 - 1 + 2 + 3 -1 -1 @@ -97,17 +97,17 @@ -1 - 72 - -258 - 1676 - 1174 + 0 + 195 + 1965 + 1032 0 - 563 - 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000400000001000000010000003A433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C6D61696E2E6300000000066D61696E2E6300000000C5D4F200FFFFFFFF43433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C73686F775C706D5F75617274332E63000000000A706D5F75617274332E6300000000FFDC7800FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C73686F775C73696D756C6174696F6E5F6C63642E63000000001073696D756C6174696F6E5F6C63642E6300000000BECEA100FFFFFFFF49433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832385C757365725C73686F775C73696D756C6174696F6E5F6C63642E68000000001073696D756C6174696F6E5F6C63642E6800000000F0A0A100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD50001000000000000000200000021FFFFFFC00000008306000059040000 + 424 + 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000200000001000000010000005E433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930345C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C6D7174745C6D7174742E6300000000066D7174742E6300000000C5D4F200FFFFFFFF66433A5C55736572735C4C532D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930345C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C73686F775C657370383236365F776F726B2E63000000000E657370383236365F776F726B2E6300000000FFDC7800FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD5000100000000000000020000001A0000006F00000080070000D2030000 @@ -126,11 +126,11 @@ 0 16 - 000000005300000049010000AC030000 + F4000000530000008E050000DF000000 16 - 000000006F00000049010000D2030000 + F40000006F0000008E050000FB000000 @@ -146,7 +146,7 @@ 0 16 - C8FEFFFF530000000B000000AC030000 + EFFEFFFF530000001A000000B6030000 16 @@ -166,7 +166,7 @@ 0 16 - D7FEFFFF530000001A000000AC030000 + EFFEFFFF530000001A000000B6030000 16 @@ -446,7 +446,7 @@ 0 16 - D7FEFFFF530000001A000000AC030000 + EFFEFFFF530000001A000000B6030000 16 @@ -466,7 +466,7 @@ 0 16 - D7FEFFFF530000001A000000AC030000 + EFFEFFFF530000001A000000B6030000 16 @@ -486,7 +486,7 @@ 0 16 - 00000000BB0300008007000086040000 + 00000000B60300008007000081040000 16 @@ -526,7 +526,7 @@ 0 16 - 00000000CF0300008007000049050000 + 00000000B60300008007000030050000 16 @@ -1706,7 +1706,7 @@ 2 16 - 030000001C000000DA03000038000000 + 000000001C000000D703000038000000 16 @@ -1726,7 +1726,7 @@ 0 16 - 00000000070400007C07000020040000 + 00000000D103000080070000EA030000 16 @@ -1746,7 +1746,7 @@ 0 16 - 0700000000000000F00100001C000000 + 0800000000000000F10100001C000000 16 @@ -1795,14 +1795,14 @@ 3355 - 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFFF4000000DF0000008E050000E3000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000F40000006F0000008E050000FB000000F4000000530000008E050000DF0000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF9A040000530000009E04000015020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000009E0400006F0000008E050000310200009E040000530000008E0500001502000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF120100005300000016010000B603000000000000020000000400000001000000B8FEFFFF2D060000FFFFFFFF010000007394000001800010000000000000000000006F00000012010000D2030000000000005300000012010000B603000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000F80100008E050000FC01000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000180200008E050000C102000000000000FC0100008E050000A502000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC7020000FC010000CB020000A502000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000001102000028060000150200000000000001000000040000000100000002FDFFFF8A000000FFFFFFFF03000000B4010000D2010000CF010000018000800000000000001A0000003102000028060000C80300001A0000001502000028060000AC0300000000000040820046030000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000007000000C7000000008000000100000007FFFFFF3C04000087060000B605000001000000010000000100000077940000008000000100000007FFFFFF23040000870600009D050000010000000100000001000000C5000000008000000100000007FFFFFF2804000087060000F3040000010000000100000001000000ED0300000010000001000000CFFDFFFFC000000012FFFFFF190400000100000000000000010000006D0000000010000001000000DEFDFFFFC000000021FFFFFF19040000000000000000000000000000C30000000010000001000000DEFDFFFFC000000021FFFFFF19040000000000000000000000000000C40000000010000001000000DEFDFFFFC000000021FFFFFF1904000000000000010000000000000000000000 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFFF4000000DF0000008E050000E3000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000F40000006F0000008E050000FB000000F4000000530000008E050000DF0000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF9A040000530000009E04000015020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000009E0400006F0000008E050000310200009E040000530000008E0500001502000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF120100005300000016010000B603000000000000020000000400000001000000B8FEFFFF2D060000FFFFFFFF010000007394000001800010000000000000000000006F00000012010000D2030000000000005300000012010000B603000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000F80100008E050000FC01000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000180200008E050000C102000000000000FC0100008E050000A502000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFC7020000FC010000CB020000A502000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000001102000028060000150200000000000001000000040000000100000002FDFFFF8A000000FFFFFFFF03000000B4010000D2010000CF010000018000800000000000001A0000003102000028060000C80300001A0000001502000028060000AC0300000000000040820046030000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB4010000000000000700000077940000008000000100000000000000D2030000800700004C050000010000000100000001000000C5000000008000000100000000000000D2030000800700009D040000010000000100000001000000C7000000008000000100000000000000D2030000800700004C050000010000000100000001000000ED0300000010000001000000EFFEFFFF6F0000001A000000D20300000100000000000000010000006D0000000010000001000000EFFEFFFF6F0000001A000000D2030000000000000000000000000000C30000000010000001000000EFFEFFFF6F0000001A000000D2030000000000000000000000000000C40000000010000001000000EFFEFFFF6F0000001A000000D203000000000000010000000000000000000000 59392 File - 2870 - 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000844656275674C6F67960000000000000012001153696D4C43445F53686F775F504D325F350844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740E54696D335F4D305F415252536574000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65CC030000 + 2860 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000001153696D4C43445F53686F775F504D325F35960000000000000011001153696D4C43445F53686F775F504D325F350844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65CC030000 1423 @@ -1818,7 +1818,7 @@ Build 966 - 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0000000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000000000000100000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 583 @@ -1834,7 +1834,7 @@ Debug 2373 - 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720000000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000007200000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7200000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720000000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720000000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730000000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72000000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000007200000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 898 @@ -1863,15 +1863,15 @@ 0 32767 0 - 32768 + 4096 0 16 - CD0300005300000080070000B6030000 + 6E0400005300000080070000B6030000 16 - 3701000010020000DC0700007A030000 + 6E0400006F00000080070000D2030000 @@ -1887,7 +1887,7 @@ 0 16 - 76FFFFFF530000001A000000D1030000 + 94FEFFFF530000001A000000D1030000 16 @@ -1927,7 +1927,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -1947,7 +1947,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -1967,7 +1967,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -1987,7 +1987,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2047,7 +2047,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2067,7 +2067,7 @@ 0 16 - CD0300007000000080070000B6030000 + 6E0400007000000080070000B6030000 16 @@ -2087,7 +2087,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2107,7 +2107,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2127,7 +2127,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2147,7 +2147,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2167,7 +2167,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2367,7 +2367,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2947,7 +2947,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -2967,7 +2967,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -3507,7 +3507,7 @@ 2 16 - 020000001C0000007F02000038000000 + 080000001C0000008502000038000000 16 @@ -3527,7 +3527,7 @@ 0 16 - D0030000730000006F0A00009E010000 + 71040000730000007D07000097030000 16 @@ -3536,14 +3536,14 @@ 3438 - 000000000C000000000000000040000001000000FFFFFFFFFFFFFFFFC903000053000000CD030000B603000001000000020000100400000001000000000000000000000000000000000000000000000001000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB090000FFFF02000B004354616262656450616E6500400000010000003701000010020000DC0700007A030000CD0300005300000080070000B603000000000000404100560F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031010000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFF0500000000000000000000000000000000000000000000000000000001000000FFFFFFFF8F07000001000000FFFFFFFF8F070000000000000020000000000000FFFFFFFFFFFFFFFFAE000000B300000092040000B7000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D60100004589000001800020000000000000AE0000006B00000092040000CF000000AE0000004F00000092040000B30000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF430300004F000000470300006B010000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C3000001800040000000000000470300006B000000F103000087010000470300004F000000F10300006B01000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFFAA00000053000000AE00000074020000000000000200000004000000010000000000000000000000FFFFFFFF030000006D000000C3000000C400000001800010000000000000000000006F000000AA000000900200000000000053000000AA0000007402000000000000404100460300000005426F6F6B73000000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7300000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657300000000C400000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF6D00000001000000FFFFFFFF6D000000000000000080000000000000FFFFFFFFFFFFFFFF1A00000048020000800700004C0200000000000001000010040000000100000044FEFFFF9201000000000000000000000000000001000000C60000000000000001000000000000000000000001000000FFFFFFFF480300003E0300004C030000B303000000000000020000000400000000000000000000000000000000000000000000000000000001000000C600000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000005F030000C405000063030000000000000100000004000000010000000000000000000000FFFFFFFF05000000C5000000C7000000B4010000D2010000CF010000018000800000000000001A0000007F030000C4050000E30300001A00000063030000C4050000C70300000000000040820046050000000C4275696C64204F757470757400000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC50000000000000003000000ED030000001000000100000076FFFFFF6F0000001A000000ED03000001000000000000000000000073940000001000000100000076FFFFFF6F0000001A000000ED0300000000000001000000010000007794000000800000010000001A000000D2030000800700001904000001000000010000000100000000000000 + 000000000C000000000000000040000001000000FFFFFFFFFFFFFFFF6A040000530000006E040000B603000001000000020000100400000001000000AEFAFFFF0902000000000000000000000000000001000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB090000FFFF02000B004354616262656450616E6500400000010000006E0400006F00000080070000D20300006E0400005300000080070000B603000000000000404100560F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031010000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFF0500000000000000000000000000000000000000000000000000000001000000FFFFFFFF8F07000001000000FFFFFFFF8F070000000000000020000000000000FFFFFFFFFFFFFFFFAE000000B300000092040000B7000000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D60100004589000001800020000000000000AE0000006B00000092040000CF000000AE0000004F00000092040000B30000000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF430300004F000000470300006B010000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C3000001800040000000000000470300006B000000F103000087010000470300004F000000F10300006B01000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFFAA00000053000000AE00000074020000000000000200000004000000010000000000000000000000FFFFFFFF030000006D000000C3000000C400000001800010000000000000000000006F000000AA000000900200000000000053000000AA0000007402000000000000404100460300000005426F6F6B73000000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7300000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657300000000C400000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF6D00000001000000FFFFFFFF6D000000000000000080000000000000FFFFFFFFFFFFFFFF1A00000048020000800700004C0200000000000001000000040000000100000044FEFFFF9201000000000000000000000000000001000000C60000000000000001000000000000000000000001000000FFFFFFFF480300003E0300004C030000B303000000000000020000000400000000000000000000000000000000000000000000000000000001000000C600000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A0000005F030000C405000063030000000000000100000004000000010000000000000000000000FFFFFFFF05000000C5000000C7000000B4010000D2010000CF010000018000800000000000001A0000007F030000C4050000E30300001A00000063030000C4050000C70300000000000040820046050000000C4275696C64204F757470757400000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC50000000000000003000000ED030000001000000100000094FEFFFF6F0000001A000000ED03000001000000000000000100000073940000001000000100000076FFFFFF6F0000001A000000ED0300000000000001000000000000007794000000800000010000001A000000D2030000800700001904000001000000010000000100000000000000 59392 File - 2848 - 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000844656275674C6F67960000000000000011000844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740E54696D335F4D305F4152525365740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000100150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C6559010000 + 2860 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000000000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000001153696D4C43445F53686F775F504D325F35960000000000000011001153696D4C43445F53686F775F504D325F350844656275674C6F6709506F7765725F4C43440A4553505F4170496E69740B53797344656275674C6F670A307830303130304333340D4164634D736B436C6B44697631135379736374726C5F47657448436C6B4672657104426175640E44444C5F4D43555F5345524945530A53595354454D5F5854480C484333324C30377850787878144E5649435F436C65617250656E64696E674952510B54696D335F4D305F52756E1454696D335F4D6F6465305F456E61626C654972711154696D335F436C656172496E74466C61671054696D335F4D305F436E7431365365740000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000100150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000003002180C8880000000000001700000027264B696C6C20416C6C20427265616B706F696E747320696E2043757272656E7420546172676574000000000000000000000000010000000100000000000000000000000100000000002180E50100000000000078000000264B696C6C20416C6C20427265616B706F696E747320696E204163746976652050726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180E601000000000000790000002F4B696C6C20416C6C20427265616B706F696E747320696E204D756C74692D50726F6A65637420576F726B73706163650000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C6559010000 1423 @@ -3601,39 +3601,21 @@ 100 1 - ..\user\main.c - 22 - 41 - 59 - 1 - - 0 - - - ..\user\show\pm_uart3.c - 21 - 25 - 32 - 1 - - 0 - - - ..\user\show\simulation_lcd.c - 20 - 1057 - 1063 - 1 - - 0 - - - ..\user\show\simulation_lcd.h + ..\user\mqtt\mqtt.c 0 - 24 - 56 + 1 + 218 1 - + 33,127,203,210,237 + 0 + + + ..\user\show\esp8266_work.c + 4 + 29 + 41 + 1 + 40,45,53,58,64,90,155,174,189,219,264,292 0 diff --git a/firmware/stm32-esp/project/pro.uvgui.RJYF-PC b/firmware/stm32-esp/project/pro.uvgui.RJYF-PC index 212a445a..16ce13d0 100644 --- a/firmware/stm32-esp/project/pro.uvgui.RJYF-PC +++ b/firmware/stm32-esp/project/pro.uvgui.RJYF-PC @@ -11,17 +11,17 @@ 38003 Registers - 188 131 + 188 104 346 Code Coverage - 1408 160 + 1408 818 204 Performance Analyzer - 1568 + 1568 235 235 188 @@ -42,7 +42,7 @@ 1936 Watch 1 - 200 133 133 + 200 804 186 1937 @@ -89,25 +89,25 @@ 2 3 - -1 - -1 + -32000 + -32000 -1 -1 - 10 - 525 - 2309 - 1265 + 0 + 413 + 2454 + 1427 0 - 481 - 01000000040000000100000001000000010000000100000000000000020000000000000001000000010000000000000028000000280000000100000003000000000000000100000049433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C657370383236365F776F726B2E63000000000E657370383236365F776F726B2E6300000000C5D4F200FFFFFFFF4A433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C657370383236365F75617274322E63000000000F657370383236365F75617274322E6300000000FFDC7800FFFFFFFF45433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303832395C757365725C73686F775C6465765F776F726B2E63000000000A6465765F776F726B2E6300000000BECEA100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD500010000000000000002000000410100006F000000000A00003A050000 + 824 + 0100000004000000010000000100000001000000010000000000000002000000000000000100000001000000000000002800000028000000010000000500000001000000010000005B433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930325C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C6D61696E2E6300000000066D61696E2E6300000000F0A0A100FFFFFFFF68433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930325C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C73686F775C657370383236365F776F726B2E63000000000E657370383236365F776F726B2E6300000000FFDC7800FFFFFFFF66433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930325C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C646174615C62617369635F646174612E68000000000C62617369635F646174612E6800000000F0A0A100FFFFFFFF66433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930325C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C64726976655C6273705F75617274322E63000000000B6273705F75617274322E6300000000BCA8E100FFFFFFFF69433A5C55736572735C524A59462D50435C4465736B746F705C53686F77456E7669722D56322E302D32303231303930325C77756D65692D736D6172745C6669726D776172655C73746D33322D6573705C757365725C73686F775C657370383236365F75617274322E63000000000F657370383236365F75617274322E6300000000BCA8E100FFFFFFFF0100000010000000C5D4F200FFDC7800BECEA100F0A0A100BCA8E1009CC1B600F7B88600D9ADC200A5C2D700B3A6BE00EAD6A300F6FA7D00B5E99D005FC3CF00C1838300CACAD5000100000000000000020000001A0000006F000000000A00003A050000 @@ -116,7 +116,7 @@ -1 -1 - 1 + 0 0 0 0 @@ -126,17 +126,17 @@ 0 16 - 00000000530000003D0100001E050000 + 44010000530000006E07000015010000 16 - 85000000A1000000C5010000B1010000 + 440100006F0000006E07000031010000 1005 1005 - 1 + 0 0 0 0 @@ -146,17 +146,17 @@ 0 16 - 03000000730000003A010000FF040000 + E0FEFFFF530000001A00000039050000 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 109 109 - 1 + 0 0 0 0 @@ -166,11 +166,11 @@ 0 16 - 03000000730000003A010000FF040000 + E0FEFFFF530000001A00000039050000 16 - 85000000A100000001020000AB030000 + E2000000FE0000005E02000008040000 @@ -190,7 +190,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -210,7 +210,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -230,7 +230,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -250,7 +250,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -270,7 +270,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -290,7 +290,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -310,7 +310,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -330,7 +330,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -350,7 +350,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -370,7 +370,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -390,7 +390,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -410,7 +410,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -430,13 +430,13 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 195 195 - 1 + 0 0 0 0 @@ -446,17 +446,17 @@ 0 16 - 03000000730000003A010000FF040000 + E0FEFFFF530000001A00000039050000 16 - 85000000A100000001020000AB030000 + E2000000FE0000005E02000008040000 196 196 - 1 + 0 0 0 0 @@ -466,11 +466,11 @@ 0 16 - 03000000730000003A010000FF040000 + E0FEFFFF530000001A00000039050000 16 - 85000000A100000001020000AB030000 + E2000000FE0000005E02000008040000 @@ -486,11 +486,11 @@ 0 16 - 0000000039040000000A00001E050000 + 1A0000001E050000000A000085070000 16 - 9FFEFFFF3A0500009F08000001070000 + E2000000FE00000099040000C0010000 @@ -510,7 +510,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -526,11 +526,11 @@ 0 16 - 000000001E050000000A000003060000 + 1A0000001E050000000A000085070000 16 - 9FFEFFFF3A0500009F08000001070000 + E2000000FE00000099040000C0010000 @@ -550,7 +550,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -570,7 +570,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -610,7 +610,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -630,7 +630,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -650,7 +650,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -670,7 +670,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -690,7 +690,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -710,7 +710,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -730,7 +730,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -750,7 +750,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -770,7 +770,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -790,7 +790,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -810,7 +810,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -830,7 +830,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -850,7 +850,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -870,7 +870,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -890,7 +890,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -910,7 +910,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -930,7 +930,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -950,7 +950,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -970,7 +970,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -990,7 +990,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1010,7 +1010,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1030,7 +1030,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1050,7 +1050,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1070,7 +1070,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1090,7 +1090,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1110,7 +1110,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1130,7 +1130,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1146,11 +1146,11 @@ 0 16 - 00000000700000004301000014050000 + 00000000700000004001000073040000 16 - 85000000A100000001020000AB030000 + E2000000FE0000005E02000008040000 @@ -1162,15 +1162,15 @@ 0 32767 0 - 32768 + 4096 0 16 - 03000000AD030000F107000010050000 + 1D000000A90200002107000010050000 16 - 9FFEFFFF3A0500009F08000001070000 + E2000000FE00000099040000C0010000 @@ -1182,15 +1182,15 @@ 0 32767 0 - 32768 + 4096 0 16 - 03000000AD030000F107000010050000 + 1D000000A90200002107000010050000 16 - 9FFEFFFF3A0500009F08000001070000 + E2000000FE0000005E02000008040000 @@ -1210,7 +1210,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1230,7 +1230,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1242,15 +1242,15 @@ 0 32767 0 - 32768 + 4096 0 16 - 03000000AD030000F107000010050000 + 1D000000A90200002107000010050000 16 - 9FFEFFFF3A0500009F08000001070000 + E2000000FE0000005E02000008040000 @@ -1262,15 +1262,15 @@ 0 32767 0 - 32768 + 4096 0 16 - 03000000AD030000F107000010050000 + 1D000000A90200002107000010050000 16 - 9FFEFFFF3A0500009F08000001070000 + E2000000FE0000005E02000008040000 @@ -1290,7 +1290,7 @@ 16 - 85000000A10000003C04000063010000 + E2000000FE00000099040000C0010000 @@ -1310,7 +1310,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1330,7 +1330,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1350,7 +1350,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1370,7 +1370,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1390,7 +1390,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1410,7 +1410,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1430,7 +1430,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1450,7 +1450,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1470,7 +1470,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1490,7 +1490,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1510,7 +1510,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1530,7 +1530,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1550,7 +1550,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1570,7 +1570,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1590,7 +1590,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1610,7 +1610,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1630,7 +1630,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1650,7 +1650,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1670,7 +1670,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1690,7 +1690,7 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 @@ -1746,7 +1746,7 @@ 1 16 - 010000001C000000EA01000038000000 + 000000001C000000E901000038000000 16 @@ -1790,19 +1790,19 @@ 16 - 85000000A1000000C5010000B1010000 + E2000000FE000000220200000E020000 - 3507 - 000000000D000000000000000010000001000000FFFFFFFFFFFFFFFF3D01000053000000410100001E050000010000000200001004000000010000000000000000000000FFFFFFFF04000000ED0300006D000000C3000000C4000000FFFF02000B004354616262656450616E65001000000100000085000000A1000000C5010000B101000000000000530000003D0100001E0500000000000040410056040000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73010000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7301000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657301000000C400000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000020000000000000FFFFFFFFFFFFFFFF44010000150100006E07000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D60100004589000001800020000000000000440100006F0000006E0700003101000044010000530000006E070000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF4301000053000000470100001405000000000000020000000400000001000000C2FEFFFFB7080000FFFFFFFF010000007394000001800010000000000000000000006F00000043010000300500000000000053000000430100001405000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000D00200006E070000D402000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000F00200006E070000CF03000000000000D40200006E070000B303000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFB7030000D4020000BB030000B303000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF0000000089030000F40700008D03000000000000010000000400000001000000000000000000000000000000000000000000000001000000FFFFFFFF04000000B4010000D2010000CF010000779400000180008000000000000000000000A9030000F40700004B050000000000008D030000F40700002F0500000000000040820046040000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000002000000C500000000800000010000000000000055040000000A00003A050000010000000000000001000000C70000000080000001000000000000003A050000000A00001F06000000000000010000000000000000000000 + 3347 + 000000000B000000000000000020000000000000FFFFFFFFFFFFFFFF44010000150100006E07000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000440100006F0000006E0700003101000044010000530000006E070000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF40010000530000004401000073040000000000000200000004000000010000000000000000000000FFFFFFFF010000007394000001800010000000000000000000006F000000400100008F0400000000000053000000400100007304000000000000404100460100000009526567697374657273000000007394000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF7394000001000000FFFFFFFF73940000000000000080000000000000FFFFFFFFFFFFFFFF00000000D00200006E070000D402000000000000010000000400000001000000000000000000000000000000000000000000000001000000C6000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB0900000180008000000000000000000000F00200006E070000CF03000000000000D40200006E070000B303000000000000404100460F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031000000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFFFFFFFFFF0000000001000000000000000000000001000000FFFFFFFFB7030000D4020000BB030000B303000000000000020000000400000000000000000000000000000000000000000000000000000002000000C6000000FFFFFFFF8F07000001000000FFFFFFFF8F07000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF1A00000085020000240700008902000000000000010000000400000001000000D2FBFFFFC0000000FFFFFFFF04000000B4010000D2010000CF01000077940000018000800000000000001A000000A5020000240700004B0500001A00000089020000240700002F0500000000000040820046040000000A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0742726F77736572000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFB401000001000000FFFFFFFFB40100000000000006000000ED0300000010000001000000E0FEFFFF6F0000001A000000550500000100000000000000010000006D0000000010000001000000E0FEFFFF6F0000001A00000055050000000000000000000000000000C30000000010000001000000E0FEFFFF6F0000001A00000055050000000000000000000000000000C40000000010000001000000E0FEFFFF6F0000001A00000055050000000000000100000000000000C500000000800000010000001A0000003A050000000A0000A1070000010000000000000001000000C700000000800000010000001A0000003A050000000A0000A107000000000000010000000000000000000000 59392 File - 2548 - 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000040004000000000000000000000000000000000100000001000000018022E100000000040005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000400460000000000000000000000000000000001000000010000000180FE880000000004004500000000000000000000000000000000010000000100000001800B810000000004001300000000000000000000000000000000010000000100000001800C810000000004001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000D53696D756C6174696F6E4C4344960000000000000014000D53696D756C6174696F6E4C43440F53696D4C43445F447261774C696E650953696D4C43445F523308506F7765725F424C09553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640C43616E416C6C4672616D65730000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 + 2553 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000F455350383236365F53656E64434D44960000000000000014000F455350383236365F53656E64434D440D53696D756C6174696F6E4C43440F53696D4C43445F447261774C696E650953696D4C43445F523308506F7765725F424C09553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020000001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 1423 @@ -1818,7 +1818,7 @@ Build 966 - 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0100000000000000000000000100000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 + 00200000010000001000FFFF01001100434D4643546F6F6C426172427574746F6ECF7F0000000000001C0000000000000000000000000000000001000000010000000180D07F0000000000001D000000000000000000000000000000000100000001000000018030800000000000001E000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6EC7040000000000006A0000000C4261746368204275696C2664000000000000000000000000010000000100000000000000000000000100000004000580C7040000000000006A0000000C4261746368204275696C266400000000000000000000000001000000010000000000000000000000010000000000058046070000000000006B0000000D42617463682052656275696C640000000000000000000000000100000001000000000000000000000001000000000005804707000000000000FFFFFFFF0B426174636820436C65616E0000000000000000010000000000000001000000000000000000000001000000000005809E8A0000000000001F0000000F4261746326682053657475702E2E2E000000000000000000000000010000000100000000000000000000000100000000000180D17F0000000004002000000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001804C8A0000000000002100000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001900434D4643546F6F6C426172436F6D626F426F78427574746F6EBA00000000000000000000000000000000000000000000000001000000010000009600000003002050000000000370726F960000000000000001000370726F000000000180EB880000000000002200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C07F000000000000230000000000000000000000000000000001000000010000000180B08A000000000400240000000000000000000000000000000001000000010000000180A8010000000004004E00000000000000000000000000000000010000000100000001807202000000000400530000000000000000000000000000000001000000010000000180BE010000000000005000000000000000000000000000000000010000000100000000000000054275696C64DE010000 583 @@ -1834,7 +1834,7 @@ Debug 2373 - 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + 00200000000000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000000002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000000000002D0000000000000000000000000000000001000000010000000180F07F0000000000002E0000000000000000000000000000000001000000010000000180E8880000000000003700000000000000000000000000000000010000000100000001803B010000000000002F0000000000000000000000000000000001000000010000000180BB8A00000000000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000000000000310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720000000000000000010000000000000001000000000000000000000001000000000013800F01000000000000320000000E4D656D6F72792057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000000000000330000000E53657269616C2057696E646F77730000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000000000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7200000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720000000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720000000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000000000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730000000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72000000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 898 @@ -1857,7 +1857,7 @@ -1 -1 - 0 + 1 0 0 0 @@ -1867,11 +1867,11 @@ 0 16 - 4401000053000000000A000015010000 + 00000000530000002E01000039050000 16 - 440100006F000000000A000031010000 + 000000006F0000002E01000055050000 @@ -1887,7 +1887,7 @@ 0 16 - 03000000730000003D0100001A050000 + 03000000730000002B0100001A050000 16 @@ -1907,7 +1907,7 @@ 0 16 - 03000000730000003D0100001A050000 + 03000000730000003D01000010050000 16 @@ -1917,7 +1917,7 @@ 1465 1465 - 1 + 0 0 0 0 @@ -1927,11 +1927,11 @@ 0 16 - F407000073000000FD0900001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -1947,11 +1947,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -1967,11 +1967,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -1987,11 +1987,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2047,11 +2047,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2067,11 +2067,11 @@ 0 16 - F407000073000000FD0900001A050000 + 4605000070000000000A000039050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2087,11 +2087,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2107,11 +2107,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2127,11 +2127,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2147,11 +2147,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2167,11 +2167,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2187,7 +2187,7 @@ 0 16 - 03000000730000003D0100001A050000 + 03000000730000003D01000010050000 16 @@ -2207,7 +2207,7 @@ 0 16 - 03000000730000003D0100001A050000 + 03000000730000003D01000010050000 16 @@ -2367,11 +2367,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2887,7 +2887,7 @@ 0 16 - 03000000730000003D0100001A050000 + 03000000730000002B0100001A050000 16 @@ -2947,11 +2947,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -2967,11 +2967,11 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 @@ -3231,7 +3231,7 @@ 16 - 85000000A1000000C5010000B1010000 + 0A0000000A0000006E0000006E000000 @@ -3507,7 +3507,7 @@ 2 16 - 050000001C0000008202000038000000 + 0A0000001C0000008702000038000000 16 @@ -3527,23 +3527,23 @@ 0 16 - F407000073000000940B00001A050000 + 4905000073000000B20800001A050000 16 - E0070000C4020000D40F000013050000 + 00080000CB0200005A0B0000A7070000 - 3415 - 000000000C000000000000000020000000000000FFFFFFFFFFFFFFFF4401000015010000000A000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D601000045890000FFFF02000B004354616262656450616E650020000000000000440100006F000000000A0000310100004401000053000000000A0000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000001000000FFFFFFFFFFFFFFFF40010000530000004401000039050000010000000200001004000000010000000000000000000000FFFFFFFF05000000ED0300006D000000C3000000C40000007394000001800010000001000000000000006F0000004001000055050000000000005300000040010000390500000000000040410056050000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF05426F6F6B73000000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7300000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657300000000C400000001000000FFFFFFFFFFFFFFFF09526567697374657273010000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000080000000000000FFFFFFFFFFFFFFFF00000000E6020000000A0000EA02000000000000010000000400000001000000FBFCFFFFAB01000000000000000000000000000001000000C60000000000000001000000000000000000000001000000FFFFFFFF000500005A040000040500003905000000000000020000000400000000000000000000000000000000000000000000000000000001000000C600000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF00000000ED0200006E070000F1020000000000000100000004000000010000000000000000000000FFFFFFFF06000000C5000000C7000000B4010000D2010000CF0100007794000001800080000000000000000000000D0300006E070000CF03000000000000F10200006E070000B30300000000000040820046060000000C4275696C64204F757470757400000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0642726F777365000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC5000000000000000040000001000000FFFFFFFFFFFFFFFFED07000053000000F10700003905000001000000020000100400000001000000A2F9FFFF5302000000000000000000000000000001000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB090000018000400000010000005A0600006F000000000A000055050000F107000053000000000A00003905000000000000404100560F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031010000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203101000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFF0500000000000000000000000000000000000000000000000000000001000000FFFFFFFF8F07000001000000FFFFFFFF8F070000000000000000000000000000 + 3585 + 000000000E000000000000000010000001000000FFFFFFFFFFFFFFFF2E010000530000003201000039050000010000000200001004000000010000000000000000000000FFFFFFFF02000000ED03000073940000FFFF02000B004354616262656450616E650010000001000000000000006F0000002E0100005505000000000000530000002E010000390500000000000040410056020000000750726F6A65637401000000ED03000001000000FFFFFFFFFFFFFFFF09526567697374657273010000007394000001000000FFFFFFFFFFFFFFFF00000000000000000000000000000000000000000000000001000000FFFFFFFFED03000001000000FFFFFFFFED030000000000000020000000000000FFFFFFFFFFFFFFFF4401000015010000000A000019010000000000000100000004000000010000000000000000000000FFFFFFFF08000000CB00000057010000CC000000F08B00005A01000079070000D60100004589000001800020000000000000440100006F000000000A0000310100004401000053000000000A0000150100000000000040280046080000000B446973617373656D626C7900000000CB00000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A6572000000005701000001000000FFFFFFFFFFFFFFFF14506572666F726D616E636520416E616C797A657200000000CC00000001000000FFFFFFFFFFFFFFFF0E4C6F67696320416E616C797A657200000000F08B000001000000FFFFFFFFFFFFFFFF0D436F646520436F766572616765000000005A01000001000000FFFFFFFFFFFFFFFF11496E737472756374696F6E205472616365000000007907000001000000FFFFFFFFFFFFFFFF0F53797374656D20416E616C797A657200000000D601000001000000FFFFFFFFFFFFFFFF104576656E742053746174697374696373000000004589000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFCB00000001000000FFFFFFFFCB000000000000000040000000000000FFFFFFFFFFFFFFFF2A060000530000002E060000ED020000000000000200000004000000010000000000000000000000FFFFFFFF2B000000E2050000CA0900002D8C00002E8C00002F8C0000308C0000318C0000328C0000338C0000348C0000358C0000368C0000378C0000388C0000398C00003A8C00003B8C00003C8C00003D8C00003E8C00003F8C0000408C0000418C000050C3000051C3000052C3000053C3000054C3000055C3000056C3000057C3000058C3000059C300005AC300005BC300005CC300005DC300005EC300005FC3000060C3000061C3000062C3000063C30000018000400000000000002E0600006F0000006E070000090300002E060000530000006E070000ED02000000000000404100462B0000000753796D626F6C7300000000E205000001000000FFFFFFFFFFFFFFFF0A5472616365204461746100000000CA09000001000000FFFFFFFFFFFFFFFF00000000002D8C000001000000FFFFFFFFFFFFFFFF00000000002E8C000001000000FFFFFFFFFFFFFFFF00000000002F8C000001000000FFFFFFFFFFFFFFFF0000000000308C000001000000FFFFFFFFFFFFFFFF0000000000318C000001000000FFFFFFFFFFFFFFFF0000000000328C000001000000FFFFFFFFFFFFFFFF0000000000338C000001000000FFFFFFFFFFFFFFFF0000000000348C000001000000FFFFFFFFFFFFFFFF0000000000358C000001000000FFFFFFFFFFFFFFFF0000000000368C000001000000FFFFFFFFFFFFFFFF0000000000378C000001000000FFFFFFFFFFFFFFFF0000000000388C000001000000FFFFFFFFFFFFFFFF0000000000398C000001000000FFFFFFFFFFFFFFFF00000000003A8C000001000000FFFFFFFFFFFFFFFF00000000003B8C000001000000FFFFFFFFFFFFFFFF00000000003C8C000001000000FFFFFFFFFFFFFFFF00000000003D8C000001000000FFFFFFFFFFFFFFFF00000000003E8C000001000000FFFFFFFFFFFFFFFF00000000003F8C000001000000FFFFFFFFFFFFFFFF0000000000408C000001000000FFFFFFFFFFFFFFFF0000000000418C000001000000FFFFFFFFFFFFFFFF000000000050C3000001000000FFFFFFFFFFFFFFFF000000000051C3000001000000FFFFFFFFFFFFFFFF000000000052C3000001000000FFFFFFFFFFFFFFFF000000000053C3000001000000FFFFFFFFFFFFFFFF000000000054C3000001000000FFFFFFFFFFFFFFFF000000000055C3000001000000FFFFFFFFFFFFFFFF000000000056C3000001000000FFFFFFFFFFFFFFFF000000000057C3000001000000FFFFFFFFFFFFFFFF000000000058C3000001000000FFFFFFFFFFFFFFFF000000000059C3000001000000FFFFFFFFFFFFFFFF00000000005AC3000001000000FFFFFFFFFFFFFFFF00000000005BC3000001000000FFFFFFFFFFFFFFFF00000000005CC3000001000000FFFFFFFFFFFFFFFF00000000005DC3000001000000FFFFFFFFFFFFFFFF00000000005EC3000001000000FFFFFFFFFFFFFFFF00000000005FC3000001000000FFFFFFFFFFFFFFFF000000000060C3000001000000FFFFFFFFFFFFFFFF000000000061C3000001000000FFFFFFFFFFFFFFFF000000000062C3000001000000FFFFFFFFFFFFFFFF000000000063C3000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFE205000001000000FFFFFFFFE2050000000000000010000000000000FFFFFFFFFFFFFFFF4001000053000000440100002F050000000000000200000004000000010000000000000000000000FFFFFFFF030000006D000000C3000000C400000001800010000000000000000000006F000000400100004B0500000000000053000000400100002F05000000000000404100460300000005426F6F6B73000000006D00000001000000FFFFFFFFFFFFFFFF0946756E6374696F6E7300000000C300000001000000FFFFFFFFFFFFFFFF0954656D706C6174657300000000C400000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFF6D00000001000000FFFFFFFF6D000000000000000080000000000000FFFFFFFFFFFFFFFF00000000E6020000000A0000EA02000000000000010000000400000001000000FBFCFFFFAB01000000000000000000000000000001000000C60000000000000001000000000000000000000001000000FFFFFFFF000500005A040000040500003905000000000000020000000400000000000000000000000000000000000000000000000000000001000000C600000001000000C6000000000000000080000000000000FFFFFFFFFFFFFFFF00000000ED0200006E070000F1020000000000000100000004000000010000000000000000000000FFFFFFFF06000000C5000000C7000000B4010000D2010000CF0100007794000001800080000000000000000000000D0300006E070000CF03000000000000F10200006E070000B30300000000000040820046060000000C4275696C64204F757470757400000000C500000001000000FFFFFFFFFFFFFFFF0D46696E6420496E2046696C657300000000C700000001000000FFFFFFFFFFFFFFFF0A4572726F72204C69737400000000B401000001000000FFFFFFFFFFFFFFFF0E536F757263652042726F7773657200000000D201000001000000FFFFFFFFFFFFFFFF0E416C6C205265666572656E63657300000000CF01000001000000FFFFFFFFFFFFFFFF0642726F777365000000007794000001000000FFFFFFFFFFFFFFFFFFFFFFFF000000000000000000000000000000000000000001000000FFFFFFFFC500000001000000FFFFFFFFC5000000000000000040000001000000FFFFFFFFFFFFFFFF4205000053000000460500003905000001000000020000100400000001000000AAFAFFFF6D03000000000000000000000000000001000000FFFFFFFF0F0000008F070000930700009407000095070000960700009007000091070000B5010000B801000038030000B9050000BA050000BB050000BC050000CB09000001800040000001000000910600006F000000000A0000550500004605000053000000000A00003905000000000000404100560F0000001343616C6C20537461636B202B204C6F63616C73000000008F07000001000000FFFFFFFFFFFFFFFF0755415254202331000000009307000001000000FFFFFFFFFFFFFFFF0755415254202332000000009407000001000000FFFFFFFFFFFFFFFF0755415254202333000000009507000001000000FFFFFFFFFFFFFFFF15446562756720287072696E74662920566965776572000000009607000001000000FFFFFFFFFFFFFFFF0757617463682031010000009007000001000000FFFFFFFFFFFFFFFF0757617463682032000000009107000001000000FFFFFFFFFFFFFFFF10547261636520457863657074696F6E7300000000B501000001000000FFFFFFFFFFFFFFFF0E4576656E7420436F756E7465727300000000B801000001000000FFFFFFFFFFFFFFFF09554C494E4B706C7573000000003803000001000000FFFFFFFFFFFFFFFF084D656D6F7279203100000000B905000001000000FFFFFFFFFFFFFFFF084D656D6F7279203200000000BA05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203300000000BB05000001000000FFFFFFFFFFFFFFFF084D656D6F7279203400000000BC05000001000000FFFFFFFFFFFFFFFF105472616365204E617669676174696F6E00000000CB09000001000000FFFFFFFFFFFFFFFF0500000000000000000000000000000000000000000000000000000001000000FFFFFFFF8F07000001000000FFFFFFFF8F070000000000000000000000000000 59392 File - 2563 - 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000004000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE8030000000000000000000000000000000000000000000000010000000100000096000000020020500000000009553347657454696D659600000000000000140009553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640C43616E416C6C4672616D65730D43616E46696C74657253656C311243414E5F4143465F49445F5245475F53454C1143616E52784275664E6F7453746F7265641043414E5F52455345545F454E41424C450000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000002000100150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 + 2553 + 00200000010000002800FFFF01001100434D4643546F6F6C426172427574746F6E00E100000000000000000000000000000000000000000000000100000001000000018001E100000000000001000000000000000000000000000000000100000001000000018003E1000000000000020000000000000000000000000000000001000000010000000180CD7F0000000000000300000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018023E100000000000004000000000000000000000000000000000100000001000000018022E100000000000005000000000000000000000000000000000100000001000000018025E10000000000000600000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001802BE10000000000000700000000000000000000000000000000010000000100000001802CE10000000004000800000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001807A8A0000000000000900000000000000000000000000000000010000000100000001807B8A0000000004000A00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180D3B00000000000000B000000000000000000000000000000000100000001000000018015B10000000004000C0000000000000000000000000000000001000000010000000180F4B00000000004000D000000000000000000000000000000000100000001000000018036B10000000004000E00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FF88000000000000460000000000000000000000000000000001000000010000000180FE880000000000004500000000000000000000000000000000010000000100000001800B810000000000001300000000000000000000000000000000010000000100000001800C810000000000001400000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180F0880000020000000F000000000000000000000000000000000100000001000000FFFF0100120043555646696E64436F6D626F427574746F6EE803000000000000000000000000000000000000000000000001000000010000009600000002002050000000000F455350383236365F53656E64434D44960000000000000014000F455350383236365F53656E64434D440D53696D756C6174696F6E4C43440F53696D4C43445F447261774C696E650953696D4C43445F523308506F7765725F424C09553347657454696D650753686F774C43440D4253505F5541525433496E69740854656D7054696D65075379735469636B0964656C6179313075730E55415254315F53656E64446174610A456E61626C654E7669631055617274315F49525148616E646C65720B7073746352784672616D65117374635F63616E5F72786672616D655F740B43414E5F526563656976650D43414E5F497271466C674765740A43616E5278497271456E0A43414E5F497271436D640000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000018024E10000000000001100000000000000000000000000000000010000000100000001800A810000000000001200000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E2280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B46350000000000000000000000000100000001000000000000000000000001000000020021802280000000000000150000002153746172742F53746F70202644656275672053657373696F6E094374726C2B4635000000000000000000000000010000000100000000000000000000000100000000002180E0010000000000007500000021456E65726779204D6561737572656D656E742026776974686F75742044656275670000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180C488000000000000160000000000000000000000000000000001000000010000000180C988000000000400180000000000000000000000000000000001000000010000000180C788000000000000190000000000000000000000000000000001000000010000000180C8880000000000001700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000021804C010000020001001A0000000F2650726F6A6563742057696E646F77000000000000000000000000010000000100000000000000000000000100000008002180DD880000000000001A0000000750726F6A656374000000000000000000000000010000000100000000000000000000000100000000002180DC8B0000000000003A00000005426F6F6B73000000000000000000000000010000000100000000000000000000000100000000002180E18B0000000000003B0000000946756E6374696F6E73000000000000000000000000010000000100000000000000000000000100000000002180E28B000000000000400000000954656D706C6174657300000000000000000000000001000000010000000000000000000000010000000000218018890000000000003D0000000E536F757263652042726F777365720000000000000000000000000100000001000000000000000000000001000000000021800000000000000400FFFFFFFF00000000000000000001000000000000000100000000000000000000000100000000002180D988000000000000390000000C4275696C64204F7574707574000000000000000000000000010000000100000000000000000000000100000000002180E38B000000000000410000000B46696E64204F75747075740000000000000000000000000100000001000000000000000000000001000000000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180FB7F0000000000001B000000000000000000000000000000000100000001000000000000000446696C65BD030000 1423 @@ -3575,7 +3575,7 @@ Debug 2362 - 00200000010000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000004002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000000002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000020000002D0000000000000000000000000000000001000000010000000180F07F0000020000002E0000000000000000000000000000000001000000010000000180E8880000020000003700000000000000000000000000000000010000000100000001803B010000020001002F0000000000000000000000000000000001000000010000000180BB8A00000200000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000002000100310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F0100000200010032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000002000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000020000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000002000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 + 00200000010000001900FFFF01001100434D4643546F6F6C426172427574746F6ECC880000000000002500000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018017800000000000002600000000000000000000000000000000010000000100000001801D800000000004002700000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000001801A800000000000002800000000000000000000000000000000010000000100000001801B80000000000000290000000000000000000000000000000001000000010000000180E57F0000000000002A00000000000000000000000000000000010000000100000001801C800000000004002B00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF000000000000000000000000000100000001000000018000890000000000002C00000000000000000000000000000000010000000100000001800000000001000000FFFFFFFF0000000000000000000000000001000000010000000180E48B0000020000002D0000000000000000000000000000000001000000010000000180F07F0000020000002E0000000000000000000000000000000001000000010000000180E8880000020000003700000000000000000000000000000000010000000100000001803B010000020001002F0000000000000000000000000000000001000000010000000180BB8A00000200000030000000000000000000000000000000000100000001000000FFFF01001500434D4643546F6F6C4261724D656E75427574746F6E0E01000002000100310000000D57617463682057696E646F7773000000000000000000000000010000000100000000000000000000000100000003001380D88B00000000000031000000085761746368202631000000000000000000000000010000000100000000000000000000000100000000001380D98B00000000000031000000085761746368202632000000000000000000000000010000000100000000000000000000000100000000001380CE01000000000000FFFFFFFF0C576174636820416E63686F720100000000000000010000000000000001000000000000000000000001000000000013800F0100000200000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000004001380D28B00000000000032000000094D656D6F7279202631000000000000000000000000010000000100000000000000000000000100000000001380D38B00000000000032000000094D656D6F7279202632000000000000000000000000010000000100000000000000000000000100000000001380D48B00000000000032000000094D656D6F7279202633000000000000000000000000010000000100000000000000000000000100000000001380D58B00000000000032000000094D656D6F72792026340000000000000000000000000100000001000000000000000000000001000000000013801001000002000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000040013809307000000000000330000000855415254202326310000000000000000000000000100000001000000000000000000000001000000000013809407000000000000330000000855415254202326320000000000000000000000000100000001000000000000000000000001000000000013809507000000000000330000000855415254202326330000000000000000000000000100000001000000000000000000000001000000000013809607000000000000330000001626446562756720287072696E746629205669657765720000000000000000000000000100000001000000000000000000000001000000000013803C010000020000003400000010416E616C797369732057696E646F7773000000000000000000000000010000000100000000000000000000000100000004001380658A000000000000340000000F264C6F67696320416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380DC7F0000000000003E0000001526506572666F726D616E636520416E616C797A6572000000000000000000000000010000000100000000000000000000000100000000001380E788000000000000380000000E26436F646520436F766572616765000000000000000000000000010000000100000000000000000000000100000000001380CD01000000000000FFFFFFFF0F416E616C7973697320416E63686F7201000000000000000100000000000000010000000000000000000000010000000000138053010000000000003F0000000D54726163652057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013805401000000000000FFFFFFFF115472616365204D656E7520416E63686F720100000000000000010000000000000001000000000000000000000001000000000013802901000000000000350000001553797374656D205669657765722057696E646F77730000000000000000000000000100000001000000000000000000000001000000010013804B01000000000000FFFFFFFF1453797374656D2056696577657220416E63686F720100000000000000010000000000000001000000000000000000000001000000000001800000000001000000FFFFFFFF00000000000000000000000000010000000100000013800189000002000000360000000F26546F6F6C626F782057696E646F7700000000000000000000000001000000010000000000000000000000010000000300138044C5000000000000FFFFFFFF0E5570646174652057696E646F77730100000000000000010000000000000001000000000000000000000001000000000013800000000000000400FFFFFFFF000000000000000000010000000000000001000000000000000000000001000000000013805B01000000000000FFFFFFFF12546F6F6C626F78204D656E75416E63686F72010000000000000001000000000000000100000000000000000000000100000000000000000005446562756772020000 898 @@ -3599,32 +3599,50 @@ 0 100 - 0 + 1 + + ..\user\main.c + 0 + 4 + 9 + 1 + + 0 + ..\user\show\esp8266_work.c - 0 - 141 - 217 + 2 + 250 + 287 + 1 + 33,39,354 + 0 + + + ..\user\data\basic_data.h + 32 + 31 + 17 + 1 + + 0 + + + ..\user\drive\bsp_uart2.c + 20 + 67 + 81 1 0 ..\user\show\esp8266_uart2.c - 56 - 1 - 113 - 1 - 116 - 0 - - - ..\user\show\dev_work.c 0 - 49 - 1 + 14 + 32 1 - + 48,68 0 diff --git a/firmware/stm32-esp/project/pro.uvopt b/firmware/stm32-esp/project/pro.uvopt index 84a1e5d5..9b069a9d 100644 --- a/firmware/stm32-esp/project/pro.uvopt +++ b/firmware/stm32-esp/project/pro.uvopt @@ -180,8 +180,88 @@ 0 1 + UART2ReadBuf + + + 1 + 1 DevParam,0x0A + + 2 + 1 + PublishData + + + 3 + 1 + StringData + + + 4 + 1 + NetWorkFlow,0x0A + + + 5 + 1 + cmd + + + 6 + 1 + UART2ReadBuf + + + 7 + 1 + ret + + + 8 + 1 + haystack + + + 9 + 1 + needle + + + 10 + 1 + i,0x0A + + + 11 + 1 + j,0x0A + + + 12 + 1 + StringData + + + 13 + 1 + NewSite,0x0A + + + 14 + 1 + byte2,0x10 + + + 15 + 1 + wait,0x10 + + + 16 + 1 + byte1 + 0 @@ -230,7 +310,7 @@ startup - 0 + 1 0 0 0 @@ -610,7 +690,7 @@ user/drive - 0 + 1 0 0 0 @@ -714,7 +794,7 @@ user/com - 0 + 1 0 0 0 @@ -901,116 +981,8 @@ 0 0 0 - ..\user\mqtt\MQTTConnectClient.c - MQTTConnectClient.c - 0 - 0 - - - 10 - 51 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTConnectServer.c - MQTTConnectServer.c - 0 - 0 - - - 10 - 52 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTDeserializePublish.c - MQTTDeserializePublish.c - 0 - 0 - - - 10 - 53 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTFormat.c - MQTTFormat.c - 0 - 0 - - - 10 - 54 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTPacket.c - MQTTPacket.c - 0 - 0 - - - 10 - 55 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTSerializePublish.c - MQTTSerializePublish.c - 0 - 0 - - - 10 - 56 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTSubscribeClient.c - MQTTSubscribeClient.c - 0 - 0 - - - 10 - 57 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTSubscribeServer.c - MQTTSubscribeServer.c - 0 - 0 - - - 10 - 58 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTUnsubscribeClient.c - MQTTUnsubscribeClient.c - 0 - 0 - - - 10 - 59 - 1 - 0 - 0 - 0 - ..\user\mqtt\MQTTUnsubscribeServer.c - MQTTUnsubscribeServer.c + ..\user\mqtt\mqtt.c + mqtt.c 0 0 diff --git a/firmware/stm32-esp/project/pro.uvproj b/firmware/stm32-esp/project/pro.uvproj index c5b6d0ce..d9b853a1 100644 --- a/firmware/stm32-esp/project/pro.uvproj +++ b/firmware/stm32-esp/project/pro.uvproj @@ -712,54 +712,9 @@ user/mqtt - MQTTConnectClient.c + mqtt.c 1 - ..\user\mqtt\MQTTConnectClient.c - - - MQTTConnectServer.c - 1 - ..\user\mqtt\MQTTConnectServer.c - - - MQTTDeserializePublish.c - 1 - ..\user\mqtt\MQTTDeserializePublish.c - - - MQTTFormat.c - 1 - ..\user\mqtt\MQTTFormat.c - - - MQTTPacket.c - 1 - ..\user\mqtt\MQTTPacket.c - - - MQTTSerializePublish.c - 1 - ..\user\mqtt\MQTTSerializePublish.c - - - MQTTSubscribeClient.c - 1 - ..\user\mqtt\MQTTSubscribeClient.c - - - MQTTSubscribeServer.c - 1 - ..\user\mqtt\MQTTSubscribeServer.c - - - MQTTUnsubscribeClient.c - 1 - ..\user\mqtt\MQTTUnsubscribeClient.c - - - MQTTUnsubscribeServer.c - 1 - ..\user\mqtt\MQTTUnsubscribeServer.c + ..\user\mqtt\mqtt.c diff --git a/firmware/stm32-esp/user/data/basic_data.c b/firmware/stm32-esp/user/data/basic_data.c index 8ad6ef62..6334027e 100644 --- a/firmware/stm32-esp/user/data/basic_data.c +++ b/firmware/stm32-esp/user/data/basic_data.c @@ -1,12 +1,12 @@ #include "basic_data.h" -uint8_t UART1ReadBuf[100] = {0}; +uint8_t UART1ReadBuf[500] = {0}; uint16_t UART1ReadFlag = 0; -uint8_t UART2ReadBuf[100] = {0}; +uint8_t UART2ReadBuf[500] = {0}; uint16_t UART2ReadFlag = 0; -uint8_t UART3ReadBuf[100] = {0}; +uint8_t UART3ReadBuf[500] = {0}; uint16_t UART3ReadFlag = 0; DevParam_t DevParam = {0}; diff --git a/firmware/stm32-esp/user/data/basic_data.h b/firmware/stm32-esp/user/data/basic_data.h index ff43fad8..a2ec2bf0 100644 --- a/firmware/stm32-esp/user/data/basic_data.h +++ b/firmware/stm32-esp/user/data/basic_data.h @@ -6,15 +6,15 @@ #define Device_LCD 1 #define MQTT_SCode 1 -#define MQTT_AT 1 +//#define MQTT_AT 1 -extern uint8_t UART1ReadBuf[100]; +extern uint8_t UART1ReadBuf[500]; extern uint16_t UART1ReadFlag; -extern uint8_t UART2ReadBuf[100]; +extern uint8_t UART2ReadBuf[500]; extern uint16_t UART2ReadFlag; -extern uint8_t UART3ReadBuf[100]; +extern uint8_t UART3ReadBuf[500]; extern uint16_t UART3ReadFlag; typedef enum @@ -39,7 +39,11 @@ typedef struct uint16_t AirInforGetTime; // 空气信息获取时间 + uint8_t ServerRelay; // 服务器继电器 + uint8_t ServerRed; + uint16_t ESP8266SendTime; + uint16_t MQTTSendTime; // 运行阶段 RunPhase_E RunPhase; @@ -58,6 +62,8 @@ typedef struct uint16_t PM1_0; uint16_t PM2_5; uint16_t PM10; + + uint16_t tes; }DevParam_t; extern DevParam_t DevParam; diff --git a/firmware/stm32-esp/user/drive/bsp_timer3.c b/firmware/stm32-esp/user/drive/bsp_timer3.c index d3da7aad..7c432857 100644 --- a/firmware/stm32-esp/user/drive/bsp_timer3.c +++ b/firmware/stm32-esp/user/drive/bsp_timer3.c @@ -72,8 +72,8 @@ void TIM3_IRQHandler(void) //TIM3中断服务程序 if(UART3Count == UART3ReadFlag) { UART3ReadFlag |= (1 << 15); - UART3Count = 0; - UART3RecTime = 0; + UART3Count = 0; + UART3RecTime = 0; } else { @@ -101,7 +101,10 @@ void TIM3_IRQHandler(void) //TIM3中断服务程序 DevParam.ServerUpdateTime++; // 发送时间 if(DevParam.ESP8266SendTime<65000) - DevParam.ESP8266SendTime++; + DevParam.ESP8266SendTime++; + // 发送时间 + if(DevParam.MQTTSendTime<65000) + DevParam.MQTTSendTime++; } } diff --git a/firmware/stm32-esp/user/drive/bsp_uart2.c b/firmware/stm32-esp/user/drive/bsp_uart2.c index fb5f9208..012d5925 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart2.c +++ b/firmware/stm32-esp/user/drive/bsp_uart2.c @@ -1,24 +1,27 @@ #include "bsp_uart2.h" // 串口2 PA2 TX PA3 RX -void Dev_UART2SendStr(char* fmt,...){ - uint8_t tbuf[200] = {0}; +void Dev_UART2SendStr(uint8_t* tbuf, uint16_t tlen, uint8_t tByte){ uint16_t i = 0,j = 0; - - va_list ap; - va_start(ap,fmt); - vsprintf((char*)tbuf, fmt, ap); - va_end(ap); - - j = strlen((const char*)tbuf); + + if(tlen > 0) + j = tlen; + else + j = strlen((const char*)tbuf); for( i = 0; i < j; i++) { + if((tByte>0)&&(i==2)) + { + while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){}; + USART_SendData(USART2, tByte); + } while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET){}; USART_SendData(USART2, tbuf[i]); } while(USART_GetFlagStatus(USART2, USART_FLAG_TC)==RESET); } + // 发送数据 void Dev_UART2SendData(uint8_t *ch,uint16_t len){ uint16_t i = 0; @@ -80,10 +83,10 @@ void USART2_IRQHandler(void) res = USART_ReceiveData(USART2); // 是否存在数据没有处理 - if( (UART2ReadFlag&0x8000)==0 ) + if((UART2ReadFlag&0x8000)==0) { UART2ReadBuf[UART2ReadFlag++] = res; - if(UART2ReadFlag>=90) + if(UART2ReadFlag>=480) { UART2ReadFlag |= (1 << 15); } diff --git a/firmware/stm32-esp/user/drive/bsp_uart2.h b/firmware/stm32-esp/user/drive/bsp_uart2.h index a61b414f..331e53e3 100644 --- a/firmware/stm32-esp/user/drive/bsp_uart2.h +++ b/firmware/stm32-esp/user/drive/bsp_uart2.h @@ -12,7 +12,7 @@ #include "basic_data.h" -void Dev_UART2SendStr(char* fmt,...); +void Dev_UART2SendStr(uint8_t* tbuf, uint16_t tlen, uint8_t tByte); void Dev_UART2SendData(uint8_t *ch, uint16_t len); void BSP_UART2Init(uint32_t bound); diff --git a/firmware/stm32-esp/user/main.c b/firmware/stm32-esp/user/main.c index dcddda92..e02c2386 100644 --- a/firmware/stm32-esp/user/main.c +++ b/firmware/stm32-esp/user/main.c @@ -53,7 +53,7 @@ int main() { // 显示部分，侧边跳动 Show_BroadSideBeat(); -// + // PMD4，获取空气信息 PMD4_GetAirInfor(); } diff --git a/firmware/stm32-esp/user/mqtt/MQTTConnect.h b/firmware/stm32-esp/user/mqtt/MQTTConnect.h deleted file mode 100644 index e928c7d0..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTConnect.h +++ /dev/null @@ -1,126 +0,0 @@ -#ifndef _MQTTCONNECT_H_ -#define _MQTTCONNECT_H_ - -#include "MQTTPacket.h" - -enum connack_return_codes -{ - MQTT_CONNECTION_ACCEPTED = 0, - MQTT_UNNACCEPTABLE_PROTOCOL = 1, - MQTT_CLIENTID_REJECTED = 2, - MQTT_SERVER_UNAVAILABLE = 3, - MQTT_BAD_USERNAME_OR_PASSWORD = 4, - MQTT_NOT_AUTHORIZED = 5, -}; - -#if !defined(DLLImport) - #define DLLImport -#endif -#if !defined(DLLExport) - #define DLLExport -#endif - -typedef union -{ - unsigned char all; /**< all connect flags */ -#if defined(REVERSED) - struct - { - unsigned int username : 1; /**< 3.1 user name */ - unsigned int password : 1; /**< 3.1 password */ - unsigned int willRetain : 1; /**< will retain setting */ - unsigned int willQoS : 2; /**< will QoS value */ - unsigned int will : 1; /**< will flag */ - unsigned int cleansession : 1; /**< clean session flag */ - unsigned int : 1; /**< unused */ - } bits; -#else - struct - { - unsigned int : 1; /**< unused */ - unsigned int cleansession : 1; /**< cleansession flag */ - unsigned int will : 1; /**< will flag */ - unsigned int willQoS : 2; /**< will QoS value */ - unsigned int willRetain : 1; /**< will retain setting */ - unsigned int password : 1; /**< 3.1 password */ - unsigned int username : 1; /**< 3.1 user name */ - } bits; -#endif -} MQTTConnectFlags; /**< connect flags byte */ - -/** - * Defines the MQTT "Last Will and Testament" (LWT) settings for - * the connect packet. - */ -typedef struct -{ - /** The eyecatcher for this structure. must be MQTW. */ - char struct_id[4]; - /** The version number of this structure. Must be 0 */ - int struct_version; - /** The LWT topic to which the LWT message will be published. */ - MQTTString topicName; - /** The LWT payload. */ - MQTTString message; - /** - * The retained flag for the LWT message (see MQTTAsync_message.retained). - */ - unsigned char retained; - /** - * The quality of service setting for the LWT message (see - * MQTTAsync_message.qos and @ref qos). - */ - char qos; -} MQTTPacket_willOptions; - -#define MQTTPacket_willOptions_initializer { {'M', 'Q', 'T', 'W'}, 0, {NULL, {0, NULL}}, {NULL, {0, NULL}}, 0, 0 } - -typedef struct -{ - /** The eyecatcher for this structure. must be MQTC. */ - char struct_id[4]; - /** The version number of this structure. Must be 0 */ - int struct_version; - /** Version of MQTT to be used. 3 = 3.1 4 = 3.1.1 - */ - unsigned char MQTTVersion; - MQTTString clientID; - unsigned short keepAliveInterval; - unsigned char cleansession; - unsigned char willFlag; - MQTTPacket_willOptions will; - MQTTString username; - MQTTString password; -} MQTTPacket_connectData; - -typedef union -{ - unsigned char all; /**< all connack flags */ -#if defined(REVERSED) - struct - { - unsigned int reserved : 7; /**< unused */ - unsigned int sessionpresent : 1; /**< session present flag */ - } bits; -#else - struct - { - unsigned int sessionpresent : 1; /**< session present flag */ - unsigned int reserved: 7; /**< unused */ - } bits; -#endif -} MQTTConnackFlags; /**< connack flags byte */ - -#define MQTTPacket_connectData_initializer { {'M', 'Q', 'T', 'C'}, 0, 4, {NULL, {0, NULL}}, 60, 1, 0, \ - MQTTPacket_willOptions_initializer, {NULL, {0, NULL}}, {NULL, {0, NULL}} } - -DLLExport int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options); -DLLExport int MQTTDeserialize_connect(MQTTPacket_connectData* data, unsigned char* buf, int len); - -DLLExport int MQTTSerialize_connack(unsigned char* buf, int buflen, unsigned char connack_rc, unsigned char sessionPresent); -DLLExport int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen); - -DLLExport int MQTTSerialize_disconnect(unsigned char* buf, int buflen); -DLLExport int MQTTSerialize_pingreq(unsigned char* buf, int buflen); - -#endif /* MQTTCONNECT_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTConnectClient.c b/firmware/stm32-esp/user/mqtt/MQTTConnectClient.c deleted file mode 100644 index 2c6c223e..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTConnectClient.c +++ /dev/null @@ -1,181 +0,0 @@ -#include "MQTTPacket.h" -#include "StackTrace.h" - -#include -/** - * Determines the length of the MQTT connect packet that would be produced using the supplied connect options. - * @param options the options to be used to build the connect packet - * @return the length of buffer needed to contain the serialized version of the packet - */ -int MQTTSerialize_connectLength(MQTTPacket_connectData* options){ - int len = 0; - - FUNC_ENTRY; - - if (options->MQTTVersion == 3) - len = 12; /* variable depending on MQTT or MQIsdp */ - else if (options->MQTTVersion == 4) - len = 10; - - len += MQTTstrlen(options->clientID)+2; - if (options->willFlag) - len += MQTTstrlen(options->will.topicName)+2 + MQTTstrlen(options->will.message)+2; - if (options->username.cstring || options->username.lenstring.data) - len += MQTTstrlen(options->username)+2; - if (options->password.cstring || options->password.lenstring.data) - len += MQTTstrlen(options->password)+2; - - FUNC_EXIT_RC(len); - return len; -} -/** - * Serializes the connect options into the buffer. - * @param buf the buffer into which the packet will be serialized - * @param len the length in bytes of the supplied buffer - * @param options the options to be used to build the connect packet - * @return serialized length, or error if 0 - */ -int MQTTSerialize_connect(unsigned char* buf, int buflen, MQTTPacket_connectData* options){ - unsigned char *ptr = buf; - MQTTHeader header = {0}; - MQTTConnectFlags flags = {0}; - int len = 0; - int rc = -1; - - FUNC_ENTRY; - if (MQTTPacket_len(len = MQTTSerialize_connectLength(options)) > buflen) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - - header.byte = 0; - header.bits.type = CONNECT; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, len); /* write remaining length */ - - if (options->MQTTVersion == 4) - { - writeCString(&ptr, "MQTT"); - writeChar(&ptr, (char) 4); - } - else - { - writeCString(&ptr, "MQIsdp"); - writeChar(&ptr, (char) 3); - } - - flags.all = 0; - flags.bits.cleansession = options->cleansession; - flags.bits.will = (options->willFlag) ? 1 : 0; - if (flags.bits.will) - { - flags.bits.willQoS = options->will.qos; - flags.bits.willRetain = options->will.retained; - } - - if (options->username.cstring || options->username.lenstring.data) - flags.bits.username = 1; - if (options->password.cstring || options->password.lenstring.data) - flags.bits.password = 1; - - writeChar(&ptr, flags.all); - writeInt(&ptr, options->keepAliveInterval); - writeMQTTString(&ptr, options->clientID); - if (options->willFlag) - { - writeMQTTString(&ptr, options->will.topicName); - writeMQTTString(&ptr, options->will.message); - } - if (flags.bits.username) - writeMQTTString(&ptr, options->username); - if (flags.bits.password) - writeMQTTString(&ptr, options->password); - - rc = ptr - buf; - - exit: FUNC_EXIT_RC(rc); - return rc; -} -/** - * Deserializes the supplied (wire) buffer into connack data - return code - * @param sessionPresent the session present flag returned (only for MQTT 3.1.1) - * @param connack_rc returned integer value of the connack return code - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param len the length in bytes of the data in the supplied buffer - * @return error code. 1 is success, 0 is failure - */ -int MQTTDeserialize_connack(unsigned char* sessionPresent, unsigned char* connack_rc, unsigned char* buf, int buflen){ - MQTTHeader header = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = NULL; - int rc = 0; - int mylen; - MQTTConnackFlags flags = {0}; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - if (header.bits.type != CONNACK) - goto exit; - - curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ - enddata = curdata + mylen; - if (enddata - curdata < 2) - goto exit; - - flags.all = readChar(&curdata); - *sessionPresent = flags.bits.sessionpresent; - *connack_rc = readChar(&curdata); - - rc = 1; -exit: - FUNC_EXIT_RC(rc); - return rc; -} -/** - * Serializes a 0-length packet into the supplied buffer, ready for writing to a socket - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer, to avoid overruns - * @param packettype the message type - * @return serialized length, or error if 0 - */ -int MQTTSerialize_zero(unsigned char* buf, int buflen, unsigned char packettype){ - MQTTHeader header = {0}; - int rc = -1; - unsigned char *ptr = buf; - - FUNC_ENTRY; - if (buflen < 2) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - header.byte = 0; - header.bits.type = packettype; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, 0); /* write remaining length */ - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} -/** - * Serializes a disconnect packet into the supplied buffer, ready for writing to a socket - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer, to avoid overruns - * @return serialized length, or error if 0 - */ -int MQTTSerialize_disconnect(unsigned char* buf, int buflen){ - return MQTTSerialize_zero(buf, buflen, DISCONNECT); -} -/** - * Serializes a disconnect packet into the supplied buffer, ready for writing to a socket - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer, to avoid overruns - * @return serialized length, or error if 0 - */ -int MQTTSerialize_pingreq(unsigned char* buf, int buflen){ - return MQTTSerialize_zero(buf, buflen, PINGREQ); -} diff --git a/firmware/stm32-esp/user/mqtt/MQTTConnectServer.c b/firmware/stm32-esp/user/mqtt/MQTTConnectServer.c deleted file mode 100644 index 439dfe7b..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTConnectServer.c +++ /dev/null @@ -1,125 +0,0 @@ -#include "StackTrace.h" -#include "MQTTPacket.h" -#include - -#define min(a, b) ((a < b) ? a : b) - -/** - * Validates MQTT protocol name and version combinations - * @param protocol the MQTT protocol name as an MQTTString - * @param version the MQTT protocol version number, as in the connect packet - * @return correct MQTT combination? 1 is true, 0 is false - */ -int MQTTPacket_checkVersion(MQTTString* protocol, int version){ - int rc = 0; - if (version == 3 && memcmp(protocol->lenstring.data, "MQIsdp", - min(6, protocol->lenstring.len)) == 0) - rc = 1; - else if (version == 4 && memcmp(protocol->lenstring.data, "MQTT", - min(4, protocol->lenstring.len)) == 0) - rc = 1; - return rc; -} -/** - * Deserializes the supplied (wire) buffer into connect data structure - * @param data the connect data structure to be filled out - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param len the length in bytes of the data in the supplied buffer - * @return error code. 1 is success, 0 is failure - */ -int MQTTDeserialize_connect(MQTTPacket_connectData* data, unsigned char* buf, int len){ - MQTTHeader header = {0}; - MQTTConnectFlags flags = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = &buf[len]; - int rc = 0; - MQTTString Protocol; - int version; - int mylen = 0; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - if (header.bits.type != CONNECT) - goto exit; - - curdata += MQTTPacket_decodeBuf(curdata, &mylen); /* read remaining length */ - - if (!readMQTTLenString(&Protocol, &curdata, enddata) || - enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */ - goto exit; - - version = (int)readChar(&curdata); /* Protocol version */ - /* If we don't recognize the protocol version, we don't parse the connect packet on the - * basis that we don't know what the format will be. - */ - if (MQTTPacket_checkVersion(&Protocol, version)) - { - flags.all = readChar(&curdata); - data->cleansession = flags.bits.cleansession; - data->keepAliveInterval = readInt(&curdata); - if (!readMQTTLenString(&data->clientID, &curdata, enddata)) - goto exit; - data->willFlag = flags.bits.will; - if (flags.bits.will) - { - data->will.qos = flags.bits.willQoS; - data->will.retained = flags.bits.willRetain; - if (!readMQTTLenString(&data->will.topicName, &curdata, enddata) || - !readMQTTLenString(&data->will.message, &curdata, enddata)) - goto exit; - } - if (flags.bits.username) - { - if (enddata - curdata < 3 || !readMQTTLenString(&data->username, &curdata, enddata)) - goto exit; /* username flag set, but no username supplied - invalid */ - if (flags.bits.password && - (enddata - curdata < 3 || !readMQTTLenString(&data->password, &curdata, enddata))) - goto exit; /* password flag set, but no password supplied - invalid */ - } - else if (flags.bits.password) - goto exit; /* password flag set without username - invalid */ - rc = 1; - } -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - -/** - * Serializes the connack packet into the supplied buffer. - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param connack_rc the integer connack return code to be used - * @param sessionPresent the MQTT 3.1.1 sessionPresent flag - * @return serialized length, or error if 0 - */ -int MQTTSerialize_connack(unsigned char* buf, int buflen, unsigned char connack_rc, unsigned char sessionPresent){ - MQTTHeader header = {0}; - int rc = 0; - unsigned char *ptr = buf; - MQTTConnackFlags flags = {0}; - - FUNC_ENTRY; - if (buflen < 2) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - header.byte = 0; - header.bits.type = CONNACK; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */ - - flags.all = 0; - flags.bits.sessionpresent = sessionPresent; - writeChar(&ptr, flags.all); - writeChar(&ptr, connack_rc); - - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - diff --git a/firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c b/firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c deleted file mode 100644 index 610d8f1c..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTDeserializePublish.c +++ /dev/null @@ -1,105 +0,0 @@ -/******************************************************************************* - * Copyright (c) 2014 IBM Corp. - * - * All rights reserved. This program and the accompanying materials - * are made available under the terms of the Eclipse Public License v1.0 - * and Eclipse Distribution License v1.0 which accompany this distribution. - * - * The Eclipse Public License is available at - * http://www.eclipse.org/legal/epl-v10.html - * and the Eclipse Distribution License is available at - * http://www.eclipse.org/org/documents/edl-v10.php. - * - * Contributors: - * Ian Craggs - initial API and implementation and/or initial documentation - *******************************************************************************/ - -#include "StackTrace.h" -#include "MQTTPacket.h" -#include - -#define min(a, b) ((a < b) ? 1 : 0) - -/** - * Deserializes the supplied (wire) buffer into publish data - * @param dup returned integer - the MQTT dup flag - * @param qos returned integer - the MQTT QoS value - * @param retained returned integer - the MQTT retained flag - * @param packetid returned integer - the MQTT packet identifier - * @param topicName returned MQTTString - the MQTT topic in the publish - * @param payload returned byte buffer - the MQTT publish payload - * @param payloadlen returned integer - the length of the MQTT payload - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @return error code. 1 is success - */ -int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName, - unsigned char** payload, int* payloadlen, unsigned char* buf, int buflen){ - MQTTHeader header = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = NULL; - int rc = 0; - int mylen = 0; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - if (header.bits.type != PUBLISH) - goto exit; - *dup = header.bits.dup; - *qos = header.bits.qos; - *retained = header.bits.retain; - - curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ - enddata = curdata + mylen; - - if (!readMQTTLenString(topicName, &curdata, enddata) || - enddata - curdata < 0) /* do we have enough data to read the protocol version byte? */ - goto exit; - - if (*qos > 0) - *packetid = readInt(&curdata); - - *payloadlen = enddata - curdata; - *payload = curdata; - rc = 1; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - - -/** - * Deserializes the supplied (wire) buffer into an ack - * @param packettype returned integer - the MQTT packet type - * @param dup returned integer - the MQTT dup flag - * @param packetid returned integer - the MQTT packet identifier - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @return error code. 1 is success, 0 is failure - */ -int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen){ - MQTTHeader header = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = NULL; - int rc = 0; - int mylen; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - *dup = header.bits.dup; - *packettype = header.bits.type; - - curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ - enddata = curdata + mylen; - - if (enddata - curdata < 2) - goto exit; - *packetid = readInt(&curdata); - - rc = 1; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - diff --git a/firmware/stm32-esp/user/mqtt/MQTTFormat.c b/firmware/stm32-esp/user/mqtt/MQTTFormat.c deleted file mode 100644 index e8484d1e..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTFormat.c +++ /dev/null @@ -1,233 +0,0 @@ -#include "StackTrace.h" -#include "MQTTPacket.h" - -#include "string.h" - -const char* MQTTPacket_names[] = -{ - "RESERVED", "CONNECT", "CONNACK", "PUBLISH", "PUBACK", "PUBREC", "PUBREL", - "PUBCOMP", "SUBSCRIBE", "SUBACK", "UNSUBSCRIBE", "UNSUBACK", - "PINGREQ", "PINGRESP", "DISCONNECT" -}; - -const char* MQTTPacket_getName(unsigned short packetid) { - return MQTTPacket_names[packetid]; -} - -int MQTTStringFormat_connect(char* strbuf, int strbuflen, MQTTPacket_connectData* data){ - int strindex = 0; - - strindex = snprintf(strbuf, strbuflen, - "CONNECT MQTT version %d, client id %.*s, clean session %d, keep alive %d", - (int)data->MQTTVersion, data->clientID.lenstring.len, data->clientID.lenstring.data, - (int)data->cleansession, data->keepAliveInterval); - if (data->willFlag) - strindex += snprintf(&strbuf[strindex], strbuflen - strindex, - ", will QoS %d, will retain %d, will topic %.*s, will message %.*s", - data->will.qos, data->will.retained, - data->will.topicName.lenstring.len, data->will.topicName.lenstring.data, - data->will.message.lenstring.len, data->will.message.lenstring.data); - if (data->username.lenstring.data && data->username.lenstring.len > 0) - strindex += snprintf(&strbuf[strindex], strbuflen - strindex, - ", user name %.*s", data->username.lenstring.len, data->username.lenstring.data); - if (data->password.lenstring.data && data->password.lenstring.len > 0) - strindex += snprintf(&strbuf[strindex], strbuflen - strindex, - ", password %.*s", data->password.lenstring.len, data->password.lenstring.data); - return strindex; -} - - -int MQTTStringFormat_connack(char* strbuf, int strbuflen, unsigned char connack_rc, unsigned char sessionPresent){ - int strindex = snprintf(strbuf, strbuflen, "CONNACK session present %d, rc %d", sessionPresent, connack_rc); - return strindex; -} - - -int MQTTStringFormat_publish(char* strbuf, int strbuflen, unsigned char dup, int qos, unsigned char retained, - unsigned short packetid, MQTTString topicName, unsigned char* payload, int payloadlen){ - int strindex = snprintf(strbuf, strbuflen, - "PUBLISH dup %d, QoS %d, retained %d, packet id %d, topic %.*s, payload length %d, payload %.*s", - dup, qos, retained, packetid, - (topicName.lenstring.len < 20) ? topicName.lenstring.len : 20, topicName.lenstring.data, - payloadlen, (payloadlen < 20) ? payloadlen : 20, payload); - return strindex; -} - - -int MQTTStringFormat_ack(char* strbuf, int strbuflen, unsigned char packettype, unsigned char dup, unsigned short packetid){ - int strindex = snprintf(strbuf, strbuflen, "%s, packet id %d", MQTTPacket_names[packettype], packetid); - if (dup) - strindex += snprintf(strbuf + strindex, strbuflen - strindex, ", dup %d", dup); - return strindex; -} - - -int MQTTStringFormat_subscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, int count, - MQTTString topicFilters[], int requestedQoSs[]){ - return snprintf(strbuf, strbuflen, - "SUBSCRIBE dup %d, packet id %d count %d topic %.*s qos %d", - dup, packetid, count, - topicFilters[0].lenstring.len, topicFilters[0].lenstring.data, - requestedQoSs[0]); -} - - -int MQTTStringFormat_suback(char* strbuf, int strbuflen, unsigned short packetid, int count, int* grantedQoSs){ - return snprintf(strbuf, strbuflen, - "SUBACK packet id %d count %d granted qos %d", packetid, count, grantedQoSs[0]); -} - - -int MQTTStringFormat_unsubscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, - int count, MQTTString topicFilters[]){ - return snprintf(strbuf, strbuflen, - "UNSUBSCRIBE dup %d, packet id %d count %d topic %.*s", - dup, packetid, count, - topicFilters[0].lenstring.len, topicFilters[0].lenstring.data); -} - - -#if defined(MQTT_CLIENT) -char* MQTTFormat_toClientString(char* strbuf, int strbuflen, unsigned char* buf, int buflen){ - int index = 0; - int rem_length = 0; - MQTTHeader header = {0}; - int strindex = 0; - - header.byte = buf[index++]; - index += MQTTPacket_decodeBuf(&buf[index], &rem_length); - - switch (header.bits.type) - { - - case CONNACK: - { - unsigned char sessionPresent, connack_rc; - if (MQTTDeserialize_connack(&sessionPresent, &connack_rc, buf, buflen) == 1) - strindex = MQTTStringFormat_connack(strbuf, strbuflen, connack_rc, sessionPresent); - } - break; - case PUBLISH: - { - unsigned char dup, retained, *payload; - unsigned short packetid; - int qos, payloadlen; - MQTTString topicName = MQTTString_initializer; - if (MQTTDeserialize_publish(&dup, &qos, &retained, &packetid, &topicName, - &payload, &payloadlen, buf, buflen) == 1) - strindex = MQTTStringFormat_publish(strbuf, strbuflen, dup, qos, retained, packetid, - topicName, payload, payloadlen); - } - break; - case PUBACK: - case PUBREC: - case PUBREL: - case PUBCOMP: - { - unsigned char packettype, dup; - unsigned short packetid; - if (MQTTDeserialize_ack(&packettype, &dup, &packetid, buf, buflen) == 1) - strindex = MQTTStringFormat_ack(strbuf, strbuflen, packettype, dup, packetid); - } - break; - case SUBACK: - { - unsigned short packetid; - int maxcount = 1, count = 0; - int grantedQoSs[1]; - if (MQTTDeserialize_suback(&packetid, maxcount, &count, grantedQoSs, buf, buflen) == 1) - strindex = MQTTStringFormat_suback(strbuf, strbuflen, packetid, count, grantedQoSs); - } - break; - case UNSUBACK: - { - unsigned short packetid; - if (MQTTDeserialize_unsuback(&packetid, buf, buflen) == 1) - strindex = MQTTStringFormat_ack(strbuf, strbuflen, UNSUBACK, 0, packetid); - } - break; - case PINGREQ: - case PINGRESP: - case DISCONNECT: - strindex = snprintf(strbuf, strbuflen, "%s", MQTTPacket_names[header.bits.type]); - break; - } - return strbuf; -} -#endif - -#if defined(MQTT_SERVER) -char* MQTTFormat_toServerString(char* strbuf, int strbuflen, unsigned char* buf, int buflen){ - int index = 0; - int rem_length = 0; - MQTTHeader header = {0}; - int strindex = 0; - - header.byte = buf[index++]; - index += MQTTPacket_decodeBuf(&buf[index], &rem_length); - - switch (header.bits.type) - { - case CONNECT: - { - MQTTPacket_connectData data; - int rc; - if ((rc = MQTTDeserialize_connect(&data, buf, buflen)) == 1) - strindex = MQTTStringFormat_connect(strbuf, strbuflen, &data); - } - break; - case PUBLISH: - { - unsigned char dup, retained, *payload; - unsigned short packetid; - int qos, payloadlen; - MQTTString topicName = MQTTString_initializer; - if (MQTTDeserialize_publish(&dup, &qos, &retained, &packetid, &topicName, - &payload, &payloadlen, buf, buflen) == 1) - strindex = MQTTStringFormat_publish(strbuf, strbuflen, dup, qos, retained, packetid, - topicName, payload, payloadlen); - } - break; - case PUBACK: - case PUBREC: - case PUBREL: - case PUBCOMP: - { - unsigned char packettype, dup; - unsigned short packetid; - if (MQTTDeserialize_ack(&packettype, &dup, &packetid, buf, buflen) == 1) - strindex = MQTTStringFormat_ack(strbuf, strbuflen, packettype, dup, packetid); - } - break; - case SUBSCRIBE: - { - unsigned char dup; - unsigned short packetid; - int maxcount = 1, count = 0; - MQTTString topicFilters[1]; - int requestedQoSs[1]; - if (MQTTDeserialize_subscribe(&dup, &packetid, maxcount, &count, - topicFilters, requestedQoSs, buf, buflen) == 1) - strindex = MQTTStringFormat_subscribe(strbuf, strbuflen, dup, packetid, count, topicFilters, requestedQoSs);; - } - break; - case UNSUBSCRIBE: - { - unsigned char dup; - unsigned short packetid; - int maxcount = 1, count = 0; - MQTTString topicFilters[1]; - if (MQTTDeserialize_unsubscribe(&dup, &packetid, maxcount, &count, topicFilters, buf, buflen) == 1) - strindex = MQTTStringFormat_unsubscribe(strbuf, strbuflen, dup, packetid, count, topicFilters); - } - break; - case PINGREQ: - case PINGRESP: - case DISCONNECT: - strindex = snprintf(strbuf, strbuflen, "%s", MQTTPacket_names[header.bits.type]); - break; - } - strbuf[strbuflen] = '\0'; - return strbuf; -} -#endif diff --git a/firmware/stm32-esp/user/mqtt/MQTTFormat.h b/firmware/stm32-esp/user/mqtt/MQTTFormat.h deleted file mode 100644 index ecfefee2..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTFormat.h +++ /dev/null @@ -1,37 +0,0 @@ -/******************************************************************************* - * Copyright (c) 2014 IBM Corp. - * - * All rights reserved. This program and the accompanying materials - * are made available under the terms of the Eclipse Public License v1.0 - * and Eclipse Distribution License v1.0 which accompany this distribution. - * - * The Eclipse Public License is available at - * http://www.eclipse.org/legal/epl-v10.html - * and the Eclipse Distribution License is available at - * http://www.eclipse.org/org/documents/edl-v10.php. - * - * Contributors: - * Ian Craggs - initial API and implementation and/or initial documentation - *******************************************************************************/ - -#if !defined(_MQTTFORMAT_H_) -#define _MQTTFORMAT_H_ - -#include "StackTrace.h" -#include "MQTTPacket.h" - -const char* MQTTPacket_getName(unsigned short packetid); -int MQTTStringFormat_connect(char* strbuf, int strbuflen, MQTTPacket_connectData* data); -int MQTTStringFormat_connack(char* strbuf, int strbuflen, unsigned char connack_rc, unsigned char sessionPresent); -int MQTTStringFormat_publish(char* strbuf, int strbuflen, unsigned char dup, int qos, unsigned char retained, - unsigned short packetid, MQTTString topicName, unsigned char* payload, int payloadlen); -int MQTTStringFormat_ack(char* strbuf, int strbuflen, unsigned char packettype, unsigned char dup, unsigned short packetid); -int MQTTStringFormat_subscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, int count, - MQTTString topicFilters[], int requestedQoSs[]); -int MQTTStringFormat_suback(char* strbuf, int strbuflen, unsigned short packetid, int count, int* grantedQoSs); -int MQTTStringFormat_unsubscribe(char* strbuf, int strbuflen, unsigned char dup, unsigned short packetid, - int count, MQTTString topicFilters[]); -char* MQTTFormat_toClientString(char* strbuf, int strbuflen, unsigned char* buf, int buflen); -char* MQTTFormat_toServerString(char* strbuf, int strbuflen, unsigned char* buf, int buflen); - -#endif diff --git a/firmware/stm32-esp/user/mqtt/MQTTPacket.c b/firmware/stm32-esp/user/mqtt/MQTTPacket.c deleted file mode 100644 index ae3f41a3..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTPacket.c +++ /dev/null @@ -1,365 +0,0 @@ -#include "StackTrace.h" -#include "MQTTPacket.h" - -#include - -/** - * Encodes the message length according to the MQTT algorithm - * @param buf the buffer into which the encoded data is written - * @param length the length to be encoded - * @return the number of bytes written to buffer - */ -int MQTTPacket_encode(unsigned char* buf, int length){ - int rc = 0; - - FUNC_ENTRY; - do - { - char d = length % 128; - length /= 128; - /* if there are more digits to encode, set the top bit of this digit */ - if (length > 0) - d |= 0x80; - buf[rc++] = d; - } while (length > 0); - FUNC_EXIT_RC(rc); - return rc; -} - -/** - * Decodes the message length according to the MQTT algorithm - * @param getcharfn pointer to function to read the next character from the data source - * @param value the decoded length returned - * @return the number of bytes read from the socket - */ -int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value){ - unsigned char c; - int multiplier = 1; - int len = 0; -#define MAX_NO_OF_REMAINING_LENGTH_BYTES 4 - - FUNC_ENTRY; - *value = 0; - do - { - int rc = MQTTPACKET_READ_ERROR; - - if (++len > MAX_NO_OF_REMAINING_LENGTH_BYTES) - { - rc = MQTTPACKET_READ_ERROR; /* bad data */ - goto exit; - } - rc = (*getcharfn)(&c, 1); - if (rc != 1) - goto exit; - *value += (c & 127) * multiplier; - multiplier *= 128; - } while ((c & 128) != 0); -exit: - FUNC_EXIT_RC(len); - return len; -} - -int MQTTPacket_len(int rem_len){ - rem_len += 1; /* header byte */ - - /* now remaining_length field */ - if (rem_len < 128) - rem_len += 1; - else if (rem_len < 16384) - rem_len += 2; - else if (rem_len < 2097151) - rem_len += 3; - else - rem_len += 4; - return rem_len; -} - -static unsigned char* bufptr; -int bufchar(unsigned char* c, int count){ - int i; - - for (i = 0; i < count; ++i) - *c = *bufptr++; - return count; -} - -int MQTTPacket_decodeBuf(unsigned char* buf, int* value){ - bufptr = buf; - return MQTTPacket_decode(bufchar, value); -} - -/** - * Calculates an integer from two bytes read from the input buffer - * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned - * @return the integer value calculated - */ -int readInt(unsigned char** pptr){ - unsigned char* ptr = *pptr; - int len = 256*(*ptr) + (*(ptr+1)); - *pptr += 2; - return len; -} - -/** - * Reads one character from the input buffer. - * @param pptr pointer to the input buffer - incremented by the number of bytes used & returned - * @return the character read - */ -char readChar(unsigned char** pptr){ - char c = **pptr; - (*pptr)++; - return c; -} - -/** - * Writes one character to an output buffer. - * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned - * @param c the character to write - */ -void writeChar(unsigned char** pptr, char c){ - **pptr = c; - (*pptr)++; -} - -/** - * Writes an integer as 2 bytes to an output buffer. - * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned - * @param anInt the integer to write - */ -void writeInt(unsigned char** pptr, int anInt){ - **pptr = (unsigned char)(anInt / 256); - (*pptr)++; - **pptr = (unsigned char)(anInt % 256); - (*pptr)++; -} - -/** - * Writes a "UTF" string to an output buffer. Converts C string to length-delimited. - * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned - * @param string the C string to write - */ -void writeCString(unsigned char** pptr, const char* string){ - int len = strlen(string); - writeInt(pptr, len); - memcpy(*pptr, string, len); - *pptr += len; -} - -int getLenStringLen(char* ptr){ - int len = 256*((unsigned char)(*ptr)) + (unsigned char)(*(ptr+1)); - return len; -} - -void writeMQTTString(unsigned char** pptr, MQTTString mqttstring){ - if (mqttstring.lenstring.len > 0) - { - writeInt(pptr, mqttstring.lenstring.len); - memcpy(*pptr, mqttstring.lenstring.data, mqttstring.lenstring.len); - *pptr += mqttstring.lenstring.len; - } - else if (mqttstring.cstring) - writeCString(pptr, mqttstring.cstring); - else - writeInt(pptr, 0); -} -/** - * @param mqttstring the MQTTString structure into which the data is to be read - * @param pptr pointer to the output buffer - incremented by the number of bytes used & returned - * @param enddata pointer to the end of the data: do not read beyond - * @return 1 if successful, 0 if not - */ -int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata){ - int rc = 0; - - FUNC_ENTRY; - /* the first two bytes are the length of the string */ - if (enddata - (*pptr) > 1) /* enough length to read the integer? */ - { - mqttstring->lenstring.len = readInt(pptr); /* increments pptr to point past length */ - if (&(*pptr)[mqttstring->lenstring.len] <= enddata) - { - mqttstring->lenstring.data = (char*)*pptr; - *pptr += mqttstring->lenstring.len; - rc = 1; - } - } - mqttstring->cstring = NULL; - FUNC_EXIT_RC(rc); - return rc; -} - - -/** - * Return the length of the MQTTstring - C string if there is one, otherwise the length delimited string - * @param mqttstring the string to return the length of - * @return the length of the string - */ -int MQTTstrlen(MQTTString mqttstring){ - int rc = 0; - - if (mqttstring.cstring) - rc = strlen(mqttstring.cstring); - else - rc = mqttstring.lenstring.len; - return rc; -} - - -/** - * Compares an MQTTString to a C string - * @param a the MQTTString to compare - * @param bptr the C string to compare - * @return boolean - equal or not - */ -int MQTTPacket_equals(MQTTString* a, char* bptr){ - int alen = 0, - blen = 0; - char *aptr; - - if (a->cstring) - { - aptr = a->cstring; - alen = strlen(a->cstring); - } - else - { - aptr = a->lenstring.data; - alen = a->lenstring.len; - } - blen = strlen(bptr); - - return (alen == blen) && (strncmp(aptr, bptr, alen) == 0); -} - - -/** - * Helper function to read packet data from some source into a buffer - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param getfn pointer to a function which will read any number of bytes from the needed source - * @return integer MQTT packet type, or -1 on error - * @note the whole message must fit into the caller's buffer - */ -int MQTTPacket_read(unsigned char* buf, int buflen, int (*getfn)(unsigned char*, int)){ - int rc = -1; - MQTTHeader header = {0}; - int len = 0; - int rem_len = 0; - - /* 1. 读取头字节。这里面有包类型 */ - if ((*getfn)(buf, 1) != 1) - goto exit; - - len = 1; - // 解码 - /* 2. 读剩下的长度。它本身是可变的 */ - MQTTPacket_decode(getfn, &rem_len); - /* 将原始的剩余长度放回缓冲区 */ - len += MQTTPacket_encode(buf + 1, rem_len); - - /* 3. read the rest of the buffer using a callback to supply the rest of the data */ - if((rem_len + len) > buflen) - goto exit; - if (rem_len && ((*getfn)(buf + len, rem_len) != rem_len)) - goto exit; - - header.byte = buf[0]; - rc = header.bits.type; -exit: - return rc; -} - -/** - * Decodes the message length according to the MQTT algorithm, non-blocking - * @param trp pointer to a transport structure holding what is needed to solve getting data from it - * @param value the decoded length returned - * @return integer the number of bytes read from the socket, 0 for call again, or -1 on error - */ -static int MQTTPacket_decodenb(MQTTTransport *trp){ - unsigned char c; - int rc = MQTTPACKET_READ_ERROR; - - FUNC_ENTRY; - if(trp->len == 0){ /* initialize on first call */ - trp->multiplier = 1; - trp->rem_len = 0; - } - do { - int frc; - if (trp->len >= MAX_NO_OF_REMAINING_LENGTH_BYTES) - goto exit; - if ((frc=(*trp->getfn)(trp->sck, &c, 1)) == -1) - goto exit; - if (frc == 0){ - rc = 0; - goto exit; - } - ++(trp->len); - trp->rem_len += (c & 127) * trp->multiplier; - trp->multiplier *= 128; - } while ((c & 128) != 0); - rc = trp->len; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - -/** - * Helper function to read packet data from some source into a buffer, non-blocking - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param trp pointer to a transport structure holding what is needed to solve getting data from it - * @return integer MQTT packet type, 0 for call again, or -1 on error - * @note the whole message must fit into the caller's buffer - */ -int MQTTPacket_readnb(unsigned char* buf, int buflen, MQTTTransport *trp){ - int rc = -1, frc; - MQTTHeader header = {0}; - - switch(trp->state){ - default: - trp->state = 0; - /*FALLTHROUGH*/ - case 0: - /* read the header byte. This has the packet type in it */ - if ((frc=(*trp->getfn)(trp->sck, buf, 1)) == -1) - goto exit; - if (frc == 0) - return 0; - trp->len = 0; - ++trp->state; - /*FALLTHROUGH*/ - /* read the remaining length. This is variable in itself */ - case 1: - if((frc=MQTTPacket_decodenb(trp)) == MQTTPACKET_READ_ERROR) - goto exit; - if(frc == 0) - return 0; - trp->len = 1 + MQTTPacket_encode(buf + 1, trp->rem_len); /* put the original remaining length back into the buffer */ - if((trp->rem_len + trp->len) > buflen) - goto exit; - ++trp->state; - /*FALLTHROUGH*/ - case 2: - if(trp->rem_len){ - /* read the rest of the buffer using a callback to supply the rest of the data */ - if ((frc=(*trp->getfn)(trp->sck, buf + trp->len, trp->rem_len)) == -1) - goto exit; - if (frc == 0) - return 0; - trp->rem_len -= frc; - trp->len += frc; - if(trp->rem_len) - return 0; - } - header.byte = buf[0]; - rc = header.bits.type; - break; - } - -exit: - trp->state = 0; - return rc; -} - diff --git a/firmware/stm32-esp/user/mqtt/MQTTPacket.h b/firmware/stm32-esp/user/mqtt/MQTTPacket.h deleted file mode 100644 index f333bb3b..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTPacket.h +++ /dev/null @@ -1,116 +0,0 @@ -#ifndef _MQTTPACKET_H_ -#define _MQTTPACKET_H_ - -#if defined(__cplusplus) /* If this is a C++ compiler, use C linkage */ -extern "C" { -#endif - -#if defined(WIN32_DLL) || defined(WIN64_DLL) - #define DLLImport __declspec(dllimport) - #define DLLExport __declspec(dllexport) -#elif defined(LINUX_SO) - #define DLLImport extern - #define DLLExport __attribute__ ((visibility ("default"))) -#else - #define DLLImport - #define DLLExport -#endif - -enum errors -{ - MQTTPACKET_BUFFER_TOO_SHORT = -2, - MQTTPACKET_READ_ERROR = -1, - MQTTPACKET_READ_COMPLETE -}; - -enum msgTypes -{ - CONNECT = 1, CONNACK, PUBLISH, PUBACK, PUBREC, PUBREL, - PUBCOMP, SUBSCRIBE, SUBACK, UNSUBSCRIBE, UNSUBACK, - PINGREQ, PINGRESP, DISCONNECT -}; - -/** - * Bitfields for the MQTT header byte. - */ -typedef union -{ - unsigned char byte; /**< the whole byte */ -#if defined(REVERSED) - struct - { - unsigned int type : 4; /**< message type nibble */ - unsigned int dup : 1; /**< DUP flag bit */ - unsigned int qos : 2; /**< QoS value, 0, 1 or 2 */ - unsigned int retain : 1; /**< retained flag bit */ - } bits; -#else - struct - { - unsigned int retain : 1; /**< retained flag bit */ - unsigned int qos : 2; /**< QoS value, 0, 1 or 2 */ - unsigned int dup : 1; /**< DUP flag bit */ - unsigned int type : 4; /**< message type nibble */ - } bits; -#endif -} MQTTHeader; - -typedef struct -{ - int len; - char* data; -} MQTTLenString; - -typedef struct -{ - char* cstring; - MQTTLenString lenstring; -} MQTTString; - -#define MQTTString_initializer {NULL, {0, NULL}} - -int MQTTstrlen(MQTTString mqttstring); - -#include "MQTTConnect.h" -#include "MQTTPublish.h" -#include "MQTTSubscribe.h" -#include "MQTTUnsubscribe.h" -#include "MQTTFormat.h" - -DLLExport int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char type, unsigned char dup, unsigned short packetid); -DLLExport int MQTTDeserialize_ack(unsigned char* packettype, unsigned char* dup, unsigned short* packetid, unsigned char* buf, int buflen); - -int MQTTPacket_len(int rem_len); -DLLExport int MQTTPacket_equals(MQTTString* a, char* b); - -DLLExport int MQTTPacket_encode(unsigned char* buf, int length); -int MQTTPacket_decode(int (*getcharfn)(unsigned char*, int), int* value); -int MQTTPacket_decodeBuf(unsigned char* buf, int* value); - -int readInt(unsigned char** pptr); -char readChar(unsigned char** pptr); -void writeChar(unsigned char** pptr, char c); -void writeInt(unsigned char** pptr, int anInt); -int readMQTTLenString(MQTTString* mqttstring, unsigned char** pptr, unsigned char* enddata); -void writeCString(unsigned char** pptr, const char* string); -void writeMQTTString(unsigned char** pptr, MQTTString mqttstring); - -DLLExport int MQTTPacket_read(unsigned char* buf, int buflen, int (*getfn)(unsigned char*, int)); - -typedef struct { - int (*getfn)(void *, unsigned char*, int); /* must return -1 for error, 0 for call again, or the number of bytes read */ - void *sck; /* pointer to whatever the system may use to identify the transport */ - int multiplier; - int rem_len; - int len; - char state; -}MQTTTransport; - -int MQTTPacket_readnb(unsigned char* buf, int buflen, MQTTTransport *trp); - -#ifdef __cplusplus /* If this is a C++ compiler, use C linkage */ -} -#endif - - -#endif /* MQTTPACKET_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTPublish.h b/firmware/stm32-esp/user/mqtt/MQTTPublish.h deleted file mode 100644 index ebe479dd..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTPublish.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * Copyright (c) 2014 IBM Corp. - * - * All rights reserved. This program and the accompanying materials - * are made available under the terms of the Eclipse Public License v1.0 - * and Eclipse Distribution License v1.0 which accompany this distribution. - * - * The Eclipse Public License is available at - * http://www.eclipse.org/legal/epl-v10.html - * and the Eclipse Distribution License is available at - * http://www.eclipse.org/org/documents/edl-v10.php. - * - * Contributors: - * Ian Craggs - initial API and implementation and/or initial documentation - * Xiang Rong - 442039 Add makefile to Embedded C client - *******************************************************************************/ - -#ifndef MQTTPUBLISH_H_ -#define MQTTPUBLISH_H_ - -#if !defined(DLLImport) - #define DLLImport -#endif -#if !defined(DLLExport) - #define DLLExport -#endif - -DLLExport int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid, - MQTTString topicName, unsigned char* payload, int payloadlen); - -DLLExport int MQTTDeserialize_publish(unsigned char* dup, int* qos, unsigned char* retained, unsigned short* packetid, MQTTString* topicName, - unsigned char** payload, int* payloadlen, unsigned char* buf, int len); - -DLLExport int MQTTSerialize_puback(unsigned char* buf, int buflen, unsigned short packetid); -DLLExport int MQTTSerialize_pubrel(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid); -DLLExport int MQTTSerialize_pubcomp(unsigned char* buf, int buflen, unsigned short packetid); - -#endif /* MQTTPUBLISH_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c b/firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c deleted file mode 100644 index 5bdda7e9..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTSerializePublish.c +++ /dev/null @@ -1,145 +0,0 @@ -#include "MQTTPacket.h" -#include "StackTrace.h" - -#include - -/** - * Determines the length of the MQTT publish packet that would be produced using the supplied parameters - * @param qos the MQTT QoS of the publish (packetid is omitted for QoS 0) - * @param topicName the topic name to be used in the publish - * @param payloadlen the length of the payload to be sent - * @return the length of buffer needed to contain the serialized version of the packet - */ -int MQTTSerialize_publishLength(int qos, MQTTString topicName, int payloadlen){ - int len = 0; - - len += 2 + MQTTstrlen(topicName) + payloadlen; - if (qos > 0) - len += 2; /* packetid */ - return len; -} - - -/** - * Serializes the supplied publish data into the supplied buffer, ready for sending - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param dup integer - the MQTT dup flag - * @param qos integer - the MQTT QoS value - * @param retained integer - the MQTT retained flag - * @param packetid integer - the MQTT packet identifier - * @param topicName MQTTString - the MQTT topic in the publish - * @param payload byte buffer - the MQTT publish payload - * @param payloadlen integer - the length of the MQTT payload - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTSerialize_publish(unsigned char* buf, int buflen, unsigned char dup, int qos, unsigned char retained, unsigned short packetid, - MQTTString topicName, unsigned char* payload, int payloadlen){ - unsigned char *ptr = buf; - MQTTHeader header = {0}; - int rem_len = 0; - int rc = 0; - - FUNC_ENTRY; - if (MQTTPacket_len(rem_len = MQTTSerialize_publishLength(qos, topicName, payloadlen)) > buflen) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - - header.bits.type = PUBLISH; - header.bits.dup = dup; - header.bits.qos = qos; - header.bits.retain = retained; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */; - - writeMQTTString(&ptr, topicName); - - if (qos > 0) - writeInt(&ptr, packetid); - - memcpy(ptr, payload, payloadlen); - ptr += payloadlen; - - rc = ptr - buf; - -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - - -/** - * Serializes the ack packet into the supplied buffer. - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param type the MQTT packet type - * @param dup the MQTT dup flag - * @param packetid the MQTT packet identifier - * @return serialized length, or error if 0 - */ -int MQTTSerialize_ack(unsigned char* buf, int buflen, unsigned char packettype, unsigned char dup, unsigned short packetid){ - MQTTHeader header = {0}; - int rc = 0; - unsigned char *ptr = buf; - - FUNC_ENTRY; - if (buflen < 4) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - header.bits.type = packettype; - header.bits.dup = dup; - header.bits.qos = (packettype == PUBREL) ? 1 : 0; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */ - writeInt(&ptr, packetid); - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - -/** - * Serializes a puback packet into the supplied buffer. - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param packetid integer - the MQTT packet identifier - * @return serialized length, or error if 0 - */ -int MQTTSerialize_puback(unsigned char* buf, int buflen, unsigned short packetid){ - return MQTTSerialize_ack(buf, buflen, PUBACK, 0, packetid); -} - - -/** - * Serializes a pubrel packet into the supplied buffer. - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param dup integer - the MQTT dup flag - * @param packetid integer - the MQTT packet identifier - * @return serialized length, or error if 0 - */ -int MQTTSerialize_pubrel(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid){ - return MQTTSerialize_ack(buf, buflen, PUBREL, dup, packetid); -} - - -/** - * Serializes a pubrel packet into the supplied buffer. - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param packetid integer - the MQTT packet identifier - * @return serialized length, or error if 0 - */ -int MQTTSerialize_pubcomp(unsigned char* buf, int buflen, unsigned short packetid){ - return MQTTSerialize_ack(buf, buflen, PUBCOMP, 0, packetid); -} - - diff --git a/firmware/stm32-esp/user/mqtt/MQTTSubscribe.h b/firmware/stm32-esp/user/mqtt/MQTTSubscribe.h deleted file mode 100644 index aa918268..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTSubscribe.h +++ /dev/null @@ -1,39 +0,0 @@ -/******************************************************************************* - * Copyright (c) 2014 IBM Corp. - * - * All rights reserved. This program and the accompanying materials - * are made available under the terms of the Eclipse Public License v1.0 - * and Eclipse Distribution License v1.0 which accompany this distribution. - * - * The Eclipse Public License is available at - * http://www.eclipse.org/legal/epl-v10.html - * and the Eclipse Distribution License is available at - * http://www.eclipse.org/org/documents/edl-v10.php. - * - * Contributors: - * Ian Craggs - initial API and implementation and/or initial documentation - * Xiang Rong - 442039 Add makefile to Embedded C client - *******************************************************************************/ - -#ifndef MQTTSUBSCRIBE_H_ -#define MQTTSUBSCRIBE_H_ - -#if !defined(DLLImport) - #define DLLImport -#endif -#if !defined(DLLExport) - #define DLLExport -#endif - -DLLExport int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, - int count, MQTTString topicFilters[], int requestedQoSs[]); - -DLLExport int MQTTDeserialize_subscribe(unsigned char* dup, unsigned short* packetid, - int maxcount, int* count, MQTTString topicFilters[], int requestedQoSs[], unsigned char* buf, int len); - -DLLExport int MQTTSerialize_suback(unsigned char* buf, int buflen, unsigned short packetid, int count, int* grantedQoSs); - -DLLExport int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int len); - - -#endif /* MQTTSUBSCRIBE_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c b/firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c deleted file mode 100644 index 3d56ffc7..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTSubscribeClient.c +++ /dev/null @@ -1,118 +0,0 @@ -#include "MQTTPacket.h" -#include "StackTrace.h" - -#include - -/** - * Determines the length of the MQTT subscribe packet that would be produced using the supplied parameters - * @param count the number of topic filter strings in topicFilters - * @param topicFilters the array of topic filter strings to be used in the publish - * @return the length of buffer needed to contain the serialized version of the packet - */ -int MQTTSerialize_subscribeLength(int count, MQTTString topicFilters[]){ - int i; - int len = 2; /* packetid */ - - for (i = 0; i < count; ++i) - len += 2 + MQTTstrlen(topicFilters[i]) + 1; /* length + topic + req_qos */ - return len; -} - - -/** - * Serializes the supplied subscribe data into the supplied buffer, ready for sending - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied bufferr - * @param dup integer - the MQTT dup flag - * @param packetid integer - the MQTT packet identifier - * @param count - number of members in the topicFilters and reqQos arrays - * @param topicFilters - array of topic filter names - * @param requestedQoSs - array of requested QoS - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTSerialize_subscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, int count, - MQTTString topicFilters[], int requestedQoSs[]){ - unsigned char *ptr = buf; - MQTTHeader header = {0}; - int rem_len = 0; - int rc = 0; - int i = 0; - - FUNC_ENTRY; - if (MQTTPacket_len(rem_len = MQTTSerialize_subscribeLength(count, topicFilters)) > buflen) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - - header.byte = 0; - header.bits.type = SUBSCRIBE; - header.bits.dup = dup; - header.bits.qos = 1; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */; - - writeInt(&ptr, packetid); - - for (i = 0; i < count; ++i) - { - writeMQTTString(&ptr, topicFilters[i]); - writeChar(&ptr, requestedQoSs[i]); - } - - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - - -/** - * Deserializes the supplied (wire) buffer into suback data - * @param packetid returned integer - the MQTT packet identifier - * @param maxcount - the maximum number of members allowed in the grantedQoSs array - * @param count returned integer - number of members in the grantedQoSs array - * @param grantedQoSs returned array of integers - the granted qualities of service - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @return error code. 1 is success, 0 is failure - */ -int MQTTDeserialize_suback(unsigned short* packetid, int maxcount, int* count, int grantedQoSs[], unsigned char* buf, int buflen){ - MQTTHeader header = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = NULL; - int rc = 0; - int mylen; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - if (header.bits.type != SUBACK) - goto exit; - - curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ - enddata = curdata + mylen; - if (enddata - curdata < 2) - goto exit; - - *packetid = readInt(&curdata); - - *count = 0; - while (curdata < enddata) - { - if (*count > maxcount) - { - rc = -1; - goto exit; - } - grantedQoSs[(*count)++] = readChar(&curdata); - } - - rc = 1; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - diff --git a/firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c b/firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c deleted file mode 100644 index ed61ace5..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTSubscribeServer.c +++ /dev/null @@ -1,92 +0,0 @@ -#include "MQTTPacket.h" -#include "StackTrace.h" - -#include -/** - * Deserializes the supplied (wire) buffer into subscribe data - * @param dup integer returned - the MQTT dup flag - * @param packetid integer returned - the MQTT packet identifier - * @param maxcount - the maximum number of members allowed in the topicFilters and requestedQoSs arrays - * @param count - number of members in the topicFilters and requestedQoSs arrays - * @param topicFilters - array of topic filter names - * @param requestedQoSs - array of requested QoS - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTDeserialize_subscribe(unsigned char* dup, unsigned short* packetid, int maxcount, int* count, MQTTString topicFilters[], - int requestedQoSs[], unsigned char* buf, int buflen){ - MQTTHeader header = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = NULL; - int rc = -1; - int mylen = 0; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - if (header.bits.type != SUBSCRIBE) - goto exit; - *dup = header.bits.dup; - - curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ - enddata = curdata + mylen; - - *packetid = readInt(&curdata); - - *count = 0; - while (curdata < enddata) - { - if (!readMQTTLenString(&topicFilters[*count], &curdata, enddata)) - goto exit; - if (curdata >= enddata) /* do we have enough data to read the req_qos version byte? */ - goto exit; - requestedQoSs[*count] = readChar(&curdata); - (*count)++; - } - - rc = 1; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - -/** - * Serializes the supplied suback data into the supplied buffer, ready for sending - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param packetid integer - the MQTT packet identifier - * @param count - number of members in the grantedQoSs array - * @param grantedQoSs - array of granted QoS - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTSerialize_suback(unsigned char* buf, int buflen, unsigned short packetid, int count, int* grantedQoSs){ - MQTTHeader header = {0}; - int rc = -1; - unsigned char *ptr = buf; - int i; - - FUNC_ENTRY; - if (buflen < 2 + count) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - header.byte = 0; - header.bits.type = SUBACK; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, 2 + count); /* write remaining length */ - - writeInt(&ptr, packetid); - - for (i = 0; i < count; ++i) - writeChar(&ptr, grantedQoSs[i]); - - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - diff --git a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h deleted file mode 100644 index 355ca9a4..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribe.h +++ /dev/null @@ -1,38 +0,0 @@ -/******************************************************************************* - * Copyright (c) 2014 IBM Corp. - * - * All rights reserved. This program and the accompanying materials - * are made available under the terms of the Eclipse Public License v1.0 - * and Eclipse Distribution License v1.0 which accompany this distribution. - * - * The Eclipse Public License is available at - * http://www.eclipse.org/legal/epl-v10.html - * and the Eclipse Distribution License is available at - * http://www.eclipse.org/org/documents/edl-v10.php. - * - * Contributors: - * Ian Craggs - initial API and implementation and/or initial documentation - * Xiang Rong - 442039 Add makefile to Embedded C client - *******************************************************************************/ - -#ifndef MQTTUNSUBSCRIBE_H_ -#define MQTTUNSUBSCRIBE_H_ - -#if !defined(DLLImport) - #define DLLImport -#endif -#if !defined(DLLExport) - #define DLLExport -#endif - -DLLExport int MQTTSerialize_unsubscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, - int count, MQTTString topicFilters[]); - -DLLExport int MQTTDeserialize_unsubscribe(unsigned char* dup, unsigned short* packetid, int max_count, int* count, MQTTString topicFilters[], - unsigned char* buf, int len); - -DLLExport int MQTTSerialize_unsuback(unsigned char* buf, int buflen, unsigned short packetid); - -DLLExport int MQTTDeserialize_unsuback(unsigned short* packetid, unsigned char* buf, int len); - -#endif /* MQTTUNSUBSCRIBE_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c deleted file mode 100644 index 30e20e8f..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeClient.c +++ /dev/null @@ -1,87 +0,0 @@ -#include "MQTTPacket.h" -#include "StackTrace.h" - -#include - -/** - * Determines the length of the MQTT unsubscribe packet that would be produced using the supplied parameters - * @param count the number of topic filter strings in topicFilters - * @param topicFilters the array of topic filter strings to be used in the publish - * @return the length of buffer needed to contain the serialized version of the packet - */ -int MQTTSerialize_unsubscribeLength(int count, MQTTString topicFilters[]){ - int i; - int len = 2; /* packetid */ - - for (i = 0; i < count; ++i) - len += 2 + MQTTstrlen(topicFilters[i]); /* length + topic*/ - return len; -} - - -/** - * Serializes the supplied unsubscribe data into the supplied buffer, ready for sending - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @param dup integer - the MQTT dup flag - * @param packetid integer - the MQTT packet identifier - * @param count - number of members in the topicFilters array - * @param topicFilters - array of topic filter names - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTSerialize_unsubscribe(unsigned char* buf, int buflen, unsigned char dup, unsigned short packetid, - int count, MQTTString topicFilters[]){ - unsigned char *ptr = buf; - MQTTHeader header = {0}; - int rem_len = 0; - int rc = -1; - int i = 0; - - FUNC_ENTRY; - if (MQTTPacket_len(rem_len = MQTTSerialize_unsubscribeLength(count, topicFilters)) > buflen) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - - header.byte = 0; - header.bits.type = UNSUBSCRIBE; - header.bits.dup = dup; - header.bits.qos = 1; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, rem_len); /* write remaining length */; - - writeInt(&ptr, packetid); - - for (i = 0; i < count; ++i) - writeMQTTString(&ptr, topicFilters[i]); - - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - -/** - * Deserializes the supplied (wire) buffer into unsuback data - * @param packetid returned integer - the MQTT packet identifier - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @return error code. 1 is success, 0 is failure - */ -int MQTTDeserialize_unsuback(unsigned short* packetid, unsigned char* buf, int buflen){ - unsigned char type = 0; - unsigned char dup = 0; - int rc = 0; - - FUNC_ENTRY; - rc = MQTTDeserialize_ack(&type, &dup, packetid, buf, buflen); - if (type == UNSUBACK) - rc = 1; - FUNC_EXIT_RC(rc); - return rc; -} - - diff --git a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c b/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c deleted file mode 100644 index 565c7e87..00000000 --- a/firmware/stm32-esp/user/mqtt/MQTTUnsubscribeServer.c +++ /dev/null @@ -1,83 +0,0 @@ -#include "MQTTPacket.h" -#include "StackTrace.h" - -#include - -/** - * Deserializes the supplied (wire) buffer into unsubscribe data - * @param dup integer returned - the MQTT dup flag - * @param packetid integer returned - the MQTT packet identifier - * @param maxcount - the maximum number of members allowed in the topicFilters and requestedQoSs arrays - * @param count - number of members in the topicFilters and requestedQoSs arrays - * @param topicFilters - array of topic filter names - * @param buf the raw buffer data, of the correct length determined by the remaining length field - * @param buflen the length in bytes of the data in the supplied buffer - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTDeserialize_unsubscribe(unsigned char* dup, unsigned short* packetid, int maxcount, int* count, MQTTString topicFilters[], - unsigned char* buf, int len){ - MQTTHeader header = {0}; - unsigned char* curdata = buf; - unsigned char* enddata = NULL; - int rc = 0; - int mylen = 0; - - FUNC_ENTRY; - header.byte = readChar(&curdata); - if (header.bits.type != UNSUBSCRIBE) - goto exit; - *dup = header.bits.dup; - - curdata += (rc = MQTTPacket_decodeBuf(curdata, &mylen)); /* read remaining length */ - enddata = curdata + mylen; - - *packetid = readInt(&curdata); - - *count = 0; - while (curdata < enddata) - { - if (!readMQTTLenString(&topicFilters[*count], &curdata, enddata)) - goto exit; - (*count)++; - } - - rc = 1; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - -/** - * Serializes the supplied unsuback data into the supplied buffer, ready for sending - * @param buf the buffer into which the packet will be serialized - * @param buflen the length in bytes of the supplied buffer - * @param packetid integer - the MQTT packet identifier - * @return the length of the serialized data. <= 0 indicates error - */ -int MQTTSerialize_unsuback(unsigned char* buf, int buflen, unsigned short packetid){ - MQTTHeader header = {0}; - int rc = 0; - unsigned char *ptr = buf; - - FUNC_ENTRY; - if (buflen < 2) - { - rc = MQTTPACKET_BUFFER_TOO_SHORT; - goto exit; - } - header.byte = 0; - header.bits.type = UNSUBACK; - writeChar(&ptr, header.byte); /* write header */ - - ptr += MQTTPacket_encode(ptr, 2); /* write remaining length */ - - writeInt(&ptr, packetid); - - rc = ptr - buf; -exit: - FUNC_EXIT_RC(rc); - return rc; -} - - diff --git a/firmware/stm32-esp/user/mqtt/StackTrace.h b/firmware/stm32-esp/user/mqtt/StackTrace.h deleted file mode 100644 index 03496fe0..00000000 --- a/firmware/stm32-esp/user/mqtt/StackTrace.h +++ /dev/null @@ -1,61 +0,0 @@ -#ifndef STACKTRACE_H_ -#define STACKTRACE_H_ - -#include -#define NOSTACKTRACE 1 - -#if defined(NOSTACKTRACE) -#define FUNC_ENTRY -#define FUNC_ENTRY_NOLOG -#define FUNC_ENTRY_MED -#define FUNC_ENTRY_MAX -#define FUNC_EXIT -#define FUNC_EXIT_NOLOG -#define FUNC_EXIT_MED -#define FUNC_EXIT_MAX -#define FUNC_EXIT_RC(x) -#define FUNC_EXIT_MED_RC(x) -#define FUNC_EXIT_MAX_RC(x) - -#else - -#if defined(WIN32) -#define inline __inline -#define FUNC_ENTRY StackTrace_entry(__FUNCTION__, __LINE__, TRACE_MINIMUM) -#define FUNC_ENTRY_NOLOG StackTrace_entry(__FUNCTION__, __LINE__, -1) -#define FUNC_ENTRY_MED StackTrace_entry(__FUNCTION__, __LINE__, TRACE_MEDIUM) -#define FUNC_ENTRY_MAX StackTrace_entry(__FUNCTION__, __LINE__, TRACE_MAXIMUM) -#define FUNC_EXIT StackTrace_exit(__FUNCTION__, __LINE__, NULL, TRACE_MINIMUM) -#define FUNC_EXIT_NOLOG StackTrace_exit(__FUNCTION__, __LINE__, -1) -#define FUNC_EXIT_MED StackTrace_exit(__FUNCTION__, __LINE__, NULL, TRACE_MEDIUM) -#define FUNC_EXIT_MAX StackTrace_exit(__FUNCTION__, __LINE__, NULL, TRACE_MAXIMUM) -#define FUNC_EXIT_RC(x) StackTrace_exit(__FUNCTION__, __LINE__, &x, TRACE_MINIMUM) -#define FUNC_EXIT_MED_RC(x) StackTrace_exit(__FUNCTION__, __LINE__, &x, TRACE_MEDIUM) -#define FUNC_EXIT_MAX_RC(x) StackTrace_exit(__FUNCTION__, __LINE__, &x, TRACE_MAXIMUM) -#else -#define FUNC_ENTRY StackTrace_entry(__func__, __LINE__, TRACE_MINIMUM) -#define FUNC_ENTRY_NOLOG StackTrace_entry(__func__, __LINE__, -1) -#define FUNC_ENTRY_MED StackTrace_entry(__func__, __LINE__, TRACE_MEDIUM) -#define FUNC_ENTRY_MAX StackTrace_entry(__func__, __LINE__, TRACE_MAXIMUM) -#define FUNC_EXIT StackTrace_exit(__func__, __LINE__, NULL, TRACE_MINIMUM) -#define FUNC_EXIT_NOLOG StackTrace_exit(__func__, __LINE__, NULL, -1) -#define FUNC_EXIT_MED StackTrace_exit(__func__, __LINE__, NULL, TRACE_MEDIUM) -#define FUNC_EXIT_MAX StackTrace_exit(__func__, __LINE__, NULL, TRACE_MAXIMUM) -#define FUNC_EXIT_RC(x) StackTrace_exit(__func__, __LINE__, &x, TRACE_MINIMUM) -#define FUNC_EXIT_MED_RC(x) StackTrace_exit(__func__, __LINE__, &x, TRACE_MEDIUM) -#define FUNC_EXIT_MAX_RC(x) StackTrace_exit(__func__, __LINE__, &x, TRACE_MAXIMUM) - -void StackTrace_entry(const char* name, int line, int trace); -void StackTrace_exit(const char* name, int line, void* return_value, int trace); - -void StackTrace_printStack(FILE* dest); -char* StackTrace_get(unsigned long); - -#endif - -#endif - - - - -#endif /* STACKTRACE_H_ */ diff --git a/firmware/stm32-esp/user/mqtt/mqtt.c b/firmware/stm32-esp/user/mqtt/mqtt.c new file mode 100644 index 00000000..c7195543 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/mqtt.c @@ -0,0 +1,333 @@ +#include "mqtt.h" + +/* 数据采用大端模式，高字节先发 + UTF-8 "长度 + 字符串" + + 控制报文包含:固定包头+可变包头+有效负载 + 固定包头 byte1（报文类型（bit7-4）+类型标识（bit3-0）） + byte2（剩余长度，包含可变包头和有效负载长度，最大128字节） + 两个字节的计算方式： + 两个字节的计算方式：剩余长度=(Byte1-128)+Byte2*128 +*/ +/***计算剩余字节数***/ +uint8_t by[4] = {0}; +uint8_t MQTTSCode_CalcSurplusByte(uint32_t str){ + uint8_t i = 0; + do + { + by[i] = str%128; + str = str/128; + if(str > 0) + { + by[i] = by[i] | 128; + i++; + } + } while(str > 0); + return i; +} + +MQTT_ConnectData_t MQTT_ConnectData; +static uint8_t StringData[500] = {0}; +static uint8_t StringLen = 0; +static uint16_t waittime = 200; +static uint16_t NewSite = 0; +// 连接服务器 +uint8_t MQTTSCode_Connect(void) { + waittime = 500; + + memset((void *)StringData, 0, sizeof(StringData)); + + /*固定包头*/ + StringData[0] = (uint8_t)(CONNECT<<4) + 0;// 固定帧头 + StringData[1] = 0x00;// 剩余长度值 + /***可变包头***/ + // 协议名 + StringData[2] = 0x00; + StringData[3] = 0x04; + StringData[4] = 'M'; + StringData[5] = 'Q'; + StringData[6] = 'T'; + StringData[7] = 'T'; + + // 协议版本V3.1.1 + StringData[8] = 0x04; + + /* 连接标识 使能用户名和密码校验，不使用遗嘱，不保留会话 + * 1bit 清理会话 + * 2bit 遗嘱标识 + * 3bit 遗嘱QoS + * 4bit 遗嘱QoS + * 5bit 遗嘱保留 + * 6bit 用户名标识 + * 7bit 密码标识 + */ + StringData[9] = 0xC2; + + // 保活时间 + StringData[10] = (uint8_t)(MQTT_ConnectData.keepAlive>>8); + StringData[11] = (uint8_t)(MQTT_ConnectData.keepAlive>>0); + + // 客户端ID + NewSite = 12; + StringLen = strlen((const char*)MQTT_ConnectData.clientID); + StringData[NewSite] = (uint8_t)(StringLen>>8); + StringData[NewSite+1] = (uint8_t)(StringLen>>0); + memcpy( &StringData[NewSite+2], MQTT_ConnectData.clientID, StringLen); + NewSite = NewSite + 2 + StringLen; + + // 用户名 + StringLen = strlen((const char*)MQTT_ConnectData.username); + StringData[NewSite] = (uint8_t)(StringLen>>8); + StringData[NewSite+1]= (uint8_t)(StringLen>>0); + memcpy( &StringData[NewSite+2], MQTT_ConnectData.username, StringLen); + NewSite = NewSite + 2 + StringLen; + + // 密码 + StringLen = strlen((const char*)MQTT_ConnectData.password); + StringData[NewSite] = (uint8_t)(StringLen>>8); + StringData[NewSite+1] = (uint8_t)(StringLen>>0); + memcpy( &StringData[NewSite+2], MQTT_ConnectData.password, StringLen); + NewSite = NewSite + 2 + StringLen; + + // 剩余长度 + if(NewSite < 127) + StringData[1] = NewSite - 2; + else + return 1; + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + + Dev_UART2SendStr(StringData, NewSite, 0); + + // 等待回应 + if(waittime) { + while(--waittime) + { + Delay_ms(10); + if(UART2ReadFlag&0x8000) + { + if(((UART2ReadBuf[0]>>4)==CONNACK)&&(UART2ReadBuf[1]==2)) + { + if(UART2ReadBuf[3]==0){ + UART2ReadFlag = 0; + return 0; + } + else{ + UART2ReadFlag = 0; + while(1); + } + } + } + } + if(waittime==0) + return 1; + } + return 1; +} +// 订阅 服务质量 +uint8_t MQTTSCode_Subscribe(char *topic, uint8_t qos, uint8_t bsf) { + waittime = 500; + + memset((void *)StringData, 0, sizeof(StringData)); + + /*固定包头*/ + StringData[0] = (uint8_t)(SUBSCRIBE<<4) + (uint8_t)(1<<1);// 固定帧头 + StringData[1] = 0x00;// 剩余长度值 + /*可变包头*/ + // 报文标识符 + NewSite = 2; + StringData[NewSite] = (uint8_t)(bsf>>8); + StringData[NewSite+1] = (uint8_t)(bsf>>0); + NewSite = NewSite + 2; + // 有效负载 + // 主题 + StringLen = strlen((const char*)topic); + StringData[NewSite] = (uint8_t)(StringLen>>8); + StringData[NewSite+1] = (uint8_t)(StringLen>>0); + memcpy( &StringData[NewSite+2], topic, StringLen); + NewSite = NewSite + 2 + StringLen; + // 服务质量 + StringData[NewSite] = (uint8_t)(qos>>0); + NewSite = NewSite + 1; + + // 剩余长度 + if(NewSite < 127) + StringData[1] = NewSite - 2; + else + return 1; + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + + Dev_UART2SendStr(StringData, NewSite, 0); + + if(waittime) { + while(--waittime) + { + Delay_ms(10); + if(UART2ReadFlag&0x8000) + { + if((UART2ReadBuf[0]>>4)==SUBACK) + { + UART2ReadFlag = 0; + return 0; + } + } + } + if(waittime==0) + return 1; + } + return 1; +} +// 发布，暂定负载小于100字节 +// qos 0最多发送一次，1至少分发一次，2只分发一次 +uint16_t wait = 0; +uint16_t byte1 = 0,byte2 = 0; +uint8_t MQTTSCode_Publish(char *topic, char *payload, uint16_t payloadLen, uint8_t dup, uint8_t qos, uint16_t bsf) { + waittime = 500; + + memset((void *)StringData, 0, sizeof(StringData)); + + /*固定包头*/ + StringData[0] = (uint8_t)(PUBLISH<<4) + (uint8_t)(dup<<3) + (uint8_t)(qos<<1);// 固定帧头 + StringData[1] = 0x00;// 剩余长度值 + /*可变包头*/ + // 主题名 + NewSite = 2; + StringLen = strlen((const char*)topic); + StringData[NewSite] = (uint8_t)(StringLen>>8); + StringData[NewSite+1] = (uint8_t)(StringLen>>0); + memcpy( &StringData[NewSite+2], topic, StringLen); + NewSite = NewSite + 2 + StringLen; + + // 报文标识符 + if((qos==1) || (qos==2)) { + StringData[NewSite] = (uint8_t)(bsf>>8); + StringData[NewSite+1] = (uint8_t)(bsf>>0); + NewSite = NewSite + 2; + } + // 有效负载 + StringLen = payloadLen; + if(StringLen > 0) { + memcpy( &StringData[NewSite], payload, StringLen); + NewSite = NewSite + StringLen; + } + // 剩余长度 + byte1 = 0; + byte2 = 0; + if(NewSite <= 129) { + StringData[1] = NewSite - 2; + } + else + { + wait = NewSite - 2; + byte1 = wait%128; + wait = wait/128; + if(wait > 0) + { + byte1 = byte1 | 128; + byte2 = wait%128; + StringData[1] = byte1; + } + } + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + Dev_UART2SendStr(StringData, NewSite, byte2); + + // 没有回复消息 + if((qos==1)||(qos==2)) { + if(waittime) { + while(--waittime) + { + Delay_ms(10); + if(UART2ReadFlag&0x8000) + { + if(((UART2ReadBuf[0]>>4)==PUBACK)&&(UART2ReadBuf[1]==2)&&(qos==1)) + { + UART2ReadFlag = 0; + return 0; + } +// if(((UART2ReadBuf[0]>>4)==PUBREC)&&(UART2ReadBuf[1]==2)&&(qos==2)) +// { +// UART2ReadFlag = 0; +// return 0; +// } + } + } + } + if(waittime==0) + return 1; + } + else + { + return 0; + } + return 1; +} +// 心跳 服务质量 +uint8_t MQTTSCode_KeepAlive(void) { + waittime = 500; + + memset((void *)StringData, 0, sizeof(StringData)); + + /*固定包头*/ + StringData[0] = (uint8_t)(PINGREQ<<4) + 0;// 固定帧头 + StringData[1] = 0x00; + + NewSite = 2; + + // 剩余长度 + if(NewSite < 127) + StringData[1] = NewSite - 2; + else + return 1; + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + + Dev_UART2SendStr(StringData, NewSite, 0); + + if(waittime) { + while(--waittime) + { + Delay_ms(10); + if(UART2ReadFlag&0x8000) + { + if((UART2ReadBuf[0]>>4)==PINGRESP) + { + UART2ReadFlag = 0; + return 0; + } + } + } + if(waittime==0) + return 1; + } + return 1; +} +// 断开连接 +uint8_t MQTTSCode_DisConnect(void) { + + memset((void *)StringData, 0, sizeof(StringData)); + + /*固定包头*/ + StringData[0] = (uint8_t)(DISCONNECT<<4) + 0;// 固定帧头 + StringData[1] = 0x00; // 剩余长度值 + + NewSite = 2; + + // 剩余长度 + if(NewSite < 127) + StringData[1] = NewSite - 2; + else + return 1; + + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + + Dev_UART2SendStr(StringData, NewSite, 0); + + // 断开网络连接 + + return 0; +} diff --git a/firmware/stm32-esp/user/mqtt/mqtt.h b/firmware/stm32-esp/user/mqtt/mqtt.h new file mode 100644 index 00000000..bbfc06d8 --- /dev/null +++ b/firmware/stm32-esp/user/mqtt/mqtt.h @@ -0,0 +1,56 @@ +#ifndef _MQTT_H_ +#define _MQTT_H_ + +#include "stm32f10x.h" + +#include "esp8266_uart2.h" + +#include "stdio.h" + +#include "string.h" + +#include "stdarg.h" + +#include "cJSON.h" + +typedef enum +{ + CONNECT = 1, + CONNACK = 2, + + PUBLISH = 3, + PUBACK = 4, + PUBREC = 5, + PUBREL = 6, + PUBCOMP = 7, + + SUBSCRIBE = 8, + SUBACK = 9, + UNSUBSCRIBE = 10, + UNSUBACK = 11, + + PINGREQ = 12, + PINGRESP = 13, + DISCONNECT = 14 +}msgTypes; + +typedef struct +{ + unsigned short keepAlive; + + char clientID[50]; + char username[50]; + char password[50]; +} MQTT_ConnectData_t; +extern MQTT_ConnectData_t MQTT_ConnectData; + +uint8_t MQTTSCode_Connect(void); +/*订阅 服务质量*/ +uint8_t MQTTSCode_Subscribe(char *topic, uint8_t qos, uint8_t bsf); +/*发布，暂定负载小于100字节*/ +uint8_t MQTTSCode_Publish(char *topic, char *payload, uint16_t payloadLen, uint8_t dup, uint8_t qos, uint16_t bsf); +uint8_t MQTTSCode_KeepAlive(void); // 心跳 服务质量 +uint8_t MQTTSCode_DisConnect(void);// 断开连接 +#endif + + diff --git a/firmware/stm32-esp/user/show/dev_work.c b/firmware/stm32-esp/user/show/dev_work.c index dfa42f6f..6078658d 100644 --- a/firmware/stm32-esp/user/show/dev_work.c +++ b/firmware/stm32-esp/user/show/dev_work.c @@ -1,7 +1,6 @@ #include "dev_work.h" -void Dev_ScanExtIndicate(void) -{ +void Dev_ScanExtIndicate(void) { /*开机检测*/ if(DevParam.RunPhase==0) { diff --git a/firmware/stm32-esp/user/show/esp8266_uart2.c b/firmware/stm32-esp/user/show/esp8266_uart2.c index 08c99912..a1c6d713 100644 --- a/firmware/stm32-esp/user/show/esp8266_uart2.c +++ b/firmware/stm32-esp/user/show/esp8266_uart2.c @@ -1,8 +1,7 @@ #include "esp8266_uart2.h" //检测应答命令 -static uint8_t* ESP8266_CheckCmd(uint8_t *str) -{ +static uint8_t* ESP8266_CheckCMD(uint8_t *str){ char *strx = 0; if(UART2ReadFlag&0x8000) { @@ -15,19 +14,19 @@ static uint8_t* ESP8266_CheckCmd(uint8_t *str) //cmd:发送的命令字符串 //ack:期待的应答结果,如果为空,则表示不需要等待应答 //返回值:0,发送成功 1,发送失败 -static uint8_t ESP8266_SendCmd(uint8_t *cmd,uint8_t *ack,uint16_t waittime) { +uint8_t ESP8266_SendCMD(uint8_t *cmd,uint8_t *ack,uint16_t waittime) { UART2ReadFlag = 0; memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - Dev_UART2SendStr("%s\r\n", cmd);//发送命令 - if(ack&&waittime) //需要等待应答 + Dev_UART2SendStr(cmd, 0, 0); + if(ack&&waittime) { - while(--waittime) //等待倒计时 + while(--waittime) { Delay_ms(10); if(UART2ReadFlag&0x8000) { - if(ESP8266_CheckCmd(ack)) + if(ESP8266_CheckCMD(ack)) { UART2ReadFlag = 0; return 0; @@ -46,9 +45,8 @@ static uint8_t ESP8266_SendCmd(uint8_t *cmd,uint8_t *ack,uint16_t waittime) { } return 1; } -uint8_t ESP8266_SendStr(char* fmt,...) -{ - uint8_t tbuf[200] = {0}; +uint8_t ESP8266_SendStr(char* fmt,...){ + uint8_t tbuf[300] = {0}; uint16_t i = 0,j = 0; va_list ap; @@ -67,8 +65,7 @@ uint8_t ESP8266_SendStr(char* fmt,...) return 0; } -uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len) -{ +uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len){ uint16_t i = 0; for( i = 0; i < len; i++) { @@ -82,13 +79,13 @@ uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len) void ESP8266_GetLocalIP(uint8_t* ipbuf){ uint8_t *p,*p1; - if(ESP8266_SendCmd( (uint8_t *)"AT+CIFSR", (uint8_t *)"OK", 50)) + if(ESP8266_SendCMD( (uint8_t *)"AT+CIFSR\r\n", (uint8_t *)"OK", 50)) { ipbuf[0] = 0; return; } - p = ESP8266_CheckCmd((uint8_t *)"\""); + p = ESP8266_CheckCMD((uint8_t *)"\""); p1 = (uint8_t *)strstr((const char*)(p+1),"\""); *p1=0; sprintf((char*)ipbuf,"%s",p+1); @@ -105,12 +102,12 @@ uint8_t ESP8266_QuitTrans(void){ while(USART_GetFlagStatus(USART2,USART_FLAG_TC)==RESET){}; USART_SendData(USART2, '+'); Delay_ms(500); //等待500ms - return ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",20);//退出透传判断 + return ESP8266_SendCMD((uint8_t *)"AT\r\n",(uint8_t *)"OK",20);//退出透传判断 } //获取连接状态 0,未连接;1,连接成功. uint8_t ESP8266_ConstaCheck(void){ - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTATUS",(uint8_t *)"OK",50)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSTATUS\r\n",(uint8_t *)"OK",50)); return 0; } @@ -123,26 +120,26 @@ uint8_t ESP8266_APInit(char *name, char *password){ Delay_ms(1000); Delay_ms(1000); - while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) + while(ESP8266_SendCMD((uint8_t *)"AT\r\n",(uint8_t *)"OK",200)) {//退出透传 ESP8266_QuitTrans(); //关闭透传模式 - ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); + ESP8266_SendCMD((uint8_t *)"AT+CIPMODE=0\r\n",(uint8_t *)"OK",200); Delay_ms(1000); } // 关闭回显 - while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"ATE0\r\n",(uint8_t *)"OK",200)); // 设置波特率 - while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+UART=115200,8,1,0,0\r\n",(uint8_t *)"OK",200)); Delay_ms(10); // 设置WIFI AP模式 - while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=2",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CWMODE=2\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+RST\r\n",(uint8_t *)"OK",200)); // 延时4秒等待重启成功 Delay_ms(1000); @@ -151,17 +148,17 @@ uint8_t ESP8266_APInit(char *name, char *password){ Delay_ms(1000); memset(Sbuf, 0 , sizeof(Sbuf)); - sprintf((char*)Sbuf, "AT+CWSAP=\"%s\",\"%s\",1,4", name, password); - while(ESP8266_SendCmd(Sbuf, (uint8_t *)"OK", 1000)); + sprintf((char*)Sbuf, "AT+CWSAP=\"%s\",\"%s\",1,4\r\n", name, password); + while(ESP8266_SendCMD(Sbuf, (uint8_t *)"OK", 1000)); #ifdef TCP_Mode #endif #ifdef UDP_Mode - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"255.255.255.255\",60156,42254,0",(uint8_t *)"OK",500)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",300)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMUX=0\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSTART=\"UDP\",\"255.255.255.255\",60156,42254,0\r\n",(uint8_t *)"OK",500)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMODE=1\r\n",(uint8_t *)"OK",300)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSEND\r\n",(uint8_t *)"OK",200)); #endif UART2ReadFlag = 0; @@ -172,24 +169,33 @@ uint8_t ESP8266_STAConnect(char *name, char *password){ uint8_t Sbuf[60] ={0}; memset(Sbuf, 0 , sizeof(Sbuf)); - sprintf((char*)Sbuf,"AT+CWJAP=\"%s\",\"%s\"", name, password); - if(ESP8266_SendCmd( Sbuf, (uint8_t *)"WIFI GOT IP", 100)){ + sprintf((char*)Sbuf,"AT+CWJAP=\"%s\",\"%s\"\r\n", name, password); + if(ESP8266_SendCMD( Sbuf, (uint8_t *)"WIFI GOT IP", 100)){ return 1; } - else { - #ifdef TCP_Mode - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"TCP\",\"192.168.0.102\",8086",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); - #endif - #ifdef UDP_Mode - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMUX=0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSTART=\"UDP\",\"192.168.1.6\",8086,8086,0",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=1",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+CIPSEND",(uint8_t *)"OK",20)); - #endif - + else + { + #ifdef MQTT_AT + + #elif MQTT_SCode + + #elif TCP_Mode + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMUX=0\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSTART=\"TCP\",\"192.168.0.102\",8086\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMODE=1\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSEND\r\n",(uint8_t *)"OK",20)); + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + return 0; + #elif UDP_Mode + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMUX=0\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSTART=\"UDP\",\"192.168.1.6\",8086,8086,0\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMODE=1\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSEND\r\n",(uint8_t *)"OK",20)); + UART2ReadFlag = 0; + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + return 0; + #endif UART2ReadFlag = 0; memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); return 0; @@ -202,33 +208,30 @@ uint8_t ESP8266_STAInit(void){ // 延时2秒等待串口初始化完成 Delay_ms(1000); Delay_ms(1000); - while(ESP8266_SendCmd((uint8_t *)"AT",(uint8_t *)"OK",200)) + while(ESP8266_SendCMD((uint8_t *)"AT\r\n",(uint8_t *)"OK",200)) { //退出透传 ESP8266_QuitTrans(); //关闭透传模式 - ESP8266_SendCmd((uint8_t *)"AT+CIPMODE=0",(uint8_t *)"OK",200); + ESP8266_SendCMD((uint8_t *)"AT+CIPMODE=0\r\n",(uint8_t *)"OK",200); Delay_ms(800); } // 关闭回显 - while(ESP8266_SendCmd((uint8_t *)"ATE0",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"ATE0\r\n",(uint8_t *)"OK",200)); // 设置波特率 - while(ESP8266_SendCmd((uint8_t *)"AT+UART=115200,8,1,0,0",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+UART=115200,8,1,0,0\r\n",(uint8_t *)"OK",200)); Delay_ms(10); // 设置WIFI STA模式 - while(ESP8266_SendCmd((uint8_t *)"AT+CWMODE=1",(uint8_t *)"OK",200)); - while(ESP8266_SendCmd((uint8_t *)"AT+RST",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CWMODE=1\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+RST\r\n",(uint8_t *)"OK",200)); Delay_ms(1000); Delay_ms(1000); Delay_ms(1000); - Delay_ms(1000); - - return 1; } diff --git a/firmware/stm32-esp/user/show/esp8266_uart2.h b/firmware/stm32-esp/user/show/esp8266_uart2.h index a8d1276c..a3654a8a 100644 --- a/firmware/stm32-esp/user/show/esp8266_uart2.h +++ b/firmware/stm32-esp/user/show/esp8266_uart2.h @@ -13,6 +13,7 @@ #define UDP_Mode 1 uint8_t ESP8266_SendStr(char* fmt,...); +uint8_t ESP8266_SendCMD(uint8_t *cmd,uint8_t *ack,uint16_t waittime); uint8_t ESP8266_SendData(uint8_t *tbuf, uint16_t len); uint8_t ESP8266_APInit(char *name, char *password); uint8_t ESP8266_STAInit(void); diff --git a/firmware/stm32-esp/user/show/esp8266_work.c b/firmware/stm32-esp/user/show/esp8266_work.c index 946612b5..9cc5b61f 100644 --- a/firmware/stm32-esp/user/show/esp8266_work.c +++ b/firmware/stm32-esp/user/show/esp8266_work.c @@ -1,109 +1,42 @@ #include "esp8266_work.h" -/**************************** +/************************************************************* 配网流程 1、将无线设备初始化为AP模式，默认设置为 - 2、 - // 配置 MQTT 用户属性 - // AT+MQTTUSERCFG=0,1,"8bf209cd00704760b7a60b2f71be9d8c","test","123456",0,0,""\r\n - // 配置 MQTT 连接属性 - // AT+MQTTCONNCFG=0,120,0,"","",0,0\r\n - // 连接/查询 MQTT Broker - // AT+MQTTCONN=0,"106.12.9.213",1883,0\r\n - // 发布主题 - // {"deviceNum":"7CDFA1049ADA","categoryId":2,"firmwareVersion":"1.0","ownerId":"1"} - // AT+MQTTPUB=0,"device_info","{"deviceNum":"E8DB84933050","categoryId":1,"firmwareVersion":"1.0","ownerId":"1"}",0,0\r\n - // 订阅/查询主题 - // AT+MQTTSUB=0,"status/set/E8DB84933050",1\r\n - // 取消订阅主题 - // AT+MQTTUNSUB=0,"status/set/E8DB84933050" - // 关闭连接, 释放资源 - // AT+MQTTCLEAN=0 -****************************/ -static uint8_t NetWorkFlow = 1; -static uint32_t Nport = 0; -static uint8_t Nssid[20] = {0}; -static uint8_t Npassword[20] = {0}; + 2、AT+CWJAP="CMCC-LI","092413131li" + // 配置 MQTT 用户属性 + // AT+MQTTUSERCFG=0,1,"8bf209cd00704760b7a60b2f71be9d8c","test","12345678",0,0,"" + // 配置 MQTT 连接属性 + // AT+MQTTCONNCFG=0,120,0,"","",0,0 + // 连接/查询 MQTT Broker + // AT+MQTTCONN=0,"106.12.9.213",1883,0 + // 发布主题 + // {"deviceNum":"E8DB84933056","categoryId":2,"firmwareVersion":"1.0","ownerId":"1"} + // AT+MQTTPUB=0,"device_info","{\"deviceNum\":\"E8DB8493312\"\\,\"categoryId\":1\\,\"firmwareVersion\":\"1.0\"\\,\"ownerId\":\"1\"}",0,0 + // AT+MQTTPUB=0,"device_info","{\"deviceNum\":\"E8DB8493312\"\\,\"categoryId\":1\\,\"firmwareVersion\":\"1.0\"\\,\"ownerId\":\"1\"}",0,0\r\n + // 订阅/查询主题 + // AT+MQTTSUB=0,"status/set/E8DB84933056",0 + // 取消订阅 + // AT+MQTTUNSUB=0,"status/set/E8DB84933050" + // 关闭连接, 释放资源 + // AT+MQTTCLEAN=0 +************************************************************/ +uint8_t NetWorkFlow = 1; -#ifdef MQTT_SCode -MQTTPacket_connectData MQTT_ConnectData = MQTTPacket_connectData_initializer; -char MQTT_ClientId[150] = {0}; -char MQTT_Username[65] = {0}; -char MQTT_Password[65] = {0}; -volatile uint16_t MQTT_ReadBufLen = 0; -#endif +uint8_t Wssid[20] = ""; +uint8_t Wpassword[20] = ""; -int ESP8266_WaitData(unsigned char* buf, int count) -{ - while(1) - { - if(UART2ReadFlag&0x8000) - { - memcpy(buf, (void*)&UART2ReadBuf[MQTT_ReadBufLen], count); - MQTT_ReadBufLen += count; - return count; - } - Delay_ms(10); - } -} -#ifdef MQTT_SCode -uint8_t MQTT_UserSubscribe(char *pSubTopic) { - uint8_t buf[200] = {0}; - uint32_t buflen = sizeof(buf); - int32_t msgid = 1; - int32_t req_qos = 0; // 服务质量 +char MQTT_ServerIP[20] = "106.12.9.213"; +uint32_t MQTT_ServerPort = 1883; - MQTTString topicString = MQTTString_initializer; - topicString.cstring = pSubTopic; - - // 订阅格式化 - MQTTSerialize_subscribe(buf, buflen, 0, msgid, 1, &topicString, &req_qos); - - // 发送订阅 - UART2ReadFlag = 0; - ESP8266_SendStr((char *)buf); - if (MQTTPacket_read(buf, buflen, ESP8266_WaitData)==SUBACK) /* wait for suback */ - { - unsigned short submsgid; - int subcount; - int granted_qos; +static char MQTT_DeviceID[20] = "E8DB84933299"; +static char MQTT_ClientID[100] = "user"; +static char MQTT_Username[20] = "test"; +static char MQTT_Password[20] = "123456"; - MQTTDeserialize_suback(&submsgid, 1, &subcount, &granted_qos, buf, buflen); - if (granted_qos != 0) - { - //Sys_SendLog("granted qos != 0, %d\n", granted_qos); - return 0; - } - else - { - //Sys_SendLog("granted qos = 0\n"); - return 1; - } - } - else - { - //Sys_SendLog("no suback received!\r\n"); - return 0; - } -} -#endif -#ifdef MQTT_SCode -// MQTT_Publish("/mqtt/topic/0", "hello0"); -void MQTT_UserPublish(char *pPubTopic, char *payload, int payloadlen) { - uint8_t buf[400] = {0}; - int buflen = sizeof(buf); - MQTTString topicString = MQTTString_initializer; - int len = 0; - - topicString.cstring = pPubTopic; - len += MQTTSerialize_publish((unsigned char *)(buf + len), buflen - len, 0, 0, 0, 0, topicString, (unsigned char *)payload, payloadlen); - ESP8266_SendStr((char *)buf); -} -#endif -uint8_t buf[400] = {0}; -int buflen = 0; -void ESP8266_NetWorkFlow(void) -{ +uint8_t PublishData[500] = {0}; +int len = 0; +void ESP8266_NetWorkFlow(void) { // 第一步，初始化为AP if(NetWorkFlow == 1) { ESP8266_APInit("XiaoYi_IOT_AirBox", "asdqwe9867"); @@ -113,114 +46,181 @@ void ESP8266_NetWorkFlow(void) else if(NetWorkFlow == 2) { if(DevParam.ESP8266SendTime >= 2000) { - ESP8266_SendStr("{\"code\":\"0\",\"msg\":\"start connect\"}"); + ESP8266_SendStr("{\"code\":0,\"msg\":\"start connect\"}"); DevParam.ESP8266SendTime = 0; } } // 第三步，返回接受成功信息 else if(NetWorkFlow == 3) { - ESP8266_SendStr("{\"code\":\"1\",\"msg\":\"getWifiInfo:success\"}"); + ESP8266_SendStr("{\"code\":1,\"msg\":\"getWifiInfo:success\"}"); NetWorkFlow = 4; } // 第四步，连接家庭无线 else if(NetWorkFlow == 4) { ESP8266_STAInit(); - while(ESP8266_STAConnect((char *)Nssid, (char *)Npassword)); + while(ESP8266_STAConnect((char *)Wssid, (char *)Wpassword)); NetWorkFlow = 5; } + // 第五步，配置MQTT else if(NetWorkFlow == 5) { + /*********模拟MQTT指令**************/ #ifdef MQTT_SCode -// MQTT_ConnectData.MQTTVersion = 4; // 3.1.1 -// MQTT_ConnectData.keepAliveInterval = 60; // 设置心跳包间隔时间 -// MQTT_ConnectData.clientID.cstring = (char *)MQTT_ClientId;// 客户端ID -// MQTT_ConnectData.username.cstring = (char *)MQTT_Username;// 用户名 -// MQTT_ConnectData.password.cstring = (char *)MQTT_Password;// 密码 -// MQTT_ConnectData.cleansession = 0; // 清除会话 + MQTT_ConnectData.keepAlive = 120; // 心跳包，单位秒 + strcpy( MQTT_ConnectData.clientID, MQTT_ClientID);// 客户端ID + strcpy( MQTT_ConnectData.username, MQTT_Username);// 用户名 + strcpy( MQTT_ConnectData.password, MQTT_Password);// 密码 - //rc = aiotMqttSign(product_key, device_name, device_secret, \ - //MQTT_ConnectData.clientID.cstring, MQTT_ConnectData.username.cstring, MQTT_ConnectData.password.cstring); - //if (rc < 0) { - //Sys_SendLog("aiotMqttSign -%0x4x\n", -rc); - //return -1; - //} + /***连接服务器***/ + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMUX=0\r\n",(uint8_t *)"OK",200)); + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+CIPSTART=\"TCP\",\"%s\",%d\r\n", MQTT_ServerIP, MQTT_ServerPort); + while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 500)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPMODE=1\r\n",(uint8_t *)"OK",200)); + while(ESP8266_SendCMD((uint8_t *)"AT+CIPSEND\r\n",(uint8_t *)"OK",200)); + + /***登录服务器***/ + while(MQTTSCode_Connect()); - // 网络连接 - //char *host = "a1ykSq0uPgd.iot-as-mqtt.cn-shanghai.aliyuncs.com"; - //int port = 1883; - //transport_open( host, port); - - // 发送 登录数据 - // 将连接字符串格式化一下，现在还没有发送 -// memset(buf, 0 ,sizeof(buf)); -// buflen = sizeof(buf); -// -// MQTTSerialize_connect( buf, buflen, &MQTT_ConnectData); -// UART2ReadFlag = 0; -// ESP8266_SendStr((char *)buf); - - // 等待connack -// if (MQTTPacket_read(buf, buflen, ESP8266_WaitData) == CONNACK){ -// unsigned char sessionPresent, connack_rc; -// if (MQTTDeserialize_connack(&sessionPresent, &connack_rc, buf, buflen) != 1 || connack_rc != 0) -// { -// //Sys_SendLog("Unable to connect,return code %d\r\n", connack_rc); -// //return -1; -// } -// } - /*订阅*/ -// MQTT_UserSubscribe("status/set/7CDFA1049ADA"); //更新设备状态 -// MQTT_UserSubscribe("status/get/7CDFA1049ADA"); //获取设备状态 -// MQTT_UserSubscribe("setting/set/7CDFA1049ADA");//更新设备配置 -// MQTT_UserSubscribe("setting/get/7CDFA1049ADA");//获取设备配置 + /***订阅服务器对状态设置***/ + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"status/set/%s", MQTT_DeviceID); + while(MQTTSCode_Subscribe((char *)PublishData, 0, 12)); #endif /********************************/ + /*********AT指令*****************/ #ifdef MQTT_AT - + // 1，配置 MQTT 用户属性 + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+MQTTUSERCFG=0,1,\"%s\",\"%s\",\"%s\",0,0,\"\"\r\n",\ + MQTT_ClientID, MQTT_Username, MQTT_Password); + while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 500)); + + // 2，配置 MQTT 连接属性 + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+MQTTCONNCFG=0,120,0,\"\",\"\",0,0\r\n"); + while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 500)); + + // 3，连接/查询服务器 + //memset((void *)PublishData, 0, sizeof(PublishData)); + //sprintf((char *)PublishData,"AT+MQTTCONN=0,\"%s\",1883,0\r\n",\ + // MQTT_ServerIP); + //while(ESP8266_SendCMD((uint8_t *)"AT+MQTTCONN?\r\n", (uint8_t *)"OK", 500)); + while(ESP8266_SendCMD((uint8_t *)"AT+MQTTCONN=0,\"106.12.9.213\",1883,0\r\n", (uint8_t *)"OK", 300)); + + // 4，发布注册设备信息Publish + //memset((void *)PublishData, 0, sizeof(PublishData)); + //sprintf((char *)PublishData,"AT+MQTTPUB=0,\"%s\",\"{\\\"deviceNum\\\":\\\"%s\\\"\\,\\\"categoryId\\\":1\\,\\\"firmwareVersion\\\":\\\"1.0\\\"\\,\\\"ownerId\\\":\\\"1\\\"}\",0,0\r\n",\ + // "device_info" ,MQTT_DeviceID); + //while(ESP8266_SendCMD(PublishData, (uint8_t *)"OK", 500)); + + // 发布设备上线(设备状态) + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+MQTTPUB=0,\"%s\",\"{\\\"deviceNum\\\":\\\"%s\\\"\\,\\\"isOnline\\\":1\\,\\\"rssi\\\":-73\\,\\\"airTemperature\\\":%d\\,\\\"remark\\\":\\\"\\\"}\",0,0\r\n",\ + "status" ,MQTT_DeviceID, DevParam.BatSOC); + while(ESP8266_SendCMD(PublishData, (uint8_t *)"OK", 500)); + + // 发布设备遗嘱 +// memset((void *)PublishData, 0, sizeof(PublishData)); +// sprintf((char *)PublishData,"AT+MQTTPUB=0,\"offline\",\"{\\\"deviceNum\\\":\\\"%s\\\"\\,\\\"isOnline\\\":0\\,\\\"remark\\\":\\\"\\\"}\",0,0\r\n",\ +// MQTT_DeviceID); +// while(ESP8266_SendCMD(PublishData, (uint8_t *)"OK", 500)); + + // 发布设备配置 + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+MQTTPUB=0,\"status\",\"{\\\"deviceNum\\\":\\\"%s\\\"\\,\\\"isReset\\\":0\\,\\\"remark\\\":\\\"\\\"}\",0,0\r\n",\ + MQTT_DeviceID); + while(ESP8266_SendCMD(PublishData, (uint8_t *)"OK", 500)); + + // 5，订阅 +// // 更新设备设置状态 +// memset((void *)PublishData, 0, sizeof(PublishData)); +// sprintf((char *)PublishData,"AT+MQTTSUB=0,\"status\\\/set\\\/%s\", MQTT_DeviceID); +// while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 500)); + // 订阅获取设备状态 + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+MQTTSUB=0,\"status\\/set\\/%s\",0\r\n", MQTT_DeviceID); + while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 500)); +// // 更新设备配置 +// memset((void *)PublishData, 0, sizeof(PublishData)); +// sprintf((char *)PublishData,"AT+MQTTSUB=0,\"setting/set/%s\",\"\",0,0\r\n", MQTT_DeviceID); +// while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 500)); +// // 获取设备配置 +// memset((void *)PublishData, 0, sizeof(PublishData)); +// sprintf((char *)PublishData,"AT+MQTTSUB=0,\"setting/get/%s\",\"\",0,0\r\n", MQTT_DeviceID); +// while(ESP8266_SendCMD((uint8_t *)PublishData, (uint8_t *)"OK", 200)); #endif + NetWorkFlow = 10; /********************************/ } - else if(NetWorkFlow == 10) - { + // 第十步，发布消息 + else if(NetWorkFlow == 10) { + /********************************/ #ifdef MQTT_SCode -// if(DevParam.ESP8266SendTime >= 2000) -// { -// MQTTSerialize_pingreq(buf, buflen);// 发送心跳 -// ESP8266_SendStr((char *)buf); -// DevParam.ESP8266SendTime = 0; -// } - // 发布设备状态 -// else if(DevParam.ESP8266SendTime>=1500){ -// // /a1ykSq0uPgd/qmvH76OCy2FeGp9DDMPx/user/update -// // 0x00 00000001 0032 0100 001223 -// char txBuf[30] = {0}; -// char txLen = 0; -// //txBuf[txLen++] = COMMAND_REPORT;// 属性上报 -// txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x00;txBuf[txLen++] = 0x01;// ID -// //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0); // INT16 -// //txBuf[txLen++] = DeviceData.prop_bool; // BOOL -// //txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 8);txBuf[txLen++] = (uint8_t)(DeviceData.prop_int16 >> 0);// FLOAT - -// MQTT_UserPublish("device_info", txBuf, txLen); -// DevParam.ESP8266SendTime = 0; -// } - #endif + if(DevParam.MQTTSendTime >= 2000) + { + // 定时发布设备状态 + memset((void *)PublishData, 0, sizeof(PublishData)); + len = sprintf((char *)PublishData,"{\"deviceNum\":\"%s\",\"isOnline\":1,\"airTemperature\":%d,\"remark\":\"\"}",\ + MQTT_DeviceID, DevParam.tes); + if(len > 0) + { + while(MQTTSCode_Publish("status", (char *)PublishData, len, 0, 1, 10)); + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + } + DevParam.MQTTSendTime = 0; + } + #endif + /********************************/ + /********************************/ + #ifdef MQTT_AT + if(DevParam.MQTTSendTime >= 5000) + { + // 定时发布设备状态 + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"AT+MQTTPUB=0,\"%s\",\"{\\\"deviceNum\\\":\\\"%s\\\"\\,\\\"isOnline\\\":1\\,\\\"rssi\\\":-73\\,\\\"airTemperature\\\":%d\\,\\\"remark\\\":\\\"\\\"}\",0,0\r\n",\ + "status" ,MQTT_DeviceID, DevParam.BatSOC); + while(ESP8266_SendCMD(PublishData, (uint8_t *)"OK", 500)); + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + DevParam.MQTTSendTime = 0; + } + #endif + /********************************/ + } +} +char mystrstr(char *haystack, char *needle) { + uint16_t i = 0,j = 0; + for(i = 0;;i++) + { + if(haystack[i]==needle[0]) + { + for(j = 0;;j++) + { + if(haystack[i+j]==needle[j]) + { + if(needle[j+1] == '\0') + return 1; + } + else + break; + } + } + if((haystack[i]=='\r') && (haystack[i+1]=='\n')) + { + return 0; + } } } - cJSON *root = NULL; -char JsonString[100] = {0}; -uint16_t init = 0; -uint16_t i = 0; - -uint8_t rbuf[256] = {0}; -uint8_t rlen = 0; +char JsonString[500] = {0}; +uint16_t i = 0,j = 0,slen = 0; void ESP8266_NetReceiveInfor(void) { if(UART2ReadFlag&0x8000) { + // 配网解析 if(NetWorkFlow == 2) { - // {"port":"60156","ssid":"xxx","password":"xxxx"} - if(UART2ReadBuf[0] == '{') - { + // {"port":60156,"ssid":"xxx","password":"xxxx"} + if(UART2ReadBuf[0] == '{') { + memset(JsonString, 0, sizeof(JsonString)); for(i = 0;;i++) { JsonString[i] = UART2ReadBuf[i]; @@ -234,50 +234,105 @@ void ESP8266_NetReceiveInfor(void) { UART3ReadFlag = 0; return; } - Nport = cJSON_GetObjectItem(root, "port")->valuedouble; - if(Nport==60156) - { - sprintf((char *)Nssid, "%s",cJSON_GetObjectItem(root, "ssid")->valuestring); - sprintf((char *)Npassword,"%s",cJSON_GetObjectItem(root, "password")->valuestring); +// Nport = cJSON_GetObjectItem(root, "port")->valuedouble; +// if(Nport==60156) +// { + sprintf((char *)Wssid, "%s",cJSON_GetObjectItem(root, "ssid")->valuestring); + sprintf((char *)Wpassword,"%s",cJSON_GetObjectItem(root, "password")->valuestring); // 进入无线第三步 NetWorkFlow = 3; - } - cJSON_Delete(root); - memset(JsonString, 0, sizeof(JsonString)); +// } + cJSON_Delete(root); break; } } } } - if(NetWorkFlow == 10) - { - #ifdef MQTT_SCode - rlen = UART2ReadFlag&(~(1<<15)); - memcpy(rbuf, (void*)&UART2ReadBuf, rlen); - memset(UART2ReadBuf, 0, sizeof(UART2ReadBuf)); - UART2ReadFlag = 0; - - if (strstr((char *)rbuf, "CLOSED")) - { - - } - else - { - if (0xD0 == *rbuf) + // 服务器解析 + if(NetWorkFlow == 10) { + #ifdef MQTT_SCode + slen = UART2ReadFlag&(~(1 << 15)); + UART2ReadBuf[slen] = 0x0D; + UART2ReadBuf[slen+1] = 0x0A; + /**********设置状态*********/ + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"status/set/%s", MQTT_DeviceID); + if(mystrstr((char *)UART2ReadBuf, (char *)PublishData)==1) { + memset(JsonString, 0, sizeof(JsonString)); + for(i = 0;;i++) { - //Sys_SendLog("MQTT Heart Beat \r\n"); - } - else + if(UART2ReadBuf[i]=='{') + { + for(j = 0;;j++) + { + JsonString[j] = UART2ReadBuf[j+i]; + if( (UART2ReadBuf[j+i]=='}') && (UART2ReadBuf[j+i+1]==0x0D) && (UART2ReadBuf[j+i+2]==0x0A)) + { + // 解析数据 + root = cJSON_Parse((char *)JsonString); + if(root == NULL) + { + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART3ReadFlag = 0; + return; + } + + DevParam.ServerRelay= cJSON_GetObjectItem(root, "relayStatus")->valuedouble; + DevParam.ServerRed = cJSON_GetObjectItem(root, "red")->valuedouble; + + cJSON_Delete(root); + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART3ReadFlag = 0; + return; + } + } + } + } + } + #endif + #ifdef MQTT_AT + // 首先判断 + if(strstr((const char*)UART2ReadBuf,(const char*)"+MQTTSUBRECV")) { + memset((void *)PublishData, 0, sizeof(PublishData)); + sprintf((char *)PublishData,"status/set/%s", MQTT_DeviceID); + if(strstr((const char*)UART2ReadBuf,(const char*)PublishData)) { -// strncpy(Topic, (void*)(rbuf+4), rbuf[3]); -// printf("Topic: %s\r\n", Topic); -// strncpy(message,(void*)(rbuf+4+rbuf[3]),rbuf[1]-rbuf[3]-2); -// printf("Message: %s\r\n", message); -// memset(rbuf, 0, sizeof(rbuf)); + memset(JsonString, 0, sizeof(JsonString)); + for(i = 0;;i++) + { + if(UART2ReadBuf[i]=='{') + { + for(j = 0;;j++) + { + JsonString[j] = UART2ReadBuf[j+i]; + if( (UART2ReadBuf[j+i]=='}') && (UART2ReadBuf[j+i+1]==0x0D) && (UART2ReadBuf[j+i+2]==0x0A)) + { + // 解析数据 + root = cJSON_Parse((char *)JsonString); + if(root == NULL) + { + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART3ReadFlag = 0; + return; + } + + DevParam.ServerRelay= cJSON_GetObjectItem(root, "relayStatus")->valuedouble; + DevParam.ServerRed = cJSON_GetObjectItem(root, "red")->valuedouble; + + cJSON_Delete(root); + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART3ReadFlag = 0; + return; + } + } + } + } } - } - #endif - } + } + #endif + } + memset((void *)UART2ReadBuf, 0, sizeof(UART2ReadBuf)); + UART2ReadFlag = 0; } } diff --git a/firmware/stm32-esp/user/show/esp8266_work.h b/firmware/stm32-esp/user/show/esp8266_work.h index 2302e6c3..b014dae5 100644 --- a/firmware/stm32-esp/user/show/esp8266_work.h +++ b/firmware/stm32-esp/user/show/esp8266_work.h @@ -5,11 +5,15 @@ #include "esp8266_uart2.h" +#include "stdio.h" + +#include "string.h" + +#include "stdarg.h" + #include "cJSON.h" -#include "MQTTPacket.h" - -#include "MQTTConnect.h" +#include "mqtt.h" void ESP8266_NetWorkFlow(void); void ESP8266_NetReceiveInfor(void); From c71f437b98a12e3683d6e4f0f8968615c6bb2c45 Mon Sep 17 00:00:00 2001 From: yueming Date: Mon, 6 Sep 2021 00:22:06 +0800 Subject: [PATCH 8/9] =?UTF-8?q?=E4=BF=AE=E6=94=B9=E7=AE=80=E4=BB=8B?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- firmware/stm32-esp/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/stm32-esp/README.md b/firmware/stm32-esp/README.md index 5bdfbe35..6a86a298 100644 --- a/firmware/stm32-esp/README.md +++ b/firmware/stm32-esp/README.md @@ -1,6 +1,6 @@ ### 一、项目简介 - + 本项目主要实现配网以及通过MQTT连接服务器的过程。
From 437143e01a7c6f71d3ccb0461e8eac8e97370b0e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E6=9C=88=E6=98=8EL=E6=98=9F=E7=A8=80?= <1443685018@qq.com> Date: Sun, 5 Sep 2021 16:25:07 +0000 Subject: [PATCH 9/9] update firmware/stm32-esp/README.md. --- firmware/stm32-esp/README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/stm32-esp/README.md b/firmware/stm32-esp/README.md index 6a86a298..50917cc9 100644 --- a/firmware/stm32-esp/README.md +++ b/firmware/stm32-esp/README.md @@ -1,6 +1,6 @@ ### 一、项目简介 - 本项目主要实现配网以及通过MQTT连接服务器的过程。 + **本项目主要实现配网以及通过MQTT连接服务器的过程。